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EV80C196KB Evaluation Board User`s Manual

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1. offset equ 8000H 9 M MM RM anu o oo Code offset before REMAP Tell the commands what to use for psw while monitor is running rism psw equ 0000H No Interrupts enabled This section contains several macros generate specifically for this program ee a aA cum cm ENTER RISM A macro which EXIT RISM A macro which SEND DATA BYTE generates the prologue for the RISM ISR generates the epilogue for the RISM ISR A macro which passes the lower eight bits of RISM DATA to the serial port it assumes the port is ready for data BYTE PROTECT A macro which to write into WORD PROTECT A macro which to write into DWORD PROTECT A macro which to write into Seject terminates the RISM ISR if the RISM is about a byte it should not modify terminates the RISM ISR if the RISM is about a word it should not modify terminates the RISM ISR if the RISM is about a double word it should not modify 3 MCS 96 MACRO ASSEMBLER EV96 ERR LOC OBJECT LINE 128 129 130 131 132 132 134 135 136 137 138 139 140 141 142 143 144 145 146 147
2. a MES Figure 1 EV80C196KB Evaluation Board EV80C196KB Microcontroller Evaluation Board User s Manual 9 INTRODUCTION The EV80C196KB is a next generation version of the EV80C196KA The major changes are the use of a standard memory expansion bus compatible with the EV80C51FB and EV80C186 boards and the removal of the card edge bus Also the HOLD HLDA feature of the 80C196KB is supported The EV80C196KB is de signed to be a software evaluation tool for the ROMless 80C196KB 16 bit microcon troller As such ports 3 and 4 are not available for use as ports unless offboard latches buffers and decoding logic are used All unreserved functions of the _ 80C196KB are available to you except for the Non Maskabie Interrupt NMI the TRAP instruction and 512 bytes of address space The Chip Configuration Byte is also used by the monitor but most of its functions are provided by external logic GETTING STARTED WITH THE EV80C196KB Powering up the Board Power 45 12 Volts must be connected to JP4 as shown on the board s silk screen next to JP4 and in figure 10 Included with the board is a packet containing a Molex connector and crimp terminals for your convenience Power supply requirements for the EV80C196KB board are as follows 5 VDC 5 280 mA 150 mA if LED s are disabled by removing jumper shunt E16 12 VDC 2096 15 mA 12 VDC 20 15 mA Upon power up or afte
3. make room for new byte Execute a reset instruction and loop until reset takes effect 24 MCS 96 MACRO ASSEMBLER EV96 ERR LOC OBJECT 8057 8057 23430 805 805 23430 8061 8061 23430 8064 A3340232 806 806 63530 806 806 23530 8074 8074 23530 8077 23532 HINE 847 848 849 850 851 852 853 856 857 858 859 860 861 862 865 866 867 868 869 870 871 872 875 876 877 878 879 880 881 882 883 886 887 888 889 890 891 892 893 896 897 898 899 900 901 902 903 904 905 908 909 SOURCE STATEMENT READ BYTE 2 RISM DATA byte at RISM ADDR 195 RISM DATA RISM ADDR EXIT RISM READ WORD ap oc RISM DATA word at RISM ADDR ld RISM DATA 5 ADDR EXIT RISM READ DOUBLE uw RISM DATA double word at RISM ADDR ld RISM DATA RISM ADDR ld RISM DATA 2 2 RISM ADDR EXIT RISM WRITE BYTE A byte at RISM ADDR RISM DATA RISM ADDR RISM ADDR 1 BYTE PROTECT stb RISM DATA RISM ADDR EXIT RISM WRITE WORD word at RISM ADDR RISM DATA RISM ADDR RISM ADDR 2 WORD PROTECT st RISM DATA RISM ADDR EXIT_RISM WRITE DOUBLE double word at RISM ADDR RISM DATA RISM ADDR RISM ADDR 4 DWORD PROTECT st RISM DATA RISM ADDR st RISM_DATA 2 RISM_ADDR EXIT RISM Sej
4. 12 8 80C196KB Evaluation Board Revised December 27 1988 CPU Section Revision ECO Applications Engineering Bill Of Materials December 27 1988 215153123 Page 1 of 2 Item Quantity Reference Part Vendor Manuf 1 des US 80C196 PLCC iNTEL INTEL 80 196 12 2 1 020 82510 INTEL INTEL P82510 3 2 01 08 28 INTEL INTEL 0271864 4 3 U6 U13 U14 JEDEC 28PIN Sterling Hitachi HM6264P 10 3 1 U17 74ACOO Hamilton Fairchild 74 6 1 521 74 08 Hamilton Fairchild 74 08 7 1 02 74AC14 Hamilton Fairchild 74 14 8 1 016 74AC32 Hamilton Fairchild 74AC32PC 9 1 U7 74 74 Hamilton Fairchild 74AC74PC 10 1 015 74 112 Hamilton GE RCA CD74AC112E 11 1 09 74AC240 Hamilton Fairchild 74AC240PC 12 2 U10 U11 74 73 Hamilton Fairchild 74AC373PC 13 1 018 14 88 Hamilton National DS14C88N 14 1 019 14 89 Hamilton National DS14C89N 25 1 012 22V10 Luscombe Cypress PALC22V10 35PC 16 1 04 PMIREFO2 Hamilton PMI REF 2HP 17 1 U3 LM358N Hamilton 18 2 D2 D1 diode Bamilton 8 1N4305 19 1 resistor Sterling Dale MDP 1603 271G 20 1 Hamilton Spraque 926CX7R562K050B 21 1 X1 12MHz Sterling M TRON 1 12 0000 22 1 X2 18 432MHz Sterling M TRON 1 18 4320 23 1 51 RESET Digi key Panisonic P9950 24 5 D5 D3 D4 D6 D7 1N4305 Hamilton 1N4305 25 1 DPI HDSP 48XX Sterling Lite On LTA1000G 26 E R10 180 Hamilton Mepco CR25 180 27 1 R5 4 7 Hamilton Mepco CR25 4 7K 28 R2 10K Hamilton Mepco C
5. 15 H 15 n A15 Range Equations AL4 1 14 1 14 14 1 14 1114 14 1 14 14 14 1 14 1 14 1 14 1 14 1 14 14 14 14 14 2 13 A12 13 12 A13 10 A13 A12 A13 11 1 13 A12 13 12 1 13 12 1 13 12 1 13 A12 AL3 A12 x A13 A12 A13 A12 A13 12 A13 All A13 A13 TAIO A8 10 10 9 11 A9 A8 IAQ 10 A11 DAS 7 A9 ALO 10 5 Ali All 1 11 AB 8 A8 oe oo 0000 00FF 0 00 10 1000 1DFF IDOU IDEF 1 00 1 20002 2800 5FFF 6000 8000 ae State machine MACHINE WAIT STATE CLOCK CLEAR STATES HOLD 2 HOLD 3 HOLD 4 HOLD 5 HOLD 6 HOLD 7 REMOVE HOLD ASYNC START HOLD 2 HOLD 3 HOLD 4 HOLD 5 HOLD 6 HOLD 7 REMOVE HOLD ENDS CLOCKOUT RESET SB2 581 580 ASYNC START 0 0 l IF WAIT 1 amp IF WAIT 2 ASSERT IF WAIT 3 REMOVE HOLD ASSERT IF WAIT 4 REMOVE HOLD ASSERT IF WAIT 5 REMOVE HOLD ASSERT IF
6. 38 WORD Commands 39 DWORD Commands 2 2 40 REAL Commands 2 itio A STACK Commands 42 STRING COImmalus ies tti ci pug o Eon p ua 42 Processor Variables 43 ASSEMBLY AND 44 Single Line Assembly Commands enses 44 Disassembly Commands p 45 SYMBOL OPERATIONS 46 BISM E E EET A 47 RISM Variables IUE NM 47 RISM SUG NET 48 Receiving Data from the Host 48 Sending Data to the Host bris ADEM E 48 RISM Commands 49 Schematics and Parts 91 dee tare b ain bia uis Appendix A Specific iRISM Information EON Appendix B Listing 5 196 TIANA AAV SIS vice E Appendix D Programmable Logic Equations Appendix E Standard Connector eene Appendix F Sample Session Appendix G
7. 16 BUSWIDTH QV gt put processor 8 bit mode or PIN 17 state bit 0 wait state counter bit 0 52 PIN 18 state bit 1 wait state counter bit 1 j PIN 19 WAIT OV gt hold MCS96 in wait state PIN 20 state bit 2 wait state counter bit 2 ui PIN 21 1 QV gt enable Ul and U8 memory 22 1 0V enable 06 013 memory 23 5V map ram as romsim Declarations and Intermediate Variable Definitions FIELD memaddr 15 8 H amp memaddr 2000 27FF 1 memaddr 0 FF memaddr 1D00 1DFF eprom ram 4 memaddr 2000 27FF memaddr 2800 5FFF eeprom memaddr 6000 7FFF uart memaddr 1E00 1EFF opent memaddr 100 1CFE memaddr C000 FFFF openi memaddr 8000 BFFF bw eeprom uart wait 1 wait 2 wait 3 wait 4 wait 5 wait 6 wait 7 FIELD SDEFINE SDEFINE SDEFINE SDEFINE SDEFINE SDEFINE SDEFINE SDEFINE STALE amp HLDA wait 2 eprom openl STALE amp HLDA wait 3 uart wait 4 wait 5 wait 6 wait 7 5 0 state count state bit 0 2 async start b 000 hola 2 94 hold be OL hold 4 D III hold hold 6 p 100 hold DUI remove hold DDIO Wait State Machine SEQUENCE state count PRESENT async start LE PRESENT PRESENT IE IE wait 1 wait 1 wait
8. Program Execution These commands start and stop execution of user code The commands provided are GO GO FOREVER GO FROM code GO FROM code FOREVER GO FROM code addr TILL code ME GO FROM code TILL code OR code GO TILL code GO S code OR code HAL If a GO with breakpoint command is entered the user code bytes at the breakpoints will be saved and TRAPs will be installed When breakpoint is reached the user s software will stop before the instruction which caused the breakpoint and the iECM 96 software will restore the original user code Note that this is different from the operation of iSBE 96 and most ICE modules which stop just affer the instruction executes A problem associated with stopping before the break instruction executes is that subsequent GO commands may run into the breakpoint before any user code is executed The iECM 96 avoids this problem by skipping the setting of any break points set on the instruction that the current PC points to If this happens to remove the last breakpoint set then you will be warned but the GO will still execute with no breakpoints enabled IF this happens you can use the HALT command to stop the program 34 EV80C196KB Microcontroller Evaluation Board User s Manual None of the GO commands can be executed while the user s code is already run ning the HA
9. ee d D auum dux dans de GAP Uu pa des danh qe 3 8 aue um uum auus cuu M GP dA Pub un Pu m until the next RESET occurs or SET BIT RISM STAT USER MAP ldb ioportl reintialize ioportl ld sp 100H clear stack br user setup eject MCS 96 MACRO ASSEMBLER 96 01 24 89 13 55 41 11 ERR LOC OBJECT LINE SOURCE STATEMENT 2 79 380 l his code places the board in diagnostics mode until the next RESET 381 RISM STAT gets altered somehow The user s is loaded with the 382 address of the memory test and a 55 pattern flashes on the 383 ioportl LEDs while the monitor is waiting for a command 384 385 386 set diag 387 SET BIT RISM STAT DIAGNOSTIC FLAG A110 A1000118 389 ld sp 8100 clear stack 114 A1000036 390 ld tempw rism psw value for rism and initial user value 118 C03C36 391 st tempw dUSER PSW Store rism psw as initial user psw 292 11 A1002236 393 la tempw mem tst offset Set up user pc 11 6 394 st tempw dUSER PC 395 122 396 diag pause A122 B1550F 397 ldb ioportl 55h A125 398 diag pause loop A125 3516FD 399 bbc 1081 5 5 wait for a timerl overflow A128 3516FD 400 bbc ios
10. Dornacher Strasse 1 85622 Feldkirchen Muenchen HONG KONG Intel Semiconductor Ltd 32 F Two Pacific Place 88 Queensway Central CANADA Intel Semiconductor of Canada Ltd 190 Attwell Drive Suite 500 Rexdale Ontario M9W 6H8 Intel embedded architectures and flash memory are supported by an array of development tools solutions Use the World Wide Web FaxBack Literature Centers and Intel Hotline for comprehensive tools information Printed in USA 297 100 IL HS
11. T BERGE 168 ohm SIP Ris 168 voc C LEGUI 41 01 i erg e ALE BREGE 517 22523 gt Nas lt Naa mei 3 3825 Jn gt gt Se S 2 21 75 lt 5124 00 03 NER 24 4 lt 245 el 64 4 0 N R2 8 4 74 2 gt 24 8 2 ORS S o HEB A IDA lt 2 19 3 1 Pp ap CSYALE STALE 15 A STRECHED ALE PULSE FOR THE WAIT STATE GENERATOR f 74RC74 5 voc 17 1M 0158 289 CLK 4 74 11 2 CERE SA EV8 C 1 96KB ECO Appl lcetians Engineering Title 800180 6 Evaluation Board Number CPU Section 2 12 R14 WE VCC A137 VCC 1 13 2 14 R13 CE2 VCC Q14 WE VCC R14 WE VCC 14 GUSWIDTH Applications Engineering Title BOCiS6KB Evaluation Board Document Number Memory Array end PAL Decoder DB9 F 1 anato CLK D4 TR OUTE DS ICLK OUT1 5 CLK Xi1 36 298811 16 432 ur gt 38pF DB9 Fe
12. placing the data byte in the lower byte of the RISM DATA register The data shifted out of the upper byte of the RISM DATA register is discarded Sending Data to the Host When the host expects data to be returned from the RISM it sends a TRANSMIT command byte and waits for a response The RISM transmits the lower byte of the 32 bit RISM DATA register and right shifts the RISM DATA register right by eight bits As part of this command the RISM increments its ADDR register The RISM only transmits data in response to an TRANSMIT command never on its own initiative or even in response to other commands from the host EV80C196KB Microcontroller Evaluation Board User s Manual 49 RISM Commands This section will detail the operation of each of the commands sent to the RISM SET DLE FLAG Code This command sets the DLE FLAG This will force the next character received by the RISM to be treated as data even if its value corresponds to a RISM command The code which overrides the normal selection of command or data also clears the DLE FLAG so that it applies only to the first character received after the SET DLE FLAG command TRANSMIT Code 02H This command will transmit the lower bits of the RISM DATA register to the host right shift the data register eight places and increment the RISM ADDR regis ter Sequential TRANSMIT commands are used to read the RISM DATA register and the RISM_ADDR ASME indicates the
13. 204 205 206 207 SOURCE STATEMENT 01 24 89 13 55 41 PAGE These registers MUST be reserved for the RISM ee lt lt M eee uM 848 RISM DATA dsl 1 The RISM data register RISM ADDR dsw 1 The RISM address register tempw dsw 1 Temp for use by monitor tempb equ tempw byte char equ tempw byte RISM STAT dsb 1 Contains rism state flags DEFINE BIT DLE FLAG O DEFINE BIT RUN FLAG 2 DEFINE BIT TRAP 1 USER MAP 3 DEFINE BIT DIAGNOSTIC FLAG 7 These variables are used the monitor when diagnotic mode only 4 dUSER dUSER PSW dsw dsw dseg at 2020H epu Aie Pues These variables are used in USER USER PSW eject dsw dsw ee 0308 ee re ee ee dm A a d o 9 8 1 1 Saves user s pc during halt Saves user s psw during halt the normal non diagnostic mode
14. A o 1 1 Saves user s pc during halt Saves user s psw during halt MCS 96 MACRO ASSEMBLER LOC OBJECT i UO LEOO 1 01 1 01 1 02 1 03 1 04 1 05 1 06 1 07 1 00 1 04 96 e 14 411 212 213 214 215 216 217 218 219 220 221 222 223 224 225 226 227 228 229 230 231 232 233 234 235 236 237 238 239 240 241 242 243 244 245 246 247 248 249 250 251 252 253 01 24 89 13 55 41 7 SOURCE STATEMENT he serial channel is provided by an external 82510 UART which uses the NMI as an interrupt to the processor The addresses associated with this device are defined below dseg at 1 8 2 uart dsb 100H txd rxd equ uart byte bankO if dlab 0 or bankl baud a lo equ uart byte bankO if dlab 1 baud a hi equ uart l byte bankO if dlab 1 gener enabl equ vart l byte bankO if dlab 0 general int equ uartt2 byte 0 line config equ uart 3 byte modem contr equ uart 4 byte line status equ uartt5 byte modem stats equ uartt6 byte bankO addr contr equ uartt byte clock confg equ uart byte bank3 io mode equ uart 4 byte bank3 The memory map of the boar
15. Addr Data 4 Addr Data 4 Addr Data 5 Addr Data 6 Addr Data 7 VSS WR 4 N C TP5 RD INTO P3 2 PSEN N C 12VDC VSS Pin 51 of the EV80C196KB will connected to U12 20 on future revisions of this board Appendix Sample Session This list file was produced by using the command list demo lst before invoking demo log with the command include demo log as described below This list file can be used to compare to the screen of your own while you are running demo log List file opened on 01 24 1989 at 16 43 15 include demo log INCLUDE FILE OPEN This is a demo of some of the features of iECM 96 for use with the EV80C196KB board In order to run the demo place the software disk in f drive select that drive by typing A or whichever sponds to that drive and a carriage return Type ECM96 and carriage re At the asterisk prompt type INCLUDE DEMO LOG and carriage return For additional information please see the EV80C196KB Microcontroller Evaluation Board USER S MANUAL pause Hit the space bar to continue This command loads 96KBDEMO OBJ from disk load 96kbdemo obj mod name is DFMO96KB mod date stamp is 01 24 89 16 34 47 pause Hit the space bar to continue dasm 2080 8 This disassembles 8 lines of code starting at 2080H RESE
16. This command single steps count times STEP S8 FROM code gt This command loads the user s pc PC with code and then one time STEP SS FROM code lt count gt This command loads user s pc PC with code and then single steps count times EV80C196KB Microcontroller Evaluation Board User s Manual 37 DISPLAYING AND MODIFYING PROGRAM VARIABLES iECM 96 provides commands to display and modify program variables in several formats In addition to simple variables such as bytes and words more complicated variables such as reals and character strings are supported iECM 96 commands allow variables to be displayed or initialized either individually or as regions of mem ory which contain variables of the given type Supported Data Types BYTE A BYTE is an eight bit variable No alignment rules are enforced for BYTE variables CHAR A CHAR is a special case of a BYTE CHAR variables are displayed as ASCII char acters WORD m A WORD is a 16 bit variable The address of a WORD is the address of its least significant byte A WORD must start at an even byte address DWORD A DWORD is a 32 bit variable The address of a DWORD is the address of its least significant byte DWORD must always start at an even byte address If a DWORD variable is to be accessed as a register by an 8096 instruction then a more restric tive alig
17. are special cases of RISM commands used when the board is in diagnostics mode dSTART USER Flush the pause routine off the stack and set up user s context SET RISM STAT RUN FLAG CLR BIT RISM STAT TRAP FLAG stb RISM STAT modem contr O0 update running signal to host add sp 4 reset sp to overwrite RISM pc amp push dUSER PC with user pc amp push dUSER PSW user psw values EXIT RISM dSTOP USER Stops user execution by setting up the stack to return to pause with all interrupts but serial i o locked out pop dUSER PSW remove users psw amp pc from stack pop dUSER PC and save dset rism idle push diag pause offset the new program counter 6 psw push rism_psw CLR_BIT RISM STAT RUN_FLAG stb RISM STAT modem contr 0 update running signal to host EXIT RISM MCS 96 MACRO ASSEMBLER EV96 01 24 89 13 55 41 PAGE 15 ERR LOC OBJECT LINE SOURCE STATEMENT 490 1 1 491 PC 492 pose ees 493 user pc RISM DATA Assumes user code is not running 494 1 1 03 30 495 st RISM DATA dUSER PC 496 EXIT RISM 499 500 1 6 501 dREAD 502 poter 503 RISM DATA user pc 504 1 6 3A3805 505 bbs RISM STAT RUN FLAG drpc running 1 9 A03A30 506 ld RISM DATA dUSER PC If user code is not running 507 EXIT RISM AlAE 510 drpc running AlAE A3180230 511 ld RISM DATA 2 sp If user code is running 512 EXIT RISM 515 516 Seje
18. 148 149 SOURCE STATEMENT ENTER RISM EXIT RISM SEND DATA BYTE BYTE PROTECT WORD PROTECT DWORD PROTECT eject macro pushf endm macro popf ret endm macro stb endm macro endm macro endm macro endm 01 24 89 13 55 41 PAGE RISM DATA txd rxd 0 No special protection No special protection No special protection 4 MCS 96 MACRO ASSEMBLER ERR LOC OBJECT 001C 001C 001C 001D 001 0020 0022 EV96 LINE 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 SOURCE STATEMENT 01 24 89 13 55 41 PAGE These registers are used oniy by the diagnostic routines They are not required for normal execution ax al ah dx bx Seject rseg at equ equ ich dsw 1 ax byte axt1 byte dsw 1 1 dsw 1 A 228 ee ine 4 map quam 5 MCS ERR 96 MACRO ASSEMBLER EV96 LOC OBJECT 0030 0030 0034 0036 0036 0036 0038 003A 003C 2020 2020 2022 LINE i 66 16 168 169 170 171 172 173 174 175 176 177 178 179 180 181 183 185 187 189 191 192 193 194 195 196 197 198 199 200 201 202 203
19. 41 BREQ Output 43 ALE Output 45 NMI Input 47 RESET Output 49 No Connection 51 HLD4A Output 53 AQVDG e 55 VSS 57 M e REESE 59 4 00 Bi directional 6 D1 Bi directional 8 D2 Bi directional 10 D3 Bi directional 12 D4 Bi directional 14 D5 Bi directional 16 D6 Bi directional 18 D7 Bi directional 20 Vss 22 D8 Bi directional 24 D9 Bi directional 26 010 Bi directioal 28 D11 Bi directional 30 012 Bi directional 32 D13 Bi directional 34 D14 Bi directional 36 D15 Bi directional 38 Vss 40 Vss 42 Output 44 BHE Output 46 UserReady Input 48 INST Output _ 50 P2 2 EXINT Bi directional 52 Connection 54 HOLD Input 56 12VDC 58 Vss 60 Vcc 0 npa ET Dg Lj t3 00 ETE 0 0 0 Ej OO OO OO Figure 9 JP4 Power Supply Connector 4 Pin MOLEX 26 03 3041 or Equiv Flag DI D 12VDC 22 12 Figure 10 L Ground VSS 5VDC VCC 20 80 196 Microcontroller Evaluation Board User s Manual Shield Ground TXD To host PC Note Signal mneumonics are reference to the host Figure 11 25 pin to 9 pin Adapter EV80C196KB Microcontroller Evaluation Board User s Manual 21 INTRODUCTION TO iRISM iECM SOFT
20. 605 606 607 608 609 610 611 612 613 614 615 616 617 618 619 620 621 622 623 624 625 626 627 01 24 89 13 55 41 18 SOURCE STATEMENT cseg at offset 2200H This is RAM test for the EV80C196KB board its shipped configuration The RAM from 2000H to 27FFH is not mapped during diagnostics and therefore is not tested The test alternates between incrementing and decrementing the test data on even and odd cycles of the test so that a nonrepetitive pattern is produced in memory ldb iocl 01 enable PWM clr ax clear data register cir CX clear error register clr dx clear test count register clrb ioport1 ld bx 2800H starting address of RAM in diag mode loop stb al bx save test data cmpb al bx check if it is saved and point to next byte bne failed if not test failed bbc dx 0 here check if test count is even or odd decb al if it is odd decrement test data br around here incb al if it is even increment test data around cmp bx 8000 has end of RAM been reached by pointer bne loop is not continue ld bx 2800H else return pointer to starting address inc dx count the test as successful incb ioportl show completion to user on LEDs ldb pwm control ioportl PWM LED gets brighter as ioportl value gets bigger br loop go back for another cycle failed ld cx error register br end test
21. 99701 Tel 907 4526264 ARIZONA Intel Corp 410 North 44th Street Suite 500 Phoenix 85008 Tel 602 2316386 FAX 602 2446446 Corp 500 E Fry Blvd Suite M 15 Sierra Vista 85635 Tel 602 459 5010 ARKANSAS Intel Corp c o Federal Express 1580 West Park Drive Little Rock 72204 CALIFORNIA Intel Corp 21515 Vanowen St Ste 116 Canoga Park 91303 Tel 816 704 8500 Corp 300 N Continental Bivd Intel Corp 1900 Prairie City Rd Folsom 95630 9597 Tel 916 3516143 2265 Dr Suite 325 Tel 16121 2928086 ntel Corp 400 N Tustin Avenue Suite 450 Santa Ana 92705 Tet 714 8359642 intel Corp 2700 San Tomas Exp tst Floor Santa 95051 Tet 408 970 1747 COLORADO Intel Corp 600 S Cherry 51 Suite 700 80222 Denver Tel 303 321 8086 ARIZONA 2402 w Beardsley Road Phoenix 85027 Tet 602 1X0 466 3548 MINNESOTA 3500 W 80th Street Suite 360 Bloomi 55431 Tel 812 835 6722 locations locations NORTH AMERICAN SERVICE OFFICES CONNECTICUT oe 301 Lee amp m Corporate Park 83 Wooster Heights Rd Danbury 08611 Tel 203 748 3130 FLORIDA ntel Corp 800 Fairway Suite 160 Deerfield Beach 33441 Tel 305 4218506 FAX 305 421 2444 Corp 5850 T G Lee Blvd Ste 340 Orlando 32822 Tel 407 240
22. Board User s Manual HARDWARE OVERVIEW OF THE EV80C196KB BOARD The EV80C196KB Microcontroller Evaluation board is delivered with an 80C196KB 8 K words and 8 K bytes of user code data memory a UART for host communica tions and analog input filtering with a precision voltage reference Also included is programmable chip select bus width and wait state counter logic which allows you to custom tailor the board to look like your own system The board s physical dimen sions are 6 1 2 x 7 3 4 with an overall height of 3 4 There are six main sections to the EV80C196KB board Processor Memory Host Interface Digital I O Analog Inputs and Decoding RS 232 BUFFERS P2 ANALOG INPUT 82510 ces DIGITAL I O DIGITALUO 2 ll cnl m Figure 2 Processor The Intel 80 196 is a 16 bit embedded microcontroller Being a member of the 5 96 family the 80C196KB uses the same powerful instruction set and the same architecture as the existing MCS 96 products The 80C196KB is an enhanced CMOS version of the 8097BH Its enhancements include up down and capture modes on Timer2 multiplying speeds almost 3 times as fast overall execution nearly twice as fast Hold Hold Acknowledge logic and power down and idle modes to save power For more information please refer to the 1989 16 Bit Embedded Controller Handbook intel Corporation order number 270646 001 and the 80C196KB Datasheet orde
23. Carrier Detect DTR P1 pin 4 Pin Host RS 232 Connection on Nos Signal Name Evaluation Board 6 CC DSR Data Set Ready DTR P1 pin 4 7 CA RTS Request To Send CTS P1 pin 8 8 CB CTS Clear To Send RTS P1 pin 7 9 CE Ri Ring Indicator Run Indicator Figure 5 P2 Serial Port Connector 95 RS232 Host RS 232 Connection Signal Name Evaluation Board i ee ve med SG Signal Ground Digital Ground Se Bsa Ss eg DTR Data Terminal Ready INIT thru E20 A TxD Transmit Data RxD of 80C196KB AUT RxD Receive Data TxD of 80C196KB DCD Data Carrier Detect DTR 2 4 Host RS 232 Connection on Signal Name Evaluation Board 6 CC DSR Data Set Ready DTR P2 pin 4 7 CA RTS Request To Send CTS P2 pin 8 8 CB CTS Clear To Send RTS 2 7 9 CE RI Ring Indicator No connection Figure 6 18 EV80C196KB Microcontroller Evaluation Board User s Manual JP1 Analog Input Connector 2x13 Pin MOLEX 39 51 2604 or Equiv ANGND 1 VREF 3 ANGND 5 ANGND 7 VREF 9 ANGND 11 ANGND 13 VREF 15 ANGND 17 ANGND 19 VREF 21 ANGND 23 VREF 25 D n L 0000000800900 2 Analog Channel 0 4 VREF 6 Analog Channel 1 8 Analog Channel 2 10 VREF 12 Analog Channel 14 Analog Channel 4 16 VREF 18 Analog Channel 5 20 Analog Channel 6 22 VREF 24 Analog Channel 7 26 ANGND Figure 7
24. If the target is stopped the command prompt will be an asterisk If the target is already running the prompt will be a greater than sign gt DIAG CTS or DSR are not present iECM 96 will complain about it and ask if you want to proceed or exit It is possible but not likely that IECM 96 will operate properly even after complaining It is more likely that there is a problem with the serial port or the cabling which will prevent proper operation If the problem is not obvious e g disconnected cable or no power to the target hardware then the DIAG invocation option can be used to help isolate the problem The DIAG option puts the 96 system in a special mode which allows many tests to be used to find interfacing problems or target bugs The diagnostic mode is intended to support debugging of boards which use the iECM 96 It can be particularly useful in systems which have multiple address decoding modes such as the EV80C196KB Upon reset this board has EPROM at location 2080H the address where the 80C196KB starts execution After executing some initialization code the board can change the address decoding so that ROMsim RAM is available in the partition which contains 2080H and the RISM is relocated to another area This allows you to download code which is designed to operate in the on chip ROM of MCS 96 family parts 2000H 3FFFH The diagnos tic mode allows the use of diagnostic routines which disappear from
25. Intel Corporation Literature Sales P O Box 7641 Mt Prospect IL 60056 7641 CONTENTS SECTION Description PAGE INTRODUC TON 9 GETTING STARTED WITH THE EV80C1 96KB S TR 9 Powering 9 lO VOUF ae e Ue eI 9 Starting the Host Software 9 HARDWARE OVERVIEW OF THE EV80C196KB BOARD 10 Block Diagram of the EV80C196KB 10 PCRS SOU 10 MOTTO V eaters TERT EOS 10 Host Interface oec es mo hbro os 11 Wie M 11 ERE 11 Decoding EORR 12 Configuration Jumper Locations Figure 14 Memory Configuration Jumper Locations Figure 3b 15 Expansion Ports Connectors and LEDs Locations Figure 4 16 Host Serial Connector Figure 5 17 80C196KB Serial Port Connector Figure 6 17 Analog Input Connector Figure 7 18 I O Expansion Connector Figure 8 18 Expansion Connector Figure 9 19 Power Supp
26. LEDs on board along with buffer drivers which allow you to quickly observe the state of Port 1 HSO 0 and Port 2 5 PWM see figure 4 or the schematics in appendix A for loca tion The TxD and RxD pins of the 80C196KB Port 2 0 and Port 2 1 are con nected to RS 232 buffer drivers which are connected to P2 All of the 1 signals are available on JP2 see figure 8 or the schematics in appendix A for pinout Note because RxD is connected to an RS 232 receiver U19 pin 3 any attempt to use it as a digital input will result in a contention If you would like to use it as a digital input remove jumper shunt E19 to disconnect the receiver Analog inputs The Port 0 inputs of the 80C196KB double as both digital and analog inputs The EV80C196KB board includes circuitry to make the analog inputs easier to use precision voltage source for Vref is provided on board U3 and U4 which can be carefully adjusted by trimming RP1 Also jumper shunt E4 allows Vref to be con nected to Vcc instead of the output of U3 By removing E4 entirely an off board reference can be connected to JP1 By removing jumper shunt E2 ANGND can be isolated from Vss Protective clamping diodes are installed on each channel RC networks are provided in sockets to ailow you to change the input impedance to match your application on all of the analog input channels If Port 0 is to be used 12 80 196 Microcontroller Evaluation Board User s Manual as a digit
27. South Industrial Park P O Box 910 Las Piedras 00671 Tel 609 7338816 TEXAS Intel Corp Westech 360 Suite 4230 8911 N Capitol of Texas Hwy Austin 78752 1239 Tel 512 794 8086 Corp 12000 Ford 401 Dallas 75234 214 2418087 intel Corp 7322 SW Freeway Suite 1490 Houston 77074 Tel 713 9888066 UTAH Intel Corp 428 East 6400 South Suite 104 Murray 84107 Tel 801 263 8051 FAX 801 268 1457 VIRGINIA Intei Corp 9030 Stony Point Pkwy Suite 360 Richmond 23235 Tel 804 330 9393 WASHINGTON Intel Corp 155 106th Avenue N E Ste 386 Bellevue 98094 Tel 206 4538086 CANADA ONTARIO Intel Semiconductor of Canada Ltd 2650 Queensview Dr Ste 250 Ottawa 2 8H6 Tel 613 6299714 intel Semiconductor Of Canada Ltd 190 Attwell Dr Ste 102 Rexdale Toronto M9W 6H8 Tel 416 675 21 QUEBEC Intei Semiconductor of Canada Ltd 1 Rue Holiiay Suite 115 Tour East Pt Claire H9R 5 Tel 514 694 9130 FAX 514 694 0064 CG SALE 120291 UNITED STATES Intel Corporation 2200 Mission College Blvd P O Box 58119 Santa Clara 95052 8119 JAPAN Intel Japan 5 6 Tokodai Tsukuba shi Ibaraki ken 300 26 FRANCE Intel Corporation S A R L 1 Quai de Grenelle 75015 Paris UNITED KINGDOM Intel Corporation U K Ltd Pipers Way Swindon Wiltshire England SN3 1RJ GERMANY Intel GmbH
28. address that corresponds to the least significant byte in the RISM_DATA register READ BYTE Code 04H This command will read the byte of memory pointed to by the RISM_ADDR register and place the result in the least significant byte of the RISM_DATA register READ_WORD Code 05H This command will read the word of memory pointed to by the RISM_ADDR and place the result in the least significant word of the RISM DATA register READ DOUBLE Code 06H This command will read the double word of memory pointed to by the register and place the result in the RISM DATA register WRITE BYTE Code 07H This command stores the least significant byte of the RISM DATA register in the byte of memory pointed to by the RISM ADDR register and increments the RISM ADDR register by one to point at the next memory WRITE WORD Code 08H This command stores the least significant word of the RISM DATA register in the word of memory pointed to by the RISM ADDR register and increments the RISM ADDR register by two to point at the next memory word WRITE DOUBLE Code 09H This command stores the RISM DATA register in the double word of memory pointed to by the ADDR register and increments the RISM ADDR register by four to point at the next memory double word LOAD ADDRESS Code This command loads the RISM ADDR register with the least significant word in the RISM DATA register INDIRECT ADD
29. can be terminated by entering a carriage return 46 EV80C196KB Microcontroller Evaluation Board User s Manual SYMBOL OPERATIONS iECM 96 supports several commands dealing with symbolic information that can be loaded along with object code The commands are SYMBOLS SYMBOLS OFF SYMBOLS ON FLUSH An additional command LOADSYM lt filename gt can be used to load iECM 96 s symbol table without affecting the target s memory This command is described in the section File Operations SYMBOLS This command displays the symbols that are currently in iECM 96 s symbol table SYMBOLS OFF This command suppresses searching the symbol table during output It does not prevent the use of the symbol table during input This command is provided be cause symbolic output with large symbol tables can be very slow SYMBOLS ON This command reenables symbolic output FLUSH This command deletes all the symbols currently in the symbol table EV80C196KB Microcontroller Evaluation Board User s Manual 47 RISM This section will describe the elements of the RISM which will be common to all Additional documentation of this implementation is in appendices B and C RISM Variables RISM DATA m RISM DATA is a 32 bit register which acts as the primary data interface between software running in the host and the RISM running in the target RISM ADDR RISM ADDR is a 16 bit register which contains th
30. designed to be a software evaluation tool for the ROMless 80C196KB 16 bit microcontroller As such ports 3 and 4 are not available for use as ports unless offboard latches buffers and decoding logic are used All unre served functions of the 80C196KB are available to you except for the Non Maskable Interrupt NMI the TRAP instruction and 512 bytes of address space The Chip Configuration Byte is also used by the monitor but most of its functions are provided by external logic Reserved Functions The pin is reserved for use by the Host Interface order for the Host Inter face to function properly jumper shunt E7 must be installed from B C However if your application demands the use of NMI available on JP3 you can alter the RISM source file G6KBRISM A96 included on your disk to use EXTINT instead of NMI and change jumper shunt E7 to A B The TRAP instruction is reserved On the EV80C196KB jumper shunt E20 must be installed from B to C for the RESET SYSTEM command to work properly If you wish to run code in the board while it is not connected to a host you should remove jumper shunt E20 prior to disconnecting the board the host If E20 is left installed the board may reset as the connec tion is broken Reserved Memory User ROMsim as shipped is 24K bytes from address 2000H to 7FFFH The board is reconfigurable to accept various memory devices However breakpoints and pro gram stepping will no
31. displayed in hexadecimal or breakpoint numbers which are displayed in decimal The default base is also used to enter numbers into the command parser but it is possible to override the default base during input by adding a character at the end of the num ber which forces the appropriate base to be used The override characters are H or h for hexadecimal T or t for decimal and O or o for octal The override charac ter must appear immediately following the last digit of the number with no interven ing space BASE This command will display the current default base BASE valid base This command will set the current default base to valid When entering this command it is advisable to use an override character to select the new default base BASE 100 selects octal BASE 10T selects decimal BASE 10H selects hexadecimal This avoids confusion when changing bases As an example of the confusion which is avoided consider the following commands entered while the base is hexadecimal The command BASE 10 will leave the default base as hexadecimal and the command BASE 16 will result in an error because 16H 22T is not a valid base The command BASE 0A will select decimal as the default base but it is cleaner and to use the over ride character BASE 10T This works independently of the current default base and leaves a useful record in log or list files which may be open EV80C196KB Microcont
32. file in the append mode so that recording can start again LISTON also stamps the list file with the current date and time from the system clock LOGOFF and LOGON The LOGOFF closes a log file that has been specified by the LOG command This stops new list information from being recorded The LOGON re opens the log file in the append mode so that recording can start again LOGON also stamps the list file with the current date and time from the system clock 32 80 196 Microcontroller Evaluation Board User s Manual PROGRAM CONTROL Commands which control program execution allow you to reset the processor set execution breakpoints start execution stop execution step and super step The commands will be grouped by their major function for the sake of discussion Resetting the Target The processor can be reset by executing the iECM 96 command RESET CHIP This command physically resets the processor by setting the RISM DATA register to OXXXX0001 and issuing a MONITOR ESC RISM command which will cause the target to perform a RST instruction Breakpoints iECM 96 provides sixteen program execution breakpoints If a given breakpoint is inactive it is set to zero if it is active then it is set to the address of the first byte of an instruction Breakpoints set to addresses which are not the first byte of an instruction will cause unpredictable errors in the execution of the user s code When execution is started iECM 96 s
33. following are trademarks of Intel Corporation and its affiliates and may be used only to identify Intel products 376 Above ActionMedia BITBUS Code Builder DeskWare Digital Studio DVI EtherExpress ExCA FaxBACK Grand Challenge i i287 1386 1387 1486 1487 i750 1860 1960 ICE iLBX Inboard Intel Intel287 Intel386 Intel387 Intel486 Intel487 intel inside Intellec iRMX iSBC iSBX iWarp LANprint LANSelect LANShell LANSight LANSpace LANSpool MAPNET Matched MCS Media Mail NetPort NetSentry OpenNET Paragon PRO750 ProSolver READY LAN Reference Point RMX BO SatisFAXtion Snapln 386 Storage Broker SugarCube The Computer Inside TokenExpress Visual Edge and WYPIWYF and the combinations of ICE iCS iSBC iSBX iSXM MCS UPI and a numerical suffix MDS is an ordering code only and is not used as a product name or trademark MDS is a registered trademark of Mohawk Data Sciences Corportation CHMOS and HMOS are patented processes of Intel Corp Intel Corporation and Intel s FASTPATH are not affiliated with Kinetics a division of Excelan or its FASTPATH trademark or products IBM is a registered trademark and AT is a trademark of International Business Machines Inc Microsoft MS MS DOS and are registered trademarks and Multiplan is a trademark of Microsoft Corporation Addional copies of this manual or other Intel Literature may be obtained from
34. it operates somewhat like a STOP USER instruction ENTER RISM SET BIT RISM STAT TRAP FLAG bbs RISM STAT DIAGNOSTIC FLAG dSTOP user STOP USER Stops user execution by setting up the stack to return to pause with all interrupts but serial i o locked out USER PSW remove users psw amp pc from stack pop USER PC and save set rism idle push monitor pause offset the new program counter 8 psw push rism psw CLR BIT RISM STAT RUN FLAG stb RISM STAT modem contr 0 update running signal to host EXIT RISM Seject MCS 96 MACRO ASSEMBLER ERR LOC OBJECT 9D5E 905 9060 9062 9064 9066 9068 9D6A 9D6C 9D6E 9D70 9072 9074 9076 9078 9D7A 9 7 9 7 9 80 9082 9084 9086 9088 3000 1300 4200 1300 5700 5 00 6100 6 00 6 7400 7 00 8100 9000 00 B300 BAOO 8 00 8600 2210 4510 C000 4 00 96 135 36 137 738 739 740 741 742 743 744 745 746 747 748 749 750 751 752 753 754 755 756 757 158 759 760 761 762 SOURCE STATEMENT command table 48 m eject dcw dcw dcw dcw dcw dcw dcw dcw dcw dcw dcw dcw dcw dcw dcw dew dcw dcw dcw SET DLE FLAG exit TRANSMIT exit READ BYTE READ WORD READ DOUBLE WRITE BYTE WRITE WORD WRITE DOUBLE LOAD ADDRESS INDIRECT ADDRESS READ PSW WRITE PSW READ SP WRITE SP READ PC WRITE
35. memory space 26 EV80C196KB Microcontroller Evaluation Board User s Manual when the RAM is mapped into the system It also provides a simple routine to check the communications interface between the host and the target In the EV80C196KB board there is a serial port loop back mode which allows de bugging the host board interface Upon reset the board is in the echo mode Until it receives an slash or reverse slash it will increment every character it receives from the host and send the incremented value back to the host It will also display the binary code of the character the board received on the Port 1 LED s reverse slash is received by the RISM it will leave the echo mode set USER MAP flag true remap memory and start normal operation slash is received it will stop echoing incremented received data and start responding to RISM commands with the diagnostic flag set In this mode there are diagnostic routines resident EPROM which are useful for debugging the board Initially after invoking the diag nostic mode the Program Counter points to the beginning of a RAM test at 2200H See the source code listing in appendix C for further details Note The target hardware will have to be reset before using the DIAG com mand option Note When executing diagnostic routines from EPROM certain commands such as and Stepping will not work as they need to modify the code to work properly When the
36. o LL lt gt N 5 omo 2 er ul Memory Configuration Jumper Locations EV80C196KB Microcontroller Evaluation Board User s Manual 16 DP1 LED Array 0 YT oc v7 XJ OTM 00 5 PWM 0st P2 HSO 0 ion Connector JP2 input Output Expans ion Connector Y 0 Q X JP3 VASOS N N N N N iN ON VERA D TNR ea E ANM Ve NERS REA JP1 Analog Input Connector P1 82510 External UART Port JP4 Power Connector P2 80C196KB Internal UART Port Figure 4 Expansion Ports Connectors and LEDs EV80C196KB Microcontroller Evaluation Board User s Manual 17 P1 Host Serial Connector DB 9S RS232 Host RS 232 Connection on Signal Name Evaluation Board 5 SG Signal Ground Digital Ground DTR Data Terminal Ready INIT thru E20 C ee 3 BA TxD Transmit Data RxD of 82510 2 RxD Receive Data TxD of 82510 1 DCD Data
37. square brackets in the latter two commands are of the command syntax and must be entered by the user the angle brackets are part of the meta language used to describe the syntax Breakpoints can be displayed while your code is run ning but they cannot be modified EV80C196KB Microcontroller Evaluation Board User s Manual 33 NOTE BR 0 and BR 1 can also be set by the GO command by using the TILL clause all of the breakpoints will be cleared by the GO command if the FOR EVER clause is used BR This command will display all of the active breakpoints i e those not set to zero You will also be informed if no breakpoints are active BR number This command will display the setting of the selected breakpoint and for input from you If you enter a carriage return the command will terminate If you enter an ESC the next sequential breakpoint will be displayed If you enter a numeric value then the selected breakpoint will be loaded with the value and the iECM 96 will again wait for input At this point you can enter either a CARRIAGE RETURN or an ESC As before the ESC will cause the iECM 96 to display the next breakpoint and the CARRIAGE RETURN will terminate the command This command will wrap around from the last breakpoint 15t to the first breakpoint 0 lt bp_number gt lt code_addr gt This command sets the specific breakpoint specified by bp number to the value code
38. these registers to some other module 38 39 gt o9 0 U b ct 1 MCS 96 MACRO ASSEMBLER ERR LOC OBJECT 0000 0002 0002 0003 0003 0004 0004 0006 0006 0007 0008 0009 0011 0011 000A 000A 000C 000 000 000 0010 0015 0015 0016 0016 0017 0018 EV96 LINE 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 71 78 79 80 81 82 83 84 85 86 87 88 89 90 91 SOURCE STATEMENT 01 24 89 13 55 41 PAGE Define symbols for the register mapped I O locations zero ad command ad result lo ad result hi hsi mode hsi time hso time hsi status hso command sbuf int mask int pending spcon spstat watchdog timerl timer2 porto baud_reg ioportl ioport2 iocO 1050 1061 1081 control sp P DEFINE BIT SET BIT CLR BIT BL Seject equ equ equ equ equ equ equ equ equ equ equ equ equ equ equ equ equ equ equ equ equ equ equ equ equ equ equ macro name endm macro orb endm macro andb endm macro bne endm OOH 02H 02H 03H 03H 04H 04H 06H 06H 08H 09H 11H 11 OAH OCH 10H 15H 15H 16H 16H 17H 18H name bitnum equ bitnum regnum bitnum word byte byte byte byte word word byte byte byte byte byte byte byte byte wo
39. 000 1000036 674 14 tempw 41150 psw value for rism and initial user value 9D04 C301222036 675 st tempw USER PSW Store rism psw as initial user psw 676 9D09 A1802036 677 1 tempw 2080H Set up user 9DOD C301202036 678 st tempw USER PC 679 9012 1381036 680 14 tempw break offset 9D16 C301102036 681 st tempw trap offset 0 initialize trap vector 9D1B C3013E2000 682 st zero nmi offset 0 initialize nmi vector 683 9D20 684 monitor pause 9D20 27FE 685 br monitor pause wait for a command from the host 686 687 eject 5 96 MACRO ASSEMBLER ERR LOC 9D22 9028 9020 9031 9035 9D3B 9D3F 9045 9045 9049 9040 9040 9050 9056 OBJECT C701041E38 65040018 CB012020 CB012220 373803E74804 CF012220 CF012020 C9201D C90000 C701041E38 EV96 LINE 688 689 690 691 692 693 695 697 638 699 700 701 702 705 706 707 708 709 710 711 713 715 716 717 718 719 720 721 722 723 724 725 726 727 729 730 733 734 01 24 89 13 55 41 PAGE 21 SOURCE STATEMENT START USER Flush the pause routine off the stack SET_BIT RISM_ STAT RUN_FLAG CLR BIT RISM_STAT TRAP FLAG stb RISM STAT modem contr 0 update running signal to host add 4 reset sp to overwrite RISM 6 push USER PC with user pc amp push USER PSW user psw values EXIT RISM This routine is invoked by a TRAP instruction used for breakpointing
40. 00H dcw 4300H dcw 4400H dcw 4500H dcw 4600H dcw 4700H dcw break offset dcw 4800H 2018H dcb OFFH Enable no CCB modes 2030H dcw 4900H dcw 4AO00H dcw 4BOOH dcw 4 00 dcw 4DOOH dcw 4 dcw 4 rism isr offset 8 MCS 96 MACRO ASSEMBLER ERR LOC A080 A080 A080 A081 A085 A088 090 A093 A095 A098 AQ9D 5 AOAD 2 5 0 2 0 5 002 007 0 AODD AODE 2 OBJECT FA A1000118 3516FD 3516FD C301002000 3516FD 1138 B18036 C701031E36 B13C36 C701001E36 701011 00 10336 701031 36 16036 C701021E36 B15036 C701001E36 B17F36 701041 6 701021 00 10136 701011 6 1000036 C836 F3 1136 28F1 27FE 96 GINE 298 299 300 301 302 303 304 305 306 307 308 309 310 311 212 313 314 215 316 317 318 319 320 321 322 323 324 325 326 327 328 329 330 331 332 333 334 335 336 337 338 339 340 341 342 343 SOURCE STATEMENT reset_vector eject cseg at di ld bbc bbc st bbc clrb ldb stb ldb stb stb ldb stb ldb stb ldb stb ldb stb stb iab stb id push popf cirb call br offset 2080H sp 1008 iosl 5 1081 5 zero 2000H 1081 5 5 RISM STAT tempb 80 tempb line config 0 tempb
41. 1 should now be decrementing Note that not only is there an assembler it and all other memory modi fing gt commands can be used while the board is executing user code However use gt caution when modifing code while it is running the resulting code may gt cause errors due to variable length instructions gt gt pause Hit the space bar to continue gt gt halt dasm loop 9 LOOP 2095 COIEIC STB AL 1E 2098 1 1 AL 1 5 09B D7IC JNE FAILED HERE 209D 382204 JBS 22 00 BACK 2 171C INCB AL 20A2 2002 SJMP PAST 20 4 151 DECB AL PAST 20A6 8900801E BX 8000 20 7 9 JNE LOOP pause Hit the space bar to continue 7 from 2080 till 20a6 This go command sets breakpoint 0 20a6H pause Hit the space bar to continue o Code has stopped at the breakpoint Note that 20 6 has not executed yet PC PAST pause Hit the space bar to continue br This command displays all breakpoints 20 6 has been set BREAKPOINT 0 PAST pause Hit the space bar to continue 01 0 This command clears breakpoint 0 pause Hit the space bar to continue br can be shown 5 pause Hit the space bar to continue br 0f 220a6 This command sets brea
42. 13 3452727 NEW JERSEY Corp 300 Sylvan Avenue Englewood Cliffs 07632 Tel 201 567 0821 Intel Corp Lincroft Office C enter 125 Half Mile Road Red Bank 07701 Tel 908 747 2233 NEW MEXICO Intel Corp Rio Rancho 1 4100 Sara Road Al Rancho 87124 1025 near Albuquerque Tel 505 7000 NEW YORK Intel Corp 2950 Expressway Dr South Suite 130 islandia 11722 Tel 516 2313300 estage Business Center Suite 230 Fishkill 12524 Tel 914 8973860 Intel Corp 5858 East Molloy Road Syracuse 13211 Tel 315 4546576 NORTH CAROLINA Intel Corp 5800 Executive Center Drive Suite 105 Charlotte 28212 Tel 704 5888966 Intel Corp 5540 Centerview Dr Suite 215 Raleigh 27666 Tel 919 851 9537 OHIO Intel Corp 3401 Park Center Dr Ste 220 Dayton 45414 Tel 513 890 5350 intel Corp 25700 Science Park Dr Ste 100 Beachwood 44122 Tel 218 464 2736 OREGON intel Corp 15254 N W Greenbrier Pkwy Building B Beaverton 97008 Tel 503 645 8051 PENNSYLVANIA Tintel Corp 925 Harvest Suite 200 Blue Bell 19422 Tel 215 641 1000 1 800 468 3548 FAX 215 641 0785 Yintel Corp 400 Penn Center Blvd Ste 610 Pittsburgh 15235 Tel 412 8234970 Drive Intel Corp 1513 Cedar Cliff Dr Camp Hill 17011 Tel 717 761 0860 CENTERS SYSTEMS ENGINEERING OFFICES NEW YORK Tel 506 2313300 PUERTO RICO Intel Corp
43. 2 DEFAULT hoid 2 OUT WAIT IF wait 3 DEFAULT hold 3 OUT WAIT wait 4 DEFAULT WAIT 2 NEXT NEXT NEXT NEXT NEXT NEXT NEXT remove hold hold 2 async start hold 3 remove_hold hold 4 remove_hold PRESENT hold 4 OUT WAIT IF wait 5 DEFAULT PRESENT hold 5 OUT WAIT IF wait 6 DEFAULT PRESENT hold 6 OUT WAIT IF wait 7 DEFAULT PRESENT hold 7 OUT WAIT PRESENT remove hold Logic Equations MAP D memaddr 1000 1DFF amp MAP AR RESET MAP SP bens MAP OE state bit 0 AR RESET state bit 0 SP b 0 state bit 0 b 1 state bit 1 RESET state bit 1 SP b 0 state bit L OE 51 state bit 2 RESET State bit 2 SP b 0 state bit 2 0E b 1 CEO eprom ram CE2 eeprom uart BUSWIDTH bw STALE NEXT NEXT NEXT NEXT NEXT NEXT NEXT NEXT hoid 5 remove hold hold 6 remove hold hold 7 remove hold remove 1 async start Appendix F Standard Connector for EvalBoards General Purpose Memory Expansion Connector Compatiblity with Other Intel Evaluation Boards 2x30 Pin Molex 39 51 2604 or Equiv EV80C51FB VCC Addr 0 Addr 1 Addr 2 Addr 3 Addr 4 Addr 5 Addr 6 Addr 7 VSS Addr 8 Addr 9 Addr 10 Adar 11 Addr 12 Addr 13 Addr 14 Addr 15 VSS N C PSEN RD N C TP6 ALE N C TP7 RESET
44. 2000 Ford Road suite 400 Dallas 75234 Tel 214 241 8087 FAX 214 484 1180 Corp 7322 S W Freeway Suite 1490 Houston 77074 Tel 713 988 8086 TWX 91 O 881 2490 FAX 713 9663660 UTAH tinte Corp 426 East 6400 South Suite 104 Murray 84107 Tel 801 263 8051 FAX 801 266 1457 WASHINGTON tintet Corp 2800 156th Avenue S E Suite 105 Bellevue 98008 Tel 206 643 8086 FAX 206 746 4495 Intel Corp 408 N Mullan Road Suite 102 Spokane 99206 Tel 509 928 8086 FAX 509 926 9467 WISCONSIN Intel Corp 400 N Executive Dr Suite 401 Brookfield 53005 Tel 414 789 2733 CANADA BRITISH COLUMBIA Intel Semiconductor of Canada Ltd 4585 Canada Way Suite 202 Bumaby V5G 416 Tel 604 298 0387 FAX 604 298 8234 ONTARIO tintel Semiconductor of Canada Ltd 2650 Queensview Drive Suite 250 Ottawa K2B 8H6 Tel 613 829 9714 FAX 613 820 5936 tintel Semiconductor of Canada Ltd 190 Attwell Drive Suite 500 Rexdale M9W 6H8 Tel 416 675 2105 FAX 418 875 2438 QUEBEC tintei Semiconductor of Canada Ltd 1 Rue Holiday Suite 115 Tour East Pt Claire 5N3 Tel 514 694 9130 FAX 514 694 0064 CG SALE 021492 intel ALASKA Intel Corp c o TransAlaska Network 1515 Lore Rd Anchorage 99507 Tel 907 522 1776 Intel Corp c o TransAlaska Date Systems do Operations 520 Fifth Ave Suite 407 Fairbanks
45. 2015 gt enable 014 memory nBUSWIDTH016 0V gt put processor 8 bit mode 580817 8 wait state counter bit 0 SB1618 walt state counter bit 1 nWAIT 19 OV gt hold MCS96 in wait state 5826820 wait state counter bit 2 5 nCE0821 OV gt enable 01 and U8 memory nCE1 22 gt enable U6 and 013 memory MAP 23 5V gt map RAM as romsim I C Architecture declarations 8 NETWORK MAP MAP MAPd CLOCKOUT RESET GND VCC nWAIT CONF nWAITd VCC 005510 COCF UART VCC nCE2 COCF EEPROM VCC 1 CONF RAM VCC nCEO CONF EPROM VCC nBUSWIDTH CONF nBWd VCC Intermediate variable definitions EQUATIONS RESET nRESET HLDA nHLDA RANGES STALE EPROM MAP RANGES RANGEL RANGES RAM RANGEO9 EEPROM RANGES UART RANGES OPENO RANGE2 RANGE10 OPEN nBWd EEPROM UART WAIT 1 STALE HLDA WAIT 2 EPROM OPEN1 WAIT 2 STALE HLDA WAIT 3 UART WAIT 3 WAIT 4 WAIT 4 WAIT 5 WAIT 5 WAIT 6 WAIT 6 WAIT 7 WAIT 7 GND nWAITd WAIT Address RANGEI RANGE2 RANGE3 RANGE4 RANGES RANGE6 RANGE RANGE9 RANGE 0 15 A15 A15 1 15 1 15 5 15 5 1 15 15 7 A15 A15 A15 15 A15 TALS
46. 21 C000 4 00 96 LINE 422 423 424 425 426 427 428 429 430 431 432 433 434 435 436 437 438 439 440 441 442 443 444 445 446 447 448 449 3OURCE diag table eject dcw dcw dcw dcw dcw dcw dcw dcw dcw dcw dcw dcw dcw dcw dcw dcw dcw dcw dcw dcw dcw dcw STATEMENT SET DLE FLAG exit TRANSMIT exit READ BYTE READ WORD READ DOUBLE WRITE BYTE WRITE WORD WRITE DOUBLE LOAD ADDRESS INDIRECT ADDRESS dREAD PSW PSW READ SP QWRITE SP dREAD PC dWRITE PC dSTART USER dSTOP USER REPORT STATUS MONITOR ESCAPE offset offset offset offset offset offset offset offset offset offset offset offset offset offset offset offset offset offset offset offset offset offset 00 01 02 03 04 05 06 07 08 09 0A OB 00 0 OF 10 11 12 13 14 15 01 24 89 13 55 41 13 MCS 96 MACRO ASSEMBLER ERR LOC A178 A17E A183 A187 A189 A18D 180 18 191 191 194 19 OBJECT C701041E38 65040018 C83A C83C CC3C C92221 C90000 C701041E38 EV96 LINE 450 451 452 453 454 455 456 457 458 459 461 463 464 465 466 467 468 471 472 473 474 475 476 477 478 479 480 481 482 484 485 488 489 01 24 89 13 55 41 PAGE 14 SOURCE STATEMENT The following routines all named beginning with a 9 for diagnostics
47. 3CH tempb baud 10 0 zero baud hi 0 tempb 03H tempb line config 0 tempb 60 tempb general int 0 tempb 50H tempb clock confg 0 tempb 7FH tempb io 0 zero general 1 0 tempb 01H tempb gener enabl 0 tempw rism_psw tempw char flash leds 5 01 24 89 13 55 41 Initialize stack pointer wait for a timerl overflow two times release uart reset and wait till uart is ready Initialize rism mode register set diab bit in line config reg So that baud a reg s are accessable set baud rate to 9600 set up uart line config reg for no par 1 stop 8bit and txd rxd access switch to bank3 select baud rate gen a for both rx and tx clock source select OUT1 mode on pin 12 switch to bankO enable recieve fifo interrupt of the uart value for rism and initial user value Set up psw for the monitor load psw with rism value show life to user wait for interrupt 9 MCS 96 MACRO ASSEMBLER ERR LOC OBJECT 0 4 0 4 AOEC 1 6 103 106 10 3F3849 C40F36 1736 C701001E36 1536 992 36 DF15 995C36 DF03E713DF 1000118 E7F3FB EV96 LINE 144 145 346 347 348 349 350 351 352 353 354 355 356 357 358 359 360 361 362 363 364 365 366 367 368 369 370 371 372 374 375 376 377 378 01 24 89 13 55 41 10 SOURCE S
48. 44 EV80C196KB Microcontroller Evaluation Board User s Manual ASSEMBLY AND DISASSEMBLY iECM 96 supports the examination and modification of code memory using the standard mnemonics for the MCS 96 assembler ASM 96 Although standard mnemonics are used the iECM 96 does not build a symbol table of user symbols as assembly mnemonics are entered This makes it a single line assembler SLA because references are never made to information entered on other lines No labels are generated by the SLA although it can use labels which are loaded as symbolic information along with object code when a file translated in the debug mode has been loaded The iECM 96 SLA will accept mnemonics for all instructions which can actually be executed by the target processor It will not accept generic instructions such as BE or CALL which are processed by ASM 96 into standard MCS 96 instruc tions It will accept JE and SCALL or LCALL which are the specific instructions the MCS 96 processors understand SLA Single Line Assembly Commands The commands which invoke the SLA are ASM code address ASM The SLA is useful for writing short code pieces on line for testing or patching pro E but is not intended as a replacement for a true assembler such as ASM 96 he SLA can be invoked whether or not user code is running but there is an obvi ous danger in modifying code that is being executed ASM code gt This command causes the iECM 96 softwa
49. 59 260 261 262 263 264 265 266 267 268 269 270 271 272 213 214 275 276 277 278 279 280 281 282 283 284 285 286 287 288 289 290 291 292 293 294 295 296 297 SOURCE STATEMENT 01 24 89 13 55 41 PAGE cseg at offset 2000H oH m m ee Interrupt service routine addresses to be used in R SM EPROM Note Of all these interrupt vectors only the NMI and TRAP vectors are required for operation of the RISM The other vectors are provided as fixed entry points for routines which may be loaded into RAM the diagnostic mode In the diagnostic mode memory at the interrupt vectors is mapped to So it is not possible to write into the vector table In the normal i e non diagnostic mode the interrupt vector table is mapped to RAM so the vectors can be loaded as part of the normal process loading a user s object code f timer_overflow done hsi data hso event hsi zero software timer serial port external int trap invalid opcode cseg at chip_config cseg at serial txd serial rxd hsi entry 4 timer2 capture timer2 overflow offset external int pin hsi fifo full nmi 4 Seject wp e 4000H dcw 4100H dew 42
50. 6 on this board It uses an Intel 82510 UART for host communications The iECM 96 was designed and implemented by Intel to support user s of the MCS 96 architecture and is placed in the public domain with no restrictions or warranties of any kind Features Host system is an IBM PC AT PC XT or BIOS compatible clone Interfaces 1 or COM at 9600 baud Sixteen software execution breakpoints Concurrent interrogation of target memory and registers Supports BYTE CHARACTER WORD STRING DOUBLE WORD and FPAL 96 REAL variable types Single Line Assembler Disassembler Symbolics compatible with Intel s OMF debug records Supports LOAD SAVE LIST LOG and command INCLUDE files 22 EV80C196KB Microcontroller Evaluation Board User s Manual Restrictions Two words of user stack are reserved for use by the iRISM 96 software Other memory and or registers in the target memory will be used by the iRISM 96 software The exact number and location of this memory is implementation dependent See appendix B or C for further information An asynchronous serial port capable of operation at 9600 baud must be available in the target system The RISM described in this document uses an Intel 82510 UART This version also uses the NMI Non Maskable Interrupt to signal that a received data character is available The TRAP instruction is reserved Breakpoints and program stepping will not operate if the user s code is in EPROM or o
51. 8000 GEORGIA Intel Corp 20 Technology Park Suite 150 Norcross 30092 Tel 404 4490641 5523 Theresa Street Columbus 31907 HAWAII Intel Corp Honolulu 98620 Tel 808 8476738 ILLINOIS Corp Woodfield Corp Center III 300 N Martingale Rd Ste 400 Schaumburg 60173 Tel 708 8058031 INDIANA 1 Corp 8910 Purdue Rd Ste 350 Indiinapolii 46288 Tel 317 8758823 KANSAS Corp 10985 Cody Suite 140 Overland Park 66210 Tel 913 345 2727 KENTUCKY Intel Corp 133 Walton Ave Office 1A Lexington 40508 Tel 606 2552957 Intel Corp 896 Hillcrest Raad A Radcliff 40160 Louisville LOUISIANA Hammond 70401 serviced from Jackson MS CUSTOMER TRAINING MARYLAND 7 Corp 10010 Junction Suite 200 Annapolis Junction 20701 Tel 361 206 2860 MASSACHUSETTS intel Corp Westford Corp Center 3 Carlisle Rd 2nd floor Westford 01868 Tel 608 692 0960 MICHIGAN intel Corp 7071 Orchard Lake Rd Ste 100 West Bloomfield 46322 Tel 313 851 8905 MINNESOTA Intel 3500 W 80th St Suite 360 55431 62 83358722 MISSISSIPPI Intel Corp c o Compu Care 2001 Airport Road Suite 205F Jackson 39208 Tel 601 932 6275 MISSOURI Intel Corp 3300 Rider Trail South Suite 170 Earth Cityi3045 Tel 314 291 1990 Intel Corp Route 2 Box 221 Smithville 84089 Tel 9
52. 89 13 55 41 PAGE 23 rism gets a serial i o interrupt read uart interrupt status test for receive fifo interrupt enable only recieve fifo interrupt of the uart mask all others Char is low byte of tempw user force load data check if byte is a command commands are lt convert char to word index command table offset tempw MCS 96 MACRO ASSEMBLER ERR LOC OBJECT 8032 8035 8035 0D0830 8038 B03630 803D 8042 8047 0C0830 804A 0734 804E 804E 89010030 8052 D7BF 8054 FF 8055 27 EV96 LINE 98 99 800 801 803 804 805 806 807 808 809 812 813 814 815 816 817 819 822 823 824 825 826 827 828 829 831 832 833 836 837 838 839 840 841 842 843 844 845 846 SOURCE STATEMENT force load data 3 o a o m ey m CLR BIT RISM STAT DLE FLAG load data shll RISM DATA 8 RISM char EXIT RISM SET DLE FLAG 4 osx c m RISM STAT 0 SET SET BIT RISM STAT DLE FLAG EXIT RISM TRANSMIT utxd RISM 7 0 RISM DATA RISM DATA gt gt RISM ADDR RISM 1 SEND DATA BYTE shrl RISM DATA 48 inc RISM ADDR EXIT RISM MONITOR ESCAPE 8 ee ee ee ee ee if RISM DATA 1 then execute reset RISM DATA 01 bne exit rst br 5 Seject t 01 24 89 13 55 41
53. 963 966 967 968 971 972 973 974 975 976 977 980 981 982 983 984 985 986 989 990 991 992 993 994 995 996 997 998 999 1000 1001 1002 1003 1004 1005 1006 1007 1008 1009 1012 1013 SOURCE STATEMENT READ PSW RISM psw 01 24 89 13 55 41 27 bbs RISM STAT RUN FLAG rpsw running ld RISM DATA USER_PSW user is not running EXIT RISM rpsw running ld RISM DATA sp user is running EXIT RISM WRITE PSW 2 user psw RISM DATA Assumes user is not running st RISM DATA EXIT_RISM RISM DATA user_ sp add RISM DATA EXIT RISM WRITE SP LJ e USER PSW user is not running sp 4 add four to account for PC and PSW on the stack during this interrupt user Sp RISM DATA Assumes user is not running st RISM DATA br set rism idle REPORT STATUS a re er m Report user status stopped equ 0 running equ 1 trapped equ 2 a ld RISM DATA bbs RISM STAT ld RISM DATA bbs RISM STAT ld RISM DATA EXIT RISM end RUN FLAG exit t rapped TRAP FLAG exit stopped else report stopped MCS 96 MACRO ASSEMBLER EV96 01 24 89 13 55 41 PAGE 28 SYMBOL TABLE LISTING am NA
54. DATA ABS DATA ABS CODE ABS CODE ABS CODE ABS CODE ABS DATA ABS DATA ABS CODE ABS CODE ABS CODE ABS CODE ABS ENTRY WORD WORD ENTRY ENTRY VNTRY ENTRY ENTRY ENTRY BYTE BYTE ENTRY WORD WORD WORD BYTE BYTE WORD WORD BYTE WORD WORD ENTRY BYTE BYTE WORD BYTE BYTE BYTE BYTE BYTE BYTE BYTE BYTE BYTE ENTRY ENTRY ENTRY ENTRY BYTE BYTE ENTRY ENTRY WORD ENTRY 01 24 89 13 55 41 PAGE 5 96 MACRO ASSEMBLER NAME OFFSET PORTO PROCESS COMMAND PWM CONTROL QUIT READ BYTE READ DOUBLE READ PC READ PSW READ SP READ WORD RECEIVE READY REPORT STATUS RESET VECTOR RISM ADDR RISM DATA RISM ISR RISM PSW RISM STAT RPC RUNNING RPSW RUNNING RUN FLAG RUNNING SBUF SEND DATA BYTE SERIAL PORT SERIAL RXD SERIAL TXD SET BIT SET DIAG SET DLE FLAG SET RISM IDLE SOFTWARE TIMER SP SPCON SPSTAT START USER STOP USER STOPPED TEMPB TEMPW TIMER OVERFLOW TIMER1 TIMER2 TIMER2 CAPTURE TIMER2 OVERFLOW TRANSMIT TRAP TRAP FLAG TRAPPED VALUE 8000H 900 8028 0017 AlF5H 8057H 8061H 808DH 809DH 80B3H 805CH 8015H 80COH A080H 0034H 0030H 8000H 0000H 0038H 8097H 80A7H 0002H 0001H 0007H ATTRIBUTES NULL NULL CODE NULL CODE CODE CODE CODE CODE CODE CODE CODE CODE CODE ABS ABS ABS ABS ABS ABS ABS ABS ABS ABS ABS ABS ABS ABS BYTE ENTRY BYTE ENTRY ENTRY ENTRY ENTRY ENTRY ENTRY ENTR
55. E 2 144365 30K 14 E8 2 SHOULO AS CLOSE 15 14 AS POSSIBLE 5 0 1 ET 7 N i 4 ie 24 r1 s 88 3 FPT i 33 2 porco dA MEE A OU iud IBUSVIDTH 2 141 RSA pa tee Lee se 884 nene gt 27702 57 803 11 ACHOsPO P3 3 RD3 24 R24 man AB pa araos BS BE EE 9s RCH3 PB 3 6 n06 READS 4 4 4 3 7 007 eerie 5 j RCHG PB8 0 PHD 23 2 808 14131 RCH7 P8 7 PMO 3 Pa4 1 RO9 El BR gt 1 5 35 sa 74 279010 43 80 riu S TX PVR SRL P4 3 7RD11 2 ACHA gt eum D x P2 2 CEXINT P4 57 RD19 ae nD14 BALLES La dus 2 amp 4 8 0014 32 P2 4717215 4 7 8015 ACHE gt b 2 2 5 2 rat a y id P2 7 T2CRPTURE az Qe Lapi e IN qM 4 wn 51 2 50 4 gt HS1 3 H50 5 1 144 J gt C18 c9 PHIREF 22 8 14 B iuf LH3S6N 74 14 MEM i oi lt n P n
56. EPROM 55 ns EPROM Tdf MAX Trhdz UART 40 ns UART Trhdz MAX Trxdx 0 ns MIN Trxdx ROMsim 0 ns RAM Tohz MIN Trxdx EPROM 0 ns EPROM Toh MIN Trxdx UART is not specified Txhch is irrelevant in this design Tclcl 166 ns Tclcl WAIT 55 ns PAL EPLD MIN 10 ns AC112 1 Fmax MIN Tchcl 73 ns MIN Tchcl WAIT 25 ns PAL EPLD MAX 35 ns PAL EPLD MAX 4 4 ns AC112 Tsu MIN 64 ns or 25 ns PAL EPLD Tco MAX 35 ns PAL EPLD Tpd 8 ns 08 MAX 2 ns 112 Trem MIN 70 ns Tcllh is irrelevant in this design Tlich is irrelevant in this design is irrelevant in this design 73 ns MIN 15 5 ns AC373 Tw MIN 68 ns MIN Tavll A0 A15 5 ns AC373 Ts MIN Tavil WAIT 11 ns AC373 Dn to On MAX 35 ns PAL EPLD 8 ns ACOO Tphl MIN 5 ns AC112 Tw MIN 59 ns Tavil BHE 11 ns AC14 4 ns 112 Tsu MIN 15 5 43 ns MIN Tllax A0 A15 0 ns AC373 Th MIN Tllax BHE 0 ns AC112 Th MIN 43 ns MIN TII UART 7 ns UART MIN Trici is irrelevant in this design Trirh 411 ns MIN for two wait states Trirh UART 281 ns UART Trirh MIN Trhih 83 ns MIN TrhIh STALE 9 ns 74AC08 Tplh MAX 3 ns 74AC112 Trem MIN 12 ns 73 ns MIN 7 ns UART Tavwl MIN
57. EVS0C196KB Evaluation Board User s Manual Order Number 2707 38 001 EV80C196KB Microcontroller Evaluation Board USER SMANUAL Release 001 February 20 1989 Copyright 1989 Intel Corporation Intel Corporation makes no warranty of any kind with regard to this material including but not limited to the implied warranties of merchantability and fitness for a particular purpose Intel Corporation assumes no responsibitlity for any errors that may appear in this document Intel Corporation makes no commitment to update nor to keep current the information contained in this document ntel Corporation assumes no responsibility for the use of any circuitry other than circuitry embodied in an Intel product No other circuit patents licenses are implied Intel software products are copyrighted by and shall remain the property of Intel Corporation Use duplication or disclosure is subject to restrictions stated in Intel s Software License Agreement or in the of software delivered to the U S government in accordance with the software license agreement as defined in FAR 52 227 7013 No part of this document be copied reproduced any form or by any means without prior written consent of Intel Corporation Intel Corporation retains the right to make changes to these specifications at any time without notice Contact your local sales office to obtain the latest specifications before placing your order The
58. GO TILL code This command sets the first breakpoint 0 to code and then starts the execution of user code using the current setting of the user s PC and the breakpoint array GO TILL lt code OR code addr gt This command acts like the previous command except that it also sets the second breakpoint BP 1 to lt code_addr gt which follows the OR keyword This command stops execution of user code by forcing the processor to execute a jump to self instruction in a reserved location EV80C196KB Microcontroller Evaluation Board User s Manual 35 Program Stepping These commands allow stepping through programs one instruction at a time Be tween instructions the iECM 96 commands can be used to check the state of the variables changed by the instruction to ensure that the program is operating prop erly Stepping through code allows a far more detailed look at what is going on in the program The price that is paid for this detail is that stepping does not occur in real time this makes it difficult or perhaps impossible to use on code that is tied to real time events mE Stepping while interrupts are enabled would be confusing since interrupt service routines will be stepped through as well as sequential code iECM 96 avoids this problem by artificially locking out interrupts while stepping ignoring the state of the interrupt enable El or interrupt mask Super Stepping is
59. JP2 I O Expansion Connector 2x25 Pin MOLEX 39 51 5004 or Equiv 1 thru 49 V8S 0000000000 00000000 0089 0090 2 P1 0 Bi directional 4 1 1 Bi directional 6 P1 2 Bi directional 8 P1 3 Bi directional 10 P1 4 Bi directional 12 P1 5 BREQ Bi directional 14 P1 6 HLDA Bi directional 16 P1 7 HOLD Bi directional 18 P2 0 Txd Output 20 P2 1 Rxd Bi directional 22 P2 2 Extint Input 24 P2 3 T2CLK Input 26 P2 4 T2RST Input 28 P2 5 PWM Output 30 P2 6 T2UPDN Bi directional 32 P2 7 T2Capture Bi directional 34 HSO 0 Output 36 HSO 1 Output 38 HSO 2 Output 40 HSO 3 Output 42 51 0 Input 44 HSI 1 Input 46 HSI 2 HSO 4 Bi directional 48 HSI 3 HSO 5 Bi directional 50 VCC _ Figure 8 80 196 Microcontroller Evaluation Board User s Manual 19 Memory l O Expansion Connector 2x30 Pin MOLEX 39 51 6004 or Equiv 2 Vcc 1 AO Output 3 A1 Output 5 A2 Output 7 A3 Output 9 A4 Output 11 A5 Output 13 6 Output 15 A7 Output 17 VSS 19 A8 Output 21 A9 Output 23 A10 Output 25 A11 Output 27 12 Output 29 A13 Output 31 A14 Output 33 A15 Output 35 VSS 37 CLKOUT Output 39 RD Output
60. LT command cannot be executed if the user s code is not running The GO commands which set breakpoints use BP 0 and possibly BP 1 Any break value already in one of these breakpoints will be overwritten and destroyed by these GO commands If possible the user should reserve the first two breakpoints for use by the GO commands and set the remaining breakpoints if required explicitly with the BR commangs GO This command starts execution of the user s code using the current value of user s PC and the current breakpoint array GO FOREVER This command clears the breakpoint array and starts execution at the current value of the user s PC GO FROM code This command loads the user s PC with code and starts execution of the user s code using the current breakpoint array GO FROM code addr FOREVER This command loads the user s PC with code clears the breakpoint array and starts execution of the user s code GO FROM code TILL code This command loads the user s PC with the code which follows the FROM keyword sets the first breakpoint BP 0 to the code addr which follows the TILL keyword and then starts execution of the user s code GO FROM code TILL code OR code This command acts like the previous command except that it also sets the second breakpoint BP 1 to the code addr which follows the OR
61. ME VALUE ATTRIBUTES AD COMMAND 0002H NULL ABS BYTE AD DONE A002H CODE ABS WORD AD RESULT HI 0003H NULL ABS BYTE AD RESULT LO 0002H NULL ABS BYTE ADDR CONTRO 1E07H DATA ABS BYTE AH 001DH ABS BYTE Al s 001CH REG ABS BYTE AROUND A220H CODE ABS ENTRY AX 001CH REG ABS WORD BAUD A HI 1E01H DATA ABS BYTE BAUD A LO 1 00 DATA ABS BYTE BAUD REG 000 NULL ABS BYTE BI hk Aum 9D3BH CODE ABS ENTRY BE ru unius s 0020H REG ABS WORD BYTE LOOP A283H CODE ABS ENTRY CHAR 0036H ABS BYTE CHIP CONFIG A018H CODE ABS BYTE CLOCK CONFG 1E00H DATA ABS BYTE CLR_BIT amp 405 chos See MACRO COMMAND TABLE 9D5EH CODE ABS WORD CW LOOP A2A3H CODE ABS ENTRY o bos be o 0022H ABS WORD CYCLE BYTE A280H CODE ABS ENTRY CYCLE WORD A2A0H CODE ABS ENTRY DEFINE DIAG COMMAND A13EH CODE ABS ENTRY DIAG MODE A130H CODE ABS ENTRY DIAG PAUSE A122H CODE ABS ENTRY DIAG PAUSE LOOP A125H CODE ABS ENTRY DIAG TABLE A14CH CODE ABS WORD DIAGNOSTIC FLAG 0007H NULL ABS DLE FLAG 0000H NULL ABS DREAD PC AlA6H CODE ABS ENTRY DREAD PSW A1B4H CODE ABS ENTRY DRPC RUNNING ALAEH CODE ABS ENTRY DRPSW RUNNING AlBCH CODE ABS ENTRY DSET RISM IDLE 191 CODE ABS ENTRY DSTART USER A178H CODE ABS ENTRY DSTOP USER A18DH ABS ENTRY DUSER PC 003AH REG ABS WORD DUSER PSW 003CH ABS WO
62. N N A N N AN PUR E20 RESET signal from host Enable E16 LED Driver RESET from P2 A B Enabled A B B C RESET from P1 Reset c E11 HLDA Input to PLD U12 isabled D lated ircuit inso HOLD HLDA not used HOLD HLDA feature in use E19 80C196KB RXD signal from P2 Q ass 2 woo Q QOO eo Oo nm Q e eo RXD driven 019 pin 3 be used by A B Figure 3a Configuration Jumper Locations EV80C196KB Microcontroller Evaluation Board User s Manual 15 5 U6 pin 27 E8 U8 pin 27 I I 9 9 r lt lt P EE mo 5 0 tO or lt lt gt ae Ti CN que cq NN 132133 aaoaa BER c a m O 00 lt lt lt lt 5 o Oo ul E17 114 pin 26 E12 U13 pin 27 Pin 26 A13 Pin 26 Vcc B C A B E18 U14 pin 27 Pin 27 WRL Pin 27 A15 E13 U6 U13 pin 1 A B B C WR Pin 27 A14 A B 15 Pin 1 Vcc Pin 1 A B Pin 27 B C B C sg lt gt lt How WW hank 5488 lt lt gt uv y Q
63. PAL Disable NC 12VDC VSS VCC Note 1 N C No Connect EV80C196KB EV80C186 VCC Addr 0 Addr 1 Addr 2 Addr 3 Addr 4 Addr 5 Addr 6 Addr 7 VSS Adar 8 Addr 9 Addr 10 Addr 11 Addr 12 Addr 13 Addr 14 Addr 15 VSS CLKOUT RD BREQ ALE NMI RESET Note 2 HLDA 2VDC VSS VCC VCC Addr 0 Addr 1 Addr 2 Addr 3 Adar 4 Adar 5 Addr 6 Addr 7 VSS Addr 8 Addr 9 Addr 10 Addr 11 Addr 12 Addr 13 Addr 14 Addr 15 VSS CLK RD ES ALE RESET TOOUT HLDA 12V VSS VCC 11 12 3 14 5 556 7 218 9 22110 11 22112 13 114 15 20 16 17 22 18 19 33 20 21 722 23 27124 25 26 27 12128 29 22 30 31 22132 33 2234 35 22 36 37 22 38 39 2 40 41 22 42 43 44 45 _ 46 47 22 48 49 22 50 51 52 53 154 55 _ 56 57 58 59 160 80 186 VCC Addr Data 0 Addr Data 1 Addr Data 2 Addr Data 3 Addr Data 4 Addr Data 5 Addr Data 6 Addr Data 7 VSS Addr Data 8 Addr Data 9 Addr Data 10 Addr Data 11 Addr Data 12 Addr Data 13 Addr Data 14 Addr Data 15 EV80C196KB VCC Addr Data 0 Addr Data 1 Addr Data 2 Addr Data 4 Addr Data 4 Addr Data 5 Addr Data 6 Addr Data 7 VSS Addr Data 8 Addr Data 9 Addr Data 10 Addr Data 1 1 Addr Data 12 Addr Data 13 Addr Data 14 Addr Data 15 EXTINT P2 2 N C HOLD 12VDC VSS VCC N C TPx No Connect but routed to an on board test point for the user Note 2 EV80C51FB VCC Addr Data 0 Addr Data 1 Addr Data 2
64. PC START USER STOP USER REPORT STATUS MONITOR ESCAPE offset offset offset offset offset offset offset offset offset offset offset offset offset offset offset offset offset offset offset offset offset offset 00 01 02 03 04 05 06 07 08 09 0A OB 00 OF 10 ll 12 13 14 15 01 24 89 13 55 41 PAGE 22 MCS 96 MACRO ASSEMBLER ERR LOC OBJECT 8000 8000 8001 8006 8009 800B 800 8013 8015 8015 801 8020 8023 8026 8028 8028 802 8030 B301021E36 950436 DFOA B10136 C701011E36 AF01001E36 3B3803E7C420 38380F 991F36 D90D 643636 A3375E1D36 E336 96 LINE 163 164 165 766 767 768 769 770 771 772 773 775 776 777 778 779 780 781 784 785 786 787 788 789 790 791 792 793 794 795 796 797 SOURCE STATEMENT cseg at offset 0000H 2 c moa m aa m o eo Control passes to this point when the from the host system rism isr ENTER RISM ldb tempb general int 0 xorb tempb 00000100B be receive ready ldb tempb 401H stb tempb gener enabl 0 exit EXIT RISM receive ready ldbze tempw txd rxd 0 bbc RISM STAT USER MAP not bbs RISM STAT DLE FLAG cmpb char 1FH bh load data process command add tempw tempw ld tempw br tempw eject 01 24
65. R25 10K 29 3 R1 R7 R18 100K Hamilton Mepco CR25 100K 30 11 R6 R4 R8 R9 R11 R12 R13 Hamilton Mepco CR25 1M R14 R15 R16 R17 31 1 RP2 180 ohm SIP Hamilton Bourns 4610 101 181 32 1 RP1 10K POT Hamilton Bourns 3009P 1 103 33 C4 05 C036 038 30pF Hamilton Sprague gt 1C10C0G330J050B 34 3 12 6 18 01 4 Hamilton Sprague 1 10250103 050 35 23 C11 03 098 C9 C10 0 tor Hamilton Sprague 1 10250104 0508 C17 C19 C20 C21 C22 C23 C24 025 C26 C27 028 C30 C32 C33 C34 C35 36 4 1 7 14 15 1 0 Hamilton Sprague 150D105X9015A2 37 2 C31 C37 6 8uF Hamilton Sprague 199D685X9035DA1 80C196KB Evaluation Board Revised December 27 1988 CPU Section Revision 2 0 ECO Applications Engineering Bill Of Materials December 27 1988 15 53 23 Page 2 of 2 Item Quantity Reference Part Vendor Manuf Part 38 1 29 22uF Hamilton Sprague 150 226 901582 39 2 P1 P2 5 DB9 Female Sterling AMP 207084 1 40 3 2 16 19 2PIN JUMPER Marshall P Prod 41 16 7 1 4 5 6 8 9 3PIN JUMPER Marshall A P Prod E10 E11 E12 E13 E14 E17 E18 E20 42 i E15 4PIN JUMPER Marshall A P Prod 43 i JP4 POWER CONNECTOR Hamilton Molex 09 74 1041 44 1 1 26 Marshall P Prod 929665 01 36 45 1 JP2 CONSO Marshall A P Prod 929665 01 36 46 1 JP3 CON60 Marshall P Prod 929665 01 36 Appendix Specific iRISM Information APPENDIX Specific iRISM Information The EV80C196KB is
66. RD DWORD MACRO DWPSW RUNNING A1C9H CODE ABS ENTRY DWRITE PC CODE ABS ENTRY DWRITE PSW A1C1H CODE ABS ENTRY MCS 96 MACRO ASSEMBLER NAME DWRITE SP DX ENTER RISM EV96 EXIT EXIT RISM EXTERNAL INT EXTERNAL INT PIN FAILED FL LOOP1 FL WAITO FL WAITI FLASH LEDS FORCE LOAD DATA GENER ENABL GENERAL INT HERE HSI DATA HSI ENTRY 4 HSI FIFO FULL HSI MODE HSI STATUS HSI TIME HSI ZERO HSO COMMAND HSO EVENT HSO TIME INDIRECT ADDRESS INT MASK INT PENDING INVALID OPCODE IO MODE IOCO IOCl 1 2 I050 a a IOS1 2 2 LINE CONFIG LINE STATUS LOAD ADDRESS LOAD DATA LOOP MEM TST MODEM CONTR MODEM STATS MONITOR ESCAPE MONITOR PAUSE NOT USER EV96 006 0004H 8081H 0008H 0009H 012 1E04H 0015H 0016H OOOFH 0010H 0015H 0016H 1E03H 1 05 807 8035H A20FH A200H 1E04H 1 06 804 9D20H 4 ATTRIBUTES CODE ABS ENTRY REG ABS WORD MACRO MODULE MAIN 5 0 CODE ABS MACRO CODE ABS CODE ABS CODE ABS CODE ABS CODE ABS CODE ABS CODE ABS CODE ABS DATA ABS DATA ABS CODE ABS CODE ABS CODE ABS CODE ABS NULL ABS NULL ABS NULL ABS CODE ABS NULL ABS CODE ABS NULL ABS CODE ABS NULL ABS NULL ABS CODE ABS DATA ABS NULL ABS NULL ABS NULL ABS NULL ABS NULL ABS NULL ABS
67. RESS Code OBH This command reads the memory word pointed to by the RISM ADDR and stores it into the RISM ADDR register The RISM DATA register is not modified by this command 50 80 196 Microcontroller Evaluation Board User s Manual READ PSW Code OCH This command loads the 5 DATA register with the PSW Program Status Word associated with the user s code Most RISM implementations will have to check RUN FLAG to determine how to access the user s PSW WRITE PSW Code OxOD This command loads the PSW Program Status Word associated with the user s code from the RISM DATA register The host software will invoke this com mand while user code is not running READ SP Code OxOE This command loads the RISM_DATA register with Ee SP Stack Pointer associ ated with the user s code WRITE SP Code OxOF This command loads the SP Stack Pointer from the RISM DATA register This command must also push two values into the newly created stack area These values are the PC first and PSW second associated with the idle loop which executes while user code is not running The host software will only invoke this command while user code is not running READ PC Code 0x10 This command loads the RISM DATA register with the PC Program Counter associated with the user s code Most RISM implementations will have to check RUN FLAG to determine how to access the user s PC WRITE PC Code 0 11 This command
68. SET input is true set when the Monitor EPROMs are accessed in range 1000 1 MAP will always be set when the board is in the mode pn21 CEO Enables memory U1 08 monitor EPROM as shipped ADDRESS RANGE 2000H 27FF and or ADDRESS RANGE 0H FFH or ADDRESS RANGE 1000 1DFFH pin 22 CE1 Enables memory in U6 and U13 user 16 bit ROMsim RAM as shipped CE1 ADDRESS RANGE 2000H 27FFH and MAP ADDRESS RANGE 2800H pin 15 CE2 Enables memory in U14 user 8 bit ROMsim RAM as shipped CE2 ADDRESS RANGE 6000H 7FFFH 14 CS510 Enables U20 the 82510 UART which is used for host communications CS510 ADDRESS RANGE 1E00H 1EFFH EV80C196KB Microcontroller Evaluation Board User s Manual 13 The BUSWIDTH output of the EPLD pin 16 is fed into the buswidth pin of the 80C196KB Therefore it is driven low for accesses to 8 bit memory and high for accesses to 16 bit memory As shipped it goes low simultaneously with CE2 or CS510 as these are the only areas of memory mapped as 8 bit Programmed into the EPLD is a 3 bit wait state machine clocked by the rising edge of CLKOUT from the 80C196KB The transition sequence of the wait state machine is controlled by the current state of the machine and the inputs to the EPLD for further details see appendix E While the bus of the 80C196KB is idle the wait state machine is locke
69. Seject MCS 96 MACRO ASSEMBLER EV96 01 24 89 13 55 41 PAGE 19 ERR LOC OBJECT LiNE SOURCE STATEMENT 528 280 529 cseg at offset 2280H 630 A280 631 cycle byte 632 633 does alternate read and write operation on the byte specified by bx 634 p Se SSS SS 635 CLR BIT 1 7 A283 637 cb loop 638 SET BIT 7 A286 C6201C 640 stb ax bx 641 CLR 1 7 28 B2201D 643 195 1 bx A28F 27F2 644 br cb loop 645 2 0 646 cseg at offset 22 647 2 2 CHEQUE UNES D edere um iem temone 2 0 648 cycle word 649 650 does alternate read and write operation on the word specified by bx 651 Mor M Lm i i m 652 CLR 1 7 2 654 655 SET BIT IOPORT1 7 A2A6 C2201C 657 st ax bx 658 CLR IOPORT1 7 A2AC A2201E 660 ld dx bx A2AF 27F2 661 br cw loop 662 663 eject MCS 96 MACRO ASSEMBLER EV96 01 24 89 13 55 41 PAGE 20 ERR LOC OBJECT LINE SOURCE STATEMENT 664 9D00 665 cseg at offset 1000 666 2 SSS SSS Sa e UE 9000 667 user setup 668 669 This code completes changing the board into user mode The PLD on the 670 board U12 automatically remaps memory when code from this address 671 range is fetched 672 2 673 9
70. T VECTOR 2080 A1000118 LD 18 0100 gt 20842 DIIC 5 2086 0120 CLR CX 2 2088 0122 CLR DX 208A 10116 LDB 16 01 100805 FLOR CLRB 1 2088 1117 CLRB i 2091 1 201 LD BX 20BF pause Hit the space bar to continue pc This displays the current value of the Program counter PC RESET VECTOR change the Program Counter use pc 2080 lt gt pause Hit the space bar to continue 7 go from 2080 forever This command clears all breakpoints and executes code gt gt The LED s for I O Port 1 should be incrementing regulariy gt gt Hit the space bar to continue 2 gt dasm past 8 The disassmbler and all other memory read commands can be 5 20 6 8900801 BX 8000 20AA D7E9 JNE LOOP 20AC 1 201 LD BX 20 20 0 0722 INC DX 2082121 L70F INCB IOPORT1 2084 BOOF17 LDB 17 2087 27DC SJMP LOOP FAILED 2089 10 gt gt used while code is running on the board gt gt pause Hit the space bar to continue 2 gt 2052 start assembling code at address 20b2H see disassembly list ing Single Line Assembler activated exit with end directive 20B2H decb ioportl 20 end gt pause Hit the space bar to continue The LED s for 1 0 Port
71. TATEMENT This code is entered from the nmi isr if the user memory map is not turned on This is the echo mode and diagnostic mode of the board If the diagnostic flag is clear the board is in echo mode characters received from the host are incremented and sent back to the host They are also tested for the set user command or the set diagnostics command If either command was sent it is carried out If the diagnostic flag is set the program branches to the diag mode code d not user bbs RISM STAT DIAGNOSTIC FLAG diag mode stb char ioportl Splash received char on leds incb char send back incremented char stb char txd rxd 0 decb char cmpb char marks end of serial test be set diag and beginning of diagnostic mode cmpb char N marks end of serial test bne exit and beginning of user mode Li This code places the board in user mode until RISM STAT gets altered somehow It branches to a location which does not get remaped and there a remap will be performed
72. TE variable at byte address to byte value BYTE byte address TO byte address This form is used to display a region of memory as a sequence of BYTE variables When this command is invoked iECM 96 will start by displaying the current default base and then a series of lines showing the contents of the selected memory region If a symbol exists in iECM 96 s symbol table for the next byte address then this symbol will be displayed Whether or not the symbolic display happens the next line will start with a hexadecimal display of the address of the next BYTE variable to be displayed followed by the display of up to 16 bytes of memory as BYTE variables in the default base A new line will be started whenever 16 bytes of memory have been displayed on the line or a valid symbol exists in iECM 96 s symbol table for the next byte address to be displayed The command terminates when all of the BYTE variables in the selected range have been displayed During lengthy displays you can stop the output to the console by hitting the SPACE bar Display can be sumed by hitting the SPACE bar a second time The command can be terminated by entering a carriage return BYTE byte address TO byte address byte value This form is used to initialize a region of memory to the given byte value Note that this command will take a little over a millisecond at 9600 baud for each BYTE loaded This command can be terminated by
73. Tclwl is irrelevant in this design 60 ns MIN for zero wait states Tqvwh ROMsim 40 ns RAM MIN Tqvwh 393 ns MIN for two wait states Tqvwh UART 90 ns UART Tdvwh MIN Tchwh is irrelevant in this design Twiwh 53 ns MIN for zero wait states Twiwh ROMsim 50 ns RAM Twp MIN Twiwh 386 ns MIN for two wait states TwIwh UART 231 ns UART Twlwh MIN Twhax 73 ns MIN Twhqx ROMsim 9 ns 74AC32 Tplh MAX 0 ns RAM Tdh MIN 9 ns Twhqx U14 0 ns RAM MIN Twhqx UART 12 ns UART Twhdx MIN Twhlh 73 ns MIN Twhih ROMsim 9 ns 74AC32 Tplh MAX 0 ns RAM Twr MIN 9 ns TwhIh UART 0 ns UART Twhax MIN TwhIh STALE 9 ns 74 08 Tplh MAX 3 ns 74AC112 Trem MIN 12 Twhbx is irrelevant in this design Appendix Programmable Logic Equations Doug Yoder Intel January 19 1989 EV80C196KB 002 5AC312 Generates mapping signals for the target processor on the 80C196KB evalu ation board OPTIONS TURBO ON PART 5AC312 Input declarations Qo oo INPUTS CLOCKOUT MCS96 system CLOCKOUT STALEG2 STretched MCS96 Address Latch Enable 5 nHLDAQ3 80C196KB HoLD Acknowledge A8 4 MCS96 latched 8 A15 965 1086 5 A11Q7 1288 A1369 A14010 15811 nRESET 13 MCS96 RESET pin Output declarations 5 oe OUTPUTS nCS5106814 OV enable uart U20 oo nCE
74. WAIT 6 REMOVE HOLD ASSERT IF WAIT 7 REMOVE HOLD ASSERT REMOVE HOLD ASSERT ASYNC START WAIT 2 IF WAIT 1 WAIT WAIT WAIT WAIT WAIT WAIT THEN THEN THEN THEN THEN THEN THEN THEN 0 0 REMOVE HOLD HOLD 2 WAIT HOLD 3 HOLD 4 HOLD 5 HOLD 6 HOLD 7 Name KBBUSCON Partno 80 196 Revision 01 Date 1718 89 Designer Doug Yoder Company intel ECO Assembly 80C196KB evaluation board Location 012 Device 22V10 f CK kk RK KR e e e e he he e e k e ke e ke k KR e k k ke e khe ke e e koe ce ck k e ck e ke che ke ke e k k kk k e k ke e kk e e ke ke Generates mapping signals for the target processor on the id 80C196KB evaluation board Allowable Target Device Types 22V10 RK KK kk KK KKK KKK KK KKK KK KK KR ke ee e KK RK e e ke e ko Sk Gk c OR Ok OK Ok Ok kk kk kc kc kc kck kc kckckckck ko ko Inputs PIN 1 CLOCKOUT MCS96 system CLOCKOUT PIN 2 STALE STreched MCS96 Address Latch Enable PIN 3 HLDA 80C196KB HoLD Acknowledge PIN 4 11 8 15 MCS96 latched A8 A15 PIN 13 RESET MCS96 RESET pin Outputs PIN 14 5510 0V enable uart U20 PIN QV gt enable 014 memory
75. WARE The EV80C196KB board uses an Embedded Controller Monitor ECM written for the MCS 96 family of 16 bit microcontrollers This monitor supports basic debug facilities LOAD GO STEP etc in the user s target system The ECM is broken into two independent programs one of these executes in the EV80C196KB iRISM 96KB and the other executes in PC or BIOS compatible clone iECM 96 These two programs communicate an asynchronous serial channel using binary protocol defined specifically for this application The partitioning of the ECM into two separate programs SUppolts number of goals in the development of this system The system is easy to adapt to a new target because the code runs in the target is very simple and small The feature set of the user interface i is not limited by the resources of the target since the user interface is implemented in the host PC Concurrent operation of the ECM and the target system was easily achieved This allows you to interrogate and carefully modify the state of the target system while it is running This manual section describes the user interface provided by the iECM 96 the interface between this PC resident software and the target resident software and the structure of the software in the target Appendix B lists the resources of the 80C196KB that are reserved for this RISM implementation Appendix C is the listing for the iRISM software which runs in the 80 19
76. Y ENTRY ENTRY ENTRY REG ABS WORD REG ABS LONG CODE ABS ENTRY NULL ABS REG ABS BYTE CODE ABS ENTRY CODE ABS ENTRY NULL NULL NULL MACRO CODE CODE CODE MACRO CODE CODE CODE CODE NULL NULL NULL CODE ABS ABS ABS ABS ABS ABS ABS ABS ABS ABS ABS ABS ABS ABS CODE ABS NULL ABS BYTE WORD WORD WORD ENTRY ENTRY ENTRY WORD WORD BYTE BYTE ENTRY ENTRY REG ABS BYTE REG ABS WORD CODE NULL NULL CODE CODE CODE CODE NULL NULL ABS ABS ABS ABS ABS ABS ABS ABS ABS WORD WORD WORD WORD WORD ENTRY WORD 01 24 89 13 55 41 PAGE 30 MCS 96 MACRO ASSEMBLER 96 TXD RXD UART USER MAP USER PC USER PSW USER SETUP WATCHDOG WORD PROTECT WRITE BYTE WRITE DOUBLE WRITE PC WRITE PSW WRITE SP WRITE WORD LEE ZERO p x gt 55 228 224 A ASSEMBLY COMPLETED NO ERROR S JALUE 0003H 2020H 2022H 9 000AH FOUND ATTRIBUTES DATA DATA NULL DATA DATA CODE NULL MACRO CODE CODE CODE CODE CODE CODE NULL ABS ABS ABS ABS ABS ABS ABS ABS ABS ABS ABS ABS ABS ABS BYTE BYTE WORD WORD ENTRY BYTE ENTRY ENTRY ENTRY ENTRY ENTRY ENTRY WORD 01 24 89 13 55 41 PAGE 31 Appendix D Timing Analysis Timing analysis of the EV80C196KB board All values used are based on the 80C196KB operating at 12MHz They are taken from the Oc
77. al input it is recommended that the capacitors be removed and the resis tors replaced with wires For additional connection information refer to figure 7 or the schematics in appendix A The ground and power planes beneath the analog circuitry D1 D2 R3 C2 U3 U4 JP1 and the analog connections on the 80C196KB are isolated from the digital power and ground planes of the board to keep noise from the analog inputs Decoding The decoding logic on the EV80C196KB board serves three purposes to provide Chip Enable signals to memory and peripheral devices to select the buswidth for the device s being accessed and to provide wait states for slow devices This section is provided in case you need to modify the memory configuration of the asd ET board It is not necessary to understand this section for normal usage of the board The heart of the decoding logic is U12 24 5AC312 Intel EPLD or a C22V10 programmable logic array which is socketed to allow easy changes For the sake of convenience it will be referred to as the EPLD throughout this text The EPLD uses latched addresses A8 A15 along with CLKOUT HLDA RESET and STAL STretched ALE from the 80C196KB as decode inputs There are 4 enable outputs from the EPLD all of which are low level true however only one should be true at a time to avoid bus contention They are decoded from the address lines and an internally latched signal called MAP MAP is cleared when the RE
78. ame com mand If no such command has been entered then the default filename LIST ECM will be used LIST filename This command will attempt to open as a writable file If a file with lt file name already exists then iECM 96 will ask if the file is to be overwritten or if the new data should be appended to the end of the existing file It will then open the file and stamp it with the current date and time from the system clock After this com mands entered by the user and the responses generated by iECM 96 will be re corded in the file LOG This command behaves like the LOG filename command described below except that it uses the last filename that was entered as part of a LOG filename com mand If no such command has been entered then the default filename LOG ECM will be used LOG filename This command will attempt to open filename as a writable file If a file with file name already exists then iECM 96 will ask if the file is to be overwritten or if the new data should be appended to the end of the file It will then open the file and stamp it with the current date and time After this commands entered by the user will be recorded in the file Note that this file may contain nonprintable characters e g ESC LISTOFF and LISTON The LISTOFF closes a LIST file that has been specified by the LIST command This stops new list information from being recorded The LISTON re opens the list
79. appear to complete without delay Some commands e g displaying or filling a large area of memory take an appre ciable length of time to complete general these commands can be aborted by entering a CARRIAGE RETURN Those commands which display a large amount of information can be paused by hitting the SPACE bar After you have checked the data currently on the screen you can depress the SPACE bar again to resume the output Aborting from 96 Entering a control C will cause the iECM 96 to close any open files and return to DOS Initiating and Terminating iECM 96 This section describes the commands for invoking iECM 96 from DOS and exiting back to DOS 96 This command entered the DOS prompt loads the iECM 96 software and exe cutes it Several options are available with this command Option strings always start with a hyphen and can be entered in upper or lower case The operation of these options is described below Any or all of these options can be entered in any order options are contradictory then the actual option accepted is the last one entered 2 1 These options tell the iECM 96 software which serial communication port is to be used If neither of these options is entered then COM 1 will be used as a default If iECM 96 detects valid CTS Clear To Send and DSR Data Set Ready signals from the appropriate COM port it will sign on and display a command prompt
80. aves the user code byte at any active breakpoint and substi tutes a TRAP instruction for that byte Executing a TRAP instruction will cause the iECM 96 to restore the user code bytes where the TRAP instructions were substi tuted and then decrement the user s program counter so that it points at the original instruction The user s program will appear to stop execution immediately before executing the instruction with a breakpoint set on it All the TRAPs will be removed from the user s code and the original code restored Note Most monitor programs similar to iECM 96 display a message on the console when a break occurs e g Program break at 1234H This is not done in iECM 96 because the system supports concurrent interrogation of the target which the user s code is running it is possible perhaps probable that the break will occur while you are in the middle of displaying or modifying the state of the target Any special break message would have to interrupt the execution of the command Because of this the iECM 96 does not output a special break message You have two ways to find out that a break occurred 1 The prompt will change from a greater than gt to an asterisk 2 The status of the processor shown in the control panel at the top of the console screen will change from running to stopped Commands which set the breakpoint array are BR BR number BR number code The
81. be done in a number of formats and in most cases can be done concurrently with user code execution A single line assembler and disassembler are also provided Note on the disk included with the EV80C196KB is a file called DEMO LOG DEMO LOG is a sample iECM 96 session for you to invoke and become more familiar with the features of iECM 96 Appendix is a printout of DEMO LST which was created by turning on the list feature and invoking DEMO LOG by typing include demo log CHR at the iECM 96 prompt Background Information Numeric and Symbolic Input The command parser used by the iECM 96 software requires that numeric inputs always start with the digits 0 9 If hexadecimal numbers are entered which start with A F they must be preceded by a 0 For example enter OAA55 instead of 55 This requirement is similar to ASM 96 If symbolic information has been downloaded as part of an object file see Loading and Saving Object Code then you can enter a valid symbol name whenever a number is expected The symbol name must be preceded by a period so that the parser knows to try searching the symbol table If the symbol is ambiguous then it will not be accepted by the parser The probability of ambiguous references can be reduced by specifying the module name along with the symbol name The module name must be preceded with a colon If a variable TEMP is declared both in MODULE1 and in MODULE then a refer ence to th
82. console by hitting the SPACE bar Display can be re sumed by hitting the SPACE bar a second time The command can be terminated by entering a carriage return REAL real address TO real address real value This form is used to initialize a region of memory to the given real value Note that this command will take a little over a millisecond at 9600 baud for each REAL loaded This command can be terminated by entering a carriage return but this leaves only part of the memory region initialized 42 EV80C196KB Microcontroller Evaluation Board User s Manual STACK Commands There are two basic forms for the STACK commands STACK stack address STACK stack address TO stack address Both of these commands can be used whether or not the user s program is running STACK stack address This command is useful for accessing a 16 bit variable which is known to be a fixed offset in the system stack When this command is invoked iECM 96 executesa WORD word address command where the word is formed by adding stack address to the current value of the system stack pointer STACK stack address TO stack address This command is useful for accessing a sequence of 16 bit variables whicn are known to start at a fixed offset in the system stack When this command is invoked iECM 96 executes a WORD word address TO word address command where both word address fields are formed b
83. ct MCS 96 MACRO ASSEMBLER ERR LOC 1 4 1 4 1 1 1 1 1 1 4 1 9 1 9 1 1 101 OBJECT 3A3805 A03C30 A21830 3A3805 03 30 21830 01830 27 96 LINE S 18 519 520 521 522 523 524 527 528 529 532 533 534 535 536 537 538 539 542 543 544 547 548 549 550 551 552 553 554 555 SOURCE STATEMENT dREAD PSW RISM DATA user psw t bbs RISM_STAT ld RISM DATA EXIT_RISM drpsw_running ld RISM DATA EXIT RISM dWRITE PSW user psw RISM DATA 01 24 89 13 55 41 16 RUN FLAG drpsw running dUSER PSW user is not running sp user is running bbs RISM STAT RUN FLAG dwpsw running st RISM DATA dUSER PSW user is not running EXIT RISM dwpsw running st RISM DATA sp user is running EXIT RISM dWRITE SP user Sp RISM DATA Assumes user is not running st RISM DATA sp br dset rism idle Seject MCS 96 MACRO ASSEMBLER ERR LOC AID 81193 ALD AlD AlDD AlDD 1 1 1 AlE6 1 9 ALEC AlF1 AlF3 AlF5 AlF5 1 8 OBJECT 0 14 351 6FD 351 6FD 090134 C40F35 3516FD 3516FD 88003 D707 880034 D7EA 27DE B0360F 96 SOURCE aS eas STATEMENT 01 24 89 13 55 41 PAGE 17 On a reset this code flashes the LEDs connected to
84. ctions starting at that location The parameter count must be less than 256T 100H so that the command parser can distinguish this command from the command DASM code This restriction does not apply to the DASM code addr count instruction During lengthy displays you can stop the output to the console by hitting the SPACE bar Display can be resumed by hitting the SPACE bar a second time The command can be terminated by entering a carriage return DASM code gt This command disassembles the instruction at code The parameter code must be greater or equal to 256T 100H so that the command parser can distinguish it from the DASM count instruction DASM code gt lt gt This command disassembles count instructions starting with the one at code addr During lengthy displays you can stop the output to the console by hitting the SPACE bar Display be resumed by hitting the SPACE bar a second time The command can be terminated by entering a carriage return DASM code addr TO code This command disassembles the region of memory specified If an instruction crosses the ending address of the region it will be completely disassembled before the command terminates During lengthy displays you can stop the output to the console by hitting the SPACE bar Display can be resumed by hitting the SPACE bar a second time The command
85. d in state 0 which is called start The conditions for leaving async start are 1 ALE being asserted 2 HLDA not being asserted 3 a value on A8 A15 requiring wait states Because the falling edge of ALE can occur before the next rising edge of CLKOUT can clock the wait state machine a signal called STALE for Stretched ALE is used STALE does not go low until after the rising edge of CLKOUT During async start the output WAIT from the EPLD is asserted asynchronously based upon a value on A8 A15 requiring wait states If no wait states are required WAIT will not be asserted and the wait state machine will remain in async start However if one or more wait states are needed WAIT will be asserted and the wait state machine will transition out of async start on the next rising edge of CLKOUT The next state entered depends on how many wait states are needed only one is required the next state is remove hold where WAIT is deasserted regardless of the inputs to the EPLD If two wait states are needed the next state is hold 2 where WAIT is always asserted then the state after that is remove hold The additional states hold 3 hold 7 work just like hold 2 with WAIT always asserted The wait state machine will count through from hold 2 to hold n to generate n wait states before jumping to remove hold to deassert WAIT The maximum number of wait states is seven The previous paragraph described how the sig
86. d is changed by reading or writing to an address between 1000H and 1DFFH this code this is accomplished by branching to address 1000H to continue RISM execution The memory map of this board both before and after RESET are as follows Address After RESET After REMAP 0000 00FFH as data 0000 00 as code Internal Req file RISM Monitor EPROM Internal Reg file RISM Monitor EPROM 0100 1 Unused Unused User expansion possible 1D00 1DFFH RISM Monitor EPROM RISM Monitor EPROM 1 00 1 External UART U20 External UART U20 1 00 1 Unused Port 3 amp 4 Unused Port 3 amp 4 2000 2013H RISM Int Vect EPROM User Int Vect RAM NOT TRAP 2014 202FH RISM RISM Data RAM 2030 203FH RISM Int Vect EPROM User Int Vect RAM NOT NMI 2040 207FH Unused RISM EPROM User Data RAM 2080 27FFH RISM Monitor EPROM User 16 Bit Code Data RAM 2800 5FFFH 16 Bit Code Data RAM User 16 Bit Code Data RAM 6000 7FFFH 8 Bit Code Data RAM User 8 Bit Code Data RAM 8000 FFFFH Unused Unused User expansion possible Seject MCS 96 MACRO ASSEMBLER ERR LOC OBJECT A000 A000 A002 A004 A006 A008 00 00 010 012 0040 0041 0042 0043 0044 0045 0046 0047 3B1D 0048 A018 A018 FF A030 A030 A032 A034 A036 A038 A03A 0049 4 0048 004C 004D 004E 004F 0000 EV96 LINE 254 255 256 253 258 2
87. d value This form is used to set an individual WORD variable without first checking its cur rent value When invoked this command sets the ODD variable at word address to word value WORD word address TO word address gt This form is used to display a region of memory as a sequence of WORD vari ables When this command is invoked iECM 96 will start by displaying the current default base and then a series of lines showing the contents of the selected memory region If a symbol exists in 965 symbol table for the next word address then this symbol will be displayed Whether or not the symbolic display happens the next line will start with a hexadecimal display of the address of the next WORD variable to be displayed followed by the display of up to 16 bytes of memory as WORD variables in the default base new line will be started whenever 16 bytes of memory have been displayed on the line or a valid symbol exists in iECM 96 s symbol table for the next word address to be displayed The command termi nates when all of the WORD variables in the selected range have been displayed During lengthy displays you can stop the output to the console by hitting the SPACE bar Display can be resumed by hitting the SPACE bar a second time The com mand can be terminated by entering a carriage return WORD word address TO word address word value This form is used to initialize a region of memory t
88. e The com mand can be terminated by entering a carriage return DWORD dword address TO dword address dword value This form is used to initialize a region of memory to the given dword value Note that this command will take little over a millisecond 9600 baud for each DWORD loaded This command can be terminated by entering a carriage return but this leaves only part of the memory region initialized EV80C196KB Microcontroller Evaluation Board User s Manual 41 REAL Commands There are four basic forms for the REAL commands REAL real address REAL real address real value REAL real address TO real address REAL real address gt TO real address real value All of these commands can be used whether or not the user s program is running REAL real address This form is used to examine and then possibly change one or more sequential REAL variables When this command is invoked iECM 96 will display the real address symbolically if a valid symbol exists for that real address Whether or not the symbolic display occurs iECM 96 will display the real address hexadecimal notation the value of the REAL in the default base and wait for an input from you You can respond with a CARRIAGE RETURN character an ESC character or by entering a numeric value A CARRIAGE RE TURN will terminate the command An ESC will result in the display of the next sequential REAL var
89. e TEMP declared by MODULE1 would be MODULE1 TEMP PLM 96 or C 96 line numbers be called out by a pound sign 2 followed by the line number Symbolic Output The symbolic output routines in general deal oniy with address information They will not try to convert data values into symbolic form When the symbol table is searched for a symbol name to associate with a given value the routines also per form type checking If one and only one symbol matches both the type and value of the address being displayed then the output routines will display the symbol name along with the numeric value of the address If more than one label has been as signed to a given address then the symbolic output routines will ignore all of them The exception to this rule occurs when the disassembler finds multiple labels as signed to a given code address The disassembler will display all the known sym bolic labels attached to a code address If the symbols table gets very large the symbolic output routines will become pain fully slow particularly on an 8088 based PC This problem can be avoided by using modular programming and translating a subset of the modules in the debug mode Another alternative is to use the SYMBOLS OFF command to suppress symbolic output Symbolic input is not affected by this command EV80C196KB Microcontroller Evaluation Board User s Manual 25 Controlling Lengthy Commands Most of the commands supported by iECM 96
90. e address to be used for reading and writing target memory RISM STAT RISM STAT is an 8 bit register used to store RISM status and state information This register contains the following Boolean flags DLE FLAG This flag indicates the next character received by the RISM should be treated as a data byte even if its value corresponds to an implemented command RUN FLAG This flag indicates that the target is running user code TRAP FLAG This flag indicates that the target was running user code but that a software TRAP occurred which suspended its execution DIAGNOSTIC FLAG This is optional that indicates that the target is operating diagnos tic mode The details of this are implementation dependent 1 USER USER is used to save the user s program counter while the user s code is not executing USER PSW uM USER PSW is used to save the user s program status word while the user s code is not executing Other Variables 7 Specific implementations of RISMs will require other variables to be used for tempo rary storage 48 EV80C1 96KB Microcontroller Evaluation Board User s Manual RISM Structure The RISM resides in the target system and provides the interface between the target system and the user interface which resides in the host system A design goal of the RISM was to keep it compact and simple This serves two purposes 1 The RISM can
91. ect 01 24 89 13 55 41 PAGE 25 MCS 96 MACRO ASSEMBLER ERR LOC 807C 807C 8081 8081 8086 8086 808D 808D 8090 8097 8097 OBJECT 03034 23434 301202030 3A3807 A301202030 A3180230 EV96 LINE 910 911 912 913 914 915 916 919 920 921 922 923 924 925 926 929 930 931 932 933 934 935 938 939 940 941 942 943 944 945 946 949 950 951 954 955 SOURCE STATEMENT LOAD ADDRESS b am o RISM ADDR RISM DATA ld RISM ADDR EXIT RISM INDIRECT ADDRESS RISM ADDR RISM ADDR 14 RISM ADDR EXIT RISM WRITE PC user DATA st RISM DATA EXIT RISM READ PC RISM DATA user pc bbs RISM STAT ld RISM DATA EXIT RISM rpc running ld RISM DATA EXIT RISM Seject RISM DATA 5 ADDR Assumes user is not running USER PC RUN FLAG rpc running USER PC 2 sp 01 24 89 13 55 41 If user code is not running If user code is running 26 MCS 96 MACRO ASSEMBLER ERR LOC 809D 809D 80A0 80A7 80 80B3 80B3 80BA 80BA 80BD 80 0 OBJECT 3A3807 A301222030 A21830 C301222030 4504001830 C01830 E78D1C 0000 0001 0002 80CO 80C4 80C9 80CD 80D2 80D8 A1010030 323802274A A1020030 3138022741 A1000030 96 LINE 356 357 958 959 960 961 962
92. ed to make it easier to use this capability and then go back and sort out the data from several debug sessions with a text editor The commands involved in include log and list operations are INCLUDE filename PAUSE LIST p filename LOG filename LISTOFF LISTON LOGOFF LOGON Three of these commands require you to supply a valid file name the rest use the appropriate file name that has already been entered INCLUDE filename This command will attempt to open filename as a read only file If the file can be opened then the command parser will take commands from that file until the end of the file is reached The include file will then be closed Only one include file will be opened at a time EV80C196KB Microcontroller Evaluation Board User s Manual 31 PAUSE This command is documented in this section because it is intended to be used as part of INCLUDE files It is not really a file oriented command itself When this command is entered the iECM 96 will stop parsing commands until a SPACE char acter is entered from the keyboard it can t come from an INCLUDE file This pro vides a method of pausing in the middle of an INCLUDE file operation until you have a chance to see what s going on and the pause condition by depress ing the SPACE bar LIST This command behaves like the LIST filename command described below except that it uses the last filename that was entered as part of a LIST filen
93. entering a carriage return but this leaves only part of the memory region initialized EV80C196KB Microcontroller Evaluation Board User s Manual 39 WORD Commands There are four basic forms for the WORD commands WORD word address WORD word address word value WORD word address TO word address WORD word address word address word value All of these commands can be used whether or not the user s program is running WORD word address This form is used to examine and then possibly change one or more sequential WORD variables When this command is invoked 96 will display the word address symbolically if a valid symbol exists for that word address Whether or not the symbolic display occurs iECM 96 will display the word address in hexadecimal notation the value of the WORD in the default base and wait for an input from you You can respond with a CARRIAGE RETURN character an ESC character or by entering a numeric value A CARRIAGE RE TURN will terminate the command An ESC will result in the display of the next sequential WORD variable If a numeric value is entered then the WORD variable will be set to this value and the iECM 96 will again wait for input At this point you can respond only with an ESC or CARRIAGE RETURN As before the ESC will display 22 next sequential WORD and the RETURN will terminate the comman WORD word address wor
94. g if you don t understand the following paragraphs The iECM 96 software uses two words in the user s stack to store the PC and PSW during a host interface interrupt When the user displays the SP or uses the STACK command the value shown for SP is adjusted by 4 bytes to compensate for this overhead so that it becomes more or less invisible to the user the user must still allow for the extra stack space used This is convenient but creates confusion if you display using the SP command and then use the WORD command to look at is the register address of the stack pointer Location 18H will be 4 less than SP An additional consideration is what happens when you attempt to write into the stack pointer using the SP command Before returning from the RISM interrupt service routine ISR which actually updates the stackpointer the RISM places in the stack a return address and associated PSW for the idle loop it executes while the target is stopped This prevents the target from getting lost upon return from the ISR You should not attempt to modify the stack pointer from the console through the use of its register address 18H it should only be modified by the SP commands or by execution of user code in the target This decreases the possibility of the target getting confused Specific implementations of the RISM may actually prevent the user from writing into WORD 18 and thereby force the user to use the SP command
95. host software is invoked in the diagnostic mode it will tell you to enter characters on the keyboard These characters will be sent to the target and the response from the target will be displayed on screen This is a simple confidence check on the serial communication channel You are told to enter a slash or re verse slash to terminate this mode and proceed in either the diagnostic mode or the normal user s mode If the user interface is invoked without the DIAG option it will immediately transmit a reverse slash which should put the target in the normal mode Systems which do not implement the diagnostic mode will load the reverse slash into the RISM _ DATA register where it will languish till more useful data is sent by the host 8096 8096BH C196KB These three options control the single line assembler and the disassembler in the 96 If the 8096 8x9x 90 or 8096 8x9xBH options are selected then the additional instructions in the 80C196KB will be considered invalid for both the single line assembler and the disassembler If none of these options are selected then the iECM 96 will default to C196KB mode NOTYPES This option will cause the obiect file loader to ignore type definition records in the object module If this is invoked then the symbolic routines will only recognize basic data types such as BYTEs WORDs and LONGs More complex data types such as PLM arrays and structures will not be recognized This option
96. iable If a numeric value is entered then the REAL variable will be set to this value and the iECM 96 will again wait for input At this point you can respond only with an ESC or CARRIAGE RETURN As before the ESC will display the m sequential REAL and the CARRIAGE RETURN will terminate the com mand REAL real address real value This form is used to set an individual REAL variable without first checking its current value When invoked this command sets the REAL variable at real address to real value REAL real address TO real address This form is used to display a region of memory as a sequence of REAL variables When this command is invoked iECM 96 will display a series of lines showing the contents of the selected memory region If a symbol exists in iECM 96 s symbol table for the next real address then this symbol will be displayed Whether or not the symbolic display happens the next line will start with a hexadecimal display of the address of the next REAL variable to be displayed followed by the display of up to 16 bytes of memory as REAL variables in the default base A new line will be started whenever 16 bytes of memory have been displayed on the line or a valid symbol exists in iECM 96 s symbol table for the next real address to be displayed The command terminates when all of the REAL variables in the selected range have been displayed During lengthy displays you can stop the output to the
97. ioportl if they are enabled 5 Py it will terminate immediately ld fl 160 bbc bbc fl loopl shl stb fl waiti quit Seject bbc bbc cmp bne cmp bne br ldb ret rism addr 1081 5 fl 0 1081 5 5 rism addr 1 rism addr 1 ioportl ios1 5 fl waitl 1081 5 5 char zero quit rism addr zero fl loopl flash leds ioportl char This is useful to see if the board is executing code properly is received from the host while this routine is executing sm ee es ee didi didi wait for a timerl overflow twice shift another 1 into or out of ioportl wait for a timerl overflow e twice check if char has been received if so exit else continue flashing pattern if char was received restore it MCS 96 MACRO ASSEMBLER EV96 ERR LOC A200 A200 A200 A203 A205 A207 A209 A20B A20F A20F A212 A215 A217 A21A A21C A21E A21E A220 A220 A224 A226 22 A22C 22 A231 A233 A233 A237 OBJECT 10116 011C 0122 011 110 1002820 6201 9A211C D71C 301 04 151 2002 171 89008020 D7E9 A1002820 071E 170F 00 17 27DC AlFFFF22 27FE LINE 588 589 590 591 592 593 594 595 596 597 598 599 600 601 602 603 604
98. is included because early versions of the host software got confused while loading certain type definition records generated by C 96 These problems have fixed but the option was left in case similar problems remain 80 196 Microcontroller Evaluation Board User s Manual 27 POLL SIGNAL These two options control how the host software detects whether or not the user s code is running f poll mode is selected then the host will periodically poll the target with a REPORT STATUS command This takes no additional hardware but forces the target to waste instruction cycles responding to the poll The signaling mode avoids this overhead but requires that the target set the Ring Indicator modem control line whenever it is running user code The user interface will then check this line before it issues a REPORT STATUS command If neither of these options is selected then the signal mode is selected as a default On the EV80C196KB the OUT 142 pin of the 82510 is used to generate this running signal Therefore the signal mode is recommend RESET SYSTEM RES SYSTEM RESET 5 This command and its abbreviations will reset the entire target hardware system if the target system is implemented to support this operation On the EV80C196KB jumper shunt E20 must be installed from B to C for this command to work properly This command operates by dropping the DTR modem control line This comes into the target as DSH After dro
99. kpoint 15 20a6 pause Hit the space bar to continue DI 7 BREAKPOINT 15 PAST pause the space bar to continue concludes the demo we hope you enjoy using the EV80C196KB board the space bar to continue QUIT and carriage return to exit iECM 96 intel ALABAMA Intel Corp 600 Boulevard South suite 104 L Huntsville 35802 Tel 205 883 3507 FAX 205 883 3511 ARIZONA Corp 410 North 44th Street Suite 500 Phoenix 85008 Tel 602 MI 0388 FAX 602 2440448 CALIFORNIA tinte Corp 21515 Vanowen Street Suite 116 Canoga Park 91303 Tel 818 704 8500 FAX 818 340 1 144 Intel Corp 1 Sierra Gate Plaza Suite 280C Roseville 95578 Tel 918 782 8086 FAX 918 782 8153 Corp 9665 Chesapeake Dr Suite 325 San Diego 92123 Tel 619 292 8086 FAX 619 292 0628 1intel Corp 400 N Tustin Avenue Suite 450 Santa Ana 92705 Tel 714 835 9642 TWX 91 595 1 114 FAX 714 541 9157 tintel Corp San Tomas 4 2700 San Tomas Expressway 2nd Floor Santa Clara 95051 Tel 408 986 8086 TWX 91 o 338 0265 FAX 1408 727 2620 COLORADO Intel Corp 4445 Northpark Drive Suite 100 Colorado Springs 80907 Tel 719 FAX 303 594 0720 tintel Corp 600 S Cherry St Suite 700 Denver 80222 Tel 303 321 8086 TWX 910 931 2289 FAX 303 322 8670 CONNECTICUT on 301 Lee Fem Corporate Park 83 Wooste
100. l 5 S twice 12 95FFOF 401 xorb ioporti 0ffh invert ioportl 12 27F5 402 br diag pause loop 403 404 Seject MCS 96 MACRO ASSEMBLER ERR LOC OBJECT A130 A130 A136 A139 1 1 A141 A144 A149 303803E7FCDE 991F36 D103E7F7DE AC3636 643636 A3374C2136 E336 EV96 LINE 405 406 407 408 409 410 411 412 413 414 415 416 417 418 419 420 421 01 24 89 13 55 41 12 SOURCE STATEMENT This code is executed to interpret a host command when this RISM is in the diagnostics mode diag mode bbs cmpb bh diag command Seject ldbze add 19 br o p wer uma c MR ms am m eee Hu ee 4 2 m mm mm RISM STAT DLE FLAG force load data char check if byte is a command load data commands lt tempw char table lookup tempw tempw tempw diag table offset tempw tempw MCS 96 MACRO ASSEMBLER ERR LOC Al4C 14 14 150 152 154 156 158 15 15 15 160 162 164 166 168 16 16 16 170 172 174 176 OBJECT 3000 1300 4200 1300 5100 5C00 6100 6A00 6 00 7400 7000 8100 B421 C121 B300 CE21 A621 A121 7821 8D
101. loads the PC Program Counter associated with the user s code from the DATA register The host software will only invoke this command while user code is not running START USER Code 0x12 This command is responsible for TELE the execution of user code clearing the TRAP FLAG and setting RUN FLAG The action of this command relies on it being executed as part of an ISR interrupt service routine At the start of the ISR the current PC and PSW are pushed into the stack If the user code is not running the PC and PSW which are pushed into the stack will be associated with an idle loop which the RISM runs while it waits for an interrupt The START USER command deletes the PC and PSW from the stack and replaces them with USER PC and USER PSW When control returns from the ISR the user s code will execute rather than the idle loop The host software will not issue a GO command if the user code is already running STOP USER code 0x13 This command is responsible for stopping the execution of user code and clearing the RUN_FLAG The action of the HALT command mirrors that of the GO com mand In the case of the HALT command the user s PC and PSW are pushed into the stack upon entry to the ISR The STOP_USER command saves this user infor mation in USER_PC and USER_PSW and replaces it with PC and PSW values which are associated with the idle loop When control returns from the ISR the idle loop will execute rather than the user s code The ho
102. ly Connector Figure 10 19 25 pin to 9 pin Adapter Figure 11 20 INTRODUCTION TO iRISM iECM96 21 SU 2 T 22 OVERVIEW TC r thet uae REDE 23 Embedded Controller 23 _ 24 Background Inforimatiolt nie o beret or Eoo leet ten bea 24 Initiating and Terminating iECM 96 25 Default Base Commands 28 FIEE OPERATIONS HUI ERU DNE 29 Loading and Saving Object Code 29 Other File eene nnns 30 PROGRAM CONTROL eae a E 32 Resetting the Target M 32 32 Program Execution 33 Program SICDDING 2 54 Ios 35 DISPLAYING AND MODIFYING PROGRAM VARIABLES 37 Supported Data Types EN 37
103. male 7 82516 ovcc RESETs gt RESET RXBI CINits lt INISAE EV8 C 196KB ECO App ications Enginaering Title Document Number REV ain e v Ga deb C 428 Vm v s MAU mh dem Ph 09 66 GP M AR oum m oh UNUSED GRTES ALL TRACES IN THIS SECTION TO BE ON SOLDER SIDE OF BORRD RLL CONNECTIONS TO VCC MRDE BY CUTTRBLE TRRCES U2E vcc vcc 7 14 U2F 74RC14 vec 74AC86 14 88 14c89 ee tw m rn eve ad mm mo m emm sa er ON BB IN Qi da mem Item dir ma 0H uv GE do Re M VE qe eii m v S m m DECOUPLING CAPS SHOULD PLACES AS CLOSE RS POSSIBLE TO DEVICE PINS INDICATEO HERE 4 1 i 1 4 1 i t 1 i I 1 1 1 L t t t V t t 1 1 t 1 1 1 1 1 1 t 1 1 1 1 1 4 1 I d vcc c29 T T c33 C35 EV8 C 196KB B88C198KB Evaluation Board t t i 3 t t 4 t 1 1 t t i i 1 1 1 1 1 t Document Number REV Exp Buses Spere Gates k 1
104. mmand string LOAD filename This command loads the content records of the object file filename into the target memory and loads any associated symbolic information into a symbol table main tained in the host system s memory LOADSYM filename This command loads the symbolic information from filename into the symbol table maintained in the host system but does not load the content records into the target s memory This command is useful when you have left a debug session with the target still running a program that has been loaded At a later time you can re invoke iECM 96 and interrogate the running program without stopping it The LOADSYM command allows the use of the symbolic information contained in the object file without reloading the content records Content records cannot be loaded while the target is running SAVE lt addr gt IN filename This command saves a region of memory as an object file which can be reloaded into the target memory at some latter time No attempt is made to include any symbolic information which may have been in the symbol table maintained in the host system 30 EV80C196KB Microcontroller Evaluation Board User s Manual Other File Operations In addition to object files the iECM 96 makes use of include files log files and list files Include files contain commands to be executed by iECM 96 they must contain the exact sequence of ASCII characters that yo
105. nal WAIT is generated based on the rising edge of CLKOUT However the 80C196KB needs to have a valid signal i s READY input pin until the falling edge of CLKOUT Therefore it was necessary to clock WAIT through a negative edge triggered JK flip flop U15A by the falling edge of CLKOUT to generate a signal called WAITN As in the WAITN is asserted asynchronously while ALE is high and WAIT is asserted After ALE goes low WAITN will remain asserted until is deasserted and the flip flop is clocked Besides the WAIT signal the signal can be asserted by the USEREADY signal from the expansion bus As shipped the EPLD has the following configuration Enable Memory States Signal in User Mode ROMsim RAM 2000H 5FFFH ROMsim RAM 6000H 7FFFH Monitor EPROM 0 FFH 1D00H 1DFFH 82510 UART 1E00H 1EFFH Unimplemented 100H 1CFFH CO00H FFFFH Unimplemented 8000H BFFFH EV80C196KB Microcontroller Evaluation Board User s Manual 14 ea oE So C 5 2 33 Sag v ogg gt 099 Od 2 251 lt lt 253 bcm O lt e e e N 9 z Sho A 29558 5 gt 5 Quigg roscoe gt gt 5 gt O x c x 5 700 lt 8 lt a ni lt lt ul tu SSS N
106. nment rule is enforced it must start at an address which is evenly divisible by 4 This more restrictive alignment rule will only apply to 96 commands when using the single line assembler REAL A REAL is a 32 bit binary floating point number which conforms to the FPAL96 definition The 32 bits contain a sign bit an 8 bit exponent field and a 23 bit fraction field iECM 96 commands use standard scientific notation to deal with REAL num bers Note that the FPAL96 has special representations for infinity and for NaN s Not a Number used to signal error conditions if iECM 96 detects one of these special values it will output an appropriate text string instead of trying to display the value in scientific notation STACK A STACK variable is a 16 bit variable which resides in the system stack The ad dresses of stack variables stack are taken to be relative to the current stack pointer and must be word aligned STRING A STRING is a sequence of ASCII characters which are terminated by the NUL character The ASCII character NUL has the binary value of zero In addition to supporting access to variables of the above types iECM 96 also provides commands to access the special program variables PC program counter PSW program status word and SP stack pointer These commands are dis cussed at the end of this section under the heading Processor Variables 38 EV80C196KB Microcontroller Evalua
107. o the given word value Note that this command will take a little over a millisecond at 9600 baud for each WORD loaded This command can be terminated by entering a carriage return but this leaves only part of the memory region initialized 40 EV80C196KB Microcontroller Evaluation Board User s Manual DWORD Commands There are four basic forms for the DWORD commands DWORD dword address DWORD dword address dword value DWORD dword address TO dword address DWORD dword address dword address gt dword value All of these commands can be used whether or not the user s program is running DWORD dword address This form is used to examine and then possibly change one or more sequential DWORD variables When this command is invoked iECM 96 will display the dword address symbolically if a valid symbol exists for that dword address Whether or not the symbolic display occurs iECM 96 will display the dword address in hexadecimal notation the value of the DWORD in the default base and wait for an input from you You can respond with a CARRIAGE RETURN character an ESC character or by entering a numeric value A CAHRIAGE RE TURN will terminate the command An ESC will result in the display of the next sequential DWORD variable If a numeric value is entered then the DWORD vari able will be set to this value and the iECM 96 will again wait for input At this point you can respond
108. only with an ESC or CARRIAGE RETURN As before the ESC will display 4 next sequential DWORD and the CARRIAGE RETURN will terminate the command DWORD dword address dword value This form is used to set an individual DWORD variable without first checking its current value When invoked this command sets the DWORD variable at _ dword address to dword value DWORD dword address TO dword address This form is used to display a region of memory as a sequence of DWORD vari ables When this command is invoked iECM 96 will start by displaying the current default base and then a series of lines showing the contents of the selected memory region If a symbol exists iECM 96 s symbol table for the next dword address then this symbol will be displayed Whether or not the symbolic display happens the next line will start with a hexadecimal display of the address of the next DWORD variable to be displayed followed by the display of up to 16 bytes of memory as DWORD variables in the default base A new line will be started whenever 16 bytes of memory have been displayed on the line or a valid symbol exists in IECM 96 s symbol table for the next dword address to be displayed The command termi nates when all of the DWORD variables in the selected range have been displayed During lengthy displays you can stop the output to the console by hitting the SPACE bar Display can be resumed by hitting the SPACE bar a second tim
109. ort 14450 Tet 716 425 2750 TWX 510 253 7391 FAX 716 223 2561 tintel Corp 2950 Express Dr South Suite 130 Islandia 11722 Tel 516 231 3300 TWX 510 227 6236 FAX 516 348 7939 tintel Corp 300 Westage Business Center Suite 230 Fiihkill 12624 Tel 914 897 3860 FAX 914 897 3125 OHIO tIntel Corp 3401 Park Center Drive suite 220 Dayton 45414 Tel 513 890 5350 TWX 61 0 450 2526 FAX 513 890 8658 tinte Corp 25700 Science Park Dr Suite 100 Beachwood 44122 Tel 216 464 2736 TWX 81 O 427 9296 FAX 604 282 0673 OKLAHOMA Intel NE 6801 N Broadway Suite 115 Oklahoma Cii 73182 Tel 405 848 8086 FAX 405 840 9819 OREGON Corp 15254 N W Greenbrier Pkwy Building B Beaverton 97006 Tel 503 8458051 TWX 910 467 8741 FAX 503 6458181 PENNSYLVANIA tintel Corp 925 Harvest Drive Suite 200 Blue Bell 19422 Tel 215 641 1000 FAX 215 641 0785 tintel Corp 400 Penn Center Blvd Suite 610 15235 412 8234970 FAX 412 829 7578 PUERTO RICO Tintel Corp South Industrial Park P O Box 910 Las Piedras 00671 Tel 809 733 8616 SOUTH CAROUNA Intel Corp 100 Executive Center Drive Suite 109 Greenville 29815 Tel 803 297 8086 FAX 803 297 3401 TEXAS Corp 8911 N Capital of Texas Hwy Suite 4230 Austin 78759 Tel 512 794 8086 FAX 512 338 9335 tintel Corp 1
110. pping DTR the iECM 96 software will wait about 1 second to allow the target to complete its initialization routines The iECM 96 will politely warn of this time delay and then ignore the user until it expires Unless special precautions are taken in the design of the target system any data in RAM including downloaded object code may be corrupted by the reset On the EV80C196KB the RAM contents should not be affected by a RESET DOS This command enables you to temporarily leave iECM 96 and return to DOS Once you have suspended iECM you may perform other functions in DOS including using other software programs such as ASM 96 as long as there is sufficient mem ory to do so To reenter iECM type exit at the DOS prompt iECM will return with all conditions in effect at the time it was suspended QUIT is This command will close any files that IECM 96 has opened and exit to DOS Note that this command can be used even if the target is running iECM 96 sets the selected COM port to 9600 baud 8 bits no parity and one STOP bit The port will be left in this state by iECM 96 when control is returned to DOS 28 EV80C196KB Microcontroller Evaluation Board User s Manual Default Base Commands These commands are used to set the default base for numeric input and output The valid bases are 16 hexadecimal 10 decimal and 8 octal The default base is used to display variables It is not used to display addresses which are
111. r Heights Rd Danbury 08610 Tel 203 748 3130 FAX 203 794 0339 FLORIDA Beach 33441 Tel 305 421 0506 FAX 305 421 2444 TSales and Service Office Field A amp cation Location NORTH AMERICAN SALES OFFICES tinte Corp 5850 T G Lee Blvd Suite 340 Orlando 32822 Tel 407 240 8000 FAX 407 240 8097 GEORGIA tintel Corp 20 Technology Parkway Suite 150 Norcross 30092 Tel 404 449 0541 FAX 404 605 9762 ILLINOIS tintel Corp Woodfield Corp Center 300 N Martingale Road Suite 400 Schaumburg601 73 Tel 708 605 8031 FAX 706 706 9762 INDIANA tIntel Corp 8910 Purdue Road Suite 350 Indianapolis 46268 Tel 317 875 0623 FAX 317 875 8938 MARYLAND Corp 10010 Junction Dr Suite 200 Annapolis Junction 20701 Tel 410 206 2860 FAX 410 206 3678 MASSACHUSETTS Corp Westford Corp Center 3 Carlisle Road end Floor Westford 01888 Tel 508 692 0960 TWX 710 343 6333 FAX 508 692 7867 MICHIGAN tIntel Corp 7071 Orchard Lake Road Suite 100 West Bloomfield 48322 Tel 313 851 8096 FAX 313 851 8770 MINNESOTA Corp 3500 W St Suite 360 Bloomington 55431 Tel 612 835 6722 TWX 910 576 2867 FAX 812 631 6497 NEW JERSEY tinter Lincroft Center 125 Hall Mile Road Red Bank 07701 Tel 908 747 2233 FAX 908 747 0983 NEW YORK Intel Corp 850 Crosskeys Office Park Fairp
112. r a reset the board goes through initializations and a shift ing pattern is displayed on the Port 1 LEDs when initialization has completed prop T Connecting to your PC Once you have applied power to the board you need to connect P1 to a PC serial port P1 is configured to interface pin to pin with a standard AT type serial connector see figure 5 for pinout Make certain that you use a cable provid ing all nine signals as they are all needed for proper operation of the host interface When you have connected the cable you may observe that the 80 196 is held reset and all the LEDs turn on This is because one of the host signals is used to reset the part and the signal is often in a reset condition prior to invoking the host software on your PC Note if you have 25 pin serial port it will be necessary to make 25 pin to 9 pin adaptor see figure 11 for details Starting the Host Software After the you have made both connections to the board you can invoke the host interface Install the disk in drive of your system At the DOS prompt type A ECM96 lt CR gt Your PC should eventually display the iECM 96 monitor screen If you have problems please refer to the sub section Initiating and Terminating iECM 96 in the USER INTERFACE section of this manual For further details on using the monitor refer to the USER INTERFACE section 10 80 196 Microcontroller Evaluation
113. r number 270634 001 Memory There are five 28 pin memory sockets provided on the EV80C196KB board U1 U6 08 013 and U14 The sockets are designed to support byte wide JEDEC pinout memory devices of various types and sizes i e 8K x 8 SRAM or 16K x 8 EPROM U1 and U8 U6 and U13 are connected as two 16 bit memory banks and U14 is connected as an 8 bit memory bank EV80C196KB Microcontroller Evaluation Board User s Manual 11 Enable Memory Signal Type 8K x 16 bit Monitor EPROM from 0 and 1D00 1DFFH 8K x 16 bit ROMsim RAM from 2000H 5FFFH 8K x 8 bit ROMsim RAM from 6000H 7FFFH See appendix B and appendix C for details on reserved areas of memory Host Interface The PC host interface is accomplished with the 82510 UART U20 connected to P1 via RS 232 drivers The UART resides in the address range 1 1EFFH Therefore register 0 in the UART would be at address 1E00H of the 80C196KB reg 1 would be at 1E01H reg 2 would be at 1E02H etc up to reg 7 at 1E07H The registers will repeat again with reg 0 at 1E08H due to the limited decoding granularity of the EPLD Pin 12 of the UART 1 is used to tell the PC host when the 80C196KB is executing user code by a true level on the Ring Indicator input of the host serial port E Digital With the exception of the NMI input which is used by the Host Interface Digital O functions of the 80C196KB are available to you There are eight
114. rd word byte byte byte byte byte byte byte byte byte word This section defines utility macros Ma m am men sam man ma ma aaa a e e a e e eri terme ts hh nl or My zero Register A to D command register Low byte of result and channel High byte of result Controls HSI transition detector HSI time tag HSO time tag HSI status register reads fifo HSO command tag Serial port buffer Interrupt mask register interrupt pending register Serial port control register Serial port status register Watchdog timer Timerl register Timer2 register I O port 0 Baud rate register I O port 1 I O port 2 I O control register 0 HSI O I O status register O0 I O control register 1 Port2 I O status register 1 PWM control register System stack pointer non specific to this program regnum 1 SHL bitnum mod 8 regnum bitnum regnum not 1 SHL bitnum mod 8 label label 2 MCS 96 MACRO ASSEMBLER ERR LOC OBJECT 8000 0000 EV96 LINE 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 2114 115 116 117 118 119 120 121 122 123 124 125 126 127 a SOURCE STATEMENT 01 24 89 13 55 41 PAGE This section contains EQUates which may change with different versions iu a a a
115. re to enter the SLA mode The assembly program counter APC will be set to code and lines of assembly language entered by the user will be converted to object code and loaded into the target s memory iECM 96 will complain if erroneous inputs are made but will remain in the p mode is terminated by entering the only directive understood by the This command operates identically to ASM code addr command except that the APC is not initialized If this is the first time that the SLA has been used then APC will be set to 2080H if it is not then APC will point at the byte following the last instruction generated by the SLA EV80C196KB Microcontroller Evaluation Board User s Manual 45 Disassembly Commands The disassembler converts binary object code in the target memory to ASM 96 mnemonics There are several commands which invoke the disassembler DASM DASM count DASM code DASM code addr count DASM code gt TO code These commands are useful for examining a portion of the program for which list ings are not available or for checking program patches and can be used whether or not user code is running DASM i This command disassembles the instruction currently pointed to by the user s pro gram counter PC DASM count 23 This command reads the current value of the user s program counter and disassembles count instru
116. reside in a user s system with minimal impact on available memory 2 RISM is easy to port into the target s environment The goals were met by keeping the internal state structure of the RISM as simple as possible There are only three internal flags which can change the way that the RISM deals with a character sent by the host DLE FLAG If this flag is set then the next received character is assumed to be a data byte as opposed to a command byte RUN FLAG This flag is set if the target is running user code It can modify the operation of some of the RISM commands TRAP FLAG This flag is set if the user code has been halted because it executed a TRAP instruction The TRAP FLAG is cleared whenever the RISM starts the execution of user code Receiving Data from the Host When the RISM receives a character from the host its first task is to determine if it represents a command or data the character is less than 32 decimal then it is assumed to be a command if not then it is taken to be data If the host needs to send a data byte which has a value less than 32 then it first must issue a SET DLE command If the DLE FLAG is set then the next character received by the RISM will be interpreted as data even if it is less than 32 and then the DLE FLAG will cleared Once the RISM has determined that the received character is a data byte it processes it by shifting the 32 bit RISM DATA register left eight places and then
117. rget system The advantage of this approach is that the ECM can be readily adapted to different target systems and requires only a small part of the available target memory space The disadvantage is that the user interface must be provided by a personal computer The structure of the RISM is a short section of initialization code and an interrupt service routine ISR that processes interrupts from the host system The RISM ISR consists of a short prologue and then a case jump to one of 20 to 25 command executors These executors are simple and short the flow though the entire ISR including the prologue is 15 20 instructions The serial communication occurs at 9600 baud which limits the frequency of these interrupts to 1 Khz In the worst case the EV80C196KB board will be slowed by the execution of a fairly short RISM ISR every millisecond while executing user code It is possible to operate the EV80C196KB board so that no real time is lost to the iECM 96 unless the user is actively interrogating the target See the section Initiating and Terminating the SEM and the description of the RISM REPORT STATUS command for details on this 24 EV80C196KB Microcontroller Evaluation Board User s Manual USER INTERFACE The user interface to the iECM 96 supports commands to initiate and configure the ECM 96 perform operations involving DOS files execute user programs and interrogate variables in the target system Interrogation can
118. roller Evaluation Board User s Manual 29 FILE OPERATIONS iECM 96 uses files in the host system to load and save object code enter prede fined strings of commands to keep a log of commands that are entered by the user and to keep a record of an entire debug session which includes both the characters entered by the user and the response generated by iECM 96 on the host screen The commands which operate with files are described in the following sections Loading and Saving Object Code iECM 96 accepts object files which are generated by Intel s development tools iECM 96 will not accept files which contain unresolved externals or files which con tain relocatable records These files must be passed through RL 96 in order to resolve the externals and or absolutely locate the relocatable segments iECM 96 will also not accept HEX format files There is a utility on the disk HEXOBJ EXE for converting HEX format files to Intel object format files loadable by iECM 96 While still in DOS type HEXOBJ lt filename gt hex CR to convert lt filename gt hex to a usable format for iECM 96 HEXOBJ does not attempt to con vert any symbolic information contained in the HEX file The iECM 96 commands which operate on object files are LOAD filename LOADSYM filename SAVE addr TO addr IN filename The metasymbol filename means that a valid MS DOS file name must be entered in that position of the co
119. ry space after reset This allows the RISM code to gain control on reset and after the initialization routines are complete remap memory so that user code can be loaded into RAM at the reset location 2080H 11 The serial link is provided by external UART 82510 with the received 12 data interrupt tied to the NMI Non Maskable Interrupt of the processor 13 The use of the NMI for this purpose allows the user to maintain control 14 of the system even if the running program locks out the interrupts or 15 modifies the mask register 16 f 17 In addition to the NMI and its vector this RISM uses the following 18 resources 19 20 Two words in the system stack 21 22 The TRAP instruction and its vector 23 24 External memory partitions 0000 00 25 1DOOH 1EFFH and 26 2014 202 27 28 Note that all of these partitions except 1000 1 and 29 2018H are reserved by the 5 96 architecture 30 21 Nine bytes of registers in the partition 30H 38H The 32 user must ensure that no registers in this partition are used 33 by code which is to operate with the RISM The easiest way of 34 2 doing this is to generate an 5 96 module which declares 35 2 RSEG at 30H which is nine bytes long This module can then be 36 linked into the final program to prevent the linker from assigning 37
120. similar to stepping except that interrupts are not artificially sup pressed Also an interrupt service routine or a subroutine call and the body of the subroutine that is called is treated as one indivisible instruction by the super step command This allows the user to ignore the details of subroutines and interrupt service routines while checking out code Every time an instruction is super stepped all the service routines associated with enabled pending interrupts will be executed This may allow limited stepping through code while operating in a concur rent environment but the system will not operate in real time A better approach is to use the GO command to execute to a specified breakpoint and then step through the code being tested looking for proper operation iECM 96 implements the step operation by using the TRAP instruction To step over a given instruction iECM 96 determines all the possible subsequent instructions and places TRAPS at these locations After doing this it allows the user s program to execute until it runs into one of these TRAPS and then restores all of the user code bytes which were overwritten with TRAPS If iECM 96 is to step over a conditional branch two possible subsequent instructions exist in the sequential code of the program Any other instruction can only have one next instruction A TRAP is also set at location 2080H in case the target is reset during the step Super stepping is accomplished by set
121. st software will not issue a HALT command unless the user code is running 22 EV80C196KB Microcontroller Evaluation Board User s Manual 51 TRAP ISR This is a pseudo command It can not be issued directly by the host software but is executed when a TRAP instruction is executed The TRAP instruction is used by 96 to implement software breakpoints and single stepping separate entry point into the STOP USER is provided for the TRAP vector Code at this entry point sets the TRAP FLAG and then drops into the code which implements the STOP USER command REPORT STATUS Code 0x14 This command loads the least significant word of the RISM DATA register with status information Valid status values are 0 Indicates that user code is stopped RUN FLAG and TRAP FLAG are both FALSE 1 Indicates that user code is running RUN FLAG is TRUE 2 Indicates that user code executed a TRAP instruction TRAP FLAG is TRUE The host software will periodically poll the target system to check on its status and this polling can rob execution time from the user s program This loss of target processor cycles can be avoided by setting the Ring Indicator modem status line signal whenever the RUN FLAG is set The host software will assume that the target is running user code whenever it detects the ring indicator and will only issue REPORT STATUS commands if the ring indicator is off MONITOR ESCAPE Code 0x15 This command provides for the addi
122. t operate when your code is in EPROM or other nonchange able memory Normally you should write your code to begin at address 2080H and download it to ROMsim using iECM 96 Two words of user stack space must be reserved for use by the iRISM 96 software while the board is processing a host interrupt Register locations 30H 38H are re served for use by the iRISM monitor code You must ensure that no registers in this partition are used by code which is to operate with the RISM The easiest way of doing this is to generate an ASM 96 module which declares an RSEG at 30H which is nine bytes long This module can then be linked into the final program to prevent the linker from assigning these registers to some other module You must not alter the TRAP vector at 2010H or the NMI vector at 203EH Memory from 2014H 202FH is reserved for use by the iRISM monitor Appendix Listing of iRISM 196KB MCS 96 MACRO ASSEMBLER EV96 01 24 89 13 55 41 PAGE DOS 3 20 038 MCS 96 MACRO ASSEMBLER 1 2 SOURCE FILE 96KBRISM A96 OBJECT FILE 96KBRISM OBJ CONTROLS SPECIFIED IN INVOCATION COMMAND DEBUG ERR LOC OBJECT E zZ t SOURCE STATEMENT EV96 module main dee c i M M Mie mam This file contains a RISM designed to operate the EV80C196KB evaluation board It includes the required RISM features and the optional diagnostic mode The board also supports remapping the memo
123. ther nonchangeable memory 80 196 Microcontroller Evaluation Board User s Manual 23 OVERVIEW Embedded Controller Monitor ECM An ECM Embedded Controller Monitor provides basic debug capability and is installed in your target system Capabilities include loading object files into system RAM examining and modifying variables executing code and stepping through code In the past most of these monitors have been configured to run with a stan dard dumb CRT with some form of auxiliary port for loading and saving object code from a host system It is now common for a personal computer to act as the host for program translation and also emulate a dumb CRT during user interaction with the ECM ECM developed for the MCS 96 family makes the assumption that the user interface will always be a personal computer no provision is made for interface to a dumb CRT By making this assumption it is possible to reduce the size and complexity of the code that must be installed in the target system A term has been coined for this code resident in the target RISM The term RISM stands for Re duced Instruction Set Monitor and is an obvious takeoff of the term RISC Reduced Instruction Set Computer used to describe a class of computer architectures The RISM consists of about 300 bytes of MCS 96 code which provide primitive opera tions Software running in the host uses the RISM commands to provide a complete user interface to the ta
124. ting TRAPS like the STEP except for CALL instructions which are treated as a special case During a STEP the iECM 96 will put the TRAP at the target address of a call during a super step the TRAP will be placed at the instruction following the CALL Interrupts are suppressed during STEP not SS operations by saving the user s El bit clearing it before the STEP occurs and then restoring it In order to make sure the instruction which is executed does not modify the EI bit several instructions PUSHF POPF PUSHA POPA DI are simulated by the iECM 96 software rather than being executed by the target processor The 80C196KB instruction IDLPD is also simulated during STEP to prevent the target from locking up The simulation treats the IDLPD as a two byte NO OP Note that the simulation of instructions only occurs during STEP opera tions During GO or SS command all instructions are executed by the target 36 EV80C196KB Microcontroller Evaluation Board User s Manual The iECM 96 commands which implement step operations are STEP STEP count STEP FROM code 227 FROM code lt count gt SS count SS FROM code SS FROM code count Aside from the style of the actual step operation the SS and STEP commands behave the same They will be described together and will be called single step ping STEP SS This command single steps one time STEP SS count
125. tion Board User s Manual BYTE Commands There are four forms for the BYTE commands BYTE byte address BYTE byte address byte value BYTE byte address TO byte address BYTE byte address TO byte address byte value All of these commands can be used whether or not the user s program is running BYTE byte address This form is used to examine and then possibly change one or more sequential BYTE variables When this command is invoked iECM 96 will display the byte address symbolically if a valid symbol exists for that byte address Whether or not the symbolic display occurs iECM 96 will display the byte address in hexadecimal notation the value of the BYTE in the default base and wait for an input from you You can respond with a CARRIAGE RETURN character an ESC character or by entering a numeric value A CARRIAGE HE TURN will terminate the command An ESC will result in the display of the next sequential BYTE variable If a numeric value is entered then the BYTE variable will be set to this value and the iECM 96 will again wait for input At this point you can respond only with an ESC or CARRIAGE HETURN As before the ESC will display the sequential BYTE and the CARRIAGE RETURN will terminate the com mand BYTE byte address byte value This form is used to set an individual BYTE variable without first checking its current _ value When invoked this command sets the BY
126. tion of RISM commands for special purposes it uses the RISM DATA register to extend the command set of the RISM The basic RISM requires only one of these extended commands if the lower 16 bits of the RISM DATA register is one RISM DATA OXXXX0001 H then the target proces sor should execute either a RST ReSeT instruction or a software initialization routine Start Up Commands or Upon reset the board is in the echo mode Until it receives an ASCII slash or reverse slash it should increment every character it receives from the host and send the incremented value back to the host It will also display the binary code of the character received on the Port 1 LED s If a reverse slash is received by the RISM it will leave the echo mode set USER MAP flag true remap memory and start normal operation If a slash is received it will stop echoing incremented re ceived data and start responding to RISM commands with the diagnostic flag set In this mode there are diagnostic routine resident in EPROM which are useful for debugging the board See the DIAG option under Initiating and Terminating iECM 96 in the USER INTERFACE section of this manual for additional information on the Diagnostics Appendix A Schematics and Parts List RS 128 4 7 i D 4 E 1N4985 ovce 74 15 ac D 5 Teur gt R4 5 747214 veco C17 2 SHOULO AS CLOSE TO 1 AS POSSIBL
127. tober 1988 version of the 80C196KB data sheet Intel order number 270634 001 80C196KB A C Characteristics Tavyv 81 ns MAX Tavyv WAIT 11 ns AC373 Dn to On Tplh MAX 35 ns PAL EPLD Tpd MAX 9 ns 08 MAX 12 ns AC112 RES to Tphl MAX 67 ns is irrelevant in this design Tclyx 2 53 ns MAX Tclyx WAIT 10 ns 112 CLOCK to Tplh is irrelevant in this design 81 ns Tclyx BUSWIDTH 11 ns AC373 Dn to On MAX 35 ns PAL EPLD Tpd MAX 46 ns Tligv is irrelevant in this design Tclgx is irrelevant in this design Tavdv 183 ns MAX for zero wait states Tavdv ROMsim 11 ns AC373 Dn to Tplh MAX 35 ns PAL EPLD Tpd MAX 100 ns RAM Tco1 MAX 146 ns Tavdv 349 ns for one state Tavdv EPROM 11 ns AC373 Dn to On Tplh MAX 35 ns PAL EPLD Tpd 200 ns EPROM Tce MAX 246 ns Tavdv 516 ns for two wait states Tavdv UART 11 ns AC373 Dn to On Tplh MAX 35 ns PAL EPLD Tpd MAX 288 ns UART MIN Tridv MAX 334 ns Tridv 60 ns for zero wait states Tridv ROMsim 50 ns RAM Toe MAX Tridv 226 ns MAX for one wait state Tridv EPROM 75 ns EPROM Toe Tridv 393 ns MAX for two wait states Tridv UART 281 ns UART Tridv MAX Tcldv is irrelevant in this design Trhdz 63 ns MAX Trhdz ROMsim 35 ns RAM Tohz MAX Trhdz
128. u would enter from the keyboard to execute the command Include files can be tedious to generate with a text editor so 96 can generate log files in which are stored characters entered by the user The intent is that log files be used later as include files to recreate command se quences List files keep a running record of both commands entered by the user and of the response generated by iECM 96 Comments can be included in list and log files to make them easier to understand A comment starts with a semicolon and ends with a carriage return or ESC The semicolon is considered to be part of the comment but not the CR or ESC The command parser will ignore comments but will put them in the list and log files Note on the software disk included with the EV80C196KB is a file called DEMO LOG DEMO LOG is a sample iECM 96 session for you to invoke and become more familiar with the features of iECM 96 Appendix G is a printout of DEMO LST which was created by turning on the list feature and invoking DEMO LOG by typing include demo log CR at the iECM 96 prompt The list and log files commands allow for default filenames and allow either overwrit ing existing data in the file or appending data at the end of the file This allows you to gather list and log data in the default files which avoids the creation and manage ment of a large number of separate files Log and list files are stamped with the date and time whenever they are open
129. y adding the corresponding stack address to the current value of the system stack pointer During lengthy displays you can stop the output to the console by hitting the SPACE bar Display can be resumed by hitting the SPACE bar a second time The command can be terminated by entering a carriage return STRING commands There is only one form of the STRING command STRING byte address If a symbol exists for byte address in the iECM 96 s symbol table then this sym bol will be displayed Whether or not the symbolic display happens the next line will start with a hexadecimal display of byte address followed by the NUL terminated ASCII string starting at that address For long strings only the first 60 characters are displayed When trailing characters are stripped decimal points are substituted for the first three characters stripped EV80C196KB Microcontroller Evaluation Board User s Manual Processor Variables Several commands are provided to access variables which are associated with the processor rather than with the program _ PC byte address PSW PSW word value SP SP word address The processor variables can be modified only while the target is stopped they can be read at any time These commands allow the display and loading of the program counter s program status word PSW and stack pointer SP Display is in the default base NOTE The examination of the SP will be confusin

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