RL78/G13 Self-Programming
Contents
1. No Branch if ShieldWindow fsl startblock u16 is not 0 or ShieldWindow fsl end block u16 is not 63 All blocks programmable Flash shield window setup FSL SetFlashShieldWindow Set to Start block 0 End block 63 ret FSL OK FSL ERR PARAMETER FSL ERR ERASE FSL ERR IVERIFY FSL ERR WRITE FSL ERR FLOW C return ret D Figure 5 18 Flash Memory Self Programming Initialization 2 2 R01AN2761EJ0100 Rev 1 00 Page 43 of 50 May 28 2015 RENESAS RL78 G13 Self Programming UART CC RL 5 10 13 Flash Memory Reprogramming Execution Figure 5 19 shows the flowchart for flash memory reprogramming execution 1 3 Figure 5 20 shows the flowchart for flash memory reprogramming execution 2 3 Figure 5 21 shows the flowchart for flash memory reprogramming execution 3 3 R_MAIN_WriteExecute Send normal response 0x01 ret NORMAL END ERROR Send data via UART1 R UART1 SendStart No Branch if ret is not NORMAL END Data transmission successful Receive data via UART1 rxbuf Receive data R UART1 ReceiveStart rxlength Receive data length ret NORMAL END ERROR No Branch if ret is not NORMAL END Data reception successful Yes Compute reprogramming target block WriteBlock lt WriteAddr 0x400 WriteCount lt 0 reprogramming target block Initialize programming count of B ret FSL OK Blank check on specif2. Address of area storing receive data length in bytes rxbuf Address of receive data buffer Return value Normal termination NORMAL END Abnormal termination ERROR Remarks None Function Name R MAIN PacketAnalyze Synopsis Analyze receive data Header r cg macrodriver h r cg cgc h r cg port h r cg serial h r cg userdefine h Declaration uint8 t R MAIN PacketAnalyze uint16 t rxlength uint8 t rxbuf Explanation This function checks the parameters of the command received and computes and compares the checksum to check whether the received data is correct Arguments rxlength Address of area storing receive data length in bytes rxbuf Address of receive data buffer Return value START command received START WRITE command received WRITE END command received END Command parameter error or checksum error ERROR Remarks None RO1AN2761EJ0100 Rev 1 00 Page 23 of 50 May 28 2015 RENESAS RL78 G13 Self Programming UART CC RL Function Name R_MAIN_SelfExecute Synopsis Execute flash memory self programming Header r cg macrodriver h r cg cgc h r cg port h r cg serial h r cg userdefine h fsl h fs types h Declaration void R MAIN SelfExecute void Explanation This function executes flash memory self programming Arguments None Return value None Remarks None Function Name R MAIN Selflnitialize Synopsis Execute initialization for flash memory self programming Header r cg macrodriver h r cg cgc h r cg por
3. G13 Self Programming UART CC RL 5 7 List of Constants Table 5 4 lists the constants for the sample program Table 5 4 Constants for the Sample Program Constant Setting Description LCD_DISPLAY Ver 1 0 String to be displayed on the LCD version information Display up to eight characters on the LCD ERR_DISPLAY ERROR String to be displayed on the LCD at occurrence of error NORMAL_END 0x00 Normal termination ERROR OxFF Abnormal termination NO_RECIEVE 0x00 Command reception state Not received START_CODE 0x01 Command reception state START code received PACKET_SIZE 0x02 Command reception state Data length received START 0x02 START command WRITE 0x03 WRITE command END 0x04 END command FULL_SPEED_MODE 0x00 Argument to flash memory self programming library initialization function Set operation mode to full speed mode FREQUENCY 32M 0x20 Argument to flash memory self programming library initialization function RL78 G13 s operating frequency 32 MHz INTERNAL MODE 0x01 Argument to flash memory self programming library initialization function Turn on status check internal mode START BLOCK NUM 0x00 Start block number of flash shield window END BLOCK NUM Ox3F End block number of flash shield window BLOCK SIZE 0x400 One block size of code flash memory 1024 bytes TXSIZE 0x01 Size of response data to be sent to the sending side RXSIZE 0x102 Size of r
4. after turning on the LED indicating that it is accessing flash memory carries out self programming to rewrite the code flash memory with the reprogramming data When the rewrite is completed the sample program turns off the LED and displays the information about the new version on the LCD Table 1 1 lists the peripheral functions to be used and their uses Table 1 1 Peripheral Functions to be Used and their Uses Peripheral Function Use Channel 2 of serial array unit 0 Receives data via UART Channel 3 of serial array unit 0 Sends data via UART Port I O Displays text on the LCD Turns on and off the LED 1 1 Outline of the Flash Self Programming Library The flash self programming library is a software product that is used to reprogram the data in the code flash memory using the firmware installed on the RL78 microcontroller The contents of the code flash memory can be reprogrammed by calling the flash self programming library from a user program To do flash memory self programming it is necessary for the user program to perform initialization for flash memory self programming and to execute the C or assembler functions that correspond to the library functions to be used RO1AN2761EJ0100 Rev 1 00 Page 4 of 50 May 28 2015 RENESAS RL78 G13 Self Programming UART CC RL 1 2 Code Flash Memory The configuration of the RL78 G13 RSFIOOLE code flash memory is shown below OFFFFH Program area 01F
5. basic functions of the program and flash sself programming library are allocated fails due to a temporary power blackout or a reset caused by an external factor the data that is being reprogrammed will be corrupted as the result of which the restarting of the user program or reprogramming cannot be accomplished when a reset is subsequently performed This problem is be avoided by the introduction of the boot swap function The boot swap function swaps between boot cluster 0 which is the boot program area and boot cluster 1 which is the target of boot swapping A new program is written into boot cluster 1 before reprogramming is attempted This boot cluster 1 is swapped with boot cluster 0 and boot cluster 1 is designated as the boot program area In this configuration even when a temporary power blackout occurs while the boot program area is being reprogrammed the system boot will start at boot cluster 1 on the next reset start thus ensuring the normal execution of the programs The outline image of boot swapping is shown in the figure below RO1AN2761EJ0100 Rev 1 00 Page 7 of 50 May 28 2015 RENESAS RL78 G13 Self Programming UART CC RL 1 Erasing boot cluster 1 Call the FSL_Erase function to erase boot cluster 1 blocks 4 to 7 Old boot program Boot cluster 0 2 Writing the new boot program into boot cluster 1 Call the FSL_Write function to write the new boot program into boot cluster 1 and call the FSL_IVerify function
6. bus for flash memory self programming The sending side sends three commands i e the START WRITE and END commands The sample program takes actions according to the command it received and if the command terminates normally returns a normal response 0x01 to the sending side If the command terminates abnormally the program returns no response displays ERROR on the LCD and suppresses the execution of the subsequent operations This section describes the necessary UART communication settings and the specifications for the commands Table 5 1 UART Communication Settings Data bit length bit 8 Data transfer direction LSB first Parity setting No parity Transfer rate bps 115200 5 1 1 START Command When the sample program receives the START command it performs initialization processing for flash memory self programming When the command terminates normally the program returns a normal response 0x01 to the sending side In the case of an abnormal termination the sample program returns no response displays ERROR on the LCD and suppresses the execution of the subsequent operations START code Data length Command Data Checksum 0x01 0x0002 0x02 None 1 byte 5 1 2 WRITE Command When the sample program receives the WRITE command it writes the data it received into flash memory and performs verify processing each time it completes the write of one block The sample program returns a normal resp
7. clock signal Moreover when switching to a clock signal produced with an external resonator or by an external oscillator while program execution is in progress wait until the target clock signal is stable 5 Differences between Products Before changing from one product to another i e to a product with a different part number confirm that the change will not lead to problems The characteristics of an MPU or MCU in the same group but having a different part number may differ in terms of the internal memory capacity layout pattern and other factors which can affect the ranges of electrical characteristics such as characteristic values operating margins immunity to noise and amount of radiated noise When changing to a product with a different part number implement a system evaluation test for the given product Notice 1 Descriptions of circuits software and other related information in this document are provided only to illustrate the operation of semiconductor products and application examples You are fully responsible for the incorporation of these circuits software and information in the design of your equipment Renesas Electronics assumes no responsibility for any losses incurred by you or third parties arising from the use of these circuits software or information 2 Renesas Electronics has used reasonable care in preparing the information included in this document but Renesas Electronics does not warran
8. narra iat cevedacaeesaiactetsenaeaeeudaieactedeee deen desacacencadduaededinadecepedeants 7 1 3 2 Flash Memory Reprogr rmminp itae reed erneuert cet ENEEK RAN anaE ia aS AAAA raae aaa 9 1 3 3 Flash Shield Window i rii een n i aa a aidaa das eux ga saa ne aai dc Ra ATEA 10 1 4 How to Get the Flash Self Programming Library esee eene 11 2 Operation Check Conditions iiie earned prandii da eR FER Aa e nasa EE ER dE eaae CIR DER a rad nang 11 3 Related ditch iiaia 12 4 Description of the Hardware ordnen net epp t dada orn RR Ny Ca Fan ak deaczedpactshadectsunsdeieadabadacederaeds 13 4 Hardware Configuration Example cerent rtr ntt aaan a Duke Fn ara un ra ek keen a kae ren PER CE uua 13 4 2 LastofPinstobe Used reete epit n REX Ree x a Re ERROR FH ia ISTE ERFPRYYR ARE e Fa e Rea 14 B scriptionof the SO LWale oa mentio dade Eee aut rca RHET ERE RADO DA DEI SR PERME QUAS Ee keen ee rea k adde 15 5 1 Communication Specifications euer ri dea a Pe nt 4n aane dd RE iE ode aa IE DRE O4 E rae da a EUR ERR ARA aaa eia 15 Su Bes dr COMM aN M 15 5 1 2 WRITE Command 2 trenta ree 3X na Rh cassie a KR E Fax CN NuER HE NERA dE dedsedacestepided causa cedex cba cue 15 5 LIEND Command i 15 5 14 Communication Sequence sxc noii catio rai ne ERE FR qe XX RR UR RR dedeacctenacaegnasicecevevacaegniscactecwea
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10. ret NORMAL END ERROR Data reception successful Yes E Figure 5 20 Flash Memory Reprogramming Execution 2 3 RO1AN2761EJ0100 Rev 1 00 Page 45 of 50 May 28 2015 RENESAS RL78 G13 Self Programming UART CC RL E No Branch if com is not WRITE or WriteCount is less than 4 Anything other than WRITE command received or 1 block reprogramming complete Yes No Branch if WriteCount is not 4 No Branch if com is not END END command received Yes Verify specified block FSL_IVerify ret FSL_OK FSL_ERR_PARAMETER FSL_ERR_PROTECTION FSL_ERR_FLOW Verify specified block FSL_IVerify No Branch if ret is not ret FSL OK LS OK FSL ERR PARAMETER FSL ERR PROTECTION FSL ERR FLOW 1 block reprogramming complete Set return value to ERROR ret ERROR Verification successful Invert boot flag FSL InvertBootFlag ret FSL OK FSL ERR PARAMETER FSL ERR PROTECTION FSL ERR ERASE FSL ERR FLOW FSL ERR ERASE No Branch if ret is not FLS OK Verification successful No Branch if com is not END END command received E return ret D Figure 5 21 Flash Memory Reprogramming Execution 3 3 R01AN2761EJ0100 Rev 1 00 Page 46 of 50 May 28 2015 RENESAS RL78 G13 Self Programming UART CC RL 5 10 14 Data Transmission via UART1 Figure 5 22 shows the flo
11. 00CF OxFF 0x00 0x000D0 OxFF OxEC 0x000D1 OxFF OxFD 0x000D2 OxFF OxFF 0x000D3 OxFF 0x00 RO1AN2761EJ0100 Rev 1 00 Page 48 of 50 May 28 2015 RENESAS RL78 G13 Self Programming UART CC RL Data for normal operation check CS output state OxFF OxFF 0x56 0x65 0x72 0x20 0x32 Ox2E 0x30 0x45 0x52 0x52 0x21 0x20 0x00 OxFE OxOF 0x00 OxDF O0x0A 0x56 0x04 0x00 OxC6 OxD7 0x52 OxlF OxD7 OxCl 0x51 OxF3 0x90 0x08 OxCO OxD7 OxC7 OxC5 OxCl 0x66 0x75 0x30 0x80 0x04 0x08 OxFF OxOE OxD2 OxDF 0x10 OxC3 0x65 0x73 OxF2 0x61 OxE9 0x82 0x93 OxDF OxF8 0xC2 OxCO OxC4 OxC6 OxD7 OxFF OxFF OxFF OxFF OxFF OxFF OxFF OxFF OxFF OxFF OxFF OxFF OxFF OxFF OxFF OxFF OxFF OxFF OxFF OxFF OxFF OxFF OxFF OxFF OxFF OxFF OxFF OxFF OxFF OxFF OxFF OxFF OxFF OxFF OxFF OxFF OxFF OxFF OxFF OxFF OxFF OxFF OxFF OxFF OxFF OxFF OxFF OxFF OxFF OxFF OxFF OxFF OxFF OxFF OxFF FF OxFF OxFF OxFF OxFF OxFF OxFF OxFF OxFF OxFF OxFF E8 Ox 0x00 0x00 0x00 0x00 0x00 0x00 0x00 OxFF OxFF OxFF OxFF 0x61 OxCF 0x51 Change address 00000H Change addresses 000CEH to 000D3H from from D8H to DOH FFH FFH FFH FFH FFH FFH to D8H 00H ECH FDH FFH 00H Data for debugger operation check OxFF OxFF 0x56 0x65 0x72 0x20 0x32 Ox2E 0x52 0x21 0x20 0x00 OxFE OxOF 0x00 OxDF 0x00 0xC6 OxD7 0x52 OxlF OxD7 OxCl 0x5
12. 1 OxCO 0OxD7 OxC7 OxC5 OxC1 0x66 0x75 0x30 OxFF OxOE OxD2 OxDF 0x10 OxC3 0x65 0x73 0x82 0x93 OxDF OxF8 O0xC2 OxCO O0OxC4 O0xC6 OxFF OxFF OxFF OxFF OxFF OxFF OxFF OxFF OxFF OxFF OxFF OxFF OxFF OxFF OxFF OxFF OxFF OxFF OxFF OxFF OxFF OxFF OxFF OxFF Ox OxFF OxFF OxFF OxFF OxFF OxFF Ox OxFF OxFF OxFF OxFF OxFF OxFF Ox OxFF OxFF OxFF OxFF OxFF OxFF FF Ox 0x00 0x00 0x00 0x00 0x00 0x00 0x00 OxD8 0x00 OxFF OxFF OxFF OxFF 0x61 OxCF Ox8C Ox71 0x09 This sample program generates a reset by inverting the state of the boot flag and carries out boot swapping after rewriting boot cluster 1 The FSL_ForceReset function of the flash memory self programming library is used to generate the reset When this function is executed with a debugger E1 emulator connected a break will occur and processing stop After the break occurs it is necessary to manually effect a reset and execute the program again RO1AN2761EJ0100 Rev 1 00 Page 49 of 50 May 28 2015 RENESAS RL78 G13 Self Programming UART CC RL 6 Sample Code The sample code is available on the Renesas Electronics Website 7 Documents for Reference RL78 G13 User s Manual Hardware RO1UH0146E RL78 Family User s Manual Software RO1USOO15E RL78 Family Flash Self Programming Library Type01 User s Manual RO1USO050E The latest versions of the documents are available on t
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14. FFH 010CEH 010CDH On chip debug security ID area 10 bytes 010C4H Boot cluster 1 010C3H Option byte area 4 010COH aias 010BFH CALLT table area 01080H SF Pyles 01000H 128 bytes OOFFFH Program area 000CEH 000CDH On chip debug security ID area 10 bytes Ld 000C4H 000C3H Option byte area 4 bytes 000CO0H 000BFH CALLT table area 64 bytes 00080H 0007FH Vector table area 128 bytes 00000H Boot cluster 0 Figure 1 1 Code Flash Memory Configuration R01AN2761EJ0100 Rev 1 00 Page 5 of 50 May 28 2015 RENESAS RL78 G13 Self Programming UART CC RL Caution When the boot swap function is used the option byte area 000COH to 000C3H in boot cluster 0 is swapped with the option byte area 010COH to 010C3H in boot cluster 1 Accordingly place the same values in the area 010COH to 010C3H as those in the area 000COH to 000C3H when using the boot swap function The features of the RL78 G13 code flash memory are summarized below Table 1 2 Features of the Code Flash Memory Item Description Minimum unit of erasure and 1 block 1024 bytes verification Minimum unit of programming 1 word 4 bytes Security functions Block erasure programming and boot area reprogramming protection are supported They are enabled at shipment It is possible to disable reprogramming and erasure outside the specified window only at flash memory self programming time using the flash shield wind
15. J0100 Rev 1 00 Page 25 of 50 May 28 2015 RENESAS RL78 G13 Self Programming UART CC RL 5 10 Flowcharts Figure 5 1 shows the overall flow of the sample program described in this application note C Start 5 The option bytes are referenced before the Initialization function initialization function is called hdwinit Display the string specified in constant LCD_DISPLAY on the LCD and wait for receive Main processing main data self programming C End B Figure 5 1 Overall Flow R01AN2761EJ0100 Rev 1 00 Page 26 of 50 May 28 2015 RENESAS RL78 G13 Self Programming UART CC RL 5 10 1 Initialization Function Figure 5 2 shows the flowchart for the initialization function C hdwinit D a System initialization function N R Systeminit C return D IE lt 0 Figure 5 2 Initialization Function RO1AN2761EJ0100 Rev 1 00 Page 27 of 50 May 28 2015 RENESAS RL78 G13 Self Programming UART CC RL 5 10 2 System Initialization Function Figure 5 3 shows the flowchart for the system initialization function C R_Systeminit D Set up peripheral I O redirection PIOR register lt 00H function Set up I O ports R PORT Create Set up CPU clock R CGC Create Set up SAUO R SAUO Create return D Figure 5 3 System Initialization Function R01AN2761EJ0100 Rev 1 00 Page 28 of 50 May 28 2015 RENESAS R
16. L78 G13 Self Programming UART CC RL 5 10 3 I O Port Setup Figure 5 4 shows the flowchart for I O port setup R PORT Create Set up P52 for output Set up unused port C return P52 bit 1 PM52 bit 0 Figure 5 4 IO Port Setup Note Refer to the section entitled Flowcharts in RL78 G13 Initialization RO1 AN2575E Application Note for the configuration of the unused ports Caution Provide proper treatment for unused pins so that their electrical specifications are observed Connect each of any unused input only ports to Vpp or Vss via a separate resistor RO1AN2761EJ0100 Rev 1 00 Page 29 of 50 May 28 2015 RENESAS RL78 G13 Self Programming UART CC RL 5 10 4 CPU Clock Setup Figure 5 5 shows the flowchart for CPU clock setup R CGC Create Set up high speed system CMC register 00H clock subsystem clock High speed system clock Input port mode Sub system clock Input port mode MSTOP bit lt 1 Stop X1 oscillator circuit MCMO bit lt 0 Select high speed OCO clock fiu as main system clock fuam XTSTOP bit 1 Stop XT1 oscillator circuit CSS bit lt 0 Selects main system clock fma as CPU peripheral hardware clock fci HIOSTOP bit lt 0 Start high speed on chip oscillator Select CPU peripheral hardware clock fcik C return D Figure 5 5 CPU Clock Setup Caution For details on the procedure for setting up the CPU clock R_CGC_Creat
17. RENESAS APPLICATION NOTE RL78 G1 3 R01AN2761EJ0100 Rev 1 00 Self Programming Received Data via UART CC RL May 28 2015 Introduction This application note gives the outline of flash memory reprogramming using a self programming technique In this application note flash memory is reprogrammed using the flash self programming library Type01 The sample program described in this application note limits the target of reprogramming to the boot area For details on the procedures for performing self programming and for reprogramming the entire area of code flash memory refer to RL78 G13 Microcontroller Flash Memory Self Programming Execution R01AN0718E Application Note Target Device RL78 G13 When applying the sample program covered in this application note to another microcomputer modify the program according to the specifications for the target microcomputer and conduct an extensive evaluation of the modified program R01AN2761EJ0100 Rev 1 00 Page 1 of 50 May 28 2015 RENESAS RL78 G13 Self Programming UART CC RL Contents I Specifications i 4 1 1 Outline of the Flash Self Programming Library esee nenne eene enne 4 1 2 Code Flash Memory iiie esi erre rures eaten ern ia ipee e ar asp ER TER AR EY ERR EI denied dente RR siete 5 1 3 Flash Memory Self Programming sese eren menn ener in eene en nennrnr nne 7 1 3 1 Boot Swap PUN Ct OD ieri
18. S RL78 G13 Self Programming UART CC RL Set up communication behavior for SAU channel 3 e Only reception e Clock data phase Type 1 e Error interrupt INTSREx Enabled e No parity bit e Transfer order LSB first e Stop bit length 1 bit e Data length 8 bits Transfer clock of channel 3 Divided clock of operation clock by 138 Make channel 2 ready for use Set up RxDO pin input mode Set up TxDO pin output mode return I SCRO3 register 4497H SDRO3 register 8800H SO02 bit 1 SOLO bit lt 0 SOE02 bit lt 1 PMCOS bit lt 0 PMOS bit lt 1 PMC02 bit 0 P02 bit lt 1 PMO02 bit 0 Figure 5 9 UART1 Setup 3 3 RO1AN2761EJ0100 Rev 1 00 May 28 2015 Page 34 of 50 320 NE SAS RL78 G13 Self Programming UART CC RL 5 10 7 Main Processing Figure 5 10 shows the flowchart for main processing 1 2 Figure 5 11 shows the flowchart for main processing 2 2 IE lt 0 Disable interrupts Start UART1 R UART1 Start LCD initialization InitializeDisplay Display string on LCD DisplayString Display string specified in constant LCD DISPLAY i receive interrupt request Receive data via UART1 R_UART1_ReceiveStart No Branch if ret is not NORMAL_END rxbuf lt Receive data rxlength lt Receive data length ret NORMAL END ERROR Data reception terminated nor
19. String Display ERROR Figure 5 16 Flash Memory Self Programming Execution RO1AN2761EJ0100 Rev 1 00 Page 41 of 50 May 28 2015 RENESAS RL78 G13 Self Programming UART CC RL 5 10 12 Flash Memory Self Programming Initialization Figure 5 17 shows the flowchart for flash memory self programming initialization 1 2 Figure 5 18 shows the flowchart for flash memory self programming initialization 2 2 R MAIN Selflnitialize Voltage mode Full speed mode self programming CPU operating frequency 32 MHz environment initialization Status check mode FSL Init Status check internal mode T ret FSL OK FSL ERR PARAMETER Flash memory No Branch if ret is not FSL OK Initialization terminated normally Declare start of flash memory self programming FSL Open Make flash memory functions standard reprogramming functions ready for use FSL PrepareFunctions Make flash memory functions extended functions ready for use FSL PrepareExtFunctions Get flash shield window start end ShieldWindow fs start block u16 block numbers Start block number FSL GetFlashShieldWindow ShieldWindow fs end block u16 lt End block number ret FSL OK FSL ERR FLOW No Branch if ret is not FLS OK Figure 5 17 Flash Memory Self Programming Initialization 1 2 RO1AN2761EJ0100 Rev 1 00 Page 42 of 50 May 28 2015 RENESAS RL78 G13 Self Programming UART CC RL
20. already been reprogrammed 13 If the reprogramming target block is reprogrammed calls the FSL Erase function to erase the reprogramming target block 14 Calls the FSL Write function to write the received data at the write destination address 15 Adds the write size to the write destination address 16 Sends a normal response 0x01 to the sending side 17 Receives the WRITE command and reprogramming data 256 bytes or the END command 0x04 18 Repeats steps 14 to 17 until 1 block 1024 bytes of programming is completed or an END command 0x04 is received from the sending side Proceeds with the next step when 1 block 1024 bytes of programming is completed or an END command 0x04 is received from the sending side 19 Calls the FSL_IVerify function to verify the reprogramming target block 20 Repeats steps 11 to 19 unless an END command 0x04 is received from the sending side Proceeds with the next step when an END command is received 21 Calls the FSL_InvertBootFlag function to invert the state of the boot flag Boot clusters 0 and 1 will then be swapped at reset time 22 Sets P52 to the high level turns off LEDO indicating that flash memory is being accessed then calls the FSL ForceReset function to generate an internal reset Caution When flash memory self programming could not be terminated normally error occurring during processing the sample program displays ERROR on the LCD and suppress
21. ation Cautions 1 The purpose of this circuit is only to provide the connection outline and the circuit is simplified accordingly When designing and implementing an actual circuit provide proper pin treatment and make sure that the hardware s electrical specifications are met connect the input only ports separately to Vpp or Vss via a resistor 2 Vpp must be held at not lower than the reset release voltage V yp that is specified as LVD RO1AN2761EJ0100 Rev 1 00 Page 13 of 50 May 28 2015 RENESAS RL78 G13 4 2 List of Pins to be Used Table 4 1 lists pins to be used and their functions Self Programming UART CC RL Table4 1 Pins to be Used and their Functions Pin Name y o Description PO2 ANI17 SO10 TxD1 Output UART serial data transmit pin P03 ANI16 SI10 RxD1 SDA10 Input UART serial data receive pin P52 Output LEDO indicating flash memory access status on off control P54 Output Debug LCD control P55 Output Debug LCD control P70 KRO SCK21 SCL21 Output Debug LCD control P71 KR1 SI21 SDA21 Output Debug LCD control P72 KR2 SO21 Output Debug LCD control P73 KR3 SO01 Output Debug LCD control RO1AN2761EJ0100 Rev 1 00 May 28 2015 2tENESAS Page 14 of 50 RL78 G13 Self Programming UART CC RL 5 Description of the Software 5 1 Communication Specifications The sample program covered in this application note receives reprogramming data via the UART
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23. channel 2 UART mode e Interrupt source of channel 2 Transfer end interrupt Figure 5 7 R01AN2761EJ0100 Rev 1 00 STO register lt 000CH STMK1 bit lt 1 STIF1 bit 0 SRMK1 bit 1 SRIF1 bit 0 SREMK1 bit lt 1 SREIF1 bit lt 0 STPR11 bit lt 1 STPRO1 bit lt 1 SRPR11 bit lt 1 SRPR0O bit lt 1 SREPR11 bit lt 1 SREPR0 1 bit lt 1 SMRO 2 register 0022H UART1 Setup 1 3 Page 32 of 50 32 N SAS RL78 G13 Self Programming UART CC RL Set up communication behavior for channel 2 of SAU e Only transmission e Clock data phase Type 1 e Error interrupt INTSREx Masked e No parity bit e Transfer order LSB first e Stop bit length 1 bit e Data length 8 bits Set up operation mode for SAU channel 3 e Operation clock of channel 3 CK00 e Transfer clock of channel 3 Divided clock of CK00 e Start trigger Valid edge of RxD pin e Detection of falling edge as a start bit e Operation mode of channel 3 UART mode e Interrupt source of channel 3 Transfer end interrupt Transfer clock of channel 2 Divided clock of operation clock by 138 Noise filter of RxD1 pin On Clear error flag SCRO2 register lt 8097H SDRO2 register 8800H NFENO register 04H SIRO3 register lt 0007H SMRO3 register 0122H Figure 5 8 UART1 Setup 2 3 R01AN2761EJ0100 Rev 1 00 May 28 2015 Page 33 of 50 32 N SA
24. daeaanetaens 16 5 2 Operation Outline uester iie pi ee Geis aie pr ar doe aprire d nanan adnan acne needa due 17 2 3 Pie COMES URAL OME raae a A r E ceuhatecauntes Du Rupe et M curn EE ERR RN ERE BE EE 19 5 4 Iastof Option Byte Settings aurera nren aieeaii CXR EA E Tau da D FER EAR E eua seas 20 5 5 On chip NIAI 20 5 6 Link Option costa dats aneanentacdetaisocdanes rede an aa aa aao RO AE REATO AAE TE AARAA 21 SI Listof Constant M iusan enia aeiaai i iatna a AAACN aanta ENa aa SANEA EEEREN A 22 SENE br Sed DIIS EE 22 5 9 Function Specifications sissors Goin Fare FEAR kae SEE ER IXR AR an deniee garde RUE REP A PERI gE 23 510 feq ED TERES 26 5 10 1 Initialization E nctlon 2 rrr tito a a IR XXE ERR MR a Rak XN sa THE AREE EO Tuy Vua da napa ead 27 5 10 2 System Initialization E nctiOR iioi teer terere terne nein Eo en pa aaa Exe Ed Tan RE ERE FREE T Tuna TR ETE 28 5 10 3 V O Port Setup ecrit ren axe tu tenax ex ER RE AEXER FEY x duadhaetnedadenedaie cedex ENE Fa p eausa aT ees exa sa A 29 5104 CPU Clock Setup m 30 SESS ABT pics Em 31 SIUS aoo C E 32 5 1027 Main Pro sSin c M 35 5 10 8 Starting the WAR iterato eria nei eR RR Rex ku aaia SR VYX NER cada EESEE DEO AR ETE ne ER aee 37 5 10 9 Data Reception via UART i ieceee iiiter orte enter Rue dest nee E ERR dd ra nea a Ru AA aae AERA 38 5 10 10 Receive Packet Atialy S18 2t teor
25. dures for perform self programming and for reprogramming the entire area of code flash memory refer to RL78 G13 Microcontroller Flash Memory Self Programming Execution RO1AN0718E Application Note 1 Erasing the block to be reprogrammed OFFFFH User program 02000H 01000H Erase OOFFFH Boot cluster 0 00000H Boot program 2 Writing and verifying the block to be reprogrammed OFFFFH User program 02000H 01FFFH 01000H Write OOFFFH Boot cluster 0 00000H Boot program 3 Repeat the cycle of erasing writing and verifying the block up to the last block OFFFFH New user program 02000H ani New boot program Boot cluster 1 01000H OOFFFH Boot cluster 0 00000H Boot program Figure 1 3 Outline of Flash Memory Reprogramming 1 2 RO1AN2761EJ0100 Rev 1 00 Page 9 of 50 May 28 2015 RENESAS RL78 G13 Self Programming UART CC RL 4 Rewriting the boot flag and resetting OFFFFH New user program 02000H 01000H b OOFFFH New boot program 00000H Figure 1 4 Outline of Flash Memory Reprogramming 2 2 1 3 3 Flash Shield Window The flash shield window is one of security mechanisms used for flash memory self programming It disables the write and erase operations on the areas outside the designated window only during flash memory self programming The figure below shows the outline image of the flash shield window on the area of which the start block is 08H and the end bl
26. e refer to the section entitled Flowcharts in RL78 G13 Initialization RO1 AN2575E Application Note RO1AN2761EJ0100 Rev 1 00 Page 30 of 50 May 28 2015 RENESAS RL78 G13 Self Programming UART CC RL 5 10 5 SAUO Setup Figure 5 6 shows the flowchart for SAUO setup R_SAUO_Create Supply clock signal to SAUO Set up operation of SAUO Operation clock 0 CK00 16 MHz C return D SAUOEN bit lt 1 SPSO register lt 0011H Set up UART1 R UART1 Create Figure 5 6 SAUO Setup RO1AN2761EJ0100 Rev 1 00 May 28 2015 RENESAS Page 31 of 50 RL78 G13 Self Programming UART CC RL 5 10 6 UART1 Setup Figure 5 7 shows the flowchart for UARTI setup 1 3 Figure 5 8 shows the flowchart for UARTI setup 2 3 Figure 5 9 shows the flowchart for UARTI setup 3 3 May 28 2015 R UART1 Create Stop channels 2 and 3 Disable INTST1 interrupt and clear interrupt request flag Disable INTSR1 interrupt and clear interrupt request flag Disable INTSRE1 interrupt and clear interrupt request flag Set INTST1 interrupt priority level to 3 lowest Set INTSR1 interrupt priority level to 3 lowest Set INTSRE1 interrupt priority level to 3 lowest Set up operation mode for SAU channel 2 e Operation clock of channel 2 CK00 e Transfer clock of channel 2 Divided clock of CK00 e Detection of falling edge as a start bit e Operation mode of
27. e which uses 2 81 V 2 76 V to 2 87 V Integrated development environment CS CS V3 01 00 from Renesas Electronics Corp C compiler CS Integrated development environment e studio CC RL V1 01 00 from Renesas Electronics Corp e studio V4 0 0 26 from Renesas Electronics Corp C compiler e studio CC RL V1 01 00 from Renesas Electronics Corp Board to be used Flash self programming library Type Ver Renesas Starter Kit for RL78 G13 ROK50100LSOOOBE FSLRL78 Type01 Ver 2 21 Note RO1AN2761EJ0100 Rev 1 00 May 28 2015 Use and evaluate the latest version Page 11 of 50 7tENESAS RL78 G13 Self Programming UART CC RL 3 Related Application Notes The application notes that are related to this application note are listed below for reference e RL78 G13 Initialization ROLAN2575E Application Note e RL78 G13 Serial Array Unit UART Communication RO1AN2571E Application Note RO1AN2761EJ0100 Rev 1 00 Page 12 of 50 May 28 2015 RENESAS RL78 G13 Self Programming UART CC RL 4 Description of the Hardware 4 1 Hardware Configuration Example Figure 4 1 shows an example of the hardware configuration used for this application note yn RES DD implemented on the CPU board RL78 G13 P52 PO2 TxDO Sending side PO3 RxDO sending reprogramming data i For on chip debugger P40 TOOLO Debug LCD REGC Figure 4 1 Hardware Configur
28. eceive buffer 5 8 List of Functions Table 5 5 lists the functions that are used in this sample program Table 5 5 List of Functions Function Name Outline R UART1 Start Starts UART1 R UART1 ReceiveStart Receives data via UART1 R MAIN PacketAnalyze Analyzes receive data R MAIN SelfExecute Executes flash memory self programming R MAIN Sefflnitialize Executes initialization for flash memory self programming R_MAIN_WriteExecute Executes flash memory reprogramming R_UART1_SendStart Sends data via UART1 RO1AN2761EJ0100 Rev 1 00 Page 22 of 50 May 28 2015 RENESAS RL78 G13 Self Programming UART CC RL 5 9 Function Specifications This section describes the specifications for the functions that are used in the sample program Function Name R_UART1_ Start Synopsis Start UART1 Header r cg macrodriver h r cg serial h r cg userdefine h Declaration void R UART1 Start void Explanation This function starts channels 2 and 3 of the serial array unit 0 and places them in communication wait state Arguments None Return value None Remarks None Function Name R UART1 ReceiveStart Synopsis Receive data via UART1 Header r cg macrodriver h r cg serial h r cg userdefine h Declaration uint8 t R UART1 ReceiveStart uint16 t rxlength uint8 t rxbuf Explanation This function stores the received data in the receive buffer rxbuf and its data length in bytes in rxlength Arguments rxlength
29. ema vou aeonit NEE a TAEA AATE EAN ar EE FER Ra XR Nue SEU RRA 40 5 10 11 Flash Memory Self Programming Execution sees eene enne e enne 41 5 10 12 Flash Memory Self Programming Initialization sees ene enne nnns 42 5 10 13 Flash Memory Reprogramming Execution esses eee nennen nnne 44 5 10 14 Data Transmission Via UART incite nennen nita h ha Rana ke ern pda eun ua PEE RUE Tana SOR 47 R01AN2761EJ0100 Rev 1 00 Page 2 of 50 May 28 2015 RENESAS RL78 G13 Self Programming UART CC RL 5 11 Operation Check Proced re i teet nene ttt tbe o n ae a aas a Ex Re eae oe PNE Ru qaaa 48 5 11 1 Making Checks with a Debugger sse eene nennen enne nre reine enne 48 Os Sample COJE ee EDD 50 Te Documetts to ReEreTrence nerui a aen a reda a Pa DERE EUTN E RET EARN ERA Le DERE TERM RN BABERE PT ava RENE 50 D AODAIUIMIcUBM M M 51 General Precautions in the Handling of MPU MCU Products seeseeeeeenene eene 52 RO1AN2761EJ0100 Rev 1 00 Page 3 of 50 May 28 2015 RENESAS RL78 G13 Self Programming UART CC RL 1 Specifications This application note explains a sample program that performs flash memory reprogramming using a self programming library The sample program displays the information about the current version of the library on the LCD Subsequently the program receives data reprogramming data from the sending side and
30. es the execution of the subsequent operations RO1AN2761EJ0100 Rev 1 00 Page 18 of 50 May 28 2015 RENESAS RL78 G13 Self Programming UART CC RL 5 3 File Configuration Table 5 2 lists the additional functions for files that are automatically generated in the integrated development environment and other additional files Table 5 2 List of Additional Functions and Files File Name Outline Remarks r main c Main module Additional functions R MAIN PacketAnalyze R MAIN SelfExecute R MAIN Selflnitialize R MAIN WriteExecute r cg serial user c SAU module Additional functions R UART1 ReceiveStart R UART1 SendStart Icd c DebugLCD module Controls DebugLCD included in Renesas Starter Kit for RL78 G13 RO1AN2761EJ0100 Rev 1 00 Page 19 of 50 May 28 2015 RENESAS RL78 G13 Self Programming UART CC RL 5 4 List of Option Byte Settings Table 5 3 summarizes the settings of the option bytes Table 5 3 Option Byte Settings Address Setting Description 000C0H 010C0H 11101111B Disables the watchdog timer Stops counting after the release from the reset status 000C1H 010C1H 01111111B LVD reset mode 2 81 V 2 76 V to 2 87 V 000C2H 010C2H 11101000B HS mode HOCO 32 MHz 000C3H 010C3H 10000100B Enables the on chip debugger Erases the data in the flash memory when on chip debug security ID authentication fails The option bytes of the RL78 G13 comprise the user opti
31. hanged to Ver 2 0 1 Ver 1 0 is displayed on the LCD The constant LCD_DISPLAY is defined as Ver 1 0 by this sample program 2 Send a START command from the sending side to initiate communication After the START command is sent communication between the sending side and this sample program proceeds as specified in Section 5 1 Communication Specifications 3 When the sample program receives a WRITE command and reprogramming data and starts flash memory self programming LEDO on the RSK board turns on 4 LEDO turns off when the sample program receives an END command 5 Areset occurs and Ver 2 0 is displayed on the LCD 5 11 1 Making Checks with a Debugger When flash memory self programming is executed with a debugger E1 emulator connected it becomes unable to check the execution of the program correctly with the debugger after the reprogramming To check the program execution with the debugger after reprogramming it is necessary to change the HEX file that is to be used as reprogramming data from the state established immediately when it is generated by CS More specifically it is necessary to rewrite the reset vector address 0x00000 to the address where the monitor program is placed and to add changes to a part of the monitor program addresses OxXO00CE to 0x0000D3 as shown below Address CS Output State Change To 0x00000 0xD8 OxDO Reset vector 0x000CE OxFF OxD8 0x0
32. have specific characteristics such as the occurrence of failure at a certain rate and malfunctions under certain use conditions Further Renesas Electronics products are not subject to radiation resistance design Please be sure to implement safety measures to guard them against the possibility of physical injury and injury or damage caused by fire in the event of the failure of a Renesas Electronics product such as safety design for hardware and software including but not limited to redundancy fire control and malfunction prevention appropriate treatment for aging degradation or any other appropriate measures Because the evaluation of microcomputer software alone is very difficult please evaluate the safety of the final products or systems manufactured by you 8 Please contact a Renesas Electronics sales office for details as to environmental matters such as the environmental compatibility of each Renesas Electronics product Please use Renesas Electronics products in compliance with all applicable laws and regulations that regulate the inclusion or use of controlled substances including without limitation the EU RoHS Directive Renesas Electronics assumes no liability for damages or losses occurring as a result of your noncompliance with applicable laws and regulations 9 Renesas Electronics products and technology may not be used for or incorporated into any products or systems whose manufacture use or sale is prohibited under any applicable domestic
33. he Renesas Electronics Website Technical Updates Technical Brochures The latest versions of the documents are available on the Renesas Electronics Website Website and Support Renesas Electronics Website e http www renesas com index jsp Inquiries e http www renesas com contact RO1AN2761EJ0100 Rev 1 00 May 28 2015 RENESAS Page 50 of 50 Revision Record RL78 G13 Self Programming UART Description Page Summary 1 00 May 28 2015 First edition issued Rev Date All trademarks and registered trademarks are the property of their respective owners A 1 General Precautions in the Handling of MPU MCU Products The following usage notes are applicable to all MPU MCU products from Renesas For detailed usage notes on the products covered by this document refer to the relevant sections of the document as well as any technical updates that have been issued for the products 1 Handling of Unused Pins Handle unused pins in accordance with the directions given under Handling of Unused Pins in the manual The input pins of CMOS products are generally in the high impedance state In operation with an unused pin in the open circuit state extra electromagnetic noise is induced in the vicinity of LSI an associated shoot through current flows internally and malfunctions occur due to the false recognition of the pin state as an input signal become possible Unused pins sh
34. ied FSL ERR PARAMETER block FSL ERR BLANKCHECK FSL BlankCheck FSL ERR FLOW No Branch if ret is FSL ERR BLANKCHECK Blank check error OK ret FSL OK FSL ERR PARAMETER FSL ERR PROTECTION a Erase specified block FSL ERR ERASE FSL Erase FSL ERR FLOW Figure 5 19 Flash Memory Reprogramming Execution 1 3 RO1AN2761EJ0100 Rev 1 00 Page 44 of 50 May 28 2015 RENESAS RL78 G13 Self Programming UART CC RL No Branch if ret is not FLS_Ok Normal termination Receive packet analysis R_MAIN_PacketAnalyze No Branch if com is not WRITE com lt START WRITE END ERROR WRITE command received Write to specified address FSL Write No Branch if ret is not FLS OK ret FSL OK FSL ERR PARAMETER FSL ERR PROTECTION FSL ERR WRITE FSL ERR FLOW Write to specified address successful Yes Update write destination address Increment count of reprogramming for block to be reprogrammed Send data via UART1 R UART1 SendStart No Branch if ret is not NORMAL END WriteAddr lt WriteAddr rxlength 2 WriteCount WriteCount 1 Send normal response 0x01 ret NORMAL END ERROR Data transmission successful Yes Receive data via UART1 R UART1 ReceiveStart No Branch if ret is not NORMAL END rxbuf lt Receive data rxlength Receive data length
35. indicating that flash memory is being accessed e Calls the FSL Init function to initialize the flash memory self programming environment and makes the following settings Voltage mode Full speed mode CPU operating frequency 32 MHz Status check mode Status check internal mode e Calls the FSL Open function to start flash memory self programming starting the flash memory environment e Calls the FSL PrepareFunctions function to make available the flash memory functions standard reprogramming functions that are necessary for the RAM executive e Calls the FSL PrepareExtFunctions function to make available the flash memory functions extended functions that are necessary for the RAM executive e Calls the FSL GetFlashShieldWindow function to get the start and end blocks of the flash shield window e Ifthe start block of the flash shield window is a block other than block 0 or if the end block is a block other than block 63 calls the FSL SetFlashShieldWindow function to set the start block of the flash shield window to block 0 and the end block to block 63 8 Sets the write destination address to 0x1000 start of boot cluster 1 9 Sends a normal response 0x01 to the sending side 10 Receives the WRITE command 0x03 and reprogramming data 256 bytes 11 Computes the reprogramming target block from the write destination address 12 Calls the FSL_BlankCheck function to check whether the reprogramming target block has
36. is being accessed performs initialization for flash memory self programming and returns a normal response 0x01 upon normal termination Sending side Sends the WRITE command and reprogramming data 256 bytes Sample program Writes the data it received into the code flash memory The write address starts at 0x 1000 start of boot cluster 1 Subsequently it is incremented by the receive data size size of reprogramming data 256 bytes each time the sample program receives the WRITE command and reprogramming data The program performs verify processing when the rewrite of 1 block 1024 bytes is completed When all of these steps terminate normally the sample program returns a response 0x01 Steps 3 and 4 are repeated until the reprogramming of all data is completed Sending side Sends the END command Sample program Performs verify processing on the block that is currently subjected to reprogramming The sample program then inverts the state of the boot flag and generates a reset after turning off LEDO which indicates that flash memory is being accessed RO1AN2761EJ0100 Rev 1 00 Page 16 of 50 May 28 2015 RENESAS RL78 G13 Self Programming UART CC RL 5 2 Operation Outline This application note explains a sample program that performs flash memory reprogramming using a self programming library The sample program displays the information about the current version of the library on the LCD Subsequently the prog
37. itialize data receive counter datacount 0 Initialize receive data length Argument rxlength OxFFFF No Branch if the BFFO1 bit in the SSR03 register is set to 0 Receive data present No SSRO3 amp 0x27 is not 0x20 oO o Yes Read receive data rxdata lt RXD1 register Branch according to value of rxstatus Receive status NO RECEIVE No Branch if rxdata is not START CODE Start code received Yes Set return value to abnormal termination Change receive status rxstatus START CODE ret ERROR Figure 5 13 Data Reception via UART1 1 2 RO1AN2761EJ0100 Rev 1 00 May 28 2015 RENESAS Page 38 of 50 RL78 G13 Self Programming UART CC RL lencount No Branch if lencount is 2 Argument rxlength len 0 8 len 1 PACKET SIZE rxbuf datacount No Branch if datacount is not rxlength and ret is NORMAL_END All data bytes received C return ret Figure 5 9 Data Reception via UART1 2 2 RO1AN2761EJ0100 Rev 1 00 Page 39 of 50 May 28 2015 RENESAS RL78 G13 Self Programming UART CC RL 5 10 10 Receive Packet Analysis Figure 5 15 shows the flowchart for receive packet analysis R_MAIN_PacketAnalyze Initialize loop counter count 0 Initialize checksum checksum lt 0 No Branch if argument rxlength 1 count Check
38. mally Analyze received packet R MAIN PacketAnalyze ret lt START WRITE END ERROR Restore from HALT mode on UART Figure 5 10 Main Processing 1 2 RO1AN2761EJ0100 Rev 1 00 May 28 2015 RENESAS Page 35 of 50 RL78 G13 Self Programming UART CC RL No Branch if ret is not START START command received Execute flash memory Display string on LCD self programming DisplayString R MAIN SelfExecute Figure 5 11 Main Processing 2 2 RO1AN2761EJ0100 Rev 1 00 Page 36 of 50 May 28 2015 RENESAS RL78 G13 Self Programming UART CC RL 5 10 8 Starting the UART1 Figure 5 12 shows the flowchart for starting the UARTI C return STIF1 bit 0 STMK1 bit 0 SRIF1 bit lt 0 SRMK1 bit lt 0 SREIF1 bit lt 0 SREMK1 bit lt 0 S002 bit lt 1 SOE02 bit lt 1 SSO register lt 000CH Figure 5 12 Starting the UART1 RO1AN2761EJ0100 Rev 1 00 Page 37 of 50 May 28 2015 RENESAS RL78 G13 Self Programming UART CC RL 5 10 9 Data Reception via UART1 Figure 5 13 shows the flowchart for data reception via the UARTI 1 2 Figure 5 14 shows the flowchart for data reception via the UARTI 2 2 R UART1 ReceiveStart Set return value to normal termination ret NORMAL END Initialize receive status rxstatus lt NO RECEIVE Initialize data length receive counter lencount lt 0 In
39. ock is 1FH OFFFFH 08000H 07FFFH 02000H 01FFFH 00000H t Flash shield range programming disabled Block 20H Block 1FH end block Block 08H start block Block 07H Block 00H A Window range programming enabled i Flash shield range programming disabled Figure 1 5 Outline of the Flash Shield Window RO1AN2761EJ0100 Rev 1 00 May 28 2015 Xe Page 10 of 50 lt ENESAS RL78 G13 Self Programming UART CC RL 1 4 How to Get the Flash Self Programming Library Before compiling the sample program please download the latest flash self programming library and copy the library files to the following folder below r01an2761 flash incr178 folder fsl h fsl inc fsl types h libr178 folder fsl lib The flash self programming library can be obtained from the following URL http www renesas com products tools flash prom programming flash libraries index jsp 2 Operation Check Conditions The sample code described in this application note has been checked under the conditions listed in the table below Table 2 1 Operation Check Conditions Item Description Microcontroller used RL78 G13 R5F100LEA Operating frequency e High speed on chip oscillator HOCO clock 32 MHz e CPU peripheral hardware clock 32 MHz Operating voltage 5 0 V Operation is possible over a voltage range of 2 9 V to 5 5 V LVD operation Vivp Reset mod
40. on bytes 000COH to 000C2H and on chip debug option byte 000C3H The option bytes are automatically referenced and the specified settings are configured at power on time or the reset is released When using the boot swap function for self programming it is necessary to set the same values that are set in 000COH to 000C3H also in 010COH to 010C3H because the bytes in 000COH to 000C3H are swapped with the bytes in 010COH to 010C3H 5 5 On chip Debug Security ID The RL78 G13 has the on chip debug security ID area allocated to addresses 000C4H to 000CDH of flash memory to preclude the memory contents from being sneaked by the unauthorized third party When using the boot swap function for self programming it is necessary to set the same values that are set in 000CAH to 000CDH also in 010C4H to 010CDH because bytes in 000C4H to 000CDH are swapped with the bytes in 010C4H to 010CDH RO1AN2761EJ0100 Rev 1 00 Page 20 of 50 May 28 2015 RENESAS RL78 G13 Self Programming UART CC RL 5 6 Link Option The start option which is one of the link options is provided for allocating the Flash Self Programming Library Type01 to a ROM area Use the start option to specify all sections for which settings are required by the Flash Self Programming Library Type01 Caution For details on the link option procedures refer to RL78 Compiler CC RL User s Manual R20UT3123E RO1AN2761EJ0100 Rev 1 00 Page 21 of 50 May 28 2015 RENESAS RL78
41. onse 0x01 to the sending side on normal termination of the command In the case of an abnormal termination the sample program returns no response displays ERROR on the LCD and suppresses the execution of the subsequent operations START code Data length Command Data Checksum 0x01 0x0102 0x03 256 bytes 1 byte 5 1 3 END Command When the sample program receives the END command it performs verify processing on the block that is currently being written If the verification terminates normally the program inverts the state of the boot flag then generates a reset for boot swapping In the case of an abnormal termination the sample program displays ERROR on the LCD and suppresses the execution of the subsequent operations When the sample program receives the END command it returns no response to the sending side whether the command terminates normally or abnormally START code Data length Command Checksum 0x01 0x0002 0x04 1 byte The checksum is the sum of the command and data fields in units of bytes RO1AN2761EJ0100 Rev 1 00 Page 15 of 50 May 28 2015 RENESAS RL78 G13 Self Programming UART CC RL 5 1 4 Communication Sequence This sample program takes actions according to the sequence described below upon receipt of a command from the sending side 1 Q 3 4 5 6 7 Sending side Sends the START command Sample program Turns on LED1 which indicates that flash memory
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43. ould be handled as described under Handling of Unused Pins in the manual 2 Processing at Power on The state of the product is undefined at the moment when power is supplied The states of internal circuits in the LSI are indeterminate and the states of register settings and pins are undefined at the moment when power is supplied In a finished product where the reset signal is applied to the external reset pin the states of pins are not guaranteed from the moment when power is supplied until the reset process is completed In a similar way the states of pins in a product that is reset by an on chip power on reset function are not guaranteed from the moment when power is supplied until the power reaches the level at which resetting has been specified 3 Prohibition of Access to Reserved Addresses Access to reserved addresses is prohibited The reserved addresses are provided for the possible future expansion of functions Do not access these addresses the correct operation of LSI is not guaranteed if they are accessed 4 Clock Signals After applying a reset only release the reset line after the operating clock signal has become stable When switching the clock signal during program execution wait until the target clock signal has stabilized When the clock signal is generated with an external resonator or from an external oscillator during a reset ensure that the reset line is only released after full stabilization of the
44. ow Security settings programmable using the flash self programming library Caution The boot area reprogramming protection setting and the security settings for outside the flash shield window are disabled during flash memory self programming RO1AN2761EJ0100 Rev 1 00 Page 6 of 50 May 28 2015 RENESAS RL78 G13 Self Programming UART CC RL 1 3 Flash Memory Self Programming The RL78 G13 is provided with a library for flash memory self programming Flash memory self programming is accomplished by calling functions of the flash self programming library from the reprogramming program The flash self programming library for the RL78 G13 controls flash memory reprogramming using a sequencer a dedicated circuit for controlling flash memory The code flash memory cannot be referenced while control by the sequencer is in progress When the user program needs to be run while the sequencer control is in progress therefore it is necessary to relocate part of the segments for the flash self programming library and the reprogramming program in RAM when erasing or reprogramming the code flash memory or making settings for the security flags If there is no need to run the user program while the sequencer control is in progress it is possible to keep the flash self programming library and reprogramming program on ROM code flash memory for execution 1 3 1 Boot Swap Function When reprogramming of the area where vector table data the
45. ram receives data reprogramming data from the sending side and after turning on the LED indicating that it is accessing flash memory carries out self programming to rewrite the code flash memory with the reprogramming data When reprogramming is completed the sample program turns off the LED and displays the information about the new version on the LCD 1 Initializes the SAUO channels 2 and 3 lt Setting conditions gt e Uses the SAUO channels 2 and 3 as UART e Uses the P02 TxD1 pin for data output and the PO3 RxDI pin for data input e Sets the data length to 8 bits e Sets the order of data transfer mode to LSB first e Sets the parity setting to No parity e Sets the receive data level to standard e Sets the transfer rate to 115200 bps 2 Sets up the I O port lt Setting conditions gt e LED on off control port LEDO Sets P52 for output 3 Disables interrupts 4 Starts the UARTI 5 Initializes the LCD and displays on the LCD the string that is set to the constant LCD STRING 6 Enters the HALT mode and waits for data from the sending side e Switches into the normal operation mode from the HALT mode upon a UART receive end interrupt request RO1AN2761EJ0100 Rev 1 00 Page 17 of 50 May 28 2015 RENESAS RL78 G13 Self Programming UART CC RL 7 Upon receipt of a START command 0x02 from the sending side performs initialization for self programming e Sets P52 to the low level and turns on LEDO
46. sum computation complete Add to checksum checksum lt checksum rxbuf count Update loop count count E Branch if rxbuf rxlength checksum Yes No Branch if rxbuf 0 is not START not WRITE or not END Received command normal Yes Set return value to received command ret lt rxdata 0 C return ret Set return value to abnormal termination ret ERROR Figure 5 10 Receive Packet Analysis RO1AN2761EJ0100 Rev 1 00 Page 40 of 50 May 28 2015 RENESAS RL78 G13 Self Programming UART CC RL 5 10 11 Flash Memory Self Programming Execution Figure 5 16 shows the flowchart for flash memory self programming execution R MAIN SelfExecute Turn on LEDO P52 bit lt 0 ret FSL_OK FSL_ERR_PARAMETER self programming initialization FSL_ERR_ERASE R MAIN Selflnitialize FSL ERR IVERIFY FSL_ERR_WRITE FSL_ERR_FLOW No Branch if ret is not FSL OK Flash memory Initialization terminated normally Set up write destination address Execute flash memory ret FSL OK ERROR programming R MAIN WriteExecute Turn off LEDO P52 bit lt 1 No Branch if ret is not FSL OK WriteAddr 0x1000 Set to start of boot cluster 1 Programming terminated normally Yes Reset FSL ForceReset Close flash memory self programming environment Internal reset generated FSL Close Display string on LCD Display
47. t h r cg serial h r cg userdefine h fsl h fs types h Declaration uint8 t R MAIN SelfExecute void Explanation This function executes initialization prior to flash memory self programming Arguments None Return value Normal termination FSL_OK Parameter error FSL_ERR_PARAMETER Erase error FSL_ERR_ERASE Internal verify error FSL_ERR_IVERIFY Write error FSL ERR WRITE Flow error FSL ERR FLOW Remarks None Function Name R MAIN WriteExecute Synopsis Execute flash memory reprogramming Header r cg macrodriver h r cg cgc h r cg port h r cg serial h r cg userdefine h fsl h fs types h Declaration uint8 t R MAIN SelfExecute uint32 t WriteAddr Explanation This function reprograms the flash memory Arguments WriteAddr Write start address Return value Normal termination NORMAL_END Abnormal termination ERROR Remarks None RO1AN2761EJ0100 Rev 1 00 Page 24 of 50 May 28 2015 7tENESAS RL78 G13 Self Programming UART CC RL Function Name R_UART1_SendStart Synopsis Send data via UART1 Header r cg macrodriver h r cg serial h r cg userdefine h Declaration uint8 t R UART1 SendStart uint16 t txlength uint8 t txbuf Explanation This function transmits the number of data bytes specified in txlength bytes from txbuf Arguments txlength Transmit data length in bytes txbuf Address of transmit data buffer Return value Normal termination NORMAL END Parameter error txlength is 0 or less ERROR Remarks None RO1AN2761E
48. t that such information is error free Renesas Electronics assumes no liability whatsoever for any damages incurred by you resulting from errors in or omissions from the information included herein 3 Renesas Electronics does not assume any liability for infringement of patents copyrights or other intellectual property rights of third parties by or arising from the use of Renesas Electronics products or technical information described in this document No license express implied or otherwise is granted hereby under any patents copyrights or other intellectual property rights of Renesas Electronics or others 4 You should not alter modify copy or otherwise misappropriate any Renesas Electronics product whether in whole or in part Renesas Electronics assumes no responsibility for any losses incurred by you or third parties arising from such alteration modification copy or otherwise misappropriation of Renesas Electronics product 5 Renesas Electronics products are classified according to the following two quality grades Standard and High Quality The recommended applications for each Renesas Electronics product depends on the product s quality grade as indicated below Standard Computers office equipment communications equipment test and measurement equipment audio and visual equipment home electronic appliances machine tools personal electronic equipment and industrial robots etc High Quality Transportation equipment automo
49. to verify boot cluster 1 The steps that have been performed up to here ensure that the programs will run normally even when the programming of the new boot program fails due to a temporary power blackout or reset because the system boot is started by the old boot program New boot program writing Boot cluster 1 Old boot program Boot cluster 0 3 Setting the boot swap bit Call the FSL_InvertBootFlag function to invert the state of the boot flag When a temporary power blackout or reset occurs after the state of the boot flag is inverted the programs will run normally because the system boot is started by the new boot program whose reprogramming has been completed 4 When a reset occurs When a reset occurs boot clusters 0 and 1 are swapped New boot program Old boot program 5 Boot swapping completed Old boot program Boot cluster 0 New boot program Boot cluster 1 Figure 1 2 Outline of Boot Swapping Boot cluster 1 Boot swap Boot cluster 0 RO1AN2761EJ0100 Rev 1 00 Page 8 of 50 May 28 2015 RENESAS RL78 G13 Self Programming UART CC RL 1 3 2 Flash Memory Reprogramming This subsection describes the outline image of reprogramming using the flash memory self programming technique The program that performs flash memory self programming is placed in boot cluster 0 The sample program covered in this application note limits the target of reprogramming to the boot area For details on the proce
50. wchart for data transmission via the UARTI R UART1 SendStart No Branch if argument txlength is 0 or less ransmitted data bytes greater than or equal to 1 Yes Set return value to normal termination ret NORMAL END Set return value to abnormal termination ret ERROR No Branch if the BFFO1 bit in the SSRO02 register is set to 1 Data not stored in DSDRO1 register Transmit data Update pointer and number of transmitted data bytes No Branch if txlength is not 0 TXD1 register lt Argument txbuf txbuf Argument txlength All data bytes transmitted C return ret Figure 5 22 Data Transmission via UART1 RO1AN2761EJ0100 Rev 1 00 Page 47 of 50 May 28 2015 RENESAS RL78 G13 Self Programming UART CC RL 5 11 Operation Check Procedure Change the string defined in the constant LCD_DISPLAY that is defined in r_cg_userdefine h for the sample program and rebuild the project Set up to eight characters in the constant LCD_DISPLAY Flash memory self programming is carried out by sending the HEX file that is generated as the reprogramming data from the sending side Refer to Section 5 1 Communication Specifications for the specifications for the communication between the sending side and this sample program For example the operation of the sample program will look like as shown below when the value of the constant LCD_DISPLAY is c
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