User Manual PCI-1750
Contents
1. Base Function Address Decimal Read Write 0 IDI 0 7 IDI0 7 1 IDI 8 15 IDI 8 15 2 23 Reserved Reserved 24 8254 Counter 0 8254 Counter 0 25 8254 Counter 1 8254 Counter 1 26 8254 Counter 2 8254 Counter 2 27 8254 Control Register 28 Reserved Reserved 29 Reserved Reserved 30 Reserved Reserved 31 Reserved Reserved 32 Interrupt Status Interru pt Status Register Register 26 27 PCI 1750 User Manual AD ANTECH eAutomation wwWw advantech com Please verify specifications before quoting This guide is intended for reference purposes only All product specifications are subject to change without notice No part of this publication may be reproduced in any form or by any means electronic photocopying recording or otherwise without prior written permis sion of the publisher All brand and product names are trademarks or registered trademarks of their respective companies Advantech Co Ltd 20112. User Manual PCI 1750 32 ch Isolated Digital I O Card AD ANTECH eAutomation Copyright The documentation and the software included with this product are copyrighted 2011 by Advantech Co Ltd All rights are reserved Advantech Co Ltd reserves the right to make improvements in the products described in this manual at any time without notice No part of this manual may be reproduced copied translated or transmitted in any form or by any means without the prior written permission of Advantech Co Ltd Information provided in this manual is intended to be accurate and reliable How ever Advantech Co Ltd assumes no responsibility for its use nor for any infringe ments of the rights of third parties which may result from its use Acknowledgements Intel and Pentium are trademarks of Intel Corporation Microsoft Windows and MS DOS are registered trademarks of Microsoft Corp All other product names or trademarks are properties of their respective owners Product Warranty 2 years Advantech warrants to you the original purchaser that each of its products will be free from defects in materials and workmanship for two years from the date of pur chase This warranty does not apply to any products which have been repaired or altered by persons other than repair personnel authorized by Advantech or which have been subject to misuse abuse accident or improper installation Advantech assumes no liability under the terms of
3. COM IGND IDO 0 IDO 1 IDO 2 IDO 3 IDO 4 IDO 5 IDO 6 IDO 7 IDO 8 IDO 9 IDO 10 16 IDO 11 IDO 12 17 IDO 13 IDO 14 18 EE COM2 19 Description of pin use IDI 0 IDI 15 Isolated digital input pins IDO 0 IDO 15 Isolated digital output pins IGND Isolated ground COM1 Common pin for connecting inductive loads of isolated output channels IDO 0 IDO 7 COM2 Common pin for connecting inductive loads of isolated output channels IDO 8 IDO 15 Counter2 Input pin of isolated counter shared with IDI 15 Warning A PCI 1750 User Manual Be careful when wiring digital input lines Never apply a negative voltage to the isolated input pins as this may damage the PCI 1750 IDI 15 Counter 2 2 6 Installation Instructions The PCI 1750 can be installed in any PCI slot in the computer How ever refer to the computer user s manual to avoid any mistakes and danger before you follow the installation procedure below 1 Turn off your computer and any accessories connected to the computer Warning N TURN OFF your computer power supply whenever you install or remove po any card or connect and disconnect cables Disconnect the power cord and any other cables from the back of the computer Remove the cover of the computer Select an empty 5 V PCI slot Remove the screw that secures the expansion slot cover to the system unit Save the screw to secure the interface card retain ing bracket Carefully g
4. 8254 chip is a 16 bit high speed 1 MHz isolated event counter it shares a pin with isolated IDI 15 The block diagram of the timer counter system of PCI 1750 is shown in Figure 3 3 Timers 0 and 1 are usually set in mode 3 square wave genera tor to generate periodic watchdog interrupts Counter 2 can be set in mode 0 stop on terminal count for measuring frequency or in mode 3 Square wave generator to generate periodic watchdog interrupts or to be used as an event counter For more details on the operating modes of the 8254 counter chip please refer to Appendix A 10MHz Timer 0 5V A GATE Timer IRQ OUT CLK e Timer 1 GATE Event Counter IRQ OUT CK IDI 15 Counter Counter 2 GATE Figure 3 3 Block diagram of timer counter 3 3 2 Timer Counter Frequency and Interrupt The input clock frequency of the counter timers is 10 MHz The output of both Timer 1 and Counter 2 can generate interrupts to the system refer to Section 3 3 The maxi mum and minimum timer interrupt frequency is 10 MHz 2x2 2 5 MHz and 10 MHz 65535 65535 0 002328 Hz respectively The gates of the counter timers are internally pulled to 5 V keeping the gate control always enabled 15 PCI 1750 User Manual 3 4 Interrupt Function 3 4 1 Introduction Four input channels IDI 0 IDI 4 IDI 8 and IDI 12 and the output of Timer 1 and Counter 2 are connected to
5. After you load the count into the selected count register the output will remain low and the counter will count When the counter reaches the terminal count its output will go high and remain high until you reload it with the mode or a new count value The counter con tinues to decrement after it reaches the terminal count Rewriting a counter register during counting has the following results 1 Writing to the first byte stops the current counting 2 Writing to the second byte starts the new count MODE 1 Programmable one shot The output is initially high The output will go low on the count following the rising edge of the gate input It will then go high on the terminal count If you load a new count value while the output is low the new value will not affect the duration of the one shot pulse until the succeeding trigger You can read the current count at any time without affecting the one shot pulse The one shot is retriggerable thus the out put will remain low for the full count after any rising edge at the gate input MODE 2 Rate generator The output will be low for one period of the input clock The period from one output pulse to the next equals the number of input counts in the counter register If you reload the counter register between output pulses the present period will not be affected but the subsequent period will reflect the value The gate input when low will force the output high When the gate input goes h
6. base addresses and interrupt assignments are automatically controlled by software No jumpers or DIP switches are required for user configuration 1 2 Features 16 isolated digital input and 16 isolated digital output channels High voltage isolation on all channels 2500 Vpc High sink current on isolated output channels 200 mA Channel D type 37 pin female connector Supports dry contact or 5 to 48 Vpc isolated input Chapter 1 General Information 3 Dual interrupt handling capability Timer Counter interrupt capability generates watchdog timer interrupts 1 3 Applications W Digital I O control Industrial ON OFF control Industrial and lab automation Switch status sensing BCD interfacing 1 4 Specifications 16 Optically Isolated Inputs W Input range 5 to 48 Vpc or dry contact M Isolation voltage 2 500 Vpc W Throughput 10 KHz 16 Optically lsolated Outputs Output range Open collector 5 to 40 Vpc B Sink Current 200 mA Max M Isolation voltage 2 500 Vpc O Throughput 10 KHz PCI 1750 User Manual 2 One 16 bit Optically lsolated Counter m Shares Pin with isolated input 15 W Throughput 1 MHz Max W Isolation voltage 2 500 Vic One 32 bit Timer m 10 MHz internal clock source Interrupt Source m Isolated Input 0 4 8 12 Counter and Timer Dimensions 175 mm x 100 mm 6 9 x 3 9 Connectors One DB 37 female connector One 2 pin terminal block for extended ground Power consumption 5 V
7. of interrupt Group 1 E0 E1 triggering edge control bits FO F1 flag bits PCI 1750 User Manual 16 3 4 4 Interrupt Source Control The mode bits written into the interrupt control register determine the allowable sources of signals generating an interrupt Bit O and bit 1 determine the interrupt source for interrupt group 0 and bit 4 and bit 5 determine the interrupt source for interrupt group 1 as indicated in Figure 3 4 Table 3 2 shows the relationship between an interrupt source and the values in the mode bits L 00 MO1 M00 Si 01 mo ue vcc 10 IDI 4 lc nm Mr 11 ND Q Timer 1 2 CLK L M11 M10 y 00 IDI8 Al oi 10 IDI12 gt 11 Counter 2 gt C INT A Figure 3 4 Interrupt source control Table 3 2 Interrupt mode bit values Interrupt Group 1 M11 M10 Description Interrupt Group 0 M01 MOO Description 0 0 Disable interrupt 0 0 Disable Interrupt 0 1 Source IDI 8 0 1 Source IDI 0 1 0 Source IDI 8 amp IDI 12 1 0 Source IDI 0 amp IDI 4 1 1 Source Counter 2 1 1 Source Timer 1 3 4 5 Interrupt Triggering Edge Control The interrupt can be triggered by a rising edge or a falling edge of the interrupt signal as determined by the value in the trigge
8. source 13 3 2 5 Isolated Outpuls tete ttt dace hee dada 14 Figure 3 2 Connecting an external output load 14 Timer and Counter enden elek 15 3 9 1 Introduction un deen 15 Figure 3 3 Block diagram of timer counter 15 3 3 2 Timer Counter Frequency and Interrupt ssssssssseserennseeeeeeerenne 15 Interrupt Function annuelle 16 3 4 1 Introduction uicit e etd iaia 16 BAZ IRQ Level iid acetate bae es ind deca 16 3 4 3 Interrupt Control Register Base 32 Dec 16 Table 3 1 Interrupt control register bit map 16 3 4 4 Interrupt Source Control 17 Figure 3 4 Interrupt source control 17 Table 3 2 Interrupt mode bit values 17 3 4 5 Interrupt Triggering Edge Control 17 Table 3 3 Triggering edge control bit values 17 3 4 6 Interrupt Flag Bit een 18 Table 3 4 Interrupt flag bit values eeen 18 Function of 8254 Counter Chip 19 The Intel 8254 cedet d em a e ite lan 20 A 1 1 Counter read write and control reosterg 20 Counter operating modes 22 A 2 1 MODE 0 Stop on terminal count sssenseseneenseeeseeeree nnr rr rennene 22 A 2 2 MODE 1 Programmable one shot 22 vii PCI 1750 User Manual A 3 Appendix B B 1 PCI 1750 Use
9. the interrupt circuitry The Interrupt Control Register of the PCI 1750 controls how the combination of the six signals generates an interrupt Two interrupt request signals designated interrupt group 0 and interrupt group 1 can be generated at the same time and then the software can service these two request signals by ISR IDI 0 IDI 4 and Timer 1 are connected to interrupt port 0 IDI 8 IDI 12 and Counter 2 are connected to interrupt port 1 The dual interrupt sources provide the card with more capability and flexibility 3 4 2 IRQ Level The IRQ level is set automatically by the PCI plug and play BIOS and is saved in the PCI controller There is no need for users to set the IRQ level Only one IRQ level is used by this card although it has two interrupt sources 3 4 3 Interrupt Control Register Base 32 Dec The Interrupt Control Register Base 32 Dec controls the interrupt signal source edge and flag Table 3 1 shows the bit map of the interrupt control register The regis ter is a readable writable register When writing to it it is used as a control register and when reading from it it is use data status register Table 3 1 Interrupt control register bit map Interrupt Source Interrupt Group 1 Interrupt Group 0 Bit D7 D6 D5 D4 D3 D2 D1 DO Abbreviation F1 E1 M11 M10 FO EO M01 Moo MOO and M01 mode bits of interrupt Group 0 M10 and M11 mode bits
10. this package for its protection You should also avoid contact with materials that hold static electricity such as plas tic vinyl and styrofoam Check the product contents inside the packing There should be one card one CD ROM and this manual Make sure nothing is missing Location of Connectors Figure 2 1 shows the names and locations of connectors on the board The PCI 1750 is a plug and play device The PCI BIOS assigns the system resources automatically at system start up All functions can be set by software No jumpers or switches are used on this card CN5 CN6 L_J Figure 2 1 Board Connections PCI 1750 User Manual 6 2 4 PCI 1750 Block Diagram PCI BUS PLX PCI 9050 Address Bus IDI 0 7 en IS N IDI 8 15 Data Bus IDO 0 7 Isolation 37 PIN D type n Connector IDO 8 15 ISO DI 0 ISO DI 8 Interrupt 8254 compatible Control 1 Logic Timer0 10MHz Osc Timer 7 ima Timer1 Counter lt ISO DI 15 IRQ Counter2 Address Decoder Figure 2 2 Block Diagram PCI 1750 User Manual 2 5 Connector Pin Assignments ipio 1 IDI 1 IDI2 2 IDI 3 IDI4 3 IDI 5 IDIG 4 IDI 7 ms 5 IDI 9 IDI 10 6 IDI 14 IDI 12 7 ti IDI 14 8 IGND 9 IGND
11. this warranty as a consequence of such events Because of Advantech s high quality control standards and rigorous testing most of our customers never need to use our repair service If an Advantech product is defec tive it will be repaired or replaced at no charge during the warranty period For out of warranty repairs you will be billed according to the cost of replacement materials service time and freight Please consult your dealer for more details If you think you have a defective product follow these steps 1 Collect all the information about the problem encountered For example CPU speed Advantech products used other hardware and software used etc Note anything abnormal and list any onscreen messages you get when the problem occurs 2 Call your dealer and describe the problem Please have your manual product and any helpful information readily available 3 f your product is diagnosed as defective obtain an RMA return merchandize authorization number from your dealer This allows us to process your return more quickly 4 Carefully pack the defective product a fully completed Repair and Replacement Order Card and a photocopy proof of purchase date such as your sales receipt in a shippable container A product returned without proof of the purchase date is not eligible for warranty service 5 Write the RMA number visibly on the outside of the package and ship it prepaid to your dealer Printed in Taiwan Editi
12. 850 mA Typical 5 V 1 0 A Max Operating temperature 0 70 C 32 F 158 F Storage temperature 20 80 C 4 F 176 F Humidity 5 95 non condensing 3 PCI 1750 User Manual PCI 1750 User Manual Chapter 2 Installation 2 1 Initial inspection 2 2 2 3 Before starting to install the PCI 1750 make sure there is no visible damage on the card We carefully inspected the card both mechanically and electrically before ship ment It should be free of marks and in perfect order on receipt As you unpack the PCI 1750 check it for signs of shipping damage damaged box scratches dents etc If it is damaged or fails to meet specification notify our service department or your local sales representative immediately Also call the carrier immediately and retain the shipping carton and packing materials for inspection by the carrier We will then make arrangements to repair or replace the unit Unpacking The PCI 1750 contains components that are sensitive and vulnerable to static elec tricity Discharge any static electricity on your body to ground by touching the back of the system unit grounded metal before you touch the board Remove the PCI 1750 card from its protective packaging by grasping the rear panel Handle the card only by its edges to avoid static discharge which could damage its integrated circuits Keep the antistatic package Whenever you remove the card from the PC please store the card in
13. Each of 16 isolated digital output channels comes equipped with a Darlington transis tor Every eight output channels share common collectors and integral suppression diodes for inductive loads Channels 0 7 use COM1 and channels 8 15 use COM2 as a common pin Note Ifthe external voltage source 5 40 V is connected to each isolated output channel IDOO IDO15 and its isolated digital output turns on E 200 mA max ch the card s current will sink from the external voltage source The current through IGND should not exceed 3 2 A Use the extended ground connector CN5 to shunt the current to the external voltage source ground Figure 3 2 shows how to connect an external output load to the card s isolated out puts PC5V 4 ISO 5V V IN V OUT 2 3 Internal External E VIN V OUT i Isolated DC To DC Z R 4h com o coMi A 1 POST es o lt 0 0 15 LOAD 0 15 DO0715 2 3 T voD ERD 5 40Voc V Ve Figure 3 2 Connecting an external output load PCI 1750 User Manual 14 3 3 3 3 1 Timer and Counter Introduction The PCL 1750 includes one 8254 compatible programmable timer counter chip which provides two 16 bit timers and one counter designated as Timer 0 Timer 1 and Counter 2 Timer 0 and Timer 1 are cascaded to be a 32 bit timer with its input connected to a 10 MHz oscillator and its gate control pulled high enabled Counter 2 of the
14. before you work on it Don t touch any components on the CPU card or other cards while the PC is on M Disconnect power before making any configuration changes The sudden rush of power as you connect a jumper or install a card may damage sensitive elec tronic components V PCI 1750 User Manual PCI 1750 User Manual vi Contents Chapter 1 ncn ND Chapter 2 2 1 2 3 2 4 2 5 2 6 Chapter 3 3 1 3 2 3 3 3 4 Appendix A A 1 A 2 Overview eren 1 Introduction a PE es 2 Features tede andes dans shader iti Nadu ean e SEAN de 2 Applications me RD PL 2 Specifications annahm anna 2 Installation 5 Initial IMSPECHOM ELS 6 UNPACKING po EM 6 Location of Connectors reor iro debet d c ie d eee 6 Figure 2 1 Board Connections 6 PCI 1750 Block Diagramm 7 Figure 2 2 Block Diagram anadi ter 7 Connector Pin Assignments eee 8 Installation Instructions iiri eee nre tte aae na ibd gn 9 eer m 12 Isolated Digital VO Porte esaiar innlinn ana anina anaa aiaa AL 12 3 2 1 Introduction iaia eine 12 3 2 2 Interrupt function of the DIO signals nennen 12 3 2 3 Power On Configuration nennen 12 3 24 Isolated Inputs in ne else lb 13 Figure 3 1 Connecting external input
15. e BCD Select Binary or BCD Counting BCD Type 0 Binary counting 16 bits 1 Binary coded decimal BCD counting If you set the module for binary counting the count can be any number from 0 up to 65535 If you set it for BCD Binary Coded Decimal counting the count can be any number from 0 to 9999 If you set both SC1 and SCO bits to 1 the counter control register is in read back command mode The control register data format then becomes BASE 27 Dec 8254 control read back mode Bit D7 DB D5 D4 D3 D2 DI DO Value 1 1 CNT STA C2 C1 CO X CNT 0 Latch count of selected counter s STA 0 Latch status of selected counter s C2 C1 amp CO Select counter for a read back operation C2 1 select Counter 2 C1 1 select Counter 1 CO 1 select Counter 0 If you set both SC1 and SCO to 1 and STA to 0 the register selected by C2 to CO contains a byte which shows the status of the counter The data format of the counter read write register then becomes BASE 24 25 26 Dec Status read back mode Bit D7 D6 D5 D4 D3 D2 D1 DO Value OUT NC RW1 RWO M2 M1 MO BCD OUT Current state of counter output NC Null count is 1 when the last count written to the counter register has been loaded into the counting element 21 PCI 1750 User Manual A 2 A 2 1 A 2 2 A 2 3 A 2 4 Counter operating modes MODE 0 Stop on terminal count The output will be initially low after you set this mode of operation
16. he manufacturer s instructions Document Feedback To assist us in making improvements to this manual we would welcome comments and constructive criticism Please send all such in writing to support advan tech com iii PCI 1750 User Manual Safety Instructions 10 11 12 13 14 15 16 17 18 19 20 21 22 23 Read these safety instructions carefully Keep this User Manual for later reference Disconnect this equipment from any AC outlet before cleaning Use a damp cloth Do not use liquid or spray detergents for cleaning For plug in equipment the power outlet socket must be located near the equip ment and must be easily accessible Keep this equipment away from humidity Put this equipment on a reliable surface during installation Dropping it or letting it fall may cause damage The openings on the enclosure are for air convection Protect the equipment from overheating DO NOT COVER THE OPENINGS Make sure the voltage of the power source is correct before connecting the equipment to the power outlet Position the power cord so that people cannot step on it Do not place anything over the power cord All cautions and warnings on the equipment should be noted If the equipment is not used for a long time disconnect it from the power source to avoid damage by transient overvoltage Never pour any liquid into an opening This may cause fire or electrical shock Never open the equipment For
17. igh the counter will start from the initial count You can thus use the gate input to synchro nize the counter With this mode the output will remain high until you load the count register You can also synchronize the output by software MODE 3 Square wave generator This mode is similar to Mode 2 except that the output will remain high until one half of the count has been completed for even numbers and will go low for the other half of the count This is accomplished by decreasing the counter by two on the falling edge of each clock pulse When the counter reaches the terminal count the state of the output is changed the counter is reloaded with the full count and the whole pro cess is repeated If the count is odd and the output is high the first clock pulse after the count is loaded decrements the count by 1 Subsequent clock pulses decrement the count by 2 After time out the output goes low and the full count is reloaded The first clock pulse following the reload decrements the counter by 3 Subsequent clock pulses decrement the count by two until time out then the whole process is repeated In this way if the count is odd the output will be high for N 1 2 counts and low for N 1 2 counts PCI 1750 User Manual 22 A 2 5 A 2 6 A 3 A 3 1 A 3 2 A 3 3 MODE 4 software triggered strobe After the mode is set the output will be high When the count is loaded the counter will begin counting On termi
18. isters The 8254 programmable interval timer uses four registers at addresses BASE 24 Dec BASE 25 Dec BASE 26 Dec and BASE 27 Dec for read write and control of counter functions Register functions appear below Register Function BASE 24 Dec Counter 0 read write BASE 25 Dec Counter 1 read write BASE 26 Dec Counter 2 read write BASE 27 Dec WV Pe J a Counter control word Since the 8254 counter uses a 16 bit structure each section of read write data is split into a least significant byte LSB and most significant byte MSB To avoid errors it is important that you make read write operations in pairs and keep track of the byte order The data format for the control register appears below BASE 27 Dec 8254 control standard mode Bit D7 D6 D5 D4 D3 D2 D1 DO Value SCT SCO RW1 RWO M2 M1 MO BCD Description SC1 amp SCO Select counter Counter SC1 SCO 0 0 0 1 0 1 2 1 0 Read back command 1 1 RW1 amp RWO Select Read Write Operation Operation RW1 RWO Counter Latch Read Write MSB 0 Read Write LSB 0 1 1 Oo 2 o Read Write LSB first then MSB PCI 1750 User Manual 20 M2 M1 amp MO Select Operating Mode M2 M1 MO Mode 0 0 0 0 Programmable one shot 0 0 1 1 Programmable one shot X 1 0 2 Rate generator X 1 1 3 Square wave generator 1 0 0 4 Software triggered strobe 1 0 1 5 Hardware triggered strob
19. nal count the output will go low for one input clock period then go high again If you reload the count register during counting the new count will be loaded on the next CLK pulse The count will be inhibited while the GATE input is low MODE 5 Hardware triggered strobe The counter will start counting after the rising edge of the trigger input and will go low for one clock period when the terminal count is reached The counter is retriggerable Counter operations Read write operation Before you write the initial count to each counter you must first specify the read write operation type operating mode and counter type in the control byte and write the control byte to the control register BASE 27 Dec Since the control byte register and all three counter read write registers have sepa rate addresses and each control byte specifies the counter it applies to by SC1 and SCO no instructions on the operating sequence are required Any programming sequence following the 8254 convention is acceptable There are three types of counter operation read load LSB read load MSB and read load LSB followed by MSB It is important that you make your read write operations in pairs and keep track of the byte order Counter read back command The 8254 counter read back command lets you check the count value programmed mode and current states of the OUT pin and Null Count flag of the selected coun ter s You write this command to the cont
20. ol register Base 32Dec to select the interrupt sources Refer to Section Interrupt Function for details about interrupt control Power On Configuration The default configuration after power on hardware reset or software reset is to set all the isolated output channels to low so that users need not worry about damaging external devices during system start up or reset PCI 1750 User Manual 12 3 2 4 Isolated Inputs Each of 16 isolated digital input channels accepts dry contacts or 5 48 Vpc voltage inputs All sixteen input channels share 3 ground pins and one extended ground ter minal block CN5 Figure 3 1 shows how to connect an external input source to one of the card s isolated input channels Warning Be careful when wiring digital input cables Never apply a negative volt A age to an isolated input pin as this may damage the PCI 1750 Note for wet contacts A malfunction might occur in cases where the internal resis tance of a voltage source under wet contacts is significant gt 5 kW It is advisable to connect a parallel 5 kW 0 5 W resistor to avoid a voltage rise inside the voltage source External Internal ISOSV PC SV DI 0 15 IDI 0 15 Dry Contact Open High DIE Ext GND Dry Wet Close Low Contact Contact Y Wet Contact 5 48V5 High 072 Voc Low Figure 3 1 Connecting external input source 13 PCI 1750 User Manual 3 2 5 Isolated Outputs
21. on 3 Part No 2003175000 December 2011 PCI 1750 User Manual ii Declaration of Conformity CE This product has passed the CE test for environmental specifications when shielded cables are used for external wiring We recommend the use of shielded cables This kind of cable is available from Advantech Please contact your local supplier for ordering information Technical Support and Assistance 1 Visit the Advantech web site at www advantech com support where you can find the latest information about the product 2 Contact your distributor sales representative or Advantech s customer service center for technical support if you need additional assistance Please have the following information ready before you call Product name and serial number Description of your peripheral attachments Description of your software operating system version application software etc A complete description of the problem The exact wording of any error messages Warnings Cautions and Notes Warning Warnings indicate conditions which if not observed can cause personal N injury Caution Cautions are included to help you avoid damaging hardware or losing data e g A There is a danger of a new battery exploding if it is incorrectly installed Do not attempt to recharge force open or heat the battery Replace the battery only with the same or equivalent type recommended by the man ufacturer Discard used batteries according to t
22. r Manual A 2 3 MODE 2 Rate generator sseeeeeseeererrseerrrssrrinnnnsrtennnnren nn 22 A 2 4 MODE 3 Square wave generator 22 A 2 5 MODE 4 software triggered strobe 23 A 2 6 MODE 5 Hardware triggered strobe 23 Counteroperations iura alan a ners ERA TA Rn dia 23 A 3 1 Read write operation 23 A 3 2 Counter read back command 23 A 3 3 Counter latch operation 23 Register Format of PCI 1750 25 Register Format of PCI 1750 etin 26 viii Chapter 1 Overview 1 1 Introduction The PCI 1750 offers 16 isolated digital input channels 16 isolated digital output channels one isolated counter and one timer with PCI bus interface With isolation protection of 2500 VD C the PCI 1750 is ideal for industrial applications where high voltage protection is required The card s 16 bits are divided into two 8 bit I O ports This makes the PCI 1750 very easy to program This card also offers dual interrupt handling capability providing the user more flexibility in using the counter timer digital inputs or a combination to gen erate interrupts to the PC A user can easily configure the interrupts through soft ware The PCI 1750 uses a PCI controller to interface the card to the PCI bus The control ler fully implements the PCI bus specification Rev 2 1 All bus relative configurations such as
23. rasp the upper edge of the PCI 1750 Align the hole in the retaining bracket with the hole on the expansion slot and align the gold striped edge con nector with the expansion slot socket Press the card into the socket gently but firmly Make sure the card fits the slot tightly Secure the PCI 1750 by screwing the mounting bracket to the back panel of computer Attach any accessories cable wiring terminal etc to the card Replace the cover of your computer Connect the cables you removed in step 2 Turn the computer power on 9 PCI 1750 User Manual PCI 1750 User Manual 10 Chapter 3 Operation 3 1 Operation 3 2 3 2 1 3 2 2 3 2 3 Maintaining signal connections is one of the most important factors in ensuring that your application system is sending and receiving data correctly A good signal con nection can avoid unnecessary and costly damage to your PC and other hardware devices This chapter provides useful information about how to connect input and output signals to the PCI 1750 via the I O connector Isolated Digital I O Ports Introduction The PCI 1750 has 16 isolated digital input channels designated IDI 0 IDI 15 and 16 isolated digital output channels designated IDO 0 IDO 15 Data can be read from or written to the card s channels Interrupt function of the DIO signals Two I O channels IDI 0 and IDI 8 can be used to generate hard ware interrupts A user can program the interrupt contr
24. ring edge control bit in the interrupt control register as shown in Table 3 3 Table 3 3 Triggering edge control bit values E0 or E1 Triggering edge of interrupt signal 1 Rising edge trigger 0 Falling edge trigger 17 PCI 1750 User Manual 3 4 6 Interrupt Flag Bit The interrupt flag bit is a flag indicating the status of an interrupt It is a readable and writable bit Read the bit value to find the status of the interrupt write 1 to this bit to clear the interrupt This bit must be cleared in the ISR to service the next incom ing interrupt Table 3 4 Interrupt flag bit values FO amp F1 Interrupt status Read 1 Interrupt 0 No Interrupt Write 1 Clear Interrupt 0 Don t Care PCI 1750 User Manual 18 Appendix A Function of 8254 Counter Chip A 1 A 1 1 A 1 1 1 The Intel 8254 The PCI 1750 uses one Intel 8254 compatible programmable interval timer counter chip The popular 8254 offers three independent 16 bit down counters Each counter has a clock input control gate and an output You can program each counter for max imum count values from 2 to 65535 The 8254 has a maximum input clock frequency of 10 MHz The PCI 1750 provides 10 MHz input frequencies to the counter chip from an on board crystal oscillator On the PCI 1750 the 8254 chip s Timer 0 and Timer 1 are cascaded to be a 32 bit programmable timer Counter read write and control reg
25. rol word register Format is as shown at the beginning of this section The read back command can latch multiple counter output latches Simply set the CNT bit to 0 and select the desired counter s This single command is functionally equivalent to multiple counter latch commands one for each counter latched The read back command can also latch status information for selected counter s by setting STA bit 0 The status must be latched to be read the status of a counter is accessed by a read from that counter The counter status format appears at the beginning of the chapter Counter latch operation Users often want to read the value of a counter without disturbing the count in prog ress You do this by latching the count value for the specific counter then reading the value The 8254 supports the counter latch operation in two ways The first way is to set bits RW1 and RWO to 0 This latches the count of the selected counter in a 16 bit hold register The second way is to perform a latch operation under the read back com mand Set bits SC1 and SCO to 1 and CNT 0 The second method has the advan tage of operating several counters at the same time A subsequent read operation on the selected counter will retrieve the latched value 23 PCI 1750 User Manual PCI 1750 User Manual 24 Appendix B Register Format of PCI 1750 B 1 Register Format of PCI 1750 PCI 1750 User Manual
26. safety reasons the equipment should be opened only by qualified service personnel If one of the following situations arises get the equipment checked by service personnel The power cord or plug is damaged Liquid has penetrated into the equipment The equipment has been exposed to moisture The equipment does not work well or you cannot get it to work according to the user s manual The equipment has been dropped and damaged The equipment has obvious signs of breakage DO NOT LEAVE THIS EQUIPMENT IN AN ENVIRONMENT WHERE THE STORAGE TEMPERATURE MAY GO BELOW 20 C 4 F OR ABOVE 60 C 140 F THIS COULD DAMAGE THE EQUIPMENT THE EQUIPMENT SHOULD BE IN A CONTROLLED ENVIRONMENT CAUTION DANGER OF EXPLOSION IF BATTERY IS INCORRECTLY REPLACED REPLACE ONLY WITH THE SAME OR EQUIVALENT TYPE RECOMMENDED BY THE MANUFACTURER DISCARD USED BATTERIES ACCORDING TO THE MANUFACTURER S INSTRUCTIONS The sound pressure level at the operator s position according to IEC 704 1 1982 is no more than 70 dB A PCI 1750 User Manual iv Safety Precaution Static Electricity DISCLAIMER This set of instructions is given according to IEC 704 1 Advantech disclaims all responsibility for the accuracy of any statements contained herein Safety Precaution Static Electricity Follow these simple precautions to protect yourself from harm and the products from damage M To avoid electrical shock always disconnect the power from your PC chassis
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