(EVK) User`s Manual - Peregrine Semiconductor
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1. _ 2 J9 c13 8 g R11 4 1 gt DNI 1 2 3 R10 14 3PNTINPER 1 USB RED T 1 DNI JP8 DNI 500m J4 ul ls pere 5 s b 4 JP7 Ed DN 8 Ut 8j 215 00MM amp 838 C10 CH DN 1MEGA RFoUr 24 T sa T DN JP6 2 spo RFOUT2 2 gt 1 2 i Ne a 2 PINJUMPER 5 pastra Ex REN PE46120 os 2 JP5 Je n T 5 ispen 20 1 4 6 19 4 97 ao 1 o 4 gt NC GND 2 PINJUVPER TIU 7 spo RFouri H8 Ji oor rom He A DNI 2 84822222 ap 2PNJUVPER H sj 33 H 549199 mae DEVICE TEST FUNCTIONALITY VDD IFB1 4 L 7 9 J1 PIN FUNCTIONALITY A 1 Wire um 2 JP1 12 TEST ENABLE 1 DN DN 13 TEST OUT1 lc 19 POLARITY SELECT USB RED oe cs i JP2 A io 28 TESTOUT2 bie Ems 4 1 29 TEST ENABLE 2 4 OOHM DN E d 2 5 a 1 aes 9 C6 HEADER2 9 R5 100pF Ls 1 JP3 n DNI 1 8 H 2 7 X NL 3 PNUINPER INSTALL LOGIC JUMPERS ON REF DES PINS NOTES JP3 23 1 CAUTION ipt CONTAINS PARTS AND ASSEMBLIES SUSCEPTIBLE JP5 12 TODAMAGE BYELECTROSTATIC DISCHARGE ESD JPG 12 JP9 23 DOC 68985 1 08 2015 9 www psemi com 46120 EVK Use2. 8 USB Interface Board OVEWIEW asad hr E Ub Rl EU I Ra GR Deora RAE E 8 Evaluation Board OVEIVIBW vli rae EF rapis 9 Hardware Operation uu esos range aad ca cepa opea 11 Using the Graphical User Interface 15 Continuous Pattern 2 u s teo u uu _______________________ Ia dire 16 Send Signal ese icto tt xe em Meas ex ud pr E ee E Cr e Ve ace ps COTES Pte RE Rel papal bass 16 Attenuation and Phase Slide bte sre eria yas EA Nos Pan ore oec ele ga e ie emer E 17 Technical ReSDUICBS see moe rime temm onde qais laco gi dmi teu 19 Technical Resources 19 Document Categories enc passe Eta EM Rae T sss 21 DOC 68985 1 08 2015 UrLrBACMOS Page iii www psemi com 46120 EVK User s Manual G Peregrine Semiconductor This page intentionally left blank Page iv 5 DOC 68985 1 08 2015 www psemi com 2 22 Peregrine 2 yka PE46120 EVK User s Manual Introduction Introduction The PE46120 is a HaRP technology enhanced monolithic phase and amplitude contr
3. H L L L L 45 Q13 Q12 Q11 Q10 Q9 Q8 Q7 leer Q4 Q3 3 Default S2 M3 M2 M1 MO 2 1 Setting at Setting Power Up 22 5 11 2 56 2 8 0 dB DS 0 L L L L L L L L L 0 dag 7 5 dB DS 1 H H H H H L L L L 45 DOC 68985 1 08 2015 RA Page 13 www psemi com 46120 EVK User s Manual Table 9 Serial Interface Timing Characteristics Z Peregrine Semiconductor Serial clock frequency Fc 0 032 26 MHz Serial clock period Tsci K 40 ns Serial clock HIGH time 20 ns Serial clock LOW time TscLKL 20 ns Serial data output propagation delay from CLK falling edge Toy 10 pF 9 ns Latch clock pulse width high T 10 ns Serial data input setup time from CLK rising edge Tsy 5 ns Serial data input hold time from CLK rising edge Ty 2 ns Serial data output hold time from CLK rising edge Toy 1 6 ns Serial clock rising edge setup time to latch clock rising edge TsEeTTLE 27 ns SDO drive strength 15 pF Notes 1 2 3V 5 5V 40 lt TA lt 1 5 C unless otherwise specified 2 Limited by test duration not static logic design Synchronous to clock Minimum clock frequency tested 32 kHz 3 SDO maximum capacitive load drive st
4. 1 PE46120 MPAC evaluation board assembly PRT 55151 1 Peregrine USB interface board assembly PRT 50866 1 USB 2 0 Type A to Type B mini cable DOC 68985 1 08 2015 5 1 www psemi com 46120 7 EVK User s Manual A Sala Software Requirements The MPAC evaluation software will need to be installed on a computer with the following minimum requirements PC compatible with Windows XP Vista 7 or 8 Mouse or other pointing device USB port HTML browser with internet access Administrative privileges Hardware Requirements In order to evaluate the performance of the evaluation board a Vector network analyzer is required Caution The PE46120 MPAC EVK contains components that might be damaged by exposure to voltages in excess of the specified voltage including voltages produced by electrostatic discharges Handle the board in accordance with procedures for handling static sensitive components Avoid applying excessive voltages to the power supply terminals or signal inputs or outputs 2 5 DOC 68985 1 08 2015 www psemi com 46120 J Pereeri ereerine EVK User s Manual Y Jala Neb Evaluation Board Assembly Evaluation Board Assembly Overview The evaluation board EVB is assembled with a PE46120 several headers and SMA connectors as shown in Figure 1 Figure 1 PE46120 Evaluation Board Assembly DOC 68985 1 08 2015
5. 2 1 51 50 1 ES E 45 22 5 11 2 5 6 2 8 2 4 2 1 0 5 45 22 5 11 2 5 6 2 8 Table 5 Serial Truth Table Phase Setting 013 Q12 911 Q10 Q9 Q8 Q7 Q6 95 Q4 Q3 Phase Shift 53 52 M2 Ml P4 P3 P2 1 PO Setting 4 2 1 05 45 225 11 2 56 28 X X X X X X X L L L L L X X Ref phase X X X X X X X L L L L H X X 2 8 deg X X X X X X X L L L H L X X 5 6 deg X X X X X X X L L H L L X X 11 25 deg X X X X X X X L H L L L X X 22 5 deg X X X X X X X H L L L L X X 45 deg X X X X X X X H H H H H X X 87 2 deg Page 12 UrirRBACMOS DOC 68985 1 08 2015 www psemi com 2 CNET PE46120 reregrine Somicomorfor EVK User s Manual Table 6 Serial Truth Table Attenuation Setting RF oyr2 Q13 Q12 Q11 Amplitude Setting H X X L L L L X X X X X X X Ref insertion loss H X X L L L H X X X X X X X 0 5 dB H X X L L H L X X X X X X X 1 dB H X X L H L L X X X X X X X 2 dB H X X H L L L X X X X X X X 4 dB H X X H H H H X X X X X X X 7 5 dB Table 7 Default State Settings at Power Up RF gyri Q13 Q12 Q11 Q10 Q9 Q5 e Z Q3 Q2 ES Default Settin S2 M3 2 P3 2 1 Setting at g Power Up 22 5 11 2 56 2 8 0 dB DS 0 L L L L L bdo 0 dB DS 1
6. For additional information contact Sales at sales psemi com Corporate Headquarters 9369 Carroll Park Drive San Diego CA 92121 858 731 9400 Page ii ULrBACMOS DOC 68985 1 08 2015 www psemi com 46120 EVK User s Manual Z Peregrine Semiconductor Table of Contents Introduction wA i miei dud 1 6 1 Application SUpport cC 1 Evaluation Kit Contents and Requirements 1 digni awaq 1 Software REQUIFEMENTS uuu u u epe ela En aie 2 Hardware Reg lrem e nts eo eR one eG PUN AT ROT aia WEE pasapusaq aqasha 2 Evaluation Board Assembly 43 esces soseeacssee eect erie 3 Evaluation Board Assembly Overview 3 Quick ae cmi died eiae uui fede 5 Quick Start Overview 5 Software Installation creer reer err ere eee lt 7 5 USB dyads 5 EVK SOMWATC toe EE I 5 Hardware Configuration
7. UtLrRACMOS 3 www psemi com 46120 EVK User s Manual G Peregrine Semiconductor This page intentionally left blank Page 4 5 DOC 68985 1 08 2015 www psemi com 46120 EVK User s Manual Quick Start Guide Quick Start Overview The EVB was designed to ease customer evaluation of the PE46120 MPAC This chapter will guide the user through the software installation hardware configuration and using the graphical user interface GUI Software Installation USB Driver The latest USB interface board drivers are available via Microsoft Windows update Internet connectivity is required to download the drivers Connect the USB interface board to the PC and select the Windows Update option to obtain and install the drivers Figure 2 If the USB board drivers are not installed it will not be possible to complete the installation of the MPAC EVK software A USB interface board Figure 11 is included in the evaluation kit Figure 2 USB Driver Installation Detecting EVK Software In order to evaluate the PE46120 performance the application software has to be installed on your DOC 68985 1 08 2015 UtrraCMOS GY Peregrine Semiconductor computer The USB interface and MPAC application software is compatible with computers running Windows XP Vista 7 8 in 32 or 64 bit configura tions This software is available directly from Peregrine s website
8. at www psemi com To install the MPAC evaluation software unzip the archive and execute the setup exe Figure 3 Figure 3 MPAC Evaluation Software Installer MPAC_EVK_SW_INSTALLER 15 setup After the setup exe file has been executed a welcome screen will appear It is strongly recommended that all programs be closed prior to running the install program Click the Next gt button to proceed Figure 4 MPAC Evaluation Software Setup ifs MPAC Evaluation S Welcome to the MPAC Evaluation Software Setup Wizard The installer will guide you through the steps required to install MPAC Evaluation Software on your l computer WARNING This computer program is protected by copyright law and international treaties Unauthorized duplication or distribution of this program or any portion of it may result in severe civil or criminal penalties and will be prosecuted to the maximum extent possible under the law Page 5 www psemi com 46120 EVK User s Manual Take a moment to read the license agreement then click I Agree and Next gt Figure 5 License Agreement Peregrine Semiconductor In the window of Confirm Installation click Next gt to proceed with the software installation Figure 7 Confirm Installation License Agreement Please take a moment to read the license agreement now If you accept the terms below click I Agree then Next Other
9. AH Peregrine PE46120 Evaluation Kit EVK User s Manual Monolithic Phase amp Amplitude Controller 1 7 2 2 GHz PE46120 Evaluation Kit UrLTRACMO S MPAC D 00 68985 1 08 2015 95 EVK User s Manual www psemi com 46120 7 4 ereerine EVK User s Manual 2 Copyright and Trademarks 2015 Peregrine Semiconductor Corporation All rights reserved The Peregrine name logo UTSi and UltraCMOS are registered trademarks and HaRP MultiSwitch and DuNE are trademarks of Peregrine Semicon ductor Corp Disclaimers The information in this document is believed to be reliable However Peregrine assumes no liability for the use of this information Use shall be entirely at the user s own risk No patent rights or licenses to any circuits described in this document are implied or granted to any third party Peregrine s products are not designed or intended for use in devices or systems intended for surgical implant or in other applications intended to support or sustain life or in any application in which the failure of the Peregrine product could create a situation in which personal injury or death might occur Peregrine assumes no liability for damages including consequential or incidental damages arising out of the use of its products in such applications Patent Statement Peregrine products are protected under one or more of the following U S patents patents psemi com Sales Contact
10. S parameters zip file evaluation kit schematic and bill of materials material declaration form and PC compatible software file Trademarks are subject to trademark claims DOC 68985 1 08 2015 ULrRACMOS Page 19 www psemi com 46120 EVK User s Manual G Peregrine Semiconductor This page intentionally left blank Page 20 5 DOC 68985 1 08 2015 www psemi com 46120 p P j ereerine EVK User s Manual Z das Document Categories Advance Information The product is in a formative or design stage The document contains design target specifications for product development Specifications and features may change in any manner without notice Preliminary Specification The document contains preliminary data Additional data may be added at a later date Peregrine reserves the right to change specifications at any time without notice in order to supply the best possible product Product Specification The document contains final data In the event Peregrine decides to change the specifications Peregrine will notify customers of the intended changes by issuing a CNF Customer Notification Form Not Recommended for New Designs NRND This product is in production but is not recommended for new designs End of Life EOL This product is currently going through the EOL process It has a specific last time buy date Obsolete This product is discontinued Orders are no longer accept
11. ed for this product DOC 68985 1 08 2015 UtLrRACMOS Page 21 www psemi com
12. ion Step Size 0 50 dB 3 6 7 5 dB Attenuation Resolution 4 bit 0 dB LSB Phase Shift Maximum 87 1875 deg Phase Shift Step Size 2 8125 deg Phase Shift Resolution 5 bit Interface SPI Continuous Pattern Loop RF Out 1 Path T 0 Relative Phase lt O T P PUS B POUR 4g 4105561 1 3141 1 USB SPI Interface Board 101 0653 connected pi 0 00 87 19 2 81 LSB RFOut1 Waveform RFOut2 Waveform 2014 Peregrine Semiconductor Corp All rights reserved No reproduction without prior written consent Note SDO in the serial interface waveform is read back from the MPAC to verify SDO toggling to indicate proper communication with the MPAC DOC 68985 1 08 2015 5 15 www psemi com 46120 EVK User s Manual Continuous Pattern Loop The continuous pattern loop checkbox see Figure 16 allows the user to observe the evaluation board automatically step through each of the phase and attenuation states Once the GUI reaches the maximum state value the cycle begins again at the minimum state value This function can be started and stopped at any time by selecting deselecting the checkbox Figure 16 Continuous Pattern Loop Continuous Pattern Loop Page 16 ULrBACMOS LB Peregrine 2 Peregrine Send Signal The Send Signal box can be used to resend the same data Figure 17 Send Signal DOC 68985 1 08 2015 www psemi c
13. oller MPAC designed for precise phase and amplitude control of two independent RF paths It optimizes system performance while reducing manufacturing costs of transmitters that use symmetric or asymmetric power amplifier designs to efficiently process signals with large peak to average ratios This monolithic RFIC integrates a 90 RF splitter digital phase shifters and a digital step attenuator along with a low voltage CMOS serial interface It can cover a phase range of 87 2 in 2 8 steps and an attenuation range of 7 5 dB in 0 5 dB steps while providing excellent phase and amplitude accuracy from 1 8 2 2 GHz The PE46120 also features exceptional linearity high output port to port isolation and extremely low power consumption relative to competing module solutions It is offered in a 32 lead 6 x 6 mm QFN package The PE46120 evaluation kit EVK includes hardware required to control and evaluate the functionality of the MPAC The MPAC evaluation software can be downloaded at www psemi com and requires a PC running Windows operating system to control the USB interface board Application Support For any technical inquiries regarding the evaluation kit or software please visit applications support at www psemi com fastest response or call 858 731 9400 Evaluation Kit Contents and Requirements Kit Contents The PE46120 EVK includes the following hardware required to evaluate the MPAC Table 1 PE46120 Evaluation Kit Contents
14. ollow the installation procedure included Figure 11 USB Interface Board C a id e m Connection of the USB Interface Board to the Evaluation Board The EVB and the USB interface board contain a 14 pin header This feature allows the USB interface board socket to connect directly to the EVB pin on the front side as show in Figure 12 Use caution when making the connection to insure the USB interface board is aligned and connected to both rows of pins properly Figure 12 USB Interface Board Connected to the Evaluation Board Page 8 5 DOC 68985 1 08 2015 www psemi com ZZ Peregrine Bathe Evaluation Board Overview PE46120 EVK User s Manual The evaluation board is designed to ease customer evaluation of Peregrine s products The board contains 1 Digital signal connectors are provided for power supply digital control signals and USB interface board 2 SMA connectors are provided for RF performance verification and THRU trace to calibrate board trace loss The schematic and evaluation board outline are provided in this user manual Figure 13 PE46120 Evaluation Board Schematic
15. om y 46120 Z Peregrine Semiconductor EVK User s Manual Attenuation and Phase Slide Bar The RF Out Path slide bar allows the user to quickly select the desired attenuation and phase The arrows at the left and right can be clicked to increase or decrease phase or attenuation state at the minimum step size The attenuation and phase value text box is updated with each change of the phase slider This control is two way the user can also enter a valid attenuation and phase value into this text box followed by the ENTER key to program the hardware with the updated value Figure 18 RFouri Path Slide Bar RF Out 1 Path State 0 Relative Phase 31 K LO H gt Phase 0 00 87 19 Figure 19 Path Slide Bar RF Out 2 Path State 0 Relative Phase 31 gt Phase 0 00 87 19 State 0 Relative Attenuation 15 lt 0 I I I I gt Atten 0 00 7 50 DOC 68985 1 08 2015 ULrBACMOS Page 17 www psemi com 46120 EVK User s Manual G Peregrine Semiconductor This page intentionally left blank Page 18 5 DOC 68985 1 08 2015 www psemi com 46120 J EVK User s Manual Semiconductor Technical Resources Technical Resources Additional technical resources are available for download in the Products section at www psemi com These include the Product Specification datasheet
16. r s Manual Peregrine Semiconductor Figure 14 PE46120 Evaluation Board Outline Showing Functional Overview USB Interface Board Connector VDD can be applied by external power supply VDD is applied from USB T DS 0 board power supply RF Out 2 VDD is applied from USB RF Out 1 board power supply SPEN 0 USB Interface Board Connector Z Peregrine Semiconductor THRU trace is for board trace loss calibration Page 10 5 DOC 68985 1 08 2015 www psemi com D P 4 eregrine 2 Hardware Operation PE46120 EVK User s Manual The general guidelines for operating the hardware evaluation board are listed in this section Follow the steps below to configure the hardware properly for the performance 1 Connect the jumper on JP4 JP5 and JP6 a JP4 is connected to PE46120 pin 19 GND to ground b JP5 is connected to PE46120 pin 20 SPEN to ground for normal SPI operation Refer to datasheet Table 11 c JP6 is connected to PE46120 pin 21 DS to ground as DS 0 setting Refer to Table 6 and Table 7 2 There are two options to provide PE46120 a power supply They are a Option 1 Power up through USB interface board Evaluation board is using this option by connecting jumper on JP3 pin 2 3 and jumper on JP9 pin 2 3 refer to Figure 14 b Option 2 Power via external power supply The evaluation board is configured for this option by in
17. r will be displayed On slower computers installation of the software may proceed for a few moments Figure 8 Progress Indicator Installing MPAC Evaluation Software MPAC Evaluation Software is being installed Please wait Cancel 6 DOC 68985 1 08 2015 www psemi com LG Peregrine Y Bake Mea Once the evaluation software is installed click Close to exit Figure 9 Installation Complete Installation Complete MPAC Evaluation Software has been successfully installed Click Close to exit Please use Windows Update to check for any critical updates to the NET Framework PE46120 EVK User s Manual A new Start Menu item under Peregrine Semicon ductor will appear in the start menu of your computer Select MPAC Evaluation Software to launch the GUI Figure 10 MPAC Evaluation Software Launch J Peregrine Semiconductor SE MPAC Evaluation Software exe DOC 68985 1 08 2015 ULrRACMOS Page 7 www psemi com EVK User s Manual Semiconductor PE46120 Y Peregrine Hardware Configuration USB Interface Board Overview The USB interface board Figure 11 is included in the evaluation kit This board allows the user to send serial peripheral interface SPI commands to the device under test by using a PC running the Windows operating system To install the software extract the zip file to a temporary directory and f
18. rength for MHz with a 1 8V swing page 14 www psemi com DOC 68985 1 08 2015 J PE46120 Peregrine Semiconductor EVK User s Manual Using the Graphical User Interface Figure 15 displays the MPAC application software graphical user interface GUI which has the USB interface board plugged into the computer The message USB SPI Interface Board 101 0653 connected will indicate that the USB interface board is connected and recognized Hardware Operation as shown on page 11 is for the EVK hardware configuration to use with the GUI control software If the USB interface board is not connected when the application software is launched the message No interface board connected Please connect USB SPI Interface 101 0653 will appear at the bottom of the screen In the upper left corner under the Peregrine logo there is a drop down menu item to select the part number for evaluation and the part description is below the part number box The MPAC application software graphical user interface GUI is displayed in Figure 15 and illustrates the available controls and messages available to the user Figure 15 MPAC Application Software Graphical User Interface Ed MPAC Evaluatic File RF Out 2 Path State 0 Relative Phase lt o Peregrine ce den um Semiconductor Part Number Attenuation Maximum 7 50 dB Attenuat
19. stalling a jumper on JP3 pins 1 2 and JP9 pins 1 2 refer to Figure 14 Connect the external power supply to VDD EXT J10 or J11 pin 1 pin 2 3 Plug in USB interface board Figure 11 on J8 or J9 as shown in Figure 12 J8 and J9 provide identical control to the device 4 Calibrate board trace loss and phase with THRU trace between J6 and J7 THRU calibration is sufficient for initial measurements If more accurate results are desired the full set of SLOT standards can be used Table 2 Recommended Operating Condition PE46120 Supply voltage Vpp 2 3 5 5 V Supply current 350 500 pA Digital input high 1 17 3 6 V Digital input low 0 0 6 V Digital input leakage 10 20 HA RF input power CW 29 dBm RF input power pulsed 32 dBm Operating temperature range 40 25 105 Notes 1 Product performance does not vary over Vpp 2 Pulsed 5 duty cycle of 4620 us period DOC 68985 1 08 2015 5 11 www psemi com 46120 i EVK User s Manual Peregrine Table 3 Bit Descriptions Channel register select L channel RFouri register select CO channel RFouyre register select MO M3 Attenuation setting per channel 0 4 Phase shift setting per channel 50 53 Spare bits Table 4 14 bit Word Q13 Q12 Q11 QI0 Q9 Q8 Q7 Q6 Q5 Q4 Q3 Q2 Q1 Q0 C0 53 52 M3 M2 M1 4
20. wise click Cancel BY CLICKING ON THE I Agree BUTTON YOU MEANING YOU PERSONALLY OR THE COMPANY YOU 8 REPRESENT AND ON WHOSE BEHALF YOU ARE FULLY AUTHORIZED TO ENTER THIS AGREEMENT ARE TO BE BOUND BY AND ARE BECOMING A PARTY TO THIS LICENSE AGREEMENT AGREEMENT IF YOU DO NOT AGREE TO ALL OF THE TERMS OF THIS AGREEMENT CLICK THE CANCEL BUTTON AND THE IDOWNLOAD INSTALLATION PROCESS WILL NOT CONTINUE J Do Not Agree lAgree For most users the default install location for the program files is sufficient If a different location is desired the install program can be directed to place the program files in an alternate location The software is installed for Everyone by default Once the desired location is selected click Next gt Figure 6 Select Installer Folder The installer will install MPAC Evaluation Software to the following folder To install in this folder click Next To install to a different folder enter it below or click Browse Folder Files x86 Peregrine Semiconductor Corp MPAC Evaluati Browse Install MPAC Evaluation Software for yourself or for anyone who uses this computer 9 Everyone 7 Just me Confirm Installation The installer is ready to install MPAC Evaluation Software on your computer Click Next to start the installation As the software files are installed a progress indicato
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