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2. OUT OUT IN IN OUT IN IN IN IN IN OUT IN IN OUT IN IN OUT IN OUT IN IN IN OUT IN OUT OUT IN IN OUT OUT IN IN IN IN OUT OUT IN OUT IN IN OUT OUT OUT IN IN IN OUT OUT OUT OUT IN OUT IN IN IN IN IN OUT IN IN IN OUT IN OUT IN IN OUT IN IN OUT IN IN OUT OUT IN OUT IN OUT IN IN IN OUT IN OUT IN OUT IN OUT IN OUT OUT IN IN OUT IN OUT OUT OUT IN OUT OUT IN IN IN IN OUT OUT IN IN OUT IN OUT OUT IN OUT IN IN OUT OUT IN OUT OUT IN OUT OUT OUT IN IN IN OUT OUT OUT IN OUT IN OUT OUT OUT OUT IN IN OUT OUT OUT OUT OUT 7COOH OUT IN IN IN IN IN 8000H OUT IN IN IN IN OUT 8400H OUT IN IN IN OUT IN 8800H OUT IN IN IN OUT OUT 8COOH OUT IN IN OUT IN IN 9000H OUT IN IN OUT IN OUT 9400H OUT IN IN OUT OUT IN 9800H OUT IN IN OUT OUT OUT 9COOH OUT IN OUT IN IN IN A000H OUT IN OUT IN IN OUT A400H OUT IN OUT IN OUT IN A800H OUT IN OUT IN OUT OUT ACOOH OUT IN OUT OUT IN IN BOOOH 2 4 202 Manual December 1986 Table 2 2 Base Address Jumper Options Cont d 2 4 2 Address Modifier Jumper The XVME 202 has one jumper that determines which Address Modifier Codes it will respond to This jumper is labeled as J2 see Figure 2 1 for the jumper location Jumper J2 determines whether the module will respond to supervisory or to non privileged short I O VMEbus cycles When jumper J2 is in the module will respond to supervisory short I O bus cycles only When jumper J2 is out the module will respond to both non
3. OUT OUT OUT IN B800H 2 XVME 202 Manual December 1986 Base Address Jumper Options Cont d C 3 202 Manual December 1986 Addressing Options Address Modifier that the Module will Jumper J2 respond to In 2DH Supervisory Only Out 2DH Supervisory or 29H Non privileged 202 Manual December 1986 PAMUX Pin Out WRITE STROBE READ STROBE RESET NOTE All even numbered pins on connector JK1 are tied to logic ground
4. a step by step procedure for installing the 6U front panel on an XVME 600 Module refer to figure 2 4 for a graphic depiction of the installation procedure l 2 Disconnect the module from the bus Remove the screw and plastic collar assemblies labeled 6 and 7 from the extreme top and bottom of the existing 30 front panel and install the screw assemblies in their corresponding locations on the 6U front panel Slide the module identification plate labeled 13 from the handle 9 on the 3U front panel By removing the screw nut found inside the handle the entire handle assembly will separate from the 3U front panel Remove the counter sunk screw 8 to separate the 3U front panel from the printed circuit board 12 Line up the plastic support brackets on the printed circuit board with the corresponding holes in the 6U front panel ie the holes at the top and top center of the panel Install the counter sunk screw 8 in the hole near the top center of the 6U panel securing it to the lower support bracket on the printed circuit board Install the handle assembly which was taken from the 30 panel at the top of the 6U panel using the screw and nut previously attached inside the handle After securing the top handle slide the module identification plate in Finally install the bottom handle i e the handle that accompanies the kit labeled 2 using the screw and nut 3 amp 5 provided Slide the
5. 4 MODULE SPECIFICATIONS The following is a list of the operational and environmental specifications for the XVME 202 PAMUX Interface Module Power Requirements Board Dimensions Temperature Operating Non Operating Humidity Altitude Operating Non Operating Vibration Operating Non Operating Shock Operating Non operating VMEbus Compliance 1 3 5 16A typ 1 8 max 150 x 116 7 mm 0 to 65 degrees C 32 to 149 degrees F 40 to 85 degrees C 40 to 158 degrees F 5 to 95 RH non condensing Extremely low humidity may require protection against static discharge Sea level to 10 000 ft 3048m Sea level to 50 000 ft 15240m 5 to 2000 Hz 0 0 15 peak to peak displacement 2 5 g peak acceleration 5 to 2000 Hz 0 030 peak to peak displacement 5 0 g peak acceleration 30 g peak acceleration 11 msec duration 50 g peak acceleration 11 msec duration Complies with VMEbus Standard Revision 1 A16 D08 0 Slave Form Factor SINGLE Base address jumper selectable on IK boundaries within the VMEbus short I O address space XVME 202 Manual December 1986 Compatibility VMEbus Access Time Compatible with OPTO 2 2 PAMUX 4 or PAMUX 2 if the PAMUX unit is configured for 8 bit use Typical Maximum DSO ASSERTED TO DTACK ASSERTED READ 2500nS 2700nS DSO ASSERTED TO DTACK ASSERTED 50015 60015 DSO NEGATED DTACK NEGATED 65nS 10015 202 M
6. 9861 202 3 915 T 30 12945 COC HINAX 053 06 ENY d i tw 13538 T Qu Si twn 0615 0812 001 Sig 8 8577 s 5 AS AS 0 324 lt or 9 52 V 13538 1 ce yor ev C3 m 993591794 98 gt 0812 8812 081 8 5 oY 223 lt gt 98 198 AS AS AG lt 50575 sin FD N33408 579 0 22 2113 18 90 z 28 so o eg DE 8 5159 55 cc 96 93 HH 8 59 ce E 88 10 985 081 CLES rye 1 0 951 4 33308 9190 18 Y ASe AS AS AGS AZ 9861 1 IenugN cCOC HINAX 202 Manual December 1986 Appendix C QUICK REFERENCE GUIDE XVME 202 MODULE JUMPER LIST Selects optional on board oscillator Selects SYSCLK from VMEbus Determines whether the module will respond to supervisory or non privileged short I O VMEbus cycles refer to section 2 4 2 of this manual 10 15 Select base address on any one of th
7. ACKOUT signals form a daisy chained acknowledge The IACKIN signal indicates to the VME board that an acknowledge cycle is in progress IACKOUT 1A 22 INTERRUPT ACKNOWLEDGE OUT Totem pole driven signal IACKIN and IACKOUT signals form a daisy chained acknowledge The IACKOUT signal indicates to the next board that an acknowledge cycle is in progress 5 14 23 ADDRESS MODIFIER bits 0 5 Three state driven 1B 16 17 lines that provide additional information about the 18 19 address bus such as size cycle type and or DTB 1 14 master identification AS 1A 18 ADDRESS STROBE Three state driven signal that indicates a valid address is on the address bus 202 Manual December 1980 Table 1 VMEbus Signal Identification cont d Connector Signal and Mnemonic Pin Number Signal Name and Description A01 A23 1A 24 30 ADDRESS BUS bits 1 23 Three state driven address 1C 15 30 lines that specify a memory address A24 A31 2B 4 11 ADDRESS BUS bits 24 31 Three state driven bus expansion address lines BBSY 1B 1 BUS BUSY Open collector driven signal generated by the current DTB master to indicate that it is using the bus BCLR 18 2 BUS CLEAR Totem pole driven signal generated the bus arbitrator to request release by the DTB master if a higher level is requesting the bus BERR BUS ERROR Open collector driven Signal generated by a slave It indicates that an unrecoverable error
8. Acromag S THE LEADER IN INDUSTRIAL XVME 202 3U PAMUX Module USER S MANUAL ACROMAG INCORPORATED Tel 248 295 0885 30765 South Wixom Road Fax 248 624 9234 P O BOX 437 Email xembeddedsales acromag com Wixom MI 48393 7037 U S A Copyright 2012 Acromag Inc Printed in the USA Data and specifications are subject to change without notice 8500 966B XYCOM REVISION RECORD Description Manual Released Manual Updated Incorporated PCN 103 Copyright Information This document is copyrighted by Xycom Incorporated Xycom and shall not be reproduced or copied without expressed written permission from Xycom The information contained within this document is subject to change without notice Address comments concerning this manual to xycom Technical Publications Department 750 North Maple Road Saline Michigan 48176 Part Number 742 02 0 01 202 Manual December 1986 TABLE OF CONTENTS CHAPTER TITLE 1 INTRODUCTION 1 1 Overview 1 2 Manual Structure 1 3 Module Operational Description 1 4 Module Specifications 2 INSTALLATION 2 1 Introduction 2 2 System Requirements 2 3 202 Interface Module Jumper Connector Locations 2 4 XVME 202 Module Jumper List 2 4 1 Base Address Jumpers 2 4 2 Address Modifier Jumper 2 5 JK1 Pin Assignments 2 6 Module Installation 2 7 Connecting the PAMUX unit 2 8 Optional On board Oscillator 2 9 Installing a 6
9. Oscillator 2 1 XVME 202 Manual December 1986 2 3 XVME 202 PAMUX INTERFACE MODULE JUMPER CONNECTOR LOCATIONS The jumpers and connectors relevant to the installation of the XVME 202 are shown in Figure 2 1 JK1 CONNECTOR OF TL TT TL T TL IT TEL TE HO 3T P1 CONNECTOR Figure 2 1 Jumper Connector Locations on the XVME 202 2 2 202 Manual December 1980 2 4 XVME 202 MODULE JUMPER LIST Table 2 1 Module Jumper List Selects optional on board oscillator Selects SYSCLK from VMEbus Determines whether the module will respond to supervisory or non privileged short VMEbus cycles refer to section 2 4 2 of this manual JAIO JAIS Select module base address on any one of the 64 IK boundaries within the short I O address space refer to Section 2 4 1 of this manual 2 4 1 Base Address Jumpers The XVME 202 can be configured to be addressed at any one of the 64 IK boundaries within the VME Short I O Address space by using jumpers JAIO through 15 see Figure 2 1 for the location of the jumpers on the board as shown in Table 2 2 2 3 202 Manual December 1986 Table 2 2 Base Address Jumper Options Base Address 15 14 JA13 JA12 IN IN IN IN IN IN 0000H IN IN IN IN IN OUT IN IN IN IN OUT IN IN IN IN IN OUT OUT IN IN IN OUT IN IN IN IN IN OUT IN OUT IN IN IN OUT OUT IN IN IN IN OUT
10. SYSRESET BRI LWORD 5 23 22 21 20 Al9 Al8 SERCLK 1 17 IACKOUT SERDAT 1 Al6 AM4 GND Al5 A07 IRQ7 14 06 IRQ6 A13 05 IRQ5 A12 A04 IRQ4 All A03 IRQ3 A02 IRQ2 09 A01 IRQI A08 12v STDBY 12v 5v 5v 5 AM RW gt 6 202 Manual December 1986 Appendix B BLOCK DIAGRAM MEMORY ASSEMBLY DRAWING amp SCHEMATICS Block Diagram CONNECTOR JK1 ADDRESS DECODE XVME 202 Manual December 1986 ODO BYTE LOCATIONS ONLY BANK 0 BANK 1 BANK 2 BANK 12 BANK 63 ASSERT RESET UNDEFINED NEGATE RESET UNDEFINED 918 CONSITUTES 1 4 UNIT CONSISTING OF 52 INDIYIDUAL 1 0 POINTS UP TO 15 ADDITIONAL UNITS OF THE SAME FORMAT MAY USED 19H 7FH 81H WRITE ONLY CIH WRITE ONLY B 2 202 Manual December 1986 Assembly Drawing 23 LL E C ca Ca E J C c Ca B 3 XVME 202 Manual December 1986 THIS PAGE INTENTIONALLY LEFT BLANK B 4 s a d 22591 4 T 30 1 12945 202 3 122919 NTY201 1 814 1 0698 01
11. U Front Panel Kit optional 3 MODULE PROGRAMMING 3 1 Introduction 3 2 Module Addressing 3 3 Memory Map 3 4 Reset 3 5 Read Write 3 6 VMEbus Access Time A VMEbus CONNECTOR PIN DESCRIPTION B DIAGRAM AND SCHEMATICS C QUICK REFERENCE GUIDE PAGE N R9 D t 1 O O Q 202 Manual December 1986 LIST OF FIGURES FIGURE TITLE 1 1 XVME 202 Module Operational Block Diagram 2 1 Jumper Connector Locations on the X VME 202 2 2 Pin 1 Notch on XYCOM Adapter and PAMUX Units PAMUX Daisy Chain Installation of an XVME 943 6U Front Panel Py AU PAMUX Banks Memory Map NO LIST OF TABLES TABLE TITLE 1 Jumper List 2 Base Address Jumper Options 3 Addressing Options 4 Pin out 3 1 DTACK Access Time ii PAGE XVME 202 Manual December 1986 Chapter 1 INTRODUCTION 1 1 OVERVIEW The XVME 202 PAMUX Interface Module is a single high VMEbus compatible board which allows a VMEbus master to communicate with PAMUX I O subsystem The specific features of the 202 Interface Module are listed below Directly compatible with PAMUX I O system 16 PAMUX units can be addressed from one module providing up to 5 12 I O points e Termination resistors provided on board e Connection is made via a 50 conductor ribbon cable Cable length can be up to 500 feet The 202 occupies a 1 block of the VME
12. XYCOM VMEbus I D plate 4 in place on the bottom handle The module is now ready to be re installed in the backplane 2 10 202 Manual December 1986 Figure 2 4 Installation of an XVME 943 6U Front Panel XVME 202 Manual December 1980 Chapter 3 MODULE PROGRAMMING 3 1 INTRODUCTION This chapter will briefly examine the addressing and initialization procedures and constraints required when programming the XVME 202 PAMUX Interface Adapter 3 2 MODULE ADDRESSING The XVME 202 is an odd byte only slave and as such the module will not respond to even single byte accesses However word accesses may be used with the understanding that only the odd byte of the word is used to exchange PAMUX data The PAMUX data bus is only 8 bits wide while the PAMUX unit contains 32 points of I O be able to access all 32 points the PAMUX is composed of 4 consecutive banks of 8 I O channels refer to Figure 3 l Refer to the 22 PAMUX 4 32 Channel Data Acquisition Control System manual for information about how to assign each PAMUX unit a base address With 16 PAMUX units connected to the XVME 202 there will be a block of 64 consecutive banks that could be accessed 3 1 202 Manual December 1986 CONNECTOR 1 Figure 3 1 PAMUX Banks BANK 3 BANK 2 BANK 1 BANK 0 202 Manual December 1986 3 3 MEMORY Figure 3 2 shows simple memory map of the IK block of the sho
13. anual December 1980 Chapter 2 INSTALLATION 2 1 INTRODUCTION This chapter explains how to configure the 202 PAMUX Interface Module prior to installation in a VMEbus backplane Included in this chapter is information on module base address selection jumpers address modifier jumper connector pinouts and a brief outline of the physical installation procedure 2 2 SYSTEM REQUIREMENTS The XVME 202 PAMUX Interface Module is a single high VMEbus compatible module To operate it must be properly installed in a VMEbus backplane The minimum system requirements for the operation of an XVME 202 PAMUX Interface Module are one of the following A host processor properly installed the same backplane A properly installed system controller module which provides the following functions EN Data Transfer Bus Arbiter System Clock driver System Reset driver Bus time out module An example of such a controller subsystem is the XYCOM XVME 010 System Resource Module SRM B A host processor which incorporates the system controller functions on board An example of such a processor is the XVME 600 or the XVME 601 Prior to installing the XVME 202 PAMUX Interface Module it will be necessary to configure three jumper options These options are 1 Module base address within the short I O address space 2 Address Modifier codes to which the Module will respond 3 Select SYSCLOCK or on board
14. bus short I O Address Space The module address decode logic allows the user to select via 6 jumpers any one of 64 of the 1 boundaries in the short I O Address Space to be used as the module base address The module s Internal Registers are accessible at specific addresses offset from the selected module base address 1 2 MANUAL STRUCTURE This manual consists of three chapters which divide the various aspects of module specification and operation into three distinct areas The three chapters develop these aspects in the following progression Chapter One A general description of the XVME 202 PAMUX Interface Module including complete functional and environmental specifications VME bus compliance information and a block diagram Chapter Two Module installation information covering module specific system requirements jumpers and connector pinouts Chapter Three Details covering functional addressing and programming considerations The Appendices are designed to provide additional information in terms of the backplane signal pin descriptions a block diagram and assembly drawing and module schematics 1 1 202 Manual December 1986 13 MODULE OPERATIONAL DESCRIPTION Figure 1 1 shows an operational block diagram of the XVME 202 PAMUX Interface Module CONNECTOR ADDRESS DECODE _ Figure 1 1 202 Module Operational Block Diagram 1 2 202 Manual December 1980 1
15. cember 1986 PIN 1 INDICATION RIBBON CABLE 202 INDICATION NOTCH Figure 2 2 Pin 1 Notch on XYCOM Adapter and PAMUX Units 202 Manual December 1980 connect PAMUX or a string of PAMUXs plug one end of a flat ribbon cable into the XVME 202 JKl connector so Pin 1 on the XVME 202 JKl is connected to Pin 1 of the PAMUX connector refer to Figure 2 2 It is possible to connect 16 PAMUX Units in a daisy chain to the XVME 202 see Figure 2 3 as long as the total length of the ribbon does not exceed 500 feet 2 8 OPTIONAL ON BOARD OSCILLATOR Jumper Jl is used to select between the VMEbus signal SYSCLK or an optional 16 MHz oscillator Position selects the VMEbus SYSCLK and is factory shipped in this position For systems where SYSCLK is not provided on the VMEbus backplane 16 MHz oscillator UI9 can be installed and selecting the module will operate with its own clock Oscillator type CTS Knights MXO 55GA2C 16 0MBz or equivalent XVME 202 ADAPTER PAMUX PAMUX Figure 2 3 PAMUX Daisy Chain 2 9 XVME 202 Manual December 1986 2 INSTALLING 60 FRONT PANEL KIT optional XYCOM Model Number XVME 943 is an optional 6U front panel kit designed to replace the existing 3U front panel on the XVME 600 The 6U front panel facilitates the secure installation of single high modules in those chassis which are designed to accommodate double high modules The following is
16. e 64 1 boundaries within the short I O address space refer to Section 2 4 1 of this manual 202 Manual December 1986 Base Address Jumpers JA15 14 JA13 12 JAI JA10 Base Address IN IN IN IN IN IN 0000H IN IN IN IN IN OUT 0400H IN IN IN IN OUT IN 0800H IN IN IN IN OUT OUT 0C00H IN IN IN OUT IN IN 1000H IN IN IN OUT IN OUT 1400H IN IN IN OUT OUT IN 1800H IN IN IN OUT OUT OUT 1C00H IN IN OUT IN IN IN 2000H IN IN OUT IN IN OUT 2400H IN IN OUT IN OUT IN 2800H IN IN OUT IN OUT OUT 2C00H IN IN OUT OUT IN IN 3000H IN IN OUT OUT IN OUT 3400H IN IN OUT OUT OUT IN 3800H IN IN OUT OUT OUT OUT 3C00H IN OUT IN IN IN IN 4000H IN OUT IN IN IN OUT 4400H IN OUT IN IN OUT IN 4800H IN OUT IN IN OUT OUT 4C00H IN OUT IN OUT IN IN 5000H IN OUT IN OUT IN OUT 5400H IN OUT IN OUT OUT IN 5800H IN OUT IN OUT OUT OUT 5C00H IN OUT OUT IN IN IN 6000H IN OUT OUT IN IN OUT 6400H IN OUT OUT IN OUT IN 6800H IN OUT OUT IN OUT OUT 6C00H IN OUT OUT OUT IN IN 7000H IN OUT OUT OUT IN OUT 7400H IN OUT OUT OUT OUT IN 7800H IN OUT OUT OUT OUT OUT 7C00H OUT IN IN IN IN IN 8000H OUT IN IN IN IN OUT 8400H OUT IN IN IN OUT IN 8800H OUT IN IN IN OUT OUT 8C00H OUT IN IN OUT IN IN 9000H OUT IN IN OUT IN OUT 9400H OUT IN IN OUT OUT IN 9800H OUT IN IN OUT OUT OUT 9C00H OUT IN OUT IN IN IN A000H OUT IN OUT IN IN OUT A400H OUT IN OUT IN OUT IN A800H OUT IN OUT IN OUT OUT ACOOH OUT IN OUT OUT IN IN OUT IN OUT OUT IN OUT B400H OUT IN
17. eneral system timing use A 4 202 Manual December 1980 Table VMEbus Signal Identification cont d Connector Signal and Mnemonic Pin Number Signal Name and Description SYSFAIL SYSTEM FAIL Open collector driven signal that indicates that a failure has occurred in the system It may be generated by any module on the VMEbus SYSRESET SYSTEM RESET Open collector driven signal which when low will cause the system to be reset WRITE WRITE Three state driven signal that specifies the data transfer cycle in progress to be either read or written high level indicates a read operation a low level indicates a write operation 5V STDBY 1 31 5 VDC STANDBY This line supplies 5 VDC to devices requiring battery backup 5v 1A 32 VDC POWER Used by system logic circuits 18 32 1 32 2B 1 13 32 1 31 12 VDC POWER Used by system logic circuits 1 31 12 VDC POWER Used by system logic circuits 5 XVME 202 Manual December 1986 BACKPLANE CONNECTOR The following table lists the Pl pin assignments by pin number order The connector consists of three rows of pins labeled rows A B and C Table A 2 Pl Pin Assignments Row A Row B Pin Signal Signal Number Mnemonic Mnemonic D00 BBSY DOS DOI BCLR DO9 DO2 ACFAIL DIO DO3 BGOIN DII DO4 BGOOUT D12 005 BGIIN D13 DO6 BGIOUT 14 DO7 BG2IN D15 GND BG20UT GND SYSCLK BG3IN SYSFAIL GND BG30UT BERR DSI BRO
18. has occurred and the bus cycle must be aborted BGOIN 1B 4 6 BUS GRANT 0 3 IN Totem pole driven signals BG3IN 8 10 generated by the Arbiter or Requesters Bus Grant In and Out signals form a daisy chained bus grant The Bus Grant In signal indicates to this board that it may become the next bus master BGOOUT 1B 5 7 BUS GRANT 0 3 OUT Totem pole driven signals BG30UT 9 1 generated by Requesters These signals indicate that a DTB master in the daisy chain requires access to the bus A 2 202 Manual December 1980 Table 1 VMEbus Signal Identification cont d Connector Signal and Mnemonic Pin Number Signal Name and Description BRO BR3 IB 12 15 BUS REQUEST 0 3 Open collector driven signals generated by Requesters These signals indicate that master in the daisy chain requires access to the bus DSO 1A 13 DATA STROBE 0 Three state driven signal that indicates during byte and word transfers that a data transfer will occur on data buss lines D00 D07 DSI 1A 12 DATA STROBE 1 Three state driven signal that indicates during byte and word transfers that a data transfer will occur on data bus lines D08 D15 DTACK 1A 16 DATA TRANSFER ACKNOWLEDGE driven signal generated by a DTB slave The falling edge of this signal indicates that valid data is available on the data bus during a read cycle or that data has been accepted from the data bus during a w
19. les the user MUST make sure that zeros are written to the input module positions If the user write s a 1 to an input module by mistake the module will read back as being active even if it is inactive 3 6 VMEbus ACCESS TIME The PAMUX unit requires a read write strobe pulse width of 2 uSec It then requires another 2 uSec before another read write strobe can be generated Therefore on a read cycle DTACK will be asserted 2 5 uSec after the start of the cycle but the XVME 202 cannot be accessed for another 1 5 uSec after DTACK During a write cycle the data is latched on the module and DTACK will be generated within 500 nSec If an attempt is made to access the XVME 202 during this time DTACK will be delayed further Table 3 1 shows the DTACK access time Table 3 1 DTACK Access Time Description Typical DSO ASSERTED TO DTACK ASSERTED READ x 00 5 700nS 500nS 600nS 65nS 100nS DSO ASSERTED TO DTACK ASSERTED WRITE DSO NEGATED TO DTACK NEGATED 3 4 202 Manual December 1980 Appendix A VMEbus CONNECTOR PIN DESCRIPTION Table Pl VMEbus Signal Identification Connector and Pin Number Signal Name and Description ACFAIL IB 3 AC FAILURE Open collectors driven signal which indicates that the AC input to the power supply is no longer being provided or that the required input voltage levels are not being met IACKIN lA 21 INTERRUPT ACKNOWLEDGE IN Totem pole driven signal IACKIN and I
20. privileged and supervisory short I O bus cycles Table 2 3 shows the relationship between jumper J2 and the Address Modifiers Table 2 3 Addressing Options Address Modifier that the XVME 202 Module will Jumper J2 respond to In 2DH Supervisory Only Out 2DH Supervisory or 29H Non privileged 2 5 XVME 202 Manual December 1986 2 5 JKI Pin Assignments The XVME 202 interconnects to PAMUX bus on the front panel The PAMUX bus has 8 data lines 6 address lines a read strobe line a write strobe line and a reset line Table 2 4 shows the standard PAMUX pin out NOTE The JKI connector is directly compatible with the PAMUX systems flat cables can be connected directly from the XVME 202 to the PAMUX system without the need for a transition interface Table 2 4 PAMUX out A0 33 D7 Al A2 A3 A4 A5 WRITE STROBE READ STROBE RESET NOTE All even numbered pins on connector JKl are tied to logic ground 2 6 MODULE INSTALLATION XYCOM VME modules are designed to comply with all physical and electrical VMEbus backplane specifications The 202 PAMUX Interface Module is a single high single wide VMEbus module and as such only requires the Pl backplane 2 6 XVME 202 Manual December 1986 CAUTION Never attempt to install or remove any boards before turning off the power to the bus and all related external power supplies Prior to installing a module you should de
21. rite cycle 00 015 1A 1 8 DATA BUS bits 0 15 Three state driven bi 1C 1 8 directional data lines that provide a data path between the DTB master and slave GND 1A 9 11 GROUND 15 17 19 1B 20 23 1C 9 2B 2 12 22 31 A 3 XVME 202 Manual December 1986 Table VMEbus Signal Identification cont d Connector Signal and Mnemonic Pin Number Signal Name and Description IACK 1 A20 INTERRUPT ACKNOWLEDGE Open collector or three state driven signal from any master processing an interrupt request It is routed via the backplane to slot 1 where it is looped back to become slot 1 IACKIN in order to start the interrupt acknowledge daisy chain IRQI 1 B 24 30 INTERRUPT REQUEST 1 7 Open collector driven IRQ7 signals generated by an interrupter which carry prioritized interrupt requests Level seven is the highest priority LWORD 1C 13 LONGWORD Three state driven signal indicates that the current transfer is a 32 bit transfer RESERV 2B 3 RESERVED Signal line reserved for future VMEbus ED enhancements This line must not be used SERCLK 18 21 reserved signal which will be used as the clock for a serial communication bus protocol which is still being finalized SERDAT 18 22 reseved signal which will be used as the transmission line for serial communication bus messages SYSCLK 1A 10 SYSTEM CLOCK A constant 16 MHz clock signal that is independent of processor speed or timing It is used for g
22. rt I O address space which is occupied by the XVME 202 Module The block occupied is defined by jumper JA10 JA15 see Chapter 2 ODD BYTE LOCATIONS ONLY BANK O on CONSITUTES 1 PAMUX 4 UNIT CONSISTING OF BANK 1 32 INDIVIDUAL 1 0 POINTS UP TO 15 BANK 2 OSH ADDITIONAL UNITS OF BANKS THE SAME FORMAT MAY BANK 12 19H BANK 63 7FH 81H WRITE ONLY ASSERT RESET UNDEFINED NEGATE RESET UNDEFINED Figure 3 2 Memory Map CIH WRITE ONLY XVME 202 Manual December 1980 3 4 RESET The PAMUX unit has a Reset line that is used for turning off the relays on all PAMUX units on the bus On power up and in response to SYSRESET the Reset is asserted on the XVME 202 which causes the attached PAMUX units to be reset The user must deactivate the Reset line by performing a write operation to Base address CIH To activate RESET perform a write operation to Base Address 81H The XVME 202 uses a active low Reset line Refer to the PAMUX manual for information on how to select the correct Reset polarity on the PAMUX unit 3 5 READ WRITE To read a bank it is necessary to indicate the base address for example 1000H plus the bank address Using the Memory Map Figure 3 2 if the user needed to read bank 12 they would simply perform a read operation from location 1019 This is also true if the user wished to write to bank 12 When the user is writing to a relay bank that has input and output modu
23. termine and verify all relevant jumper configurations and all connections to external devices or power supplies Please check the jumper configuration against the diagrams and lists in this manual To install a board in the cardcage perform the following steps 2 7 Make certain that the particular cardcage slot which you are going to use is clear and accessible Center the board on the plastic guides in the slot so that the handle on the front panel is towards the bottom of the cardcage Push the card slowly toward the rear of the chassis until the connectors engage the card should slide freely in the plastic guides Apply straight f orward pressure to the handle located on the front panel of the module until the connector is fully engaged and properly seated NOTE It should not be necessary to use excessive pressure or force to engage the connectors If the board does not properly connect with the backplane remove the module and inspect all connectors and guide slots for possible damage or obstructions Once the board is properly seated it should be secured to the chassis by tightening the two machine screws at the extreme top and bottom of the board CONNECTING THE PAMUX UNIT On the PAMUX connector there is a notch indicating where pin 1 is located refer to Figure 2 2 On XYCOM s XVME 202 PAMUX Interface Adapter the ribbon connector has a similar notch indicating the position of pin 1 2 7 XVME 202 Manual De
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