C.P.U. EXORCISER PRELIMINARY USER MANUAL
Contents
1. C P U EXORCISER PRELIMINARY USER MANUAL David Fish October 14 1997 ersion 1 Overview Cinematronics Exorciser Description Signature Analysis Equipment Necessary Setting up the Equipment HP5004A Self test Connecting the HP5004A Signature Analyzer to the Exorciser Verifying the Exorciser output signatures Preliminary CPU Operational Testing Connecting the Exorciser to the CPU under test Reading Signatures and Verification Detecting faulty devices Testing the board for non JMI mode Testing the board s RAM addressing signatures Tips amp Techniques Appendix A Listing of Signatures for IC pins B Board Layout with marked connection locations Reference N A 23 24 Cinematronics C P U Exorciser The Cinematronics Exorciser was designed to help Test Technicians diagnose circuit faults in the main logic board a k a CPU used in all the early Cinematronics Vector based arcade games The Exorciser connects to the board under test and injects digital signals into a number of circuit nodes forcing the board to operate in a stable and repeatable manner With the board in this state the technician can diagnose many component failures by simply reading the digital signatures present on the board and comparing them to the correct signatures which are shown on the schematics Debugging becomes a simple matter of finding the device which is ca2. Saun cas so 9 743157 1285 ____ 12 sr 4 749157 roar aw 7 _____ uae o ____ _______ 2 _____ 7 4 4473 _ 8 use ____ s 12 ____ __ o 443 7286171 22 1 2 _ uuu 2412 12 22 21 8800 romos fiat 1 605 EU oun 5 100 80 n m 3 sary 12 9 sam su 15 n zu asies 12 n ____ 12 ____ su prous 443 ____ r 15 mw v a rme 787 1 7 7 118 11 13 18 5 6 ress 7 ru
3. 8334 8 ME 2 193135 550 3451533 5 08 OVO OL 35 3 123135 ANdLNO 103 02 045 101 8 NNOD ef NNOO NNOD NNOO 36 EXAMPLES USEFUL MANUFACTURERS LITERATURE Schematic Package 72 10626 02 Rev J C P U Schematic Diagram with Signatures Cinematronics Inc Application Note AN 222 4 Guidelines for Signature Analysis Understanding the Signature_ Measurement Hewlett Packard Inc Publication Number 5952 7684 Application Note AN 222 6 Troubleshooting with Composite Signatures Hewlett Packard Inc Publication Number 5952 7684
4. 812 11 5 s 578 21120221 100 na essc op z 12 so 1 2 Appendix Schematic SHT4 IC TYPE Pia P 5 __ pour 12 sone oa ___ n s rons n so P za P 7 69 2788 P P ____ 1538 15 P 5 3 rassz P a P n are 12 ____ R cm ceu _____ s 2 5 01 2 n R 5 ewo so ___ uu 4 R13 9 0095 7211 59 7 as so so 9 1 2 74 3157 7 3 pa 12211201 Schematic SHT5
5. 2 2 ____ is s 9657 s 4 7 10801 Schematic SHT5 PIN IC TYPE 7481 7468 to F 2 os 12 7462 1 11 o o as Fo a a _____ 2 o as as ca 12 76177 15 ca FO e Fail ca os _2 mss ca n ca ____ n co 9 ca ____ 5 s 2 un ers 745 ehaz 5 sae 2 e e seta 2 s a 110 01 5 71602 E 5 7464 Frcs e e 725 9 muso 28 r 12 mol 1 so 258 a seca 2 m Jor zap 012 67 010 6598 e e
6. 7 5 an o an a 1 6266 4 9 2 mol s ___ corr Schematic SHT3 1 isa PIN IC TYPE 4 3 268 sop N 5 aa fis N 5 ara 7 N a mo fis atc N fis 19 1 a as 22 ocs 23 22 fis ar N o 116 o ons a ica fis arc 15 en 17 5 asst is 17 2 so 7504 m m 4 4 7162 m 5 aa e 5 m m xe m e atc m anna m xa 2 muso m 20 xa m ar m 22 7166
7. PIN IC TYPE 62 7480 coos 54 7 748288 4090 Gi 4 e 5 n 2 are 2 768 627 pa ___ atuc Gi 5 wa 4 n 5 se 1 a 7 acce Gi qo sas 7 5288 2 4 Gi z 6 5 n 8411 75287 8 7 2 1 8 1381 uu o 4 ase 7 ____ 5 sera Fi e sic po 7466 16 91 ss 14 745288 2293 sas 110 1 1 1 12 reu 5 E 1 ocs 2 12 E _______ aus E a woo 5 5 suv ore Schematic SHT5 IC TYPE
8. 26 Schematic SHT2 PIN IC TYPE na 7 7827 phe 9 core N o aw 7 12 2 12 mass __ u s 651 e o so om 2 wo 2 e onze 8 rena 4 5 5 se 8 58 o Frac 1 12 7460 42 2 o 12 12 12 5 7 64 1 ___ 15 F 5 ___ 3 rasia Far sa sooo 5 s 5 s 7 Frac 5 2 ____ pasa ose sa sa 9172 54 4 1 4 4 5 R4 12 15 13 zu P 3 746 m a 4 615
9. m e 76 D o s 2 D 1 a D n ee o 7460 258 wel 8 wo 1 13 n 2 7462 Schematic SHT5 SHT6 IC TYPE 8 74602 7 5 7460 k 8 om 57 ma aor c 1 7487 2 12 zasos 2 os 4 748617 12 2 s 2 o 745163 c 4 s c e ma F s 1 4 71604 Foue c H n 7160 82 3 749 12 se a ro se 5 __ 89161 om 10 10 2 wn ao 11 743107 oo 28 o s te 16 e 12 7462 o 1 al 2 n 5 74562 186 2 zasos e uo H 399 as 0 a E 1 2 0 7
10. To obtain these signatures pin 10 of IC 112 and pin 10 of IC J12 must be tied to ground These pins are connected together by a trace so it s only necessary to ground one This can be done simply by using a 16 pin DIP clip with pins 10 and 8 tied together and placing the clip on either IC 112 or J12 Tips amp Techniques The IC s on the Cinematronics CPU board have reference designations that correspond to their X and Y position on the board The grid lines are designated U thru A across the wide dimension horizontal if the board is positioned with the connectors along the top and 2 thru 14 across the shorter vertical width Unfortunately there are no reference designations shown on the board for each IC To speed up the debug process highly recommend placing a small label on various IC s and marking them with it s reference designation and the number of pins the has The small 5 8 x 3 16 IC labels that are available in 8 X 11 sheets with 480 labels each are ideal Always check the test point marked C3 2P first This is the RESET node and it s signature should be 2 If the signature is incorrect repair the reset circuit before continuing Always trace bad signatures in the opposite direction of the signal flow A good starting point is at the X and Y data output latches and the line intensity control Circuit bad signature at an input of an IC will a ways cause bad signature at it
11. mo 5 m 3 mss 95 46161 i 0C22 5000 34CP 66UU 2H8F C5F6 0C22 Schematic SHT2 amp SHT3 Pa 2 7 748298 Proz Pa n ne o Pa n ___ o0 Pa 86 12 ___ rece Pa 15 zc 1 3 ons 4 e 15 ___ m 51 1 scc 7466 m m aaso m smc m m 12 aor ______ ___ u 5 15 ____ 50 74864 a prac H2 s 5 ____ e 7 12 m mol ____ 50 s n aces mases 15 ____ n 5 n 7 om 2 412 AAP8 M1
12. s output An inverted signal will always have the same signature as it s non inverted source signal Schematic SHT1 Schematic SHT2 Ba 13 74600 n re 2 Hara w 5 acs _ 2 n 7 raster ro e m e r wo 5 1898 ____ ra s 5 e a re 7 a r a 11 7465 1 74257 49p2 w 2 onze 415 741527 49 2 F6 1 J _ bo as e 9069 5 n ____ a 30CC R2 zc jae o 13 7466 R2 15 R2 4 12 maw Fz 1 7959 s 29A9 80HP H28U book i 1 1 4922
13. 8 5 48 2 Far we cor 5000 202 3408 ig 4813 741875 oooomss 6 6023 9 4 amp 13 741575 10000 33 m 17 ____ jis 1 aster pear 151 2 SHT4 PIN IC TYPE 1 786157 soap 748288 Pso3 15 1 5 ____ oar m 15 c 2 72 1 o a um ia rates 7 sa Hess 8 us a o z emr 17 _____ n 63 7494 5 8 one 13 7 60 o so 160091 12 sa nj n Ta 15 n 7480 5278 12 ___ Ta 1 rassz 2 8 s 1 5 12 71664 2518 1
14. positive edge CLOCK OUT positive edge NOTE Some circuit nodes have two signatures shown the upper first value is read when the CLOCK is positive edge triggered and the lower Second value when the CLOCK is negative edge triggered Detecting faulty devices In most cases detecting a defective device is as simple as finding a bad signature and finding the IC which is driving the node Once you find a bad signature follow the signal up stream to the first 1 at which a bad signature shows up at If all the input signatures to this IC are correct and the output is not there a good chance you ve found a bad device This reasoning may not lead to a correct determination if for instance there is a short affecting the bad node or if an IC connected to the node has a shorted input It s always a good idea to check the node in question with a meter and an oscilloscope to help further diagnose a problem Testing the board for Non JMI mode Some of the signatures listed in Appendix A are shown within two forward slashes nnnn These are signatures read when the board has been put in the non JMI mode The JMI jumper must be removed if present to obtain these signatures Be sure to replace this jumper when testing has been completed Testing the board s RAM Addressing Signatures There are eight unique signatures in Appendix A shown wih an asterisk _ prefix These are the signatures for the eight RAM address lines AO thru A7
15. ve ve ____ gt 6 14 12 22 7 su e F 84111 ve 10 7104 6598 sa 2 76 13 9820 su s u 9620 su s 7162 9820 su 12 1 1 1 Schematic SHT6 PIN IC Es 10 748288 so 4 748377 so os Hara 1 95 2 ___ 4 so 5 s am sr F eran 1 2 sree 7 o o s o uses o sa w thea o 1 743977 917 P2 P38A A ____ cc _ rasis au 7 7069 P Fe _ s zas Apa 15 12 16 jos 12
16. 11 1 121 13 1 24 2 6 1 2 ro 15 on russ n 766 v o ____ n 1 mea 17 se ass osso ____ 2 Schematic SHT6 02 11 22 asa m 12 m 2 1660 C432 8A2A 6 8A2A 0000 0000 i ie 5 sa 33 clk1 CLOCK signal will show 0000 signature clk2 CLOCK signal Hi TTL level HIGH Lo TTL level LOW mmmm Lower 274 signature obtained with edge CLK button IN _nnnn Signature obtained with J12 amp 112 pin 10 tied to GND nnnn Signature available with NO JMI option jumper removed 35 8 345193 viva WVY 8 4 i 5 6 8 39 15 345153 93151939 553860 NOLLONULSNI 34 3 SS3HCQV 135 1 ol 69 193738 135 viva 5 43 593900 4014 39 4 2 20 9 H 433185 1 00
17. 4 _UCCC F po p 5 n otra n oss 7 15 _______ na masas 2 5 114 20 n a s o n 5 Schematic SHT3 PIN IC TYPE 3 pher 6 vasse Pear a 15 Fa 6 8 1 no 2 ___ 2 4 a s e pura 7 a A92 3 e 5 8 NI mo 1 NI 15 wo 6708 4 mo 2 na o 1 12 15 m a mi 7 5 m o 7496 12 ors eae an s io an s 160 111 29 9 2110 Ga 15 ze a pour io 5
18. econd tests all segments and then have one of the signature sets listed above for about 1 second If the probe RESET switch is pressed during the SELF TEST mode the four 7 segment digit displays will show all zeros except when all segments are dimly lit 1 Connect 5004 grabber connectors as follows CLK yellow clip to Exorciser CLK terminal START green clip to Exorciser START STOP terminal STOP red clip to Exorciser START STOP terminal GND black clip to Exorciser GND terminal 2 Connect The Exorciser s 5V banana jack to the 5 volt source either from the Cinematronics power supply or a lab supply In the same manner connect the GND banana jack to the supply s GROUND connection Verify that the board under test is connected to the 5 volt supply also 3 Using a short jumper lead connect the Exorciser s CLK terminal to the CLK test point on the logic board This point is located between IC s Jx and Kx is marked CLK on the component side of the board At this point the Exorciser has all the necessary inputs connected to perform an operational verification test If this test is not necessary skip the next section Verifying the Exorciser output signatures With the equipment connected as described in the previous section apply power to the 5V power supply Verify that the supply is still putting out 5 0 volts DC _ 0 25VDC Set the switches on the signature analyzer as follows HP5004A Switch Settin
19. er can be used Connecting the Exorciser to the Board Under Test IMPORTANT Before you connect the Exorciser verify that the 5 volt power supply is turned OFF Connecting the Exorciser to the CPU is a simple task First disconnect the ribbon cable which connects to the display Then remove the two 16 pin DIP shunts located at D8 and U14 Connect the DIP plug at the end of the cable which plugs into J3 of the Exorciser into the IC socket at D8 Connect the other DIP plug at the end of the cable which plugs into J1 into the socket at U14 Attach the DIP clip designated 2 to the 2 74LS257 paying close attention to the location of pin 1 Attach the R2 DIP clip to IC R2 and the T2 DIP clip to IC T2 There is a flying ball clip connected to the cable from J1 this clip is attached to the test point TP8 No IC s need to be removed from the board in order to use the Exorciser Reading Signatures and Verification With the equipment hooked up as described in the previous sections turn on the power to the analyzer and the DC power supply Set the Signature Analyzer to the configuration shown below Debugging is now a simple matter of touching the probe tip to a specific IC pin and comparing it s signature to that shown on the schematic The expected signatures are listed in Appendix A for reference The key below defines the terms used in the tables HP5004A Switch Settings 5 OUT
20. gs START IN negative edge STOP OUT positive edge CLOCK OUT positive edge With the analyzer s data probe verify the following signatures at the specified locations DIP plug D8 pin signature 4 7825 5 655C 9 802H 10 6 11 8UC2 14 2518 15 0000 16 6 Verifying the Exorciser output signatures cnt d DIP plug U14 pin signature 9 5555 10 CCCC 11 7F7F 12 5 21 13 14 15 52 8 16 89 DIP clip 2 pin signature 4 F469 7 PH6F 9 211U 12 H28U DIP clip R2 pin signature 4 A69C 7 47F6 9 8CC5 12 510F Dip clip T2 pin signature 4 615F 7 A928 9 A29F 12 96FC Preliminary CPU Operational Testing There is a certain minimum operation level which the CPU board must meet before the Exorciser be used for fault diagnostics The 20 2 oscillator circuit 1 12 XTAL 82 and C59 must be operating The IC s H2 745113 and J4 74265 must also be operational and generating the four clock signals CLK1 CLK1 CLK2 and CLK2 Refer to Sheet 1 of the schematics and with the oscilloscope verify that these clock signals are present Note that the CLK1 signal s amplitude will be attenuated when the Exorciser is connected this is normal The signal POWER_UP at 2 741504 must at a TTL High 2V If these requirements are not met the Exorciser will not operate These circuits must be repaired before the Exorcis
21. lloscope w probes 2 Digit or better Digital Multi meter DMM w leads 16 pin DIP Clip Ball Clip E Z Hook clip leads various lengths Cinematronic CPU Schematics w signatures 1 5004 Self Test This section covers the Self Test feature of the HP5004A If you are using different type of Signature Analyzer you must refer to it s user manual for the Self test operation Remove the grabber connectors from the pod test leads and connect the pod START STOP and CLOCK leads to the matching START STOP and CLOCK receptacles on the 5004A front panel Connect the 5004A data probe to the probe test receptacle on the 5004 front panel Push the probe tip point gently and firmly into the PROBE TEST receptacle until the point is help securely Connect the 5004A power cable to the correct power source and set the 5004A front panel as follows Test A Switch Settings START IN STOP IN CLOCK IN or OUT Displays Four seven segment UP73 then ACA2 Gate flickers Unstable Signature flickers except when good signature is on Probe tip light Flickers when is on Test B Switch Settings START OUT STOP OUT CLOCK IN or OUT Displays Four seven segment 3951 then 2P61 Gate flickers Unstable Signature flickers except when good signature is on Probe tip light Flickers when 2 15 is on Note In SELF TEST mode the seven segment displays first have all seven segments lit dimly for about 1 s
22. using the incorrect signature and replacing it Signature Analysis From the HP Test amp Measurement catalog here s a description of Signature Analysis Signature analysis is a fast and accurate method of troubleshooting digital circuits Finding faults is reduced to tracing signal flow and comparing measured signatures to printouts or computer stored signatures A signature is a 16 bit cyclic redundancy code CRC generated for blocks of data Instead of entire bit streams only signatures are compared to detect errors patented signature analysis technique enables the HP5005B HP5006A to generate a compressed four digit fingerprint or signature of a digital data stream at a logic node Any fault associated with a device connected to the node will force a change in the data stream and produce an erroneous signature In other words a signature is a four digit Hexadecimal representation a binary pattern measured within a window defined by a START and a STOP signal The signatures that are used as a reference were measured on a known good PC board similar to the board under test DUT The reference board and the DUT must be driven by identical signal patterns or exercised to obtain the proper results This is just what the Exorciser does Equipment Necessary Signature Analyzer HP5004A HP5006A Atari Cat Box etc 5 Volt DC Power Supply or Cinematronics Power Supply 100 MHz or higher Osci
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