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phyCORE-MPC5200 (HW), Englisch

1. Signal phyCORE Expansion Patch Field Module Bus FPGA TDO FPGA TMS FPGA TDI FPGA TCK FPGA 11 9 FPGA C2 32B X12 9 FPGA DI 33A X14 9 FPGA D2 37B X12 10 FPGA Bl D3 38A X14 10 FPGA D4 38B X13 10 FPGA Bl D5 39A X15 10 FPGA LI 40A X16 10 FPGA E2 40B X10 11 FPGA E3 41 7 10 4 418 X11 11 FPGA_B1_E5 42B X12 11 43A X14 11 F5 438 13 11 FPGA G4 44A X15 11 FPGA 45 16 11 FPGA H6 45B X10 12 FPGA 46 17 11 12 46 11 12 14 48 14 12 6 49 15 12 504 16 12 2 508 10 14 514 17 12 5 518 11 14 LI 52 12 14 2 534 14 14 L3 538 13 14 L4 54 15 14 554 16 14 PHYTEC Messtechnik GmbH L 678e 4 87 5200 2 55 10 15 FPGA M3 56A X17 14 FPGA 4 56B 11 15 57 12 15 2 58 14 15
2. 5 PI E X7 a 00 Dij 05 D4 a el Orr X0 N 1 5 m Li E p ILXI T TET x le 8 m an 1 a wn E 8 m 1 55583858 Di LI i XI Di com as a 1 TP22 E ms 7 s 0000 ug m 18 J5 e gt II B 1 a 1 D 8 uer Uu x 0 um w 5 5 wt 108 S277 8888718886 4 JED a MT 120 JT XI es re 733337 _ BESS o OOO G5 LI 3 L LC 7 Figure 15 Location of Connectors on the phyCORE MPC 5200B tiny Carrier Board 58 PHYTEC Messtechnik GmbH L 678e 4 The phyCORE MPC5200B tiny on the Carrier Board Please note that all module connections are not to exceed their expressed maximum voltage or current Maximum signal input values are indicated in the corresponding controller User s Manual Data Sheets As damage from improper connections varies according to use and appli
3. 4 es J e al LI PEN 1 5 m Li an i 4 D a 7 7 1 p 1 B 1 555555555 _ an L MESE 9 RJ XI aH MOR pees 8 2 gt TE a 7B 1 7 1 1 L I Ga Ea 55L H C 3 I I PI gt L JP3 me S L OOOO i L JPI6 j L 8 P T T m cs D 9 i MI Taim wi 8 n 1 ED gt 0 le rm s a LI e Figure 18 Default Jumper Settings of the phyCORE Development Board MPC5200B tiny with phyCORE MPC5200B tiny 62 PHYTEC Messtechnik GmbH L 678e 4 The phyCORE MPC5200B tiny on the Carrier Board 143 Functional Components on the phyCORE MPC5200B tiny Carrier Board This section describes the functional components of the phyCORE MPC5200B tiny Carrier Board supported by the phyCORE 5200 tiny and appropriate jumper settings to activate these components Depending on the specific configuration of phyCORE MPC5200B tiny module alternative jumper settings can be used These jumper settings are different from the factory default set
4. M3 58 13 15 4 59 15 15 60 16 15 2 60B X10 16 FPGA_B1_P3 61B X11 16 FPGA_B2_C11 8B X13 2 FPGA_B2_D8 9A X15 2 2 104 16 2 FPGA_B2_F10 10B X10 4 2 114 17 2 2 9 11 4 2 12 12 4 2 14 4 FPGA B2 DIO 1386 13 4 2 11 144 15 4 2 9 154 16 4 2 B10 15 10 5 2 9 16 X17 4 FPGA_B2_A10 16B X11 5 FPGA_B2_B8 17B X12 5 FPGA_B2_F8 18A X14 5 2 8 18 13 5 FPGA B2 F7 19A 15 5 2 7 20 16 5 FPGA B2 G7 20B 10 6 2 87 214 XI7 5 FPGA_B2_G6 21B X11 6 FPGA_B2_F6 22B X12 6 FPGA_B2_D6 23A X14 6 FPGA_B2_E6 23B X13 6 FPGA_B2_C6 24A X15 6 FPGA_B2_A6 25A X16 6 88 PHYTEC Messtechnik GmbH L 678e_4 The phyCORE MPC5200B tiny on the Carrier Board FPGA B2 C5 25B X10 7 FPGA B2 B6 26A X17 6 FPGA B2 C4 26B 11 7 2 5 27 12 7 2 4 28 14 7 FPGA B2 B5 28B X13 7 FPGA B2 B4 294 15 7 2 304 16 7 FPGA B2 09 30B X10 9 FPGA B2 B3 314 17 7 2 12 63 5 16 2 812 64C 7 16 2 14 65 8 16 FPGA B2 2 65D X9 16 FPGA B2 814 66C X2 1
5. 5200 14 3 8 USB Host Interface The USB Host interface of the 5200 tiny is accessible at connector PIB on the Carrier Board This interface is compliant with USB version 1 1 and its mode can be configured with the help of Jumper JP2 The following configuration options are possible Jumper Setting Description JP2 open VMO mode selected closed FSEO mode selected Table 20 JP2 USB Host Interface Configuration A second USB connector is porvided at P1C However this connector does not carry any USB communication signals Connector can only be used to access the USB supply voltage 72 PHYTEC Messtechnik GmbH L 678e_4 phyCORE MPC5200B tiny the Carrier Board 14 3 9 Audio Interface The AC97 interface on the phyCORE MPC5200B tiny connects to a Wolfson WM9712 audio codec controller on the Carrier Board A variety of signals gerenated by the WM9712 IC are available at the following connectors Header X15 Base Speaker Header X18 SPDIF OUT Header X19 Differential Output Header X20 Auxiliary Output Socket P4 MICI MIC2 Socket P5 LINE IN R L Socket P6 LINE OUT R L Jumpers JP14 and JP15 are available for configuration of interrupt signals generated by the WM9712 device The following configuration options are possible Jumper Setting Description JP14 open AC INT signal on WM9712 not used closed A
6. Table 6 DDR SDRAM Device Selection 30 PHYTEC Messtechnik GmbH L 678e_4 System Memory 6 3 Serial Memory The phyCORE MPC5200B tiny features a non volatile memory device EEPROM with a serial interface This memory can be used for storage of configuration data or operating parameters that must be maintained in the event of a power interruption The available capacity is 4 kByte Note The first 2 kilobytes section of the EEPROM 15 already used for storing the boot manager U Boot environment variables This portion must not be used by user data The 5200 processor provides two on chip interfaces The memory device is connected to PC interface 2 Table 7 gives an overview of the possible devices for use at U4 as of the printing of this manual Type Size Address Life of Device Manufacturer Frequency Pins Cycles Data EEPROM 4 kBytes 400 kHz 2 Al 1 000 100 CAT24WC32 CATALYST 000 yrs Table 7 Serial Memory Options for U4 It is important to note that the RTC US is also connected to the 2 bus The RTC can operate with a bus frequency up to 400 kHz Therefore the use of high bus frequencies for accessing the serial memory is not recommended The RTC has the bus slave address 2 The slave address of the serial memory must be selected accordingly using solder jumpers J4 AO 5 and J6 42 to avoid b
7. 1 un m Nn 1 BO QW 86868068 5 LI E mi EBES m GER E m 1 JEN IV B mE gg s e Bas m EE 2 1 WF 1 Bg 5 1 ENG E UPB LI DADDA LL 7 so 9 lt mE a CM ED L Figure 17 Location of the Jumpers View of the Component Side PHYTEC Messtechnik GmbH L 678e_4 61 phyCORE MPCS200B tiny Figure 18 shows the factory default jumper settings for operation of the 5200 tiny Carrier Board with the standard phyCORE MPC5200B tiny standard MPC5200B controller use of first and second RS 232 both CAN interfaces and LED D3 on the Carrier Board Jumper settings for other functional configurations of the phyCORE MPC5200B tiny module mounted on the Carrier Board are described in section 14 au
8. Pa Wd EG phyCORE MPC5200B tiny Hardware Manual Edition April 2008 A product of a PHYTEC Technology Holding company phyCORE MPCS200B tiny In this manual are descriptions for copyrighted products that are not explicitly indicated as such The absence of the trademark IM and copyright symbols does not imply that a product is not protected Additionally registered patents and trademarks are similarly not expressly indicated in this manual The information in this document has been carefully checked and is believed to be entirely reliable However PHYTEC Messtechnik GmbH assumes no responsibility for any inaccuracies PHYTEC Messtechnik GmbH neither gives any guarantee nor accepts any liability whatsoever for consequential damages resulting from the use of this manual or its associated product PHYTEC Messtechnik GmbH reserves the right to alter the information contained herein without prior notification and accepts no responsibility for any damages which might result Additionally PHYTEC Messtechnik GmbH offers no guarantee nor accepts any liability for damages arising from the improper usage or improper installation of the hardware or software PHYTEC Messtechnik GmbH further reserves the right to alter the layout and or design of the hardware without prior notification and accepts no liability for doing so Copyright 2007 PHYTEC Messtechnik GmbH D 55129 Mainz Rights including those of translation reprint broad
9. Most of the signals from the SBC module mounted on the Carrier Board extend to two mating receptacle connectors The pin assignment of these expansion bus 4 depends entirely on the pinout of the SBC module mounted on the Carrier Board PHYTEC Messtechnik GmbH L 678e 4 55 5200 As physical layout of the expansion bus is standardized across all applicable PHYTEC Carrier Boards we are able to offer various expansion boards 5 that attach to the Carrier Board at the expansion bus connectors These modular expansion boards offer supplemental I O functions 6 as well as peripheral support devices for specific functions offered by the controller populating the SBC module 9 mounted on the Carrier Board e All controller and on board signals provided by the SBC module mounted on the Carrier Board are broken out 1 1 to the expansion board by means of its patch field 7 The required connections between SBC module Carrier Board and the expansion board are made using patch cables 8 included with the expansion board Figure 14 illustrates the modular development platform concept Figure 14 Modular Development and Expansion Board Concept with the phyCORE MPC5200B tiny The following sections contain specific information relevant to the operation of phyCORE MPC5200B tiny mounted on the Carrier Board phyCORE MPC5200B tiny 56 PHYTEC Messtechnik GmbH L 678e_4 The phyCORE MP
10. 27 oT Flash I 4 28 6 2 DDR 30 63 31 7 Real Time Clock RTC 8564 5 400 00 000000000 33 Serial Interfaces i eire oe dee ati 35 M Rr M ena eps 33 6 2 Bthetnet Interbdce coe e cepe 36 8 2 1 PHY Physical Layer 36 9 2 2 n Qa oU I REIR MEE 37 8 3 USB 1 1 Host Interface 38 9 The U Boot Boot Loader sooooo000000000000000000 0000000000000000 00000000000000 39 9 1 U Boot Default System 40 9 2 System Resources Required by 41 92 The Back p 42 9 3 Modifying the U Boot Loader deceret pe Rien 44 10 JTAG ecc 45 11 Component Placement 1 47 12 Technical Specifications cere cree ee 0000000000000000 aee 49 13 Hints for Handling the Module 0000000000000000 53 14 phyCORE MPC5200B tiny on the Carrier Board 55 14 1 Concept of the Carrier Board phyCORE MPC5200B 55 14 2 Carrier Board phyCORE
11. ME Pa TES 6055 END 1 15 Eu B LI R39 V17 m TE TOR a P1 d NE 54 C55 R33 C7 3 z AU EIE 8 E TERRITI NH Top View of phyCORE MPC5200B tiny PCB Rev 1245 2 68309 KS CC m gt J2 BANS ENA BAGS BNE GING E N IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII C51 a u ECO S CB304 5 m e 2242 884 868 867 824 Ri IIIII L bu ii Bottom View of the phyCORE MPC5200B tiny Rev 1245 2 PHYTEC Messtechnik GmbH L 678e_4 5200 1 3 Minimum Requirements to Operate the phyCORE MPC5200B tiny Basic operation of phyCORE MPC5200B tiny only requires supply of a 3V3 input voltage and the corresponding GND connection These supply pins are located at the phyCORE connector X1 3V3 1C 2C 4C 5 ID 2D
12. Plug P2A is the lower plug of the double DB 9 connector at P2 P2A is connected to the first CAN interface CANI of the phyCORE MPC5200B tiny via jumpers There are no CAN transceivers available on the phyCORE MPC5200B tiny therefore the transceivers on the Carrier Board must be used Depending on the configuration of the CAN transceivers and their power supply the following configuration is possible 1 CAN signals generated by the Carrier Board CAN transceiver U9 extend to connector P2A with galvanic separation Jumper Setting Description 1 4 closed Input at opto coupler on the Carrier Board connected to CANI TX signal from the phyCORE MPC5200B tiny JP5 closed Output at opto coupler U4 on the Carrier Board connected to CANI RA signal of the phyCORE MPC5200B tiny Table 14 Jumper Configuration for CAN Plug P2A using the CAN Transceiver on the Carrier Board Pin 3 GND Carrier Board Ground Pin7 with galvanic separation Pin2 11 with galvanic separation Pin 6 GND Carrier Board Ground N Q A tA CC CO o Figure 22 Pin Assignment of the DB 9 Plug P2A CAN Transceiver on Carrier Board 66 PHYTEC Messtechnik GmbH L 678e_4 The phyCORE MPC5200B tiny on the Carrier Board Caution When using the DB 9 connector P2A as CAN interface and the CAN transceiver on the Carrier Board the following jumper settings are not functional and could damage the mod
13. 5200 8 2 Ethernet Interface Connection of the phyCORE MPC5200B tiny to the world wide web or a local network LAN is possible over the integrated FEC Fast Ethernet Controller of the Freescale processor The FEC operates with a data transmission speed of 10 or 100 Mbit s 8 2 1 PHY Physical Layer Transceiver The 5200 tiny has been designed for use in 10Base T and 100Base T networks The 10 100Base T interface with its LED monitoring signals extends to phyCORE connector X1 In order to connect the module to an existing 10 100Base T network some external circuitry is required The required 49 9 Ohm 1 termination resistors on the analog signals ETH_RX ETH_TX are already populated on the module If you are using the applicable Development Board for the phyCORE MPC5200B tiny part number PCM 973 the external circuitry mentioned above is already integrated on the board refer to section 14 The default PHY address configured with the boot strapping option is 0 1 36 PHYTEC Messtechnik GmbH L 678e_4 Serial Interfaces Table 9 shows the interface signals for the Ethernet channel FEC Channel Pin Function Location at phyCORE PHY U2 Connector ETH_RX Differential positive receive X1D35 input signal ETH _RX Differential negative receive X1C35 input signal _ Differential positive transmit X1D36 output signal ETH _TX Differential negative trans
14. GND 3C 3D 7C 9D 12C 14D Caution We recommend connecting all available 3V3 input pins to the power supply system custom carrier board housing the phyCORE MPC5200B tiny and at least the matching number of GND pins neighboring the 3 V3 pins In addition proper implementation of the phyCORE module into a target application also requires connecting all GND pins neighboring signals that are being used in the application circuitry Please refer to section 4 for more information 8 PHYTEC Messtechnik GmbH L 678e_4 Pin Description 2 Pin Description Please note that all module connections are not to exceed their expressed maximum voltage or current Maximum signal input values are indicated in the corresponding controller manuals data sheets As damage from improper connections varies according to use and application it is the user s responsibility to take appropriate safety measures to ensure that the module connections are protected from overloading through connected peripherals Many of the 5200 tiny pins offer alternative functions These alternative functions must be activated by configuring the applicable controller registers prior to their use Certain controller functions are pre configured based on the module s design and are shown in Table 7 Signals that are routed directly from the CPU to the Molex connectors can configured to any available alternative function desired by the
15. Table 5 Choice of Flash Memory Devices and Manufacturers 28 Table DDR SDRAM Device Selection 30 Table 7 Serial Memory Options for 004 31 Table 8 Serial Memory Address 1 32 Table 9 Signal Definition PHY Ethernet Port 02 37 Table TO JTAG IMG C 45 Table 7 Technical Data terit Hee P ee negent 50 Table 12 Jumper Configuration for the First RS 232 Interface 64 Table 13 Jumper Configuration of the DB 9 Socket P3B 5 65 Table 14 Jumper Configuration for CAN Plug P2A using the CAN Transceiver the Carrier 4022222222211 66 Table 15 Improper Jumper Settings for CAN Plug P2A CAN Transceiver on the Carrier Board 67 Table 16 Jumper Configuration for CAN Plug P2B using the CAN Transceiver on the Carrier 68 Table 17 Improper Jumper Settings for the CAN Plug P2B Transceiver on the Carrier 69 Table 18 JP17 Configuration of the Programmable LED D23 70 Table 19 7 8 7 9 Ethernet Interface Configuration 71 Table 20 JP2 USB Host Interface 72 PHYTEC Messtechnik GmbH L 678e 4 Co
16. and the R W bit It must be noted that the RTC at US is also connected to the bus The RTC has the address 2 0 which cannot be changed 2 3 243 243 X A2 0 Al 1 0 0 0 4 0 5 LC slave address OxAO for write operations 1 for read access Package OR in SMD 0805 PHYTEC Messtechnik GmbH L 678e_4 21 5200 Jumper Default Comment J7 Enables or disables the clock output of the PC RTC U5 RTC clockout is connected to X1B1 1 2 RTC clockout disabled 2 3 RTC clockout enabled Package Type OR in SMD 0805 J12 Pll_cfg3 1 These jumpers define the core PLL J13 Pll_cfg2 1 configuration Refer to the MPC5200B controller User s Guide The default configuration 0x08 defines a bus to core clock ratio of 1 3 1 2 X Logic 1 2 3 Logic 0 Package Type 10 kOhm resistor in SMD 0805 J8 J9 These jumpers are reserved for factory settings Do not change these jumper settings Table 3 Jumper Settings 22 PHYTEC Messtechnik GmbH L 678e_4 Power Requirements 4 Power Requirements The phyCORE MPC5200B tiny must be supplied with one supply voltage only Supply voltage 43 3 V 10 with 1 2 A load Caution Connect all 3V3 input pins to your power supply and at least the matching number of GND pins neighboring the 3V3 pins As a general design rule we recommend connecting all GND pins neighborin
17. 0 4 1 132 MHz 3 396 MHz low 0 lor 0 ATA_Dack 0 LP_Ts xlb_clk_sel 0 Bit 0 XLB_CLK fsystem 4 Bit 1 XLB_CLK fsystem 8 USB1_TXN sys_pll_cfg0 0 Bit 0 fsystem 16x SYS_XTAL_IN Bit 1 fsystem 12x SYS_XTAL_IN 5 1 sys cfgl 0 Bit 0 fvcosys fsystem Bit 1 fvcosys 2 x fsystem ETH TXEN rom mg 0 Bit 0 No boot in most graphics mode 1 Bit 1 Boot in most graphics mode ETH_TXD1 ppc msrip 1 Bit 0 0000_0100 hex boot address Bit 1 FFFO_0100 hex boot address ETH TXD2 boot_rom_wait 1 Bit 0 4 PCI bus clocks of wait state Bit 1 48 PCI bus clocks of wait state ETH_TXD3 _ boot_rom_swap 0 Bit 0 no byte lane swap same endian ROM image Bit 1 byte lane swap different endian ROM image ETH_TXERR boot_rom_size 0 Boot ROM address is max 25 significant bits during address tenure Bit 0 16 bit ROM data bus Bit 1 32 bit ROM data bus ETH_MDC boot_rom_type 1 Bit 0 non muxed boot ROM bus single tenure transfer 1 Bit 1 muxed boot ROM bus with address and data tenures ALE and TS active 1 ETH TXDO flash sel 0 Bit 0 No boot in large Flash mode 1 Bit 1 Boot in large Flash mode 1 3 4 Table 4 System Start Up Configuration 26 PHYTEC Messtechnik GmbH L 678e 4 System Memory 6 System Memory The system memory consist of Flash memory DDR SDRAM Double Data Rate Synchronous Dynamic Random Access Memory and a small non volatile memory devi
18. 40 C to 90 C Operating Temp Range Extended 25 C to 85 C Humidity max 95 r F not condensed Operating voltages Voltage 3 3V 3 3 V 5 Operating Power Consumption depending load Voltage 3 3 V Max 4 watts Table 11 Technical Data These specifications describe the standard configuration of the phyCORE MPC5200B tiny as of the printing of this manual 50 PHYTEC Messtechnik GmbH L 678e 4 Technical Specifications Connectors on the phy CORE MPC5200B tiny Manufacturer Molex Number of pins per contact rows 100 2 rows of 50 pins each Molex part number lead free 52760 1009 receptacle Two different heights are offered for the receptacle sockets that correspond to the connectors populating the underside of the phyCORE PXA255 The given connector height indicates the distance between the two connected PCBs when the module is mounted on the corresponding carrier board In order to get the exact spacing the maximum component height 2 5 mm on the underside of the phyCORE must be subtracted Component height 6 mm Manufacturer Molex Number of pins per contact row 100 2 rows of 50 pins each Molex part number lead free 55091 1079 header Component height 10 mm Manufacturer Molex Number of pins per contact row 160 2 rows of 80 pins each Molex part number lead free 53553 1079 header Please refer to the coresponding data sheets and mechanical specifications provided by Molex
19. 47 phyCORE MPC5200B tiny r 00189 EN NE mu sm PTUS deg m C8104 gue C8304 FBS CB308 CB105 um R7 wa pedal 9 MCN mee II II I a Gani R Figure 12 1245 2 component placement Bottom view 678e_4 PHYTEC Messtechnik GmbH L 48 Technical Specifications 12 Technical Specifications The physical dimensions of the phyCORE MPCS5200B tiny represented in Figure 13 5 nm 53 84nm 52 3 26nm 7 18nm 3 19nm 4 76nm 2 5anm 49 67nm 45 7nm xi 2 35nm 19 37nm 14nm 2 35nm Figure 13 Physical Dimensions Top View 0 635nm 3 96nm 3 7nm 3 7nm PHYTEC Messtechnik GmbH L 678e 4 49 5200 The height of all components the top side of the is 2 5mm The PCB itself is approximately 1 6 mm thick The Molex connector pins are located on the underside of the PCB oriented parallel to its two long sides The maximum height of components on the underside of the PCB is 2 5 mm Additional Technical Data Parameter Condition Characteristics Dimensions 57 mm x 53 mm Weight approximately 25g with all optional components mounted on the circuit board Storage Temp Range
20. L 678e 4 5 5200 1 1 Block Diagram 64 to 128MB DDR SDR AM 133 2 32 L 16 to 32 FLASH EEPROM 16 bit 33 MHz Quarz 4KByte Calendar Alarm Ethernet PHY RS232 Transceiver RS232 Transceiver MPC5200B DDR SDRAM Bus LocalPlus Bus MPC603e series e300 core 1090 6901 396 MLI 16k I cache Floating Point FPU unit 12c 1 Memor Management MMU Unit 9 12C 0 DMA EE FEC FastEthernet USB Host PSC1 AC97 1 2 PS3 UART SPI PSC 6 UART Timer ATA CS COPNTAG Figure 1 Power 41V5 2V5 Supply 3V3 Block Diagram phyCORE MPC5200B tiny II1I gt LoCalPlus Bus Extemal Bus Interface PCI Bus V2 2 33 66MHz ATA Interface JTAG port for re programming IRORTC 1 C Bus 1 0 10 100 Mbit Ethemet USB 1 1 Host Interface PSC1 could be used as AC97 codec CANO TTL TTL UART3 RXD3 TXD3 UART3 TTL SPI Bus UARTO RXD6 TXD6 UART6 TTL Timer Outputs PWM CS Signals for ATA Interface COP JTAG Debug Test Port VBat 3V for RTC and SRAM Power 3V3 1 2A PHYTEC Messtechnik GmbH L 678e_4 Introduction Figure 2 Figure 3 x
21. Pci_Cbe_2 44 80 10 21 Pci_Irdy ASA 81B X11 21 Pci_Frame 45B 84A X15 21 Pci_Devsel 46A 82B X12 21 Pci_Trdy 46B 85A X16 21 Pci_Stop 478 86 17 21 Pci_Perr 48 85 10 22 48 88 14 22 Pci_Serr 494 86 11 22 Pci 1 504 878 12 22 C 8 0 50B 94A X15 24 Table 27 Pin Assignment PCI dedicated signals phyCORE MPC5200B tiny Carrier Board Expansion Board PHYTEC Messtechnik GmbH L 678e 4 81 5200 Signal phyCORE Module Expansion Patch Field Bus ATA Isolation 378 61B X11 16 _ 384 65 16 16 TATA 38 62 12 16 ATA_intrg 39A 66A X17 16 _ 1 35 63A X14 16 ATA Drq 35B 58B X13 15 ATA 80 34A 61A X17 15 Iochrdy 36A 64A X15 16 ATA Iow 36B 60B X10 16 Table 28 Pin Assignment Dedicated ATA Interface Signals phyCORE MPC5200B tiny Carrier Board Expansion Board 82 PHYTEC Messtechnik GmbH L 678e 4 phyCORE MPC5200B tiny on the Carrier Board Signal phyCORE Module Expansion Patch Field Bus AC97_1_Sdata_I 16C n AC97_1_Sdata_ 15D Out AC97_1_Res 13C 97 1 Sync 14 97 1 Bitclk 15 TXD6 232 23C 23C X5 6 RXD6 232 21C 21C X2 6 UART6_TXD_T 20C 20C X8 5 TL UART6_RXD_T 19C 19C X7 5 TL UART6_R
22. X11 19D 24D 29D 18 X11 23 34D 39D 44D X12 3 X12 8 49D 54D 590 12 13 X12 64D 69D 74D 18 X12 23 79D 84D 89D X13 3 X13 8 94D 99D X 13 X13 18 X13 23 X14 3 PHYTEC Messtechnik GmbH L 678e 4 91 92 5200 14 8 14 13 14 18 14 23 15 3 15 8 15 13 15 18 15 23 16 3 16 8 16 13 16 18 16 23 X17 3 X17 8 X17 13 X17 18 X17 23 Table 33 Pin Assignment Power Supply for the phyCORE MPCS5200B tiny Carrier Board Expansion Board PHYTEC Messtechnik GmbH L 678e_4 The 5200 tiny on the Carrier Board 14 3 16 Gold Connector C119 The mounting space C119 see PCB stencil is provided for connection of a gold cap that buffers the RTC on the phyCORE 5200 tiny In the event of VCC operating voltage failure the RTC is automatically supplied with power from the connected gold cap The optional gold cap required for the RTC is available through PHYTEC order code CG 002 PHYTEC Messtechnik GmbH L 678e_4 93 5200 Index CSO 28 Flash 5 27 ETH INT 71 Start Address 28 ETH PD 71 Flash Access Time 29 FB_CSO 27 Flash Memory 28 RSTI 24 FPGA JTAG Connector 76 SD_CSO 30 FRAM 27 100Base T 36 FSEO Mode 72 10Base T 36 Functional Components on the 1V5 24 phyCORE Carrier Board 63 2V5 24 GND Connection 53 3V3 24 Gp
23. a LOW level 2 3 Boot configuration of the inserted phy CORE MPC5200B tiny will be overwritten by a HIGH level JP10 open This Jumper is not supported in conjunction with a phyCORE MPC5200B tiny JP12 open This Jumper is not supported in conjunction with a phyCORE MPC5200B tiny Table 23 Misc Configuration Jumpers JP10 JP12 14 3 14 FPGA JTAG Connector X8 Connector X8 provide access to the JTAG signals for the FPGA on the phyCORE MPC5200B I O module Signal Pin Pin Signal _ 1 2 GND TDO 3 4 3 3 5 5 6 default connects to 3 3V n c 7 8 FPGA TDI 9 10 GND Table 24 FPGA JTAG Connector X8 Pin Assignment 76 PHYTEC Messtechnik GmbH L 678e 4 The phyCORE MPC5200B tiny on the Carrier Board 14 3 15 Pin Assignment Summary of the phyCORE the Expansion Bus and the Patch Field Most signals from the phyCORE MPC5200B tiny extend to the Expansion Bus connector X3 on the Carrier Board These signals in turn are routed in a similar manner to the patch field on an optional expansion board that mounts to the Carrier Board at X3 Please note that depending on the design and size of the expansion board only a portion of the entire patch field is utilized under certain circumstances When this is the case certain signals described in the following section will not be available on the expansion board However
24. is not populated on the standard version of the phyCORE MPC5200B You can order a specific debug version of the module denoted by the D part number extension or populate a 2 8 pin header connector at space X2 The numbering scheme is depicted on the phyCORE MPC5200B The pinout of the JTAG interface at X2 is described in the following table Signal Pin Row Signal Bottom Top TDO 1 2 NC quack TDI 3 4 TRST NC halted 5 6 3V3 TCK 7 8 NC TMS 9 10 NC SReset 11 12 GND HReset 13 14 NC key CK_Stop 15 16 GND Table 10 JTAG Interface PHYTEC Messtechnik GmbH L 678e_4 45 phyCORE MPC5200B tiny 46 PHYTEC Messtechnik GmbH L 678e 4 Technical Specifications gt a Rpg PA s 9 qe BR 8r 5 NE NENEEN BMS IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII C54 C55 R33 7 f Aou F SES a ae 08 C BN C58 C59 22 R53 im 00117 m IIII ER f Figure 11 1245 2 component placement Top view PHYTEC Messtechnik GmbH L 678e_4
25. n 41000 5 2 2 5 Due 7 8 9 Figure 5 Numbering of the Jumper Pads R 32 cw R39 Ul7 PR 121 EE XT2 EL Ex CB314 ale bal c RE QU ION 98 861 ME pol 13 ue 8 II IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII cag 60 PW Et LETS s U8 CES e IIII zo d 6 C58 C59 IIIIIIIIIIIIIIIIIIIIIIIIIIIIIII II UA NINI IH au U14 Figure 6 Location of the Jumpers Controller Side phyCORE MPC5200B tiny Standard Version PHYTEC Messtechnik GmbH L 678e_4 19 phyCORE MPC5200B LI amp 27 0 R76 IIIIIIIIIIIIIIIIIIIIIIIIIIIII 5 HKN DI C1 cere ENS X IIIVIIIIIIIIIIIIIIIIIIIIIIIIIIIII ia I Sm CB304 oa CB308 CB105 BH CB104 865 C49 R7un 815 816 E E CB204 CB203 E C m eeccccceo e 824 Em Hi nm R66 ELITI Figure 7 Location of the Jumpers B
26. the pin assignment scheme remains consistent A two dimensional numbering matrix similar to the one used for the pin layout of the phyCORE connector is provided to identify signals on the Expansion Bus connector X3 on the Carrier Board as well as the patch field PHYTEC Messtechnik GmbH L 678e_4 77 5200 However the numbering scheme for Expansion Bus connector patch field matrices differs from that of the phyCORE connector as shown in the following two figures ABCDEF Figure 25 Pin Assignment Scheme of the Patch Field 78 PHYTEC Messtechnik GmbH L 678e_4 Carrier Board The phyCORE MPC5200B tiny on the The pin assignment on the phyCORE MPC5200B tiny in conjunction with the Expansion Bus X3 on the Carrier Board and the patch field on an expansion board is as follows Signal phyCORE Module Expansion Patch Field Bus Ext ADO 8B 99A X15 25 Ext ADI 9A 98B X13 25 Ext AD2 10A 98 14 25 Ext_AD3 10B 97B X12 25 Ext_AD4 96 X17 24 Ext AD5 118 968 11 25 Ext_AD6 12B 95A X16 24 Ext_AD7 13A 95B X10 25 Ext_AD8 13B 93B X13 24 Ext_AD9 14A 93A X14 24 Ext_AD10 15 91 11 24 Ext_AD11 15B 91A X17 22 Ext_AD12 16A 90B X10 24 Ext_AD13 16B 90A X16 22 Ext_AD14 17B 88B X13 22 Ext_AD15 18A 89
27. 1 2 4 5 Supply voltage 3 3 VDC 3C 7C 12C GND Ground 0 V 17C 22C 27C 32C 37C 42C 47C Connection for external battery 2 4 3 3 V to supply backup the RTC U5 8C ETH TXDI Already used by the MlI Interface between CPU and Ethernet PHY The pin state is latched by the CPU after reset and used as boot high configuration Refer to section 5 System Start Up Configuration 10kOhm pull up resistor is connected to this signal 9C GPIO WKUP 6 I O Dedicated GPIO with wakeup capability Note This is 2 5V based 10C SRESET External SRESET is an open drain signal which is connected to a 10 kOhm pull up resistor on the module Assertion of SRESET causes assertion of the internal soft reset Internal soft reset is actually an interrupt that takes the same exception vector as HRESET In particular this means that SRESET cannot abort a hung XLB operation and no device should use SRESET in a way that interferes with any bus operation in progress SRESET can also be asserted by internal sources When SRESET is asserted internally external SRESET is also asserted HRESET HRESET is bi directional signal with a Schmitt trigger input and an open drain output The HRESET signal is connected a 10 kOhm pull up resistor on the module Assertion of external HRESET causes external HRESET and SRESET as well as internal hard and soft resets to be asserted for at least 4096 reference clock c
28. 2 no galvanic separation Pin 6 GND Carrier Board Ground Figure 23 Pin Assignment of the DB 9 Plug P2B CAN Transceiver on Carrier Board 68 PHYTEC Messtechnik GmbH L 678e 4 phyCORE MPC5200B tiny on the Carrier Board Caution When using the DB 9 connector P2B as second CAN interface and the CAN transceiver on the Carrier Board the following jumper settings are not functional and could damage the module Jumper Setting Description JP6 open CANO TX signal not connected to transceiver CAN communication possible JP7 open CANO signal not connected to transceiver CAN communication possible Table 17 Improper Jumper Settings for the CAN Plug P2B CAN Transceiver on the Carrier Board PHYTEC Messtechnik GmbH L 678e 4 69 5200 14 3 6 Programmable LED D16 The phyCORE Carrier Board MPC5200B tiny offers a programmable LED at D16 for user implementations This LED can be connected to port pin Gpio_Wkup_7 ball C12 or to the SPI MOSI signal ball B5 of the MPC5200B CPU A low level at applicable port pin causes the LED to illuminate LED D16 remains off when writing a high level Jumper Setting Description JP13 1 2 Port SPI_MOSI of the 5200 controls LED D16 on the Carrier Board JP13 2 3 Port pin Wkup 7 of the MPC5200B controls LED D16 on the Carrier Board Table 18 7 Configuration
29. 25 FPGA_B4_K7 97D X4 25 4 6 98 5 25 4 7 98D X6 25 FPGA B4 P6 99C X7 25 FPGA 4 R6 100C X8 25 Table 32 Pin Assignment FPGA Signals for the phyCORE MPC5200B tiny Carrier Board Expansion Board 90 PHYTEC Messtechnik GmbH L 678e 4 Carrier Board The phyCORE MPC5200B tiny on the Signal phyCORE Module Expansion Bus Patch Field 3V3 PCI IC 2C ID X2 1 X2 2 2D 3 1 3 2 3V3 2C 4 5 4 5 4 1 X4 2 1D 2D VCC_SRAM 6D 6D X6 2 VBAT 6C 6C X6 1 GND 2A 7A 12A 2 7 12A 2 3 X2 8 X2 17A 22A 27A 17A 22A 27A 13 X2 18 X2 32A 37 42 32A 37A 42A 23 X3 3 X3 8 47A 52A 57A 3 13 X3 18 4B 9B 14B 62A 67 72A X3 23 X433 198 248 29B 77 82A 87A 4 8 X4 13 34B 39B 41B 92A 97A X4 18 X4 23 44B 49B 4B 9B 14B X5 3 X5 8 X 3C 7C 12C 19B 24B 29B 13 X5 18 X5 17C 22C 27C 34B 39B 44B 23 X6 3 X6 8 32C 37C 42C 49B 54B 59B X6 13 X6 18 47 648 69B 74B X6 23 7 3 3D 9D 14D 79 84B 89B 7 8 X7 13 19D 24D 29D 94 99B X7 18 X7 23 34D 39D 44D X8 3 X8 8 X8 49D 3C 7C 12C 13 X8 18 X8 17 22 27C 23 9 3 X9 8 32C 37C 42C X9 13 X9 18 47C 52C 57C X9 23 X10 3 62C 67C 72C X10 8 X10 13 TIC 82C 87C X10 18 X10 23 92 97 11 3 X11 8 3D 9D 14D X11 13
30. 7 FPGA B2 66D 3 17 2 13 67D X4 17 FPGA B2 68C X5 17 FPGA B2 12 68D X6 17 FPGA B3 CI4 69C XT 17 FPGA B3 5 70C X8 17 FPGA B3 C16 70D X9 17 FPGA 71 2 19 FPGA B3 014 710 3 19 FPGA B3 DI5 72D X4 19 FPGA B3 Dl6 73C X5 19 FPGA B3 E13 73D X6 19 FPGA B3 LI4 74C X7 19 FPGA B3 15 75C X8 17 FPGA B3 16 75D X9 19 FPGA B3 LI3 76C X2 20 FPGA LI4 76D X3 20 FPGA_B3_F15 77D X4 20 FPGA_B3_F16 78C X5 20 FPGA_B3_G12 78D X6 20 FPGA_B3_G13 79C X7 20 FPGA B3 Gl5 80C X8 20 PHYTEC Messtechnik GmbH L 678e 4 89 5200 FPGA B3 Gl6 80D X9 20 2 21 2 81D 3 21 820 4 21 FPGA B3 15 83C 5 21 83 6 21 FPGA B3 112 84C X7 21 FPGA B3 5 85C 8 21 FPGA B3 6 85D 9 21 86 2 22 FPGA B3 86D X3 22 FPGA 16 87D 4 22 LI2 88 5 22 LI4 880 6 22 B3 15 89 7 22 B3 L16 90C X8 22 2 90 9 22 FPGA MI4 91C X2 24 FPGA B3 MI5 910 X3 24 FPGA B3 M16 92D X4 24 FPGA B3 NI2 93C 5 24 FPGA B3 NI5 93D X6 24 FPGA_B3_N16 94C X7 24 B3 P14 95 X8 24 _ _ 15 95D X9 24 FPGA_B3_P16 96C X2 25 FPGA_B4_K6 96D X3
31. A X15 22 Ext_AD16 18B 83A X14 21 Ext_AD17 19A 78B X13 20 Ext_AD18 20A 81A X17 20 Ext_AD19 20B 778 X12 20 Ext_AD20 21A 80A X16 20 Ext_AD21 218 768 11 20 Ext_AD22 22B 79 15 20 Ext_AD23 23A 75B X10 20 Ext_AD24 23B 78 14 20 Ext_AD25 24A 72B X12 19 Ext_AD26 25A 75 X16 19 Ext_AD27 25B 71B X11 19 Ext_AD28 26A 74 15 19 Ext_AD29 26B 70B X10 19 Ext_AD30 27B 73 14 19 Ext_AD31 28A 68B X13 17 Table 25 Pin Assignment Data Address Bus for the phyCORE MPC5200B tiny Carrier Board Expansion Board PHYTEC Messtechnik GmbH L 678e 4 79 5200 Signal phyCORE Module Expansion Patch Field Bus LP_CS1 5 5 16 1 CS2 58 358 0 10 CS3 6B 5B X10 2 LP_Cs4 30A 6B 11 2 Cs5 308 368 X11 10 LL C56 314 478 XI2 12 LP_Cs7 31B 48B X13 12 LP_Ts 29A 33B X13 9 LP_Ack 28B 34A X15 9 LP_Ale 6A 6A X17 1 LP_Oe 7B 8A X14 2 LP_RD WR 8A 7B X12 2 Table 26 Pin Assignment Dedicated LocalPlus Control Signals phyCORE MPC5200B tiny Carrier Board Expansion Board 80 PHYTEC Messtechnik GmbH L 678e 4 The phyCORE MPC5200B tiny on the Carrier Board Signal phyCORE Module Expansion Patch Field Bus Pci Reset 40A 70A X16 17 Pci Clock 40B 14 10 1 Pci_Gnt 41 71 17 17 428 678 12 17 Pci_Cbe_3 43A 73B X13 19 Pci Idsel 43B 76 17 19
32. C INT signal connected to IRQ 2 on the phyCORE MPC5200B tiny JP15 open PEN INT signal from WM9712 not used closed PEN INT signal connected to IRQ 3 on the phyCORE MPC5200B tiny Table 21 JP14 JP15 AC97 Audio Interface Configuration PHYTEC Messtechnik GmbH L 678e 4 73 5200 14 3 10 Compact Flash Card Socket X10 The 5200 tiny Carrier Board provides a Compact Flash CF card socket at X10 CF cards used in this socket can only be operated in IDE mode Activity on the CF card socket is indicated by LED D14 Jumpers J3 and JP11 are available for configuration of the Compact Flash card interface The following configuration options are possible Jumper Setting Description J3 open Not recommended 1 2 Compact Flash card write protection active 2 3 Compact Flash card write protection not active Compact Flash slave mode selected closed Compact Flash master mode selected Table 22 73 JP11 CF Card Interface Configuration 14 3 11 IDE Interface X11 The phyCORE MPC5200B Carrier Board provides IDE interface header at X11 for connection to external 2 5 hard disks The 44 pin header connector in 2 0 mm pin spacing allows easy and convenient connection to peripheral devices using a ribbon cable Activity on the IDE socket is indicated by LED D15 74 C PHYTEC Messtechnik GmbH L 678e 4 The phyCORE MPC5200B
33. C5200B tiny on the Carrier Board 14 2 Carrier Board phyCORE MPC5200B tiny Connectors and Jumpers 14 2 1 Connectors As shown in Figure 15 the following connectors are available on the phyCORE Development Board PCM 973 phyCORE connector for phyCORE module with 400 pins e g phyCORE MPC5200B tiny X2 phyCORE connector for phyCORE module with 200 pins e g phyCORE MPC5200B tiny X3 400 pin mating receptacle for GPIO expansion board connectivity X4 PCI connector for compatible 3 3V PCI insert cards X5 JTAG pin header for PCI insert card connector X4 X6 Connector for supply voltage 9 14V XT PE connection X8 JTAG pin header for FPGA X9 pin header for MPC5200B controller X10 Compact Flash card socket X11 IDE Interface connector X12 FPGA configuration interface X15 Base Speaker Interface of the WM9712 U20 X16 Mono out from WM9712 X17 Beeper out from WM9712 X18 SPDIF out from WM9712 X19 Differential output from WM9712 X20 Auxiliary output from WM9712 RJ45 Interface for Ethernet connection 10 100MBit P2 dual DB 9 plugs for CAN interface connectivity L3 dual DB 9 sockets for serial RS232 interface connectivity P4 MIC input PHYTEC Messtechnik GmbH L 678e_4 57 phyCORE MPCS200B tiny 5 Line in left right 6 Line out left right GNDI GND connector for measurement purposes
34. Improvement Document phyCORE MPC5200B tiny Document number L 678e_4 June 2008 How would you improve this manual Did you find any mistakes in this manual page Submitted by Customer number Name Company Address Return to PHYTEC Technologie Holding AG Postfach 100403 D 55135 Mainz Germany Fax 49 6131 9221 26 PHYTEC Messtechnik GmbH 2008 L 678e 4 Published by Y W PHYTEC Messtechnik GmbH 2008 Order 1 678 4 Printed in Germany
35. MPC5200B tiny Connectors and t E 57 V 57 14 2 2 Jumpers on the Carrier Board 5200 ij 60 14 3 Functional Components the phyCORE MPC5200B tiny Carrier Boats deo sete tdt eL 63 14 3 1 Power Supply at 63 PHYTEC Messtechnik GmbH L 678e_4 5200 14 3 2 First Serial Interface at Socket 64 14 3 3 Second Serial Interface at Socket P3B 65 14 3 4 First CAN Interface at Plug 2 66 14 3 5 Second CAN Interface at Plug 2 68 14 3 6 Programmable LED DIS 70 14 37 Ethernet Interface P Los oett rp e 71 14 3 8 USB Host Interface 402 2 2 72 14 3 9 Audio Interface aere teo nane eoa mee 73 14 3 10 Compact Flash Card Socket 74 14 3 11 IDE Interface X11 ee ees 74 14 3 12 CI Slot X4 e aes 75 14 3 13 Misc Configuration Jumpers the Carrier 76 14 3 14 FPGA JTAG Connector X8 esses 76 14 3 15 Pin Assignment Summary of the phyCORE the Expansion Bus and the Patch I10 77 14 3 16 Gold CA
36. OM port on a host PC or other peripheral devices In this instance the RXD3 232 or RXD6 232 line X1D22 X1C21 of the transceiver 1 connected to the corresponding TXD line of the COM port while the TXD3 232 or TXD6 232 line X1D23 X1C23 is connected to the RXD line of the COM port The Ground circuitry of the phyCORE MPC5200B tiny must also be connected to the applicable Ground pin on the COM port The processor s on chip supports handshake signal communication Use of an RS 232 signal level in support of handshake communication requires use of external 5 232 transceiver not located on the module Furthermore it is possible to use the TTL signals of both of the channels externally These signals are available at X1D16 X1D17 UART3 RAD TTL UART3_TXD_TTL and 9 20 UART6 RXD TTL UART6 TXD TTL on the connector External connection of TTL signals is required for galvanic separation of the interface signals Using solder jumpers J1 and J2 the TTL transceiver outputs of the on board RS 232 transceiver devices can be disconnected from the receive lines UART3 RAD TTL and UART6 RXD TTL This is required so that the external transceiver does not drive signals against the on board transceiver The transmit lines UART3 TXD TTL UART6 TXD TTL can be connected parallel to the transceiver input without causing any signal conflicts PHYTEC Messtechnik GmbH L 678e 4 35
37. P Connector 119 93 _ _ _ _ _ 94 _ __ 96 M 96 PHYTEC Messtechnik GmbH L 678e_4 Contents Index of Figures and Tables Figure 1 Block Diagram phyCORE MPC5200B VVX 6 Figure 2 Top View of the phyCORE MPC5200B tiny PCB Rev 1245 27 Figure 3 Bottom View of the phyCORE MPC5200B tiny PCB Rev 7 Figure 4 Pinout of Othe phyCORE MPC5200B Bottom View 10 Figure 5 Numbering of the Jumper 5 19 Figure 6 Location of the Jumpers Controller Side phyCORE 5200 tiny Standard Version 19 Figure 7 Location of the Jumpers Bottom Side phyCORE MPC5200B tiny Standard Version ee pte eh re eI 20 Figure 8 Power Supply Diagram eet 23 Figure9 Serial Memory Slave Address see 32 Figure 10 U Boot Memory 43 Figure 11 1245 2 component placement Top view 47 Figure 12 1245 2 component placement Bottom view ses 48 Figure 13 Physical Dimensions Top View eene 49 Figure 14 Modular Development and Expansion Board Conce
38. TAG controller reset as output This logic connection is used to ensure a proper reset of the CPU internal debug interface by PoReset or by the COP signal COP_TRST The voltage supervisor s master reset input RESIN can be connected to an external signal or switch to release a asynchronous reset manually 24 PHYTEC Messtechnik GmbH L 678e_4 Start Up System Configuration 5 System Start Up Configuration During the reset cycle the MPC5200B processor reads the state of selected controller signals to determine the basic system configuration The configuration circuitry pull up or pull down resistors is located on the phyCORE module The system start up configuration includes e Clock configuration e Basic LocalPlus characteristic for boot memory configuration Note Since most of these signal lines are routed to the phyCORE connector care must be taken not to overwrite the startup configuration accidentally when connecting these signals to external devices PHYTEC Messtechnik GmbH L 678e_4 25 5200 following default configuration is read by the processor with the rising edge of the reset line PoReset The logic level of the signals written in italic style could be configured via solder jumpers on board refer to section 3 Signal Name Register Bit Logic Description Level LP_Ale PPC_pll_cfg 0 Bus clock ratio XLB core clock 1 3 LP RD WR
39. TEC products should not be operated without protection circuitry if connections to the product s pin header rows are longer than 3 m PHYTEC Messtechnik GmbH L 678e_4 1 phyCORE MPC5200B tiny PHYTEC products fulfill the norms of the European Union s Directive for Electro Magnetic Conformity only in accordance to the descriptions and rules of usage indicated in this hardware manual particularly in respect to the pin header rows or connectors power connector and serial interface to a host PC Implementation of PHYTEC products into target devices as well as user modifications and extensions of PHYTEC products is subject to renewed establishment of conformity to and certification of Electro Magnetic Directives Users should ensure conformance following any modifications to the products as well as implementation of the products into target systems The phyCORE MPC5200B tiny is one of a series of PHYTEC Single Board Computers that can be populated with different controllers and hence offers various functions and configurations PHYTEC supports common 8 16 and numerous 32 bit controllers on two types of Single Boards Computers 1 as the basis for Rapid Development Kits which serve as a reference and evaluation platform 2 as insert ready fully functional phyCORE OEM modules which can be embedded directly into the user s target design PHYTEC s microcontroller modules allow engineers to shorten development horizons reduc
40. TS_T 24C TL UART6_CTS_T 25C TL RXD3 232 22D 22D X4 6 TXD3 232 23D 23D X6 6 UART3_TXD_T 17D 17D X4 5 TL UART3_RXD_T 16D 16D X3 5 TL UART3_RTS_T 25D 25D X9 6 TL UART3_CTS_T 26D 26D X3 7 TL CANI TX 210 21D X3 6 CANI_RX 20D 20D X9 5 CAN2_TX 18C 18C X5 5 CAN2 RX 18D 18D X6 5 I2C1_Clk 31C 31C X2 9 Io 32D 32D 4 9 I2C2 26 26 2 7 I2C2 28 28 5 7 PHYTEC Messtechnik GmbH L 678e 4 83 5200 SPI Mosi 27D 27D 4 7 SPI_Miso 28D 28D X6 7 SPI CIk 30D 30D X9 7 SPI Ss 31D 31D X3 9 RX 35C _ 35D ETH_TX 36C ETH_TX 36D ETH_INT 37D ETH_LINK 33C ETH_SPEED 34C ETH_PD 38C USB1_Oe 50 0581 50D USB1_TXN 49C USB1_RXD 47D USB1_RXP 48D USB1_RXN 48 USB1_Suspend 46C USBI PortPwr 45D 0581 Overcnt 45C 0581 Speed 46D Table 29 Pin Assignment Interfaces for the phy CORE MPC5200B tiny Carrier Board Expansion Board Signal phyCORE Module Expansion Patch Field Bus CPU TCK 38D TRST 39C CPU TDI 40D CPU TDO 41D CPU TMS 42D CK STOP 40C Table 30 Pin Assignment COP Interface Signals for the phyCORE MPC5200B tiny Carrier Board Expansion Board 84 PHYTEC Messtechnik GmbH L 678e 4 The phyCORE MPC5200B ti
41. ails on the functions and features of controller signals and port pins 10 PHYTEC Messtechnik GmbH L 678e_4 Pin Description Pin Row X1A 7A Ground 0 V 17A 22A 27 32A 37A 42A 1 Interrupt input 3 of the processor ARQO Interrupt input 0 of the processor 2A 7A 12A LP_CS1 LP_ALE LP_RD WR LP_Ts LP_Cs4 LP_Cs6 LocalPlus Bus control signals Chip Select 1 Address Latch Enable Read not Write Transfer Start Chip Select 4 Chip Select 6 PSC3 is UART3 LocalPlus Address Data Signals Already used by the MII interface between CPU and Ethernet PHY Could be used as J1850_TX signal if the PHY is not populated or in isolation mode The pin state is latched by the CPU after reset and used as byte lane swap configuration Refer to section 5 System Start Up Configuration There is a 10kOhm pull down resistor on this signal ATA_CS_0 _ _1 IOCHRDY _ ATA Interface Signals Timer Port configured as ATA CS 0 Timer Port configured as CS Timerl ATA negated to extend transfer ATA read ATA interrupt request PHYTEC Messtechnik GmbH L 678e 4 11 5200 Dedicated PCI Signals Reset output open drain Bus grant Command byte enable 3 Command byte enable 2 Initiator HOST ready Device select Parity error System Error o
42. cast photomechanical or similar reproduction and storage or processing in computer systems in whole or in part are reserved No reproduction may occur without the express written consent from PHYTEC Messtechnik GmbH EUROPE NORTH AMERICA Address PHYTEC Technologie Holding AG PHYTEC America LLC Robert Koch Str 39 203 Parfitt Way SW Suite G100 D 55129 Mainz Bainbridge Island WA 98110 GERMANY USA Ordering 49 800 0749832 1 800 278 9913 Information order phytec de sales phytec com Technical 49 6131 9221 31 1 800 278 9913 Support support phytec de support phytec com Fax 49 6131 9221 33 1 206 780 9135 Web Site http www phytec de http www phytec com 47 Edition April 2008 PHYTEC Messtechnik GmbH L 678e_4 Contents _ _ __ 3 _ 3 3 1 1 3 I L Block 6 1 2 View of the phyCORE MPC5200B 7 1 3 Minimum Requirements to Operate the phyCORE MPC5200B anu amp 2 8 1 9 19 4 Power Requirements ss 23 4 1 Voltage Supervision and Reset 24 5 System Start Up Configuration 0s0000000000000000000 00000000000000 0000000000 25 6 System Memory
43. cation it is the user s responsibility to take appropriate safety measures to ensure that the module connections are protected from overloading through connected peripherals PHYTEC Messtechnik GmbH L 678e_4 59 5200 14 2 2 Jumpers on the Carrier Board phyCORE MPC5200B tiny Peripheral components of the phyCORE MPC5200B tiny Carrier Board can be connected to the signals of the phyCORE MPC5200B tiny by setting the applicable jumpers The Carrier Board s peripheral components are configured for use with the phyCORE MPC5200B tiny by means of removable jumpers If no jumpers are set no signals connect to the DB 9 connectors the control and display units and the CAN transceivers The Reset input on the phyCORE MPC5200B tiny directly connects to the Reset button S1 Figure 16 illustrates the numbering of the jumper pads while Figure 17 indicates the location of additional jumpers on the Carrier Board z B JP28 z B JP23 7 JP24 Figure 16 Numbering of Jumper Pads 60 PHYTEC Messtechnik GmbH L 678e_4 The phyCORE MPC5200B tiny on the Carrier Board wa a l 1
44. ce 16 MByte Intel Strata Flash memory 1 16 bit multiplexed mode 64 MByte DDR SDRAM 2x 16 bit e 4kByte serial memory EEPROM The Flash memory is connected to the PowerPC LocalPlus bus and is controlled by CSO This Chip Select signal is used for boot operation The DDR SDRAM is connected to the special SDRAM interface of the MPC5200B processor and operates at the maximum frequency 132 MHz Communication to the small non volatile memory device is established over the processor s bus This memory device holds the boot loader U Boot environment variables in its first two kilobytes and can be used for parameter storage PHYTEC Messtechnik GmbH L 678e 4 27 5200 6 1 Flash Memory Use of Flash as non volatile memory on the phyCORE MPC5200B tiny provides an easily reprogrammable means of code storage 16 up to 32 MByte Intel Strata Flash memory e 16 bit bus width e Only asynchronous operation is possible The Flash memory bank supports the following Intel memory devices Type Size Manufacturer Device Code Manufacturer Code Asynchronous Devices 28F128J3D 16 MByte Intel 0x0018 0x0089 28F128P33 T 16 MByte Intel 0 881 0 0089 28F128P33 B 16 MByte Intel 0 8821 0 0089 28F256P33 T 32 MByte Intel Ox891F 0x0089 28F256P33 B 32 MByte Intel 0 8922 0 0089 Table 5 Choice of Flash Memory Devi
45. ces and Manufacturers The organization of the Flash memory bank is 16 bit The Flash memory bank is controlled by the processor Chip Select signal CSO This Chip Select signal is the dedicated control signal for boot purposes The MPC5200B s LocalPlus bus can be configured for many different bus modes For CSO the 25 bit address 16 bit data multiplexed mode was chosen because it offers the largest address space without interfering the ATA or PCI bus With 25 address lines a total of 32 MByte of data code can be addressed It is possible to use different bus modes on other available Chip Select signals The Flash memory bank 0 starts at address 0X0000 0100 or OxFFFF_0100 depending on the startup configuration and relative to the base address of the processor s Chip Select signal CSO 1 Flash types in the shaded lines are the preferred parts for the phyCORE MPC5200B tiny 28 PHYTEC Messtechnik GmbH L 678e_4 System Memory The access speed depends on the equipped memory device The LocalPlus Bus clock cycle is determined by the PCI clock which is configured by the PCI clock divider A typical configuration selects 33 MHz The resulting basic cycle time is 30 30 ns The MPC5200B processor multiplexed read or write is divided into a address tenure and a data tenure Because the Chip Select signal is generated with the start of the data tenure only this period is of interest for access time calculation The equation for access
46. cessed very effective without extensive processor action refer also to section 6 3 The Real Time Clock also provides an interrupt output that extends to the IRQRTC signal X1D33 An interrupt occurs in the event of a clock alarm timer alarm timer overflow and event counter alarm It has to be cleared by software With the interrupt function the Real Time Clock can be utilized in various applications If the RTC interrupt is to be used as a software interrupt via a corresponding interrupt input of the processor the signal IRQRTC must be connected externally with a processor interrupt input The RTC_CLKOUT signal can be programmed to various frequencies e g RTC_CLKOUT output must be enabled via solder jumper J7 PHYTEC Messtechnik GmbH L 678e 4 33 5200 For more information on the features of 8564 refer to the corresponding Data Sheet Note After connection of the supply voltage the Real Time Clock generates no interrupt The RTC must first be initialized see RTC Data Sheet for more information 34 PHYTEC Messtechnik GmbH L 678e_4 Serial Interfaces 8 Serial Interfaces 8 1 RS 232 Interface A dual channel RS 232 transceiver is located the phyCORE MPC5200B tiny at U3 This device adjusts the signal levels of the UART3 RXD TXD TTL and UART6 RXD TXD TTL lines 5200 PSC3 PSC6 The RS 232 interface enables connection of the module to C
47. d Expansion Board 92 Messtechnik GmbH L 678e_4 Preface Preface This phyCORE MPC5200B tiny Hardware Manual describes board s design and functions Precise specifications for the Freescale 5200 microcontroller series can be found in the enclosed 5200 microcontroller Data Sheet User s Manual If software is included please also refer to additional documentation for this software In this hardware manual and in the attached schematics low active signals are denoted by a in front of the signal name 1 RD A 0 indicates a logic zero or low level signal while a 1 represents a logic one or high level signal Declaration regarding Electro Magnetic Conformity of the PHYTEC 5200 tiny PHYTEC Single Board Computers henceforth products are designed for installation in electrical appliances or as dedicated Evaluation Boards 1 for use as a test and prototype platform for hardware software development in laboratory environments Note PHYTEC products lacking protective enclosures are subject to damage by ESD and hence may only be unpacked handled or operated in environments in which sufficient precautionary measures have been taken in respect to ESD dangers It is also necessary that only appropriately trained personnel such as electricians technicians and engineers handle and or operate these products Moreover PHY
48. e design costs and speed project concepts from design to market 2 PHYTEC Messtechnik GmbH L 678e 4 Introduction 1 Introduction The phyCORE MPC5200B tiny belongs to PHYTEC s phyCORE Single Board Computer module family The phyCORE SBCs represent the continuous development of PHYTEC Single Board Computer technology Like its mini micro and nanoMODUL predecessors the phyCORE boards integrate all core elements of a microcontroller system on a sub miniature board and are designed in a manner that ensures their easy expansion and embedding in peripheral hardware developments As independent research indicates that approximately 70 of all EMI Electro Magnetic Interference problems stem from insufficient supply voltage grounding of electronic components in high frequency environments the phyCORE board design features an increased pin package The increased pin package allows dedication of approximately 20 of all pin header connectors on phyCORE boards to Ground This improves EMI and EMC characteristics and makes it easier to design complex applications meeting EMI and EMC guidelines using phyCORE boards even in high noise environments phyCORE boards achieve their small size through modern SMD technology and multi layer design In accordance with the complexity of the module 0402 packaged SMD laser drilled Microvias components are used on the boards providing phyCORE users with access to this cutting edge miniaturi
49. er Board interface signals with RS 232 level are available at connector P3A JP18 open UART3_CTS_TTL signal is freely available Table 12 Jumper Configuration for the First RS 232 Interface 1 6 2 3 7 2 TxD3 232 8 Pin 7 3 232 4 9 3 RxD3 232 5 Pin 8 CTS3 232 Pin 5 GND Figure 20 Pin Assignment of the DB 9 Socket P3A as RS 232 PSC3 Front View 64 PHYTEC Messtechnik GmbH L 678e_4 The phyCORE MPC5200B tiny on the Carrier Board 14 3 3 Second Serial Interface at Socket P3B Socket P3B is the upper socket of the double DB 9 connector at P3 P3B is connected directly to the serial interface PSC6 of the phyCORE MPC5200B tiny The only signal configurable with Jumper JP18 is UART6 CTS TTL coming from PSC6 on the MPC5200B Jumper Setting Description JP18 1 2 Signal UART6_CTS_TTL is connected to the RS 232 tranceiver U22 on the phyCORE MPC5200B tiny Carrier Board interface signals with RS 232 level are available at connector P3B JP18 open UART6_CTS_TTL signal is freely available Table 13 Jumper Configuration of the DB 9 Socket P3B PSC6 27 2 TxD6 85232 r Pin 7 CTS6_RS232 4 3 RS232 5 8 56 RS232 5 GND Figure 21 Pin Assignment of the DB 9 Socket P3B as Second RS 232 Front View PHYTEC Messtechnik GmbH L 678e 4 65 phyCORE MPC5200B tiny 14 3 4 First CAN Interface at Plug P2A
50. f the first CAN interface PSC2 21D CANI TX CAN transmit of the first CAN interface Le PSC3 C UART3 PSC3 UART3 CTS TIL O PCS3cleartosendsignal SPI Interface PSC3 27D SPI MOSI SPI master out slave in 28D SPI MISO I O SPI master in slave out 30D SPI CLK I O SPIclock 31D SPI SS SPIslave select I2C1 IO Data line of first I2C interface SDA 33D IRQ RTC Interrupt from the on board RTC US Interrupt can be programmed to occur to a specific time or date PHYTEC Messtechnik GmbH L 678e_4 17 phyCORE MPC5200B tiny 10 100MBit TP Ethernet Interface if on board PHY is not populated pins are NCO Differential receive input Differential transmit output MII interface interrupt MPC5200B JTAG interface Clock Data in Data out Mode select USB1 host USB1_PORTPWR Enable disable port power USB1_SPEED Speed select USB1_RXD Receive data USB1_RXP Receive positive USB1_TXP Transmit positive Table 2 Pinout of the phyCORE Connector X1 18 PHYTEC Messtechnik GmbH L 678e_4 Jumpers 3 Jumpers For configuration purposes 5200 tiny has 10 solder jumpers some of which have been installed prior to delivery Figure 5 illustrates the numbering of the jumper pads while Figure 6 indicates the location of the jumpers on the board open closed 5 123 1 1 2 aug B 1 2 3
51. fication provided by www usb org 38 PHYTEC Messtechnik GmbH L 678e_4 The U Boot Boot Loader 9 The U Boot Boot Loader U Boot is a universal boot loader firmware based on GPL Gnu Public License Its main function is initializing the system hardware following a reset followed by starting application software such as an operating system Furthermore U Boot provides various functions to query system information and to change the start up behavior of the target system For example U Boot allows to choose from different boot sources such as Ethernet etc It also provides functions to download application code into Flash The serial interface is used to communicate with U Boot on the target system The U Boot for phyCORE MPC5200B tiny uses PSC3 with 115 200 Baud 8 N 1 The U Boot boot messages can be viewed within a terminal program running on a host PC using the above mentioned communication settings Note PHYTEC delivers all phyCORE MPC5200B tiny modules with a pre installed U Boot allowing the user immediate startup The U Boot software project is subject to continuous maintenance and improvements Firmware updates will occur without special notification Should you require a specific version of U Boot pre installed at time of delivery please contact PHYTEC s sales department If U Boot is used as boot loader firmware and basic component of the system software the user should be familiar with the following topics
52. g signals which are being used in the application circuitry Optional Supply Input VBAT VBAT is the input pin that supplies the Real Time Clock U5 The MAX6364 battery supervisor U12 senses the 3 3 V main supply and VBAT and switches to the voltage with the higher level VBAT should be supplied from a 3 V source i e lithium battery 3V3 Power 2V5 DC DC Converter Power Voltage PoReset DC DC 1V5 Supervisor Converter RESOUT Power RESIN DC DC VCC_SRAM VBAT 3V Converter gt Real Time Clock U5 Figure 8 Power Supply Diagram PHYTEC Messtechnik GmbH L 678e 4 23 5200 Internally generated voltages 1V5 2V5 e 3 PowerPC Flash memory e 2V5 DDR SDRAM and Ethernet PHY e 1V5 PowerPC Core 4 1 Voltage Supervision and Reset The input voltage 3V3 as well as the on board generated operation voltages 2V5 and 1V5 are monitored by a voltage supervisor device at VII This circuitry is responsible for generation of the system reset signal PoReset The voltage supervisor IC initiates a reset cycle if any operating voltage drops below its minimum threshold value After all voltages reach their required value the supervisor chip adds an additional 200 ms delay until the PoReset line will be inactive high PoReset connects to the processor reset input PoReset is combined via the diodes D5 and D6 with COP_TRST to a logic OR with CPU_TSRT J
53. he Double precision FPU Instruction and data MMU SDRAM DDR SDRAM memory Interface up to 132 MHz operation SDRAM and DDR SDRAM support 256 addressing range CS two CS available Flexible multi function external bus interface Peripheral component interconnect PCI controller ATA controller BestComm DMA subsystem 6 programmable serial controllers PSC configurable for the following functions PHYTEC Messtechnik GmbH L 678e_4 Introduction Fast Ethernet controller FEC Supports 100Mbps IEEE 802 3 10 Mbps IEEE 802 3 Universal serial bus controller USB USB revision 1 1 host Two inter integrated circuit interfaces PC Serial peripheral interface SPI Dual CAN 2 0 controller MSCAN J1850 byte data link controller BDLC Test debug features JTAG IEEE 1149 1 test access port Common on chip processor COP debug port Memory Configuration DDR SDRAM 64 MByte to 128 MByte Flash 16 MByte to 32 MByte Intel Strata Flash memory 16 bit memory width only asynchronous devices are supported PC memory 4 Other Board Level Features Two ports RS 232 interfaces RxD TxD One 10 100Mbit Ethernet port via optional Micrel PHY PC Real Time Clock with calendar and alarm function Optional industrial temperature range 40 85 C Please contact PHYTEC for more information about additional module configurations PHYTEC Messtechnik GmbH
54. ht next to the VCC pins must be connected PHYTEC Messtechnik GmbH L 678e 4 53 phyCORE MPC5200B tiny 54 PHYTEC Messtechnik GmbH L 678e 4 The phyCORE MPC5200B tiny on the Carrier Board 14 The phyCORE MPC5200B tiny on the Carrier Board PHYTEC Carrier Boards are fully equipped with all mechanical and electrical components necessary for the speedy and secure start up and subsequent communication to and programming of applicable PHYTEC Single Board Computer SBC modules Carrier Boards are designed for evaluation testing and prototyping of PHYTEC Single Board Computers in laboratory environments prior to their use in customer designed applications 14 1 Concept of the Carrier Board phyCORE MPC5200B The Carrier Board phyCORE MPC5200B provides a flexible development platform enabling quick and easy start up subsequent programming of the phyCORE MPC5200B tiny Single Board Computer module The Carrier Board design allows easy con nection of additional expansion boards featuring various functions that support fast and convenient prototyping and software evaluation This modular development platform concept is depicted in Figure 14 and includes the following components e The actual Carrier Board 1 which offers all essential components and connectors for start up including a power socket enabling connection to an external power adapter 2 and serial interfaces 3 of the SBC module at DB 9 connectors
55. in order to ensure proper function e U Boot default system configuration e system resources required by U Boot e modifying the U Boot loader PHYTEC Messtechnik GmbH L 678e 4 39 5200 9 1 Default System Configuration The U Boot boot loader changes the following default settings to different than the reset values of the controller the phyCORE MPC5200B tiny Clock Core 396 MHz IPB 132 MHz PCI 33 MHz Memory Base Address Register MBAR OxF0000000 DDR RAM Automatic storage size detection start address 0x0 Flash Chip Select CSBoot 16 bit data bus width 25 address lines multiplexed mode I wait state 16 MByte starting at address PSC2 1 amp 2 PSC3 115200 baud 8 1 SPI PCI Enabled 33MHz Ethernet 100 Mbit s with MD 2 EEPROM at address 0x52 RTC at address 0x51 40 PHYTEC Messtechnik GmbH L 678e_4 The U Boot Boot Loader 9 2 System Resources Required by U Boot U Boot is located at address OXFFFO 0000 in the module s Flash and occupies two sectors 2x 128kByte The boot loader itself makes sure that these sectors are protected using the Flash s locked sector mechanism This makes accidental erasure of U Boot almost impossible Following a system start at address OXFFFO 0100 high boot U Boot first initializes the DDR RAM interface then copies itself to the upper end of the RAM memory space and transfe
56. io_Wkup_7 70 Audio Codec 73 Hints for Handling the Module 53 Audio Interface 73 Bus 21 BATI 93 LC Bus Frequency 31 Battery Connector 93 LC Interface 31 Carrier Board Connectors and Memory 21 Jumpers 57 IDE Interface 74 Card Socket 74 Intel Strata Flash 28 CF Mode 74 Introduction 3 CF Write Protect 74 Jl 21 Carrier 55 22 D14 74 J12 22 D15 74 J13 22 D19 71 J14 22 D20 71 J2 21 DDR SDRAM 5 27 30 J3 21 74 27 15 21 31 EEPROM serial 31 J6 21 31 EMC 1 J8 22 ESD 1 J9 22 Ethernet Interface 36 71 JP10 76 Ethernet PHY 71 JP11 74 Expansion Bus 77 JP12 76 Fast Ethernet Controller 36 JP13 70 Features 4 JP14 73 FEC 36 15 73 First CAN Interface 66 JP2 72 First Serial Interface 64 JP3 76 94 PHYTEC Messtechnik GmbH L 678e_4 Carrier Board The phyCORE MPC5200B tiny on the JP9 JTAG Interface Jumper Configuration Jumper Location Jumper Settings LAN LED D16 LINK LED MAC MAC Address 6364 Patch Field PCI Card Slot PCI Interrupt PHY PHY Address phyCORE connector Physical Layer Transceiver Pin Assignment Pin Description Pinout PLL Plug P2A Plug P2B Power Requirements Power Supply Real Time Clock Reset Reset Button RS 232 TTL Signals RS 232 Interface RTC RTC Interrupt RTC_CLKOUT SDRAM Bus Width 22 23 31 Capacity SDRAM Interface Second CAN Interface Second Serial Interface Serial Interfaces Serial Memory SMT Con
57. licable Carrier Board part number PCM 973 the Backup U Boot loader can be started by closing Jumper JP3 at position 1 2 42 PHYTEC Messtechnik GmbH L 678e_4 Flash 16MByte 4 0000 U Boot low Sector 1 U Boot low Sector 0 0000 EEPROM 4kByte OxFE04 0000 OxOFFF environment Figure 10 U Boot Memory The U Boot Boot Loader RAM 64MByte 0 0400 0000 U Boot is working from here 0 03 0000 5 counting down 0X0000 3000 Trap table 0X0000 0100 0X0000 0000 PHYTEC Messtechnik GmbH L 678e 4 43 phyCORE MPC5200B tiny 9 3 Modifying the U Boot Loader Changing the U Boot should always be compared to recompiling the program code and updating the Flash contents A detailed description of each individual step would by far exceed the scope of this Hardware Manual Please refer to the Application Note Configuring and Updating the Boot Loader document number 044 for more details 44 PHYTEC Messtechnik GmbH L 678e 4 Technical Specifications 10 JTAG Interface The 5200 CPU provides a JTAG interface for connecting to debuggers emulators and boundary scan The JTAG interface signals extend to the module s phyCORE connector Furthermore there is an on board JTAG connector X2 located at the edge of the module which has the standard COP Interface pinout but uses a 2 0 mm pin pitch instead of 2 54 mm The connector
58. mit X1C36 output signal ETH _LEDO Link activity LED output X1C33 H LED off no link L LED on link toggle LED toggle activity ETH _LED1 Speed LED output X1C34 H LED off 10BT L LED on 100BT ETH_LED3 Collision LED output X1C41 H LED off collision L LED on collisions Table 9 Signal Definition PHY Ethernet Port U2 8 2 2 MAC Address In a computer network such as a local area network LAN the MAC Media Access Control address is a unique computer hardware number For a connection to the Internet a table is used to convert the assigned IP number to the hardware s MAC address In order to guarantee that the MAC address is unique all addresses are managed in a central location PHYTEC has acquired a pool of MAC addresses MAC address of the phyCORE MPC5200B is located on the bar code sticker attached to the module This number is a 12 position HEX value PHYTEC Messtechnik GmbH L 678e_4 37 phyCORE MPCS200B tiny 8 3 USB 1 1 Host Interface The MPC5200B integrates a USB 1 1 compliant host interface with two ports This interface supports full speed 12 Mbit s transmission rates The USB 1 1 controller is integrated 5200 processor The physical layer transceiver unit must be connected externally it is not populated on the phyCORE module For additional information of the USB 1 1 controller refer to the MPC5200B Reference Manual as well as the USB 1 1 bus speci
59. nector Socket P3A First RS 232 21 Socket P3B Second RS 232 Solder Jumpers SPEED LED SPI MOSI SRAM Start up Configuration Supply Voltage System Memory System Start Up Configuration Technical Specifications I11 por ES 97 Full Speed JSB 1 1 JSB Host SB Host Interface JSB1 1 Interface Voltage Supervision Voltage Supervisor WM9712 X10 X11 X2 4 X8 22 23 21 31 38 PHYTEC Messtechnik GmbH L 678e_4 95 phyCORE MPC5200B tiny A Appendix A 1 Release Notes The following section contains information about deviations to the description in this manual Revisions to previous manuals are also listed 18 Jan 2006 ManualL 678e O First draft Preliminary documentation PCM 030 phyCORE MPC5200B tiny in Prototype state 1245 0 PCM 997 V2 1179 5 6 05 Sep 2006 Manual L 678e 1 Second draft Preliminary documentation PCM 030 phyCORE MPC5200B tiny in Prototype state PCB 1245 1 New Ethernet signals added PCM 997 V2 New U Boot section started still under construction PCB 1179 5 06 Dec 2006 Manual L 678e 2 First Release PCM 030 U Boot section finished PCB 1245 1 PCM 997 V2 1179 5 26 Manual L 678e 3 Second Release September 030 Development Board Section changed to new Board 2007 PCB 1245 2 PCM 973 PCB 1260 1 96 PHYTEC Messtechnik GmbH L 678e 4 Suggestions for
60. ntents Table 21 JP14 JP15 AC97 Audio Interface Configuration 73 Table 22 J3 JP11 Card Interface Configuration 74 Table 23 Misc Configuration Jumpers JP10 JP12 76 Table 24 FPGA JTAG Connector X8 Pin Assignment 76 Table 25 Pin Assignment Data Address Bus for the phyCORE 5200 tiny Carrier Board Expansion Board 19 Table 26 Pin Assignment Dedicated LocalPlus Control Signals phyCORE MPC5200B tiny Carrier Board Expansion Board80 Table 27 Pin Assignment PCI dedicated signals phyCORE MPC5200B tiny Carrier Board Expansion Board 81 Table 28 Pin Assignment Dedicated ATA IDE Interface Signals phyCORE MPC5200B tiny Carrier Board Expansion Board82 Table 29 Pin Assignment Interfaces for the phyCORE MPC5200B tiny Carrier Board Expansion Board esses 84 Table 30 Pin Assignment COP Interface Signals for the phyCORE MPC5200B tiny Carrier Board Expansion Board 84 Table 31 Pin Assignment Misc Control Signals for the phyCORE MPC5200B Carrier Board Expansion Board 86 Table 32 Pin Assignment FPGA Signals for the phyCORE MPC5200B tiny Carrier Board Expansion Board 90 Table 33 Pin Assignment Power Supply for the phyCORE MPC5200B tiny Carrier Boar
61. ny on the Carrier Board Signal phyCORE Module Expansion Patch Field Bus ARQ 0 4A 4A X15 1 ARQ 1 2B 2B X12 1 ARQ 2 3B 3B X13 1 ARQ 3 3A 3A X14 1 Timer2 12D 12D X4 4 Timer3 13D 13D X6 4 Timer4 29C 61C X2 16 Timer5 30C 44C X7 II 44 60C X8 15 Timer7 43D 36 17 9 RESIN 10D 10D X2 4 HReset 11C 11C X9 2 SReset 10C 10C 9 1 PWR_Good 7D 7 1 FL_WP 9C X8 2 GPIO7 11D 11D X3 4 RTC_CLKOUT 1B 1B 11 1 IRORTC 33D 33D 6 9 5 2 4 43 43 5 11 ETH_TXD3 33A 58D X6 15 ETH_TXD2 59C X7 15 TXDI 8 60D X9 15 ETH TXDO 61D X3 16 RXD3 51C X2 14 ETH RXD2 52D 4 14 ETH RXDI 33B 53C X5 14 ETH RXDO 54C 7 14 ETH_CRS 50D X9 12 ETH_RXERR 51D X3 14 ETH_TXCLK 53D X6 14 ETH_RXCLK 55D X9 14 ETH_MDIO 56D X3 15 ETH_MDC 57D 4 15 62 4 16 PHYTEC Messtechnik GmbH L 678e 4 85 5200 ETH_TXERR 58C X5 15 ETH_RXDV 56C X2 15 ETH_COL 55C 8 14 Test Sel 1 32B 35A X16 9 NWAYEN 41 30C X8 7 ETH_DUPLEX 29C X7 7 WDI 8D 7 2 WDO 8C 8 1 Table 31 Assignment Misc Control Signals for the phyCORE MPC5200B tiny Carrier Board Expansion Board 86 PHYTEC Messtechnik GmbH L 678e 4 Carrier Board The phyCORE MPC5200B tiny on the
62. of the Programmable LED 70 PHYTEC Messtechnik GmbH L 678e_4 Carrier Board The phyCORE MPC5200B tiny on the 14 3 7 Ethernet Interface P1A The Ethernet interface of the phyCORE MPC5200B tiny is accessible at RJA5 connector PIA on the Carrier Board Due to its characteristics this interface is hard wired and can not be configured via jumpers The LEDs for LINK and SPEED indication are integrated in the connector Two additional LEDs at D19 and D20 are provided to allow display of other Ethernet transmission states These LEDs can be used to indicate transmission type and possible collisions that may occur on the Ethernet network Jumpers JP8 JP9 allow configuration of additional Ethernet PHY interface signals The following configuration options are possible Jumper Setting Description JP8 open ETH INT from PHY on the phyCORE MPC5200B tiny not connected closed ETH INT from PHY on the phyCORE MPC5200B tiny connected to on the phyCORE module JP9 open PHY transceiver ETH_PD input on the phyCORE 5200 tiny not connected 1 2 PHY transceiver ETH_PD input on phyCORE MPC5200B tiny connected to SPI_MISO signal on the phyCORE module 2 3 PHY transceiver ETH_PD input on the phyCORE 5200 tiny connected to GPIO7 signal on the phyCORE module Table 19 8 JP9 Ethernet Interface Configuration PHYTEC Messtechnik GmbH L 678e_4 71
63. ottom Side phyCORE MPC5200B tiny Standard Version 20 PHYTEC Messtechnik GmbH L 678e 4 Jumpers The jumpers J solder jumper have the following functions Jumper Def Comment ault J1 J2 II and J2 disconnect the receive lines UART3 RXD TTL and UART6 RXD TTL of the MPC5200B PSC3 and PSC6 from the RS 232 transceiver at U3 This makes the controller s TTL signals available at pins X1D16 UART3 RXD TTL and X1C19 UART6 RXD TTL This is useful for instance for optical isolation of the RS 232 interface The UART receive signals UART3 RAD TTL UART6 RAD TTL are disconnected from RS 232 transceiver closed X The receive signals UART3 RAD TTL UART6 RXD TTL are connected to the on board RS 232 transceiver Package Type OR in SMD 0805 J3 J3 connects pin 7 of the serial memory at U4 to 3V3 On many memory devices pin 7 enables the activation of a write protect function It is not guaranteed that the standard serial memory populating the phyCORE MPC5200B tiny will have this write protection function Please refer to the corresponding memory data sheet for more detailed information PackageType OR in SMD 0805 J4 J5 J6 J4 J5 and J6 define the slave addresses A0 A1 and A2 of the serial memory U4 on the I C2 bus In the high nibble of the address memory devices have the slave ID OxA The low nibble consists of A2 Al AO
64. ower down ET_NWAYEN Collision LED H no collision JTAG Interface COP_TRST JTAG reset input Via logic OR connected to PORRESET resulting in CPU_TRST signal CK STOP Scan enable clock stop PSC2 4 O Freely available GPIO with wakeup function Timer 6 signal of the MPC5200B USBI Host 45C 5 1 OVRCRNT I Over current 46C USB1_SUSPEND Suspend 48C USB1_RXN I Receive negative 49C USB1_TXN Transmit negative 50C USB1_OE Output enable 16 PHYTEC Messtechnik GmbH L 678e_4 Pin Description PinRowXID 1D 2D Supply voltage 3 3 VDC 9D 14 GND Ground 0 19D 24D 29D 34D 39D 44D 49D 4D 5D XX _ 5 SRAM supply voltage is generated by VBAT or 3V3 using a battery backup circuit MAX6364 VCC SRAM serves as supply voltage for the Real Time Clock 7D RESOUT NEH Reset output of the voltage supervisor circuit PHY Reset A low on this pin forces only the PHY into reset state RESIN Reset input signal of the 5200 tiny It could be asserted via connection to a reset push button Signal connected to 3V3 via 10 kOhm pull up resistor 13D Timer3 Timer 3 signal of the MPC5200 eos 15D AC97_SDATA_OUT Receiver serial data output DD UARBTXDTIL PSC3 transmit data signal _____ 18D 2_ CAN receive of second CAN interface mae 20D I receive o
65. pen drain Command byte enable 1 PCI_RESET PCI CBE 3 CBE 2 IRDY PCI DEVSEL PERR SERR CBE I 12 PHYTEC Messtechnik GmbH L 678e_4 Pin Description vO SS 4B 9B 14B GND Ground 0 V 19B 24B 29B 34B 39B 41B 44B 49B LocalPlus Bus Signals Chip Select 2 Chip Select 3 Output Enable Acknowledge Chip Select 5 Chip Select 7 PSC3 is UART3 LocalPlus Address Data Signals Test_Sel_1 Input in CPU production test Can be configured as LocalPlus Bus TSIZ bit Refer to section 7 3 2 1 1 in the MPC5200 controller User s Manual ETH RXDI Already used by the interface between CPU and Ethernet PHY Can be used as J1850 RX signal if the PHY is not populated or in isolation mode ATA Interface Signals ATA DRQ ATA DMA request ATA IOW ATA write ATA Isolation ATA write enable for PCI bus sharing ATA DACK ATA DMA acknowledge PHYTEC Messtechnik GmbH L 678e 4 13 5200 Dedicated PCI Signals PCI_CLOCK PCI and external peripheral clock PCI bus request PCI_IDSEL Initial device select PCI FRAME Frame start TRDY Target ready STOP Transition stop PCI PAR Bus parity PCI CBE 0 Command byte enable 0 14 PHYTEC Messtechnik GmbH L 678e 4 Pin Description Pin X
66. pt with the phyCORE MPC5200B tiny esee 56 Figure 15 Location of Connectors on the phyCORE MPC 5200B tiny Carrer Board 58 Figure 16 Numbering of Jumper 60 Figure 17 Location of the Jumpers View of the Component Side 61 Figure 18 Default Jumper Settings of the phyCORE Development Board 5200 tiny with phyCORE MPC5200B tiny 62 Figure 19 Connecting the Supply Voltage at 63 Figure 20 Pin Assignment of the DB 9 Socket P3A as RS 232 PSC3 Front V 16 64 Figure 21 Pin Assignment of DB 9 Socket P3B as Second RS 232 Front 65 PHYTEC Messtechnik GmbH L 678e 4 5200 Figure 22 Pin Assignment of the DB 9 Plug 2 CAN Transceiver 66 Figure 23 Pin Assignment of DB 9 Plug P2B CAN Transceiver C amer Board _ _ _ 68 Figure 24 Pin Assignment Scheme of the Expansion 78 Figure 25 Pin Assignment Scheme of the Patch Field 78 Table 1 Default Port Configuration 9 Table2 Pinout of the phyCORE Connector 18 Table 3 ree ace Dd 22 Table 4 System Start Up Configuration 26
67. rs program execution to this address As a result U Boot now runs out of RAM which allows for reprogramming itself in Flash firmware update So called environment variables are used to configure U Boot Such variables define the IP number as well as the MAC address using Ethernet configuration as example The variables are saved in the module s EEPROM 04 and occupy the first 2 kByte When using the RAM memory care should be taken to not overwrite the U Boot code as well as the trap table which is located in the lower portion of the RAM Among other factors the size of the U Boot stack determines how much memory at the upper end of the RAM memory range is occupied by U Boot As U Boot is used the stack size is growing and more memory space is required It is recommended to reserve a sufficient RAM portion to be used for the stack beginning at the stack start address PHYTEC Messtechnik GmbH L 678e 4 41 5200 9 2 1 The Backup U Boot In the event the original U Boot at address OxFFFO 0000 becomes corrupted e g by overwriting the loader with a wrong version a second U Boot loader at address OxFFOO 0000 is available as an emergency backup version providing the same functionality as the original copy This backup U Boot can be started by connecting a 4 7 kOhm pull down resistor at pin X1 8C during a hardware reset cycle Note When using the phyCORE MPC5200B tiny in conjunction with the app
68. time calculation is 2 WS tpcicx 8 5 ns To support all memory speed grades up to 85 ns at least 2 wait states must be added for CSO e 2 wait state and 1 dead cycle for CSO supports 33 MHz PCI clock e 5 wait states and 2 dead cycles for CSO supports 66 MHz PCI clock No additional voltages are needed for in system programming As of the printing of this manual Flash devices generally guarantee at least 100 000 erase programming cycles Refer to the applicable INTEL data sheet for detailed description of the erasing and programming procedure PHYTEC Messtechnik GmbH L 678e_4 29 5200 6 2 DDR SDRAM The phyCORE MPC5200B tiny is equipped with fast Double Data Rate Synchronous Dynamic Random Access Memory DDR SDRAM devices This memory is connected to a dedicated SDRAM interface provided by the MPC5200B processor The DDR SDRAM memory bank consist of two 16 bit data port devices connected in parallel to support the 32 bit bus width of the processor The memory bank is controlled by Chip Select signal 50 50 of the processor s DDR SDRAM controller Table 6 shows all possible memory configurations Available Capacity Device Organization Devices two 32 MByte 128 MBit MT46V8M16 2 MBit x 16 x 4 banks TSOP66 packaging 64 MByte 256 MBit MT46V16M16 4 MBit x 16 x 4 banks TSOP66 packaging 128 MByte 512 MBit MT46V32M16 8 MBit x 16 x 4 banks TSOP66 packaging
69. tings as shown in Figure 18 and enable alternative or additional functions on phyCORE MPC5200B tiny Carrier Board depending on user needs 14 3 1 Power Supply at X6 Caution Only use the included power adapter to supply power to the Carrier Board Do not change modules or jumper settings while the Carrier Board is supplied with power Permissible input voltage 9 14 V DC unregulated The required current load capacity of the power supply depends on the specific configuration of the phyCORE MPC5200B tiny mounted on the Carrier Board as well as whether an optional expansion board is connected to the Carrier Board An adapter with a minimum supply of 1 2 A is recommended Polarity 49 14 VDC Center Hole 2 gt 1200 zi 50 mm 7 GND Figure 19 Connecting the Supply Voltage at X6 No jumper configuration is required in order to supply power to the phyCORE MPC5200B tiny module PHYTEC Messtechnik GmbH L 678e_4 63 5200 14 3 2 First Serial Interface at Socket P3A Socket P3A is the lower socket of the double DB 9 connector at P3 P3A is directly connected to the serial interface PSC3 of the phyCORE MPC5200B tiny The only signal configurable with Jumper JP18 is CTS TTL coming from PSC3 on the MPC5200B Jumper Setting Description JP18 3 4 Signal UART3 CTS is connected to the RS 232 transceiver 1722 on phyCORE MPC5200B tiny Carri
70. tiny on the Carrier Board 14 3 12 PCI Card Slot X4 The phyCORE MPC5200B tiny Carrier Board provides a 3 3V PCI interface connector at X4 All common 3 3V PCI insert cards can be used in this slot allowing the user to add additional interface features to this hardware platform Configuration of the PCI interface via jumpers is not necessary Only the required interrupt sources can be configured via SMD resistors Resistors R95 R98 on the Carrier Board connect the available interrupts Only R95 is placed as the default configuration connecting PCI INTA with 0 Additional interrupt sources can be made available by adding the corresponding resistor on the Carrier Board Note The current draw of the PCI application in combination with the power consumption of all other circuitry used at the same time must not exceed the allowed maximum current draw for the phyCORE MPC5200B tiny and Carrier Board hardware combination PHYTEC Messtechnik GmbH L 678e_4 75 5200 14 3 13 Misc Configuration Jumpers Carrier Board The following table describes additional jumpers provided for configuration of the Carrier Board or the phyCORE MPC5200B tiny operated on it Jumper Setting Description JP3 open Default Boot configuration of the connected phyCORE 5200 tiny will be used 1 2 Bootconfiguration of the inserted phyCORE MPC5200B tiny will be overwritten by
71. ule Jumper Setting Description 1 4 CANI TX signal not connected to transceiver CAN communication possible JP5 open CANI RX signal not connected to transceiver no CAN communication possible Table 15 Improper Jumper Settings for the CAN Plug P2A CAN Transceiver on the Carrier Board PHYTEC Messtechnik GmbH L 678e 4 67 5200 14 3 5 Second CAN Interface at Plug P2B Plug P2B is the upper plug of the double DB 9 connector at P2 P2B is connected to the second CAN interface CAN2 of the phyCORE MPC5200B tiny via jumpers There are no CAN transceivers available on the phyCORE MPC5200B tiny therefore the transceivers on the Carrier Board must be used Depending on the configuration of the CAN transceivers and their power supply the following configuration is possible 1 CAN signals generated by the Carrier Board CAN transceiver U10 extend to connector P2B with galvanic separation Jumper Setting Description JP6 closed Input at opto coupler US on the Carrier Board connected to CAN2 TX signal from the phyCORE MPC5200B tiny JP7 closed Output at opto coupler U6 on the Carrier Board connected to CAN2 signal of the phyCORE 5200 tiny Table 16 Jumper Configuration for CAN Plug P2B using the CAN Transceiver on the Carrier Board Pin 3 GND Carrier Board Ground Pin 7 CAN 2 no galvanic separation Pin 2 CAN L
72. us collision PHYTEC Messtechnik GmbH L 678e_4 31 5200 Serial Memory I7C Address 1 0 1 0 A2 Al 0 R W OxA J5 14 Figure 9 Serial Memory Slave Address Possible configuration options are shown below Address J4 J5 J6 A0 A1 A2 0 0 1 243 1 2 2 3 4 5 2 3 2 3 2 3 8 0 9 2 3 1 2 1 2 OxAC OxAD 24 3 2 3 1 2 Table 8 Serial Memory Address Examples Address lines Al and A2 are not always made available with certain serial memory types This should be noted when configuring the bus slave address 32 PHYTEC Messtechnik GmbH L 678e_4 Real Time Clock 7 Real Time Clock RTC 8564 U5 For real time or time driven applications the phyCORE MPC5200B tiny is equipped with a RTC 8564 Real Time Clock at U5 This RTC device provides the following features Serial input output bus address 2 Power consumption Bus active 400 kHz 1 mA Bus inactive CLKOUT inactive lt I Clock function with four year calendar Century bit for year 2000 compliance Universal timer with alarm and overflow indication 24 hour format Automatic word address incrementing Programmable alarm timer and interrupt functions The Real Time Clock is programmed via the IC bus address OxA2 Since the MPC5200B is equipped with internal controller the protocol is pro
73. user In contrast signals that are used the phyCORE MPC5200 tiny as listed in Table 1 can only be used if a special module configuration was purchased e g SBC version without on board RS 232 transceivers Please contact PHYTEC for more details Note The following sections of this manual assume use of the port pins according to configuration listed in Table CPU Function Port_conf Used on Port Register Bits phyCORE SBC PSCI 97 1 01x 29 31 No PSC2 CAN 1 2 001 25 27 No PSC3 UART3 SPI 1100 20 23 Yes USB USB 01 18 19 No Ethernet Ethernet w MD 0101 12 15 Yes Timer ATA CS 00 11 2 3 6 7 No Dc I2C1 12C2 default Yes 12 1 available PSC6 UART6 101 9 11 Yes Table Default Port Configuration PHYTEC Messtechnik GmbH L 678e 4 9 5200 As Figure 4 indicates all controller signals extend to surface mount technology SMT connectors 0 635 mm lining two sides of the module referred to as phyCORE connector refer to section 2 This allows the phyCORE MPC5200B tiny to be plugged into any target application like a big chip 1 1 1 50 50 Figure 4 Pinout of Othe phyCORE MPC5200B Bottom View gt __ X1 Table 2 provides overview of the pinout of the connector Please refer to the Freescale MPC5200B User Manual Data Sheet for det
74. www molex com PHYTEC Messtechnik GmbH L 678e_4 51 phyCORE MPC5200B tiny 52 PHYTEC Messtechnik GmbH L 678e 4 Hints for Handling the Module 13 Hints for Handling the Module Modifications the phy CORE Module Removal of various components such as the microcontroller and the standard quartz is not advisable given the compact nature of the module Should this nonetheless be necessary please ensure that the board as well as surrounding components and sockets remain undamaged while de soldering Overheating the board can cause the solder pads to loosen rendering the module inoperable Carefully heat neighboring connections in pairs After a few alternations components can be removed with the solder iron tip Alternatively a hot air gun can be used to heat and loosen the bonds Caution If any modifications to the module are performed regardless of their nature the manufacturer guarantee is voided e Integrating phyCORE MPC5200B tiny into a Target Application Successful integration in user target circuitry greatly depends on the adherence to the layout design rules for the GND connections of the phyCORE module For best results we recommend using a carrier board design with a full GND layer It is important to make sure that the GND pins that have neighboring signals which are used in the application circuitry are connected Just for the power supply of the module at least 6 GND pins that are located rig
75. ycles During PORRESET or HRESET the reset configuration word is sampled to establish the initial state of various vital internal MPC5200B functions reset configuration word is latched internally when PORRESET or HRESET is released AC97 Codec Signals PSC1 13C AC97_1_RES Reset signal to the external AC97 device 14C AC97_1_SYNC Frame sync start of frame SOF I I 15C AC97_1_BITCLK Driven by the external serial bit clock 16C AC97_1_SDATA_IN Receiver serial data input 18C CAN2_TX CAN transmit output of the second CAN interface PSC2 UART6 RXD TTL I PSC6 receive data signal UART6 TXD TTL 9506 transmit data signal PHYTEC Messtechnik GmbH L 678e 4 15 5200 Signal 21C RXD6_232 RxD input on the RS 232 transceiver for the MPC UART PSC6 23C TXD6_232 TxD output on the RS 232 transceiver for the MPC UART PSC6 AC UART6 RTS TTL I request to send signal UART6 CTS TTL PCS6 clear to send signal Second I2C Interface 26C I2C2 CLK Clock SCL 28C I2C2 IO IO Data SDA 29 Timer4 Timer 4 signal of the MPC5200B 30C Timer5 Timer 5 signal of the MPC5200B 0 10 100MBit TP Ethernet Interface if board PHY is not populated pins are NC ETH_LINK Link Activity LED L link toggle act ETH_SPEED Speed LED H 10 Mbit s L 100 Mbit s ETH_RX Differential receive input ETH_TX Differential transmit output ETH_PD P
76. zation technology for integration into their own design The 5200 tiny is subminiature 53 x 57 mm insert ready Single Board Computer populated with Freescale s PowerPC 5200 microcontroller Its universal design enables its insertion in a wide range of embedded applications All controller signals and ports extend from the controller to high density 0 635 mm Molex pin header connectors aligning two sides of the board allowing it to be plugged like a big chip into a target application PHYTEC Messtechnik GmbH L 678e 4 3 5200 Precise specifications for the controller populating the board be found in the applicable controller User s Manual or Data Sheet The descriptions in this manual are based on the MPC5200B controller No description of compatible microcontroller derivative functions is included as such functions are not relevant for the basic functioning of the phyCORE MPC5200B tiny The phyCORE MPC5200B tiny offers the following features Single Board Computer in subminiature form factor 53 x 57 mm according to phyCORE specifications all applicable controller and other logic signals extend to two high density 100 pin Molex connectors processor Freescale embedded PowerPC MPC5200B single 3 3 V max 1 2 A supply voltage Internal Features of the MPC5200B e300 core 760 MIPS at 400 MHz 40 to 85 C 16 k instruction cache 16 k data cac

phyCORE-MPC5200 (HW), Englisch

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