Logic state analyzer with time and event count measurement
Contents
1. 410 8 420 SYSTE 250 INPUT DATA STATES FIGURE 4 445 192 pP 80 FORMAT LOGIC DISPLAY DATA FILE CHARACTER OR GRAPHIC DISPLAY CONTROLLER MODULE 00 4 445 192 1 STATE ANALYZER WITH TIME AND EVENT COUNT MEASUREMENT BETWEEN STATES REFERENCE TO RELATED APPLICATIONS This application is a division of an earlier filed co pending application Ser No 210 462 filed on Nov 25 1980 by George H Haag et al and amended to be entitled LOGIC STATE ANALYZER WITH STOR AGE QUALIFICATION now U S No 4 373 193 That application was a continuation of appli cation Ser No 75 787 entitled LOGIC STATE ANA LYZER filed Sept 17 1979 by the same inventors and which is now abandoned That application was in turn a division of a now abandoned application of the same inventors and title Ser No 828 138 filed on Aug 29 1977 The subject matter of the present application is re lated to the subject disclosed in U S Pat No 4 040 025 issued to Justin S Morrill Jr on Aug 2 1977 and which was filed on Mar 31 1976 The subject matter of the present application is also related to the subject disclosed in U S Pat No 4 100 532 issued to William A Farnbach on July 11 1978 and which was filed on Nov 19 1976 U S Pat Nos 4 040 025 and 4 100 532 to Morrill et al and Farnbach respectively are hereby expressly incorporated by reference BACKGROUND AND SUMMARY Logic state anal2. COMPARED TRACE OR PRINT IN PROCESS CLOCK SLOPE 4 445 192 12 APPENDIX B DETAILED FIELD S DESCRIPTION EXAMPLES CLOCK SLOPE 4 CLOCK SLOPE PURPOSE TO SELECT THE CLOCK TRANSITION USED TO STROBE POD DATA INTO THE 1610A LABEL ASSIGNMENT AND ACTIVE CHANNELS EXAMPLE PURPOSE COMMENT POD4 POD3 POD2 001 7 0 7 AAAAAAAA DDDDDDDD XXXXXXXF 1444 44 555555 ACTIVE CHANNELS TO ASSIGN LABELS A B C D E OR F TO ANY NUMBER OF CONTINUOUS CHANNELS INDEPENDENT OF POD BOUNDARIES IN THE ABOVE EXAMPLE THE LABEL A IS ASSIGNED TO 16 BITS OF POD3 AND 004 AND MAY REPRESENT A 16 BIT ADDRESS LABEL D IS ASSIGNED 8 BITS ON POD2 AND MAY REPRESENT AN 8 BIT DATA BUS LABEL F IS A SINGLE BIT QUALIFIER READ MRITE AND IS ASSIGNED TO THE LEAST SIGNIFICANT BIT ON POD ANY UNUSED CHANNELS MAY BE TURNED OFF BY PUTTING AN X IN THOSE CHANNELS AS MANY AS SIX LABELS OR AS FEW AS ONE MAY BE ASSIGNED ACROSS THE 32 CHANNELS IF A LABEL IS SPLIT SUCH AS AABBBAAA LABEL IS NOT CONTINUOUS THEN AN ERROR MESSAGE ERROR SPLIT LABEL IS DISPLAYED AND THE CURSOR IS LOCKED TO THE LABEL ASSIGNMENT FIELDS UNTIL THE ERROR IS CORRECTED PRESSING THE DEFAULT KEY MILL ASSIGN LABEL F TO ALL 32 CHANNELS ACTIVE CHANNELS ARE SHOWN BY MARKS FOR EACH ASSIGNED CHANNEL ABSENCE OF INDICATES LOW CHANNEL BIT ACTIVITY AND IS GOOD INDICATOR THAT A POD CLIP MAY H
3. TIME IS SELECTED A COUNT VALUE OF TIME IS STORED FOR EACH POD DATA STATE STORED IN MEMORY THE RESULTANT TIME DATA IS DISPLAYED IN THE TRACE LIST FOR THE NEXT TRACE MEASUREMENT 4 445 192 17 18 APPENDIX B DETAILED FIELD S DESCRIPTION CONT D STATE COUNT OR TIME ABS REL EXAMPLE LABEL A STATE COUNT BASE HEX DEC ABS SEQUENCE 10 1043 SEQUENCE 20 1033 SEQUENCE 30 1023 START 40 0 01 60 20 02 0 30 03 n 3 LABEL A STATE COUNT BASE HEX DEC REL SEQUENCE 10 SEQUENCE 20 10 SEQUENCE 30 20 START 40 1023 01 60 20 402 70 10 103 71 1 LABEL 5 DEC ABS SEQUENCE 10 208 3 US SEQUENCE 20 200 2 US SEQUENCE 30 185 1 US START 40 0 US 01 60 80 0 US 02 70 120 9 5 03 71 122 5 PURPOSE TRACE LIST AND SELECT ABS OR REL FOR THE STATE COUNT OR TIME DATA COMMENTS WHEN ABSOLUTE ABS IS SELECTED THEN EACH STATE COUNT OR TIME IS DISPLAYED IN ABSOLUTE VALUES WITH RESPECT TO THE START STATE 40 ALL STATES BEFORE THE START STATE 40 ARE SHOWN COUNT VALUES START STATE 40 IS SHOWN AS ALWAYS 0 ALL STATES SHOWN AFTER THE START STATE 40 ARE SHOWN WITH COUNT VALUES WHEN RELATIVE REL IS SELECTED THEN EACH STATE COUNT OR TIME IS DISPLAYED SHOWING COUNT VALUES RELATIVE TO THE PREVIOUS STATE COUNT VALUE VALID WITHOUT SIGN 4 445 192 19 20 APPENDIX DETAILED FIELD S DESCRIPTION CONT D
4. state or event of interest and the counter records the number of times that state occurs between the stored states of the trace In both cases the values of the times or event counts are stored as part of the trace and are displayed in correlated relation to the state data therein 6 Claims 16 Drawing Figures TO PROBES ENABLE 8 TRIGGER OUTPUTS 0 5 Patent 24 1984 Sheet 1 of 13 4 445 192 SSN dele FORMAT SPECIFICAT ON TRACE COMPLETE ______________________ 3 POD POD4 POD2 PODI PROBE 7 0 7 0 7 2 7 LABEL ASSIGNMENT 60000900 8 0 ACTIVE CHANNELS LABEL D F LOGIC POLARITY DESIGNATES SELECTABLE en E BBD FIGURE 1 SPECIFICATION TRACE COMPLETE _________________ ___ LABEL BASE SEQ RESTART TRA ONLY STATE GE J 09991 COUNT ESTATE xx FIGURE 2 TRACE 5 LABEL A D F STATE COUNT BASE HEX HEX HEX DEC SEQUENCE 3CF 5D SEQUENCE 3E2 2 9 2 SEQUENCE E I 6 6 5 START O3E3 82 6 61 _ 03E3 El 0 62 3E 3 E5 g I 03 Q3E4 82 04 3E4 03 I 65 5 4 47 6 I 526 A2 I 07 10 9 1 208 50 b I 99 2383
5. GRAPHED LABEL EXAMPLE GRAPHED LABEL GRAPHED LABEL F PURPOSE TO SELECT A DEFINED LABEL A B C D E OR TO BE GRAPHED UPPER LOWER LIMITS EXAMPLE UPPER LIMIT 177 LOWER LIMIT 000 PURPOSE TO CHANGE THE UPPER OR LOWER GRAPH LIMITS COMMENT GRAPH LIMITS MAY BE CHANGED USING ENTRY KEYS OR THE LIMITS MAY BE AUTOMATICALLY INCREMENTED OR DECREMENTED USING THE INCR OR DECR KEYS IN THE EDIT BLOCK THE UPPER LIMIT MUST BE GREATER THAN LOWER LIMIT OR ELSE AN ERROR OVERLAPPING LIMITS IS DISPLAYED IN PLACE OF THE GRAPH WHICH IS NOT DISPLAYED COMPARED TRACE MODE EXAMPLE LABEL A COMPARED BASE HEX TRACE MODE OFF SEQUENCE 00 SEQUENCE 00 SEQUENCE 00 START 00 01 30 02 00 PURPOSE TO SHOW THE EXCLUSIVE OR OF CURRENT DATA WITH STORED DATA ALL ZEROS IMPLIES THAT THE SAME DATA IS IN BOTH FILES WHILE ANYTHING ELSE 30 SHOWS DATA STATES IN THE TWO TRACES WHICH ARE NOT EQUAL BITS 4 AND 5 ASSUMING THAT THE LSB IS BIT 0 EXAMPLE LABEL A COMPARED BASE HEX TRACE MODE STOP LABEL A COMPARED BASE HEX TRACE MODE STOP 4 445 192 21 22 APPENDIX B DETAILED FIELD S DESCRIPTION CONT D PURPOSE SELECT THE COMPARED TRACE MODE TO BE STOP WHEN EQUAL STOP OR STOP WHEN NOT EQUAL STOP COMMENTS WHEN STOP IS CHOSEN THE MEASUREMENT IS TRACED REPEATEDLY UNTIL THE VALID CURRENT DATA EQUALS THE VALID STORED DATA THE STATUS OF INSTRUMENT WILL BE COMPARED TRACE FAILED WHICH
6. MEANS THAT THE CURRENT DATA DOES NOT EQUAL THE STORED DATA THE 1610A THEN TRACES AGAIN SHOWING COMPARED TRACE IN PROCESS AND COMPARES ANOTHER SET OF TRACE DATA CONTINUES UNTIL THE STATUS IS THIS PROCESS COMPARED TRACE COMPLETE WHICH MEANS THE VALID CURRENT FILE TRACE DATA EQUALS THE VALID STORED FILE TRACE DATA A SIMILAR OPERATION EXISTS FOR STOP EXCEPT ITS MEASUREMENT CONTINUES UNTIL FILES DO NOT COMPARE NOTE THIS IS NOT A REAL TIME MEASUREMENT BUT RATHER SAMPLED COMPARED MODE THAT 15 DEPENDENT IN PART UPON DATA CLOCK RATES AND TRACE SPECIFICATION THIS MEASUREMENT MODE MUST BE TURNED OFF TO OBTAIN THE SINGLE OR CONTINUOUS TRACE MODES What is claimed is 1 Apparatus for selecting storing and displaying a set of states occurring in a collection of digital signals the apparatus comprising input means coupled to receive the collection of digi tal signals for performing signal conditioning thereon according to preselected thresholds to produce a collection of conditioned signals trace specification means for specifying state condi tions in the collection of digital signals according to which the set of states to be stored and displayed is selected from among the states occurring in the collection of digital signals recognition means coupled to the collection of condi tioned signals and responsive to the trace specifica tion means for producing control signals indicative of whether or
7. not a state is to be stored timer means for producing a collection of digital time signals indicative of the passage of time storage means coupled to the collections of condi tioned signals and digital time signals and to the control signals for storing the set of states selected by the trace specification means and also for stor ing a time associated with each such selected state display means coupled to the storage means for dis playing the set of stored states in correlated rela tion with their associated times 45 55 2 Apparatus as in claim 1 wherein the displayed times represent values on a single absolute time scale having its origin not later than the first state selected for storage in the storage means 3 Apparatus as in claim 1 wherein the displayed times represent the elapsed time intervals between the storage of each stored state and the storage of its prede cessor 4 Apparatus for selecting storing and displaying a set of states occurring in a collection of digital signals the apparatus comprising input means coupled to receive the collection of digi tal signals for performing signal conditioning thereon according to preselected thresholds to produce a collection of conditioned signals trace specification means for specifying state condi tions in the collection of digital signals according to which the set of states to be stored and displayed is selected from among the states occurring in the coll
8. segments of branched looped or nested forms of state flow may be directly located by properly defined state sequences In addition each state condition in a state sequence may be required to occur from 1 to 65536 times before the state condition is satis fied This form of positioning will locate the nth pass of a loop beginning at a given state condition Clock delay may be incorporated by defining the nth occurrence of any state an all don t care state specification The trace logic may also be specified to restart the satisfaction of the predefined state sequence if it is not satisfied before or concurrently with the location of a predefined restart state condition A restart on any state requires that the state sequence be satisfied without any unspecified intermediate states For example FIG 2 illustrates the interactive trace specification display for a trace posi tion starting upon the satisfaction of 4 state conditions in sequence restart state condition is also defined The selective trace is a qualification to determine which sampled states will be stored for display One to seven state conditions may be specified for col lection Selectively tracing only sampled states of inter est eliminates the clutter of unneccessary states and magnifies the apparent size of the trace beyond its 64 terms Also an occurrence term may be specified so as to store only every nth satisfaction of an specified state con
9. 002 TINON NOILINSOD3Y 005 508 W3lSAS NOILISINODY lt lt lt 062 831545 NOILISIADIV 00 3 1000N 10910 1 3 3 3 2 380913 7009 508 SNOLLVJINNNNOJ 004 31000NW 8311081 02 AV 18510 5104100 3399181 8 318 3 32012 38054 OL 0021 310408 83 80 38084 1531 3135 008 INOW LNdLNO LNANI QNV YOSS3J0YdQOYDIN 001 QuV084A3 0001 AV1dS10 189 01 Y 5 006 INNON AW1dS10 YILNIUd U S Patent Apr 24 1984 DISTRIBUTED MEMORY 0 yP DATA FILES 800 DISPLAY DATA 1 0 AREA DATA ACQUISITION MEMORY 32 x 64 HI SPEED pP PROGRAM pP PROGRAM NOT USED 1000 1800 IFFF 4000 4 6000 FIGURE 8 Sheet 5 of 13 4 445 192 PHYSICAL LOCATION RAM MEMORY ON DISPL AY T MODULE 9 ACCESS TO PRINTER KEYBOARD AND SELFTEST DISTRIBUTED ON MEASUREMENT CONTROL MODULE 400 ROM MEMORY IN pP AND 1 0 MODULE 800 ROM MEMORY IN pP AND 1 0 MODULE 800 U S Patent 24 1984 Sheet 6 of 13 4 445 192 AND 1 0 MODULE 800 RAM DA DATA TA uP DISPLAY DISPLAY DRIVER MODULE 900 STATE RECOGNITION MODULE 200 ACQUISITION SYSTEM 250 MEASUREMENT CONTROL MODULE 400 FIGURE 9 Sheet 7 of 13 4 445 192 24 1984 U S Patent pore 009 508 SNOILYJINNWWOJ Ol 340914 OS
10. 45 SLIMM ids YILNNOI LNINIUNSVIN 00 2 057 IMNON j 380815 U3ZINOUHONAS SLIG c 1081509 00 ITION 2 553 00 ONY X3ONI 80123135 9 ANINIYNSVIN 9413 1N3A3 2 380815 5 804 993227 055320840821 99143 35 8 005 009 508 1311 INIL 518 W315AS SNOLLVDINNNAOD 11009 5 02 U S Patent Apr 24 1984 Sheet 11 of 13 4 445 192 QUALIFIER STATE CONDITION NTH OCCURRENCE OF THE FIRST QUALIFIER STATE CONDITION NTH OCCURRENCE OF THE SECOND QUALIFIER STATE CONDITION 3 SELECTED DATA STATES ARE WRITTEN INTO MEMORY CONTINUOUSLY IN RESPONSE TO THE DETECTION OF THE NTH OCCURRENCE OF THE NEXT TO THE LAST QUALIFYING STATE CONDITION THE STORAGE LOCATION OF THE SATISFACTION OF THE TRACE SEQUENCE IS IDENTIFIED AND THE DATA STORAGE TERMINATED IN RESPONSE TO THIS EVENT AND THE SELECTED TRACE POSITION START CENTER END FIGURE 14 U S Patent Apr 24 1984 Sheet 12 of 13 4 445 192 LABEL FORMAT FILE LABEL LENGTH A RESIDES IN yP BIT POSITION A DATA FILE LOGIC POLARITY LABEL A CONVERSION A TABLE COLUMN POSITION A SOURCE OF DATA A DESTINATION A LABEL LENGTH B BIT POSITION B LABEL B TABLE LABEL F TABLE FIGURE 15 U S Patent Apr 24 1984 Sheet 13 of 13 KEYBOARD yP 1100 800 FORMAT DEFINITION LABEL ASSIGNMENT RADIX SELECTION CONCATENAT ION DEFINITION ACQUISITION M DATA ACQUISITION MEMORIES
11. AVE FALLEN OFF CHANNEL ACTIVITY IS NOT DISPLAYED WHILE 1610A IS TRACING A POD IS CONNECTED TO THE DATA PORT ON REAR OF 1610A THE CHANNEL ACTIVITY FOR LEAST SIGNIFICANT 2 BITS IS NOT SHOWN DUE TO SYNCHRONOUS 8 BIT COUNT AND 1610A 4 445 192 13 14 APPENDIX B DETAILED FIELD S DESCRIPTION CONT D LOGIC POLARITY EXAMPLE LABEL 0 LOGIC POLARITY PURPOSE SELECT LOGIC POLARITY FOR EACH ASSIGNED LABEL NUMERICAL BASE EXAMPLE LABEL A B F NUMERICAL BASE HEX OCT BIN BIN OCT DEC HEX PURPOSE TO SELECT A NUMERICAL BASE OF HEXIDECIMAL HEX OCTAL OCT DECIMAL DEC OR BINARY BIN FOR EACH ASSIGNED LABEL TRACE POSITION EXAMPLE START 1 TRACE CENTER TRACE END 1 TRACE PURPOSE SELECT WHETHER THE TRACE STARTS IS CENTERED OR ENDS UPON A DESIGNATED STATE WHICH MAY BE CALLED THE TRIGGER STATE ADDITIONALLY THE TRIGGER STATE MAY BE DEFINED TO BE A SPECIFIED NUMBER OF OCCURRENCES OF A DESIGNATED STATE EXAMPLE LABEL A OCCUR BASE HEX DEC FIND IN SEQUENCE 10 00001 THEN 20 00001 THEN 30 00005 START TRACE 40 00001 SEQ RESTART ON 50 COMMENT THIS EXAMPLE HAS THE FOLLOWING MEANING FOR DEFINING TRACE POSITION FIND IN SEQUENCE 00001 OCCURANCE OF STATE 10 THEN THE 00001 OCCURANCE OF STATE 20 THEN THE 00005 OCCURANCE OF STATE 30 AND START TRACE AT 00001 OCCURANCE OF STATE 40 IF DURING THIS SEQUENCE THE RESTART STATE 50 IS ENC
12. CATIONS BUS 600 DISPLAY CONTROLLER MODULE 5 x 10 CRT DISPLAY 1000 11 4 445 192 45 24 1984 d HP A68 11611A Part No 10257 90907 1981 Operating and Service Manual Supplement 1611A A60 6800 Microprocessors Hewlett Packar d Part No 10258 90905 8 80 Service Manual Logic State Analyzer 16 11A Hewlett Packard Part No 01611 90909 Jul 1980 Primary Examiner Harvey E Springborn Attorney Agent or Firm Edward L Miller 57 ABSTRACT A logic state analyzer monitors the ongoing succession of states occurring in a collection of digital signals and stores in a memory either all such states or a selected subset thereof meeting certain qualification criteria The oldest stored states are overwritten as the newest states are stored Upon recognition of some trigger condition the logic state analyzer will subsequently store a prese lected number of additional states the collectivity of which may be termed the captured trace The utility of such a trace in a logic state analyzer is enhanced by equipping the analyzer with a counting mechanism selectively responsive to a high speed clock signal or a programmable state detector In the former case the counter operates as a timer whose value may represent either the elapsed time between consecutive states in the trace or between each state in the trace and an origin along a time axis In the latter case the user identifies a
13. CE 5D 0 ies S I 16 3CE 44 g 11 93 2 2 12 2 0 1 13 03 2 6 0 I 14 c6 15 82 e l 16 0 1 FIGURE 3 U S Patent 24 1984 Sheet 2 of 13 4 445 192 GRAPHED LABEL LABEL BASE HEX HA HHH HHH HHH HHH HHH HHH LOWER LIMIT OOO ho FIGURE 4 TRACE COMPARE COMPARED TRACE COMPLETE _ LABEL A D F COMPARED BASE HEX HEX BIN TRACE MODE 5 SEQUENCE 0000 00 0 SEQUENCE 0000 6 SEQUENCE 0000 og 9 START 0090 06 g 01 0000 00 0 102 0004 09 9 3 00909 06 0 4 00020 9 05 0000 09 0 06 2000 900 0 67 2008 90 68 00009 69 0000 00 0 10 2090 od 11 0000 90 0 12 0000 90 13 0070 90 0 14 002020 00 15 20028 009 16 0000 00 FIGURE 5 4 445 192 Sheet 3 of 13 1984 24 Apr U S Patent 4015 JOVYL LNIUd 1N3W3uUnSV3W 038015 WO 1N3W380SV3NW 1838809 38015 31093 3 9 380914 A 1 8054092 430 SLINIT 9 1835 313130 110v43q ge EE PEPE 14510 1108 AV 14510 1N3W3H0SV3W 1 328809 Sheet 4 of 13 4 445 192 Apr 24 1984 U S Patent 49019 81 8 8 8 001 53809 12015
14. E 21901 C YIININDIS 9V14 3 3 3 SPE 331009 SU3931NI 393441220 123135 Gee 80123 13S NYILLV 80193135 3981 S3NI1 8 5118 9 553400 Per SNU3IlVd id LINN dud 1891538 _ 006 310004 X30NI 11005 00 JINON 3 4 31115 NIMOd 001 38099 8 50193135 1081 02 1N3W3unsv3 3578 INIL Sheet 8 of 13 4 445 192 Apr 24 1984 U S Patent 340913 S3IHOW3N 8 Sheet 9 of 13 4 445 192 Apr 24 1984 U S Patent e 340913 4399131 IGG 21907 32031035 39N3003S 193135 916 LINA NOILIN90938 NYILLVd 3TdILINN Sve LINA 32838802920 31314402 53283880220 VIVA 9NIWWVH90Md Sheet 10 of 13 4 445 192 Apr 24 1984 U S Patent 3118 I 380913 55322 805539084 qv 5538047 380915 009 SNS Obt 11009 SNOLLVIINNANOD N39 15 WOH4 5380815 39019 1x3 0 833308 SNB 009 508 SNOLLVOINNNNO 081 09 104100 59773 SALVLS 08 1041105 03395 LAO viva 5535007 ind viva 02 AMON3W 18002 m 109109 29 AYONIW viva ux dL 5539007 5528007 NI viv 308 1N02 3300 518 26 433
15. OUNTERED BEFORE REACHING THE 00001 OCCURANCE OF STATE 40 THE MEASUREMENT RESTARTS TO AGAIN FIND IN SEQUENCE THE 00001 OCCURANCE OF STATE 10 THEN 00001 OCCURANCE OF STATE 20 ETC 4 445 192 5 16 APPENDIX B DETAILED FIELD S DESCRIPTION CONT D NOTE IF A SEQUENCE STATE IS DEFINED TO BE THE SAME AS THE RESTART STATE THE SEQUENCE STATE DOMINATES IF CENTER OR END WERE SELECTED SELECTIVE TRACE STARTS AT COMPLETION OF 5 OCCURANCES OF STATE 30 SEE SELECTIVE TRACE SELECTIVE TRACE EXAMPLE LABEL A OCCUR ALL STATES PURPOSE TRACE ALL STATES EXAMPLE LABEL OCCUR BASE HEX DEC TRACE ONLY STATE 60 00001 OR 7X OR 8X PURPOSE TO SELECTIVELY TRACE DESIRED STATES STATES NOT MEETING THE SELECTION CRITERIA ARE SIMPLY NOT INCLUDED IN THE TRACE COMMENTS THE ABOVE EXAMPLE HAS FOLLOWING MEANING DO A SIMULTANEOUS TRACE OF 00001 OCCURANCE OF STATES 60 OR 7X 70 TO 7F OR 8X 80 TO 8F COUNT EXAMPLE LABEL A BASE HEX COUNT OFF 1 COUNT STATE 7X COUNT TIME PURPOSE TO SELECT COUNT MEASUREMENT TO BE OFF OR IF ON TO BE COUNT STATE OR COUNT TIME COMMENT WHEN COUNT IS OFF THE TRACE LIST DOES NOT SHOW COUNT DATA FOR THE NEXT TRACE MEASUREMENT WHEN COUNT STATE IS SELECTED A 32 BIT COUNT OF THE SELECTED STATE 7X 70 TO 7F IS STORED IN MEMORY WITH EACH POD DATA STATE STORED THE RESULTANT COUNT DATA IS DISPLAYED IN THE TRACE LIST FOR THE NEXT TRACE MEASUREMENT WHEN COUNT
16. T BLOCK OF KEYS DELETE INSERT DEFAULT INCR DECR t gt EXECUTE USED IN THE TRACE SPECIFICATION MENU ONLY TO OPTIONALLY DELETE OR INSERT STATES TO SPECIFY TRACE POSITION AND SELECTIVE TRACE A MAXIMUM 8 STATES MAY BE USED Ed TRACE POSITION AND SELECTIVE E RETURNS THE DISPLAYED MENU TO A KNOWN PRESET TRACEABLE CONDITION USED IN TRACE GRAPH ONLY TO AUTOMATICALLY CHANGE UPPER OR LOWER GRAPH LIMITS USED TO MOVE THE BLINKING CURSOR TO A DESIRED FIELD THE REMAINING KEYS ARE THE EXECUTE BLOCK OF KEYS CURRENT MEASUREMENT STORED MEASUREMENT PRINT TRACE STOP KEY SAVES CURRENT SPECIFICATION AND DATA MEASUREMENT IN A STORED FILE THE CURRENT SPECIFICATION AND DATA REMAIN UNCHANGED EXCHANGES THE CURRENT AND STORED MEASUREMENT FILES PRINTS THE CURRENT DISPLAY EXCEPT TRACE GRAPH ON AN HP 9866 LINE PRINTER TRACE LIST AND TRACE COMPARE WILL PRINT THE CURRENT PAGE AND ANY REMAINING DATA IN MEMORY EXECUTES THE CURRENT SPECIFICATION AND IF DISPLAY IS THE FORMAT OR TRACE SPECIFICATION THE 1610A SWITCHES THE DISPLAY TO TRACE LIST IF TRACE 1S HELD DOWN THE MEASUREMENT IS TRACED CONTINUOUSLY IF THE COMPARE TRACE MODE IS SET FOR 5 0 OR STOP THE MEASUREMENT IS TRACED UNTIL THE CONDITION IS MET THE INSTRUMENT STATUS 1ST LINE IS EITHER COMPARED TRACE FAILED IMPLIES CONDITION NOT MET OR COMPARED TRACE COMPLETE IMPLIES CONDITION MET STOPS ANY MEASUREMENT TRACE
17. United States Patent n Haag et al 54 LOGIC STATE ANALYZER WITH TIME AND EVENT COUNT MEASUREMENT BETWEEN STATES 75 Inventors George Haag Colorado Springs O Douglas Fogg Loveland Gordon Greenley Steve Shepard both of Colorado Springs all of Colo F Duncan Terry Meridan Id 73 Assignee Hewlett Packard Company Palo Alto Calif 21 Appl 459 425 22 Filed Jan 20 1983 Related U S Application Data 60 Division of Ser No 210 462 Nov 25 1980 Pat 4 373 193 which is a continuation of Ser No 75 787 Sep 17 1979 abandoned which is a division of Ser No 828 138 Aug 29 1977 abandoned 51 Int 1 GO6F 3 14 GO6F 7 00 52 USC 364 900 58 Field of Search 364 200 MS File 900 MS File 382 1 40 14 56 References Cited U S PATENT DOCUMENTS 3 406 387 10 1968 Werme 364 900 3 457 552 7 1969 Asendorf 382 14 3 835 455 9 1974 Abbenante 364 900 4 040 025 8 1977 Morrill Jr 364 900 4 100 532 7 1978 Farnbach 382 1 4 192 966 3 1980 Mayer 382 40 OTHER PUBLICATIONS Operating and Service Manual Supplement 1611A A68 6800 Microprocessors Hewlett Packar DISPLAY DRIVER MODULE 900 SELF T PROBE oo ORIVER MODULE 1200 MICROPROCESSOR AND INPUT OUTPUT MODULE 800 COMMUNI
18. ates in response to the events detected by the index module 300 The modules of the acquisition system 250 communi cate with other system modules via the communications bus 600 which provides a means for addressing selected modules and for transferring selected data The entire system functions as a distributed memory as illustrated in FIG 8 For instance addresses between 1800 and 1 on the communications bus 600 access the state count measurements and the sampled data states stored in the measurement control module 400 memories FIG 9 shows another representation of the system architec ture illustrating the relationship between the physical couplings of FIG 7 and the logical addresses of FIG 8 5 15 20 25 30 35 40 45 55 60 65 6 Referring to FIG 10 the index module 300 detects the trace position by first comparing the sampled state on the acquisition system bus 500 with a qualifier state condition stored in the multiple pattern recognition unit 315 The multiple pattern recognition unit 315 com prises a digital pattern triggering circuit as described in the copending patent application entitled DIGITAL PATTERN TRIGGERING CIRCUIT U S Patent application No 743 188 and now issued as U S Pat No 4 100 532 filed November 19 1976 by WILLIAM A FARNBACH As illustrated in FIG 11 the multiple pattern recognition unit 315 comprises 2 pairs of 8 six teen by four bit memories providing for t
19. circuit FIG 13 illustrates the measurement and control mod ule FIG 14 illustrates the data format of the data mem ory FIG 15 illustrates the format of the label format file FIG 16 illustrates the logic flow of the display for matting logic FORMAT SPECIFICATION Data formatting permits the partitioning of 32 input data channels into parameters of interest Contiguous channels which behave as a single parameter may be assigned to one of six labels A F For example in FIG 1 illustrating the interactive format specification dis play 16 bits of an address bus have been assigned to label 8 bits of a data bus have been assigned to label D 1 bit of data pod 1 has been assigned to label F and 7 bits have been left unassigned labeled X Further specifications and data manipulations are made by referencing these labels Each assigned label may be independently declared to have a positive or negative logic polarity and converted to an indepen dently selected radix which can be binary octal deci mal or hexedecimal Further the slope of the positive or negative clock transition at which time the input data channels are sampled can be selected clock slope Keyboard entries to the microprocessor 800 as shown in FIG 16 permit the construction of the label format file shown in more detail in FIG 15 which contains the format specification parameters This is used to process the stored
20. data states in the construction of the alphabetically cancatenated ASCII display data file and the graphic display data file Either of the dis play data files is subsequently selected and used for display purposes by the display control module 700 and the CRT display 1000 Trace Specification The assigned input data channels are sampled at the specified clock transitions and are treated as one sam pled state The trace specification defines which of the sampled states are to be stored for display and which 4 445 192 3 sampled states to be counted for count measure ments The trace specification comprises a definition of state conditions specifying the trace position the selec tive trace and the count measurement Each state con dition defines a state of the assigned input data channels any combination of 1 05 and or X s don t In octal decimal or hexedecimal bases the definition is defined in terms of the appropriate alphamumerics and X s A trace position may be selected to a start center or end the selective trace in response to the input data satisfying a predefined state sequence In this descrip tion it will be assumed that the trace position starts the selective trace state sequence of up to seven state conditions must be satisfied in a specified order ignor ing intermediate states which do not satisfy the state sequence The simplest state sequence is a single state condition Specific
21. dition FIG 2 illustrates the selective trace of every occurrence of a single state condition The count measurement performs a time or a state count associated with each of the 64 states stored and can be displayed in one of two formats absolute the count from the trace position relative the count from the previous trace state The time count is performed by counting the occurrences of an internal clock between sequentially stored states and the display is in the units of seconds state count similarly counts the number of occurrences of a speci fied state condition count between sequentially stored states For example specifying any state would result in a count of the selected clock transitions of the input data In FIG 2 a state count is performed on the occurrences of a specified state condition inter mediate to each sampled state stored Internal Measurement Storage One complete measurement of 64 sampled states which includes the sampled states satisfying the state conditions defining the state sequence and specifications of the format trace and display may be internally stored This current measurement may be stored or exchanged with a stored measurement for later analy 20 30 35 45 50 55 65 4 sis A trace compare mode of operation described more fully below compares results of a previously stored trace with the current measurement and may be utilized as a further qua
22. ection of digital signals recognition means coupled to the collection of condi tioned signals and responsive to the trace specifica tion means for producing control signals indicative of whether or not a state is to be stored count qualification means coupled to the collection of conditioned signals for recognizing a selected state 4 445 192 23 occurring in the collection of digital signals and for producing a qualified count signal upon each such recognition counter means coupled to the qualified count sigrial for producing a collection of digital count signals indicative of the number of times the selected state has occurred storage means coupled to the collections of condi tioned signals and digital count signals and to the control signals for storing the set of states selected by the trace specification means and also for stor ing the count associated with each such selected state 5 10 15 20 25 30 35 45 55 65 24 display means coupled to the storage means for dis playing the set of stored states in correlated rela tion with their associated count 5 Apparatus as in claim 4 wherein the displayed counts represent values on a single monotonically in creasing scale having its origin not later than the first state selected for storage in the storage means 6 Apparatus as in claim 4 wherein the displayed counts represent the various number of occurrences of the selected state inbetween
23. he detection of up to eight qualifier state conditions where each quali fier state condition is identified by a 1 0 X input format in binary Pattern selector 325 of FIG 10 selects one of the eight lines output from the multiple pattern rec ognition unit and passes the selected output to the oc currence counter 345 The occurrence counter 345 counts the occurrences of the selected qualifier state conditions and provides an output in response to count ing a specified number of occurrences of the selected qualifier state condition This output is termed a break event and the sequencer logic 350 in response requests the pattern selector 325 to select the next sequential qualifier state condition and requests the occurrence counter 345 to select the corresponding count The sequencer logic 350 also outputs a N 1 event flag in response to detection of the occurrence of the NEXT TO LAST BREAK EVENT A simplified sequential triggering circuit is illustrated in FIG 12 where the multiple pattern recognition unit 316 incorporates the functions of the multiple pattern recognition unit 315 and of the pattern selector 325 The sequence logic 351 incorporates the functions of the sequence logic 350 except that the final trigger is output in response to the completion of the state sequence Another method of implementing the multiple pattern recognition unit 316 would be to have 3 selector bits be the most significant bits in the address allow
24. ified poriton also responds to the ROLL controls and their corre sponding absolute value may be read in the trace list A trace compare as illustrated in FIG 5 presents a tabular listing of the difference between results in the current measurement and the data in the stored measurement The listing is formatted and rolled as in the trace list The results of the two measurements are exclusive OR ed such that identical corresponding bits are displayed as zeros and unequal bits are displayed as ones In an octal base a 03 is equivalent to a binary 66 011 and indicates that the right two bits are dif ferent in the two measurements Trace compare also offers a compared trace mode which reruns a mea surement until the current and stored measurement are either equal or not equal STOP or STOP 5 For example in FIG 5 of the instrument has rerun trace measurements until the current measurement equaled the stored measurement as indicated by the STOP specification and revealed by the array of 0 s in the comparison TRACE MODES Three trace mode options are provided Trace executes a single current measurement Continuous trace repeats the execution of a current measurement continuously Compared trace repeats the execution of a current measurement until the desired comparison with the stored measurement is obtained CLOCK ENABLE AND TRIGGER OUTPUTS A trigger output provides a triggeri
25. ing the comparator to sequence through various segments of memory when comparing sequential state conditions of the state sequence Referring again to FIG 10 the selective trace is incorporated in a similar manner except that the trace selector 320 of FIG 10 can OR any combination of the AME lines A trace occurrence counter 340 outputs a trace event flag upon counting each nth ORED AME event restart unit 310 causes the sequence logic 350 to restart the satisfaction of the state sequence subsequent to the detection of a selected restart state condition The restart unit is disabled for the data state corresponding to the detection of a break event by sequencer logic 350 which permits the state sequence to be satisfied without any unspecified intermediate state by setting the restart state condition to any state The state count unit 305 strobes a counter in the measurement control module 400 each time the selected state condition to be counted is detected The measurement and control module 400 is illus trated in FIGS 10 and 13 The event flags from index module 300 are input to the high speed control 460 and determine which sampled states on the acquisition sys tem bus 500 are to be stored The high speed control 460 addresses the data memory 410 and the count memory 420 accordingly FIG 14 illustrates the data format of the data memory 410 The sampled state conditions resulting in break events are sequentially stored i
26. is It can also be useful to know how many times some selected event occurred between each pair of consecu tive states in the trace These additional data may be obtained by equipping a logic state analyzer with a counter connectable to a high speed clock signal for time measurements and connectable to a programmable state detection mecha nism for event counts Each time a state is stored as part of the trace the associated count is stored as well The output form of the trace display printed table etc 20 25 30 35 45 50 55 60 65 2 includes the time or count information for each state in the trace DESCRIPTION OF THE FIGURES FIG 1 illustrates the interactive format specification display FIG 2 illustrates the interactive trace specification display FIG 3 illustrates a trace list display of the stored data states FIG 4 illustrates a trace graph display of the stored data states FIG 5 illustrates a trace compare output display list FIG 6 illustrates the input keyboard FIG 7 illustrates a block diagram of the present in vention FIG 8 illustrates the distributed memory addressing of the present invention FIG 9 illustrates the relationship between physical and logical addresses of the distributed memory of FIG 8 FIG 10 is a block diagram of the acquisition system FIG 11 illustrates a multiple pattern recognition unit FIG 12 illustrates a simplified sequential triggering
27. lifier on data storage Display Specification The output display format of the current measure ment may be selected from a trace list a trace graph or a trace compare A trace list illustrated in FIG 3 displays a listing of the stored states in their order of occurrence Twenty trace states one per line are simultaneously presented on the CRT display The ROLL keys allow scanning of the 64 stored states Each line comprises a line num ber the stored state alphabetically sorted into assigned labels in their numerical base and the time or state count if selected A trace graph as shown in FIG 4 presents a graph of the data magnitude of a specified label versus the storage location for all 64 stored states Each state is given a vertical displacement corresponding to its bi nary magnitude and an increasing horizontal displace ment for successive states in order of their occurrence The result is a waveform analogous to oscilloscope displays of voltage magnitude The label to be graphed is selected by specifying the graphed label Scaling of state magnitude is controlled by specifying the upper limit and lower limit on the vertical axis Limits be specified directly or dynamically varied with logrith mic autoranging controls These facilities allow any portion of a graph to be magnified to a full scale presen tation The 20 points corresponding to the lines viewed in the trace list are intensified The intens
28. lished in the same manner as the format specification is edited A general description of the functions of the individual keys is given in Appendix A A detailed description of the interactive display entry fields is given in Appendix B DETAILED DESCRIPTION Input states are sensed through 32 high impedance variable threshold data probes at rates up to 10 MHz The data probes 100 illustrated in FIG 7 are seg mented into four 8 bit data pods and a fifth pod for clock sensing Each pod may be preset to TTL logic threshold or variably adjusted in the range of 10 to 10 volts to interpret input logic levels The 32 input data channels and the clock signal from the data probes 100 are input to the state recognition module 200 An internal sampling clock is generated in response to the selected clock slope the input data signals are compared to the selected threshold voltages and interpreted and the data signals are latched in re sponse to occurrences of the internal sampling clock The state recognition module 200 outputs the sampled state to the high speed acquisition system bus 500 The index module 300 accesses the sampled state on the acquisition system bus 500 compares the sampled state to the selected state conditions and determines the trace position selective storage events and state count events The measurement control module 400 also accesses the acquisition system bus 500 and stores state or time counts and sampled data st
29. n loca 4 445 192 7 tions 1 N 1 Upon detection of the event flag sampled state conditions are sequentially written into the remaining memory locations writing over the old est data when the memory is filled The trace position address of the memory location containing the state condition resulting in the final trigger is stored in a register and sampled states are written into the appro priate number of remaining storage locations For ex ample if the trace was defined to end on the detection of the trace portion no sampled states would be written subsequent to the detection of the trace position The order of occurrence of the stored data is easily recon structed by recovery of the trace position address ap pearing on the communications bus 600 as illustrated in FIG 8 Count selector and synchronizer 450 controls tA 15 the measurement counter 430 whose contents are stored in count memory 420 upon update of the mem ory address The low speed control 480 provides a low speed interface for programming the high speed control 460 and for selecting and latching data for the commu nications bus 600 interface strobe generator 400 illustrated in FIGS 10 and 13 generates a sequence of strobes which when cou pled with a series of data latches not shown and timing logic not shown effectuate the orderly performance of machine tasks In effect a number of sampled states are simultaneously in various s
30. ng pulse for exter nal instrumentation such as oscilloscopes A 50 ns pulse is generated each time the trace position is found The clock enable output is useful for gating clocks or inter rupting the device under test A high signal level indi 4 445 192 5 cates that the instrument actively searching for the trace position It remains at the high signal level until the trace position has been found or the halt key is depressed Both outputs are suspended when the format specification is displayed to allow measurement of channel activity KEYBOARD AND SPECIFICATION DESIGNATION Referring to FIG 6 an illustration of the keyboard the keys are functionally segregated into four blocks the current measurement display entry edit and execute A power up sequence initially defines a default set of specifications displays the default format specification then automatically selects a hexadecimal trace list display Activation of the ROLL DIS PLAY keys permits the presentation of any portion of the 64 states stored To change the format specification the FORMAT SPECIFICATION key is pressed The cursor keys in the edit block are used to move the cursor designating a selectable entry field by a blinking inverse video field on the interactive display The trace specification can be edited by selecting the trace specification interactive display by activating the trace specification key Editing is accomp
31. tages of processing at any one time and are pipelined through the required logic blocks APPENDIX A GENERAL DESCRIPTION KEYBOARD CURRENT MEASUREMENT DISPLAY LINES 3 THROUGH 24 ARE DEPENDENT ON THE DISPLAYED MENU CHOSEN WHICH MAY BE SELECTED BY KEYS IN CURRENT MEASUREMENT BLOCK FORMAT SPECIFICATION SELECT CLOCK SLOPE AND FORMAT 32 CHANNELS INTO LOGICAL LABELS DESIRED LOGIC POLARITY AND NUMERICAL BASE TRACE SPECIFICATION DEFINE TRACE POSITION SELECTIVE TRACE AND COUNT MEASUREMENT DISPLAY RESULTANT CURRENT TRACE AND GRAPH RESULTANT CURRENT TRACE DATA FOR THE 20 INTENSIFIED DOTS CORRESPOND TO TRACE LIST DATA DISPLAY THE EXCLUSIVE OR OF VALID CURRENT DATA WITH VALID STORED DATA AND SELECT LIST COUNT DATA GRAPH SELECTED LABEL COMPARE VS STORE COMPARED TRACE MODE ROLL DISPLAY VIEW TRACE LIST OR TRACE COMPARE DATA TRACE GRAPH SHOWS INTENSIFIED DOTS THAT lt GRAPH GRAPH ENTRY REPRESENT THE TRACE LIST DATA DISPLAYED ALL PROGRAM ENTRIES ARE MADE IN INVERSE VIDEO FIELDS AT THE BLINKING CURSOR AND MAY BE CHANGED BY THE ENTRY BLOCK OF KEYS FIELD SELECT 1 ALL FIELDS ENCLOSED WITH BRACKETS 1 ARE CHANGED BY THIS KEY THE 1610A SELECTS ONLY ALLOWED CHOICES 0 9 X 5 5 ALL OTHER FIELDS MAY BE CHANGED USING 4 445 192 10 GENERAL DESCRIPTION KEYBOARD CONT D EDIT DISPLAYED MENUS MAY BE EDITED BY THE EDI
32. the storage of each stored state and the storage of its predecessor UNITED STATES PATENT AND TRADEMARK OFFICE CERTIFICATE OF CORRECTION 4 445 192 DATED April 24 1984 INVENTOR S George A Haag et al It is certified that error appears in the above identified patent and that said Letters Patent is hereby corrected as shown below Column 1 line 9 George H Haag should be George A Haag Column 2 line 36 37 Contiguous channels should be Contiguous data channels Column 6 line 9 application should be Application Signed and Sealed this Twenty third D a y 0 f October 1984 SEAL Attest GERALD MOSSINGHOFF Attesting Officer Commissioner of Patents and Trademarks
33. yzers are used to monitor and record sequences of states that occur in a collection of digital signals in a system under test A state is simply any one of the 2 logical patterns that n many digital signals may experience A sequence of addresses or a sequence of fetched instructions are examples of electrical activ ity describable as states in a microprocessing environ ment and that can be monitored by a logic state analyzer to record their state flow To monitor the ongoing sequence of states in a system under test a logic state analyzer samples the electrical values of the signals of interest at times determined by one or more clock signals associated with the system under test The sampled electrical values obtained are compared to thresholds of selected value and polarity to determine their logical values each of which will be either true or false one or zero Each resulting collec tion of ones and zeros for a sample is a state in the ongo ing sequence of states It is also simply a binary value that may be stored in a memory A series of such stored values is a record of the activity occurring in the system under test Such a record may be termed a trace It can be useful for a trace to contain other informa tion besides a simple list of states in the order they oc curred For example it may be very useful to know the elapsed time between the states in the trace or perhaps the time between each state and an origin on a time ax
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