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SERVICE MANUAL

1. HYUNDAI MicroElectronics HY29LV800 PIN CONFIGURATIONS RY BY 10 444 1 RESET A15 48 16 A18 2 43 A14 2 47 AI7 3 42 2 A8 A13 3 46 A7 4 4 9 A12 4 45 2 DQ15 A 1 A6 5 40 10 11 5 44 DQ7 A5 6 39 Att 10 6 43 0014 A4 7 38 A12 A9 7 42 DQ6 8 37 1 A13 8 8 41 0013 A2 9 36 A14 NC 9 40 005 M 10 SR 35 A15 NC 10 39 0012 A0 Q 037 321 WE 11 38 004 CER 2 BYTE RESET 12 Standard 37 Voc Veg D 22295 NC 13 36 0011 OE 3 DQ15 A 1 NC 14 TSOP48 35 003 000 15 30 2 007 RY BY 15 34 0010 008 16 29 1 DQ14 18 16 33 2 1 002 001 17 28 pm 006 M7 17 32 009 DQ9 18 27 0013 AT 18 81 pat DQ2 19 26 DQ5 A6 19 30 jm 008 0010 20 25 0012 A5 20 29 000 DQ3 21 24 004 A4 21 28 OE 0011 22 23 5 Vec 22 27 Veg A2 23 26 M 24 25 A0 A16 157 48 2 A15 BYTE 2 47 A14 3 46 A13 DQ15 A 1 4 45 A12 DQ7 5 44 11 DQ14 6 43 A10 DQ6 7 42 2 A9 0013 8 41 A8 DQ5 9 40 NC 0012 10 39 DQ4 11 38 Reverse 37 O RESET 011 13 36 NC 003 14 TSOP48 35 NC 0010 15 34 RY BY 002 16 33 A18 009 17 32 A17 DQ1 18 31 7 008 19 30 A6 000 20 29 3 OE 21 28 A4 Ve 22 27 CE
2. _ OS 9 vO 7696 V 9 19 GOV 29 SUBSIDIARY BOARD 2 7 20 022112 30 10VSX TOWME 91 40001 02921 SO TVAL t09n A9T An00T 61921 81921 GE I 9H 41901 31 32 TOT TOL 6264 MO eni SEDI 7 E FIMO WO TRUM NIJONT Loca si 18801231 504 504 LENT JEU HSVI 352 Ove Tva SIO TVG ENIAV arpa XDA DD ova SSAG SSAC oval scq SSAG TVOI 6NIGV A T LAOWA d SSATIdV 61VOI SIVOI OVHOIH LVOI 9VOI SVOI VOI TVOI LNIGV_A OGL APIOL SNIGV_A SWL AIAL 4 554 850 004 OWI ona dNI dO NNI dO no do ATSIZAL OH OSA OTA NDS NOTA TATA dORVOSD
3. HY29LV800 MicroElectronics BLOCK DIAGRAM DQ 15 0 A 18 0 A 1 STATE CONTROL ERASE VOLTAGE gt 1 0 BUFFERS 00115 0 GENERATOR AND SECTOR SWITCHES WE COMMAND REGISTER 1 0 CONTROL OE DATA LATCH PROGRAM ml a gt VOLTAGE RESET4 GENERATOR lt RY BY p _ Y DECODER Y GATING x DETECTOR TIMER A 18 0 1 8 Mb FLASH b X DECODER MEMORY lt Lo SIGNAL DESCRIPTIONS Name Type Description Address active High These 19 inputs combined with the DQ15 A 1 input LSB A 18 0 Inputs nis in byte mode select one location within the array for read or write operations 1 Data Bus active High These pins provide 8 16 bit data path for read aa and write operations In byte mode DQ15 A 1 is used as the LSB of the 20 bit byte address input DQ 14 8 are unused and remain tri stated byte mode BYTE Input Byte Mode active Low Low selects byte mode High selects word mode Chip Enable active Low This input must be asserted to read data from or CE Input write data to the HY29LV800 When High the data bus is tri stated and the device is placed in the Standby mode Output Enable active Low Asserted for read operations and negated for OE Input write operations BYTE determines whether a byte or a word is read during the read operation Write Enable active Low Co
4. OZ TH 1155 EAGIASEH 2007 5 06 SOEA ee ERA 1 ire Ef MIAN SCHEMATIC DIAGRAM SN 84 NDA SX Vo A9TAM EE LETOL osoza SNQDtOT 2 E 5 TSI 3 SNGHOEE 5 TECA 4057250 1 1400846 A9T ANQTT 91 410 WAL 80221 31145 adic SN HNLT 6679 SLT nul 2 OSTA 6ITI SN UOT DDA 6 A6 vsozn gt TATADIOA OIZOL ESTA 60701 Ps 1 400 vor ITIL PEAN 1808 POCNA EOC NN COZN ON C81 TSIZTZITU SOCNA LOCNA9OTN SOTNA Asn euriou LH TRITA IBICI COCH ROCN P LOCNSI O0C NA SONY ON TUS 5 EBIQTOGCTLSDTPOCNW EOCNN ZOCNN IOCNM POS IVE lt Ft OF 9t EROAN 6t __INOQ ST ONOd TINGGI ST INT LT SVG 5 It DAS um SE XDdS Ntt 5
5. TION 141 INL a a IG ol eof lt IG Dn 2 Es fess pa pa a SIS A 1 1 LV ov cv SIA OGL 3SO LOL DL OW y 340 40 040 AISIZAL Odd 1 1000 01 INST riz Tee POT 6 EST 0122 OSAL 5 SN 99ITH HSOTONL NSdOMNL INSdOXLL 3015 MWOIS oe 18501241 LUN 0508 STEN AVOT 90558 MOT sol sicul 345 AV OT T 90 A AOL LE 80EOL SNQ NI 040 TOEN AALS 5 TAJI TAJI INIA SRE TONG ALANA OC 4 2 s TIOA SHHLOA oo TOEN MIAN SCHEMATIC DIAGRAM 3H Sr aod as SE rr 95 vs M CUTS T WEL s AV Oq 1 Wow 14 60 7 ZS S TETTAST 9rco uois TA BIA 6 AST HROCC 10 2 58105455 58105455 5 A ONASA 3024148 SV LVOISV 328dS
6. SNO aviva kit OVE SE TIVIN OL VINCI 3 vt VINCE 3 tt SVG 75 0922 TE LVING It OVC DE SVING 6c tVING W9 91 15 Cx9T c TS NVHGS ozn MIAN SCHEMATIC DIAGRAM 90TAN ELE T LOLA AST ANOT EETL F 1111 EE a SNQ A9I 001 9ETOL 096752 A9T 3n0T OtcOL A9T 3001 62291 9 Ngo 55124 89 col t IcO ESITA A9TAMOT SCCOL AST ANOT LTTOL 91 4701 AQT 1001 SNM ArT Ul Local 9054 TOL M89 8tICH 5608 LLVOSV OVIVdS Wee ea OVIVOS ure tor 1 05 aicen 0858 A9T MOT 21 A9T ANOT ytz SPITA ogsp 4055 TOOL 101 Wiz ELI gt 6 A9T MOT A9TAMOT OFT el ae SNQ SO0T 5800 SNQ SOT 9550 181055 8070 83 5181282 00 XI g 8375181252 9020 SA SISTOST 500 LIITA 9874 8 075782 90201 5 MIAN SCHEMAT
7. 1545 45 V V 4 1064 9 FIRE 4 905 4S LEHNT 4 t T gos AGE E ME z AE 2 5 YU 12 t ose oce QI 2 TISA 6 Y wOREOTS 8 6 9 1051 n 5 lt 8 4 ao AM MOCC 1 m T NUN E 842 052 4 1 1 T mue mic di 1 ASF LOS in 8 you T LOOPNT AGE Antec 90SX z 205 WENI 5 1 4 t 9 8050 TOOL tos Y AU Tor 1 9051 9 S 23 POWER BOARD SCHEMATIC DIAGRAM amp 59845 0 DVD 2003 8 28 FUCHEN L502 BC502 2 88 SYN SYN 1501 D502 BC501 RV501 R501 L503 BCN502 1 R503 i o dew T D506 1 F501 TL6AL 2507 Q CAUTION BCN501 220V FOR CONTINUED PROTECTION AGAINST RISK OF Fine LH REP
8. EDI Ivan 2 rcesrcens p 1 1669 c D TC601 TC604 TC610 TC611 D CD11 16V4 7U 20 5x11 2 d k 00 9 TC613 TC621 TC607 MAGNETIC BEADS 060120602 pc 6 90 2 5 2PLUG WITH L NEEDLE FLAT CABLE REVERSE 5601 XS602 MIC SOCKET CK3 6 35 4 MIC601 MIC602 CONNECTION CORDS 00 6 SHAPED 75mm 8 4 oPsor sPeos SMD RESISTOR Mewies 0003 pas 6 ccm CARBON FILM RESISTOR SMD RESISTOR 1 16W 1002 5 0603 CARBON FILM RESISTOR CARBON FILM RESISTOR CARBON FILM RESISTOR SMD RESISTOR CARBON FILM RESISTOR 4 330 5 SMD RESISTOR 116W 2 2K 25 0603 GW 4 7K 15 0603 16 750 45 0603 OV 102 10 0603 6V 105 80 20 0603 OV 104 2090 5mm DV 104 80 20 Smm 104 1094 0603 80505 MAGNETIC BEADS pos em ELECTRO OPTIC TRANSFORMER now 1 706 SCART SOCKET CART 01 P CABLE SOCKET STRAIGHT DUAL LINE pog S R605 R606 R617 R621 R624 N R612 R620 R602 R601 X N 22 n IT 0101010101010 22 22 gt 010 nln 2 gt gt lt wo 2 2 56 5181 2 un 22 1910095 TERMINAL SOCKET AV1 8 4 5G 2 BLACK JK704 1910006 TERMINAL SOCKET VIDEO JK703 2100010 CONNECTION CORDS 0 6 SHAPED 5mm PCS 6 JP701
9. PIN C210 GE 0310056 sun CAPACITOR ______16 473 1026 0603 2 2 9 220 C218 1303 306 MD INDUCTOR 1 8UH 10 1608 PCS 6 1243 1248 MAGNETIC BEADS 03900579 INDUCTOR RH354708 1 L226 L201 L203 L228 L232 L234 L236 L301 L304 L305 L307 0390095 SMD MAGNETIC BEADS 1608 221705 PCS Ol 12181219 5 0960020 CRYSTAL OSCILLATOR 27 00 2 49 5 X201 132287 em 9985 0700007 SMD DIODE 1N4148 ES 16 1 P201VD2057VD207 VD21 0 VD221 0700001 SMD DIODE 1 54148 Geile 0 VD221 Nn 0700002 SMD DIODE LL4148 8 Mis 07800509 07800499 0780062 SMD TRIODE 014 0780063 CS 1 0204 780197 c 0780198 SAIS Cs 0780040 904 0780193 0780115 sess he 1 uus ic esssor 09 ic wwancuMwsoe 1 wwe ic 1 uus ems he pcs _2_ uz0a u204 esum ic jtwurmwrAprsorzs rcs 1 uw ws ic uw ic uw ic C VERSION OFP 0201 302 1940140 CABLE SOCKET SIRAIGHTDUAL LINE XS204 42
10. onductive material sheet or iron sheet 4 1 3 Handling of optical pickup 1 To keep the good quality of the optical pickup maintenance parts during transportation and before installation the both ends of the laser diode are short circuited After replacing the parts with new ones remove the short circuit according to the correct procedure See this Technical Guide 2 Do not use a tester to check the laser diode for the optical pickup Failure to do so willdamage the laser diode due to the power supply in the tester 4 2 Handling precautions for Traverse Unit Optical Pickup 1 Do not give a considerable shock to the traverse unit optical pickup as it has an extremely high precise structure 2 When replacing the optical pickup install the flexible cable and cut is short land with a nipper See the optical pickup replacement procedure in this Technical Guide Before replacing the traverse unit remove the short pin for preventingstatic electricity and install a new unit Connect the connector as short times as possible 3 The flexible cable may be cut off if an excessive force is applied to it Use caution when handling the cable 4 The half fixed resistor for laser power adjustment cannot be adjusted Do not turn the resistor 5 Assembling disassembling the mechanism unit 5 1 Optical pickup Unit Explosed View and Part List Materials to Pic 1 PARTS CODE PARTS NAME 14692200 SF
11. 2000 1 ERO 6 TAAN ud Dmm E 2 5 eu vetere DU 2 106 t YA 75 i ovsx Tosk 1 RS 1 3 TODA T T ho ho vet 1 1062 m D OrSX A EJ gt A A A gt TV8 008H osa 1 1061 Wu L n 60SX L gt Y T 155A EVE EEUU UE m EPLF s 196914 5 15 90 9 s 10 2 9 8 a Fm 01 dd 10 19 EE 65 85 ST LS 95 55 01 tS L 9 _ JOA 8 5 50 25 4 1055 T E n TOOL Torn 29 9 v 9 SCHEMATIC amp PCB WIRING DIAGRAM 21 FRONT SCHEMATIC DIAGRAM NAHONA 2967 10704 040 22 POWER BOARD SCHEMATIC DIAGRAM
12. JP706 2100003 CONNECTION CORDS 0 6 SHAPED 7 5mm JP707 JP07 S 1940024 SOCKET 5P 2 0mm XS702 7 2100004 CONNECTION CORDS 0 6 SHAPED 10mm R707 L713 L714 1 A SUBSIDIARY BOARD 1 MATERIAL CODE MATERIAL NAME SPECIFICATIONS UNIT ANTI LOCATION 0700061 SMD RADIATION DIODE LTST C930TBKT LEDAO1 FEAT CABE E 0 IPLUG RED AND BLACK 1563578 3238 0 12 XSA01 ans fre 496 2227 1 A SUBSIDIARY BOARD 2 MATERIAL CODE MATERIAL NAME SPECIFICATIONS UNIT ANTI LOCATION 0310207 SMD CAPACITOR 50V 104 20 X7R 0603 C901 0310543 SMD CAPACITOR 50V 104 10 X7R 0603 C901 0700007 SMD DIODE 1N4148 D901 D902 LIGHT TOUCH RESTORE 1340001 SICH VERTICAL 6x7x1 K906 SMD LIGHT TOUCH 1340050 SWITCH TSCCD 3 260 GRAM K901 K905 9P70 2 0 2PLUG WITH L NEEDLE 2121114 SOFT FLAT CABLE SAME DIRECTION XS901 2360016 RECEIVING HEAD HS0038B3V U901 4PCS FOR FUNCTION 4000376 TAPPING SCREW 1 7 4 2 BLACK PCS BUTTON FUNCTION PCB AND SUPPORT BOARD 3025891 FUNCTION BUTTON DV963 TRANSPARENT eesi O O 1630989 ___ oo 1 16W 00 5 0603 Rl 9 MATERIAL CODE MATERIAL NAME SPECIFICATIONS UNIT ANTI LOCATION R201 R204 R212 R222 R228 R234 R236 R245 R247 R251 0090001 SMD RESISTOR PCS 30 R286 R2107 R287 R290 R21 83 0090006 SMD RESISTOR 1 16W 750 5 0603 ee R276 R280 R231 R232 R256 R263 R264 559 0090005 SMD RESISTOR 1 16W 330 5
13. and terminate at 75 ohms 2 Confirm that luminance signal Y S level is 1000mVp p 30mV 6 2 Video Output Chrominance Signal Confirmation Do the confirmation after replacing P C B Measurement point Color bar 75 DVDT S15 Video output terminal PLAY Title 46 DVDT S15 Or PLAY Title 12 DVDT S01 DVDT S01 Measuring equipment tools Confirmation value Screwdriver Oscilloscope 200mV dir 10 sec dir 621mVp p 30mV Purpose To maintain video signal output compatibility 1 Connect the oscilloscope to the video output terminal and terminate at 75 ohme 2 Confirm that the chrominance signal C level is 621 mVp p 30mV 7 MPEG BOARD CHECK WAVEFORM 7 1 27MHz WAVEFORM 500MS s Sample T 1 o Display Style Vectors Accumulate 00ms Dot Accumulate 500ms ay 100mV lt lt 25ns Chi f 50005 H 100 Style Vectors 7 2 IC5L0380R PIN 2 WAVEFORM DIAGRAM 173 Acqs Delay Time 16 5ns 10 5 5 Intensified Delayed Only ch 10 V Ref2 100mV 50095 Trigger Position 25 Time Base Main Only 10 HYUNDAI MicroElectronics 8 HY29LV800 KEY FEATURES Single Power Supply Operation Read program and erase operations from 2 7 to 3 6 volts Ideal for battery powered applications High Performance 65 90 a
14. device Some solder removal devices not classified as anti static ESD protected can generate electrical charge sufficient to damage ES devices 5 Do not use freon propelled chemicals These can generate electrical charges sufficient to damage ES devices 6 Do not remove a replacement ES device from its protective package until immediately before you are ready to install it Most replacement ES devices are packaged with leads electrically shorted together by conductive foam alminum foil or comparable conductive material 7 Immediately before removing the protective material from the leads of a replacement ES device touch the protective material to the chassis or circuit assembly into which the device will be installed Caution Be sure no power is applied to the chassis or circuit and observe all other safety precautions 8 Minimize bodily motions when handling unpackaged replacement ES devices Otherwise harmless motion such as the brushing together of your clothes fabric or the lifting of your foot from a carpeted floor can generate static electricity ESD notice 1885x323x2 tiff IMPORTANT SAFETY NOTICE There are special components used in this equipment which are imporant for safety These parts are marked by the schematic diagrams Exploded Views and replacement parts list It is essential that these critical parts should be replaced with manufacturer s specified parts to prevent shock fire or other hazards Do not m
15. item for details on device commands 7 13 38 44 VccQ Power Supply Pin VccQ is the output buffer power supply 1 25 Vcc Power Supply Pin Vcc is the device internal power supply 4 10 41 47 GNDQ Power Supply Pin GNDAQ is the output buffer ground 26 50 GND Power Supply Pin Integrated Circuit Solution Inc DRO25 0B 04 15 2002 GND is the device internal ground 16 1 42516101 SI FUNCTIONAL BLOCK DIAGRAM COMMAND DECODER ROW amp ADDRESS CLOCK GENERATOR MODE BUFFER REGISTER MEMORY CELL ARRAY ROW DECODER 2 BUFFER Em COLUMN DECODER SENSE I O GATE SELF REFRESH CONTROLLER 2 lt 5 e 29 tc lt BURST COUNTER COLUMN ADDRESS BUFFER MEMORY CELL ARRAY lt Vcc VccQ ROW lt GND GNDQ BANK 1 BUFFER MULTIPLEXER ADDRESS LATCH ROW DECODER S16BLK eps Integrated Circuit Solution Inc 1 7 DRO025 0B 04 15 2002 8 2 1389 MT1389 Progressive Scan DVD Player SOC Specifications are subject to change without notice MediaTek MT1389 is a DVD player system on chip SOC which incorporates advanced features like high quality TV encoder and state of art de interlace processing The MT1389 enables consumer electronics manufacturers to build high quality cost effective DVD players portable DVD players or any other home entertainment audio video devices Based on MediaTek s world leadi
16. of the device is similar to reading from other Flash or EPROM devices Two power saving features are embodied in the HY29LV800 When addresses have been stable for a specified amount of time the device enters the automatic sleep mode The host can also place the device into the standby mode Power con sumption is greatly reduced in both these modes Common Flash Memory Interface To make Flash memories interchangeable and to encourage adoption of new Flash technologies major Flash memory suppliers developed a flex ible method of identifying Flash memory sizes and configurations in which all necessary Flash device parameters are stored directly on the device Parameters stored include memory size byte word configuration sector configuration necessary volt ages and timing information This allows one set of software drivers to identify and use a variety of different current and future Flash products The standard which details the software interface nec essary to access the device to identify it and to determine its characteristics is the Common Flash Memory Interface Specification The HY29LV800 is fully compliant with this specification PB r1 0 Mar 00 12
17. overheated or damaged by the short circuit 2 After servicing see to it that all the protective devices such as insulation barrier insulation papers shields are properly installed 3 After servicing make the following leakage current checks to prevent the customer from being exposed to shock hazards 2 PREVENTION OF ELECTRO STATIC DISCHARGE ESD TO ELECTROSTATICALLY SENSITIVE ES DEVICES Some semiconductor solid state devices can be damaged easily by static electricity Such components commonly are called Electrostatically Sensitive ES Devices Examples of typical ES devices are integrated circuits and some field effect transistors and semiconductor chip components The following techniques should be used to help reduce the incidence of component damage caused by electro static discharge ESD 1 Immediately before handling any semiconductor component or semiconductor equipped assembly drain off any ESD on your body by touching a known earth ground Alternatively obtain and wear a commercially availabel discharging ESD wrist strap which should be removed for potential shock reasons prior to applying power to the unit under test 2 After removing an electrical assembly equipped with ES devices place the assembly on a conductive surface such as alminum foil to prevent electrostatic charge buildup or exposure of the assembly 3 Use only a grounded tip soldering iron to solder or unsolder ES devices 4 Use only an anti static solder removal
18. the Erase Command sequence This initiates an internal algorithm that automatically preprograms the array if it is not already pro grammed before executing the erase operation As during programming cycles the device auto matically times the erase pulse widths and veri fies proper cell margin Hardware Sector Protec tion optionally disables both program and erase operations in any combination of the sectors of HY29LV800 the memory array while Temporary Sector Un protect allows in system erasure and code changes in previously protected sectors Erase Suspend enables the user to put erase on hold for any period of time to read data from or program data to any sector that is not selected for era sure True background erase can thus be achieved The device is fully erased when shipped from the factory Addresses and data needed for the programming and erase operations are internally latched during write cycles and the host system can detect completion of a program or erase operation by observing the RY BY pin or by reading the DQ 7 Data Polling and DQ 6 toggle status bits Hardware data protection measures include a low Voc detector that automatically inhibits write op erations during power transitions After a program or erase cycle has been com pleted or after assertion of the RESET pin which terminates any operation in progress the device is ready to read data or to accept another com mand Reading data out
19. 0 6 12 C5 PCS 4 207 209 1 301 TC204 TC210 TC237 TC246 4209 J CD 02601889 CD CD11 16 1000 20 6 12 C5 TC235 TC238 310085 SMD CAPACITOR 50 20 5 NPO 0603 C222 C232 0310190 SMD CAPACITOR 50 27 5 NPO 0603 275 276 262 265 289 290 292 0310045 SMD CAPACITOR 50 47 5 NPO 0603 PCS 16 293 295 296 298 299 2101 2102 2104 2105 0310047 SMD CAPACITOR 50V 101 5 NPO 0603 PCS 4 206 233 2111 2114 0310051 SMD CAPACITOR 50V 331 5 NPO 0603 C212 C213 310048 SMD CAPACITOR 50V 151 5 NPO 0603 C304 C306 C207 C211 C214 C216 C217 224 226 231 234 239 241 254 256 259 26 7 274 279 282 301 3 0310084 SMD CAPACITOR 50V 104 80 20 0603 PCS 82 3 530530 63 CS 23 C2138 C2143 C2150 C21 52 C2155 C2157 C2160 C216 2 C2164 C2166 C2175 207 211 214 216 217 224 226 231 234 239 241 254 256 259 26 7 C274 C279 C282 C301 C3 0310058 SMD CAPACITOR 25V 104 80 20 0603 PCS 82 305309 6311 C312 C3 23 C2138 C2143 C2150 C21 52 C2155 C2157 C2160 C216 2 C2164 C2166 C2175 201 204 221 240 317 809 209 0310234 SMD CAPACITOR 16V 105 80 20 0603 19 322 325 328 333 223 255 278 294 297 Nn MD CAPACITOR 50V 102 10 0603 S 0310066 s MD CAPACITOR 50V 122 10 0603 2122 2129 cus 50 222 210 0603 rcs 2 07 310 5 5 5 2112 2115 2116
20. 0603 ES R294 295 202 0090009 SMD RESISTOR 1 16W 3300 5 0603 R221 R277 R281 0090013 SMD RESISTOR 1 16W 6800 5 0603 R259 R260 10 R255 R257 R258 R297 R299 0090272 SMD RESISTOR 1167 10 5 0603 R304 R307 R321 1 gt E gt R213 R215 R254 R2102 R21 gt E 0090014 SMD RESISTOR 1 16W 1K 5 0603 mn 04 2117 R2120 gt gt S 22 P P 1 A DECODE BOARD R303 R318 R331 R2159 R283 90003 SMD RESISTOR 116W 100 5 0603 CS R301 R302 90016 SMD RESISTOR 1 16W 1 5K 5 0603 R323 R324 0090249 SMD RESISTOR 1 16W 5100 5 0603 0090019 SMD RESISTOR 1 16W 4 7K 5 0603 0090021 SMD RESISTOR 1 16W 6 8K 5 0603 0090023 SMD RESISTOR 0090024 SMD RESISTOR 1 16W 15K 5 0603 0090025 SMD RESISTOR 1 16W 20K 5 0603 0090255 SMD RESISTOR 4 R205 R214 R325 R327 4 R238 R240 R2130 R2131 R2 P 1 16W 10 5 0603 PCS B 22 S 1 16W24K 5 0603 0090188 SMD RESISTOR 1 16W 18K 5 0603 0090197 SMD RESISTOR 1 16W 150K 5 0603 0090211 SMD RESISTOR 1 16W 680K 5 0603 al ES 134 R2135 R2140 R208 R229 R309 R311 R313 16 R314 R329 R330 R39 R2101 R2106 R2108 R2109 R2164 R2184 R2105 4 gt 319 8320 R317 R322 40 RAR eene espe emm 00003759 CARBON FILM RESISTOR 1 4 2 20 5 R326 TC202 TC225 TC226 T C232 4209 E E 02601819 CD11 16 2200 2
21. 16101 Sr PIN FUNCTIONS Pin No 20 to 24 27 to 32 Symbol 0 10 Input Pin Function In Detail AO to A10 are address inputs 0 10 used as row address inputs during active command input and 0 7 as column address inputs during read or write command input A10 is also used to determine the precharge mode during other commands If A10 is LOW during precharge command the bank selected by A11 is precharged but if A10 is HIGH both banks will be precharged When A10 is HIGH in read or write command cycle the precharge starts automati cally after the burst access These signals become part of the OP CODE during mode register set command input 11 Input Pin A11 is the bank selection signal When A11 is LOW bank 0 is selected and when high bank 1 is selected This signal becomes part of the OP CODE during mode register set command input CAS Input Pin CAS in conjunction with the RAS and WE forms the device command See the Command Truth Table item for details on device commands 34 CKE Input Pin The CKE input determines whether the CLK input is enabled within the device When is CKE HIGH the next rising edge of the CLK signal will be valid and when LOW invalid When CKE is LOW the device will be in either the power down mode the clock suspend mode or the self refresh mode The CKE is an asynchronous input 35 CLK Input Pin CLK is the master cl
22. 23 26 A2 A0 24 25 A1 1999 by Hyundai Electronics America All rights reserved No part of this document may be copied or reproduced in any form or by any means without the prior written consent of Hyundai Electronics Industries Co Ltd or Hyundai Electron ics America collectively Hyundai This document describes a product currently under design by Hyundai The information in this document is subject to change without notice Hyundai shall not be responsible for any errors that may appear in this document and makes no commitment to update or keep current the information contained in this docu ment Hyundai advises its customers to obtain the latest ver sion of the device specification to verify before placing orders that the information being relied upon by the customer is cur rent PB r1 0 Mar 00 14 1 42516101 Gr 512K x 16 Bits x 2 Banks 16 MBIT SYNCHRONOUS DYNAMIC RAM FEATURES DESCRIPTION Drive Strength for low capacitive bus loading ICST s 16Mb Synchronous DRAM IC42S16101 is organized Clock frequency 166 143 125 MHz as a 524 288 word x 16 bit x 2 bank for improved performance The synchronous achieve high speed Fully synchronous all signals referenced to a data transfer using pipeline architecture All inputs and positive clock edge outputs signals refer to the rising edge of the clock input Two banks be operated sim
23. 29LV800 8 Mbit 1M x 8 512K x 16 Low Voltage Flash Memory B Minimum 100 000 Write Cycles per Sector B Compatible With JEDEC standards Pinout and software compatible with single power supply Flash devices Superior inadvertent write protection B Data Polling and Toggle Bits Provide software confirmation of completion of program and erase operations B Ready Busy Pin Provides hardware confirmation of completion of program and erase operations B Erase Suspend Erase Resume Suspends an erase operation to allow reading data from or programming data to a sector that is not being erased Erase Resume can then be invoked to complete suspended erasure B Hardware Reset Pin RESET Resets the Device to Reading Array Data B Space Efficient Packaging 44 pin PSOP 48 pin TSOP and 48 ball FBGA packages LOGIC DIAGRAM DQ 7 0 A 18 0 7 DQ15 A 1 lt gt RY BY RESET HYUNDAI MicroElectronics GENERAL DESCRIPTION HY29LV800 is an 8 Mbit 3 volt only CMOS Flash memory organized as 1 048 576 1M bytes or 524 288 512K words that is available in 44 pin PSOP 48 pin TSOP and reverse TSOP and 48 ball FBGA packages Word wide data x16 appears on DQ 15 0 and byte wide x8 data pears on DQ 7 0 The HY29LV800 can be programmed and erased in system with a single 3 volt supply Inter
24. Built in progressive video processor Audio effect post processor Audio input port High Performance Analog RF Amplifier Programmable fc Dual automatic laser power control Defect and blank detection level signal generator Speed Performance on Servo Channel Decoding DVD ROM up to 4XS CD ROM up to 24XS Channel Data Processor Digital data slicer for small jitter capability Built in high performance data PLL for channel data demodulation data demodulation Enhanced channel data frame sync protection amp DVD ROM sector sync protection Servo Control and Spindle Motor Control Programmable frequency error gain and phase error gain of spindle PLL to control spindle motor on CLV and CAV mode Built in ADCs and DACs for digital servo control Provide 2 general PWM Tray control can be PWM output or digital output Embedded Micro controller Built in 8032 micro controller Built in internal 373 and 8 bit programmable lower address port 19 interface Supports 5 3 3 Volt FLASH interface Supports power down mode Supports additional serial port DVD ROM CD ROM Decoding Logic High speed ECC logic capable of correcting one error per each P codeword or Q codeword Automatic sector Mode Form detection Automatic sector Header verification Decoder Error Notification Interrupt that signals various decoder errors Provide error correction acceleration B
25. E REGULATOR 0580054 DIODE 9 1V IW ZD502 501 0503 res 0880553 IC LM431ACZ 92 PCS 01 20 40mH 220 16 13 PHOTOELECTRIC ime 1693 CORDS 00 6 SHAPED 10mm Pcs 4 U501 U504 FOR HEAT 3580039 HEAT RADIATION BOARD 11 15 25 009 RADIATION U501 U504 FOR HEAT 3580054 HEAT RADIATION BOARD 11 15 25 WHITE AB905 RADIATION GROUND CHIP OF POWER 3870115 BOARD AB903 G501 G502 4000073 TAPPING SCREW BT 3x8 BLACK RADIATION 1 HEADPHONE BOARD 0090009 90014 0090018 GW 3 3K 25 0603 0090224 0090184 SMDRESISTOR ___ 116W43K 25 PCs 2 Ress Resa 0090023 SMD RESISTOR 16 10K 5 0603 cs R635 R636 0090030 SMD RESISTOR 1 16W 56K 5 0603 cs R627 R628 0310047 SMD CAPACITOR cs C616 C617 0310207 SMD CAPACITOR CS 3 604 605 623 0310543 SMD CAPACITOR CS 3 604 605 623 0310222 6W3 3K5 SHAPED 75 R629 0260094 ____0260027 0260096 CD110 16 1000 20 6 12 2 5 TC619 TC620 0260175 CD CD11C 16V100U 20 15 6x7 2 5 TC619 TC620 260201 cD CD11C 16V100U 20 6x7 2 5 TC619 TC620 0260237 cD CD11 10V1000U 20 8 14 3 5 TC601 0260352 GS 10V1000U 20 8x14 3 5 TC601 SMD VOLTAGE 0700020 SRGULATORDIODE 6 2V 5 1 2W ZD601 0780085 SMD TRIODE 8050D Q601 sus 0603 5 200 2 0 2PLUG WITH L NEEDLE 2121744 FLAT CABLE DHISAME DIRECTI
26. HD60 1EA0311A06300 ASSY CHASSIS COMPLETE 1EA0M10A15500 IEA0M10A15501 ASSY MOTOR SLED ASSY MOTOR SLED 1EA2451A24700 HOLDER SHAFT 1EA2511A29100 GEAR RACK 1EA2511A29200 GEAR DRIVE 1EA2511A29300 GEAR MIDDLE A 1EA2511A29400 GEAR MIDDLE B 1EA2744A03000 SHAFT SLIDE 3 4 5 6 7 8 9 1EA2744A03100 SHAFT SLIDE SUB 1EA2812A15300 SPRING COMP TYOUSEI 1EA2812A15400 SPRING COMP RACK 1EA0B10B20100 1EA0B10B20200 ASSY PWB ASSY PWB SEXEA25700 SPECIAL SCREW BIN M2X11 SEXEA25900 SPECIAL SCREW M1 7X2 2 SFBPN204ROSE SCR S TPG PAN 2X4 SFSFN266ROSE SCR S TPG FLT 2 6X6 SWXEA15400 SPECIAL WASHER 1 8X4 X0 25 Note This parts list is not for service parts supply 5 2 Bracket Explosed View and Part List 2 4 JM 2 257 Pic 2 Materials to 2 1 bracket 14 front silicon rubber 2 belt 15 Back silicon rubber 3 screw 16 Pick up 4 belt wheel 17 Pick up 5 gearwheel 18 switch 6 iron chip 19 Five pin flat plug 7 Immobility mechanism equipment 20 screw 8 Magnet 21 PCB 9 Platen 22 motor 10 Bridge bracket 23 Motor wheel 11 screw 24 screw 12 screw 25 tray 13 Big bracket Before going process with disassembly and installation please carefully both peruse the chart and confirm the materials 5 3 MISCELLANE
27. IC DIAGRAM 36 10 SPARE PARTS LIST DV323S MATERIAL LIST 1 MAIN PANEL MATERIAL CODE MATERIAL NAME SPECIFICATIONS UNIT ANTI LOCATION CONNECT DISPLAY 5231783 SOFT SPONGE SPACER 16x8x4 DOUBLE FACED HARD SCREEN AND PANEL PCB 0090023 RESISTOR SMD RESISTOR iens fre amer aan aji 1 POWER BOARD 0000278 CARBON FILM RESISTOR 1 4 3300 5 SHAPED 10 METAL OXIDE FILM o 0010134 RESISTOR 1W330Q 5 SHAPED R 15x8 RS11 0010128 METAL FILM RESISTOR 14W 3 9K 2156 SHAPED 10 0200138 PORCELAIN CAPACITOR 50V 104220 Smm PS _4_ Cs0a csua csin csis PORCELAIN CAPACITOR PORCELAIN CAPACITOR 1000 101 10 7 5mm PORCELAIN CAPACITOR 1000 103 80 20 7 5mm 250VAC221210 10mm TERYLENE CAPACITOR 275 104 20 15mm 0210070 TERYLENE CAPACITOR 78 104 210 15mm 50 470220766 1225 Pes 2 0260527 CD294 400 470 20 22 25 10 PCS 1 501 MAGNETIC BEADS 0390057 INDUCTOR RH354708 Em L503 0410010 CHOKE COIL VERTICAL 10UH 1A 5mm PCS 1 11505 0410011 VERTICAL 10UH 2A 5mm L506 L507 SWITCHING POWER 0460282 TRANSFORMER BCK 28 0286 T501 SWITCHING POWER 0460283 TRANSFORMER BCK2801 624 T501 3 0570013 DIODE HER105 PCS 3 10506 0508 0511 0570028 DIODE HER306 PCS 1 D510 680007 SCHOTTKY DIODE SR360 PCS 1 0509 0570014 DIODE HER107 D505 0570005 DIODE 1N4007 PCS 4 0501 0504 DE PCS 1 1 VOLTAG
28. LACE ONLY WITH SAME TYPE F501 T1 6AL 2500 FUSE R509 HIGH VOLTAGE DGND 3 3V L508 T501 1507 j E ye ducts Dad 9 cupo E i 0504 CN503 TC506 R520 Ro SR NM F 90512 l 2 3 i See m c e BC503 Aa 1 CN501 4 5 R506 24 OUTPUT BOARD SCHEMATIC DIAGRAM VLOr VOU or O 501 91 410001 490001 TOLOL 01 410001 TOLOL pepe TovsX IVOLIdO SOLME ANDA IZ6ESTA 20 501 91 4102 90 21 91 410001 SOLOL 501 3 0508 0508 A TT 12100214 rn ns jr ip qe Sa e 6 9 5 12 t 4 25 OUTPUT BOARD SCHEMATIC DIAGRAM 26 SUBSIDIARY BOARD 1 596 505 IO4SX JIN N N 3 1 OI 301 XIN TOTAA TORIA 27 OK SUBSIDIARY BOARD Z N N 2003 6 2 FUCHE OS lt N 59 SN 28 SUBSIDIARY BOARD 1
29. ON XSA01 ses p 43380 2100004 CONNECTION CORDS 0 6 SHAPED 10mm JP601 2100003 CONNECTION CORDS 0 6 SHAPED 7 5mm JP602 JP604 1980046 HEADPHONE SOCKET ST 301 030 100 1 SUBSIDIARY OK BOARD MATERIAL CODE MATERIAL NAME SPECIFICATIONS UNIT ANTI LOCATION ROTATED 0160159 SOTENTIOMETER WHE101N 2 B10K 20 2 ROTATED 0160160 POTENTIOMETER WHE101N 2 B50K 20 VRB01 5 100 2 0 2PLUG WITH L NEEDLE 2120397 FLAT CABLE REVERSE 1 XSB01 38 1562556 1 OK BOARD P MATERIAL CODE 0090014 0000022 0000133 0090020 90023 0000040 0090026 0000118 0090024 0090188 0000048 0090189 0310047 0310197 0310072 0310207 0310323 0260127 390057 0880124 0880230 1562466 2120807 d 1 AV BOARD 0000171 0090181 0000181 0000185 0000268 0090014 0000167 90017 0090019 0090006 0310066 310234 0200138 0200139 0310057 0780050 390057 1090045 1090024 1910094 1910062 1860029 1940140 626 622 628 PCs 1 Reis SMD RESISTOR 1 16W 10K 5 5 SMD RESISTOR CARBON FILM RESISTOR R632 R633 SMD RESISTOR 2 R614 R618 SMD RESISTOR CARBON FILM RESISTOR SMD RESISTOR SMD CAPACITOR 50v 1014894 NPO 0603 Pcs 4 607 600 605 606 610 612 SMD CAPACITOR 50V 103 10 0603 8 4 603 604 616 619 C601 C602 C609 C622 C623 0 3 SMD CAPACITOR 50V104 20 0603 PCS C613 C614 SMD CAPACITOR ______ 392 10 0603 res 2
30. OUS 5 3 1 Protection of the LD Laser diode Short the parts of LD circuit pattern by soldering Soldered short pattern for laser diode CD Soldered short pattern for laser diode DVD 5 3 2 Cautions on assembly and adjustment Make sure that the workbenches jigs tips tips of soldering irons and measuring instruments are grounded and that personnel wear wrist straps for ground Open the LD short lands quickly with a soldering iron after a circuit is connected Keep the power source of the pick up protected from internal and external sources of electrical noise Refrain from operation and storage in atmospheres containing corrosive gases such as 25 502 NO2 and Cl2 or toxic gases or in locations containing substances especially from the organic silicon cyan formalin and phenol groups which emit toxic gases It is particularly important to ensure that none of the above substances are present inside the unit Otherwise the motor may no longer run 6 Electrical Confirmation 6 1 Video Output Luminance Signal Confirmation DO this confirmation after replacing a P C B Measurement point Color bar 75 DVDT S15 Video output terminal PLAY Title 46 DVDT S15 Or PLAY Title 12 801 DVDT S01 Measuring equipment tools Confirmation value 200mV dir 10 sec dir 1000mVp p 30mV Purpose To maintain video signal output compatibility 1 Connect the oscilloscope to the video output terminal
31. SERVICE MANUAL DV323S O 241 5 2 5 3 6 1 6 2 7 8 8 1 8 2 9 SCHEMATIC WIRING DIAGRAM 10 CONTENTS SAFETY PRECAUTIONS dE E SAU SORE RCE APT OU oer PREVENTION OF ELECTRO STATIC DISCHARGE ESD TO ELECTROSTATICALLY SENSITIVE ES DEVICES CONTROL BUTTON LOCATIONS AND EXPLANATIONS ten PREVERTION OF STATIC ELECTRICITY DISCHARGE eere nnn ASSEMBLING AND DISASSEMBLING THE MECHANISM UNIT OPTICAL PICKUP UNIT EXPLOSED VIEW AND PART LIST e BRACKET EXPLOSED VIEW AND PART LIST J IHR MISCELLANECHAS ____ __________ ELECTRICAL CONFIRMATION naa Pra au VIDEO OUTPUT LUMINANCE SIGNAL CONFIRMATION m VIDEO OUTPUT CHROMINANCE SIGNAL CONFIRMATION MPEG BOARD CHECK WAVEFORM oar e pera aida mt 1 4251 6101 UNIO LII UL 1389 OR ena Re SPARE PARTS LIST Cee rin jah a a aa hada AY 1 SAFETY PREAUTIONS 1 1 GENERAL GUIDELINES 1 When servicing observe the original lead dress if a short circuit is found replace all parts which have been
32. nally generated and regulated voltages are pro vided for program and erase operations so that the device does not require a higher voltage power supply to perform those functions The de vice can also be programmed in standard EPROM programmers Access times as low as 65 ns over the full operating voltage range of 2 7 3 6 volts are offered for timing compatibility with the zero wait state requirements of high speed micropro cessors To eliminate bus contention the HY29LV800 has separate chip enable CE write enable WE and output enable OE controls The device is compatible with the JEDEC single power supply Flash command set standard Com mands are written to the command register using standard microprocessor write timings They are then routed to an internal state machine that con trols the erase and programming circuits Device programming is performed a byte word at a time by executing the four cycle Program Command write sequence This initiates an internal algorithm that automatically times the program pulse widths and verifies proper cell margin Faster program ming times can be achieved by placing the HY29LV800 in the Unlock Bypass mode which requires only two write cycles to program data in stead of four The HY29LV800 s sector erase architecture allows any number of array sectors to be erased and re programmed without affecting the data contents of other sectors Device erasure is initiated by executing
33. nd 120 ns access time versions Ultra low Power Consumption Typical Values At 5 Mhz Automatic sleep mode current 0 2 HA Standby mode current 0 2 HA Read current 7 mA Program erase current 15 mA B Flexible Sector Architecture One 16 KB two 8 KB one 32 KB and fifteen 64 KB sectors in byte mode One 8 KW two 4 KW one 16 KW and fifteen 32 KW sectors in byte mode Top or bottom boot block configurations available B Sector Protection Allows locking of a sector or sectors to prevent program or erase operations within that sector Sectors lockable in system or via programming equipment Temporary Sector Unprotect allows changes in locked sectors requires high voltage on RESET pin B Fast Program and Erase Times Sector erase time 0 7 sec typical for each sector Chip erase time 14 sec typical Byte program time 9 ps typical B Unlock Bypass Program Command Reduces programming time when issuing multiple program command sequences B Automatic Erase Algorithm Preprograms and Erases Any Combination of Sectors or the Entire Chip B Automatic Program Algorithm Writes and Verifies Data at Specified Addresses B Compliant With Common Flash Memory Interface Specification Flash device parameters stored directly on the device Allows software driver to identify and use a variety of different current and future Flash products Product Brief Revision 1 March 2000 11 HY
34. ng DVD player SOC architecture the MT1389 is the 3 generation of the DVD player SOC It integrates the MediaTek 274 generation front end analog RF amplifier and the Servo MPEG AV decoder The progressive scan of the MT1389 utilized a proprietary advanced motion adaptive de interlace algorithm to achieve the best movie video playback It can easily detect 3 2 2 2 pull down source and restore the correct original pictures It also supports a patent pending edge preserving algorithm to remove the saw tooth effect Key Features RF Servo MPEG Integration CVBS Y C m High Performance Audio Processor Component m Motion Adaptive Edge Preserving De interlace m 108MHz 12 bit 6 CH TV Encoder MT1389L Applications Audio DAC Standard DVD Players m Portable DVD Players Front panel Remote DRAM DVD Player System Diagram Using MT1389 18 MEDIATEK MT1389 PRELIMINARY SUBJECT TO CHANGE WITHOUT NOTICE MTK CONFIDENTIAL NO DISCLOSURE General Feature List 1024 bytes on chip RAM W Super Integration DVD player single chip Up to 4M bytes FLASH programming High performance analog RF amplifier Servo controller and data channel processing 1 2 PEG video Dolby AC 3 DTS DVD Audio Unified memory architecture Versatile video scaling amp quality enhancement OSD amp Sub picture 2 D graphic engine Built in clock generator Built in high quality TV encoder
35. ntrols writing of commands or command sequences WE Input in order to program data or erase sectors of the memory array A write operation takes place when WE is asserted while is Low and OE is High Hardware Reset active Low Provides a hardware method of resetting the RESET Input HY29LV800 to the read array state When the device is reset it immediately terminates any operation progress While RESET is asserted the device will be in the Standby mode Output Ready Busy Status Indicates whether a write or erase command is in RY BY progress or has been completed Remains Low while the device is actively Open Drain A programming data or erasing and goes High when it is ready to read array data Voc 3 volt power supply Vas Power and signal ground PB r1 0 Mar 00 13
36. ock input for this device Except for CKE all inputs to this device are acquired in synchronization with the rising edge of this pin cs Input Pin The CS input determines whether command input is enabled within the device Command input is enabled when CS is LOW and disabled with CS is HIGH The device remains in the previous state when CS is HIGH 2 3 5 6 8 9 11 12 39 40 42 43 45 46 48 49 1 00 to 1015 Pin 1 00 to 1 015 are I O pins I O through these pins can be controlled in byte units using the LDQM and UDQM pins 14 36 LDQM UDQM Input Pin LDQM and UDQM control the lower and upper bytes of the I O buffers In read mode LDQM and UDQM control the output buffer When LDQM or UDQM is LOW the corresponding buffer byte is enabled and when HIGH disabled The outputs go to the HIGH impedance state when LDQM UDQM is HIGH This function corre sponds to OE in conventional DRAMs In write mode LDQM and UDQM control the input buffer When LDQM or UDQM is LOW the corresponding buffer byte is enabled and data can be written to the device When LDQM or UDQM is HIGH input data is masked and cannot be written to the device 17 RAS Input Pin RAS in conjunction with CAS and WE forms the device command See the Command Truth Table item for details on device commands 15 Input Pin WE in conjunction with RAS and CAS forms the device command See the Command Truth Table
37. odify the original design without permission of manufacturer 3 Control Button Locations and Explanations Front Panel Illustration 9060006 lt 0 POWER switch STOP button 4 VOLUME knob Q Disc tray Q REV button p ECHO adjustment knob OPEN CLOSE button FWD button IR SENSOR PLAY button MIC 1 jack LED display window PAUSE button 2 jack Headphone jack 4 PREVENTION OF STATIC ELECTRICITY DISCHARGE The laser diode in the traverse unit optical pickup may brake down due to static electricity of clothes or human body Use due caution to electrostatic breakdown when servicing and handling the laser diode 4 1 Grounding for electrostatic breakdown prevention Some devices such as the DVD player use the optical pickup laser diode and the optical pickup will be damaged by static electricity in the working environment Proceed servicing works under the working environment where grounding works is completed 4 1 1 Worktable grounding 1 Put a conductive material sheet or iron sheet on the area where the optical pickup is placed and ground the sheet 4 1 2 Human body grounding 1 Use the anti static wrist strap to discharge the static electricity from your body safety 3 1577x409x2 tiff Anti static wrist strap 1MQ
38. one control Vocal mute vocal assistant Key shift up to 8 keys Chorus Flanger Harmony Reverb Channel equalizer 30 surround processing include virtual surround and speaker separation 20 MT1389 MTK CONFIDENTIAL NO DISCLOSURE W TV Encoder Six 108MHz 12bit DACs Support NTSC PAL BDGHINM PAL 60 Support 525p 625p progressive TV format Automatically turn off unconnected channels Support PC monitor VGA Support Macrovision 7 1 L1 Macrovision 525P and 625P CGMS A WSS Closed Caption W Progressive Output Automatic detect film or video source 3 2 pull down source detection Advanced Motion adaptive de interlace Edge Preserving Minimum external memory requirement W Audio Input Line in SPDIF in for versatile audio processing Outline 256 pin LQFP package 3 3 1 8 Volt Dual operating voltages FRONT SCHEMATIC DIAGRAM 9 S z 1 0 896 000 00 00 00 0000000 U D ug 0 0 0000 00 00 E EE eggs cg seg EI E CC UE 1 100 BER 2 a ela el EX 1
39. uffer Memory Controller Supports 16Mb 32Mb 64Mb 128Mb SDRAM Supports 16 bit SDRAM data bus Provide the self refresh mode SDRAM Block based sector addressing Support 3 3 Volt DRAM Interface Video Decode Decodes MPEGI video and MPEG2 main level main profile video 720 480 and 720x576 Smooth digest view function with P and B picture decoding Baseline extended sequential and progressive PEG image decoding Support CD G titles Video OSD SPU HLI Processor Arbitrary ratio vertical horizontal scaling of video from 0 25X to 256X 65535 256 16 4 2 color bitmap format OSD 256 16 color RLC format OSD Automatic scrolling of OSD image Slide show transition as DVD Audio Specification 2 D Graphic Engine Support decode Text and Bitmap Support line rectangle and gradient fill Support bitblt Chroma key copy operation Clip mask PRELIMINARY SUBJECT TO CHANGE WITHOUT NOTICE Audio Effect Processing Dolby Digital AC 3 EX decoding DTS DTS ES decoding MLP decoding for DVD Audio MPEG 1 layer 1 layer 2 audio decoding MPEG 2 layerl layer2 2 channel audio High Definition Compatible Digital HDCD Windows Media Audio WMA Advanced Audio Coding AAC Dolby ProLogic 1 Concurrent multi channel and downmix out 60958 61937 output PCM bit stream mute mode Custom IEC latency up to 2 frames Pink noise and white noise generator Karaoke functions Microphone echo Microphone t
40. ultaneously and Independently PIN CONFIGURATIONS e Dual internal bank controlled by A11 bank select 0 TSOP 2 Single 3 3V power supply LVTTL interface Programmable burst length 1 2 4 8 full page Programmable burst sequence Sequential Interleave Auto refresh self refresh 4096 refresh cycles every 64 ms Random column address every clock cycle Programmable CAS latency 2 clocks Burst read write and burst read single write operations capability Burst termination by burst stop and precharge command e Byte controlled by LDQM and UDQM Package 400mil 50 pin TSOP 2 PIN DESCRIPTIONS AO A11 Address Input CAS Column Address Strobe Command 0 10 Row Address Input WE Write Enable 11 Bank Select Address LDQM Lower Bye Input Output Mask 0 7 Column Address Input UDQM Upper Bye Input Output Mask 1 00 to 1 015 Data CLK System Clock Input GND Ground CKE Clock Enable VccQ Power Supply for Pin cs Chip Select GNDQ Ground for I O Pin RAS Row Address Strobe Command NC No Connection ICSI reserves the right to make changes to its products at any time without notice in order to improve design and supply the best possible product We assume no responsibility for any errors which may appear in this publication Copyright 2000 Integrated Circuit Solution Inc Integrated Circuit Solution Inc 1 5 08025 0 04 15 2002 425

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