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1. 3 5 HP IB Logic AMD 3 5 Operating Environment 3 6 3 6 Humidity 3 6 Instrument 3 6 Claims and Repackaging Y senis aros 3 6 Storage and Shipment 3 7 Return Shipment HP 3 7 4 Operating Introduction 4 1 Switching On Ave 3 4 2 ErorCodes 4 2 Standard Parameter 4 4 Selecting Trigger Mode 4 5 Mode Selection 4 5 Controlling the External Trigger 4 6 Trigger Slope 4 6 Trigger Level 4 6 Manual Trigger 4 6 Single Pulse T PULSE 4 6 Trigger 4 6 Selecting Control Mode 4 7 Control Input 4 7 Mode Selection 4 8 Period Control PERC 4 8 Delay Control DELC 4 8 Width Control WIDC 4 8 High Level Control 4 8 Setting Transition Modes 4 10 Fixed 4 10 Linear a 4 10 Gaussian I 4 10 Transition Ranges 4 11 Contents 2 Up and Down ranging Using the VERNIER keys Up and
2. 20 dB Attenuator with BNC SMA Adaptor Figure 8 9 Transition Times Performance Test Procedure 1 Connect the equipment as shown in the setup figure above 2 Set up the HP 81124 as follows Input Mode NORM Control Mode Off PER 100 ns DEL 65 ns DTY 5096 HIL 1 00 V LOL 0 00 V 8 14 Testing Performance Note 9 Note y Fast transitions m Verify that for the following HP 8112A settings the sampling scope display indicates the transition times are within the specified limits m Record your results on a copy of the Test Record specified limits are given here and on the Test Record HP 8112 Oscilloscope setting Transition PER LEE TRE Limit High Limit Fixed 5 0 ns typical 16 5 ns 8 825 ns Linear 100 ns 6 5 ns Under programming to 5 5 ns is permissible to meet this specification Slow transitions Set up the HP 81124 as follows Input Mode NORM Control Mode Off PER 2 ps DEL 65 ns DTY 50 Transition Linear HIL 5 00 V LOL 0 00 V m For the HP 8112A to the settings in the table below measure the displayed leading edges LEE and trailing edges TRE m Verify that the transition times do not exceed the specified limits m Record your results on a copy of the Test Record specified limits are given here and on the Test Record The oscilloscope response is very slow for measurements with PER in the ms range The HP 54503 the HP 54100D
3. Standard Instrument Parts lists Master List Table A 2 Standard HP 8112A Master Parts List Reference HP Part CD Qty Description Manufr 0 8112 8 1 PROGRAMM PULSGEN 28480 0 1 08112 66521 3 1 BD AY MAIN 28480 08112 66511 AO A2 08112 66502 2 1 BD AY CONTROL 28480 08112 66502 A0 A3 08112 66535 0 1 BD AY MICROPROCR 28480 08112 66534 AO A4 08112 66504 4 1 BD AY KEY 28480 08112 66504 A0 A5 08112 66505 5 1 BD AY DISPLAY 28480 08112 66505 A0 B1 3160 0497 2 1 FAN TBAX 11039 612 A0 C1 0160 4323 8 1 0 047uF 0 V 11892 PME271M547M A0 F1 2110 0043 8 1 FUSE 1 5A 250V 04703 312 01 5 AO 71 1250 0083 1 1 BNC 05879 31 221 1020 AO 12 1250 0083 CONN RF BNC 05879 31 221 1020 0 J3 1250 0083 CONN RF BNC 05879 31 221 1020 0 J4 1250 0083 CONN RF BNC 05879 31 221 1020 28480 5041 0531 28480 5040 9317 A0 1 5041 0531 A0 MP2 5040 9317 LABEL INFO 05584 28480 08112 00204 28480 5021 8413 BEZEL REAR 28480 5021 5814 HEATSINK POWER 28480 08112 21105 A0 MP3 4040 1971 AO 4 08112 00204 A0 5021 8413 AO 8 03478 88304 AO 11 08116 21107 co c A0 14 08116 04154 AO 15 5040 1136 0 16 08112 00601 0 19 08116 21102 0 20 5001 0538 KEEPER 28480 08112 04154 28480 5040 1136 28480 0
4. Standard Instrument Parts lists Master Lists ee Main Board Control Board Microprocessor Board Keyboard ve oy Display Board Backdating Introduction Updating Introduction Sales and Service Offices Information a or hoe datis Meg d Canadian exuere eeu it Eastern Europe Northern South East Europe Middle East and Central Africa United Kingdom United States of America Southern USA Western USA Index D 1 D 1 D 1 D 1 1 2 2 2 2 2 2 2 3 Figures 1 1 Serial Number Plate 1 1 3 1 Line Voltage Selector Switches 3 2 3 2 Power Cables amp Plug Identification 3 3 3 3 Connector 3 5 4 1 HP 8112A Front Panel 4 2 4 2 Trigger Mode Controls 4 5 4 3 External Trigger Controls 4 6 4 4 Control mode controls 4 T 4 5 Relationship Between Control Input Voltage and Controlled Parameter 4 7 4 6 High Level Control Capabiliti
5. 10 3 2 Timing Generation 10 3 3 RATE Mode Der ur 10 3 4 Contents 9 Contents 10 10 4 Outputs woe Error Output Period Delay and Width Generation Period Generator Delay Generator Width Generator Slope Generation eee Fixed Transition ee ee Linear and Gaussian Transitions Current Sources Range Switches Reference Circuit en Error Feedback Rinks Are dire Ven ts Troubleshooting cre Address Decoder Control Mode Selection Period Generator Delay Generator Width Generator Slope Generator Range Decoder Example Tp Servicing the Shaper and Output Amplifier Theory of Operation Introduction Bus Latch 5 52 aoe wx dos Shaper IC os vo ete ce ES nde ceu Wave Forming Output Mode Shaper Output arash mw Current Pre Attenuator Signal Output Amplifier WU Voltage
6. N C les es D Tat 1 nom 5 2v 5 2v CONTROL MODE SELECTOR FROM 0101 6 FROM 0101 5 MODEL 112 1 MAIN BOARO A1 SCHEMATIC 3 SERVICING THE TIMING SLOPE GENERATORS 10 3 9 P O A1 MAIN BOARD FROM A2 CONTROL BOARD 6 ss mp O IEEE 1 PERIOD GENERATOR Te qp p criss il 14 V V V l 145 ERROR FEEDBACK Eo 5 25 5 LD LD2 107 NE E 08143 6 18 V V V sv 42 v V mi AUTO VERNIER 7 3 FEEDBACK 107 crise M 18 V V I DELAY 3ENERATOR WIDTH GENERATOR Bel P RED en V 2 gt 129 je 186 09248 OR241 4 4 M 9 VV FIGURE 10 3 5 MAIN BOARD 1 SCHEMATIC 4 SERVICING THE TIMING AND SLOPE GENERATORS 10 3 11 N 1 P O A1 MAIN BOARD RAMP CURRENT SOURCES RAMP 15 IDOWN REF iaa JPL e REF 5 2 CONTROL BOARD ase FA 22 gt iine aa gt 21DOWN R32 zxeoa 3 41467 3 4 SERVICE MP CURRENT SOURCES REFERENCE R315 68 1
7. 1 C414 10160 5738 1 6 8pF 100 V 06121 B37979 J1060 D834 1 415 0160 5731 4 1 CAP 220pF 100 V 06121 B37986 J1221 J034 1 C501 0160 5742 7 27pF 100 V 106121 B37979 J1270 J034 1 502 0160 4512 7 1 CAP 120pF 200 V 02010 SR202A121JAAH 1 C503 0160 3879 7 1 0 0luF 100 V 02010 SR201C103MAAH A 10 Replaceable Parts Table A 3 Main Board Parts List continued 1 CAP O 01uF 100 V 02010 SR201C103MAAH 1 2200pF 100 02010 SR201C222MAAH 1 1000pF 100 02010 SR201C102MAAH 1 0 47uF 50 02010 SA305E474MAAH 1 0 47uF 50 02010 SA305E474MAAH Al C504 0160 3879 7 1 C505 0160 0572 1 1 C506 0160 3878 6 1 C507 0160 6596 1 1 C508 0160 6596 1 1 C509 0160 3878 1 510 0160 3878 1 C511 0160 3879 1 512 0160 5746 1 513 0160 5746 1000 100 02010 SR201C102MAAH 1000pF 100 02010 SR201C102MAAH 0 01uF 100 V 02010 SR201C1035MAAH 0 luF 50 V 06121 37987 5104 11 CAP 0 luF 50V 06121 37987 5104 1 CAP 0 1uF 50 V 06121 B37987 T5104 M11 CAP 0 1uF 50 V 06121 37987 5104 11 CAP 0 1uF 50 V 06121 B37987 T5104 M11 CAP 0 1uF 50 V 06121 B37987 T5104 M11 CAP 0 14 50 V 06121 B37987 T5104 M11 1 514 0160 5746 Al C515 0160 5746 1 516 0160 5746 1 C517 0160 5746 1 518 0160 5746
8. R112 C1 13208 SU law BB mss Sm De C316 0304 15 Rs66 p 8401 16318 crs 1 D2 0305 116 931 2 527 Use FIGURE 10 4 12 MAIN BOARD Al COMPONENT LOCATOR SERVICING THE SHAPER AND OUTPUT AMPLIFIER 10 4 19 10 5 Servicing the Control Board Theory of Operation Introduction Timer Note Address Decoders The main function of the control board A2 is to convert digital control data into analog control signals used on the main board Al The main board supplies power to the control board and the microprocesor board A3 supplies the digital control data The standard control board is divided into the following areas m Timer circuit m Address decoders m Timing range decoder DAC Reference circuit Digital to Analog Converters DACs m Byte Offset and Offset DAC m Parameter control Refer to Figure 10 5 3 The timer circuit U26 and associated components provides the Non Maskable Interrupt signal NMI used by the microprocessor to produce the flashing error display when an error condition is detected The 555 timer is configured as an astable multivibrator which produces an output of approximately 100 Hz when enabled when TIRE is active low RESET is held high for a short time at instrument switch on to disable the timer so that NMI cannot be transmitted before the power supplies
9. dr We poke ER v Equipment Introduction to Servicing Safety Considerations Safety Check mar aortu Gener l 28 ap un Instrument Overview and Troubleshooting Guide Theory of Operation Troubleshooting Preparing the HP 8112 for servicing Key Jammed hoa ios A equus RAM Test scu coe Arx eges PO Voces Mee ups qud Timing Tests 9 1 9 1 9 4 9 4 9 4 9 4 9 4 9 5 9 5 9 5 9 6 9 6 9 7 9 7 9 7 9 10 9 10 9 10 9 10 9 11 9 13 9 13 9 13 9 15 9 15 9 15 9 15 9 16 9 17 9 17 9 18 9 19 9 19 9 19 10 1 10 1 10 3 10 1 1 10 1 3 10 1 3 10 1 5 10 1 5 10 1 5 10 1 5 10 1 5 xen 10 1 5 12 MP Pac 10 1 5 Sod UI 10 1 5 Y eser 10 1 5 Output Amplifier Tests 10 1 7 E21 EPIRI 10 1 7 10 1 7 Overall Tests Static 10 1 7 oem DESEAS NS 10 1 7 E321 eb SIE 10 1 7 o bw und 10 1 7 10 1 7 Overall Tests Dynamic 10 1 7 E35 ge Gy Ge EUR mona 10 1 7
10. O 1luF 50 06121 37987 5104 1 2 C108 0160 5746 1 1 O 1luF 50 V 06121 37987 5104 1 A2 C109 0160 5746 1 1 0 luF 50V 06121 37987 5104 11 2 C110 10160 5746 1 1 CAP 0 luF 50 V 06121 37987 5104 1 20111 0160 5746 1 1 O 1uF 50 V 06121 B37987 T5104 M11 2 1 1901 0535 9 1 DIO SCHOTTKY SM 02062 50825511 A2CR2 1901 0535 9 1 DIO SCHOTTKY SM 02062 50825511 2 1901 0535 9 1 DIO SCHOTTKY SM 02062 50825511 A2CR4 1901 0535 9 1 DIO SCHOTTKY SM 02062 50825511 2 5 1901 0535 9 1 DIO SCHOTTKY SM 02062 50825511 A2CR6 1901 0535 9 1 DIO SCHOTTKY SM 02062 50825511 2 1901 0535 9 1 DIO SCHOTTKY SM 02062 50825511 A2 1901 0535 9 1 SCHOTTKY SM 02062 50825511 A2 J4 1251 3119 2 1 CONN POST TP HDR 04726 3428 2002 A2 J5 1251 3119 2 1 CONN POST TP HDR 04726 3428 2002 2 1100 9170 0029 3 1 CORE SHLD BEAD 04822 57 3452 A2 PI 1258 0124 7 1 SHUNT PROGRAMMAB 05518 8136 475G1 A2 01 1853 0569 6 1 XSTR PNP SI 02037 XSTR NPN SI DARL 02037 5 14 XSTR NPN SI DARL 02037 5 14 XSTR PNP SI 02037 2N3906 SEL XSTR NPN SI 02037 2N3904 NETWORK RES SIP 05524 5 10 01 A2 Q2 1854 0472 A2 Q3 1854 0472 2 0100 1853 0563 2 0101 1854 1028 A2 R1 1810 0277 A2 R2 0698 3153 9 1 RE
11. Screen dump of the results printed the program INTERROG Program listing Testing Performance Introduction Test Equipment Period Performance Test Specifications Equipment bs DRIN Test Procedure E Delay Performance Test we Specifications Equipment Test Setup Procedure Double Pulse Performance Test Specifications Equipment diese Test Setup 1 Test Setup 2 Procedure 225244 Pulse Width Performance Test Specifications Equipment Test Setup 1 Test Setup2 Procedure Constant Duty Cycle Performance Test Specifications vs Equipment Test Setup Procedure Output Levels Performance Test Specifications values in parenthesis into open Equipment Test Setup Procedure Transition Time Performante Test Specifications Equipment Test Setup Procedure Fast transitions Slow transitions Pulse Performance Test 1 16 7 18 7 18 7 18 7 18 7 18 8 1 8 2 8 3 8 3 8 3 8 3 8 4 8 4 8 4 8 5 8 6 8 6 8 6 8 6 8 7 8 7 8 8 8 8 8 9 8 9 8 9 8 9 8 10 8 10 8 11 8 11 8 11 8 12 8 12 8 12 8 12 8 12 8 14 8 14 8 14 8 14 8 14 8 15 8 15 8 16 Specifications 0 Equipment Test Setup n Procedure vu upper quita Trigger Gate E Width and E
12. VERNIER RANGE OLOL Ls feh 7 2521 4212 Joh STO RCL LIMIT COMPL DISABLE eh BrE 210 0 120v INPUT LEVEL CTRL TRIG INPUT OUTPUT 20V 10V 410 on Figure 4 1 HP 8112A Front Panel Switching On 4 2 Operating E01 E11 E12 E13 E14 The HP 8112A performs a self test when the power is switched on All the front panel LEDs should light momentarily If a fault is detected the word ERROR is illuminated and an error code is displayed on the front panel digital display The possible error codes are A key is stuck in the depressed position Fail RAM test Fail Period Timing test Fail Delay Timing test Fail Width Timing test Fail Slope Generation test E21 E22 E31 to E39 E41 42 E51 and 52 Fail Output Amp Offset test Fail Output Amp ve Offset test Fail Overall tests The output amplifier is faulty Fail Burst Counter tests Refer to Chapter 10 1 Troubleshooting for more information on the error codes and their causes When the self test is completed successfully the instrument automatically assumes the operating state which was active when it was last switched off except that the output is disabled to protect the unit under test If the instrument battery has failed the Standard Parameter Set is selected Operati
13. e WS 4285 10 1 9 10 1 9 985250 12 08 eure ded uda 10 1 9 gt Sesto ness 10 1 9 Amplitude Tests 10 1 9 a 08258 10 1 9 Shaper Output State 10 1 9 E422 25 ctu un em ae RUNI REV ee DS RATED 10 1 9 Burst T sts 254 10 1 9 EST dL 02023 tee Se I ee tee 10 1 9 E520 web xen 10 1 9 10 2 Servicing the Power Supply Theory of Operation 10 2 1 Introduction 10 2 1 Line Voltage Selector and Transformer 10 2 1 Bridge Rectifiers and Regulators 10 2 1 Voltage and Current Sensing Circuits 10 2 2 5 1 supply iod e e 10 2 2 5 Vsupply d eh do oats 10 2 2 5 4 V supply 10 2 2 Power down Detection 10 2 3 Troubleshooting Power Supply 10 2 9 Removing the fan 10 2 9 the fan 10 2 9 10 3 Servicing the Timing and Slope Generators Theory of Operation 10 3 1 10 3 1 Trigger Input 48x 10 3 1 Trigger mode 0 2 10 8 1 Address Decoder 1032 Mode and Range Decoders 1032 Control Input Circuits 10 3 2 293
14. Alter HP 8112A PER to 5 0 ms Check that the mid range deviation is about the same as the low high range BUT negative See Figure 9 4 Note 49 10 If necessary repeat steps 1 to 9 to achieve an equal and opposite percentage deviation up to 1 5 If the adjustment is not possible alter the value of A2VR2 R62 See table 9 1 and repeat steps 1 to 9 11 12 13 14 15 16 17 Alter HP 8112A PER to 20 ns Adjust the range high end with A2R3 for 19 5 ns 40 2 ns Alter HP 8112A PER to 99 9 ns Adjust the range low end with A2R57 for 102 5 ns 40 2 ns Alter HP 8112A PER to 50 ns Check that the mid range reading for 50 ns 215 If necessary repeat steps 1 to 17 and adjust if necessary Delay Double Pulse 18 19 20 21 22 23 24 25 26 27 Set up the HP 8112 as follows Trigger Mode NORM Control Mode Off PER 50 ms DEL 1 ms DTY 2096 Transition Fixed HIL 43 0 V LOL 0 0 V COMPL Off DISABLE Off LIMIT Off Set the counter as follows Time interval Trigger both chan 2 50 9 Connect HP 8112A Trigger Output to channel A of counter Connect HP 8112A Output to channel B of the counter Set trigger levels to trigger at about 50 of amplitudes The typical DELAY DBL range characteristic is similar to that shown in Figure 9 5 Adjust the range high end with A2R14 for approx 1 above the programmed value i e 1 01ms Alter HP 8112A DEL
15. ERROR OUT 2 cee NEC CURRENT REF LNOTE Ext TIMING IC Figure 10 1 2 Custom ICs used in the HP 8112A Instrument Overview and Troubleshooting Guide 2 U 7 0000000000000 0 n Trouble shooting Every time the instrument is switched on or when an EST command is received on the HP IB the HP 8112A executes self test If a fault is detected an error code is displayed otherwise the instrument is ready for operation The error code can be used to locate the fault by referring to the following flowchart If more than one fault exists only the first one is detected and displayed After this is successfully repaired the self test will be able to proceed further and detect other remaining faults Preparing the HP 8112A The HP 8112A contains static sensitive devices for servicing An Ensure that static safe precautions are taken to Static Sensitive prevent electro static discharge when the instrument covers are removed 1 Remove the rear of the instrument by unscrewing the two TORX fastening screws 2 Remove the single screw securing the instrument s case underneath the instrument 3 Remove the case by sliding it backwards You may need to use a screwdriver in one of the case ventilation holes to gently lever the case back It is held tightly by RFI seals at the front of the frame 4 Remove the four screws securing the microprocessor board 5 Lift the microprocesso
16. Change 51 Capacitor added on back of board from 1100 Pin 12 to 5 V rail to suppress spikes For instruments with serial number 2851G07980 and lower make the following changes to the appropriate parts lists Main Board In Appendix A Table A 3 delete Reference Description HP Part Al 08112 66511 C141 Capacitor 3 3 pF 0160 4382 Change 52 Changed component values to increase adjustment range For instruments with serial number 2851G08630 and lower make the following changes to the appropriate parts list Main Board In Appendix A Table A 3 modify Reference Description HP Part 1 08112 66511 R410 Resistor 500 9 2100 0554 R411 Resistor 2 61 k 0698 7246 ed Change 53 Heatsink added to Q282 For instruments with serial number 2851G08780 and lower make the following changes to the appropriate parts list Main Board In Appendix A Table A 3 delete Reference Description HP Part 1 08112 66511 201 Heatsink 1205 0235 B 34 Backdating 252 Change 54 Main Board Main Board Heatsink changed Q505 and Q506 a capacitor added between Q282 collector and ground to improve trigger output For instruments with serial number 2851G08949 and lower make the following changes to the appropriate parts list In Appendix A Table A 3 modify Reference Description HP Part Al 08112 66511 MP500 Heatsink 08116 04151 In Appendix A Table A 3 delete
17. Table A 3 Main Board Parts List continued 1853 0312 1854 0597 1854 0477 1854 0597 1853 0312 1854 0597 1853 0312 1854 0597 1853 0312 1853 0563 1854 1028 1854 1028 1853 0563 1854 1028 1854 1028 0764 0013 0812 0111 0698 4508 0698 0085 0812 0045 0757 0460 0698 0085 0698 0085 0757 0464 0812 0111 0698 4460 2100 3211 0757 0401 0698 6320 0698 6320 c t2 t5 XSTR PNP SI XSTR NPN 2N5943 XSTR NPN 2N2222A XSTR NPN 2N5943 XSTR PNP SI XSTR NPN 2N5943 XSTR PNP SI XSTR NPN 2N5943 XSTR PNP SI XSTR PNP SI XSTR NPN SI XSTR NPN SI XSTR PNP SI XSTR NPN SI XSTR NPN SI RES 56 5 2W MO RES 05 3 3W RES 78 7K 1 RES 2 61K 1 RES 15 5 3W RES 61 9K 1 RES 2 61K 1 RES 2 61K 1 RES 90 9K 1 RES 05 3 3W RES 649 1 125W RES TRMR 1K 10 RES 100 1 125W RES 5K 1 125W RES 5K 1 125W 02037 02037 02037 02037 02037 02037 02037 02037 02037 02037 02037 02037 02037 02037 02037 02499 05524 05524 05524 05524 05524 05524 05524 05524 05524 05524 03744 05524 05524 05524 Part 2N5943 2N2222A 2N5943 2N5943 2N5943 2N3906 SEL 2N3904 2N3904 2N3906 SEL 2N3904 2N3904 GS 3 RS 2B CMF 55 1 CMF 55 1 CW 2B 39 CMF 55 1 CMF 55 1 CMF 55 1 CMF 55 1 RS 2B CMF 55 1 3386P Y46 10
18. as used Increasing C414 decreases overshoot at amplitudes 214 V 27 pF 120 pF 15 pF 0 pF open 33 pF Pulse performance at ampl 0 1 V 0 99 V Pulse performance at ampl 1 V 9 99 V Pulse shape Increasing C352 decreases transition times and decreases overshoot in Fixed and Linear mode 47 pF 0 01 pF Pulse shape Pulse shape 22 pF 2150 Range capacitor Bias adjustment Both influence linearity of open or 4 3 V Period Generator used to get A2R4 PER 1 ms Adj to it s mid range used to get A2R3 PER 20 ms Adj to it s mid range open 51 1 3 83 3 83 Table 9 1 Adjustment Procedures Changeable Components continued Procedure Reference Description Delay A1C220 22 pF Range capacitor A1R225 2150 Bias adjustment A2VR4 open or 4 3 V Both influence linearity of and A2R64 open or 51 1 kQ Delay Generator A2R12 3 83 kQ used to get A2R14 DEL 1 ms Adj to it s mid range A2R55 3 83 kQ used to get A2R13 DEL 20 ms Adj to it s mid range Width A1C240 22 pF Range capacitor A1R244 2150 Bias adjustment A2VR3 open or 4 3 V Both influence linearity of and A2R63 open or 51 1 kQ Width Generator A2R7 4 42 used to get A2R9 WID 1 ms Adj to it s mid range A2R54 used to get A2R8 WID 20 ms Adj to it s mid range A2R243 46 4 endash 51 1 Influences minimum width A2R
19. 1 500 TRANSISTOR HEATSINK Page 9 of 16 MODEL 8112A ERRATA Cont Add to Page A 14 Table A 3 REFERENCE C H PPART DESRCIPTION DESIGNATOR NUMBER Al 4 1200 0181 INSUL XSTR NYLO Al MPS 1400 0824 STRAP CABLE 6 0 1251 0600 CONN SGL CONT eee Al MP7 1 0515 0652 SCR MACHINE MP8 8 0610 0003 NUT HEX DBL CHA MP9 7 0520 0128 SCR MACH 2 56 10 9 3050 0017 WSHR FL MTLC 3 2950 0072 1 12 2190 0067 WSHR LK INTL T Al MP13 0 2190 0584 WASHER LK HLCL 1 14 3050 0891 WASHER FL MTLC 15 4 3050 1101 WASHER SHLDR 3 16 9 0515 1111 5 M3X0 5 Ei ac 17 4 10535 0025 NUT HEX DBL CHA 18 7 0515 1755 SCR MACHINE 19 2190 0112 WSHR LK HLCL 1 20 4330 0467 INSUL BEAD GLAS page A 24 Replaceable Parts Table A 3 Add the descriptions Reference ies Description s Uxe TiMINGIC PERIOD arUmo TIMINGIC DELAY 1 1 Al U240 27 TIMING IC WIDTH 10 July 1996 Page 10 of 16 MODEL 8112A ERRATA Cont page A 25 Replaceable Parts Table A 3 Add the descriptions Refernce Description ws cate av ro our rw p 27 55 1 7 1 1 Al
20. 1 Comments 10 Adr 712 Device address of the HP 8112A 20 CLEAR Adr Initialize Interface set HP 81124 to 30 CLEAR SCREEN Standard setting and clear screen 40 A SPOLL Adr Clear the Status Byte 50 60 Program to check TALK LISTEN FUNCTION 70 80 Visual Indicators 90 100 REMOTE Adr Remote Control of HP 81124 110 RMT LED on 120 140 OUTPUT Adr DEL 100MS Set HP8112A delay to 100 ms 150 RMT and ADS LED s on 160 DEL key LED on 170 21 00 ms displayed 180 OUTPUT Adr IDEL Interrogate Delay command 200 210 ENTER Adr A Input data from HP 81124 220 250 PRINT A Print on screen 260 Printout DEL 100 MS 270 290 LOCAL Adr Return HP 81124 to local operating mode 300 320 END Programming Examples 7 3 Performing self test 7 4 Programming Examples Put 8112A into remote mode Instruct 8112A to execute self test Read 8112A Status Byte decimal value of Status Byte Print 812 Fault The HP 8112A RAM Hardware self test can be initiated via the HP IB using the EST message If a fault is detected the HP 8112A sets the System Failure and Service Request bits in its HP IB Status Byte Refer to Chapter 6 Error reporting for more information on the Status Byte 1 Comments 10 Adr 712 Device address of the HP 8112 20 CLEAR Adr Initialize Interface set HP 81124 to 25 Standard setting and remote mode 30 C
21. 8 23 8 16 Delay Control Verification Test 8 25 8 17 Correct Delay 8 25 8 18 Width Control Verification Test 8 26 8 19 High Level Control Verification Test 8 28 Contents 13 8 20 Correct High level Control 8 28 8 21 Correct Delay Control 8 29 8 22 HP IB Verification Test 8 30 9 1 Access to the HP 81124 for Adjustments 9 4 9 2 Pre adjustments setup 9 5 9 3 Typical Pulse Display 9 8 9 4 Decade Accuracy 9 10 9 5 Double Pulse Adjustment 9 12 9 6 Low Pass Filter 9 16 9 7 Slope test setup 9 19 9 8 Adjustment Points on the Main Board 1 9 22 9 9 Adjustment Points on the Control Board A2 9 23 10 1 1 HP 8112A Functional block diagram 10 1 1 10 1 2 Custom ICs used in the HP 8112A 10 1 2 10 1 3 HP 8112 in its servicing position 10 1 3 10 2 1 Power Supply block diagram 10 2 1 10 2 2 Main Board 1 Schematicl 10 2 5 10 2 3 Main Board 1 Schematic 2 10 2 7 10 2 4 Detail of wiring to Line Voltage Selector switches 10 2 9 10 2 5 Power supply components Underside of main board AL xig eal ate is 10 2 10 10 3 1 Timing IC block dia
22. Change 14 Component changes were introduced to improve overshoot New firmware was introduced with a new set of ROMS If you have the old firmware installed signature analysis readings for the ROM test see Trouble shooting in Chapter 10 7 will be as detailed in Table B 2 For instruments with serial number 2343G01130 and lower make the following changes to the appropriate parts list Main Board In Appendix A Table A 3 delete Reference Description HP Part Al 08112 66501 C541 Capacitor 0 01 100 V 0160 3879 In Appendix A Table A 3 modify Reference Description HP Part 1 08112 66501 C414 Capacitor 15 pF 0160 4385 R100 Resistor network 7x10 k 1810 0206 R556 Resistor 13 3 k 1 0757 0289 R557 Resistor network 9x10 k 1810 0280 Control Board In Appendix A Table A 4 modify Reference Description HP Part A2 08112 66502 R7 Resistor 5 62 k 0757 2000 R55 4 42 k 0698 4442 Backdating B 9 Microprocessor Board Change 15 B 10 Backdating In Appendix A Table A 5 modify HP Part 8112 13711 8112 13712 8112 13713 8112 13714 8112 13715 Reference Description A3 08116 66523 U5 Table B 2 U5 ROM6 09 ROM2 08 07 ROM4 06 ROMS A ferrite bead was introduced around the base connector of Q400A and the value of C535 altered to improve pulse performance when ringing and fall times are excessive as shown in Figure B 1 For instruments with serial
23. REY xr Servicing the Burst Control Circuit Theory of Operation Introduction Burst Number Acceptors Blocking Flip flop Period Generator Control EET SEC Counter reset Troubleshooting Output Address Decoder Burst Counter Servicing the Microprocessor and Front panel Theory of Operation Read Memory ROM Random Access Memory RAM RAM Battery Supply HP IB General Purpose Interface Adapter Microprocessor Interface Signals HP IB Interface Signals Address Decoding Sub decoder 1 Sub decoder2 Contents 11 Contents 12 Key Scanning Display Driving Display Driver 022 4 HP IB Status Latch 037 Display Latche 023 Qut dd Res t Circuits 2 4 nos Troubleshooting Free Running Signature Analysis Address Bus 5 oq os Changing the Keyboard Replaceable Parts Introduction General 222 ved Ordering Parts
24. 2273 Re 841 d S ls AN 195 C183 1 g R181 o m 4 16 E c3 5V 18 Ul ules 5 2 16 0 EL 6 fuos mn Liga pI NORM 38 0908 UHSHB 88888 BEBES ONDU 8888 89888 88485 18 MA ZUBERE 898088 62806 85822 88888 268 Ri86 16 E Re R2 Fe Al R2 Re R3 B1 Re Re R2 Re Re Re c3 Re R3 R3 R2 R2 R2 R2 R2 Re Re R2 R3 ce 88 88842 00228 00 8888 BB MODEL 29353 5598 ASOKE HP8112A sssgg Q2ss2 BERRE 28888 8 888 80860800 08880 88820 FIGURE 10 5 6 CONTROL BD COMPONENT LAYOUT AND LOCATOR SERVICING THE CONTROL 10 5 17 T 5 h pocem par 2 2 1 5 Wt gu ea ics v2 i e AA gt x ais EF a Graig pe un gm 59 n A BD AY CONTROL 10 6 Servicing the Burst Control Circuit Theory of Operation Introduction This chapter covers the burst control circuit on the A2 control board that controls the output of the period generator on board A1 See Chapter 10 3 when burst
25. CABLE AY EXT TRGIN page 37 Replaceable Parts Table A 6 Add the descriptions Reference Description 1 1 KEYCAPQUARTER __ a4 MP2 KEYCAPQUARTER 44 KEYCAPSRFGL _ aa MPs KEYCAPSREGL KEYCAPLCL aa 01 1 KEYCAPPREGL a 1153 4 KEY CAP PRL GRA 1 1 10 July 1996 Page 11 of 16 MODEL 8112A ERRATA Cont page 38 Replaceable Parts Table A 6 Add the descriptions KEYCAPSREGI 1 KEYCAPSREGL fof evca PRLOL ____ _ xevcaesu oL evcasssEor xevcassseor xevcasssEGRA keYcaePRLGL 01 11 4 12 A4 MP13 A4 14 4 15 4 16 4 17 4 18 4 19 A4 MP20 4 MP21 4 22 4 23 page A 39 Replaceable Parts Table A 6 Add the description Reference Description 4 Wl CABLE AY RBN260 MM 10 July 1996 Description KEY CAP PRL GL Page 12 of 16 MODEL 8112A ERRATA CONT On page 10 1 5 Instrument Overview and Troubleshooting Guide RAM Test E01 delete U11 T
26. D 2 Sales and Service Offices Hewlett Packard S A International Sales Branch Middle East Central Africa Sales 7 Rue du Bois du Lan Box 364 CH 1217 Meyrin 1 Geneva Switzerland Telephone 022 83 12 12 Telex 27835 hmea Cable HEWPACKSA Geneve Fax 783 7535 European Operations Hewlett Packard S A 150 Route du Nante d Avril CH 1217 Meyrin 2 Geneva Switzerland Telephone 41 22 780 8111 Fax 780 8542 Hewlett Packard Ltd Nine Mile Ride Wokingham Berkshire RG11 3LL Telephone 0344 773 100 Telex 848805 Fax 44 344 763526 Customer Information Center 800 752 0900 6 00AM to 5PM Pacific Time Hewlett Packard Co 4 Choke Cherry Road Rockville MD 20850 Telephone 301 670 4300 Hewlett Packard Co 5201 Tollview Drive Rolling Meadows IL 60008 Telephone 312 255 9800 Hewlett Packard Co 2015 South Park Place Atlanta GA 30339 Telephone 404 955 1500 Hewlett Packard Co 5161 Lankershim Boulevard North Hollywood CA 91601 Telephone 818 505 5600 N Other International Hewlett Packard Co Areas Intercontinental Headquarters 3495 Deer Creek Road Palo Alto CA 94304 Telephone 415 857 5027 Telex 034 8300 Cable HEWPACK Hewlett Packard Trading S A Bureau de Liaison Bureau de Support Ville des Lions 9 Hai Galloul DZ BORDJ EL BAHRI Telephone 76 02 07 Fax 281 0387 Sales and Service Offices 0 3 Index A Accessories 1 3 AC line vo
27. LA Hn 0 47uF 50 02010 SA305E474MAAH CAP 0 47uF 50 02010 5 305 474 0 47uF 50 02010 SA305E474MAAH 0 47uF 50 02010 SA305E474MAAH 270uF 40 04200 672D277H040DT4C 1 C519 0160 6596 1 520 0160 6596 1 521 0160 6596 Al C522 0160 6596 1 523 0180 0582 1 524 0180 0582 Al C525 0160 5746 Al C526 0160 5746 Al C528 0160 4381 A1 C529 0160 4381 CAP 270uF 40 04200 16720277 0400 4 CAP 0 1uF 50 V 06121 37987 5104 11 CAP 0 1uF 50 V 06121 37987 5104 11 CAP 1 5pF 200 06352 FD11C0G2D1R5C CAP 1 5pF 200 06352 FD11C0G2D1R5C 1 C530 0121 0466 0 1 3pF 1pF 100 09538 518 003 1 3 Al C531 0160 4380 7 1 1 200 V 06352 FD11COK2DIROC 1 C532 0160 3872 0 2 2pF 200 06352 FD12C0G2D2R2C 1 C535 0160 4387 4 47 200 06352 FD12C0G2D470J Al C541 0160 3879 7 1 0 0luF 100 V 02010 SR201C103MAAH Replaceable Parts 11 Table A 3 Main Board Parts List continued Reference HP Part Qty Description Manufr Part 1 1 1901 0638 3 1 DIO FW BRDG 100V 04504 Al CR2 1906 0096 7 1 DIO FW BRDG 200V 05131 1 1906 0096 7 1 DIO FW BRDG 200V 05131 1 1901 1098 1 1 DIO 1N4150 04486 5 1901 1098 1 1 DIO
28. Manuf r 05524 03744 03744 05524 03744 05524 03744 03744 03744 05524 05524 05524 05524 05524 05524 05524 05524 03744 03744 03744 05524 05524 05524 03744 05524 02483 03744 05524 03744 03744 Part CCF 55 1 T 1 3386P Y 46 202 3386P Y46 202 CCF 55 1 T 1 3386P Y46 104 CCF 55 1 1 3386P Y46 202 3386P Y46 202 3386P Y 46 104 CCF 55 1 1 CCF 55 1 1 CCF 55 1 T 1 CCF 55 1 1 CCF 55 1 T 1 CCF 55 1 1 CCF 55 1 T 1 CCF 55 1 T 1 3386 46 502 3386 46 501 3386 46 501 CCF 55 1 1 CCF 55 1 1 CCF 55 1 T 1 3386P Y 46 104 CCF 55 1 1 761 3 R2 2K 3386P Y46 104 CCF 55 1 T 1 3386P Y46 501 3386 46 501 A2 R39 A2 40 A2 R41 A2 R42 A2 R43 A2 R44 A2 R45 A2 R46 A2 RAT A2 R48 A2 RA9 A2 R50 A2 R51 A2 R52 A2 R53 A2 R55 A2 R56 A2 R58 A2 R59 A2 R60 A2 R61 A2 R62 A2 R63 A2 R64 A2 R101 A2 R102 A2 R103 A2 R104 A2 R105 A2 R57 Table A 4 Control Board Parts List continued HP Part Qty 0757 0462 0698 6360 0698 6360 2100 3252 0698 4481 0698 4433 0757 0442 2100 0567 0757 0277 0757 0280 0698 3452 2100 0554 0698 6324 0698 3444 0698 3153 0698 3153 0757 0462 2100 3214 0757 0462 2100 3214 0757 0462 2100 3214 0757 0458 0757 0458 0757 0458 1810 0243 1810 0205 1810 0206 1810 0203 1810 0203 c
29. o 0 w Ln ee eh mh eee res eee re sere Wer Description RES 75K 1 125W RES 10K 1 RES 10K 1 RES TRMR 5K 10 RES 16 5K 1 RES 2 26K 1 RES 10K 1 125W RES TRMR 2K 10 RES 49 9 1 RES 1K 1 125W RES 147K 1 RES TRMR 500 10 RES 187 1 125W RES 316 1 125W RES 3 83K 1 RES 3 83K 1 RES 75K 1 125W RES TRMR 100K RES 75K 1 125W RES TRMR 100K RES 75K 1 125W RES TRMR 100K RES 51 1K 1 RES 51 1K 1 RES 51 1K 1 Manufr Part 05524 05524 05524 03744 05524 05524 05524 03744 05524 05524 05524 03744 05524 05524 05524 05524 05524 03744 05524 03744 05524 03744 05524 05524 05524 NETWORK RES DIP 02483 NETWORK RES SIP NETWORK RES SIP NETWORK RES SIP NETWORK RES SIP 02483 02483 02483 02483 CCF 55 1 T 1 CMF 55 1 T 9 CMF 55 1 T 9 3386P Y 46 502 CCF 55 1 T 1 CCF 55 1 T 1 CCF 55 1 T 1 3386P Y 46 202 CCF 55 1 T 1 CCF 55 1 T 1 CCF 55 1 T 1 3386P Y46 501 CCF 55 1 T 1 CCF 55 1 T 1 CCF 55 1 T 1 CCF 55 1 T 1 CCF 55 1 T 1 3386P Y 46 104 CCF 55 1 T 1 3386P Y46 104 CCF 55 1 T 1 3386 46 104 CCF 55 1 T 1 CCF 55 1 T 1 CCF 55 1 T 1 761 3 R6 8K 750 81 750 81 750 81 750 81 Replaceable Parts 29 Table A 4 Control Board Parts List continued 1 NETWORK RES SIP 02483 1 RES 1 54K 1 05524 CCF 55 1 T 1 1
30. 1 SW PB SPST 04486 5560 9436 4 515 5060 9436 7 1 SW PB SPST 04486 5560 9436 4 516 6060 9436 7 1 SW PB SPST 04486 5560 9436 4 517 5060 9436 7 1 SW PB SPST 04486 5560 9436 A4 518 T 1 SW PB SPST 04486 5560 9436 5060 9436 A 38 Replaceable Parts Table A 6 Keyboard Parts List continued Reference A4 S19 5060 9436 SW PB SPST NO 9560 9436 4 520 5060 9436 SW PB SPST 9560 9436 A4 S21 5060 9436 SW PB SPST NO 9560 9436 A4 522 5060 9436 SW PB SPST NO 5560 9436 A4 S23 5060 9436 SW PB SPST 9560 9436 4 W1 5180 2402 5180 2402 Replaceable Parts 39 Display Board Table A 7 Display Board Parts List Reference HP Part CD Qty Description Manuf r 5 08112 66505 5 1 BD AY DISPLAY 28480 08112 66505 5 051 1990 0486 6 1 LED LMP 01542 1301 5 DS2 1990 0486 6 1 LED LMP 01542 HLMP 1301 5 053 1990 0486 6 1 LED LMP 01542 1301 5 054 1990 0486 6 1 LED LMP 01542 1301 5 055 1990 0486 6 1 LED LMP 01542 HLMP 1301 5 056 11990 0486 6 1 LED LMP 01542 1301 5 057 1990 0486 6 1 LED LMP 01542 1301 5 058 1990 0486 6 1 LED LMP 01542 1301 5 DS9 1990 0486 6 1 LED LMP 01542 1301 5 0510 1990 0486 6 1 LED LMP 01542 1301 5 0511 1990 0486 6 1 L
31. 3 Check the case to power cord ground pin continuity in accordance with IEC amp VDE Flex the power cord during the measurement to check for any intermittent discontinuity If problem exists it must be investigated and fixed before proceeding 4 Check the internal ground connections between circuit boards and the instrument frame If a problem exists it must be investigated and fixed before proceeding Introduction to Servicing 10 1 10 2 Introduction to Servicing 11 Check that the case is isolated from the power cord power pins in accordance with amp If a problem exists it must be investigated and fixed before proceeding Check that the correct line fuse is fitted Check that all safety covers are fitted Check that all inter connecting co axial and flat cables are properly connected Check that all boards are properly fitted 10 Check that the heatsink connections between the main board and the front frame member are secure Inform Hewlett Packard of any repeated failures of any of the checks or any other safety features The servicing information is divided into chapters as summarised here Instrument Overview Servicing the Power Supply Servicing the Time and Slope Generator Servicing the Shaper and Output Amplifier Servicing the Standard Control Board Servicing the Microprocessor and Frontpanel This chapter deals with the
32. Operating Programming and Servicing Manual HP 8112A 50 MHz Programmable Pulse Generator SERIAL NUMBERS This manual applies directly to instruments with serial number 3205G010006 and below If your instrument has a higher serial number refer to Appendix C Updating which contains manual changes for later instruments Be sure to examine this supplement for changes which apply to your instrument and record these changes in the manual U HEWLETT PACKARD HP Part No 08112 90004 Microfiche Part No 08112 95004 Printed in Federal Republic of Germany January 1992 First Edition E0192 M MM MM Notice Subject Matter Notice information in this document is subject to change without notice Hewlett Packard makes no warranty of any kind with regard to this printed material including but not limited to the implied warranties of merchantability and fitness for a particular purpose Hewlett Packard shall not be liable for errors contained herein or for incidental or consequential damages in connection with the furnishing performance or use of this material Copyright This document contains proprietary information which is protected by copyright All rights are reserved No part of this document may be photocopied reproduced or translated into another language without the prior consent of Hewlett Packard GmbH Copyright 1991 by Hewlett Packard GmbH Herrenberger Stras
33. msg3 02 un 1 16 C242 CRS R1 MPSI3 R1 Al R504 D2 C244 R18 Ai RSS 6 Uiga 6245 ORS Al RIS RES B 846 m Re R28 163 Al R288 588 2 Al 04 C281 CR130 05 Al R22 R1 born 5 R23 Al 3 Re4 Be 6115 3 0148 25 RI R301 Be R512 D2 U132 C1 C301 B2 cRi4g 0141 Be R513 C303 0142 26 Al 0141 C304 0143 Al R3 4 Be 514 CRI42 Be R28 Al 5 515 2 liia C306 143 Be 0200 Al 516 D2 R307 12 C30 0280 I C3e8 9281 C309 0292 Rig2 mis 4242 C310 CR221 C311 cCRed0 ce ce 52 41909 B CRe41 2 mRsee ce C312 CR401 ce R313 ce R523 D2 C313 Be C2
34. 1 R400 0698 3540 8 RES 15 4K 196 05524 55 1 Al R401 0757 0458 7 1 RES 51 1K 1 05524 55 1 Al R402 2100 3097 7 1 RES TRMR 100K 04568 67WR 1 R403 2100 3097 7 1 RES TRMR 100 04568 67WR Al R404 0757 0409 8 1 RES 274 1 125W 05524 55 1 Al R405 0757 0428 1 1 RES 1 62K 1 05524 55 1 Al R406 0757 0421 4 1 RES 825 1 125W 05524 55 1 A1 R407 2100 3296 8 1 RES TRMR 10 04568 67WR 1 R408 10698 4448 7 1 RES 294 1 125W 05524 55 1 Al R410 2100 3211 7 1 RES TRMR 10 03744 3386P Y46 102 1 R411 10698 7244 1 RES 2 15 1 05524 50 2 A1 R412 0698 7218 5 1 RES 178 1 05W 05524 CMF 50 2 Al R413 7 1 RES 1 05W 05524 CMF 50 2 0698 7236 A 20 Replaceable Parts Al R414 Al R415 Al R416 Al R418 Al R419 Al R420 Al R421 Al R422 Al R423 Al R424 Al R425 Al R426 Al R427 Al R429 Al R430 Al R431 Al R432 Al R433 Al R434 Al R435 Al R436 Al R437 Al R438 Al R439 Al R500 Al R501 Al R502 Al R503 Al R504 1 1 R505_ 0757 0346 Table A 3 Main Board Parts List continued Reference HP Part CD Qty 0698 3226 0698 7200 2100 3659 2100 0558 0698 3428 0698 3428 0698 7221 0757 0438 0698 4467 0757 0280 2100 3091 0757 0280 0698 4467 0698 7202 0698 7226 0698 8827 0698 7288 0698 7283 0757 0290 0757 0476 0698 7252 0698 4020 0698 4
35. 4 13 4 13 4 13 4 13 4 13 4 14 4 14 4 14 4 14 4 14 4 14 4 14 4 14 4 14 4 15 4 16 4 16 4 16 4 16 4 18 4 18 4 18 4 18 4 18 4 18 5 1 5 1 5 1 5 2 5 3 5 4 5 5 5 6 5 6 5 6 5 6 5 6 5 7 Contents 3 Contents 4 Programming General d diem Setting the HP IB Address Local Remote and Local Lockout Abbreviations used in this Document Terminators Programming Example Example dox lx Multiple Commands Examples Selecting Trigger Modes Standard Trigger Modes Trigger Control Example ronde Selecting Control Modes Example Selecting Output Waveform Mode Example weg US Setting Parameters Timing parameters Example Level parameters Example 202 25 2 dy Burst Parameter Example Verniet 22 02 2252 20229 Example Range Change Example Stored Parameters Example Excessive Slope Calculation Example Reading parameters Standard wg Selecting Output Modes Output Controls Example Reading the Current Set
36. 65 5 18H H883 26 099 8484 37 5 1 66 0 80 89 7 1 50 FF4H 2340 5 5 26 1 FFFF 6321 8759 0000 7791 8UP9 9UPI CH9U ROM TheROM can be checked using signature analysis 1 Set the microprocessor to free run as described in Free Running Signature Analysis and connect the signature analyzer probes as given in Table 10 7 4 Table 10 7 4 Signature Analyzer Probe connections for ROM Test Probe Trigger Connect to Start See Table 10 7 5 Stop See Table 10 7 5 Clock TP E Ground Ground 2 Verify the reading at microprocessor 4 5 V supply is is 0003 If it is not the microprocessor is not free running 3 Use the data start and stop probes to check the signatures given in Table 10 7 5 10 7 16 Servicing the Microprocessor and Front panel Changing the ROM Keyboard Table 10 7 5 ROM U40 signatures Data probe Connect Start Stop probes to U12 pin o 03A9 34PH T3UF FP6U 795 191 618 01UP H862 61C1 F8H8 5029 P3F3 5808 60F5 452P 7733 3H0H P912 8PF7 If the ROM is changed the data saved in the RAM has to be made compatible with the new ROM This can be done by setting the HP 8112A to RCLO and turning the instrument off and on again If the instrument becomes totally inoperable switch it off and disconnect the RAM back up battery by re
37. A3 BD AY MICROPRCR 08112 66534 8 FRAME REAR 2 5021 5814 MP11 HEATSINK POWER 08112 21105 MP14 KEEPER 08112 04154 25 FUSEHOLDER BODY 2110 0564 In Table A 2 B 36 Backdating Reference Description 0 08112 A6 BD AY HPIB 08116 66506 MP5 BRACKET FAN 08112 04156 MP6 BRACKET XFMR 08112 04153 MP9 PANEL REAR 5061 2116 MP10 HEATSINK REAR 08112 21101 MP12 SIDE STRUT 1 2M 5021 5831 MP13 SIDE STRUT 1 2M 5021 5831 MP17 COVER BOTTOM 5001 1233 MP18 COVER TOP 08112 04170 MP23 FOOT REAR 5041 8821 MP29 FUHLR CMPNT 1400 0090 MP31 CLMP CA 1400 0024 MP32 STDF HEX 327 IN 0380 0644 MP34 WSHR LK HLCL 2190 0074 41 WSHR LK INTL 2190 0016 In Table A 2 delete Reference Description HP Part AO 08112 C1 0 047uF 0 0160 4323 MP50 CHASSIS 08116 60101 MP51 BRACKET XFMR 08116 01203 MP52 BRACKET XFMR 08116 01201 MP54 SCR TPG 8 16 0624 0413 MP55 COVER 08116 04123 Main Board In Table A 3 modify Reference Description HP Part A1 08112 BD AY MAIN 08112 66511 MP1 HEATSINK 08112 21104 R1 RES 47 5 2W 0698 3615 Backdating 37 Microprocessor Board Table 5 modify Reference Description HP Part A3 08112 08112 66534 BD AY MICROPRCR C3 0160 5746 CAP 0 1uF 50 V C4 0160 5746 CAP 0 1uF 50 V C5 0160 5746 CAP O 1uF 50 V 0180 2856 CAP 47uF 25 V C8 0180 2856 CAP 47uF 25 V C9 0160 5746 CAP O 1uF 50 V 0160 5746 CAP O 1uF 50 V C12 0160 5746 CAP O 1uF 50 V C13
38. Al R307 1810 0371 Al R308 1810 1091 Al R309 1810 0205 RES 196 1 05W 05524 50 2 RES 100 1 05W 05524 50 2 NETWORK RES SIP 02483 750 81 NETWORK RES SIP 05524 5 01 NETWORK RES 02483 _ 750 81 c Replaceable Parts 19 Table A 3 Main Board Parts List continued Reference HP Part CD Qty Description Manufr Al R310 0698 7188 8 1 RES 10 196 05W 05524 A1 R311 0698 3427 0 1 RES 13 31 05524 1 R312 0698 7212 9 1 RES 100 1 05W 05524 1 R313 0698 7211 8 1 RES 90 9 1 05W 05524 1 314 10757 0397 3 1 RES 68 1 196 05524 1 R315 0757 0430 5 1 RES 2 21K 1 05524 55 1 1 R316 0698 3439 4 1 RES 178 1 125W 05524 55 1 1 R317 0757 0278 9 1 RES 1 78 1 05524 55 1 1 R318 2100 3211 7 1 RES TRMR 10 03744 3386 46 102 1 R320 0698 4469 2 1 1 15 1 05524 55 1 Al R321 0757 0441 RES 8 25K 196 05524 55 1 1 R322 0698 3152 RES 3 48K 196 05524 55 1 RES 1M 10 125W 01607 1051 RES 1M 10 125W 01607 1051 RES 1M 10 125W 01607 1051 Al R325 0698 4073 Al R326 0698 4073 Al R327 0698 4073 A gt n 1 R328 0698 4073 4 1 RES 1M 10 125W 01607 BB1051 Al R329 0698 4073 4 1 RES 1M 10 125W 01607 BB1051
39. CMF 55 1 Al R229 0698 3160 8 1 RES 31 6K 1 05524 55 1 Al R240 0698 4486 3 1 RES 24 9K 1 05524 55 1 Al R241 0757 0460 1 1 RES 61 9K 1 05524 55 1 Al R242 0698 7205 0 1 RES 51 1 1 05W 05524 50 2 Al R243 0757 0394 0 RES 51 1 196 05524 55 1 Al R244 0698 3441 8 1 RES 215 176 125W 05524 55 1 Al R245 0757 0401 0 1 RES 100 1 125W 05524 55 1 Al R249 10698 3160 8 1 RES 31 6K 1 05524 55 1 RES 237 1 125W 05524 55 1 RES 105 1 125W 05524 55 1 Al R280 0698 3442 Al R281 0698 4404 c Al R282 0757 1094 RES 1 47K 1 05524 CMF 55 1 1 R283 0698 4460 RES 649 1 125 05524 CMF 55 1 Al R284 0757 0394 RES 51 1 1 05524 55 1 RES 787 1 125W 05524 55 1 RES 182 196 5W 05524 65 2 RES 182 196 5W 05524 CMF 65 2 RES 51 1 196 05524 55 1 RES 27 4 1 25W 05524 60 1 T 1 Al R285 0698 4014 1 R286 0757 0803 1 287 0757 0803 Al R288 0757 0394 Al R289 0757 0499 c Al R290 0757 1000 1 R300 0757 0428 Al R301 0757 0428 1 R302 1810 1091 1 R304 10698 7227 RES 51 1 1 5W 05524 65 2 RES 1 62K 1 05524 55 1 RES 1 62K 196 05524 55 1 NETWORK RES SIP 05524 5 08 01 RES 422 196 05W 05524 50 2 mn 1 R305 10698 7219 Al R306 0698 7212
40. Delay generator U220 is not able to supply a pulse of 3 ms when in positive trigger mode and triggered via the Period generator Possible failure of Delay control circuit U5 U7 Error feedback U140 or level shifter Q200 See Chapter 10 3 E13 Width generator U240 is not able to supply a pulse of 9 ms when in positive trigger mode and triggered via the Delay generator Possible failure of Width control circuit U6 U8 Error feedback U141 or level shifter Q220 See Chapter 10 3 E14 The Slope IC U301 in function mode is unable to produce pulses with a period of 2 5 ms and rise fall times of 1 ms Possible failure of Slope control circuit U12 U13 U14 or U302 Slope range switching circuit Q305 to Q309 U300 or reference circuit U320 See Chapter 10 3 Instrument Overview and Troubleshooting Guide 10 1 5 10 1 6 OUTPUT AMPLIFIER TESTS Pos OFFSET OK YES OVERALL TESTS STATIC FIXED MODE OK COMP MODE OK YES DYNAMIC YES Instrument Overview and Troubleshooting Guide NO NO NO NO NO ri STOP STOP 11 1 7 STOP Output Amplifier Tests Overall Tests Static Overall Tests Dynamic E21 Offset generator is unable to produce positive offset Possible failure in Output amplifier or offset control circuit U17 to U19 U20 to U22 or U27 See Chapter 10 4 E22 Offset generator is unable to produce negativ
41. FRAME REAR 5021 5814 This change was reversed by change 37 to provide improved screening This means if your instrument pre dates this change implement Change 34 and ignore Change 37 Components on the main board and control board were allocated alternative values to improve pulse specification In Appendix A Table A 3 modify Reference Description HP Part 1 08112 66501 C200 Capacitor 12 pF 0160 4521 C220 Capacitor 12 pF 0160 4521 C240 Capacitor 12 pF 0160 4521 In Appendix A Table A 4 modify Reference Description A2 08112 66502 R53 Resistor 4 22 k 0698 3158 Resistor 4 42 k 0698 4442 In Appendix A Table A 4 delete Reference Description up Part A2 08112 66502 R55 Resistor 4 02 k 0698 3558 Backdating B 19 Change 35 Instrument Introduction of new Main board assembly 08112 66511 For instruments with serial number 2633G04460 and lower make the following change to the appropriate parts list In Appendix A Table A 2 modify Reference Description HP Part 0 08112 1 Board Main 8112 66501 36 Main Board Main Board B 20 Backdating Component value and or type changes made to improve adustment range For instruments with serial number 2633G04505 and lower make the following changes to the appropriate parts list In Appendix A Table A 3 modify Reference Description HP Part Al 08112 66511 R
42. IC SN74LS244N IC SN74LS244N IC SN74LS138N IC SN74LS138N IC SN74LS138N IC SN74LS12N IC SN74LS374N IC SN74LS138N IC SN74LS251N IC SN74LS145N IC SN74LS244N IC INTERFACE IC SN74LS374N IC SN74LS245N IC SN74LS244N IC 324 05524 02037 01698 01698 01698 28480 01698 01698 01698 01698 03406 01698 01698 01698 01698 03799 03406 01698 01698 03406 XSTR ARY 14P DIP 02037 IC 68488 IC INTERFACE 02037 02037 CMF 55 1 Part CMF 55 1 CMF 55 1 CMF 55 1 CMF 55 1 CMF 55 1 CMF 55 1 CMF 55 1 CMF 55 1 MC6802P 5 741 5245 SN74LS244N SN74LS244N 1LJ6 0001 SN74LS138N SN74LS138N SN74LS138N SN74LS12N DM74LS374N SN74LS138N SN74LS251N SN74LS145N SN74LS244N ICM7218A DM74LS374N SN74LS245N SN74LS244N LM324N MC68488P MC3448AL Replaceable Parts 35 Table A 5 Microprocessor Board Parts List continued Description Part 1820 2058 311 IC INTERFACE MC3448AL 1820 2058 3 1 IC INTERFACE MC3448AL 1820 2058 3 1 IC INTERFACE MC3448AL 1820 1416 5 1 IC SN74LS14N SN74LS14N 1820 1640 7 1 IC SN74LS366AN SN74LS366AN 1820 1195 7 1 IC SN74LS175N SN74LS175N 1820 1197 9 1 IC SN74LS00N SN74LS00N 08112 13728 2 1 08112 13728 8159 0005 0 1 0 CWM 1 2007 1 5180 2469 0 1 5180 2469 0410 0762 2 1 4 000 MHZ 07492 A 36 Replaceable Parts Keyboard A
43. Qty Description Manufr 0160 6623 5 1 0 1uF 50 V 02010 SA115C104MAAH06121 0160 6623 5 1 0 1uF 50 V 02010 5 115 104 06121 0160 6623 5 1 0 1uF 50 V 02010 5 115 104 06121 0160 6623 5 1 0 50 02010 5 115 104 06121 0160 6623 5 1 0 1uF 50 V 02010 5 115 104 06121 0160 6623 5 1 CAP 0 luF 50 V 02010 SA115C104MAAH06121 0160 6623 5 1 0 1uF 50 V 02010 5 115 104 06121 1901 0535 9 1 DIO SCHOTTKY SM 02062 50825511 1901 0535 9 1 DIO SCHOTTKY SM 02062 50825511 1901 1098 1 1 DIO 1N4150 04486 1901 1098 1 1 DIO 1N4150 04486 1901 0535 9 1 DIO SCHOTTKY SM 02062 50825511 1901 0535 9 1 DIO SCHOTTKY SM 02062 150825511 1251 8980 5 1 CONN POST TP HDR 04726 3432 5202 1252 1979 0 1 CONN POST TP HDR 04726 3627 5202 1251 3167 0 1 CONN POST TP BDY 03418 09 50 3041 1251 4670 2 1 CONN POST TP HDR 02946 68000 603 1251 4672 4 1 CONN POST TP HDR 02946 68000 610 1400 0824 7 1 STRAP CABLE 04225 TY 23M 1853 0281 9 1 XSTR PNP 2N2907A 02037 2 2907 1810 0280 8 1 NETWORK RES SIP 05524 5 10 01 0698 8812 7 1 RES 1 196 125W 05524 55 1 1810 0277 3 1 NETWORK RES SIP 05524 10 01 1810 0338 7 1 NETWORK RES 02483 761 3 100 0698 3446 3 1 RES 383 196 125W 05524 55 1 0757 0465 6 1
44. Remove the four screws securing the fan to the rear of the frame Take out the fan assembly Orient the fan so that the arrow on its case indicating the direction of air flow m points to the rear of the instrument m and is on the bottom Secure the fan to the rear of the frame using the four screws keeping the arrow at the bottom and pointing outwards Plug the red cable onto the pin marked 2 on the main board routing the cable between the side of the frame and the heatsink Plug the blue cable onto the pin marked 6 Servicing the Power Supply 10 2 9 1 E 5 5 ial 18 48 POWER i e 1 54 DOWN 77 DETECT L L M 1 al 92 5 fff d 05 1 192 42 u om LN NE Liao ob S X Frac RN s 4 n Figure 10 2 5 Power supply components Underside of main board A1 Note The main component layout and locator for the main board A1 are in Chapter 10 4 10 2 10 Servicing the Power Supply 10 3 Servicing the Timing and Slope Generators Theory of Operation Introduction The majority of the timing and slope generation circuit components are on the main board 1 A small part of the associated circuitry concerned with burst control is on the control board A2 Operation of the t
45. Testing Performance 8 9 Note Constant Duty Cycle Performance Test Specifications 8 10 Testing Performance Pulse width is measured at 5096 of pulse amplitude HP 8112A Oscilloscope setting PER WID Low Limit High Limit 100 ns 75ns 125108 200us 40 38 0 42 0 5 Connect HP 8112 and counter as shown in Figure 8 6 6 Set the counter as follows Trigger level Preset Mode Time Impedance 500 Gate Mode MIN Slope A Positive Slope B Negative 7 Check the HP8112A WID settings against the table below 8 Record your results on a copy of the Test Record specified limits are given here and on the Test Record HP 8112 Oscilloscope setting PER WID Limit High Limit ims 0 95 105 999 ms 950 ms 902 5 ms 997 5 ms Range 1 to 99 of period 10 ns min 10 ns max Accuracy 10 of programmed value Repeatability Factor 4 better than accuracy Equipment Counter HP 5335A m Cable Assembly BNC 50 0 Feedthrough Termination Required if counter input impedance 50 0 Test Setup Counter HP 53354 HP 8112A l Figure 8 7 Duty Cycle Performance Test Procedure 1 Connect the equipment as shown in the setup figure Use a 50 Q feedthrough termination if you cannot select 50 Q input impedance on the counter 2 Set
46. The LRC 52 signal is then used to pass the data to U20 via U27 and U18 simultaneously as 12 bit word The LRC signal is also inverted by U15 and used to enable the amplitude DAC U23 Therefore the microprocessor can prepare new data for U20 and U23 before enabling both with WS2 Servicing the Control Board 10 5 3 The time difference between LRC enabling U23 and LRC enabling new data for U20 is the propagation delay through U19 Offset DAC The offset level output from U21 can be attenuated using R42 The offset DAC U20 is a 12 bit multiplying device which provides two output currents is the summed current derived from the reference voltage via the selected networks Ix in Digital to Analog Converters is the sum of the unselected currents and hence lin Parameter Control The remaining DACs 04 06 012 013 and 1 23 convert the digital vernier values input to the microprocessor from the instrument front panel or system controller into analogue signals for use by m Timing ICs on Al Main Board which generate the required period delay and width delay signals Slope IC on A1 Main Board which generates the leading and trailing edges of the output pulse Shaper on the A1 Main Board which governs the final amplitude of the output pulse Range switching circuits are included in the outputs of these DACs that are selected automatically by the microprocessor in co
47. The six board assemblies contained in the HP 8116A are listed in Table 10 1 which lists the servicing chapters applicable to each board 5 Add the following line to Table 10 1 in Chapter 10 HP IB Connector Board 6 In the section Preparing the HP 81124 for servicing in Chapter 10 1 replace the procedure with the following text 1 Remove all four feet at the rear of the instrument by unscrewing the fastening screws 2 Remove the single screw holding the instrument top cover to the rear panel 3 Remove the cover by sliding it backwards 4 Remove the four screws securing the microprocessor board 5 Lift the microprocessor board and stand it vertically by placing the cut outs on the edge of the board over the locating lugs on the inside of the right hand side panel as seen from the front of the instrument 6 Remove the screen covering the control board T Lift the control board and stand it vertically by placing the cut outs on the edge of the board over the locating lugs on the inside of the left hand side panel as seen from the front of the instrument 7 In the section Troubleshooting the Power Supply in Chapter 10 2 delete the sub sections Removing the Fan and Re fitting the Fan Replace these sections with the following Starting with the instrument in its servicing position as described in Chapter 10 1 and referring to Figure B 12 Backdating 41 Figure B 12 Exploded view of HP 8112 r
48. is ideally suited for step response measurements such as m Transient behaviour of amplifiers transient time overshoot ringing settling time m Reverse recovery time of transistors and diodes Characterization of capacitors equivalent serial resistance inductance high frequence capacitance 50 ohm 50 load load Oscilloscope HP 8112A 1 Ground Figure 5 6 Capacitance circuit Linear transition mode Independantly variable leading and trailing edges between 6 5 ns and 95 ms can be used to generate ramps or sawtooth waveforms for m Stimulation of hydraulic or pneumatic devices m Mechanical tests Hysteresis of Schmidt trigger circuits m Stress testing of capacitors and thyristors by measuring maximum allowed voltage increase per time max dV dt Cosine shaped transition modes Gaussian Independantly variable cosine shaped leading and trailing edges between 6 5 ns and 95 ms can be used to generate smooth transitions which do not include high frequencies for Communications reduced reflections and crosstalk 5 6 Operating Examples Digital Applications m Simulation of bandpass filtered signals such as data transmission over telephone lines Generation of haversines Fixed transition mode Can be used for stimulation of fast logic components and circuits as follows Clock generation m Producing known good data inputs for logic sub assemblies and modul
49. 0 1uF 160 05992 23410410 CAP luF 40 V 05992 23110550 CAP 10uF 40 V 05992 23110650 0 47uF 50 02010 SA305E474MAAH 2200pF 100 02010 SR201C222MAAH 0 47uF 50 02010 5 305 474 1 308 0160 3726 1 309 0160 3998 1 C310 0160 6596 1 C311 0160 0572 1 312 0160 6596 1 C313 0160 5746 1 C314 0160 6596 1 C315 0160 4386 1 C316 0160 4385 Al C318 0160 5746 CAP 0 1uF 50 V 06121 B37987 T5104 M11 CAP 0 47uF 50 02010 SA305E474MAAH CAP 33pF 200 V 09939 RPE121 105C0G330J200V 15pF 200 V 09939 RPE121 105C0G150J200V CAP 0 1uF 50 V 06121 B37987 T5104 M11 mM Pe 1 320 0160 5746 1 321 0160 3879 1 322 0160 3879 1 400 0160 0575 1 401 0160 3879 CAP 0 1uF 50 V 06121 B37987 T5104 M11 0 01uF 100 V 02010 SR201C103MAAH 0 01uF 100 V 02010 SR201C103MAAH 0 047uF 50 V 02010 5 205 473 0 01uF 100 V 02010 SR201C103MAAH 1 402 0160 5746 1 403 0160 5746 1 405 0160 6596 1 409 0160 4381 1 410 0121 0466 1 0 luF 50 06121 37987 5104 11 1 0 luF 50V 06121 37987 5104 11 0 47uF 50 02010 SA305E474MAAH 1 5pF 200 06352 FD11C0G2D1R5C 1 3pF 100 09538 518 003 A 1 3
50. 0160 5746 CAP O 1uF 50 V C15 0160 5746 CAP 0 1uF 50 V C16 0160 5746 CAP 0 1uF 50 V C17 0160 5746 CAP O 1uF 50 V C18 0160 5746 CAP O 1uF 50 V C19 0160 5746 CAP 0 1uF 50 V C20 0160 5746 CAP 0 1uF 50 V C21 0160 5746 CAP 0 1uF 50 V C22 0160 5746 CAP O 1uF 50 V C23 0160 5746 CAP O 1uF 50 V C24 0160 5746 O 1uF 50 V C25 0160 5746 CAP 0 1uF 50 V C26 0160 5746 CAP O 1uF 50 V C27 0160 5746 CAP O 1uF 50 V C28 0160 5746 CAP O 1uF 50 V C30 0160 5746 CAP 0 1uF 50 V C31 0160 5746 CAP 0 1uF 50 V C32 0160 5746 CAP 0 1uF 50 V C33 0160 5746 CAP 0 1uF 50 V C34 0160 5746 CAP 0 1uF 50 V C36 0160 5746 CAP O 1uF 50 V J2 1251 8930 CONN POST TP HDR R6 0757 0412 RES 365 1 125W R12 1810 0316 NETWORK RES DIP R13 1810 0206 NETWORK RES SIP R22 0757 0442 RES 10K 1 125W R24 0757 0283 RES 2K 1 125W U40 08112 13727 1 5180 2405 CBL RBN 350 MM B 38 Backdating In Table A 5 delete Reference Description HP Part 08112 10 CAP 0 1uF 50 V 0160 6623 C14 CAP 0 1uF 50 V 0160 6623 C35 CAP O 1uF 50 V 0160 6623 C37 CAP 0 1uF 50 V 0160 6623 CONN POST TP HDR 1251 4670 75 CONN POST TP HDR 1251 4672 R25 RES 10K 196 125W 0757 0442 R26 RES 10K 1 125W 0757 0442 R27 RES 3 16K 196 0757 0279 In Table A 5 add Reference Description HP Part A3 08112 P1 SHUNT PROGRAMMAB 1258 0124 R23 RES 10K 1 125W 0757 0442 U18 IC SN74LS273N 1820 1730 W2 RES ZERO OHMS 8159 0005 2 In the section Rear Panel in Chapter 4 delete Figure
51. 02123 260 4TH5B SPECIAL THREAD A1 MP509 1205 0662 1 HEAT SINK 02123 260 4TH5B SPECIAL THREAD Al 510 1205 0662 7 1 HEAT SINK 02123 260 4TH5B SPECIAL THREAD A1 MP511 1205 0662 7T 1 HEAT SINK 02123 260 4TH5B SPECIAL THREAD 1 512 1205 0662 7 1 HEAT SINK 02123 260 4TH5B SPECIAL THREAD 513 1205 0662 7T 1 HEAT SINK 02123 260 4TH5B SPECIAL THREAD 1 01 1854 0368 5 1 5 NPN 2 5191 02037 2 5191 1 02 1854 0637 1 1 5 NPN 2 2219 02037 2 2219 1 Q3 1854 0368 5 1 XSTR NPN 2 5191 02037 2 5191 Al Q4 1854 0637 1 1 XSTR NPN 2N2219A 02037 2N2219A Al Q5 1853 0314 9 1 XSTR PNP 2N2905A 02037 2N2905A Al Q6 1853 0212 6 1 XSTR PNP 2N5194 02037 2N5194 1 0140 1854 1028 6 1 5 NPN SI 02037 2N3904 1 9141 1854 1028 6 1 XSTR NPN SI 02037 2N3904 1 0142 1854 1028 6 1 XSTR NPN SI 02037 2N3904 1 0143 1854 1028 6 1 XSTR NPN SI 02037 _ 213904 A 14 Replaceable Parts Table A 3 Main Board Parts List continued Part HP Part Qty 1 9200 1854 1028 6 1 1 0220 1854 1028 6 1 0280 1854 1139 0 0 0 Description XSTR NPN SI XSTR NPN SI XSTR NPN SI XSTR NPN SI XSTR PNP SI Reference 1 0281 1854 1139 1 9282 1853 0357 1 0283 185
52. 0515 lt 0515 s S8 58 A B BD AY DISPLAY a e ODS3 gg NS 00511 1 ODS13 ODS1 8521 0054 00514 518 5 4 00515 ODS18 055 Oops ODSS 5 5 00516 ODS12 5 0056 01058 ODSi0 Replaceable Parts Introduction General Ordering Parts This Appendix contains information for ordering all the replaceable parts contained in the HP 8112 The information consists of the following m The schematic and component layout reference m The Hewlett Packard part number m The part number check digit m The part description m The Hewlett Packard reference number for the part manufacturer m The manufacturer s part number A list of manufacturers and their Hewlett Packard reference numbers is given in Table A 1 Figure 1 and Figure A 2 identify the main mechanical parts of the instrument To order a part listed in one of the parts lists you must quote the Hewlett Packard part number and check digit together with the quantity required and send the order to the nearest Hewlett Packard office A list of Sales amp Service offices is given in Appendix D If you require a part which is not listed in one of the parts lists then quote the instrument model number serial number and the function description of the part Within the USA you can use the Hewlett Packard direct mail order system This offers the following advantag
53. 1 29 R22 C2 M dR22F R24 C3 49 Res ce 5 R26 c3 R2 AN ua B2 16 u3 B2 R11 U4 Be 012 Ls U13 B2 014 B2 015 B1 016 01 B3 U18 B3 019 U21 B3 u22 U23 ues U26 Re Ue ce FIGURE 1 7 8 MICROPROCESSOR BD COMPONENT LAYOUT AND LOCATOR SERVICING THE MICROPROCESSOR AND FRONT PANEL 10 7 19 H3 BD MICROPROCESSOR 12 i TE T d 4 3 S 1 7 Sa OM 55 E2 a U1 16 5 R3 u22 MIL ae de 39 1 FIGURE 10 7 8 MODEL HP8112A 25 DES LOC DES oww m4 Bl Re R1 Re Re Re rige B2 1 E 14 0518 B2 DTY LOL Re WID Re S6 S18 5 054 4 COMPL Be S14 528 S21 Be GRID REF GRID LOC DES LOC B 0153 omi H J1 FIGURE 10 2 9 KEYBOARD R4 AND DISPLAY BOARD AS COMPONENT LAYOUTS AND LOCATORS SERVICING THE MICROPROCESSOR AND FRONT PANEL 10 7 21 H4 BD RY KEY nS 1 2 Je 1 LL LIT B 40 4 MODE 058 BUR DBL NORM PER S1 54
54. 1 00 MS DBI 200 US DEL 65 0 NS 50 WID 100 US LEE 10 0 NS TRE 10 0 NS HIL 0 30 V LOL 0 70 V Programming 6 11 Example DIM B 153 Allocate memory for maz imum reply length OUTPUT 712 CST Request current settings of instrument ENTER 712 B Read reply into allocated memory PRINT 81124 settings are B Print the reply 7 7 00000000000 gt Timing Data Transmission Time Implementation Time 6 12 Programming The time taken for the HP 8112A to receive and implement a programming message can be divided into three parts Send This is the time taken to transmit the programming message over the HP IB which is 130 ms per ASCII character 7 6 kByte sec The system controller is free to continue with its program after this time Answer This is the time taken by the HP 8112Ato transmit a message when error reporting or learn mode Time is 1 ms per character status byte 15 ms This is the time taken by the HP8112A to interpret and carry out all the commands in received message Typical implementation times vary between 4 ms for select mode to 185 ms to recall a parameter set Typical implementation times for various commands are given in the following table Without Excess Slope calc Table 6 1 Command s Mode change Implementation Time Control modes Level Burst Timing not in duty mode Duty cycle Period DTY active Store Recall Norm Com
55. 17 0180 4129 4 1 luF 35 V 04200 173D105X9035V A2 C20 0160 3879 7 1 0 01 100 V 02010 5 201 103 A2 C21 0160 3879 7 1 0 011 100 V 02010 5 201 103 2 24 10180 0376 5 1 0 47uF 35 04200 150D474X9035A2 DYS 2 25 0160 3879 7 1 0 01 100 V 02010 5 201 103 A2 C26 0160 3718 3 1 0 047uF 250 05992 23547350 2 27 0160 3879 7 1 0 01uF 100 V 02010 5 201 103 2 C28 0160 3879 2 29 0160 3879 2 30 0160 3879 2 31 0180 4129 2 32 0160 5746 0 01uF 100 V 02010 5 201 103 CAP 0 01uF 100 V 02010 SR201C103MAAH 0 01uF 100 V 02010 SR201C103MAAH CAP luF 35 V 04200 1730105 9035 0 luF 50 V 06121 37987 5104 11 2 33 0160 5746 1 1 CAP 0 1uF 50V 06121 37987 5104 11 A2 C101 0160 4386 3 1 33pF 200 09939 RPE121 105C0G330J200V A2 C102 0160 4389 6 1 100 200 V 02010 SR202A101JAAH A2 C103 0160 5746 1 1 O 1uF 50 V 06121 37987 5104 11 A2 C104 1 1 CAP O 1uF 50 V 06121 37987 5104 11 0160 5746 26 Replaceable Parts Table A 4 Control Board Parts List continued A2 C105 0160 5746 1 1 0 luF 50 V 06121 37987 5104 11 A2 C106 0160 5746 1 1 O 1luF 50 06121 37987 5104 11 2 C107 0160 5746 1 1
56. 1N4150 04486 6 1901 1098 1 1 DIO 1N4150 04486 1 1901 1098 1 1 DIO 1N4150 04486 1 CR8 1901 1098 1 1 DIO 1N4150 04486 1901 1098 1 1 DIO 1N4150 04486 Al 130 1901 1098 1 1 DIO 1N4150 04486 1 131 1901 1098 1 1 DIO 1N4150 04486 1 132 1901 1098 1 1 DIO 1N4150 04486 Al 133 1901 1098 1 1 DIO 1N4150 04486 Al 140 1901 0535 9 1 DIO SCHOTTKY 5 02062 50825511 1 CR141 1901 0535 9 1 DIO SCHOTTKY SM 02062 50825511 1 142 1901 0535 9 1 DIO SCHOTTKY SM 02062 50825511 1 143 1901 0535 9 1 DIO SCHOTTKY 5 02062 50825511 1 200 1901 1068 5 1 DIO SCHOTTKY SM 02062 5082 5541 Al CR201 1901 1068 5 1 DIO SCHOTTKY SM 02062 5082 5541 1 220 1901 1068 5 1 DIO SCHOTTKY SM 02062 5082 5541 1 221 1901 1068 5 1 DIO SCHOTTKY SM 02062 5082 5541 1 240 1901 1068 5 1 DIO SCHOTTKY SM 02062 5082 5541 1 241 1901 1068 5 1 DIO SCHOTTKY 5 02062 5082 5541 1 401 1901 1098 1 1 DIO IN4150 04486 1 02 1901 1098 1 1 DIO 1N4150 04486 Al 403 1901 0518 8 1 DIO SCHOTTKY 5 02062 5082 5509 1 404 1901 0518 8 1 DIO SCHOTTKY SM 02062 5082 5509 1 501 1901 1098 1 1 DIO 1N4150 04486 1 CR502 1901 1098 1 1 DIO 1N4150 04486 1 503 1901 0179 7 1 DIO SWITC
57. 2 21K 5 25V MOOEL HP8112A FIGURE 18 3 6 MAIN BOARD A1 SCHEMATIC 5 SERVICING THE TIMING AND SLOPE GENERATORS 10 3 13 Troubleshooting Note m If an error code is being displayed by the HP 8112A you must press a key for example to return the microprocessor to normal operation before troubleshooting m The component layout and locator for the main board 1 is at the end of this chapter Address Decoder address decoder U100 can be checked with signature analysis Set the microprocessor to free run mode as follows 1 Set the wire on board A3 See Chapter 10 7 to position P1 2 Disconnect Jumper A2W1 3 Connect RES on A3 to ground for a short time to ensure the microprocessor is reset 4 Connect the signature analyser ground to the microprocessor board ground then set the signal analyser as follows Signal Board Analyzer Connections Start f TP 5 Stop TP 5 Clock x TP Ground Ground 5 Verify that the reading at the microprocessor board 4 5 V is 0003 6 Check the signature of board inputs against those given in Table 10 3 6 SRC LA4 PIG LA5 CLR 12201001 _ 51 WIC DIC 62 f A3W4 Figure 10 3 7 Address decoder Simplified block diagram 10 3 14 Servicing the Timing and Slope Generators Table 10 3 6 Address Decoder Signatures Connector Mn
58. 4 12 and add the following figure and text U UU CU DE Figure B 10 Rear Panel Backdating B 39 Note y B 40 Backdating HP IB Address When the instrument is switched on it determines its HP IB address from the address switches on the rear panel The address switches are preset at the factory to 12 decimal To change the address change the bit settings on the rear panel switch then either press the key or switch the instrument off and on again Pressing the key will display the current HP IB address in decimal on the front panel digital display 3 Delete the text in the section Setting the HP IB Address in Chapter 6 and replace it with the following The HP 8112A HP IB address is read from the address switch on the rear panel when the instrument is switched on The address switch is set at the factory to 12 decimal Figure B 11 HP IB Address Switch Factory setting m Pressing the key displays the current address while the key is depressed m When allocating addresses ensure that no two instruments on the bus have the same address To change the instrument address 1 Change the address on the rear panel address switch 2 Press the key or switch the instrument off and on again 4 In the section General in Chapter 10 correct the last sentence to read
59. 5 9 98ms PERIOD Ims Figure 9 9 Adjustment Points on the Control Board A2 Adjustment Procedures 9 23 10 Introduction to Servicing Safety Considerations Warning Safety Check Dangerous voltages capable of causing serious personal injury are present in this instrument Use extreme caution when handling testing and adjusting The servicing described in the following chapters is performed with the instrument switched on and its protective covers removed Therefore servicing must only be carried out by a skilled person who is aware of the hazards involved and in the presence of another person who is capable of rendering first aid and resuscitation Capacitors inside the instrument may still be charged after the instrument has been disconnected from its external power supply The HP 8112A contains static sensitive devices Ensure that static safe precautions are taken to ATTENTION Static Sensitive prevent electro static discharge when the instrument covers are removed The following safety checks must be carried out after any servicing is completed 1 Disconnect the power cord from the external voltage supply 2 Inspect the interior of the instrument for any signs of abnormal overheating or arcing such as Discolored circuit board Discolored components Damaged insulation If a problem exists it must be investigated and fixed before proceeding
60. 5 115 104 06121 4 10160 6623 5 1 O 1uF 50 V 02010 5 115 104 06121 C15 0160 6623 5 1 O 1uF 50 V 02010 5 115 104 06121 C16 0160 6623 5 1 O 1uF 50 V 02010 5 115 104 06121 7 0160 6623 5 1 0 luF 50 V 02010 5 115 104 06121 18 0160 6623 5 1 0 luF 50 V 02010 5 115 104 06121 19 0160 6623 5 1 CAP O 1uF 50 V 02010 5 115 104 06121 C20 0160 6623 5 1 O 1uF 50 V 02010 5 115 104 06121 C21 0160 6623 5 1 0 luF 50V 02010 5 115 104 06121 C22 0160 6623 5 1 0 luF 50 V 02010 5 115 104 06121 C23 0160 6623 5 1 0 1uF 50 V 02010 5 115 104 06121 C24 0160 6623 5 1 0 luF 50V 02010 SA115C104MAAH06121 C25 0160 6623 5 1 0 1uF 50V 02010 5 115 104 06121 C26 0160 6623 5 1 0 luF 50 V 02010 5 115 104 06121 C27 10160 6623 5 1 0 luF 50 V 02010 5 115 104 06121 C28 10160 6623 5 1 CAP 0 luF 50 V 02010 5 115 104 06121 C29 0160 3877 5 1 CAP 100pF 200 V 02010 SR202C101MAAH C30 10160 6623 5 1 CAP 0 luF 50 V 02010 5 115 104 06121 Replaceable Parts 33 Table A 5 Microprocessor Board Parts List continued Reference HP Part CD
61. 5 delete Reference Description HP Part 08116 66523 R21 U38 In Appendix A Table A 5 add Reference Description HP Part 08116 66523 011 IC RAM 444 1818 1330 Backdating B 13 2 Figure B 2 shows the location of the RAMs U10 and U11 on the microprocessor board 08116 65503 Modify Chapter 10 7 Figure 10 7 9 accordingly A3 MICROPROCESSOR BOARD 08116 66523 TP7 45V TPe 6 E TP4 SA SP STA STP TP2 CO e CO 7 05 06 07 08 09 U10 un m R5 Figure B 2 08116 66523 U10 U11 layout 3 Figure B 3 shows the RAM circuit on the microprocessor board 08116 65523 Modify Chapter 10 7 Figure 10 7 5 accordingly TO U29B 8 TO U28 1 18 8 vec 18 G2 AU 5 H A1 6 15 2 7 14 4 18 5 lig a AS 2 a AB 22 64 128 256 512 910 RAM H 42 42 D1 42 Bl lt 12 18 FROM U30 5 R W ADORESS BUS FROM 030 5 DATA BUS Figure B 3 08116 66523 U10 U11 schematic B 14 Backdating Change 20 Main Board Component value change to increase adjustment range and improve compatibility For instruments with serial number 2343G02180 and lower make the following changes to the appropriate parts lists In Appendix A Table A 3 modify Reference Description Part 08112 66501 8400
62. 54121T or HP 54503A m Pulse Function Generator HP 8116 Cable Assembly BNC 5 off a Attenuator 20 dB 2 2 x Testing Performance 8 27 Test Setup HP 8116A HP 8112A Oscilloscope HP 54503A Lud Figure 8 19 High Level Control Verification Test Procedure 1 Connect the equipment as shown in the setup figure 2 Set up the HP 81124 as follows Trigger Mode NORM Control Mode HILC Transition Fixed PER 200 us DEL 65 ns DTY 50 LOL 2 00 V 3 Set up the HP 8116A Pulse Function Generator as follows Output Sinewave Frequency 50 Hz Amplitude 16 0 V Offset 0 00 V 4 Verify that the High level output can be varied between 8 V and 8 V while the 2 V level remains unchanged as shown below Control Input Controlled Output Figure 8 20 Correct High level Control 5 Set up the HP 81124 as follows Trigger Mode Transition PER DEL WID LOL COMPL 8 28 Testing Performance NORM Fixed 10 0 ms 65 ns 10 ns 2 00 V On 6 Set up the HP 8116A Pulse Function Generator as follows Output Squarewave Frequency 1 kHz Amplitude 2 0 V Offset 0 00 V 7 Verify that the scope display indicates a settling time of less than 200 as shown below 100 95 Settling time Figure 8 21 Correct Delay Control Store and Recall Function Test Characteristics Procedure Nine programmable locations for user preferred mode and parameter
63. 6 mA in the high state Caution The HP IB line screens are not isolated from ground Installation 3 5 Operating Environment Warning The HP 81124 15 not designed for outdoor use To prevent potential fire or shock hazard do not expose the HP 81124 to rain or other excessive moisture Temperature The HP 8112A may be operated in temperatures from 0 C to 55 Humidity The HP 8112A may be operated in environments with humidity up to 95 0 C to 40 C However the HP 8112A should be protected from temperatures or temperature changes which cause condensation within the instrument 777 777 0000 Instrument Cooling The HP 8112A is equipped with a cooling fan mounted inside the rear panel The instrument should be mounted so that air can freely circulate through it When operating the HP 8112 choose a location that provides at least 75 mm 3 inches of clearance at the rear and at least 25 mm 1 inch of clearance at each side Failure to provide adequate air clearance will result in excessive internal temperature reducing instrument reliability A 01 Claims and If physical damage is evident or if the instrument does not meet Repackaain specification when received notify the carrier and the nearest P ging Hewlett Packard Service Office The Sales Service Office will arrange for repair or replacement of the unit without waiting for settlement of the claim against the carrier 3 6 In
64. 7 1 RES 2 87 1 05524 55 1 A1 R113 0698 3439 4 1 178 1 125W 05524 55 1 A1 R114 10698 3159 5 1 5 26 1K 1 05524 55 1 Al R115 0757 0449 6 1 RES 20K 1 125W 05524 55 1 Al R116 0757 0394 0 1 RES 51 11 05524 55 1 1 R117 0757 0411 2 1 RES 332 1 125W 05524 55 1 1 R118 10757 0435 0 1 RES 3 92K 1 05524 55 1 1 R119 2100 3976 1 1 RES V SS 10K 02582 1392 1 126 0757 0442 9 1 RES 10K 1 125W 05524 55 1 1 R127 0757 0394 0 1 RES 51 1 1 05524 55 1 Replaceable Parts 17 Table A 3 Main Board Parts List continued Reference HP Part CD Qty Description Manufr Part 1 R130 0757 0438 3 1 RES 5 11K 1 05524 55 1 1 R131 0757 0289 2 1 RES 13 3K 1 05524 55 1 Al R132 0757 0441 8 1 RES 8 25K 1 05524 55 1 Al R134 0698 0085 0 1 2 61 1 05524 55 1 135 0698 3268 7 1 RES 11 5 196 05524 55 1 1 R136 0698 0084 9 1 RES 2 15K 196 05524 55 1 Al R137 0757 0460 1 1 RES 61 9K 1 05524 55 1 Al R138 0757 0289 2 1 13 3K 1 05524 55 1 Al R139 0698 7258 3 1 RES 8 25K 1 05524 50 2 1 R140 0698 7268 5 1 521 5 1 05524 50 2 Al R141 1810 0037 3 1 NETWORK RES 02483 761 3 R1K 1
65. AND FRONT PANEL 19 7 1 P O MICROPROCESSOR BOARD FROM A1 MAIN BD 2 5 1 8 SUB DECODER 74 5145 18 V HP IB STATUS LATCH gt 41633 41634 Log 4 4142 E Sl TO 5 0 49 1 19 A4 KEY 74L8175N ae 1 gt BOARD 9 09 FS F3 uae Jic J1 3 LATCH DATA BUS ev 28 u23 8x180 pe 4 13 005 147 18 118 1587 18 i KEY BOARD DISPLAY LATCH DEVICE BUS LATCH b MODEL 112 FIGURE 18 7 8 550 SCHEMATIC SERVICING THE MICROPROCESSOR AND FRONT PANEL 10 7 1 1 2 MIROPROCESSOR BOARD EJA ADORESS BUS DECODER CONTROL P O Al MAIN BOARD gt A 3 Fsg 2290 S F 1 m 2 A2 J5 B CONTROL BOARD Wee le 21 BOD m sup Ban sae 6 PD TES eon 15 469 24 DEVICE BUS 744844 DE FEEDBACK 34 69 DATA BUS T 3 4 SERVICE AS DISPLAY BOARD VERNIER KEYS 0 ie gt AD 1 01917 JOD DOWN STO IKD je ue HP IB
66. Al R541 Al R542 Al R543 Al R544 Al R545 Al R546 Al R547 Al R548 Al R549 Al R550 Al R551 Al R552 Al R553 Al R554 Al R555 Al R556 Al R557 Al R560 Al R562 Al R563 1 51 Al Al TP2 Al TP3 Al TP4 Table A 3 Main Board Parts List continued 0698 7220 0698 4358 0698 3429 0698 8819 0698 8819 0698 3495 0698 3495 0757 0346 0757 0346 0757 0346 0757 0346 0766 0025 0766 0025 0757 0818 0757 0442 0757 0442 0757 0346 0757 0346 0757 0460 0757 0442 0757 0290 1810 0279 0757 0384 0757 0399 0757 0399 3101 2956 0360 2264 0360 2264 0360 2264 0360 2264 1 c ww A N Pee t2 t2 CO HP Part CD Description Manufr Part RES 215 196 05W RES 14 196 125W RES 19 6 196 RES 3 83 196 RES 3 83 196 RES 866 196 125W RES 866 196 125W RES 10 196 125W RES 10 196 125W RES 10 1 125W RES 10 196 125W RES 101 2 3W MO RES 101 296 3W MO RES 825 196 5W RES 10K 196 125W RES 10K 1 125W RES 10 196 125W RES 10 196 125W RES 61 9K 196 RES 10K 196 125W RES 6 19K 196 NETWORK RES SIP RES 20 196 125W RES 82 5 196 RES 82 5 196 SW PB DPDT TERMINAL TEST PO TERMINAL TEST PO TERMINAL TEST PO TERMINAL TEST PO 05524 05524 05524 05524 05524 05524 05524 05524 05524 05524 05524 12482 12482 05524 05524 05524 05524
67. Appendix A Table A 3 modify Reference Description HP Part Al 08112 66501 C240 Capacitor 10 pF 0160 3874 R7 Resistor 4 87 k 0698 4444 In Appendix A Table A 3 delete Reference Description HP Part 1 08112 66501 R7 Resistor 4 42 k 0698 4442 Change 18 Component value changes were introduced with a change in dual transistor supplier Glass spacers were fitted to the leads of R419 to increase inductance and the ferrite bead was discarded from Q400 Note d This change is associated with change 15 and change 24 For Instruments with serial number 2343G01930 and lower make the following changes to the appropriate parts lists B 12 Backdating Main Board In Appendix A Table A 3 modify Reference Description HP Part 1 08112 66501 535 Capacitor 68 0160 5737 0400 Transistor Dual PNP 1853 0075 In Appendix A Table A 3 add Reference Description HP Part Al 08112 66501 L513 Ferrite Bead 9170 0029 7000 M M7 Change 19 There was a board revision involving component changes substitution caused by a changeover from 1kx4 chips to 2kx8 For instruments with serial number 2343G02105 and lower 1 Make the following changes to the appropriate parts lists Microprocessor Board Appendix A Table 5 modify Reference Description HP Part A3 08116 66523 U10 RAM 444 1818 1330 In Appendix A Table A
68. Decoding RDDRESS BUS RoM SELECT EXE MAIN SELECT DECODER SUB DECODER 1 KEY BORRD GP SELECT LRTCHED SUB SUB DECODER DECoDER SELECT 7 2 DISPLRY Figure 10 7 3 Address decoding Address decoding is performed at two levels as shown in Figure 10 7 3 The main decoder U12 uses microprocessor addresss lines A12 A13 and A15 to enable one of the following U40 Sub decoder 1 013 m Sub decoder 2 014 Sub decoder 1 If sub decoder 1 113 is enabled by the main decoder it uses microprocessor address lines A8 A9 and A10 to enable one of the following m RAM 110 Keyboard Scanner U19 GPIA U30 Sub decoder 2 If sub decoder 2 U14 is enabled by the main decoder it uses microprocessor address lines A0 1 and A2 to enable one of the following m Latched Data Bus Latch U16 Control Board Addressing via U18 U21 U17 Refer to Control Board Address Decoding m Device Bus Feedback Latch U26 m Display Latche U23 m HP IB Status Latch U37 10 7 4 Servicing the Microprocessor and Front panel Control Board Address Decoding Key Scanning Display Driving Address decoding for the control board functions is partially carried out on the microprocessor board Address lines A3 A9 and A14 are passed through latch U18 under the control of sub decoder 2 U14 A14 then becomes the MODE control for the display driver refer
69. Interval A gt B COM i Trig level 1 50 V Z 500 The typical Width range characteristic is shown in Figure 9 4 Connect the HP 8112A main output to channel A of the counter Adjust the range high end with A2R9 for about 1 above programmed value 1 01 ms Set the HP 8112A WID parameter to 9 99 ms Adjust the range low end with A1R11 for about 1 above programmed value 10 1 ms Set the HP 8112A WID parameter to 3 5 ms 9 10 Check the mid range for 3 5 ms 50 ys Repeat steps 5 to 9 adjusting again if necessary for the best compromise If the adjustment is not possible alter the value of A2VR3 R63 see table 9 1 Repeat steps 5 to 9 if neccessary 11 12 13 Set the HP 81124 as follows PER 200 ns WID 10 ns Connect HP 8112A Trigger Output via a 20 dB attenuator to trigger input of the HP 54121 Connect HP 8112A Output via 20 dB attenuator to input 4 of the HP 54121A Adjustment Procedures 9 13 9 14 Adjustment Procedures 14 15 16 17 18 19 On the oscilloscope press and adjust A2R8 for 10 ns 0 2 ns at 50 of amplitude See Figure 9 5 Alter HP 8112A WID to 99 9 ns Adjust the low range end with A2R59 for 101 ns 0 2 ns Repeat previous six steps and re adjust if necessary Alter HP 8112A WID to 50 ns Check that Min width is 50 ns 2ns Shaper and Offset Adjustments Equipment Procedure Oscilloscope HP 54503A Digit
70. Mode NORM Control Mode Off Transition Fixed DTY 5096 HIL 1 00 V LOL 1 00 V 3 Set the counter function control to PER A 4 Set the HP 8112A Period to the following values and read the actual output from the counter Record your results on a copy of Testing Performance 8 3 the Test Record specified limits are given here and on the Test HP 8112A Counter reading setting High Limit Record Delay Performance Test Specifications Range 75 ns to 950 ms Accuracy 5 of programmed value 5 ns Max Delay 1 period plus 55 ns Repeatability Factor 4 better than accuracy Max Jitter 0 296 of programmed value 100 5 Equipment Counter HP 5335A Two cable assembly same length m 50 Q Feedthrough Termination Required if counter input impedance 50 0 8 4 Testing Performance Test Setup Procedure Counter HP 5335A HP 8112A C ues Figure 8 2 Delay Performance Test 1 Connect the equipment as shown in the setup figure Use a 50 Q feedthrough termination if you cannot select 50 Q input impedance on the counter Set up the HP 8112A as follows Input Mode NORM Control Mode off Transition Fixed DTY 50 HIL 2 40 V LOL 0 00 V Set the counter as follows TIME Slopes A and B Positive Trigger levels 1 2V Gate Mode gt MIN Set the HP 8112A Delay and Period to the following values and read the actual output from the counter
71. Note Period Vernier Current can be checked by measuring the voltage across R212 Table 10 3 11 Period Generator Signal Levels PER Setting Voltage across R212 0 16 V 0 003 V 0 016 V Delay Generator 1 Set up the HP 81124 as follows RCL 0 DEL 650 us or DBL 200 us 2 Check the input signal from the period generator pin 7 of U220 against Figure 10 3 11 50 50 4 E gt gt 4 DEL 65 us DEL Figure 10 3 11 Delay Generator O P waveforms 3 Check the ramp signal at pin 20 of U220 against Figure 10 3 12 4 Check the signal being sent to the width generator IC240 at TP2 against Figure 10 3 11 1 9V DEL 650us Figure 10 3 12 Delay Generator ramp signal 20 5 Check the Delay Generator operation against Table 10 3 12 10 3 18 Servicing the Timing and Slope Generators Table 10 3 12 Delay Generator Operation 0220 Pin Mnemonic Description State 5 DELC Delay control voltage input L 2 ERD Delay error output signal L 10 DIC Delay input store select See Table 10 3 1 11 to 18 LD7 100 Data to be latched into See Table 10 3 2 the input store of U220 See Table 10 3 13 6 Verify that voltage at U220 pins 1 4 and 5 are at virtual ground min 40 mV max 0 V Note 1 Delay Vernier Current can be checked by measuring the voltage across R226 T Set HP 8112A PER to 20 ms 8
72. OUT lt PERIOD U22 OUT lt DELAY DELAY MUST BE LESS THAN PERIOD U240 OUT DEL MODE 4 WIDTH WIDTH MUST BE LESS THAN PERIOD f looo DBL MODE DOUBLE PULSE 203 7A 0301 DIFFERENTIAL Lee TRE OUTPUT DEL MODE LEE amp TRE MUST BE LESS THAN WIDTH Figure 10 3 2 Example of signal generation Period Generator The period generator operating in the RATE mode produces 50 duty cycle square wave output pulses at a repetition rate governed by the analog current input from the Period DAC or Control Input and the internal range data Servicing the Timing and 10 3 5 Slope Generators 10 3 6 Servicing the Timing and Slope Generators The IC is either free running or triggered by the EXT INPUT depending on the state of the internal trigger mode latches data from LD5 to LD7 The inverse output OUT is passed to the trigger amplifier Chapter 10 7 for subsequent output as TRIG OUT Normal output OUT is passed via level shifter Q200 to the delay generator trigger input Connections are also made from the period generator to the Burst Clock described in chapter 10 6 Delay Generator The delay generator working in TIME mode produces a time shifted output identical in rate to its trigger input The delay time is dependant on the analog inputs internal range data and triggering mode See Figure 10 3 2 for an example of signal generation A delay time greater
73. RES 1 54K 1 05524 55 1 T 1 1 RES 1 125W 05524 CCF 55 1 T 1 1 RES 215 196 125W 05524 55 1 T 1 1810 0203 5 0698 4425 0 0698 4425 0 3 8 0757 0280 0698 3441 0757 0280 3 1 RES 196 125W 05524 55 1 T 1 0360 2264 6 1 TERMINAL TEST 10358 1095 0360 2264 6 1 TERMINAL TEST 10358 10950 0360 2264 6 1 TERMINAL TEST 10358 10950 0360 2264 6 1 TERMINAL TEST PO 10358 1095 0360 2264 6 1 TERMINAL TEST PO 10358 1095 0360 2264 6 1 TERMINAL TEST 10358 1095 0360 2264 6 1 TERMINAL TEST 10358 10950 0360 2264 6 1 TERMINAL TEST PO 10358 1095 0360 2264 6 1 TERMINAL TEST 10358 1095 0360 2264 6 1 TERMINAL TEST 10358 1095 0360 2264 6 1 TERMINAL TEST 10358 1095 0360 2264 6 1 TERMINAL TEST 10358 1095 0360 2264 6 1 TERMINAL TEST 10358 1095 1820 1216 3 1 IC SN74LS138N 01698 SN74LS138N 1820 1730 6 1 5 741 5273 01698 SN74LS273N 1826 0821 6 1 ANLGSW 03285 AD7512DIJN 1826 0857 8 1 D A 10 03285 ADT7522LN 1826 0857 8 1 D A 10 BIT 03285 ADT7522LN 1826 0857 8 1 D A 10 BIT 03285 ADT7522LN 1826 0547 3 1 072A 01698 072 1826 0547 3 1 072A 01698 072 1826 0276 5 1 MC78L05ACP 02037 1826 0111 7 1 IC 1458 03799 1458 1
74. RES 100K 196 05524 55 1 1810 0037 3 1 NETWORK RES 02483 761 3 1810 0503 8 1 NETWORK RES 02483 761 3 R3 3K 0757 0449 6 1 RES 20K 1 125W 05524 55 1 0757 0442 9 1 RES 10K 1 125W 05524 55 1 1810 0330 9 1 NETWORK RES DIP 02483 761 3 470 OHMS 1810 0280 8 1 NETWORK RES SIP 05524 5 10 01 1810 0280 8 1 NETWORK RES 51 05524 5 10 01 A 34 Replaceable Parts Table A 5 Microprocessor Board Parts List continued 0698 8812 R19 0757 0280 R20 0757 0280 R21 0698 3162 A3 R22 0757 0442 R24 0757 0280 R25 0757 0442 R26 0757 0442 R27 0757 0279 01 1820 2099 02 1820 2075 03 1820 2024 04 1820 2024 010 1106 0001 012 1820 1216 013 1820 1216 014 1820 1216 015 1820 1414 916 1820 1997 017 1820 1216 019 1820 1298 020 1820 1426 021 1820 2024 922 1820 2132 023 1820 1997 925 1820 2075 926 1820 2024 027 1826 0161 929 1858 0053 030 1820 2219 931 1820 2058 Reference Part CD Qty A3 R17 RES 1 196 125W RES 1 125W RES 196 125W RES 46 4K 196 05524 05524 05524 05524 RES 10K 1 125W 05524 RES 1 125W RES 10K 196 125W 05524 05524 RES 10K 1 125W 05524 RES 3 16K 1 IC 6802 IC SN74LS245N
75. RES 15 4K 196 0698 3540 Change 21 Caution Instrument New part numbers were allocated to case components caused by standardisation on metric screw threads If you are replacing any of the parts identified below you should take care before ordering a replacement from the parts list in Appendix A of this manual Any part containing a screw thread will require new compatible screws and the instrument case will then contain a mix of screw types For instruments with serial number 2343G02255 and lower make the following changes to the appropriate parts lists In Appendix A Table A 2 modify Reference Description HP Part 0 08112 MP4 PANEL SUB 08112 00202 MP7 FRAME FRONT 5020 8813 MP8 FRAME REAR 08112 21103 12 SIDE STRUT 17 IN 5020 8831 MP13 SIDE STRUT 17 IN 5020 8831 17 COVER BOTTOM 08112 04158 18 COVER 31 2 M 08112 04101 Backdating B 15 Change 22 For instruments with serial number 2343G02330 and lower Changes in component sourcing required several changes to the parts lists Because the changes did not affect the manual or the performance of the instrument they are not detailed here 23 24 For instruments with serial number 2343G02380 and lower Changes in component sourcing required several changes to the parts lists Because the changes did not affect the manual or the performance of the instrument they are not d
76. Record your results on a copy of the Test Record specified limits are given here and on the Test Record HP 8112 Counter reading setting DEL PER Low Lait High Limit 75 ns 95 83 75ns 50 us 95 147 50 5250 10 ms 95 ms 9 50 ms 10 50 900 ms 950 ms 855 0 ms 945 0 ms Testing Performance 8 5 Double Pulse Performance Test Note y Specifications Equipment Test Setup 1 8 6 Testing Performance The DBL measurement is described as the time interval between the two leading edges of the double pulse recorded at 50 amplitude Range 20 ns to 950 ms Accuracy 5 of programmed value 2 ns Repeatability Factor 4 better than accuracy Max Jitter 0 2 of programmed value 100ps Digitizing Oscilloscope with Accessory HP 54121T Counter HP 5335A Cable 50 0 to coaxial 2 each HP 8120 1839 20 dB attenuators 500 feedthrough termination Required if counter input impedance 50 0 Oscilloscope HP 5412xT HP 8112A 1 9 20 dB Attenuator 27 with BNC SMA Adaptor Figure 8 3 Double Pulse Performance Test Test Setup 2 Procedure HP 8112A Counter HP 5335 ien cor EE 9j gt Figure 8 4 Double Pulse Performance Test Connect the HP 8112 to the oscilloscope as shown in Test Setup 1 Set
77. Set the oscilloscope as follows a Full screen display center one pulse horizontally and vertically on the screen b Number of averages to 64 c Attenuation factor to 100 d Select the Delta V and turn the voltage markers on e Set VARIABLE LEVELS 95 105 and press the Auto Level Set f Center the pulse top vertically offset 8 V g Set V div to 500 mV Adjust A1C530 for overshoot 596 in normal and complement modes Adjustment Procedures 9 7 Note 9 9 8 Adjustment Procedures 10 11 12 13 14 15 Centre the pulse base line vertically offset 8 V and set Set the VARIABLE LEVELS 5 to 4 596 Check overshoot 5 in normal and complement modes Re adjust A1C530 if necessary Set the HP 81124 as follows Transition Fixed Pulse Width Settling time Amplitude 9 accuracy band Overshoot HIL itude 50 10 0 Pre shoot LOL Figure 9 3 Typical Pulse Display Repeat steps 7 to 11 using 90 110 10 10 and adjust 1 410 for overshoot 10 in both normal and complement modes Set the HP 81124 as follows LOL 2 0V LIMIT Off Check the overshoot at both HIL and LOL for both Fixed and Linear modes If necessary re adjust A1C530 or A1C410 to achieve the above limits Repeat steps 1 to 12 if necessary The oscilloscope trace flatness error GaAs input circuit may affect measurement of pre and o
78. String consists of 153 ASCII characters PRINT Recalling setting from location 0 Standard Setting OUTPUT 712 RCLO PRINT PRINT Reading the current setting Oldtime TIMEDATE OUTPUT 712 CST read the current setting ENTER 712 Timetaken TIMEDATE Oldtime DIV 001 1000 PRINT finished PRINT This took Timetaken seconds PRINT PRINT The current Learn String is PRINT A PRINT WAIT 4 PRINT Period is set to 999 ms OUTPUT 712 PER999MS WAIT 4 PRINT PRINT Sending the Learn String back to the HP8112A Oldtime TIMEDATE OUTPUT 712 A Timetaken TIMEDATE Oldtime DIV 001 1000 PRINT finished PRINT This took Timetaken seconds PRINT PRINT End of the program LRN_DEMO LOCAL 712 END Programming Examples 7 17 INTERROG Purpose This program demonstrates the usage of all types of interrogate commands offered by the HP8112A Comments Please refer to the listing of the program for the exact usage of the commands Below is a screen dump of the results printed when running the program The interrogate parameter set commands IRCLO 9 return the Learn String of the given setting with a prefix that indicates from which location the Learn String was loaded For example after the command 5 the response returned will start with the prefix SET 5 This prefix must be cut off if the Learn String shall be
79. The capacitor now discharges via the current mirror at a rate set by Idown ref to 0 V At this point Igown is diverted via the internal diodes and the current mirror circuit and the capacitor voltage remains at 0 V until the next trigger is detected Range Switches The ramp timing capacitance is selected from range latch U300 Slopes from 100 to 95 ms are possible with the external capacitors slopes less than 100 use the internal capacitor in U301 Reference Circuit An external reference source U320 and associated components provides the reference voltage via the Schmidt trigger required by the internal switching diodes which clamp the ramp voltage and the output current sources The four ECL error feedback outputs from the Timing and Slope ICs are converted to levels by transistors Q140 to 0143 and their associated components The error outputs are fed via latches and drivers to the Data Bus when is active 10 3 8 Servicing the Timing and Slope Generators A1 MAIN BOARD MICROP BD FROM FRONT PANEL FROM FRONT PANEL 2 ADDRESS DECODER MODE DECODER SERVICE 16 EXT Q 0 EXT 77 eum 5 R3 i R4 AR 2 a om 0 0121 3 2 21 NO LONGER USED 5 2 19 n v BURST FF pus CONTROL 8D 22 4 Me BURST ON 15 20169
80. and 5 4 V supplies 5 1 V supply A reference voltage of 5 1 V is obtained from the 15 V regulated supply using zener diode VR1 6 2 V R11 and R12 U1C compares the 5 1 V supply with this reference voltage and drives the regulator transistor Q1 via driver transistor Q2 until there is zero difference If the current drawn from the 5 1 V supply is excessive a distinct voltage drop develops across R2 U1D detects this and its output switches toward the negative supply This forward biases diode CR8 switches off Q2 and Q1 and hence the 5 1 V supply is withdrawn 5 V supply The same principles of operation apply to the 5 V voltage regulator U2C and current sensor U2B The 5 V reference is obtained from the 5 1 V reference via R13 5 4 V supply The 5 4 V reference is obtained from the 5 V reference using U2D as an inverter with a gain of 1 08 The voltage regulator U1B and the current sensor U1A operate as above except that the comparator output is normally negative and switches positive to withdraw the supply 10 2 2 Servicing the Power Supply Power down Detection 023 is used to detect the power being switched off Normally its output is negative because its inverting input is at a higher potential 5 1 V than its non inverting input 5 V When the HP 8112A is switched off the 5 1 V supply breaks down faster than the 5 V reference because it is loaded by the microprocessor board This is detected by U2A which s
81. available in PERC An external voltage controls the Period and NOT the Duty Cycle DTY WIDC As above External voltage controls the Width and NOT the Duty Cycle DTY TRIG An external trigger signal generates the Period The displayed Duty Cycle is calculated from the internal Period DTY is not confirmed with the external period There are four types of error which set the input error bit in the status byte The conditions which cause them and the description used by the HP 8112A when replying to an IERR command are listed below The timing error bit is not latched therefore a transient error is only recorded by generating an SRQ More than one error condition can occur at one time When using the IERR command ensure that you allow for a reply containing more than one error description IERR Description Comments EWID PERC The external trigger input signal is passed through to the output A Control input cannot alter period delay or width Identical returns are EWID DELC and EWID WIDC TRIG PERC Both inputs will attempt to control the period This is not possible GATE TRIG slope Both EXT INPUT slopes selected Either leading edge or trailing edge may be specified but not both EWID TRIG slope As above Either leading edge or trailing edge may be specified but not both This bit indicates that a service request has occurred The bit is latched until cleared by reading the status byte This bit is set when there is data
82. can be checked by measuring voltage Note across R245 T Set HP 8112A PER to 20 ms 8 Check signal levels against Table 10 3 15 Table 10 3 15 Width Generator Signal Levels Setting Voltage across R245 0 125 V 0 004 V 0 02 V un Slope Generator Set the HP 8112A to RCL 0 and press the key 2 Check the input signal from the width generator at pin 1 of U301 against Figure 10 3 16 3 Check the ramp current input at pins 9 and 12 of U301 against Figure 10 3 16 4 Check the signals being sent to the shaper IC waveforms at TP1 and 21 of U301 against Figure 10 3 16 Pins 9 amp 12 Pin 1 TP 4 5 Pin 21 1 8V 12 E Figure 10 3 16 Slope Generator Input and Output signals Servicing the Timing and 10 3 21 Slope Generators 5 Verify that the voltages at U301 pins 11 15 are at REF voltage typ 41 85 V 6 Verify that the voltage at U301 pin 13 is at TTL LOW level typ 90 mV Range Decoder 1 Check the range decoder against Table 10 3 16 Table 10 3 16 Range Decoder Truth Table 17300 Pin Slope Range F S 1 5 5 ns 99 9 ns L 2 50 ns 999 ns s H L 3 0 5us 9 9 H H L 4 99 9 us H H L 5 50 us 999 us H H L 6 0 5 ms 9 09 ms L 7 50ms 99 9ms H L Area U301 zr 20 U301 10 13 Only in Self Test H Note y LEE and TRE must be in the same ran
83. cies ce 15 9519 Rees 8552 02 500 9511 106 B2 C514 De 1508 Di R553 ci 615 1599 412 e 8554 Di C111 C1 C516 Di Q513 Di 2211 R420 Ce R555 D1 2112 2 Di 014 2555 01 9515 D2 R421 1 Di jose 214 Ree B1 18 1514 115 528 0515 0517 5880 8423 01 R221 C2 R562 01 DI 0518 01 6552 R563 Di ci 5522 DI 8 p nes C132 ire n R224 C1 R42 ce 51 554 ie 12 2 C134 C1 525 D2 M209 R2 A1 R225 R428 B2 526 01 1 R3 Al R226 C1 C141 R4 Al a C2 C200 528 Di Meee R5 Al 0 R432 4 Ce MP220 Ai R241 ce R433 5 ca ci 5 5 Re42 TP6 C204 C532 Di Al Rd R435 535 01 RB Al jme C541 D1 208 D R248 65 TH C554 R11 Al E mm mime lees Zu m C224 Cl R281 Bl Ue Al Caes ci Al gogo pe Al DI 533
84. edge triggers a single pulse or double pulse if DBL is selected Active input level enables pulse train last pulse always complete Width and period of first pulse may deviate 1096 from subsequent pulses Pulse recovery input edges toggle output Each active input edge triggers a burst of pulses BUR 1 to 1999 pulses Width and period of first pulse may deviate 1096 from subsequent pulses An external control signal applied to the CTRL INPUT BNC connector can be used to modulate the output signal 1 V to 10 V voltage at Cntrl Input varies the selected parameter over one decade Eight non overlapping decades cover the range specified under Timing Parameters Display shows max value available in selected range 8 V to 8 V input varies over the same range irrespective of LOL Settling time within 5 of final value 200 us Output Modes Complement Disable Limit Fixed transitions Cosine transitions Linear transitions Selectable on off Disconnects output default at switching on Implements present output levels as output limits 5 ns from 1096 and 9096 amplitude 3 5 ns from 2096 to 8096 amplitude Up to 2596 faster between 1096 and 9096 of amplitude than linear transitions 3 linearity 70 0000000000 0 000 0 9g Inputs and Outputs External Input Control Input Trigger Output Threshold level Minimum amplitude Maximum Input voltage Minimum
85. examples show how the HP 8112 instrument be set up for each type of trigger mode The examples list the basic operating steps in the order in which they would normally occur after switching on In the applications section examples are given of how the HP 8112A can be used in common design and test situations OUTPUT cycle MAIN d OUTPUT Figure 5 1 Typical output in Normal mode 1 Switch the instrument on using the line switch 2 If neccessary select normal mode by repeatedly pressing the standard mode key until the NORM LED is lit 3 Select the Transition mode by pressing the key with the appropriate symbol The parameter window will be automatically illuminated Operating Examples 5 1 Note gd Trig Mode 5 2 Operating Examples 4 Select each output parameter in turn by pressing its associated key Adjust the parameter value using the and keys Refer to Chapter 4 Operating for additional information on parameter adjustment 5 If a Control Function is required select the required mode by repeatedly pressing the control mode key until the required mode is lit Apply the Control signal to the CTRL INPUT connector Refer to Chapter 4 Operating for more permissible combinations of Operating and Control modes You may wish to set up Output Limits as described in Chapter 4 Operating to protect the device under test 6 Press the key to turn off output disable mode and enable the outp
86. following two figures Backdating B 43 MP28 2x 5 MP22 2x Figure B 14 Mechanical Parts 1 B 44 Backdating MP40 4x MP41 4x J3 4x J1 MPH 2 MP32 2x Figure B 15 Mechanical Parts 2 Backdating B 45 C Updating Introduction This appendix contains information to correct errors in the manual and to update the manual for instruments with a serial number higher than that shown on the title page of this manual Please file all update information behind this page If any text or drawings are affected it is useful to indicate whether that update information has been incorporated in the manual You should ensure that you request update information for this manual at regular intervals from Hewlett Packard Updating 1 Appa HEWLETT PACKARD MANUAL CHANGES July 1996 Manual for Model Number 8112A Manual printed on Manual Part Number 08112 90004 Make all ERRATA corrections Checkthe following table for your instrument serial prefix serial number EDC and make the listed changes to your manual New Item Serial Prefix or Manual Serial Number Changes ERRATA 3205G10181 1 3205G10381 2 3205G10706 3 3205G10986 4 3205611016 5 015 LIBRARY 3205G11616 6 3205G11841 7 10 July 1996 Page 1 of 16 MODEL 8112 INDEX OF MANUAL CHANGE MANUAL CHANGE FRAME ERRATA 1 al al nal 10 July 1996 Al C18 19 281 C
87. i 2 DIGIT STATUS LEDS DOWN RCL 5 UNIT LEDS 8 PARAMETER 8 MODE LEDS m 0527 KB ils 0193 va HE Q4 Vane 14 DL e 05 EE Sus 25 25 81318 018 I 25 4 0105 hoe Vus 0529 fa 5 a NE 815 b 5 14 48 I 4 Ue a Pi HPs 12a FIGURE 18 7 7 KEYBOARD A4 AND DISPLAY BOARD AS SCHEMATIC SERVICING THE MICROPROCESSOR AND FRONT PANEL 10 7 13 1 2 A4 KEY BOARD FROM A3 MIROPR BO NORM LEE TRIG 41426 41425 A124 4123 J1c22 31021 28 41628 119 J1C32 J1 31 1 38 J1c29 41628 Ni 88 42418 ics olof bigs gt kr 42 9 42428 J2 3 Troubleshooting Note Free Running Signature Analysis Note Address Bus If an error code is being displayed by the HP 8112A you must press a key for example to return the microprocessor to normal operation before troubleshooting m The component layouts and locators for the microprocessor board A3 the keyboard A4 and the display board A5 are at the end of the chapter To carry out signature analysis the microprocessor must be set to a free running routine in which it increments
88. in the HP 8112A input buffer You can monitor this bit to determine if the instrument has finished interpreting a long programming message Programming 6 17 ____ __ __________ HP IB Universal Commands Note 6 18 Programming DCL SDC GET The HP 8112 supports the following HP IB Universal commands These are HP IB commands NOT instrument programming commands They are not used in programming messages If you require more information on the HP IB protocol and hardware refer to General for a list of references HP IB Description BASIC 5 0 5 1 equivalent Mnemonic Device Clear CLEAR T spc Selected Device Clear CLEAR 712 Local Lockout LOCAL LOCKOUT 7 GTL Goto Local LOCAL712 LOCAL Group Execute Trigger TRIGGER 712 TRIGGER 7 UNL Uniisten SEND 712 UNL UNT SEND 712 UNT Serial Poll Enable SPOLL 712 Serial Poll Disable My listen address selectable My talk address selectable An DCL command causes the HP 81124 to load its standard parameter set The instrument remains in its current mode local or remote An SDC command causes the HP 8112 to load its standard parameter set and enter remote mode An HP IB GET command simulates an external trigger to the HP 8112A in TRIG E BUR and E SWP modes Hints for solving Problems that might Reading the Status By
89. m The power cable must only be inserted into a socket outlet provided with a protective ground contact The protective action must not be negated by the use of an extension cord without a protective conductor m Before switching on the instrument the protective ground terminal of the instrument must be connected to the protective conductor of the power cable This is verified by using the power cord which is supplied with the instrument Intentional interruption of the protective ground connection is prohibited In accordance with international safety standards the HP 8112A is equipped with a three wire power cable When connected to an appropriate ac power receptacle this cable grounds the instrument cabinet The type of cable shipped with each instrument depends on the country of destination Refer to Figure 3 2 for the part numbers of the available cables Australia Denmark Europe Great Britain 8120 1369 8120 2956 8120 1689 8120 13151 Switzerland 8120 2104 South Africa United States 120V Japan 120 8120 4211 8120 1378 Figure 3 2 Power Cables amp Plug Identification Installation 3 3 3 4 Installation The following work should be carried out by a qualified electrician all local electrical codes being strictly observed If the plug on the cable does not fit the power outlet or the cable is to be attached to a terminal block cut the cable at the plug end and re wire it The color coding used
90. mode is selected DRTR BUS DRTR BUS LOW BYTE RCCEPTOR HIGH BYTE RCCEPTOR LORD CK BOTH COUNTERS COUNTER COUNTER m BURST FF DETECT 1 BURST ON OFF 3 SQUARE OUTPUT TRIGGER INPUT gt Figure 10 6 1 Simplified Burst Generator Figure 10 6 1 shows a simplified view of the burst generator circuits The burst flip flop is located on the main board not on the control board Refer to Figure 10 6 2 Operation of the burst control circuit can be categorised as follows m Burst number acceptors Counter Blocking flip flop Burst Number burst number input from the front panel or system controller Acceptors is loaded into latches U100 and 0101 on receipt of LBB low byte burst and HBB high byte burst from the control board address decoder The signal loads the preset burst number into the counter circuits and resets the blocking flip flop 0109 which allows the counter to start counting down Servicing the Burst Control Circuit 10 6 1 Counter Burst is triggered by external trigger or operation of the key The counter is then clocked by output pulses from the period generator on the main board A1 The 11 bit counter consists of two 4 bit counter ICs U111 and U112 and three flip flops U105 and U106A which handle the three least significant bits The whole counter counts down wh
91. number 2343G01580 and lower make the following changes to the appropriate parts list Main Board In Appendix A Table A 3delete Reference Description HP Part 1 08112 66501 C535 Capacitor 47 pF 0160 4387 C535 Capacitor 68 pF 0160 5737 L513 Ferrite bead Green 9170 0029 Setting time Overshoot 52 1009 Ringing not more than plus minus 496 9 Figure 1 Example output pulse Change 16 Main Board Capacitor C415 was added between Pin 20 of connector J2 and ground to provide a cleaner signal at low period times Other component value changes were to compensate for slight variations in dual transistor performance For instruments with serial number 2343G01630 and lower make the following changes to the appropriate parts lists In Appendix A Table A 3 modify Reference Description HP Part 3 Al 08112 66501 R406 Resistor 1 62 k 0757 0428 R408 Resistor 2492 0698 4421 R421 Resistor 2370 0698 7221 In Appendix A Table A 3 add Reference Description HP Part 1 08112 66501 R421 Resistor 147 0698 7216 Backdating 11 In Appendix A Table A 3 delete Reference Description HP Part 1 08112 66501 C415 Capacitor 220 pF 0160 5731 Change 17 Component value changes were introduced to improve linearity For instruments with serial number 2343G01855 and lower make the following changes to the appropriate parts lists Main Board In
92. oscilloscopes will provide faster response HP 8112A setting 500 ns 473 ns 100 ps 95 999 us 949 1 ms 0 95 ms 10 ms 9 5 ms Oscilloscope 500 10 5 ms 50 ms Testing Performance 8 15 000 207 7 Pulse Performance Test Specifications Preshoot Overshoot Ringing 596 of amplitude 10 mV for both Linear and Gauss modes 10 of amplitude 10 mV for Fixed transitions Settling time 100 ns 4 transition time Source Impedance 500 Equipment Digital Oscilloscope HP 54121T Two Cable Assemblies m Attenuator 20 dB 2 W two off Test Setup Procedure 1 Connect the equipment as shown in the setup figure above 2 Set up the HP 81124 as follows Input Mode NORM Control Mode Off PER 500 ns DEL 65 ns DTY 5096 Transition Fixed HIL 1 00 V LOL 0 00 V 3 Adjust the oscilloscope so that one pulse fills the display 4 Examine the HP 8112 output on the scope display in order to verify that the pulse characteristics do not exceed the specified limits as identified in Figure 8 11 Oscilloscope HP 5412 HP 8112 C 20 dB Attenuator with BNC SMA Adaptor Figure 8 10 Pulse Performance Test 8 16 Testing Performance 5 Record your results on a copy of the Test Record specified limits are given here and on the Test Record pre and overshoot Characteristic Specification Pr
93. other ranges DBL 100 ns 950 ms Width range 1 WID 20 ns 99 9 ns all other ranges WID 100 ns 950 ms Slope range 1 LEE TRE 5 5 ns 99 9 ns Slope range 2 LEE TRE 50 ns 999 ns Slope range 3 LEE TRE 0 5 ps 9 99 Sloperange4 LEE TRE 5 5 99 9 Sloperange5 LEE TRE 50 999 ps Slope range 6 LEE TRE 0 5 ms 9 99 ms Slope range 7 LEE TRE 5 ms 99 9 ms Area 03 3 028 4 U3 4 011 10 011 9 Period Control 1 Set the HP 8112A to RCL 0 2 Check the Period DAC output according to the following table ee O Table 10 5 3 Typical Period Control DAC Output HP 8112A PER Voltage at 1 ms 5 ms 9 99 ms Delay Control 1 Set the HP 8112A to RCL 0 PER 15 ms 2 Check the Delay DAC output according to the following table Table 10 5 4 Typical Delay Control DAC Output Voltage at TP3 HP 8112 DEL Servicing the Control Board 10 5 13 Width Control 1 Set the HP 8112A to RCL 0 PER 15 ms 2 Check the Width DAC output according to the following table Table 10 5 5 Typical Width Control DAC Output HP 8112A WID Voltage at TP2 ren Slope Control Set up the HP 81124 as follows RCL 0 DTY 5096 PER 10 ms TRE 500 5 2 Check the Slope DAC leading edge output according to the following table Table 10 5 6 Typical Slope LEE Control DAC Output 8112A LEE Voltage at 4 3 Set the HP 8112A LEE to 5001s 4 Check the Slope DAC trailing edge output acco
94. overall instrument and is intended to help you to isolate a fault at a functional level You can then proceed to the appropriate chapter which covers that function in more detail This chapter deals with the power supply including rectification regulation voltage and current sensing and power down detection This chapter covers the trigger input circuits slope generator IC timing IC error feedback circuit and the vernier feedback circuit This chapter covers the shaper IC amplitude modulator current mirror pre attenuator signal output amplifier output attenuator and the trigger output amplifier This chapter covers the byte offset latches Digital to Analog Converters timer reference circuits and the width vernier current source This chapter covers the microprocessor board including ROM RAM HP IB interfacing address decoding and the RAM battery supply It also covers the keyboard and display board which make up the frontpanel Each of these chapters contains an explanation of the theory of operation a troubleshooting guide and circuit schematics Component layouts for each board assembly are also provided The five board assemblies contained the HP 81124 are listed in Table 10 1 which lists the servicing chapters applicable to each board Introduction to Servicing 10 3 10 4 Introduction to Servicing Table 10 1 HP 8112A Board Assemblies amp Servicing Chapters Assembly Main Board Co
95. settings One for the standard switch on instrument mode and parameter set RCL 0 One non accessible location for currently active mode and parameter settings m Press m Use right hand VERNIER key to obtain display 0 m Press centre VERNIER key to recall the standard parameters m Alter one of the parameters m Press STO RCL m Use right hand VERNIER key to obtain display LIX where X is any number from 1 to 9 m Press left hand VERNIER key to store the altered parameter Testing Performance 8 29 m Alter one or more other parameters and note the values m Select RCL X the number chosen in step 6 m Check that the recalled parameter set matches the standard parameter set RCLO except for the change made to the standard set in step 4 HP IB Verification Test Test Setup System Controller Oscilloscope HP 54121T up ig 812A d o o m 20 dB attenuator Figure 8 22 HP IB Verification Test Equipment Controller HP Series 200 300 Oscilloscope HP 54121T Cable Assembly 2 x m HP IB cable Procedure Note All program statements assume that the HP 8112A is at HP IB address 12 and that BASIC 5 0 5 1 is being used 1 Connect the equipment as shown in the setup figure 2 Use the following program statements to read the HP 8112A Standard Parameter Set DIM A 161 Allocate controller memory to receive HP 8112A status string REMOTE 712 Set HP 8112A to
96. shaper IC via the pre attenuator and adds the required offset voltage as dictated by the HIL and LOL settings A simplified version of the circuit is given in Figure 10 4 3 10 4 4 Servicing the Shaper and Output Amplifier Rin Rfb SIGNRL INPUT Rc 0581 P OFFSET CURRENT FFSET VOLTAGE CONTROL CONTROL c x Rin c x Rfb OFFSET Rafts INPUT Figure 10 4 3 Simplified Output Amplifier circuit The circuit is effectively an inverting amplifier with a voltage gain given by Rin The main HF amplifier consists of the discrete transistors Q501 Q513 and their related components on Figure 10 4 5 Gain The offset current error of the amplifier is compensated for by the offset current control amplifier U501 This amplifier compares the virtual ground at the inverting input of the main amplifier with actual ground and supplies a compensating current via R in order to maintain zero difference The offset voltage control amplifier U502 detects any offset voltage at the main amplifier output via the feedback network Rin c x and compensates for it via the main amplifier s non inverting input The required output offset is created by injecting the offset input signal from the offset vernier DAC and the HILC from the timing circuit into the summing point of the offset voltage control amplifier via The main amplifier be divi
97. than 50 ns transition times tend increasingly towards the displayed value The reason for this variation is that selected values are based only upon times between 10 and 90 of total trigonometric transition Values between 0 to 10 and 90 to 100 are not taken into account by the HP 8112A instrument Transition Ranges There are seven overlapping ranges for linear and gauss transitions and it is important to note the following m Within any range the maximum ratio of the leading edge transition time to the trailing edge transition time is 1 20 and vice versa When you move the currently active slope to higher or lower range than the non active slope the latter will be automatically pulled into the same range ns 5 ins Range 48 2 Upper 99 9 999 9 99 99 9 999 9 99 95 Limit T gt Range 1 Range 2 Range 3 Range 4 Range 5 6 i Range 7 Rage 1 1 Lower 65 50 500 5 50 500 5 95 Limit ns ps ms Figure 4 8 LEE and TRE ranges Up and Down ranging There is an overlap between all ranges Using the VERNIER When the currently active slope is altered so that it falls within a keys range above or below the non active slope the value of the non non active slope automatically increases decreases in value by a factor of 10 or 100 depending on where it lay within the overlap Figure 4 9 Table 4 2 and
98. the data bus LDO to 1 07 as shown in Table 10 3 1 The address decoder also controls the output of the contents of the error latches onto the data bus Table 10 3 1 Address decoder enable outputs Circuit Action Load Range Decoder 10 Load Period Generator 11 Output Error Latches 12 Load Mode Decoder 13 Load Width Generator 14 Load Delay Generator Under the control of the Address Decoder these decoders latch data from the data bus and input it to the various switches that select control and trigger modes and the switching transistors which select the range capacitor to be used by the slope IC Refer to Figure 10 3 4 The control input signal is clamped within 5 V by the protection diodes CR130 to CR132 For Period Delay and Width control the input voltage is rectified by precision rectifier U132B and associated components The signal then passes to the control mode selector switch U130 where microprocessor control signals and ACI from the mode decoder U101 select its route to the appropriate timing IC When the High Level Control HILC is selected the control input signal is routed through the switch U131 and low pass filter U132a with associated components to the output stages See chapter 10 5 The low pass filter is needed because of the 20 settling time inherant in HILC mode operation The timing ICs used in the HP 8112A are programmable timers which can be used to produce repetition ra
99. the front page of this manual i e When you have an older instrument than those covered in this manual Introduction Note y This appendix contains backdating information to adapt this manual for instruments with a serial number lower than that shown on the title page Only the digits following the letter are important when deciding which changes apply to your instrument If your instrument has a higher serial number than that shown on the title page refer to Appendix C Updating for any possible changes instead To adapt this manual for an earlier instrument look up your serial number in Table B 1 and implement the changes from the latest back to the earliest change which applies to your instrument For example if the serial number of your instrument is 2633G04470 implement changes in order from Change 57 to 36 Change 35 and earlier would have been incorporated during manufacture Where changes to components occur modify the appropriate schematic and component layout accordingly m Some components may have been changed more than once during production of the HP 8112A Therefore Hewlett Packard suggests you make the modifications to the manual in pencil as you work through the changes for your instrument Some components may have been changed individually or as part of an associated group to improve performance etc In these cases Hewlett Packard suggests you note the difference between the build standard of your instrument
100. this mode the RMT LED is illuminated and programming messages received via the HP IB are interpreted parsed and used to control the instrument The front panel controls are disabled apart from The switch The trigger LEVEL adjust knob m The key if Local Lockout is inactive You can select remote mode by sending an HP IB Remote Enable command from the system controller use the REMOTE statement in BASIC 5 0 5 1 REMOTE 712 The output signal and all instrument settings remain unchanged following a change from local to remote mode Local Lockout The key can be disabled by sending an HP IB Local Lockout command from the system controller use the LOCAL LOCKOUT statement in BASIC 5 0 5 1 LOCAL LOCKOUT 712 This ensures that only the system controller can return the instrument to Local mode except when the instrument is switched off and on again It is recommended that all programming applications use this facility because if a programming message is interrupted by pressing the key during data transmission from the system controller the HP 8112A may be left in an unknown state Abbreviations used in this Document Terminators Note EOL End of Line Sequence used for termination Sequence Character s at the end of a line or message EOI Signal End or Identify Signal separate HP IB signal line used for terminating a message CR carriage return ASCII character with the ASCII code 13 CST current set
101. to Display Driving while A3 A9 pass through bus driver 1 21 Decoder 017 uses and A7 to produce the write select signals WS1 WS6 and the WRITE signal to the display driver refer to Display Driving Refer to Figure 10 7 6 and Figure 10 7 7 The keyboard assembly A4 is a switch panel on which all mode control parameter waveform output and trigger control pushbuttons are mounted The microprocessor scans the frontpanel key matrix using a BCD to decimal converter U20 and an 8 to 1 multiplexer U19 A3 A4 and 5 are the inputs to U20 and are continuously incremented from one to six by the microprocessor The six decimal outputs from U20 KD0 KD5 are used as the vertical signal paths to the key matrix The horizontal signal paths of the key matrix 50 57 form the inputs to the multiplexer U19 which is controlled by address lines 0 1 and A2 The output from U19 therefore represents the state of the key joining the vertical signal path addressed by 5 and the horizontal signal path addressed by A0 A2 Each time the microprocessor increments the address to U20 it cycles the address to U19 through all 8 horizontal paths Display Driver U22 The display driver operates the key mode control and unit LEDs along with the individual digital display segments using a matrix technique similar to the keyboard The outputs DIGO DIG7 form the vertical signal paths while the outputs a g and DP form the horizo
102. two units side by side 5062 3996 Support Shelf 1494 0015 Rack Slide Kit 2x 08116 68703 SpecialMounting Kit Linking with an HP 8112A s n 3127G10005 and lower a special linking kit is required 08116 68704 Special Linking Kit 10 July 1996 Page 4 of 16 MODEL 8112A ERRATA Cont page 1 4 Introduction and page 8 2 Testing Performance Test Equipment Required Add or change to read Instrument Recom Model Characteristics Alternative Use Counter HP 5335A MHz HP 5334A B P A HP 5370B to B HP 5370A P A Digitizing HP 54121T us 54503 500 MHz Bandwidth Adaptor HP 1250 1200 SMA m to BNC f P 50 TI A Feedthrough HP 10100C 50 ohms 2 W see Figure 50 ohms 10 W P Feedthrou Termination Add Figure Feedthrough Termination Feedthrough Termination This lewdthrough be used only where specified for DC voltage measurements The loligeicg gure providas schematic and pasts list escept far the case The case provide shisidieg and maintain growling integrity BNC _ BNC D 1 R1 3 tL rn Figure 4 1 0 0 0 1 10 W Terminina Ra 3 52 1 10 Wi Parc Number 0699 0148 82470010 10 0 5 W Variable trimuner HP Pact Number 2100 2250 R3 68 2 1 03 W Fart Number 0151 0416 BNC 04 MP Part Number 1250 0043 BNC F Pact 1250 0089 10 July 1996 Page 5 of 16
103. uP Board Connections Start 7 TP SA Stop TP SP Clock x TP e Verify that the reading at the Microprocessor 4 5 V is 0003 If it is not then the microprocessor is not free running f Check the signatures of U1 U15 and U16 against those given in Table 10 5 1 Servicing the Control Board 10 5 11 Table 10 5 1 A2 Address Decoder Signatures Description U12 U13 25 U13 24 U12 24 U2 11 U4 U5 U6 25 U6 24 U5 24 Low Byte Period U4 24 Sub coded address U1 U16 1 Sub coded address U1 U16 2 Sub coded address U1 U16 3 Sub coded address 01 4 5 Sub coded address U16 4 5 High Byte Slope Low Byte Slope TRE Low Byte Slope LEE Range Compensation High Byte Timing Low Byte Width Low Byte Delay Low Byte Amplitude U23 24 High Byte Amplitude U23 25 Low Byte Offset U19 11 High Byte Offset U17 11 Low Byte Burst U100 11 High Byte Burst U101 11 Load Burst Counter U10 U109 1 Offset Data Load Signal U18 U17 11 U23 22 U4 U5 U6 U12 and U13 pin 22 Ampl Data Load Signal Data Load Signal 10 5 12 Servicing the Control Board Timing Ranges Measure levels at U2 Timing Range Decoder IC against readings in Table 10 5 2 Table 10 5 2 Timing range decoder Timing Range Decoder U2 Pin 2 Pin 5 Pin 6 Pin 12 15 DRO SCPO SCP1 Period range 1 PER 20 ns 99 9 ns all other ranges PER 100 ns 950 ms Double range 1 DBL 20 ns 99 9 ns all
104. up the HP 81124 as follows Input Mode NORM Control Mode Off Transition Fixed DEL 65 ns HIL 1 00 V LOL 1 00 V Connect the HP 8112 TRIG OUTPUT via a BNC to SMA adaptor and a 20 dB attenuator to the TRIG Input of the HP 54121A Connect the HP 8112 OUTPUT via a BNC to SMA adaptor and a 20 dB attenuator to Input 4 of the oscilloscope Set up the HP 54121T Oscilloscope as follows a Press AUTOSCALE 8 Check the HP 8112 double pulse delay Select the Display menu and set the Number of Averages to 64 Select the delta V menu and turn the voltage markers On Set Preset Levels 50 5096 and press Auto Level Set Select the delta t menu and turn the time markers On Set START ON EDGE POSI and STOP ON EDGE POS2 Press the Precise Edge Find key for each new Double setting Record your results on a copy of the Test Record specified limits are given here and on the Test Record Testing Performance 8 7 Pulse Width Performance Test Specifications 8 8 Testing Performance HP 8112A Oscilloscope setting PER DBL WID Low Limit High Limit 100 20 10 ns 17 0ns 28015 8 Connect the HP 8112A to the counter as shown in Test Setup 2 9 Set the counter as follows Trigger level Preset Mode PERA Impedance 502 Gate Mode MIN Slope Positive transition A 10 Set up the HP 8112A as follows Input Mode TRIG 11 Check the HP 8112A double pulse delay
105. up the HP 8112A as follows Input Mode NORM Control Mode off Transition Fixed PER 100us DEL 65 ns HIL 1 00 V LOL 1 00 V 3 Set the counter to DTY CY A 4 Set the HP 8112A DTY to the following values and read the actual output from the counter Record your results on a copy of the Test Record specified limits are given here and on the Test Record HP 8112A setting Note Using the key adjust the duty cycle in steps until the counter displays 99 Testing Performance 8 11 Output Levels Performance Test Specifications values in parenthesis into open circuit Equipment Test Setup Procedure 8 12 Testing Performance High Level Range 7 90 V to 8 00 15 8 V to 16 0 V Low Level Range 8 00 V to 7 90 V 16 0 V to 15 8 V Level Accuracy 40 mV 19 of programmed value 3 of amplitude Repeatability Factor 4 better than accuracy m Digital Voltmeter HP 3458A Two Cable Assemblies same length m 500 feedthrough connector 40 196 50 Ohm Feedthrough connector and BNC to dual banana plug adapter HP 8112A Voltmeter 34584 loo Connected to EXT TRIGGER on rear of DVM Figure 8 8 Output Levels Performance Test 1 Connect the equipment as shown in the setup figure Use a 50 Q feedthrough termination 0 196 2 Set up the HP 81124 as follows Input Mode NORM Control Mode Off Transition Fixed PER 100 ms DEL 6 5 ms DTY 50
106. with OPT 040 TI A to B HP5345A Digital Voltmeter HP 3458A DC 0 01 V 50 V 004 acc Pulse amplitude facility HP 3478A HP 3456 Function Generator HP 8116A 20 MHz THD lt 1 HP3324A 002 Digitizing Scope HP 5412xT gt 10 GHz Bandwidth HP 54503A 30 ps Transition times Flatness 596 or HP 5450A 100 MHz 509 inputs Signature Analyzer HP 5005B Power Supply HP 6237B 0 20V HP 3324A Attenuator HP 33340C 20 dB 2W Adaptor SMA to BNC Terminators HP 11048C 10 W 50 0 40 1 96 HP 10100C 2 502 Performance Test Adjustments T Troubleshooting Test Record Equipment Test Records are provided at the end of this chapter Make a copy in order to record your test results 8 2 Testing Performance Period Performance Test Specifications Equipment Test Setup Procedure Range 20 ns to 950 ms Accuracy 5 of programmed value 2 ns Repeatability Factor 4 better than accuracy Max Jitter 0 296 of programmed value 100 5 Counter HP 5335 Cable Assembly BNC 50 0 Feedthrough Termination Required if counter input impedance 50 0 Counter HP 53354 HP 8112A oo Figure 8 1 Period Performance Test 1 Connect the equipment as shown in the setup figure Use a 50 Q feedthrough termination if you cannot select 50 Q input impedance on the counter 2 Set up the HP 81124 as follows Input
107. within the specified operating range of 0 to 55 All operating characteristics given in the following sections describe typical performance figures which are non warranted m Trigger modes Control modes m Output Modes m Inputs and Outputs Additional features General characteristics Timing Parameters Common Specifications Unless otherwise stated specifications are quoted for 5096 amplitude in normal mode fastest transitions Resolution 3 digits best case 100 ps Accuracy 596 of programmed value 2 ns Repeatability Factor 4 better than accuracy Jitter max 0 296 of programmed value 100 ps Specifications 2 1 Period PER Delay DEL after Trigger Out Double Pulse DBL interval between leading edges Pulse Width WID Duty Cycle DTY Linear Transitions between 10 nd 90 amplitude Note 2 2 Specifications Range 20 0 ns to 950 ms Range 75 0 ns to 950 ms max PER 55 ns Accuracy 5 of programmed value 5 ns Range 20 0 ns to 950 ms max PER WID DEL and DBL are mutually exclusive Range 10 0 ns to 950 ms max 10 ns Range 196 to 9996 subject to Width specification Resolution 1 Accuracy 10 of programmed number WID and DTY are mutually exclusive Range 6 5 ns to 95 ms leading edge LEE and trailing edge TRE independantly programmable within 1 20 ratio Delay Width and Transitions are under pr
108. 010 SR205C4733MAAH 0160 0575 4 1 0 047uF 50 02010 SR205C473MAAH 0160 4521 8 12 200 06352 FD12C0G2D120J 0160 5746 1 1 O 1uF 50V 06121 37987 5104 11 0160 5746 1 1 O 1uF 50 06121 37987 5104 11 0160 0575 4 1 0 047uF 50 02010 SR205C473MAAH 0160 0575 4 1 0 047uF 50 02010 5 205 473 0160 4385 2 15 200 09939 RPE121 105C0G150J200V 0160 5746 1 1 0 luF 50V 106121 B37987 T5104 M11 0160 5746 1 1 0 luF 50V 06121 37987 5104 11 0160 0575 4 1 0 047uF 50 02010 SR205C473MAAH 0160 5746 1 1 O 1uF 50V 06121 37987 5104 11 0160 3879 7 1 0 0luF 100 02010 SR201C103MAAH 0160 6596 1 1 0 47uF 50 V 02010 SA305E474MAAH 0160 5746 1 1 O luF 50 06121 37987 5104 11 0160 3878 6 1 1000 100 02010 SR201C102MAAH 0160 3879 7 1 0 01luF 100 V 02010 SR201C103MAAH 0160 3879 7 1 CAP 0 0luF 100 V 02010 SR201C103MAAH Replaceable Parts 9 Table A 3 Main Board Parts List continued 1 303 0160 4493 3 1 CAP 27pF 200 06352 FD12C0G2D270J A1 C304 0121 0046 CAP 35pF 9pF 200 09538 538 016 D 9 35 1 C305 0160 3766 1 1000pF 100 02367 15 102 03 1 C306 0160 3548 7 0 0 100 V 02367 CD19 5FA103F03 1 307 0160 4622 CAP
109. 03273 CORE SHLD BEAD 04822 CORE SHLD BEAD 04822 1 L200 9170 0029 1 L220 9170 0029 1 L280 9100 2255 1 501 9170 0029 1 L502 9170 0029 wow gt 1 1503 9170 0029 CORE SHLD BEAD 04822 1 1504 9170 0029 CORE SHLD BEAD 04822 3 1 91 3452 8 1 Al 1507 9170 0029 3 1 CORE SHLD BEAD 04822 811 311 57 3452 57 3452 91 3452 57 3452 1 L508 9170 0029 CORE SHLD BEAD 04822 1 509 9170 0029 CORE SHLD BEAD 04822 Replaceable Parts 13 Table A 3 Main Board Parts List continued Reference HP Part Qty Description Manuf r 1 L510 9170 0029 1 CORE SHLD BEAD 04822 57 3452 1 L511 9170 0029 CORE SHLD BEAD 04822 57 3452 1 L512 9170 0029 CORE SHLD BEAD 04822 57 3452 1 L514 9170 0029 CORE SHLD BEAD 04822 57 3452 1 1515 9170 0029 CORE SHLD BEAD 04822 57 3452 www iw wo 1 1 1 1 28480 08116 21106 28480 08112 45401 28480 08112 45401 28480 08112 04155 1 1 08116 21106 1 2 08112 45401 1 08112 45401 Al MP100 08112 04155 A1 MP200 1205 0235 HEAT SINK 02608 2224 Al 201 1205 0235 0 1 HEAT SINK 02608 2224 1 500 08116 04152 2 1 28480 08116 04152 1 505 1205 0662 7 1 HEAT SINK 02123 260 4TH5B SPECIAL THREAD A1 MP506 1205 0662 7 1 HEAT SINK 02123 260 4TH5B SPECIAL THREAD A1 MP508 1205 0662 7 1 HEAT SINK
110. 05524 05524 05524 05524 05524 05524 05524 05524 05912 10358 10358 10358 10358 CMF 50 2 CMF 55 1 CMF 55 1 CMF 55 1 CMF 55 1 CMF 55 1 CMF 55 1 CMF 55 1 CMF 55 1 CMF 55 1 CMF 55 1 FP 3 FP 3 CMF 65 2 CMF 55 1 CMF 55 1 CMF 55 1 CMF 55 1 CMF 55 1 CMF 55 1 CMF 55 1 MSP10A01 CMF 55 1 CMF 55 1 CMF 55 1 104 02 01003 1095 1095 1095 1095 Replaceable Parts 23 A 24 Replaceable Parts Reference HP Part CD Qty 1 TERMINAL TEST PO Al TP5 A1 TP6 A1 9 1 10 Al 11 1 TP12 1 UI Al 02 A1 U3 Al U4 1 05 Al U6 A1 U100 A1 U101 A1 U102 1 U110 1 U130 A1 U131 1 0132 A1 U140 1 0141 1 0142 1 0200 1 0201 1 0220 1 0240 1 0300 1 0301 1 0302 1 0320 Table 3 Main Board Parts List continued Part 0360 2264 0360 2264 0360 2264 0360 2264 0360 2264 0360 2264 1826 0315 1826 0315 1826 0393 1826 0527 1826 0393 1826 0527 1820 1216 1820 1997 1826 0501 1826 0111 1820 1546 1826 0476 1826 0111 1820 1112 1820 1112 1820 1491 1DD6 0002 1820 2849 1DD6 0002 1DD6 0002 1820 1997 1826 0955 1826 0600 1826 0111 Description TERMINAL TEST PO TERMINAL TEST PO TERMINAL TEST PO TERMINAL TEST PO 0 TERMINAL TEST PO IC 348 IC 348 IC LM317T IC LM337T oN IC LM317T IC LM337T IC SN74LS138N IC SN74L
111. 1 1 2 0180 3158 7 1 6800uF 16 V 00493 16 682022 41 A1 C3 0180 3160 1 1 2200uF 50 V 00493 NM50VN222Q22X41 Al C4 0180 3160 1 1 2200uF 50 V 00493 NM50VN222Q22X41 Al C5 0180 4313 8 1 2200uF 50 00493 KME50VB222M18X35LL Al C6 0180 3008 6 1 470uF 35 04200 502D477F035EG1D A1 C7 0180 2984 5 1 47uF 50 00493 SM50VB47R M 8X11 Al C8 0180 2984 5 1 47uF 50 00493 SM50VB47R M 8X11 A1 C9 0180 2984 5 1 47uF 50 V 00493 SM50VB47R M 8X11 1 10 0180 2984 1 11 0180 2962 1 12 0180 2962 1 C13 0180 2962 1 C14 0160 2055 47uF 50 V 00493 SM50VB47R M 8X11 220uF 10 00493 SL10VB221T10X16 220uF 10 00493 SL10VB221T10X16 CAP 220uF 10 00493 SL10VB221T10X16 CAP 0 01uF 100 09538 805 504 Y5V 1032 oo dO O 1 15 0160 2055 1 16 0160 2055 1 17 0160 2055 1 18 0160 6596 1 19 0160 6596 0 01uF 100 09538 805 504 Y5V 1032 0 01uF 100 09538 805 504 5 1032 0 01uF 100 09538 805 504 5 1032 0 47uF 50 02010 SA305E474MAAH 0 47uF 50 02010 SA305E474MAAH mnm n 1 C100 0180 0116 1 101 0180 0116 1 102 0180 0374 Al C103 0180 0374 1 C104 0180 0116 6 8uF 35 04200 150D685X9035B2 DYS 6 8uF 35 04200 150D685X9035
112. 10 10 11000 1ms 1000ms 100 ms 1 0s Width Control Verification Test Characteristics Pulse Width 1 10 ratio Control Voltage 1 0 V to 10 V Delay Ranges 10 ns to 1 0 s in eight non overlapping decade ranges Bandwidth 1 kHz Equipment Counter HP 5335A Variable DC Source HP 6237B or HP 3324 Cable Assembly 2 off m Attenuator 20 dB 2 W 2 x m BNC to Banana plug adaptor Test Setup HP 62378 or Counter HP 53354 HP 3324A HP 8112A a Figure 8 18 Width Control Verification Test 8 26 Testing Performance Procedure 1 Connect the equipment as shown in the setup figure 2 Set up the HP 81124 as follows Trigger Mode NORM Control Mode WIDC Transition Fixed PER 999 ms DEL 65 ns HIL 2 00 V LOL 0 00 V 3 Set the counter to PULSE A 4 the power supply or HP 3324 between approx 1 volt and 10 volts and verify that for the following HP 81124 settings the pulse width range agrees with those specified HP 8112A setting Counter reading High High Level Control Verification Test Characteristics Equipment Control Voltage 8 0 V to 8 0 V High Level 8 0 V to 8 0 V into 500 independent of actual Output Window low level which is programmable between 8 0 V and 47 95 V in 50 mV steps Settling Time 200 to settle within 5 of final level Oscilloscope HP
113. 11 HP 8112A 9 410203 4 TRG f 9 Attenuators 40dB 2x20 2048 Figure 9 2 Pre adjustments setup Procedure Minimum Pulse Droop 1 Set up the HP 81124 as follows Trigger Mode NORM Control Mode Off PER 1 ms DEL 65 ns DTY 50 Transition Linear Fixed Gaussian as reqd LEE 10 ns TRE 10 ns HIL 4 99 V LOL 4 99 V COMPL Off DISABLE Off Enable LIMIT Off 2 Connect the HP 8112A main output to the oscilloscope input 4 via 40 dB 2 x 20 dB attenuation 3 Connect TRIGGER OUT of the HP 8112 to the TRIG IN of the oscilloscope via a 20 dB Attenuator 4 On the oscilloscope a Press and set for 2 V division b Set the attenuation factor to 100 and its offset to 0 V 5 Adjust A1R515 for best pulse droop in all three transition modes Adjustment Procedures 9 5 9 6 Adjustment Procedures Normal Complement 6 Set the HP 8112A Transition to FIXED 7 Switch the HP 8112A COMPL on and off 8 Adjust A1R403 for same and LOL on the screen in both modes Amplitude Offset 9 Set the HP 8112 Transition to FIXED 10 Set the HP 8112A output to COMPL off 11 Connect the HP 8112A trigger output to the oscilloscope trigger input via 20 dB attenuation 12 On the oscilloscope press and set for 2 div vertically and 200 ps div 13 Adjust A1R410 amplitude R425 bal to achieve an output amplitude of 10 V symmetrica
114. 2 CMF 55 1 CMF 55 1 T 9 CMF 55 1 T 9 Table A 3 Main Board Parts List continued Reference HP Part CD Qty Description Manufr Part 1 16 0698 3442 1 RES 237 196 125W 05524 55 1 A1 R17 0757 0434 1 RES 3 65K 1 05524 55 1 1 R18 2100 3211 1 RES TRMR 10 03744 3386P Y46 102 Al R19 2100 3211 1 RES TRMR 10 03744 3386 46 102 A1 R20 0757 0434 1 RES 3 65K 1 05524 55 1 NN RES 237 1 125W 05524 55 1 RES 249 196 125W 05524 55 1 RES 2 49 1 05524 55 1 RES TRMR 500 10 03744 3386P Y46 501 RES TRMR 500 10 03744 3386 46 501 AlR21 0698 3442 1 R22 0698 4421 AlR23 0698 4435 AlR24 2100 0554 1 R25 2100 0554 dc RES 2 49K 196 05524 55 1 RES 249 196 125W 05524 55 1 NETWORK RES 02483 761 3 RES 348 1 125W 05524 55 1 NETWORK RES SIP 02483 750 81 1 R26 0698 4435 A1 R27 0698 4421 1 R28 1810 0037 1 R30 0698 3445 1 R100 1810 0205 lt gt WD ee Al R101 1810 0206 NETWORK RES 02483 750 81 Al R102 0757 0430 RES 2 21K 196 05524 55 1 1 R103 0757 0430 RES 2 21K 1 05524 55 1 1 R110 0698 4485 RES 23 2K 1 05524 55 1 69 Al R111 0757 0446 RES 15K 1 125W 05524 55 1 1 R112 0698 3151
115. 2 PER 10 MS DTY 30 Set period to 10 ms set duty cycle to 30 Programming 6 7 Level parameters Example Burst Parameter Action Mnemonic Value Delimiter V volts V volts Set high level Set low level OUTPUT 712 HIL 2 V LOL 1 25 V Set high level to plus 2 V low level to minus 1 25 V Action Mnemonic Value Delimiter Set burst number BUR Example OUTPUT 712 BUR 375 Provides a burst of 375 output pulses Vernier Action Mnemonic Most signicant digit up MU Second significant digit up SU Least significant digit up LU Most signicant digit down MD Second significant digit down SD Least significant digit down LD Example OUTPUT 712 HIL 5 V SD SD SD Set high level to 5 V and 6 8 Programming decrement in three steps of 100 mV Range Change Action Next higher range Next lower range Example OUTPUT 712 RU Change vernier range upwards Stored Parameters Action Mnemonic Value Delimiter Store parameter set 1 9 Set ident Recall parameter set 0 Standard 1 9 Stored set Example OUTPUT 712 510 5 Store current parameters set on instrument as setting number 5 OUTPUT 712 RCL O Revert instrument to standard parameter settings Excessive Slope Calculation Action Mnemonic Excessive slope calculation off SRO Excessive slope calculation on SR1 Example OUTPUT 712 SRO Switches off calculation of ezcessive slope spee
116. 227 8 COVER TOP 08112 04160 MP20 TRIM STRIP 5001 0438 21 TRIM STRIP 5040 7203 MP22 FOOT 5040 7201 MP23 PNL REAR STD 5040 7221 MP24 FOOT REAR N SKI 15040 7222 Bl FAN TBAX 3160 0266 In Appendix A Table A 2 add Reference Description HP Part 0 08112 B2 MOD MOTOR CON 3160 0310 Microprocessor Board Appendix A Table 5 modify Reference Description HP Part A3 08112 66534 U40 ROM 6 08112 13726 B 32 Backdating EEE Change 49 Main Board Instrument 11000 Change 50 Main Board Microprocessor Board Changed component value to improve overshoot adjustment and introduction of fast fuse For instruments with serial number 2851G07680 and lower make the following changes to the appropriate parts list In Appendix A Table A 3 modify Reference Description HP Part Al 08112 66511 529 Capacitor 1 0 pF 0160 4380 In Appendix A Table A 2 modify Reference Description Part 0 08112 F1 Fuse 750 mA 2110 360 IC changed to 1 5 type For instruments with serial number 2851G07780 and lower make the following changes to the appropriate parts lists In Appendix A Table A 3 modify Reference Description HP Part 1 08112 66511 422 Resistor 4 64 k 0698 3155 In Appendix A Table A 5 modify Reference Description Part A3 08112 66534 U17 SN741138 1820 2861 Backdating 33
117. 248 Influences minimum width Shaper and Offset A1R317 A1R422 A1R423 A1R427 A1R437 Amplitude in linear mode 5 11 kQ 1 1 kQ 1 1 kQ 9 53 16 2 Amplitude vernier 1 V in fixed mode 1 TP 10 2 1 V to 2 6 V 1 TP 11 2 1 V to 26 V Increasing the value of R437 Normal Complement differential offset Adjustment Procedures 9 3 Test Equipment to Chapter 1 Introduction for the recommended test equipment and accessories Test Preparation Refer to Chapter 10 1 Troubleshooting for instructions on how to open up the HP 8112A instrument and prepare for servicing Control Board Microprocessor Board Figure 9 1 Access to the HP 8112A for Adjustments Power Supplies Equipment Digital Voltmeter HP 3456 Procedure 1 Connect the DVM low terminal to the ground testpoint on board A1 2 Test the supply voltages and if necessary make adjustments to achieve the levels given here Testpoint Adjust Result 1415 V 1824 15 000 V 15 mV 1 5 4 AIRI2 5 40 10 mV 1 5 0 5 050 V 50 mV A3 5 0 V 5 150 V 50 mV 1 23 AIR18 23 000 50 mV 1 23 1 19 23 000 50 mV 1 15 A1R25 15 000 V 15 mV 3 Disconnect the DVM 9 4 Adjustment Procedures Pre Adjustments Equipment Oscilloscope 54121 m Attenuator 20 dB 3 x Oscilloscope HP 5412
118. 273N SN74LS273N SN74LS273N AD7541JN OP 07CP OP 07CP AD7522LN TLO72ACP MC14052BCL NE555N SN74LS273N AD7512DIJN SN74LS273N SN74LS273N MC10101P MC10104P MC10104P MC10135L MC10135L MC10103P MC10125L SN74LS109AN SN74LSO0N SN74LS191N Replaceable Parts 31 Table A 4 Control Board Parts List continued A 32 Replaceable Parts Microprocessor Board Table A 5 Microprocessor Board Parts List A3 08116 66535 0 1 BD AY MICROPRCR 28480 08116 66535 1420 0273 211 BAT 3V 08709 BR 2 3AT2P A3 C1 0160 4493 3 1 27pF 200 V 06352 FD12C0G2D270J 2 0160 4493 3 1 27 200 V 06352 FD12C0G2D270J 0160 6623 5 1 O 1uF 50 02010 5 115 104 A3 C4 0160 6623 5 1 O 1uF 50V 02010 5 115 104 06121 A3 C5 0160 6623 5 1 0 1uF 50 02010 5 115 104 06121 A3 C6 0180 0229 7 1 33uF 04200 510D336X9010R2 DYS A3 CT 0180 2207 5 1 100uF 10 V 04200 150D107X9010R2 DYS A3 C8 0180 0229 7 1 33uF 10 V 04200 510D336X9010R2 DYS A3 C9 0160 6623 5 1 0 luF 50 V 02010 5 115 104 06121 C10 0160 6623 5 1 O1uF 50 V 02010 5 115 104 06121 11 0160 6623 5 1 O 1uF 50 V 02010 5 115 104 06121 C12 0160 6623 5 1 0 luF 50 V 02010 5 115 104 06121 0160 6623 5 1 0 luF 50 V 02010
119. 3 0698 3452 0699 0644 0698 4421 0698 4488 0698 3359 0698 3359 0698 3498 0698 4460 2100 0568 0757 0443 0757 0443 0698 4386 0698 4386 0757 0280 0757 0280 0757 0280 0757 0280 0757 0401 0757 0283 0757 0283 0757 0401 0698 3495 0698 3495 0757 1022 0757 1022 0757 0751 0698 3429 0698 4358 2100 3211 7 69 t2 0 O wo 1 1 1 1 1 Hn Description Part HP Part CD Qty RES TRMR 50K 10 3386P Y46 503 RES 147K 1 CMF 55 1 RES 7 87 1 H8 RES 249 196 125W CMF 55 1 RES 26 7K 196 CMF 55 1 RES 12 7K 1 CMF 55 1 RES 12 7K 1 CMF 55 1 RES 8 66K 196 CMF 55 1 RES 649 196 125W CMF 55 1 RES TRMR 100 1096 3386P Y46 101 RES 11K 196 125W CMF 55 1 RES 11K 196 125W CMF 55 1 RES 59 196 125W CMF 55 1 RES 59 1 125W CMF 55 1 RES 196 125W CMF 55 1 RES 1 125W CMF 55 1 RES 1K 196 125W CMF 55 1 RES 196 125W CMF 55 1 RES 100 196 125W CMF 55 1 RES 2K 196 125W CMF 55 1 RES 2K 196 125W CMF 55 1 RES 100 196 125W CMF 55 1 RES 866 196 125W CMF 55 1 RES 866 1 125W CMF 55 1 RES 1 78K 196 CMF 60 1 T 1 RES 1 78K 196 RES 7 5K 196 25W RES 19 6 196 RES 14 196 125W RES TRMR 10 CMF 60 1 T 1 CMF 60 1 T 1 CMF 55 1 CMF 55 1 3386P Y46 102 Reference A1 R536 Al R537 Al R538 Al R539 Al R540
120. 3 0357 0 1 XSTR PNP SI 1 0300 1853 0563 0 1 XSTR PNP SI 2N3906 SEL 1 0301 1853 0563 0 1 XSTR PNP SI 2N3906 SEL Al 0302 1853 0563 0 1 XSTR PNP SI 2N3906 SEL 1 0303 1853 0354 7 1 XSTR PNP SI 1 0304 1853 0354 7 1 XSTR PNP SI 1 0305 1854 1028 6 1 XSTR NPN SI 2N3904 1 0306 1854 1028 6 1 XSTR NPN SI 2N3904 1 0307 1854 1028 6 1 XSTR NPN SI 2N3904 1 0308 1854 1028 6 1 XSTR NPN SI 2N3904 1 0309 1854 1028 6 1 XSTR NPN SI 2N3904 1 0310 1853 0563 0 1 XSTR PNP SI 2N3906 SEL 1 0311 1853 0569 6 1 XSTR PNP SI 1 0312 1853 0569 6 1 XSTR PNP SI 1 0313 1853 0569 6 1 XSTR PNP SI 1 9314 1853 0569 6 1 5 PNP SI 1 0315 1853 0569 6 1 XSTR PNP SI 1 0400 1853 0589 0 1 XSTR DUAL PNP MD4260 1 0402 1853 0218 2 1 XSTR PNP SI NS65098 1 0403 1855 0386 9 1 J FET 2N4392 2N4392 1 9404 1853 0569 6 1 XSTR PNP SI 1 0501 1854 0809 9 1 XSTR NPN 2N2369A 1 9502 1853 0405 9 1 XSTR PNP SI 1 0503 1854 0354 9 1 XSTR NPN SI Al 0504 1853 0357 0 1 XSTR PNP SI Replaceable Parts 15 A 16 Replaceable Parts A1 Q505 A1 Q506 A1 Q507 A1 Q508 A1 Q509 Al 0510 A1 0511 A1 Q512 A1 Q513 Al 0514 A1 Q515 A1 Q516 1 0517 Al 0518 1 0519 Al R1 Al R2 Al R3 Al R4 Al R5 Al R6 1 1 R8 Al R9 Al R10 Al 11 1 R12 Al R13 Al R14 Al R15
121. 302 R308 Resistor Network 680 1810 0332 For instruments with serial number 2633G04530 and lower make the following changes to the appropriate parts list In Appendix A Table A 3 modify Reference Description HP Part Al 08112 66511 2317 Resistor 1 87 k 0698 4429 37 Instrument Note For instruments with serial number 2633G04605 and lower make the following changes to the appropriate parts lists This change reverses change 34 Do not reverse implement this change Ignore it Information here is for the sake of completeness only Reversion to previous frame assembly In Appendix A Table A 2 modify Reference Description HP Part AO 08112 MP8 FRAME REAR 5021 0512 38 This change applied only to a special version of the HP 8112A and therefore is not detailed here Change 39 Main Board Control Board Changes to part numbers on introduction of improved D A converter chips For instruments with serial number 2633G04830 and lower make the following changes to the appropriate parts lists In Appendix A Table A 3 modify Reference Description Al 08112 66511 R411 2 37 0698 7245 In Appendix A Table A 4 modify Reference Description HP Part A2 08112 66502 U4 5 6 and U12 13 23 D A Converter 10 bit 1826 0729 Backdating B 21 Change 40 This change introduced t
122. 310 312 C314 405 C507 508 519 520 521 522 U301 401 U301 U401 2 of 16 MODEL 8112A ERRATA On Page A 7 change the Table of Repl Parts to read MPS8 5180 2471 CABLE HP IB MP60 0380 0643 SCREW HP IB On Page A 36 change the Table of Repl Parts to read A3 U40 08112 13729 On Page 9 2 Adjustment Procedure change to read 1 541 0 01uF was pF On Page 9 3 Adjustment Procedure change to read Al was A2 R243 46 4k endash 51 1K_ Al was A2 R248 1 96k On Page 9 3 Adjustment Procedure add Al C245 47 On Page a 36 change the Table of Repl Parts List add A3 W2 8159 0005 RES O CWM 10 July 1996 Page 3 of 16 MODEL 8112A ERRATA Cont page 1 3 Introduction Accessories Change to read Item HP Part Number Description Carrying handle 5062 4001 Bail Handle Kit Rack mounting a single unit 5062 3972 Rack Mounting Flange and Filler Panel Kit Rack mounting a single unit on a shelf 5062 3996 Support Shelf 5062 4022 Filler Panel 08116 68703 Special Mounting Kit Rack slide mounting of a single unit 5062 3996 Support Shelf 5062 4022 Filler Panel 1494 0015 Rack Slide Kit 08116 68703 Special Mounting Kit Rack mounting of two units side by side 5062 3974 Rack Flange Kit 5061 9694 Lock Link Kit Rack mounting of two units side by side on a shelf 5062 3996 Support Shelf 2x 08116 68703 Special Mounting Kit Rack slide mounting of
123. 39 L 2007 1 1 W5 8159 0005 0 1 5 0 CWM 01339 L 2007 1 Al W8 08116 61605 0 1 28480 08116 61605 Al W9 08116 61607 2 1 28480 08116 61607 1 W10 08112 61608 9 1 28480 08112 61608 1 W11 08112 61609 0 1 28480 08112 61609 Al W12 8159 0005 0 1 RESOCWM 01339 L 2007 1 Al W13 8159 0005 0 1 5 0 01339 1 2007 1 4255 __ ed Replaceable Parts 25 Control Board Table A 4 Control Board Parts List Reference HP Part Qty Description Manufr A2 08112 66502 2 1 BD AY CONTROL 28480 08112 66502 A2 Cl 0160 6596 1 1 0 47uF 50 02010 SA305E474MAAH A2 C2 0180 0116 1 1 6 8uF 35 V 04200 150D685X9035B2 DYS A2 C3 0180 0116 1 1 6 8uF 35 V 04200 150D685X9035B2 DYS A2 C4 0180 0374 3 1 10uF 20 V 04200 150D106X9020B2 DYS A2 C5 0180 0374 3 1 10uF 20 V 04200 150D106X9020B2 DYS A2 C6 0180 4129 4 1 luF 35 V 04200 173D105X9035V A2 CT 0160 3879 7 1 0 011 100 02010 5 201 103 2010 0160 3879 7 1 O 01uF 100 V 02010 SR201C103MAAH 2 11 0160 3879 7 1 0 014 100 02010 SR201C105MAAH 2 14 0160 5746 1 1 0 1uF 50 V 06121 B37987 T5104 M11 2 15 0160 3879 7 1 0 01uF 100 V 02010 SR201C1035MAAH 2 16 0160 3879 7 1 O 01uF 100 V 02010 5 201 103 A2
124. 4 A4 051 A4 DS2 A4 DS3 A4 DS4 A4 DS5 A4 DS6 A4 057 A4 DS8 A4 DS9 A4 0510 A4 0511 A4 DS12 A4 DS13 A4 0514 4 0515 A4 DS16 A4 Jl A4 J2 A4 1 A4 MP2 A4 MP3 A4 MP4 A4 MP5 A4 MP6 A4 A4 MP8 A4 MP9 A4 10 4 11 5041 0276 Table 6 Keyboard Parts List 08112 66504 4 1990 0665 3 1990 0665 1990 0665 1990 0665 w lt co 1990 0665 1990 0665 1990 0665 1990 0665 1990 0665 69 0 Co 1990 0665 1990 0665 1990 0665 1990 0665 1990 0665 w lt 9 1990 0665 1990 0665 1251 7409 1251 6255 9041 0309 ow 5041 0309 5041 0309 5041 0351 9041 0351 9041 0351 5041 0726 0 5041 0285 6 5041 0285 6 5041 0276 5 5 1 Description BD AY KEY LED LMP LED LMP LED LMP LED LMP LED LMP LED LMP LED LMP LED LMP LED LMP LED LMP LED LMP LED LMP LED LMP LED LMP LED LMP LED LMP Manuf r 28480 01542 01542 01542 01542 01542 01542 01542 01542 01542 01542 01542 01542 01542 01542 01542 01542 CONN POST TP SKT 03418 CONN POST TP SKT 03418 28480 28480 28480 28480 28480 28480 28480 28480 28480 28480 Part 08112 66504 22 14 2124 22 14 2204 9041 0309 9041 0309 9041 0309 5041 0351 5041 0351 5041 0351 5041 0726 5041 0285 5041 0285 5041 0276 5041 0276 Replaceable Parts 37 Table A 6 Keyboard Parts List contin
125. 425 0757 0276 0698 7195 0698 3243 0757 0385 0698 4392 0757 0294 fk Pe Description RES 6 49K 196 RES 31 6 196 05W RES TRMR 20K 1096 RES TRMR 20K 10 RES 14 7 196 RES 14 7 1 RES 237 196 05W RES 5 11K 1 RES 1 05K 196 RES 1 05K 196 RES 38 3 196 05W RES 383 196 05W RES 90 9K 196 RES 6 19K 196 RES 301K 196 RES 4 64K 196 RES 9 53K 1 RES 1 54K 196 RES 61 9 196 RES 178K 196 RES 22 1 196 RES 71 5 1 RES 17 8 196 RES 10 196 125W RES 1 125W RES TRMR 2K 10 RES 196 125W RES 1 125W RES 147K 196 05W RES 19 6 196 05W CMF 55 1 CMF 50 2 67WR 3386 46 203 CMF 55 1 CMF 55 1 CMF 50 2 CMF 55 1 CMF 55 1 CMF 55 1 67WR CMF 55 1 CMF 55 1 CMF 50 2 CMF 50 2 CMF 55 1 CMF 50 2 CMF 50 2 CMF 55 1 CMF 55 1 CMF 50 2 CMF 55 1 CMF 55 1 CMF 55 1 CMF 50 2 CMF 55 1 CMF 55 1 CMF 55 1 CMF 55 1 CMF 55 1 Replaceable Parts 21 A 22 Replaceable Parts Reference A1 506 Al R507 A1 R508 A1 R509 Al R510 1 R511 Al R512 Al R513 Al R514 Al R515 Al R516 Al R517 Al R518 Al R519 Al R520 Al R521 Al R522 Al R523 Al R524 Al R525 Al R526 Al R527 Al R528 Al R529 Al R530 Al R531 Al R532 Al R533 Al R534 Al R535 Table A 3 Main Board Parts List continued 2100 325
126. 5 Component layouts and locators 10 7 21 Keyboard A4 and Display Board A5 Component layouts and locators Option 001 10 7 23 Mechanical 1 A 2 Mechanical 2 A 3 Example output B 11 08116 66523 U10 U11 layout B 14 08116 66523 010 U11 schematic B 14 08116 66533 ROM layout 23 08116 66533 schematic 24 08116 66533 U28 layout 25 08116 66533 028 schematic 25 08116 66533 Deletion of W3 B 26 08116 66533 Reset circuit B 26 Rear Panel B 39 HP IB Address Switch Factory setting B 40 Exploded view of HP 8112A rear frame B 42 Microprocessor Board A3 Component Layout and ED 43 Mechanical Parts 1 B 44 MechanialParts 2 45 Contents 15 Tables Contents 16 Recommended Test Equipment Line Voltage and Fuse Selection Operating Control Mode Combinations Active slope moves from Range 3 to Range 2 Y1 3 Active slope moves from Range 3 to Range 4 Y2 Test Equipment Adjustment Procedures Changeable Components HP 8112A Board Assemblies amp Servicing Chapters Power supply rectifiers Regulated voltage suppli
127. 50 Ohm feedthrough Note 9 16 Adjustment Procedures 14 15 EL M Figure 9 6 Low Pass Filter Switch COMPL on and off and adjust A1R403 to obtain the minimum amplitude difference between the two modes Same DVM reading as step 11 Adjust 1 425 for 0 V 10 mV If the adjustments are not possible change value of A1R437 see table 9 1 and repeat steps 1 to 15 16 17 18 19 20 Set the HP 81124 as follows HIL 0 5 V LOL 0 5 V Set up the DVM to read AC voltages up to 10 V Switch filter OFF or remove external filter Adjust A2R46 for 0 506 V 5 mV RMS Use the DVM built in filter and set the DVM to read DC voltages If the DVM does not have a built in filter use an external low pass filter as shown in Figure 9 6 Adjust A1R416 for 0 V 5 mV Linear Amplitude 21 22 23 Set up the HP 81124 as follows Transition Linear HIL 44 99 V LOL 4 99 V Switch COMPL and off and adjust 1 407 to obtain the minimum amplitude difference between the two modes 0 V 10 mV Same DVM reading Set up the DVM to read AC voltages up to 10 V Switch filter OFF or remove external filter 24 Adjust A1R318 for 5 045 V 0 20 mV RMS Same DVM reading as in FIXED transition mode Gauss Amplitude 25 Set the HP 8112 transition to GAUSS 26 Adjust A1R418 for 5 045 V 0 20 mV RMS Same DVM reading as in FIXED and LINEAR transition modes 2
128. 550 560 570 CLEAR SCREEN CLEAR 712 initialize interface and HP8112A A SPOLL 712 clear status byte 1 Learn String interrogate function CST Current Setting DIM Setting 153 OUTPUT 712 CST ENTER 712 Setting PRINT The current setting of the HP8112A is PRINT Setting PRINT PRINT Interrogate Parameter Set IRCLO 9 OUTPUT 712 IRCL 5 read setting from location 5 ENTER 712 Setting PRINT The current setting of location 5 is PRINT Setting PRINT PRINT Interrogate Error IERR DIM A 100 OUTPUT 712 WID1MS cause width and slope error PRINT Width and slope error caused I OUTPUT 712 IERR read error s ENTER 712 A PRINT Errors read with IERR A PRINT 1 OUTPUT 712 WID1US correct error Interrogate Error commands here shown IHIL and OUTPUT 712 IPER ENTER 712 Period PRINT Response after IPER command Period OUTPUT 712 ENTER 712 High_level PRINT Response after command High_level Programming Examples 7 19 580 590 OUTPUT 712 IBUR 600 ENTER 712 Burst 610 620 PRINT Response after IBUR command Burst 630 640 PRINT 650 PRINT End of the program INTERROG 660 670 LOCAL 712 680 END 7 20 Programming Examples 8 Testing Performance Introduction Performance Tests Verification Tests This chapter lists a number of
129. 7 Use the DVM built in filter and set the DVM to read DC voltages If the DVM does not have a built in filter use an external low pass filter as shown in Figure 9 6 28 Switch COMPL on and off and adjust A1R402 to obtain the minimum amplitude difference between the two modes 0 V t 10 mV Same DVM reading 29 Set up the HP 81124 as follows Transition Fixed HIL 48 0 V LOL 8 0 LIMIT Off 30 Set up the DVM to read AC voltages up to 20 V Switch filter OFF or remove external filter 31 Check that the amplitude for FIXED LINEAR and GAUSS transition mode is 8 080 V 0 40 mV RMS 32 If re adjustment is necessary repeat Fixed Linear and Gauss adjustments as required Offset 33 Set up the HP 81124 as follows HIL 8 00 V LOL 7 90 V 34 Set up the DVM to read DC voltages up to 10 V 35 Connect the HP 8112A main output via an exact 50 0 0 196 feedthrough terminator to the DVM and enable the DVM built in filter If the DVM does not have a built in filter use low pass filter as shown in Figure 9 6 36 Adjust A2R42 for 7 95 V 10 mV 37 Set up the HP 81124 as follows HIL 7 90 V LOL 8 00 V 38 Check accuracy of negative offset DVM reading 1 95 V 30 mV 39 Re adjust A2R42 if necessary Adjustment Procedures 9 17 9 18 Adjustment Procedures HIL C 40 Set up the HP 81124 as follows 41 42 43 44 45 Trigger Mode Control Mode PER DEL WID Transition HIL LOL
130. 8 24 8 24 8 24 8 24 8 25 8 25 8 26 8 26 8 26 8 26 8 27 8 27 8 27 8 27 8 28 8 28 8 29 8 29 8 29 8 30 8 30 8 30 8 30 8 33 Contents 7 Contents 8 9 10 10 1 Adjustment Procedures Safety Considerations tart ds Introduction 4o ee em ag Test Equipment Test Preparation PowerSupples Equipment Procedure Pre Adjustments 0 Equipment Procedure 0n Reo Minimum Pulse Droop Normal Complement Amplitude Offset Overshoot amp Transition Time Adjustment Equipment 225525255242 Proced re 2 2 voe oS o doo Roo Timing ee so ee eee a Equipment Procedure 48722 woe on oh Period Rep NERIS AES Delay Double Puls Width Adjustment Equipment Procedure 244 Pdl je Shaper and Offset Adjustments Equipment Proedure Fixed amplitude Linear Amplitude Gauss Amplitude Offset v uu dud ee a eoe Re Re ees Slope
131. 8112 00601 28480 08116 21102 28480 5001 0538 3 A0 MP21 5041 8803 0 1 28480 5041 8803 0 22 5041 8801 811 28480 5041 8801 A0 MP24 5041 8822 811 28480 5041 8822 A0 25 2110 0566 8 1 FUSEHOLDER BODY 06328 031 1657 A0 MP26 9 1 FUSEHOLDER CAP 06328 031 1666 2110 0565 A 6 Replaceable Parts Table A 2 Standard HP 8112A Master Parts List continued Reference HP Part CD Qty Description A0 MP27 2110 0569 3 1 FUHLR CMPNT 098 0043 0 28 1460 1345 5 TILT STAND 1 2 BRACKET RTANG 129530 08116 40601 A0 MP30 1400 0290 A0 MP33 08116 40601 n A0 MP40 0360 1190 5 1 TERM SOLDER LUG 720 380H A0 MP42 2950 0043 8 1 NUT HEX DBL CHAM 28200 10 101 0 MP50 08116 60101 9 1 CHASSIS 08116 60101 A0 MP51 08116 01203 8 1 BRACKET XFMR 08116 01203 A0 52 08116 01201 6 1 BRACKET XFMR 08116 01201 A0 54 0624 0413 3 1 SCR TPG 8 16 224 41390 382 AO 55 08116 04123 7 1 COVER 08116 04123 0 56 0363 0125 7 2 STRP FINGERS 97 555 0 57 6960 0001 2 HOLE PLUG AO 58 5180 2462 2 CABLE ASSY A0 MP60 0380 1482 0 1 STDF HEX 344 TI 08112 61101 7 1 08112 61101 Replaceable Parts 7 Main Board Table A 3 Main Board Parts List 1 08112 66521 3 1 BD AY MAIN 28480 08112 66521 1 0180 3159 8 1 25 00493 NM25VN103Q25X5
132. 8112 13725 1858 0058 8159 0005 1818 1768 1200 0541 0360 2264 20 1 1 1 2 Figure B 4 shows the location of the ROMs on microprocessor board 66533 modify Figure 10 7 9 ICROPROCESSOR BOARD 08116 66533 TP7 45V Rie U5 6 7 E TP4 SA SP STA STP 25 C5 Y TP2 Figure B 4 08116 66533 ROM layout Backdating 23 DATA BUS FROM lt ADDRESS BUS MAIN DECODER 5 16 12 li 2 15 012 15 3 4 3 m z EVMA B 24 Backdating 3 Figure B 5 shows the change to Figure 10 7 5 for enabling five individual ROMS ROMI ROM3 C17 6000 6 8000 8 10 i1 24 5 n 2 4 8 o 16 TO U13 4 32 e 9 TO U14 4 128 256 512 1824 15 2048 14 f 012 ROM 11 De 612 014 AGI T8 01 5 3 02 be 04 1 AG I4 04 615 057 AG 18 05 16 067 67 06 35117 07 07 12 12 ROMZ E a ROM4 9000 SFFF ROMS AQQQO AFFF ROM6 200 li 24 12 14 IE 16 8 32 1 4 8 128 256 512 1024 2048 xL ROM4 Ue ROM 0 62 13 03 AG 4 D4 1 12 ROMS
133. 820 1546 2 1 ANLG MUXR 02037 14052 A 30 Replaceable Parts A2 U12 A2 U13 A2 U14 A2 U15 A2 U16 A2 017 A2 U18 A2 U19 A2 U20 A2 U21 A2 U22 A2 U23 A2 U24 A2 U25 A2 U26 A2 027 A2 U28 A2 U100 A2 U101 A2 U102 A2 U103 A2 U104 A2 U105 A2 U106 A2 U107 A2 U108 A2 U109 A2 U110 A2 0111 A2 U112 Table A 4 Control Board Parts List continued 1826 0857 1826 0857 1826 0600 1820 1199 1820 1216 1820 1730 1820 1730 1820 1730 1826 0697 1826 0635 1826 0635 1826 0857 1826 0547 1820 1546 1826 0180 1820 1730 1826 0821 1820 1730 1820 1730 1820 0801 1820 1400 1820 1400 1820 0820 1820 0820 1820 1686 1820 1052 1820 1282 1820 1197 1820 1278 1820 1278 on CO Reference Part CD Qty am Tp em Description D A 10 BIT D A 10 BIT IC 074A IC SN74LS04N IC SN74LS138N IC SN74LS273N IC SN74LS273N IC SN74LS273N D A 12 BIT IC OP 07C IC OP 07C D A 10 BIT IC 072A ANLG MUXR IC NE555N IC SN74LS273N ANLG SW IC SN74LS273N IC SN74LS273N 10101 10104 10104 1 101351 IC MC10135L IC MC10103P IC MC10125L IC SN74LS109AN 8 741 500 IC SN74LS191N IC SN74LS191N SN74LS191N Part AD7522LN AD7522LN TLO74ACN SN74LS04N SN74LS138N SN74LS
134. 83 De 039 Be R118 R320 8528 use 12 Re ce cRs 4 02 0308 Be 19 De 321 538 De 11503 Re ce 0505 DI Q309 B2 126 R322 R531 De Re 506 Q310 R127 R325 B C2 R532 D Al 8 ee R32 D2 m 5 Be 0313 R132 8535 c9 A1 C409 ce J2 C1 Q314 B1 R134 C1 R329 R536 Di ce 1 Al J3 0315 R135 R400 8537 D1 Be Bl 414 re Be R138 8538 Dl Be 615 ce 992 ce 6539 D C13 501 1942 2 858 14 Re 8 993 Ce 8 ci 6404 ce 8591 B2 15 ne 994 C2 8982 01 W Di R543 m Cos bi joe m moo 0 54 C18 Be cses 0583 D 20 855 0 C19 Be 9504 12 Reae ce 5546 01 coe 122 9505 01 547 0 Bi 9595 11 C121 Cses 1501 R204 C1 R412 R548 Di ce 502 907 Rees R949 DI 511 asas DI 8558 12 5 2 503 0509 207 8551 12
135. 96 HIL 0 10 V LOL 0 00 V 3 Set up the DVM as follows Function DCV Trigger EXT 4 For each value of HIL in table verify that the DVM reading is within the specified limits 5 Record your results on a copy of the Test Record specified limits are given here and on the Test Record HP 8112A HP3458A Reading setting Low Limit High Limit 6 Set up the HP 81124 as follows DEL 65 ns HIL 0 0 V LOL 0 10 V 7 For each value of LOL in table verify that the DVM reading is within the specified limits 8 Record your results on a copy of the Test Record specified limits are given here and on the Test Record m 8112A DVM Reading setting LOL Limit High Limit 01 0 144 V 05 V 0 56 V 10 1 08 V 50 5 24 V 8 0 8 36 V Note p Specification for LOL HIL 0 V is 40 mV 3 of amplitude Testing Performance 8 13 M I I Transition Time Performance Test Specifications 10 90 of amplitude Leading and trailing edge times are independently programmable within a common range max ratio 1 20 Fixed transition typical 5ns for leading and trailing edges Linear transitions LEE and TRE 6 5 ns to 95 ms Accuracy 5 of programmed value 2ns Linearity typical 3 for transition times greater than 100ns Equipment Oscilloscope HP 54121T Two Cable Assemblies Test Setup Oscilloscope HP 5412xT HP 8112A CJ 3 2 3 4 TRG 2
136. A2 SCHEMATIC 3 SERVICING THE CONTROL BD 1g 5 9 1 2 P O A2 CONTROL BOARD LD8 L07 2 65 er MER E isv SVREQ UP CURRENT SOURCE 3 2v 45V 9 ms S 190K 5 4 i TLSTAN V GAIN 1 1 AMPL 6 R48 Q x 11017221 RAS 11947771 10872A L Kros Vibe _ one 107 6 V OV Troubleshooting Note E Timer Address Decoders m If an error code is being displayed by the HP 8112A you must press a key for example to return the microprocessor to normal operation before troubleshooting m The component layout and locator for the standard control board A2 is at the end of the chapter Verify the following voltages DAC supply U9 pin 2 45 V m DAC reference TP9 1 V DAC reference TP8 9 V 1 Set up the HP 8112A as follows RCL 0 PER 10 us 2 Check that pin 3 of U26 is delivering a signal of approximately 100 Hz The address decoders can be checked using signature analysis 1 Set the microprocessor to free run mode as follows a Set the P1 wire on board A3 See Chapter 10 7 to position P1 b Disconnect Jumper A2W1 c Connect RES on A3 to ground for a short time to ensure the microprocessor is reset d Connect the signature analyser ground to the Control Board ground and connect the probes as follows Sig Analyser
137. ABLE 1400 0304 RIVET 0 125 0361 0140 Change 4 Several component changes were made to improve pulse response in Linear and Fixed Transition Mode For instruments with serial numbers 2136G00219 and lower make the following changes to the appropriate parts list Main Board In Appendix A Table A 3 modify Reference Description HP Part Al 08112 66501 C532 CAP 1 pF 200V 0160 4380 C534 CAP 27 pF 0160 4393 Q504 XSTR SI 2 4209 1853 0405 R534 RES 16 99 1 0698 4363 R537 RES 12 72 1 0698 4356 R559 RES 30 12 1 0757 0388 B 4 Backdating Change 5 Microprocessor Board A faster IC was substituted to improve reset after power interruption For instruments with serial numbers 2136G00354 and lower make the following changes to the appropriate parts list In Appendix A Table A 5 modify Reference Description Part 08116 66523 035 SN74LS04 1820 1199 Change 6 Main Board Component changes were made to improve slope stability For instruments with serial numbers 2136G00374 and lower make the following changes to the appropriate parts lists In Appendix A Table A 3 modify Reference Description Part Al 08112 66501 R437 RES 16 20 1 5 0698 7265 In Appendix A Table A 3 delete Reference Al 08112 66501 R325 to R329 Description HP Part Change 7 Microprocessor Board This change was to clarify incorre
138. Analysis Sub Free Run 010 011 013 014 015 016 018 019 023 026 030 U37 Decoder S A Pin Pin Pin Pin Pin Pin Pin Pin Pin Pin Pin Pin GPIA CS 748C 7 3 Keyboard 10638 10 LB 89C7 14 1 ADD C898 12 1 READ 6P25 11 1 19 LATCHI HC8A 10 11 HP IB PHCC 7 9 RAM SEL 80 9 8 8 5 5 15 9 0A8U 14 10 H883 2 9 In Chapter 10 7 modify the section on trouble shooting the as follows ROM The ROMs be checked using signature analysis 1 Set the microprocessor to free run as described in Chapter 10 7 and connect the signature analyzer probes as instructed Signature Analyzer Probe connections for ROM Test Probe Trigger Connect to See Table B 6 See Table B 6 TP p Ground 2 Connect the data probe to the 5 V supply and check that the signature is P254 If not the microprocessor is not free running B 28 Backdating 3 For each ROM in Table B 6 connect the start and stop probes to the indicated test point and use the data probe to check the signature at the listed pins Table B 6 ROM signatures ROM U9 2 U8 U7 06 ROMS 05 Start Stop Changing the ROM If the ROMs are changed the data saved in the RAM has to be made compatible with the new ROMs This can be done by setting the HP 8112A to RCL 0 and turning the instrument off and on again If the instrument become
139. B2 DYS CAP 10uF 20 V 04200 150D106X9020B2 DYS CAP 10uF 20 V 04200 150D106X9020B2 DYS 6 8uF 35 04200 150D685X9035B2 DYS Al C105 0180 0116 1 1 6 8uF 35 04200 150D685X9035B2 DYS Al C106 0160 5746 1 1 CAPO luF 50V 06121 37987 5104 11 1 110 0160 3873 1 1 47 200 V 06352 FD12C0G2DA4R7D Al C111 0160 4385 2 1 15pF 200 V 09939 121 105 0 1507200 1 112 0160 5746 1 1 0 50V 06121 37987 5104 11 A 8 Replaceable Parts Table A 3 Main Board Parts List continued HP Part CD Qty Description Manufr 1 C113 0160 5746 1 1 0 1uF 50 V 06121 B37987 T5104 M11 0160 3879 7 1 0 011 100 V 02010 SR201C103MAAH 0160 3879 7 1 0 011 100 V 02010 SR201C103MAAH 0160 5746 1 1 O 1uF 50 06121 B37987 T5104 M11 0160 3879 7 1 0 011 100 02010 SR201C103MAAH 0160 3879 7 1 0 014 100 V 02010 SR201C103MAAH 0160 0572 1 1 2200pF 100 02010 SR201C222MAAH 0160 0573 2 1 CAP 4700pF 100 02010 SR201C472MAAH 0160 5746 1 1 O 1uF 50 V 06121 37987 5104 11 0160 4521 8 CAP 12 200 06352 FD12C0G2D120J 0160 5746 1 1 O1uF 50 06121 37987 5104 11 0160 5746 1 1 0 luF 50 06121 37987 5104 11 0160 0575 4 1 0 047uF 50 02
140. Burst Verification Test Characteristics 5 Equipment Test Setup Procedure te PS Output Mode Verification Test Characteristics Test Setup 1 Test Setup 2 x BE Equipment ING ei Procedure 5 05 pa Period Control Verification Test Characteristics 0 0 Equipment Test Setup 2 4 4 umo 402 Wege Delay Control Verification Characteristics Equipment VE Test Setup Procedure 222522 e Width Control Verification Test Equipment TestSetup eu ee ES Procedufe 44 2 2 ds al mx High Level Control Verification Test Characteristics Equipment 22222252 Test Setup Procedure 25 22 2202 HP IB Verification Test Test Setup sex mene s Equipment 25 qeu noe Oe X Es 8 16 8 16 8 16 8 16 8 18 8 18 8 19 8 19 8 19 8 21 8 21 8 21 8 22 8 22 8 22 8 23 8 23 8 23 8 23
141. C Shaper IC This is used as a pulse generator up to 50 MHz with the output either continuous gated or triggered It is also used as a burst generator This is used as a linear preamplifier and final output pulse shaper The ICs and their supporting circuits are covered in more detail in the relevant parts of the later chapters however the IC pin identities are given in Figure 10 1 2 TOP VIEW TOP VIEW SINE RPL 24 SE 1 ADJUST TRIGGER 24 SEE 1 TRIGGER IN MODE 23 NOTE ERROR OUT 23 NOTE ox 1 22 45 DC ADJUST 4 TRIGGER OUT 21 4 s T 5 REF 18 19 6 Su INPUT 7 GAIN CELL ADJUST our 18 7 m s ADJUST gl 17 VERNIER ADJUST our BIAS 17 2 REF 15 f VERNIER INPUT 5 2v 16 NORH COMP 15 sce 15 10 LF INPUT ug BIAS 1 Lo B 14 11 ees ADJUST 1 1 12 Bg ccc FUNC SLOPE 13 12 SHRPER IC vco IC TOP VIEW TRIGGER POS 12 13 TRIGGER NEG GATE TRIGGER 11 TIMEZRRTE CON ENABLE 10 15 MODE IN VEE Bs 16 12 rece NOTE PIN IDENTIFIED ON TRIGGER IN gt 18 RANGE UNDERSIDE 06 16 o MEN IN 13 TIME IN 5 RAP FREQ IN 4 21 BURST ON 3 22
142. C 6 18 Self test 2 6 Service request 2 6 Servicing 10 1 Address Decoder 10 3 2 Burst Control 10 6 1 Control Board 10 5 1 Control Input 10 3 2 Display 10 7 5 Introduction 10 1 Keyboard 10 7 5 Microprocessor 10 7 1 Output Amplifier 10 4 1 Overview 10 1 1 Power Supply 10 2 1 Self test 10 1 3 Shaper 10 4 1 Slope Generator 10 3 1 Timing 10 3 1 Trigger Input 10 3 1 Servicing position 10 1 3 Shaper IC 10 1 1 10 4 1 Signature Analysis 10 7 15 Slope Error 6 15 Slope Generator IC 10 1 1 Slope IC 10 3 7 SPD 6 18 SPE 6 18 Specifications 2 1 SRO 6 9 SRI 6 9 SRQ 6 13 6 17 Standard Parameter Set 4 4 Status byte 2 7 6 13 Status reporting 6 13 STO 6 9 SU 6 8 Switching on 4 2 Syntax error 6 15 T T1 T3 6 6 Test Recommended test equipment 1 4 Self test 4 2 10 1 3 Testing Self test 7 4 Timing adjustment Delay 9 11 Period 9 10 Timing error 6 15 Timing IC 10 1 1 10 3 2 Transition Modes 4 10 TRE 6 7 Trigger Controls 4 6 Triggering examples 5 1 External burst mode 5 5 Gate mode 5 3 Normal mode 5 1 Trig mode 5 2 Width mode 5 4 Trigger mode Programming 6 6 Selecting 4 5 Trigger modes Specifications 2 4 Trigger Output 2 5 4 6 Trouble shooting 10 1 3 Troubleshooting Address Decoder 10 3 14 Burst Control 10 6 5 Control Board 10 5 11 Keyboard 10 7 17 Main Board 10 3 14 Microprocessor 10 7 15 Output Amplifier 10 4 14 Index 3 Power Sup
143. C pins for each type of transition Output Control Signals and output mode against Table 10 4 3 Table 10 4 3 Waveform Control truth table Transition WF1 WF2 Type 22 Pin 23 Pin 19 Fixed H L X Linear L L X Gauss H L X Output Mode Norml X X L COMPL X X H Shaper IC Check amplitude vernier control voltage with the HP 8112A Amplitude vernier HIL and LOL settings as indicated in Table 10 4 4 The voltage is Control voltage measured at the board connector side of R422 Table 10 4 4 Amplitude vernier Control voltages HP 8112 Setting Control voltage HIL LOL at R422 typ 0 5 V Shaper IC Reference Shaper IC reference current can be checked by measuring the Current voltage across R411 The reading should be approximately 5 4 V which equates to of 2 5 mA Shaper IC Check that the signal levels at the emitters of Q400A and Q400B are Current mirror identical as these transistors are a matched pair Pre Attenuator and Check the relay control signals K4 against Table 10 4 5 Ouiput Attenuator Control Signals Table 10 4 5 Attenuator Control truth table Amplitude range 10 0 V 16 0 V H H H L 1 00 V 9 99 V L 100 mV 999 mV Output Disabled H L mm Servicing the Shaper and Output Amplifier 10 4 13 Offset vernier Check the offset vernier control voltage received from the control Control voltage board at boar
144. COMPL DISABLE LIMIT NORM HILC 1 ms 65 ns 500 us Fixed 8 00 V 0 0 V Off Off Off Connect the HP 8112A output via an exact 50 Q 0 196 feedthrough to the oscilloscope HP 54503A Adjust A2R50 for 0 V amplitude no signal Set the HP 8116A Signal Generator as follows Trigger Mode FREQ AMPL DISABLE NORM 2 Hz 8 V symetrical Off Connect the signal to the HP 8112A CTRL INPUT Adjust 1 506 for minimum change in the waveform baseline Slope Equipment Procedure Oscilloscopes HP 54121T HP 54503A 20 dB attenuators 3 x 1 Set up the HP 81124 as follows Trigger Mode NORM Control Mode Off PER 5 ms DEL 65 ns DTY 50 Transition Linear LEE 100 TRE 500 us HIL 4 00 V LOL 4 00 V COMPL Off DISABLE Off LIMIT Off STO 1 Oscilloscope HP 54121T HP 8112A 2 aD Attenuators 40dB 2x20 20dB Figure 9 7 Slope test setup 2 Set the HP 81124 as follows LEE 999 STO 2 3 Set the HP 81124 as follows LEE 500 us STO 5 4 Set the HP 81124 as follows TRE 100 5 3 5 Set the HP 8112 follows Adjustment Procedures 9 19 9 20 Adjustment Procedures 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 TRE 999 STO 4 Set the HP 81124 as follows RCL 1 Connect the HP 81124 Trigger Output to the oscilloscope T
145. Check the Delay Generator levels against Table 10 3 13 Table 10 3 13 Delay Generator Signal Levels DEL Setting Voltage across 226 1 ms 0 16 V 5 ms 0 003 V 9 99 ms 0 02 V Width Generator 1 Set up the HP 81124 as follows RCL 0 DEL 650 us or DBL 200 us 2 Check the input signal from the delay generator at TP2 pin 7 of U240 against Figure 10 3 13 DBL L 6 DEL 650us 9 Figure 10 3 13 Width Generator Input 3 Check the ramp signal at pin 20 of U240 against Figure 10 3 14 Servicing the Timing and 10 3 19 Slope Generators 100 5 Figure 10 3 14 Width Generator ramp signal 4 Check the signal being sent to the slope generator IC at TP3 against Figure 10 3 15 WIDTH 1 us DEL MODE DBL MODE 200 5 Figure 10 3 15 Width Generator output 5 Check the Width Generator operation against Table 10 3 14 and Table 10 3 15 Table 10 3 14 Width Generator Operation 0240 Pin Mnemonic Width control voltage input 2 Width error output signal Width input store select 11 to 18 LD7 LDO Data to be latched into the input store of U240 Width Vernier Current See Table 10 3 1 See Table 10 3 2 See Table 10 3 15 6 Verify that voltage at 1240 pins 1 4 and 5 are at virtual ground min 40 mV max 0 V 10 3 20 Servicing the Timing and Slope Generators 1 Width vernier current
146. Down ranging Using the RANGE key Setting Parameters GH Ee a Adjustment Period Burst Key LI sete et tab SERT ROI C Delay Double Key T Ava ah Width Duty Key RUN Leading and Trailing edge Keys High and Low level Keys HIL 191 Set Key SET Store and Recall Key Gremo ENTE Selecting Output Mode Limited Output Complement Output COMPL Disabled Output DISABLE Rear Panel Rs Se HP IB Connector KOU 2 Dee Marker Hold In 42252 de ee ay ce one ted he Buse oo ak Se ok LA Ve Operating Examples Introduction Triggering Examples Normal Mode uated zu m Sd ES e Rs Gate Mode Applications a Analog Applications Fixed transition mode Linear transition mode Cosine shaped transition modes Gaussian Digital Applications Fixed transition mode Linear variable transition mode Cosine shaped transition mode 4 11 4 12 4 13
147. ED LMP 01542 1301 5 0512 1990 0486 6 1 LED LMP 01542 1301 5 DS13 1990 0486 6 1 LED LMP 01542 1301 5 0514 1990 0486 6 1 LED LMP 01542 HLMP 1301 5 0515 1990 0486 6 1 LED LMP 01542 HLMP 1301 A5 DS16 1990 0486 6 1 LED LMP 01542 1301 5 0517 1990 0486 6 1 LED LMP 01542 HLMP 1301 5 0518 1990 0486 6 1 LED LMP 01542 1301 A5 DS19 1990 0486 6 1 LED LMP 01542 1301 5 0520 1990 0486 6 1 LED LMP 01542 1301 5 0521 1990 0806 4 1 LED LT BAR 01542 HLMP 2300 SELECTED A5 DS22 1990 0805 3 1 LED LT BAR 01542 HLMP 2350 SELECTED 5 0523 1990 0486 6 1 LED LMP 01542 HLMP 1301 5 0524 1990 0486 6 1 LED LMP 01542 HLMP 1301 A5 DS25 1990 0486 6 1 LED LMP 01542 HLMP 1301 5 DS26 1990 0846 2 1 DISPLAY NUM SEG 01542 5 DS27 1990 0846 2 DISPLAY NUM SEG 01542 5 DS28 1990 0846 2 DISPLAY NUM SEG 01542 A5 DS29 1990 0846 2 DISPLAY NUM SEG 01542 A 40 Replaceable Parts Table A 7 Display Board Parts List continued Reference HP Part CD Qty Description 1251 7430 CONN POST TP HDR 08839 1251 7431 CONN POST TP HDR 08839 3101 2529 SW RKR DPDT 08360 3101 2529 SW RKR DPDT 3101 2529 SW RKR DPDT 3101 2529 SW RKR DPDT Replaceable Parts 41 Backdating Backdating information is only required for instruments with a serial number lower than that shown on
148. End of the program DEL WID STOP Display Display the current values of Delay and Width PRINT Delay PRINT USING ZZ DD New_del PRINT ms Width 5 PRINT USING ZZ DD ms New_wid RETURN END Programming Examples 7 9 ee Program SPOLL_2 Purpose Important program lines Comments Note 7 10 Programming Examples The main purpose of this program is to demonstrate how to service an SRQ directly in the program It also demonstrates how to initialize the interface of the HP 8112A and set it to the standard setting clear the status byte conduct a serial poll SPOLL return the instrument to local mode 130 CLEAR 712 Initialize the HP 8112A interface and set it to the standard setting 170 A SPOLL 712 Read the status byte to clear it 210 OUTPUT 712 XXX Case a syntaz error 270 A SPOLL 712 Conduct a serial poll 280 PRINT SPOLL A Print the result 310 LOCAL 712 Return the HP 81124 back to local mode Initialization section The interface is initialized The HP 81124 is set to the Standard Setting and the status byte is cleared Main section In the main section is sent over the HP IB to the instrument line 210 but it is not a valid command so it causes a syntax error Since the instrument needs some time to parse the computer should wait a sufficient amount of time before conducting the following SPOLL line 270 This is done by forcing the computer to wait
149. Gale 4 4 oer uo Boh YS en External Width External Control Period Delay Double pulse and Width Control High level Control Settling time within 5 of final value Output Mod s Disable 2 5 DADA RS EVA Limit 0n amp ca Pus Cosine transitions Linear transitions Inputs and Outputs gt External Input Control Input 1 1 1 1 1 2 1 2 1 3 1 4 2 1 2 1 2 1 2 2 2 2 2 2 2 2 2 2 2 2 2 3 2 3 2 3 2 3 2 4 2 4 2 4 2 4 2 4 2 4 2 4 2 4 2 4 2 4 2 5 2 5 2 5 2 5 2 5 2 5 2 5 2 5 2 5 2 5 Contents 1 Trigger 2 5 Main Output 2 6 Additional Features 2 6 General Characteristics 2 7 Environmental 2 7 Power supply 2 7 Weight x notos cee 2 7 Dimensions 2 7 Recalibration period 2 7 3 Installation Introduction vy 3 1 Safety Considerations E 3 1 Initial Inspection 3 1 Power Requirements and Line Voltage Selection 3 2 Power Cable s 3 3
150. HING 03406 A 12 Replaceable Parts Table A 3 Main Board Parts List continued Reference HP Part CD Qty Description Manufr 1 504 1901 0179 7 1 DIO SWITCHING 03406 A1 CR505 1901 0179 1 DIO SWITCHING 03406 1 CR506 1901 0179 7 1 DIO SWITCHING 03406 Al CR513 1901 0732 8 1 DIO PWR RECT 02037 SR3010 4RL 1 514 1901 0732 8 1 DIO PWR 02037 SR3010 4RL 26 60 0070 3428 6202 26 60 1040 CONN POST TP HDR 03418 CONN POST TP HDR 04726 CONN POST TP HDR 03418 Al J1 1251 5184 Al J2 1252 0277 Al J3 1251 3305 Al 1200 1200 0541 SKT IC DIP 02414 DILB24P 308T 1 J220 1200 0541 SKT IC DIP 02414 DILB24P 308T Al J240 1200 0541 1 1 SKT IC DIP 02414 DILB24P 308T Al J301 1200 0541 1 1 SKT IC DIP 02414 DILB24P 308T 1 J401 1200 0541 1 1 SKT IC DIP 02414 DILB24P 308T 1 K100 0490 1412 9 1 RLY REED 1 11263 3570 1332 053 1 300 0490 1412 9 1 RLY REED 11263 3570 1332 053 1 500 0490 1412 9 1 RLY REED 1A 11263 3570 1332 053 1 501 0490 1412 9 1 RLY REED 11263 3570 1332 053 Al 502 0490 1412 9 1 RLY REED 1A 11263 3570 1332 053 1 503 0490 1412 9 1 RLY REED 1A 11263 3570 1332 053 1 K504 0490 1412 9 1 RLY REED 1A 11263 3570 1332 053 57 3452 57 3452 10M470K 57 3452 57 3452 CORE SHLD BEAD 04822 CORE SHLD BEAD 04822 L 470NH 10
151. HP 8112A Figure 4 1 and Figure 4 12 show the front and rear panel respectively Each group of controls is explained in subsequent sections of this chapter under the following headings a Switching On Trigger Mode Selection External Trigger Controls Control Mode Selection Transition Mode Selection m Parameter Selection Rear Panel Examples are given in Chapter 5 Before applying power to the HP 8112A 1 Read the red Safety Summary sheet at the front of this manual 2 Ensure the Line Voltage Selector switches are set properly for the power source to be used Refer to Chapter 3 on instrument installation if necessary Do not change the Line Voltage Selector switches with the instrument switched on or with power connected to the rear panel 3 Ensure that the device under test cannot be overdriven by the HP 8112A output 16 V into 50 9 32 V into high impedance 4 Ensure that the maximum external voltage applied to the HP 81124 falls within these limits 5 V to 5 V dc Do not apply an external voltage greater than 5 V or electrostatic discharge to the output connector Operating 4 1 8112 PULSE GENERATOR 50MHz HEMLETT PACKARD MoE CTRLA O RMT O AD O GATE DBL 880 OE WIDOE BUR PER DEL 20 0 25 O PERC ERROR 2 Q 0 9 Ons ov EXCESSIVE A OWID OLEE TRE
152. IERR 6 14 6 15 6 16 6 17 Input error 6 17 Inputs 2 5 Inspection 3 1 Installation 3 1 VERNIER 4 13 Keys BUR 4 13 Keys 4 14 Keys LoL 4 14 Index 2 Keys 4 13 Keys SET 4 14 Keys STO RCL 4 15 Keys TRE 4 14 Keys 4 14 L LO L1 6 11 LD 6 8 Learn modes 2 6 LEE 6 7 Limit error 6 14 Linear Transitions Specification 2 2 LLO 6 18 Local lockout 6 2 Local mode 6 2 LOL 6 8 Low Level Specification 2 3 LU 6 8 M 8 6 6 MD 6 8 Memory 2 6 Message times 2 7 MLA 6 18 MTA 6 18 MU 6 8 Operating characteristics 2 3 Operation 4 1 Options 1 2 Output 2 6 Specification 2 3 Output Amplifier 10 4 4 Output mode Programming 6 11 Selecting 4 16 Output Modes 2 5 Outputs 2 5 P Parameter Programming 6 7 Range Down 6 9 Range Up 6 9 Reading 6 10 6 11 Recall 6 9 Setting 4 13 Slope calculation 6 9 Store 6 9 PER 6 7 PERC 4 8 Performance Tests 8 1 Period Specification 2 2 Period timing 9 10 Power cable 3 3 requirements 3 2 Requirements 2 7 Power on 4 2 Power Supply 10 2 1 Programming 6 1 Examples 7 1 Pulse Width Specification 2 2 R RCL 6 9 RD 6 9 Recalibration 2 7 9 1 Remote mode 6 2 Replaceable Parts Control Board A2 A 26 Display Board A5 A 40 Instrument 6 Keyboard A4 A 37 Main Board A1 A 8 Microprocessor Board A3 A 33 RU 6 9 S SD 6 8 SD
153. Instrument Overview and Troubleshooting Guide Amplitude Tests Shaper Output State Test Burst Tests E36 When software triggered low fall time of 1 ms Range 6 out of limits Possible faults in trailing edge slope control circuit U13 U14 or U302 See Chapter 10 5 E37 When software triggered high rise time of 9 99 ms Range 6 out of limits Possible faults as in E35 E38 When software triggered low fall time of 9 99 ms Range 6 out of limits Possible faults as in E35 E39 When software triggered high rise time of 10 ms Range 7 out of limits Possible faults as in E35 E41 Amplitude range 2 9 99 V not possible Possible faults m Pre attenuator circuit m Amplitude control circuit U23 to U25 m Offset control circuit U20 to U22 See Chapters 10 5 and 10 4 E42 Amplitude range 1 1 V not possible Possible faults as in E41 HP 8112A set to produce a burst of 10 pulses of period 250 E51 Burst counter supplies less than 10 pulses Possible fault in Burst flip flop 0201 or Burst control circuit 0102 to 0112 Refer to Chapter 10 6 E52 Burst counter produces more than 10 pulses Possible faults as in E51 Instrument Overview and Treubleshooting Guide 10 1 9 10 2 Servicing the Power Supply Theory of Operation Introduction Line Voltage Selector and Transformer Bridge Rectifiers and Regulators The HP 8112A power supply unit occupies part of the main board A1 and con
154. L 40 99 10 4 12 10 4 11 Main Board A1 Component layout 10 4 17 10 4 12 Main Board 1 Component locator 10 4 19 10 5 1 Principle of DAC Operation 10 5 2 10 5 2 DAC Reciprocal operation 10 5 3 Contents 14 10 5 3 10 5 4 10 5 5 10 5 6 10 6 1 10 6 2 10 6 3 10 7 1 10 7 2 10 7 3 10 7 4 10 7 5 10 7 6 10 7 7 10 7 8 10 7 9 10 7 10 A 1 A 2 B 1 B 2 3 4 5 6 7 8 9 10 B 11 B 12 B 13 B 14 B 15 Standard Control Board A2 Schematic 1 10 5 5 Standard Control Board A2 Schematic2 10 57 Standard Control Board 2 Schematic 3 10 5 9 Standard Control Board A2 Component layout and locator i o Rex v Ronny ele 10 5 17 Simplified Burst Generator 10 6 1 Burst Control Schematic 1 10 6 3 Burst counter waveforms and timing 10 6 7 Microprocessor board architecture 10 7 1 GPTA IG pins Gi oe el x wo 10 7 3 Address 4 10 7 4 Microprocessor Board Schematicl 10 7 7 Microprocessor Board Schematic 2 10 7 9 Microprocessor Board Schematic3 10 7 11 Keyboard A4 and Display Board 5 Schematic 10 7 13 Microprocessor Board A3 Component layout and locatof 2 xopelcsee ty Mee Ee oe E 10 7 19 Keyboard 4 and Display Board A
155. LEAR SCREEN 40 A SPOLL Adr Clear the Status Byte 50 60 Program to check RAM and HARDWARE 70 80 Visual Indicators 100 REMOTE Adr Remote Control of HP 81124 110 RMT LED on 140 OUTPUT Adr EST Execute Self Test command 150 RMT and ADS LED s on 160 WAIT 1000 Time for HP 8112 internal processing 170 180 A SPOLL Adr Read and clear Status Byte 190 200 IF 4 0 THEN 111 Status Byte is zero HP 81124 has a fault 210 220 PRINT HP 81124 FAULT WITH ERROR A 64 240 minus the decimal value of the 250 Service Request 260 270 END IF 280 290 LOCAL Adr Set HP 81124 to local operating mode 300 310 END 230 Print fault message on screen which is Error HP 81124 Self test Programming Examples 7 5 Using the Buffer Not Empty Flag 7 6 Programming Examples START Put 8112A into remote mode Send programming message to 8112A 4 Read 8112A s status byte YES Buffer not Empty CONTINUE The Buffer Not Empty flag indicates that the HP 81124 is currently interpreting a programming message You can use the flag to make the system controller wait until a message has been implemented before proceeding This is an alternative to using the WAIT statement with a fixed delay 10 20 30 40 50 60 60 70 80 90 100 110 130 140 150 160 170 180 190 200 210 Comments A
156. MODEL 8112A ERRATA Cont page 2 3 Specifications Output parameters change to read Settling Time 100 ns page 8 16 Testing Performance Pulse Performance Test change to read Settling Time 100 ns page 8 17 Testing Performance Pulse Performance Test First table change to read Settling Time lt 100 ns third line in the first table Second table Delete settling time test with linear transitions Delete Settling Time lt 107 ns third line in the second table page 8 38 Testing Performance Test Record page of Pulse Performance First table Change to read Settling time lt lt 100 ns Second table Delete Settling time lt 107 ns 10 July 1996 Page 6 of 16 MODEL 8112A ERRATA Cont page 8 12 Testing Performance Output Levels Performance Test change to read step 3 Setup the DVM as follows Function DCV Add or Change Measurement Peak Voltage HP 3458A setup for peak voltage measurement Function DCV MENU gt Trig EXT press Trig button select EXT terminate with ENTER key MENU gt NPLC 0 1 press NPLC button press period then 1 keys terminate with ENTER key HP 3456A setup for peak voltage measurement Function TRIGGER EXT N CYCINT 0 1 press period then 1 keys press STORE button press CHS N CYC INT key page 9 2 Adjustment Procedures Table 9 1 Adjustment Procedures Changeable Components change to read Procedure Overs
157. NDUSTRIES INC CTS CORP IRC INC CHICAGO RIVET amp MACHINE CO CLAROSTAT MFG CO INC THERMALLOY INC MICROSEMI CORP ELEC TROL INC COOPER INDUSTRIES INC DUPONT EI DE NEMOURS NORTH AMERICAN PHILIPS CORP GOWANDA ELECTRONICS CORP ANALOG DEVICES INC SPECIALTY CONNECTOR CO A 4 Replaceable Parts Reference METHODE ELECTRONICS INC NATIONAL SEMICONDUCTOR CORP MOLEX INC HEYCO MOLDED PRODUCTS BOURNS NETWORKS INC HARRIS CORP FAIR RITE PRODUCTS CORP LABINAL COMPONENTS amp SYSTEMS INC SGS THOMSON MICROELECTRONICS INC SPRAGUE ELECTRIC CO THOMAS amp BETTS CORP ITT CORP GENERAL INSTRUMENT CORP G C ELECTRONICS CO BECKMAN INDUSTRIAL CORP FISCHER SPECIAL MFG CO LITTELFUSE INC 3M CO NATIONAL LOCK WASHER CO ILLINOIS TOOL WORKS INC SHAKEPROOF TILLEY MFG CO STACKPOLE CARBON CO ZIERICK MFG CO ELECTRONIC DEVICES INC AMERICAN SHIZUKI CORP AUGAT INC DALE ELECTRONICS INC DURALITH CORP CAMCAR SCREW amp MFG CO RUDOLF SCHADOW GMBH RAYCHEM GMBH EFCO COMPOSANTS HIPP ESSLINGEN SIEMENS AG SCHURTER AG TDK CORPORATION OF AMERICA KLAR ELECTRO DYNAMICS CORP DAUT RIETZ GMBH amp CO KG WOLFLE amp CO Reference Table A 1 HP 8112A Parts Manufacturers continued PANASONIC INDUSTRIAL CO COMATEL REAL PACK TUSONIX MURATA ERIE NORTH AMERICA INC Reference Name VOGT AG PAPST MECHATRONIC CORP BRADFORD ELECTRONICS INC HEWLETT PACKARD COMPANY Replaceable Parts 5
158. On Page A 25 Repl Parts Table A 3 Parts List change to read A 3624 U401 1826 0923 IC BOOSTER 10 July 1996 Page 16 of 16 D Sales and Service Offices Information Asia Canada Eastern Europe Northern Europe South East Europe Hewlett Packard products are sold and supported worldwide through local HP Offices To contact the closest sales and service office check your telephone directory or contact one of the Headquarters listed below Hewlett Packard Asia Ltd 22 F Bond Center West Tower 89 Queensway Central Hong Kong G P O Box 863 Hong Kong Telephone 5 848 7777 Telex 76793 HPA HX Cable HPASIAL TD Hewlett Packard Canada Ltd 6877 Goreway Drive Mississauga Ontario L4V 1 8 Canada Telephone 416 678 9430 Telex 069 8644 Fax 416 678 9421 Hewlett Packard Ges m b H Lieblgasse 1 P O Box 72 A 1222 Vienna Austria Telephone 222 2500 0 Telex 13 4425 HEPA A Hewlett Packard S A V D Hooplaan 241 P O Box 999 NL 118 LN 15 Amstelveen The Netherlands Telephone 20 547 9999 Telex 189 19 hpner Hewlet Packard S A World Trade Center 110 Avenue Louis Casai 1215 Cointrin Geneva Switzerland Telephone 022 98 96 51 Telex 27225 hpser Mail Address P O Box CH 1217 Meyrin 1 Geneva Switzerland Sales and Service Offices 0 1 Middle East and Central Africa United Kingdom United States of America Eastern USA Midwestern USA Southern USA Western USA
159. POLL 712 PRINT 2nd SPOLL after syntax error PRINT WAIT 2 A SPOLL 712 PRINT SPOLL after waiting 2 seconds A PRINT PRINT End of the program SPOLL 2 LOCAL 712 END gt gt gt Programming Examples 7 11 INTR_2 10 20 30 40 50 60 70 80 90 100 110 120 130 140 150 160 170 180 190 200 210 220 230 240 250 260 270 280 Purpose This program demonstrates how to use interrupts to service SRQs Comments Setup section lines 110 120 The interrupt service subroutine Service_srq is set up SRQs from interface 7 are enabled to cause an interrupt Main section A SPOLL is conducted to show the value of the STB before the syntax error The computer is forced to wait 2 seconds line 190 for the SRQ before exiting the program Subroutine section The Service_srq subroutine This subroutine conducts a SPOLL Then the value and the bits which are set in the Status Byte are printed Name of this program INTR_2 This program demonstrates how to use interrupts to service a SRQ from the HP81124 1 CLEAR SCREEN CLEAR 712 A SPOLL 712 clear status byte 1 ON INTR 7 2 CALL Service srq Setup service routine for SRQ ENABLE INTR 7 2 Enable only service requests for interrupt A SPOLL 712 PRINT SPOLL before the syntax error A 1 PRINT Syntax error caused OUTPUT 712 XXX WAIT 2 Wait 2 seconds t
160. PRINT Bit 1 gt Timing Error IF BIT A 0 THEN PRINT Bit 0 gt Limit Error PRINT Use the IERR command to get more detailed information WAIT 2 PRINT More detailed decription read with the IERR command WAIT 2 1 DIM A 200 OUTPUT 712 IERR Interrogate Error command ENTER 712 PRINT A NOTE The HP8112A s Status Byte is updated after every command In this program the Status Byte was cleared by reading it with SPOLL before the IERR command was conducted To restore the previous status the Status Byte has to be cleared again WAIT 1 give HP8112A time to finish internal processing A SPOLL 712 clear the Status Byte WAIT 2 PRINT PRINT szszszzzzzzzzzzzzzzzzzzzzzzzzzzzzzz2z2zz2zz2z2z2z2z22z2z2z2z2z2z2zzzz2z2z2zzzz RETURN END Programming Examples 7 15 7C 7 00000009 B 39 LRN DEMO Purpose This program demonstrates the Learn String s usage m Reading the current Learn String with CST Sending the Learn String back to the HP8112A Time taken for transferring the Learn String is printed Recalling a setting from a location is shown 0 Comments There is no direct command in the Learn String which indicates the active parameter of the two modes DELAY DOUBLE and WIDTH DTY Instead the command of the active parameter is preceded by the non active parameter s c
161. PUT cycle MAIN OUTPUT Figure 5 5 Typical signals in External Burst mode Switch the instrument on using the line switch If neccessary select external burst mode by repeatedly pressing the standard mode key until the LED is lit Apply the E BUR signal to the EXT INPUT and select trigger slope and level as required Refer to Chapter 4 Operating for information on the trigger controls Select the Transition mode by pressing the key with the appropriate symbol The parameter window will be automatically illuminated Select each output parameter in turn by pressing its associated key Adjust the parameter value using the VERNIER and keys Refer to Chapter 4 Operating for additional information on parameter adjustment If a Control Function is required select the required mode by repeatedly pressing the control mode key until the required mode is lit Apply the Control signal to the CTRL INPUT connector Refer to Chapter 4 Operating for more permissible combinations of Operating and Control modes You may wish to set up Output Limits as described in Chapter 4 Operating to protect the device under test 7 Press the key to turn off output disable mode and enable the output LED extinguished Operating Examples 5 5 TTT gt 77 Applications Analog Applications Fixed transition mode The fixed transition time 5 ns
162. Period Delay or Width the ASCII mnemonic must be followed by the value and the appropriate unit The ASCII mnemonic the value and unit may be separated by a comma or space character For better readability it is recommended to use a space character Example To set the Period to 2 2 ms the ASCII mnemonic PER followed by the new value 2 2 and the unit MS must be sent to the HP 8112A HP Basic Statement for this is OUTPUT 712 PER 2 2 MS or OUTPUT 712 PER2 2MS Program commands can be a combination of upper case or lower case ASCII characters whereas the responses are always returned in uppercase You can send multiple programming commands on the same line The commands may be separated by a comma or a space character It is recommended to separate the commands with a comma because this makes it easier to read such a programming message Examples OUTPUT 712 M1 CTO PER 1 25 MS Commands separated with commas OUTPUT 712 1 PER 1 25 MS Commands separated with space characters OUTPUT 712 1 1 25 MS Commands not separated Commands which change modes are processed before commands which set parameters irrespective of the command order within the programming message If your application requires a parameter change to occur before a mode change use seperate programming messages for the two commands The HP 81124 can be programmed into an error condition in just the same way as when using the fron
163. R200 0698 4486 3 1 RES 24 9K 1 05524 55 1 1 201 0757 0460 1 1 RES 61 9K 1 05524 55 1 Al R202 0698 7205 0 1 RES 51 11 05W 05524 50 2 Al R203 0757 0401 0 1 5 100 1 125 05524 55 1 1 204 0757 0416 7 1 RES 511196 125W 05524 55 1 Al R205 0757 0394 0 1 RES 51 11 05524 CMF 55 1 1 R206 0698 6324 2 1 RES 187 1 125W 05524 55 1 Al R207 0757 0410 1 1 RES 301 1 125W 05524 CMF 55 1 1 R208 0698 3700 2 1 RES 715196 125W 05524 55 1 Al R209 0757 0403 2 1 RES 121196 125W 05524 55 1 Al R210 0698 3446 3 1 RES 383 1 125W 05524 55 1 1 R211 0698 3441 8 1 RES 215 1 125W 05524 CMF 55 1 1 R212 0757 0401 0 1 RES 100 1 125W 05524 CMF 55 1 1 R214 0698 3160 8 1 RES 31 6K 1 05524 55 1 1 R220 0698 4486 3 1 RES 24 9K 1 05524 55 1 1 R221 0757 0460 1 1 RES 61 9K 1 05524 55 1 Al R222 0698 7205 0 1 RES 51 1 1 05W 05524 50 2 1 R223 0757 0401 0 1 RES 100 1 125W 05524 55 1 A1 R224 3 1 RES 1K 1 125W 05524 55 1 0757 0280 18 Replaceable Parts Table A 3 Main Board Parts List continued Reference HP Part CD Qty Description Manufr Part Al R225 0698 3441 8 1 RES 215 1 125W 05524 55 1 1 R226 0757 0401 0 1 RES 100 1 125W 05524
164. ROWE Figure B 5 08116 66533 ROM schematic 4 Figure B 6 shows the location of U28 and other additional components modify Figure 10 7 9 accordingly Figure B 6 08116 66533 028 layout 5 Figure B 7 shows the RAM battery supply circuit on microprocessor board 66533 modify Figure 10 7 5 accordingly R11 at R18 E R10 1 2 RTI 24 Uto sod sume Figure B 7 08116 66533 U28 schematic Backdating B 25 6 Modify the schematic Figure 10 7 4 as shown in Figure B 8 U34 10 14 Figure B 8 08116 66533 Deletion of W3 7 Figure B 9 shows the microprocessor reset circuit on microprocessor board 66533 modify the schematic Figure 10 7 5 accordingly RESET Figure B 9 08116 66533 Reset circuit B 26 Backdating 8 In Chapter 10 7 substitute Table B 3 Table B 4 and Table B 5 for Table 10 7 3 Signatures for address drivers and decoders Table B 3 Address bus Signature Analysis Address Free Run 01 U3 Bus S A Pin Pin 0 UUUU 912 18 Al FFFF 1014 16 A2 8484 11 6 14 P763 12 8 12 A4 1U5P 13 11 9 5 0356 14 13 7 A6 0759 15 15 5 AT 6F9A 16 17 3 A8 7791 17 9 6321 18 10 37C5 19 6028 20 12 4FCA 22 A13 4868 23 14 QUP1 24 A15 0002 25 Backdating 27 Table B 5 Sub Decoder Signature
165. Reference Description HP Part Al 08112 66511 C283 Capacitor 0 001 pF 0160 3878 Change 55 Main Board Note Change 56 Main Board For instruments with serial number 2851G08699 and lower make the following changes to the appropriate parts lists In Appendix A Table A 3 modify Reference Description HP Part 1 08112 66511 0282 0283 XSTR PNP 1853 0218 This change is repeated by change 46 Component value change For instruments with serial number 2851G09130 and lower make the following changes to the appropriate parts list In Appendix A Table A 3 modify Reference C501 Description HP Part Capacitor 15 pF 0160 4385 Al 08112 66511 Backdating B 35 Change 57 Component values changed to improve instrument performance at low operating temperatures required by changeover to new style Rate ICs For instruments with serial number 2851G09506 and lower make the following changes to the appropriate parts list Main Board In Appendix A Table A 3 modify Reference Description HP Part 1 08112 66511 200 220 Capacitor 15 pF 0160 4385 C240 Capacitor 18 pF 0160 4492 R30 Resistor 200 Q 0757 0407 Change 58 For instruments with serial number 3205G10006 and lower 1 Make the following changes to the appropriate parts lists Instrument In Table 2 modify Reference Description HP Part AO 08112 1 BD AY MAIN 08112 66511
166. S 3 83K 196 05524 55 1 T 1 A2 R3 2100 0567 0 1 RES TRMR 2K 10 03744 3386P Y46 202 A2 R4 2100 0567 0 1 RES TRMR 2K 10 03744 3386 46 202 A2 R5 0757 0462 3 1 RES 75K 1 125W 05524 55 1 T 1 A2 R6 2100 3214 0 1 5 100K 03744 3386 46 104 Replaceable Parts 27 A 28 Replaceable Parts Table A 4 Control Board Parts List continued Reference HP Part CD 0698 3153 2100 0567 2100 0567 0757 0462 2100 3214 0698 3153 2100 0567 2100 0567 2100 3214 0698 4014 0757 0280 0757 0280 0698 4473 0698 4428 0698 4428 0757 1094 0757 1094 2100 3252 2100 0554 2100 0554 0757 0440 0757 0441 0698 4422 2100 3214 0698 4514 1810 0470 2100 3214 0698 4514 2100 0554 2100 0554 Co C2 Qty 1 HL m HL Description RES 3 83K 196 RES TRMR 2K 1096 RES TRMR 2K 10 RES 75K 1 125W RES TRMR 100K RES 3 83K 1 RES TRMR 2K 10 RES TRMR 2K 10 RES TRMR 100K RES 787 196 125W RES 1K 196 125W RES 1K 196 125W RES 8 06K 196 RES 1 69K 196 RES 1 69K 1 RES 1 47K 196 RES 1 47K 1 RES TRMR 5K 10 RES TRMR 500 1096 RES TRMR 500 1096 RES 7 5K 1 RES 8 25K 196 RES 1 27K 196 RES TRMR 100K RES 105 1 NETWORK RES DIP RES TRMR 100 RES 105K 1 RES TRMR 500 10 RES TRMR 500 10
167. S374N ANLG MUXR ont IC 1458 ANLG MUXR ANLG SW TL601CP IC 1458 IC SN74LS74AN 1 gt IC SN74LS74AN IC SN74LS367AN IC MC10H131P IC SN74LS374N IC 1DB6 IC 074A IC 1458 Nonna 1095 1095 1095 1095 1095 1095 LM348N LM348N LM317T LM337T LM317T LM337T SN74LS138N DM74LS374N MC14053BCP CA1458T MC14052BCL TL601CP CA1458T SN74LS74AN SN74LS74AN SN74LS367AN 1DD6 0002 MC10H131P 1DD6 0002 1DD6 0002 DM74LS374N 1DB6 TLO74ACN CA1458T Table A 3 Main Board Parts List continued Reference HP Part CD Qty Description Part 1 U400 1820 1546 2 1 MUXR 02037 14052 1 0401 1826 0923 9 1 1DC7 01876 1 0500 1820 1997 7 1 IC SN74LS374N 03406 DM74LS374N 1 0501 1826 0635 0 1 OP 07C 02180 07 1 0502 1826 0635 0 1 OP 07C 02180 0 IC SN74LS03N 01698 SN74LS03N DIO ZNR 1N827 02037 1N827 DIO ZNR 1N827 02037 1N827 DIO ZNR 12V 5 02037 5230035 18RL DIO ZNR 12V 5 02037 15230035 18RL Al U503 1820 1198 Al 1 1902 0680 1 VR320 1902 0680 1 VR501 1902 0960 Al VR502 1902 0960 1 1 Al W2 8159 0005 0 1 5 01339 1 2007 1 1 W3 8159 0005 0 1 RES 0 CWM 01339 L 2007 1 Al W4 8159 0005 0 1 5 013
168. T 712 SRO This is particularly useful for character strings where a multiple of the same timing parameter is programmed such as OUTPUT 712 FOR 1 to 100 OUTPUT 712 PER CHR A MS NEXT Immediately upon receiving the new PERIOD value the HP 8112A would calculate the excessive slope error for each period time interval By suppressing EXCESSIVE SLOPE new settings for Period are accepted by the instrument without any calculation and a reduction in programming time of typically 30 ms may be achieved In the permanently stored Mode Parameter settings in the HP 8112A ROMs SR is set to 0 zero If these settings are recalled as current settings the Service Request function can be re activated by programming SR to 1 OUTPUT 712 581 The key re activates the Excessive Slope Error There are three types of error which set the duty cycle error bit in the status byte The conditions which cause them and the description used by the HP 8112A when replying to an IERR command are listed below The timing error bit is not latched therefore a transient error is only recorded by generating an SRQ More than one error condition can occur at one time When using the IERR command ensure that you allow for a reply containing more than one error description Input Error Bit 5 Note E Service Request Bit 6 Buffer not Empty Bit 7 IERR Description Comments DTY PERC Duty cycle not
169. Table 4 3 illustrate the technique of passing Range Break Points Operating 4 11 5015 99ns 500ns 99915 55 9 50 5 339s 500 5 Range 2 X Non active Slope 7 Y Active Slope be PONE 3 Ia nu aacmcko maa Figure 4 9 Ranging examples Table 4 2 Active moves from Range 3 to Range 2 Y1 Inactive slope Change Value Value Reason X1 nochange a shared overlap range 2 3 2 10 not in overlap X3 10 in overlap with higher range 4 Table 4 3 Active moves moves from Range 3 to Range 4 Y2 Inactive slope Change Value Value Reason X1 x100 in shared overlap X2 x10 not in overlap X3 no change in overlap with higher range Up and Down ranging When this key is used to move a currently active slope up or down Using the RANGE key a range the non active slope will be automatically pulled into the Same Decade as the active slope setting This effect is particularly usefull for fast ranging between decades 4 12 Operating Setting Parameters HEMLETT PACKARD 8112 PULSE GENERATOR 50MHz 12 32 VERNIER 4 ODTY EXCESSIVE A mar BUR OLEE TRE STO RCL n Adjustment Period Burst Key Figure 4 10 Parameter controls The parameters available for selection depend on the currently selec
170. The standard instrument offers the following trigger modes NORM TRIG GATE E WID E BUR In normal mode a continuous pulse stream is generated In trigger mode each active input edge triggers a single output cycle In gate mode the active level of the external input signal enables output period The first output cycle is synchronous with the active trigger slope The last output cycle is always completed This mode can be used for recovery of external signal with selectable transition times and output levels In external burst mode each active external trigger generates a pre programmed number of pulses 1 to 1999 Minimum time between two bursts is 100 ns Operating 4 5 Controlling the External Trigger 723 8112 PULSE GENERATOR 50MHz JJ PACKARD X M N iPULSE Ex Le TRIG Dur OUTPUT 20 10V 4104 Caution Trigger Slope Trigger Level Manual Trigger Single Pulse Trigger Output 4 6 Operating Figure 4 3 External Trigger Controls The external trigger signal required in some trigger modes must be applied to the EXT INPUT BNC connector Do not apply voltages outside the range 20 V to the EXT INPUT connector Select a positive or negative trigger slope by pressing the or key respectively The current slope is indicated by the LED on the key The trigger can be switched off by pressing the currently
171. UIT 10 6 3 P O A2 CONTROL BOARD EST TEES LOAD BURST zx CIRCUIT BURST NUMBER ACCEPTOR S Um vo EBS184N 8 Gg Gg E gt 5 EBSI125N m CTROIV16 keom 81 1 3 15278 U1180 1 2 1 3 yu la 05 ui 51 4 74 52 5 01108 BURST COUNTER gt HIGH BYTE EFI BURST ry LOAD L T PYT a mE y COUNT n as 6 1 4 13 N C es 15 go zm Ha n gt t 3 74 5191 EJB 108 107 Tis Troubleshooting Note E Output Address Decoder If an error code 15 being displayed by the HP 8112A you must press key for example to return the microprocessor to normal operation before troubleshooting u The component layout and locator for the burst control part of board A2 is the same as Figure 10 5 6 Address decoder U16 provides control signals for the burst control circuits These can be checked using signature analysis 1 Set the microprocessor to free run mode as follows a b c Set the P1 wire on board A3 See Chapter 10 7 to position P1 Disconnect Jumper A2W 1 Connect RES on A3 to ground for a short time to ensure the microprocessor is reset Connect the signature analyser ground to the Control Board ground and connect the probes as follows Sig Analyser
172. UT TRIG OUTPUT 7 Set the HP 8112A to E WID trigger mode 8 Select Linear transition and LEE TRE to 1 9 Verify that each external input pulse triggers an output pulse of the same width as shown here EXT INPUT OUTPUT TRIG OUTPUT 10 Set up the HP 81124 as follows Input Mode E BUR Control Mode Off Transition Fixed BUR 50 PER 300 ns DEL 65 ns DTY 50 HIL 1 00 V LOL 0 00 V 11 Change the external pulse generator HP 8116A width setting to 1 0 8 20 Testing Performance 12 Using the oscilloscope adjust the HP 8112A trigger level to allow triggering from the negative going edge of the external input signal 13 Set the oscilloscope sweep speed to 2 ys division 14 Verify that each external trigger pulse generates a burst of 50 output pulses as shown here koc EXT INPUT Issue OUTPUT TRIG OUTPUT Output Mode Verification Test Characteristics Simulates an external input 1 Pulse Provides one output pulse in TRIG Gate and E BUR modes Limit Implements the present output levels as output limits to protect the device under test when lit Complement Inverts the output signal when lit Disable Disconnects the output default at switching on Test Setup 1 Oscilloscope HP 5412xT HP 8112A 20 dB Attenuator with BNC SMA Adaptor Figure 8 13 Output Mode Verification Test Testing Performance 8 21 Test Setup 2 Equ
173. active key again Both key LEDs will then be off Trigger level can be varied in the range 10 V using the LEVEL adjuster This key can be used to simulate the external trigger signal This key initiates a single pulse in TRIG GATE and E BUR modes The trigger output provides a timing reference signal synchronised to the main output signal Output levels are 0 and 2 4 V into 50 Q Delay from trigger input to trigger output is 25 ns Selecting Control Mode PERC DELC O HILC h 8112A PULSE GENERATOR 50MHz HEMLETT PACKARD CTRL INPUT 20V Control Input Caution Figure 4 4 Control mode controls An analog signal can be applied to the control input to modulate or control the HP 8112A output signal This external input may be any waveform in the range 20 V However the overall range within which the instrument actually responds to a control signal is 1 0 V to 10 V as shown below Do not apply voltages outside the range 20 V to the CTRL INPUT connector CTRL INPUT 10 9 8 M 10 5 100 ns 1 ps 10 ps 100 ps 1 10 ms 100 ms 1s PERIOD WIDTH and DELAY Figure 4 5 Relationship Between Control Input Voltage and Controlled Parameter Operating 4 7 Mode Selection 4 8 Operating Note d Depending on the control mode selected the output signal may be either Period Delay Width or High Level con
174. al Voltmeter HP 3458 m Counter HP 5335A Pulse Function Generator HP 8116A Low pass filter Refer to Figure 9 6 Only required if DVM does not have built in 5 Hz low pass input filter Fixed amplitude 1 Set up the HP 81124 as follows Trigger Mode NORM Control Mode Off PER 1 ms DEL 65 ns WID 500 ps Transition Fixed HIL 0 99 V LOL 0 99 V COMPL Off DISABLE Off LIMIT Off Set the counter to TIME Interval COM Trig level 0 V Z 500 Connect the HP 8112A main output to channel A of the counter Observe the counter whilst switching the HP 8112A output from COMPL on and COMPL off Step the HP 8112A WID with the vernier until the counter reads exactly the same Exactly 50 Duty Cycle Set the HP 8112A for STO 9 Disconnect HP 8112A from the counter Set the HP 81124 as follows HIL LOL LIMIT 4 99 V 4 99 V Off 9 Set up the DVM to read AC voltages up to 10 V 10 Connect the HP 8112A main output to the DVM via an exact 500 feedthrough 0 1 11 Adjust A1R410 until the measured voltage is 5 045 V 20 mV 0 mV RMS Adjustment Procedures 9 15 HP o o o 12 13 Make a note of the adjusted voltage Set the DVM to read DC voltages If the DVM does not have built in filter use an external low pass filter as shown in Figure 9 6 Voltmeter HP 3458A s Filter 2
175. and current models but do not implement what would in effect be a retrograde change Backdating B 1 B 2 Backdating Instrument Serial No 00 to G00119 G00120 to G00159 G00160 to G00189 G00190 to G00219 G00220 to G00354 G00355 to G00373 G00374 to G00404 G00405 to G00554 G00555 to G00579 G00580 to G00604 G00605 to G00704 G00705 to G00729 G00730 to G01180 G01181 to G01580 G01581 to G01630 G01631 to G01855 G01856 to G01930 G01931 to G02105 G02106 to G02180 G02181 to G02255 G02256 to G02330 G02331 to G02380 G02381 to G02555 G02556 to G02630 G02631 to G02655 G02656 to G03005 G03006 to G03055 G03056 to G03230 G03231 to G03255 Table B 1 Backdating Changes Implement Changes Instrument Serial From 58 to No ee 15 OM amp 6 Ww o 10 G03256 to G03480 G03481 to G04105 G04106 to G04230 G04231 to G04280 G04281 to G04460 G04461 to G04530 G04531 to G04605 G04606 to G04730 G04731 to G04830 G04831 to G04880 G04881 to G05780 G05781 to G05830 G05831 to G06180 G06181 to G06580 G06581 to G06930 G06931 to G07230 G07231 to G07280 G07281 to G07380 G07381 to G07680 07681 to G07780 07781 to G07980 G07981 to G08630 G08631 to G08780 G08781 to G08949 G08950 to G09030 G09031 to G09130 G09131 to G09505 G09506 to G09530 G09531 to G10005 Implement Changes Fro
176. and off and adjust A2R27 for best compromise 1 000 ms 5ys Set the HP 8112 as follows PER 50 ms LEE 10 ms TRE 10 ms Observe LEE and TRE on the oscilloscope and adjust A2R28 whilst switching COMPL on and off and adjust for best compromise 10 00 ms 50 If the last two steps cannot be achieved repeat steps 11 to 26 for the minimum difference between LEE and TRE Set the HP 81124 as follows PER 500 ns LEE 100 ns TRE 100 ns Connect the HP 8112A to the HP 54121A oscilloscope using two 20 dB attenuators Set the oscilloscope to display one pulse and set it to measure Rise Fall time Observe the oscilloscope and adjust A1C304 for best compromise of LEE and TRE 100 ns 2 ns Set the HP 81124 as follows LEE 49 9 ns TRE 49 9 ns Observe the oscilloscope and adjust A2R26 for best compromise of LEE and TRE 50 ns 1 ns Adjustment Procedures 9 21 Al BD AY RDJUSTMENT POINTS HP 9112 BOARD Al CED TET sv CFE QW Fen 419 VERSOT PULSE TROOP Figure 9 8 Adjustment Points on the Main Board A1 9 22 Adjustment Procedures Re BD AY RDJUSTMENT POINTS HP 8112A BOARD Re S rec ec R26 49 9ns mA ec R2 ims TRE LEE 1 ms Se S R32 1 us 995us OFFSET 7 95 WID 99 9ms FIXED RMPL 9 S HILC 659 R30 av 6 PERIOD 9
177. and the FRQ IN current from the relavent DAC Selection of the above modes is made by using the MODE IN and RATE inputs as shown below Table 10 3 4 Timing IC mode selection MODE OUTPUT 0 RATE RATE 0 Not used 1 TIME TIME Not used 10 3 4 Servicing the Timing and Slope Generators Period Delay and Width Generation Because CUR REF IN and TIME IN are virtual earth inputs the external input currents can be produced by a voltage source and series resistance The control mode functions PERC DELC WIDC are produced by feeding the conditioned control input voltage to the TIME IN input of the relevant timing IC The approximate value of current drawn by the input current pins is shown below Table 10 3 5 Reference current input levels Reference Current TIME IN RATE mode approx 80 2 mA 0 2 0 2 mA const TIME mode approx 80 4A 2 mA 0 2 mA 0 2 mA const CTRL mode approx 80 2 mA 0 2 2 mA 0 2 mA Outputs The three outputs of the Timing ICs OUT OUT ERROR OUT are all open collector with a fixed current HI 0 mA LO 12 mA and a fixed transition time of 2 5 ns Error Output The error output from the timing IC indicates that a trigger signal has been received before the completion of the previously triggered event Period Delay and Width signals are generated by Timing ICs U200 U240 and U220 respectively
178. ation under control of the range setting Servicing the Timing and 10 3 3 Slope Generators In TIME mode the ranges are from 10 ns to 99 9 ms and 50 ns to 500ns In RATE mode ranges are from 100 MHz to 10 MHz and 20 MHz to 2 MHz Ranges are selectable as shown in Table 10 3 3 Table 10 3 3 Timing IC Time frequency Range Selection Range Range FREQ OUT WID or DEL Number C 5 A RATE Mode in TIME Mode 0 0 0 10 MHz 100 MHz 10 ns 100 ns 1 0 1 1 MHz 10 MHz 100ns 1 us 2 110 100 kHz 10 MHz 1 us 10 us 3 111 10 kHz 100 kHz 10 100 us 4 0 0 1 kHz 10 kHz 100 us 1ms 5 0 1 100 Hz 1 kHz 1 ms 10 ms 6 110110 Hz 100 Hz 10 ms 100 ms 7 1 1 1 2 10 2 100 15 Analog control within each range is controlled by the IN Pin 4 current derived from the appropriate DAC on the control board A2 and the TIME IN Pin 5 current derived from the control input via the control mode switch U130 The signal passes through a divider circuits before being applied to the VCO RATE Mode In the RATE mode the timing IC output is a 5096 duty cycle square wave whose repetition rate is directly related to the internal range data and the IFRQ input current TIME Mode In the TIME mode the output signal repetition is identical to the input trigger frequency but the output pulse width or delay depending on trigger mode selection is directly related to the internal store range data
179. aximum 999 ms 950 ms 902 5 ms Duty Cycle Duty Minimum MEASURED Maximum Uncertainty Output Levels High High Level Minimum MEASURED Maximum Uncertainty 8 36 Testing Performance PERFORMANCE TEST RECORD Page 4 of 6 PERFORMANCE TEST RECORD Hewlett Packard 8112A 50 MHz Pulse Generator Serial _____ Report __________________________ Date _____________ Low Uncertainty Low Level Maximum Transition Times Transition Period Leading Edge Trailing Edge Minimum MEASURED Maximum Uncertainty Fast Fixed Linear 100 ns 4 5 ns 4 5 ns 5 0 ns typ 100 ns 6 5 ns 6 5 ns 4 675 ns 8 825 ns Slo Uncertainty Period Leading Edge Trailing Edge Minimum MEASURED Maximum 527 ns 105 us 525 us 1 049ms 1 05 ms 10 5 ms PERFORMANCE TEST RECORD Page 5016 Testing Performance 8 37 PERFORMANCE TEST RECORD Hewlett Packard 8112A 50 MHz Pulse Generator Serial _______________________ Report _____________________ Date Pulse Performance Fixed Transition Characteristic Specification MEASURED Uncertainty Preshoot lt 10 of amplitude 10 mV Overshoot Ringing lt 10 of amplitude 10 mV Settling time lt 105 ns Linear Transition Uncertainty Characteristic Specification MEASURED Preshoot lt 5 of amplitude 10 mV Ove
180. check the leading and trailing edges for distortion T If there is distortion check the output amplifier input signal at TP4 Then do the following Set up the HP 81124 as follows HIL 8 0 V LOL 8 0 V b If the input signal is clean but the leading edge of the output signal is distorted check Q503 and Q505 c If the trailing edge is distorted check Q504 and Q506 Servicing the Shaper and Output Amplifier 10 4 15 10 4 16 Servicing the Shaper and Output Amplifier 586 0528 R548 TEC 5 og UB mdi Ef C182 8118 8 8 15V 23V 5V 15V 5 25 NOTE C141 C415 H1 FITTED ON THE NON COMPONENT SIDE OF THE BOARD C141 FITTED UNER IC 0180 415 FITTED UNDER CINNECTIR 72 FIGURE 19 4 11 MAIN BOARD Al COMPONENT LAYOUT C245 C409 C554 C336 R432 NOT ALWAYS FITTED SERVICING THE SHAPER AND OUTPUT AMPLIFIER 10 4 17 A B Ab 1154 i EC EUM du DOK MP o s 8 mu SS MODEL 112 REF GRID REF GRID REF GRID REF GRID REF GRID REF 10 GRID REF GRID DES LOC DES LOC DES LOC DES LOC DES LOC DES LOC DES LOC DES LOC C1 crs 2 D2 8117 318 R528 1501 CRs
181. ched on again The normally negative Power Down Detected signal is used to ensure that the RAM data is not corrupted when the instrument is switched off Refer to Figure 10 7 5 Normally U27A output is low U27B output is therefore positive and the RAM SELECT output from U15C can enable the by switching on U29C When the Power Down Detect signal goes high U27A output goes low U27B output goes low and U15C cannot switch on U29C Therefore the RAM becomes or remains disabled RAM Battery Supply When the instrument is operating U27C output is high Q1 is switched on and the RAM 110 is powered from the 5 V supply Refer to Figure 10 7 5 Power Down Detected signal goes high U27C output goes low and switches off Q1 The 5V supply to the RAM is now maintained by the battery BT1 HP IB General Purpose The IC 030 interfaces between the microprocessor and the Interface Adapter HP IB as shown in Figure 10 7 4 The IC pin configuration is given in Figure 10 7 2 Microprocessor Interface Signals 00 07 Eight bi directional tri state data lines allowing data transfer between the microprocessor and the GPIA CS A negative edge selects the GPIA enabling the microprocessor to communicate with the GPIA R W The READ WRITE input controls GPIA register access and the direction of data transfer on the data pins It is connected to the microprocessor READ WRITE output 10 7 2 Servicing the Microprocessor and Fron
182. ct labelling on the ROM ICs No change action is required however do not order replacement ICs as detailed in the first table below Use the correct numbers given in the second table In Appendix A Table A 5 Faulty labels to disregard Reference Description HP Part A3 08116 66523 U5 ROM 08112 10001 U6 ROM 08112 10002 U7 ROM 08112 10003 U8 ROM 08112 10004 09 ROM 08112 10005 Backdating B 5 In Appendix A Table A 5 Correct Part Numbers Reference Description HP Part 08116 66523 05 08112 13701 08112 13702 08112 13703 08112 13704 08112 13705 Main Board In Appendix A Table A 3 delete Reference Description HP Part 1 08112 66501 513 DIODE CR514 DIODE Change 8 extra test point and an isolator link were added to the microprocessor board to improve test facility For instruments with serial numbers 2136G00405 and lower make the following changes to the appropriate parts list Microprocessor Board Appendix A Table A 5 delete Reference Description HP Part A3 08116 66523 TP8 Test point 0360 0535 W2 Wire jumper 8159 0005 A Change 9 Two bus termination resistor networks were changed to reduce crosstalk For instruments with serial number 2136G00579 and lower make the following changes to the appropriate parts list Microprocessor Board Appendix A Table 5
183. d connector side of R501 against Table 10 4 6 Table 10 4 6 Offset vernier Control voltages HP 81124 Setting Control voltage HIL LOL at R501 typ 48 0 7 9V Output Amplifier Caution Do not operate the HP 8112A without the heatsinks fitted on board A1 m If you need to replace one or more of the transistors Q505 Q513 do not attempt to remove the heatsink and transistor adaptors together this is likely to damage the transistors Remove all the screws securing the heatsink s Remove the heatsink s Remove the adaptor s from the transistor s to be replaced Replace the transistor s Re fit the adaptor s and heatsink s 1 Set up the HP 8112 as follows RCL 0 LOL 1V Output Disabled 2 Press the key 3 Measure the voltage at CR501 and CR502 typ 10 mV If it is fully negative approximately 15 V check U502 Q502 Q504 and Q506 If it is fully positive approximately 15 V check Q501 Q503 Q505 and U502 4 Check if Q510 Q511 or Q512 Q513 have failed emitter collector short circuit If you need to change any of the output stage transistors Q508 Q513 also check CR505 and CR506 They protect the output stage at high amplitudes and frequencies by discharging the base emitter capacitor of Q510 0513 5 Set the HP 8112A to FIXED mode output ENABLED 10 4 14 Servicing the Shaper and Output Amplifier 6 Observe the main output using an oscilloscope and
184. date the Status Byte GOSUB Print errors DISP Pausing press Continue to continue PAUSE CLEAR SCREEN PRINT Now Width is set to 500 us This removes the cause for the errors PRINT OUTPUT 712 WID5OOUS WAIT 1 HP8112A needs time to execute a command and update the Status Byte GOSUB Print errors PRINT PRINT End of the program ERROR DEMO LOCAL 712 STOP 440 Print errors prints the errors set in the Status Byte and uses the IERR 450 460 470 480 490 500 command to get more detailed descriptions of the errors WAIT 2 not necessary A SPOLL 712 read the status byte PRINT Value of the Status Byte 7 14 Programming Examples 510 520 530 540 550 560 570 580 590 600 610 620 630 640 650 660 670 680 690 TOO T10 T20 T30 740 750 760 770 780 790 800 810 820 830 840 850 860 870 880 890 900 910 20 PRINT WAIT 2 PRINT The following bits are set in the Status Byte PRINT WAIT 2 IF A 0 THEN PRINT No bit is set IF BIT A 7 THEN PRINT Bit 7 Buffer Not Empty IF BIT A 6 THEN PRINT Bit 6 gt Service Request IF BIT A 5 THEN PRINT Bit 5 gt Input Error IF BIT A 4 THEN PRINT Bit 4 gt Duty Cycle Error IF BIT A 3 THEN PRINT Bit 3 gt Slope Error IF BIT A 2 THEN PRINT Bit 2 gt Syntax Error IF BIT A 1 THEN
185. ded into three stages Input The signal from the shaper IC current mirror is applied to the inverting input where it is amplified by Q501 and Q502 common base amplifiers CR501 and CR502 provide the required bias voltages The offset signal is applied to the non inverting input at the junction of CR501 CR502 to ensure a constant reference point Servicing the Shaper and Output Amplifier 10 4 5 Trigger Output Amplifier Level Check Circuit Voltage gain The signals from the input stage generated across R524 and R527 are applied to the bases of Q503 and Q504 These transistors operate as emitter followers for Q505 and Q506 which provide the actual voltage gain Output The output stage consists of the emitter follower pairs Q510 Q512 and Q511 Q513 These decouple the voltage gain stage from the low output impedance The input to the trigger amplifier derived from the period generator See Chapter 10 3 is passed via a schmidt trigger input Q280 and Q281 to the output stage With a logic high on the input Q282 is switched on and in turn switches Q283 off to produce a low 0 V output When the circuit input goes low Q282 is switched off allowing Q283 to switch on and provide an output voltage of 2 4 V into 50 Q or 4 8 V into a high impedance Due to the inverting action of the trigger amplifier the inverted trigger input pulse is output as a positive going pulse synchronized to the output of the period generator I
186. dr 712 5 of the HP 81124 CLEAR Adr Initialize interface set HP 81124 to standard setting and remote mode CLEAR SCREEN A SPOLL Adr Clear the status byte OUTPUT Adr M2 T1 W2 PER 10 US DEL 8085 2 5 US Select trigger mode with triggering on 4 positive slope linear transition output and change period delay and width REPEAT polling the HP 81124 status byte A SPOLL 712 until Buffer Not Empty flag returns to UNTIL BIT A 7 0 zero indicating the command message has i been implemented LOCAL Adr Return HP 8112 to local mode END Programming Examples 7 7 Common Task Examples These are more comprehensive program listings which provide further examples of multiple commands involving program loops and sub routines _ Program DEL_WID 10 20 30 40 50 60 70 80 90 100 110 120 130 140 150 160 170 180 Purpose Comments Note y This program shows how to program and change some of the HP 8112A parameters periodically In this example every 2 second Delay will be incremented by 1 ms while Width is decremented by 2 ms The interface is initialized and the HP 8112A is set to the standard settings see Chapter Lines 100 to 120 setup period delay width high level and low level and line 130 enables the output The test signal is now output from the HP 8112A In the Width and delay loo
187. ds and Technology to the extent allowed by the Institute s calibration facility and to the calibration facilities of other International Standards Organization members This Hewlett Packard instrument product is warranted against defects in material and workmanship for a period of one year from date of shipment During the warranty period HP will at its option either repair or replace products which prove to be defective For warranty service or repair this product must be returned to a service facility designated by HP The Buyer shall prepay shipping charges to HP and HP shall pay shipping charges to return the product to the Buyer However the Buyer shall pay all shipping charges duties and taxes for products returned to HP from another country HP warrants that its software and firmware designated by HP for use with an instrument will execute its programming instructions when properly installed on that instrument HP does not warrant that the operation of the instrument software or firmware will be uninterrupted or error free The foregoing warranty shall not apply to defects resulting from improper or inadequate maintenance by the Buyer Buyer supplied software or interfacing unauthorized modification or misuse operation outside of the environmental specifications for the product or improper site preparation or maintenance No other warranty is expressed or implied HP specifically disclaims the implied warranties of M
188. ds up program execution Programming 6 9 Reading parameters HP 81124 provides special commands with which information can be read by the computer These commands are called Talker Function Commands After Sending a Talker Function Command the HP 81124 will return a response message response message remains in the HP 8112A output queue until it is read or another command is issued For example to read the current value of the Period the following commands are necessary OUTPUT 712 ENTER PRINT 81124 PER A Note After the Interrogate Parameter commands IPER IDEL IDBL etc the HP 8112 does not return only the numeric values instead it returns an ASCII response that contains the command to set the interrogated parameter to its present value If the current period is set to 1 ms the variable A will contain the string 1 00 MS after conducting the example above It is possible to read the current setting of a parameter using the interrogation mnemonics listed here Standard IPER IDEL m IDBL IDTY IWID ITRE m ILOL m IBUR The HP 81124 reply has the same format as that used when setting the parameter for example PER 10MS The reply length is always 12 characters It is also possible to read all the instrument settings in one go using the CST mnemonic Refer to Reading the Current Settings Example DIM B 12 Dimensi
189. duced a component value change to provide increased slope adjustment range For instruments with serial number 2739G07230 and lower make the following changes to the appropriate parts lists Main Board In Appendix A Table A 3 modify Reference Description HP Part Al 08112 66511 Q282 Q283 XSTR 1853 0218 1 This change duplicates change 55 Control Board In Appendix A Table A 4 modify Note Reference Description HP Part A2 08112 66502 R37 R38 Resistor 200 0 2100 3212 _________ _ Change 47 Changed component value to provide greater adjustment range and eliminate select on test value For instruments with serial number 2739G07280 and lower make the following changes to the appropriate parts list Main Board In Appendix A Table A 3 modify Reference Description HP Part Al 08112 66511 R317 Resistor 2 15 k 0698 0084 R318 Resistor 500 Q 2100 0554 Backdating B 31 Change 48 Standardisation of case colors Note Old case parts as detailed below can only be obtained as long as stocks last at the Hewlett Packard manufacturing plant For instruments with serial number 22739G07380 and lower 1 Make the following changes to the appropriate parts lists Instrument In In Appendix A Table A 2 modify Reference Description HP Part 0 08112 FRAME FRONT 5021 5813 8 FRAME REAR 5021 0512 7 COVER BOTTOM 5001 1
190. e offset Possible failures as E21 These tests check pulse generation using the level check circuits E31 When software triggered low a fixed mode negative pulse is not detected Possible failure in signal transfer between m Period generator U200 Delay generator U220 m Width generator U240 Slope generator U301 m Shaper IC U401 and output pre attenuator and amplifier Refer to Chapters 10 5 10 3 and 10 4 E32 When software triggered low a fixed mode positive pulse is not detected Possible failures as in E31 E33 When software triggered high a fixed mode negative pulse is not detected Possible failures as in E31 E34 When software triggered low a linear mode negative pulse is not detected Possible failures as in E31 These tests check the accuracy of the output pulse rise and fall times in normal output mode E35 When software triggered high rise time of 1 ms Range 6 out of limits Possible faults in leading edge slope control circuit U12 U14 or U302 See Chapter 10 5 Instrument Overview and Troubleshooting Guide 10 1 7 pus cao OK STOP m STOP YES DAC NO STOP 19 5 YES AMPLITUDE TESTS ui STOP YES STOP rri C ru YES BURST TESTS BURST No STARTS DE YES BURST C 3 STOLE c REFRESH DRTR dk END 10 1 8
191. ear frame 1 Turn off the instrument and disconnect the power cord 2 Disconnect and remove the microprocessor board A3 and the control board A2 Note which cables connect to which connectors pins in order to make re assembly simple 3 Remove the bottom cover from the instrument Remove the heatsink located in front of the fan by unscrewing the two screws 4 Remove the two screws B holding the rear frame to the brackets 5 Remove the four screws C holding the rear frame to the side frames 6 Remove the rear frame by pulling it gently backwards If necessary the fan can be removed by unscrewing screws D Similarly the transformer can be removed by unscrewing screws E B 42 Backdating 8 In Chapter 10 2 make the following change to the schematic diagram for the Main Board A1 Figure 10 2 2 as follows Delete the capacitor C1 0 047 from the outputs of the line filter 9 In Chapter 10 7 replace the component location diagram for the Microprocessor Board Figure 10 7 8 with the following ED 4 16 NORD U36 933 3 1 FE m run r eve e 979 cm e RIS 816 16 20 80 d 25 16 28 1 E 21 1e R3 meson Figure B 13 Microprocessor Board A3 Component Layout and Locator 10 In Appendix A delete Figure 1 and Figure 2 and add the
192. ed The Status Byte is updated after every command received by the HP 8112 The HP 81124 status byte can be read using a serial poll A SPOLL 712 Read instrument status byte into variable A PRINT 81124 Status Byte A The meaning of each bit in the status byte is given below In all cases the bit is set to 1 to indicate that the condition described is true Programming 6 13 Limit Error Bit 0 Note d 6 14 Programming Bit Meaning 0 ERROR Causes SRQ BUFFER NOT EMPTY The SRQ bit generates an interrupt at the system controller to indicate that the instrument requires attention You can use this facility as the basis of interrupt driven error handling in your programming application The SRQ Programming Error Syntax Error and System Error bits are latched until the status byte is polled by the system controller The other status bits represent the current condition at the time the status byte is read You can obtain more detailed information about timing and programming errors using the interrogate error IERR mnemonic The HP 8112 responds with a string describing the current error conditions The descriptions are covered in subsequent parts of this section DIM E 45 Allocate memory for error string OUTPUT 712 IERR Request error information ENTER 712 E Read reply into allocated string PRINT 8112 Error E There are two types of error which set the limit error bit in the statu
193. emonic A3W4 Description Area U100 1 U100 2 U100 3 U100 4 U500 11 Sub coded address Sub coded address Sub coded address Enable address decoder Data load signal for U500 see chapter 10 4 Error feedback gate signal 9H1P U142 1 7 Check the signature of address decoder outputs against those given in Table 10 3 7 Table 10 3 7 Address Decoder Signatures 10100 Mnemonic Description Free run Area SRC Slope range decoder load signal 273U U300 11 10 PIC Period input store select U859 U200 10 11 CLR Error feedback reset P54U U142 12 12 MAMO decoder data load signal BPHH U101 11 13 WIC Width input store select 10 U240 10 14 DIC Delay input store select 3813 U220 10 Control Mode Selection Check the control mode selection signals from control latch U101 against Table 10 3 8 and Table 10 3 9 Table 10 3 8 Mode Decoder check table Mode Ext Input Slope Switch U101 pin 12 Relay Servicing the Timing and 10 3 15 Slope Generators Table 10 3 9 U101 Mode Decoder truth table CTRL Mode U101 9 U101 6 U101 5 U101 16 Mnemonic 0503 1 The level check output LCO on pin U101 16 is LOW in normal mode and HIGH during self test Period Generator check operation of the Ext Input Circuit 1 Set up the HP 81124 as follows Mode Trig Trig Slope f Trig Level Pot Mid range 2 Apply a symetrical signa
194. en clocked by the burst clock signal from the main board The burst clock signal is enabled by the burst on signal which is withdrawn when the counter reaches 1 See Blocking Flip flop Blocking Flip flop blocking flip flop U109A performs two functions m Period Generator control m Counter resetting Period Generator Control When counters U111 and U112 have both cleared the TC output from them pin 12 gated by U110 sets the flip flop U109A The output disables counter U111 and the Q output enables the wired or Burst On circuit via U107B In this configuration the BURST ON signal is active low only when all the the counter inputs are low signifying the burst is complete Counter reset For the counter to be re enabled the logic signal LBC from the address decoder U16 must be set true low This resets the blocking flip flop re loads the burst counter and sets the counter enable input CE low The burst circuitry is then in a stand by state awaiting the next period generator pulse train Once started count down continues until the counter flip flops U105 and U106A reach 1 and the burst on signal is withdrawn stopping the burst clock signal 10 6 2 Servicing the Burst Control Circuit 4 SERVICE P O A1 MAIN BD 5 4 om 5 2v 4 1 5 AUTO LOAD FF 20 MODEL HP8112A FIGURE 10 6 2 BURST CONTROL BD A2 SCHEMATIC 1 SERVICING THE BURST CONTROL CIRC
195. ence Description Part 1 08112 66501 C246 0 047 0160 0575 Change 28 Control Board Change 29 Main Board Made R53 value selectable during manufacture and thus added an alternative value to the parts list For instruments with serial number 2522G03055 and lower make the following changes to the appropriate parts lists In Appendix A Table A 4 delete Description Part Resistor 4 42 k 0698 4442 Reference R53 A2 08112 66502 Component value change improved LOL variation about HIL For instruments with serial number 2522G03230 and lower make the following changes to the appropriate parts list In Appendix A Table A 3 modify Reference Description HP Part Al 08112 66501 R507 Resistor 178 k 0698 3243 Backdating B 17 Change 30 Note y Change 31 Main Board For instruments with serial number 2522G03269 and lower Introduced a new main board with changed board layout This was caused by substitution for relay type that was no longer available Board A1 08112 66501 rev E changed to rev F Newer board type can be recognized by fuses F1 and F2 which are mounted in clips Alternative component value selection improved linearity of Period Delay and Width adjustment For instruments with serial number 2522G03480 and lower make the following changes to the appropriate parts lists In Appendix A Table A 3 del
196. er HP 5335A Variable DC Source HP 6237B or HP 33244 Cable Assembly BNC 7 off m Attenuator 20 dB 2 W 2 x m BNC to Banana plug adaptor m BNC TEE piece 8 24 Testing Performance Test Setup HP 3324 Oscilloscope HP 54121T HP 8112A 20 dB angie Attenuator 9 Procedure Figure 8 16 Delay Control Verification Test 1 2 Connect the equipment as shown the setup figure Set up the HP 81124 as follows Trigger Mode NORM Control Mode DELC Transition Fixed PER 200 ns DEL 100 ns WID 50 ns HIL 2 00 V LOL 0 00 V Vary the power supply or HP 3324 between approx 1 volt and 10 volts and verify that oscilloscope display indicates delay time of between 75 ns and 170 ns as shown below N CHER N TRIG OUTPUT gt CTRL INPUT E m i OUTPUT i i i A NOO i w p Figure 8 17 Correct Delay Control Connect the HP 8112A output to the counter Change HP 81124 as follows PER 999 ns WID 300 ms Set the counter as follows TIME gt Slopes A and B Transition Positive Trigger levels 1 0 V Gate Mode No delay Testing Performance 8 25 Vary the power supply between approx 1 volt and 10 volts and verify that for the following HP 81124 settings the range of times displayed agrees with those specified HP 8112A Counter setting reading DEL High 100 ns 170 ns
197. er than 5 V or electrostatic discharge to the output connector Operating 4 17 Rear Panel WARNING NO OPERATOR SERMCEABLE PARTS INSIDE REFER SERVICING TO TRAINED PERSONNEL FUSE 100 t20v 15A 220 240 750mA 10v 00 1220 120 1000000000066 O x MARKER Ey X OUT OUTPUT HOLD IN Q HEWLETT PACKARD GMBH 8112A 5 FTZ SERIENPRUFNR 318 86 LI IT m a WARNING FOR CONTINUED FIRE PROTECTION USE SPECIFIED x LINE FUSE Figure 4 12 Rear panel HP IB Connector Refer to Figure 3 3 for a definition of the HP IB connector pins Refer to Setting the HP IB Address in Chapter 6 if you want to know how to set the instrument s HP IB address X Out Not used with HP 81124 Marker Output Not used with HP 81124 Hold In Not used with 8112A Fuse The fuseholder accepts standard fuses to provide instrument protection in case of current overload Refer to Table 3 1 for appropriate fuse selection 4 18 Operating 5 Operating Examples Introduction To obtain an output from the HP 8112 it is only necessary to set the mode period and transition type Then press the green key stable error free pulse train is generated and you can then alter parameter values and external input and control modes to derive your desired output m 0 2 2 Triggering Examples Normal Mode The following
198. erchantability and Fitness for a Particular Purpose Exclusive Remedies Assistance The remedies provided herein are the Buyer s sole and exclusive remedies HP shall not be liable for any direct indirect special incidental or consequential damages whether based on contract tort or any other legal theory Product maintenance agreements and other customer assistance agreements are available for Hewlett Packard products For any assistance contact your nearest Hewlett Packard Sales and Service Office Addresses are provided at the back of this manual Contents 1 Introduction 25 eet dot us ATA d estan Instruments Covered by This Manual Instrument Description 8112A Options Accessories Specifications Introduction Timing Parameters Common Specifications Period PER Delay DEL after Trigger Out Double Pulse DBL interval between leading edges Pulse Width WID Duty Cyde DTY Linear Transitions between 1076 and 9076 amplitude Output High Level Low Level LOL Operating Characteristics Trigger Modes Normal 225 20092 0 de DS Trigger y eu Dsum REDE
199. erformed by the subroutine Print errors Important program lines 750 OUTPUT 712 IERR Interrogate error and their function 760 ENTER 712 A Read the response and store it Comments After an interrogate error command IERR the HP8112A returns a more detailed description of errors The different error descriptions are separated by commas If no error is active then the string NO ERROR is returned Note The WAIT 2 statements in the program are only used to emphasize the functions of the program Programming Examples 7 13 90 100 110 120 130 140 150 160 170 180 190 200 210 220 230 240 250 260 270 280 290 300 310 320 330 340 350 360 370 380 390 400 410 420 430 Name of this program ERROR DEMO This program demonstrates how to determine which error bit s are set in the HP8112A s Status Byte Also it is shown how to get a more detailed description of an error with the Interrogate Error IERR command Both functions are performed in the subroutine Print errors CLEAR SCREEN CLEAR 712 intialize interface and 8112 A SPOLL 712 clear status byte PRINT Now Period is 1 ms Width is set to 10 ms PRINT This causes width and slope error Width Period PRINT 3 P OUTPUT 712 WID10MS set width to 10 ms causes width error WAIT 1 8112 needs time to execute a command and up
200. eriod value i e PER 1 ms DEL 1 1 ms m The front panel LEDs flash to indicate the invalid settings m The ERROR LED is on WIDTH ERROR m Width value is greater than Period value ie PER 1 ms WID 1 1 ms m The front panel LEDs flash to indicate the invalid settings m The ERROR LED is on This error occurs when the HP 8112A cannot understand programming message eg DDY 50 instead of DTY 50 The bit is latched until cleared by reading the status byte This error is caused by excessive slope The conditions which caused it and the description used by the HP 8112A when replying to an IERR command are listed below The slope error bit is not latched therefore a transient error is only recorded by generating an SRQ More than one error condition can occur at one time When using the IERR command ensure that you allow for a reply containing more than one error description IERR Description Comments EXCESSIVE SLOPE Programming 6 15 Note y Duty Cycle Error Bit 4 Note 6 16 Programming No valid waveform at the output LEE gt WIDx0 8 PERxDTY 100 x0 8 b TRE gt PER WID x0 8 or PER PERxDTY 100 x0 8 c TRE gt DBL WID x0 8 or DBL PERxDTY 200 x0 8 d TRE gt PER DBL WID x0 8 PER DBL PERxDTY 200 x0 8 m No calculation with SR1 The EXCESSIVE SLOPE error message and calculation can be suppressed with the 5 0 command This will reduce programming time Example OUTPU
201. es Address decoder enable outputs IC Digital Control Signals Timing IC Time frequency Range Selection Timing IC mode selection Reference current input levels Address Decoder Signatures Address Decoder Signatures Mode Decoder check table P 0101 Mode Decoder truth table Period Generator Operation Period Generator Signal Levels Delay Generator Operation Delay Generator Signal Levels Width Generator Operation iva Width Generator Signal Levels Range Decoder Truth Table Shaper IC Output Modes Pre attenuator ranges Waveform Control truth table Amplitude vernier Control voltages Attenuator Control truth table Offset vernier Control voltages A2 Address Decoder Signatures Timing range decoder Typical Period Control DAC Output Typical Delay Control DAC Output Typical Width Control DAC Output Typical Slope LEE Control DAC Output Typical Slope TRE Control DAC Output Amplitude Gain Control truth table Offset DAC Output Voltages Output Address Decoder Si
202. es 4 9 4 7 Transition Controls 4 10 4 8 LEE and 4 11 4 9 Ranging examples 4 12 4 10 Parameter controls 4 13 4 11 Output controls 4 16 4 12 Rear panel 0 4 18 5 1 Typical output Normal mode 5 1 5 2 Typical signals in Trigger mode 5 2 5 3 Typical signals in Gate mode 5 3 5 4 Typical signals in External Width mode 5 4 5 5 Typical signals in External Burst mode 5 5 5 6 Capacitance circuit 5 6 8 1 Period Performance Test 8 3 8 2 Delay Performance Test 8 5 8 3 Double Pulse Performance Test 8 6 8 4 Double Pulse Performance Test 8 7 8 5 Pulse Width Performance Test 8 9 8 6 Pulse Width Performance Test 8 9 8 7 Duty Cycle Performance Test 8 11 8 8 Output Levels Performance Test 8 12 8 9 Transition Times Performance Test 8 14 8 10 Pulse Performance 8 16 8 11 Pulse Performance Characteristics 8 18 8 12 Trigger Gate E WID amp E BUR Verification Test 8 19 8 13 Output Mode Verification Test 8 21 8 14 Output Mode Verification Test 8 22 8 15 Period Control Verification Test
203. es Ordering and shipment are via the HP Parts Center in Mountain View California m There is no maximum or minimum order value m small handling charge means that all transportation is pre paid m Payment must accompany the order therefore there is no invoice processing The mail order forms required to use this system are available from your local Hewlett Packard office Replaceable Parts 1 Figure A 1 Mechanical Parts 1 A 2 Replaceable Parts MP420X4 MPA10X4 ZETEC 5 X4 So MP1 MPS 2 MP1 MP MP2 MP4 itm MP11 14 16 19 MP21 18 MPIS 2 MPe3 MP22 Figure A 2 Mechanical Parts 2 Replaceable Parts 3 Table 1 HP 8112A Parts Manufacturers UNITRODE CORP O HARA METAL PRODUCTS CO UNITED CHEMI CON INC ROHM CORP COLORADO SCREW MACHINE HOLSWORTHY ELECTRONICS LTD ELCO INDUSTRIES INC GETTIG ENGRG MFG CO INC AMP INC GOE ENGINEERING CO INC STETTNER amp CO HP DIV 01 SAN JOSE COMPONENTS ALLEN BRADLEY CO INC TEXAS INSTRUMENTS INC RCL ELECTRONICS INC HP DIV 02 SCD IC S AVX CORP MOTOROLA INC HP DIV 05 MSD LYN TRON INC EG amp G INC CHAMPLAIN CABLE CORP DIV HERCULES PRECISION MONOLITHICS INC CORNELL DUBILIER SANGAMO BURNDY CORP THOMPSON BREMER DIV VARE ANILLO I
204. es Integrated circuit parameter settings maximum clock speed D noise sensitivity and threshold level verification set up time hold time propagation delay minimum clock pulse width Linear variable transition mode Reduced relations and crosstalk Driving CMOS devices m Parametric tests with manufacturer recommended transition times Cosine shaped transition mode m Simulation of degraded pulses for example after storage on a magnetic medium Operating Examples 5 7 Programming 6 General Setting the HP IB Address Note In remote mode all HP 8112A settings except EXT INPUT trigger level are programmable via HP IB The HP 81124 also provides error messages and can report operating parameters when requested by the controller This chapter describes the valid programming mnemonics and syntax for the HP 8112A Example program statements are based on HP BASIC 5 0 5 1 for the HP 9000 Series 200 300 controllers Example program statements also assume that the instrument HP IB address is 12 decimal This manual does not discuss the HP IB protocol or hardware For detailed information on the HP IB refer to any of the following publications IEEE Interface Standard 488 1975 ANSI Interface Standard 1 1 HP Publication 59401 90030 m HP Publication 5952 0058 m HP Publication 5952 0156 The HP 8112A s HP IB address is set at the factory to 12 decimal The address is stored in
205. es can be seen through the left hand side of the instrument cover towards the rear The line voltage selector is set at the factory to the most commonly used line voltage for the country of destination The instrument power fuse is located on the rear panel Q 100 V 120 V Q 220 V 240 V LINE VOLTAGE SELECTOR O 100 V 220 V 120 v 240 V O Figure 3 1 Line Voltage Selector Switches Caution Do not change the Line Voltage Selector switch settings with the instrument switched ON or with power connected via the rear panel To change the selected line voltage 1 Remove the power cord 2 Remove the instrument top cover by releasing the captive securing screw at the rear and sliding the cover off 3 Using a screwdriver move the switches to the required position for the voltage to be used 4 Replace the instrument top cover 5 Fit the correct power fuse for the selected operating voltage Table 3 1 Line Voltage and Fuse Selection HP Part Number 2110 0043 2110 0813 Fuse Type Line Voltage 100V 120V 15A 220 240 V 750 3 2 Installation Power Cable Warning To avoid the possibility of injury or death the following precautions must be followed before the instrument is switched on m instrument is to be energized via an auto transformer for voltage reduction ensure that the Common terminal is connected to the grounded pole of the power source
206. eshoot lt 10 of amplitude 10 mV Note The oscilloscope trace flatness error may affect the measurement of Overshoot Ringing lt 10 of amplitude 10 mV Settling time lt 105 ns 6 Change HP 8112A settings as follows Transition Linear LEE 6 5 ns TRE 6 5 ns 7 Examine the HP 8112A output on the scope display in order to verify that the pulse characteristics do not exceed the specified limits as identified in Figure 8 11 8 Record your results on a copy of the Test Record specified limits are given here and on the Test Record Note The oscilloscope trace flatness error may affect the measurement of pre and overshoot Characteristic Specification Preshoot lt 5 of amplitude 10 mV Overshoot Ringing lt 5 of amplitude 10 mV Settling time 107 ns Testing Performance 8 17 Pulse Width Settling time Amplitude accuracy band Overshoot Amplitude Pre shoot EE Figure 8 11 Pulse Performance Characteristics __________________ lt TTT Trigger Gate E Width and E Burst Verification Test Characteristics 8 18 Testing Performance Trigger Minimum 500 mV p p amplitude Minimum 10 ns pulse width Each active input generates one output pulse Gate m External signal enables Period Generator m First output pulse synchronous with external trigger m Last output pulse always completed External Width Restoration of external signal with selectable transition ti
207. etailed here For instruments with serial number 2343G02555 and lower This change introduced ferrite beads L514 and L515 on the base of Q400 and the collector of Q402 respectively The change is associated with change 18 and was found to ensure more stable performance when the dual transistor type was changed 0000000 Change 25 Instrument Microprocessor Board B 16 Backdating For instruments with serial number 2507G02630 and lower A new microprocessor board 08116 66533 was introduced which gave improved jitter and standard setting characteristics See change 41 for more information Make the following changes to the appropriate parts lists In Appendix A Table A 2 modify Reference Description HP Part A0 08112 A3 BD AY MICROPROCESSOR 08116 66523 In Appendix A Table A 5 delete Reference Description HP Part A3 08116 66533 W5 Resistor zero 8159 0005 Change 26 For instruments with serial number 2522G02655 and lower This change was a change in part number for fuse F1 caused by component obsolescence Change 27 Main Board Changed the value of C246 on the main board to suppress an intermittent and unwanted pulse in one of the width ranges For instruments with serial number 2522G03005 and lower make the following changes to the appropriate parts lists In Appendix A Table A 3 modify Refer
208. ete Reference Description HP Part 7 Al 08112 66501 C200 Capacitor 12 pF 0160 4521 Change 32 Main Board Microprocessor Board B 18 Backdating New heat sink introduced by metrication Components added to improve switch on reset conditions For instruments with serial number 2522G04130 and lower make the following changes to the appropriate parts list In Appendix A Table A 3 modify Reference Description Al 08112 66501 MP505 506 and 508 to 513 HT SINK SGL 1205 0329 For instruments with serial number 2522G04105 and lower make the following changes to the appropriate parts list In Appendix A Table A 5 delete Reference Description HP Part A3 08116 66533 CR5 8159 0005 Q2 R22 23 9 33 Board edge connectors were changed for improved type with ejector latches These provided more secure fastening for the ribbon cable ends into the board connectors Instruments with serial number 2522G04230 and lower will have older type of connector fitted 2 2 2 7 34 Instrument Note Main Board Control Board For instruments with serial number 2522G04280 and lower make the following changes to the appropriate parts lists Standardisation of rear frame assembly introduced new part number Old part in Appendix A Table A 2 was Reference Description up Part 0 08112 MP8
209. ets of mode and parameter selections The self prompting operation and HP IB programmability of the HP 8112 ensure that it is quick and easy to use in stand alone and automatic test applications Self test and fault diagnosis are performed each time the instrument is switched on Error recognition and prompt helps the operator to recover from incorrect front panel or programming operation Note Throughout this manual instrument keys are shown as Key in the text Key is the key name which appears above the key the instrument front panel HP 8112A Options Opt 910 Option 910 is an extra Operating and Service Manual Opt W30 Extended Repair Service for the instrument 1 2 Introduction Accessories Included The HP 81124 is supplied complete with the following Item HP Part Number 750 mA fuse for 220 240 V operation 2110 0813 1 5 fuse for 100 120 V operation 2110 0043 and Power cable See Chapter 3 Installation Available following accessories are available for the HP 8112A Item HP Part Number Carrying handle Bail Handle Kit HP 5062 4001 Rack mount kit single HP8112A HP 5062 3972 Rack mount kit Two instruments HP 5062 3974 Lock Link kit for use with HP 5062 3974 5062 3994 Introduction 1 3 Recommended Test The recommended test equipment and accessories required to Equipment 1 4 Introduction maintain the HP 81124 are listed in Table 1 1 Alter
210. for 0 1 seconds line230 The HP 8112A detects a syntax error and therefore sets the syntax error bit of the Status Byte As a result bit 6 of STB is set and a SRQ is generated The result of the SPOLL printed in line 160 will be value 68 After every SPOLL the complete status byte is cleared This means the RQS bit is reset after the first SPOLL The status byte is updated after every command received by the HP 8112A 10 20 30 40 50 60 70 80 90 100 110 120 130 140 150 160 170 180 190 200 210 220 230 240 250 260 270 280 290 300 310 Without the synchronization with the WAIT command line 230 the SPOLL would be conducted whilst XXX is being parsed At this moment there is neither a syntax error or SRQ active The resultant SPOLL would be 128 indicating that the HP 8112A command buffer is not empty See Chapter 6 Error fault and status reporting Name of this program SPOLL_2 This program demonstrates that the HP8112A s SRQ is cleared after SPOLL CLEAR SCREEN CLEAR 712 Initialize Inteface and HP8112A A SPOLL 712 clear status byte 1 A SPOLL 712 read the status byte with SPOLL PRINT SPOLL before the syntax error A PRINT PRINT XXX is output This will cause a syntax error OUTPUT 712 XXX Cause a syntax error WAIT 1 give HP8112A time to receive XXX and update the Status Byte 1 A SPOLL 712 PRINT 15 SPOLL after syntax error WAIT 1 A S
211. for each new DBL setting and at each change press the key once 12 Record your results on a copy of the Test Record specified limits are given here and on the Test Record HP 8112A Oscilloscope setting DBL WID Low Limit High Limit 20 ms 10 19 0 ms _ 21 0 800 ms 50 ms 760 0 ms 840 0 ms Range 10 ns to 950 ms Accuracy 5 of programmed value 2 ns Repeatability Factor 4 better than accuracy Equipment Test Setup 1 Test Setup 2 Procedure Max Jitter 0 2 of programmed value 100ps Counter HP 5335A m Cable Assembly BNC 2 x Digitizing Oscilloscope HP 54121T m Attenuator 20 dB 2 W 2 x m 50 2Feedthrough Termination Required if counter input impedance 50 0 Oscilloscope HP 5412 HP 8112A 1222 41 23 20 dB Attenuator with BNC SMA Adaptor Figure 8 5 Pulse Width Performance Test Counter 53354 HP 8112A aa TITRE 22 Figure 8 6 Pulse Width Performance Test 1 Set up the HP 81124 as follows Input Mode NORM Control Mode Off Transition Fixed DEL 65 ns HIL 1 00 V LOL 1 00 V 2 Connect the HP 8112 and oscilloscope as shown in Figure 8 5 3 Verify that for the following HP8112A WID settings the scope display indicates that the HP 8112A output is within the specified limits 4 Record your results on a copy of the Test Record specified limits are given here and on the Test Record
212. g self test Using the Buffer Not Empty Flag Common Task Examples Program DEL WID Purposes sx se m Program SPOLL 2 Purpose 5 mo Important program lines Comments Initialization section Main section INTR 2 Purpose pa RA AES Comments Subroutine section The subroutine ERROR DEMO Important program lines and their function LRN DEMO P rpese vec gue Comments ssi udo 6 15 8226 6 15 6 15 6 16 6 16 6 17 6 17 6 17 E 6 18 s 6 18 s 6 18 6 18 6 19 6 19 6 19 sat 6 20 6 20 3 6 21 7 1 n 7 1 E 7 1 ws 7 2 1 4 7 6 7 8 eer 7 8 8 5 7 8 7 8 7 10 7 10 7 10 7 10 7 10 7 10 E 7 12 7 12 T 7 12 T 1 12 ob 7 12 59 7 12 7 12 7 13 2 2 7 13 7 13 Ld 7 13 oly 7 16 42 7 16 524 1 16 5385 1 16 Contents 5 8 Contents 6 Learn String ADAE Mode INTERROG DONUM Purpose Comments
213. gain O tp t A SEE Trigger Output Amplifier Level Check Circuit Troubleshooting Shaper IC Inputs Transition Mode and Output Control Signals Shaper IC Amplitude vernier Control voltage Shaper IC Reference Current Shaper IC Current mirror Pre Attenuator and Output Attenuator Control Signals RO 38 24 Offset vernier Control voltage Output Amplifier 10 5 10 6 10 7 Servicing the Control Board Theory of Operation Introduction TIMET a Be he ti Address Decoders d e Timing Range Decoder DAC Reference Circuit Digital to Analog Converters Normal operation Reciprocal operation Byte offset latches and Offset DAC Byte Latching Offset DAC Parameter Control Troubleshooting dos ek ee elec Address Decoders Timing Ranges Period Control Delay Control Width Control Slope Control Amplitude Control Offset Control 2 5
214. ge See transition modes operating section 2 Should values of LEE and TRE be selected that overlay in an overlap region the microprocessor selects the nearer range Example If LEE and TRE are changed from 100 ns to 750ns Range 2 will be selected and if they are changed fr m 100 us to 750 ns Range 3 will be selected 10 3 22 Servicing the Timing and Slope Generators 10 4 Servicing the Shaper and Output Amplifier Theory of Operation Introduction Bus Latch Shaper IC The shaper and output amplifier circuits are located on the main board 1 and are divided into the following parts Latch m Shaper IC Current Mirror m Pre Attenuator m Signal Output Amplifier m Output Attenuator m Trigger Output Amplifier m Level Check Circuit These circuits are the last in the signal path An eight line decoder U500 latches data from the data bus when enabled by 52 sent by the microprocessor and outputs the data to the shaper IC where it is used to control pulse shaping correction and to select output mode and complement The data is also applied to the pre attenuator where it controls the attenuation and output disable functions via relays K500 to K504 The shaper 0401 shown in Figure 10 4 1 is a high performance signal control circuit which depending on the state of its mode inputs pins 22 and 23 produces outputs as shown in Table 10 4 1 Servicing the Shaper and Output A
215. gnatures 10 6 25 Wr RI hue p ree 10 6 6 10 7 1 Display Driver Control Signals 10 7 5 10 7 2 Signature Analyzer Probe connections 10 7 15 10 7 3 Signatures for Address Drivers and Decoders 10 7 16 10 7 4 Signature Analyzer Probe connections for ROM Test 10 7 16 10 7 5 040 signatures 10 7 17 10 7 6 Keyboard signatures 10 7 18 1 HP 8112A Parts Manufacturers 4 2 Standard HP 8112A Master Parts List A 6 A 3 Main Board Parts List uota A 8 A 4 Control Board Parts List A 26 5 Microprocessor Board Parts List m 33 6 Keyboard Parts List 37 7 Display Board Parts List A 40 1 Backdating Changes B 2 Bees e S eus qe sinus Be ee B 10 B 3 Address bus Signature Analysis Wg B 27 B 4 Main Decoder Signature Analysis B 27 B 5 Sub Decoder Signature Analysis eee B 28 B 6 ROM signatures B 29 Contents 17 Introduction General Instruments Covered by This Manual This manual describes the following procedures for the HP 8112A 50 MHz Programmable Pulse Generator m Installation Operating m Programming m Testing Performance m Adjustment m Servicing A Microfiche version of this manual is available on 4x6 inch micr
216. gram 10 3 3 10 3 2 Example of signal generation 10 3 5 10 3 3 Slope IC block diagram 10 3 7 10 3 4 Main Board Al Schematic3 10 3 9 10 3 5 Main Board 1 Schematic 4 10 3 11 10 3 6 Main Board A1 Schematic5 10 3 13 10 3 7 Address decoder Simplified block diagram 10 3 14 10 3 8 Period Generator Input 10 3 16 10 3 9 Period Generator ramp signal pin 20 10 3 17 10 3 10 Period Generator output signals 10 3 17 10 3 11 Delay Generator I P O P waveforms 10 3 18 10 3 12 Delay Generator ramp signal pin 20 10 3 18 10 3 13 Width Generator Input 10 3 19 10 3 14 Width Generator ramp signal 10 3 20 10 3 15 Width Generator output 10 3 20 10 3 16 Slope Generator Input and Output signals 10 3 21 10 4 1 Shaper Block Diagram 10 4 2 10 4 2 Current Mirror 10 4 4 10 4 3 Simplified Output Amplifier circuit 10 4 5 10 4 4 Main Board A1 Schematic 6 10 4 7 10 4 5 Main Board 1 Schematic 7 10 4 9 10 4 6 Shaper IC Input Signals on Pins 18 19 10 4 11 10 4 7 Shaper IC Output Pin12 10 4 11 10 4 8 Shaper IC Output FIXED 10 4 12 10 4 9 Shaper IC Output LINEAR 10 4 12 10 4 10 Shaper IC Output FIXED HI
217. have settled If an error code is shown in the display it is necessary to press a key e g LCL to set the microprocessor to normal then commence troubleshooting Refer to Figure 10 5 3 Local address decoding is performed by U1 and 1 16 Both decoders share LA5 from the microprocessor board as address inputs WS5 enables decoder and WS4 enables decoder U16 The decoder outputs enable the various devices on the latched data bus 100 107 Servicing the Control Board 10 5 1 Timing Range Decoder DAC Reference Circuit 10 5 2 Digital to Analog Converters The timing range decoder 1 2 controlled by RCT from 1 1 latches data from the data bus which is then used to select the timing ranges required by the period delay width and transition time control Sources Refer to Figure 10 5 4 The references are used by DACs Op amps U10A and U10B with associated components provide constant current sources of 9 V and 1 V derived from the 15 V and 5 V supplies Normal operation Figure 10 5 1 Principle of DAC Operation The amplitude control DAC U23 operates on the principle summarised in Figure 10 5 1 The current comes from a reference voltage and is repeatedly divided by two at each branch of the resistance network This process provides a series of binary current fractions which are switched to ground or the summing point X Each switch is operated by the data bit which has t
218. he HP 8116A sub panel which has better RFI characteristics No backdating action for earlier instruments is required 000 5 Change 41 New microprocessor board A3 08112 66534 was introduced with one 32k EPROM replacing old ROMs Changes to circuit diagrams and trouble shooting signature analysis table s were involved in this change Details of appropriate parts drawings etc for older style microprocessor boards are given here For instruments with serial number 2633G05780 and lower 1 Make the following changes to the appropriate parts lists and trouble shooting information i Instrument In Appendix A Table A 3 and Table A 5 modify Reference Description HP Part 0 08112 AY MICROPRCR 08112 66533 Microprocessor Board Appendix A Table A 5 modify Reference Description HP Part A3 08116 66533 NI CAD 1420 0251 U10 RAM 1 1818 1768 In Appendix A Table A 5 delete Reference Description HP Part 08116 66533 CR6 B 22 Backdating In Appendix A Table A 5 add Description 1 CER XSTR NPN 2N3904 RES 200 Q 125 W RES 100K 125 W RES 1K 125 W THMS 1K DIS ROM 6 ROM 5 ROM 4 ROM 3 ROM 2 XSTR QUAD PNP RES ZERO OHMS RAM SOCKET 24 PIN TEST POINT Reference A3 08116 66533 HP Part 0160 5746 1854 1028 0757 0407 0757 0465 0757 0280 0837 0050 08112 13721 08112 13722 08112 13723 08112 13724 0
219. he bottom of the center vernier key and the instrument settings will be altered to those of the stored file which has been selected RCL 0 reverts the instrument to it s standard setting see Chapter 2 If no settings have been stored the instrument will revert to standard settings whichever file number is selected for recall Operating 4 15 Selecting Output Mode h 8112A PULSE GENERATOR 50MHz Jj HEWLETT PACKARD Figure 4 11 Output controls Limited Output Pressing the key sets the current high and low output levels HIL LOL as output limits which cannot be exceeded until limited output mode is switched off While limited output mode is active the high and low output levels HIL LOL can be varied within the output limits Limited output mode is switched off by pressing the key again The key LED is lit when this mode is active Caution Limit does not work when using HILC mode the LIMIT key will flash if HILC is selected to remind you that it is no longer active Complement Output Pressing the key complements the instrument output COMPL pressing the key again returns the instrument output to normal The key LED is lit when the output is complemented Disabled Output Pressing the key disables the instrument output pressing the key again enables the output The key LED is lit when the output is disabled 4 16 Operating Caution Do not apply an external voltage great
220. he same significance as the current it controls A Most Significant Bit The total current summed at X therefore represents the data value as a fraction of Iin For example in Figure 10 5 1 with all three switches on all three data bits on Tin Tin Tin 7 Ix glin Servicing the Control Board Byte offset latches and Offset DAC Note Reciprocal operation eR 4 2R 2R LJ 4 2 5 R N o TT va R ev Figure 10 5 2 DAC Reciprocal operation The remaining DACs operate in a similar manner to the amplitude control but are set up to produce an output which is the reciprocal of the input value Refer to Figure 10 5 2 The currents summed at the inverting input of the op amp can be expressed as Va Va Va Vref 2R AR 88 R Therefore 8 77 Although this description describes output in terms of offset and amplitude instrument output levels are programmed as high and low levels HIL LOL Refer to Figure 10 5 4 and Figure 10 5 1 Byte Latching U20 has no internal latches and since the DAC output must be available continuously and simultaneously with the amplitude DAC output external latches are provided See Figure 10 5 3 The low and high bytes of the offset value are loaded seperately from the latched data bus into latches U19 and U17 using the negative edges of LBO and HBO to enable the latches
221. hoot Transition Times Reference Description A1 C532 OpF open to33pF Increasing V532 dereases transition times and increases overshoot in FIXED and LINEA mode 10 July 1996 Page 7 of 16 MODEL 8112A ERRATA Cont page 10 1 5 Troubleshooting Guide RAM Test change to read The microprocessor is unable to load a test pattern into the 010 and verify it page 10 7 9 Servicing the Microprocessor Schematic 2 3B Figure 10 7 5 page A 2 Replaceable Parts Add as a title MASTER PARTS page A 3 Replaceable Parts Add as a title to the uppertwo figures MASTER PARTS continued Addas a title to the third figure KEYBOARD PARTS 10 July 1996 Page 8 of 16 MODEL 8112A ERRATA Cont page A 6 Replaceable Parts Table A 2 Add descriptions SHAFT POWER SW aome HEATSNKOUTPUT 0 e mme or LE _ FOOTREARNSKI jefe Mp3 covERPLASTIC efe AO TI TRANSFORMER PWR m page A 14 Replaceable Parts Table A 3 Add the descriptions 10 July 1996 Reference Description p 12 51 PLATETRANSSTOR PLATEISULATOR RATEmsULATOR _ IE 4 to Al MP20 gt gt gt see next Page 10 lt lt lt Al 100 BRACKET EH
222. ielded to prevent radiation Boeblingen 25th August 1993 Hans Baisch Product Regulations Consultant 10 July 1996 Page 14 of 16 MODEL 8112A MANUAL CHANGE 1 On Page 8 9 10 11 Repl Parts List change to read 1 18 19 281 30160 3097 C310 312 314 C405 507 508 C519 520 521 C522 On Page A 26 Repl Parts List change to read A2 Cl 0160 3097 MANUAL CHANGE 2 On Page A 34 Repl Parts List delete A3 J3 1251 3167 On Page A 36 Repl Parts List add A3 W3 08116 61693 CAP 0 47uF 50V CAP 0 47uF 50V CONN POST TB CBL BD AY S On 8112A Manual Page 10 7 9 middle left side correct schematic as follows From Main Board Al J3 W3 73 color Signal ground V lt 1 lt V gray ground page 1B lt 2 lt green PDD ground V 3 lt V black ground 54 O 4 lt red 5 1V NOTE EDC LBL ENGINEERING DATE CODE LABEL BOARD REVISION DATE CODE 10 July 1996 Page 15 of 16 MODEL 8112A MANUAL CHANGE 3 On Page A 24 25 Repl Parts List change to read EDC LBL A 3310 U301 1086 0001 IC SNAKE U401 1DC7 0001 IC BOOSTER MANUAL CHANGE 4 On Page a 6 Repl Parts List change to read A 3401 U10 1818 1768 IC HM6116LP 3 MANUAL CHANGE 5 On Page A 24 Repl Parts List change to read A 3408 U301 1826 0955 IC 1DB6 MANUAL CHANGE 6 On Page A 40 Repl Parts List change to read B 3550 5 DS21 1990 1840 LED LT BAR MANUAL CHANGE 7
223. iming Tests E12 change to read Possible failure of Delay control circuit US U7 Error feedback U140 level shifter Q200 or Period IC U200 E 13 change to read Possible failure of Width control circuit U6 U8 Error feedback U141 level shifter Q220 Period IC U200 or DelayIC 0220 E14 change to read Possible failure of Slope control circuit U12 013 014 or U302 Slope range switching circuit Q305 to Q309 U300 reference circuit U320 Period IC U200 Delay IC U220 or Width IC U240 10 July 1996 Page 13 of 16 MODEL 8112A ERRATA Cont page 2 7 Specifications add General Characteristics Capitel 2 DECLARATION OF CONFORMITY similar to ISO IEC Guide 22 Manufacturer Hewlett Packard GmbH Boeblingen Instruments Division Herrenberger Str 130 D 71034 Boeblingen Germany We declare that the product HP 8112A Pulse Generator conforms to the following standards Safety IEC 348 1978 EMC EN 55011 1991 CISPR 11 Group 1 Class A EN 50082 1 1991 IEC 801 2 ESD 4kV cd 8kv ad IEC 801 3 Radiated Immunity 3V m 801 4 Fast transients 0 5 Supplementary Information During the measurements against EN 55011 the I O ports were terminated with their nominal impedance the HP IB connection was terminated with the cable HP 10833B When the product is connected to other devices the user must ensure that the connecting cables and the other devices are adequately sh
224. iming and slope circuits is explained under the following functions m Trigger input m Address decoder Control input Timing IC General m Period Width and Delay generation Slope generation m Error feedback Trigger Input trigger input level circuit provides the required trigger level to the period generator without affecting the external trigger source When enabled by TON the External Input signal from the front panel is buffered by Op amp U110B and shifted to produce an input in the range 4 3 V to 0 4 V for the TRIG IN input for the period generator U200 The actual triggering level is controlled by the front panel level control R119 via Op amp U110A When the external trigger signal matches the selected level U110B applies an input voltage of approximately 1 3 V to pin 7 of the period generator U200 Trigger mode Trigger mode selection positive negative gate etc is performed by the timing IC U200 in conjunction with the mode decoder circuit U101 and U102 see Mode and Range Decoders and Figure 10 3 1 to provide the type of trigger selected Servicing the Timing and 10 3 1 Slope Generators Address Decoder Mode and Range Decoders Control Input Circuits Timing IC 10 3 2 Servicing the Timing and Slope Generators An eight line decoder U100 is controlled by address lines to LA5 with WS1 The decoder output lines determine which timing mode or range circuit latches data from
225. in the cable will depend on the cable supplied If a new plug is to be connected it should meet local safety requirements and include the following features m Adequate load carrying capacity see specifications in Chapter 2 Ground connection m Cable clamp HP IB Connector IFC 580 0103 RING r 0102 SHIELD GND ONLY AT DIO SYSTEM CONTROLLER 1 12 sHs o y 9 5 SUN 11 8 8 7 6 CONNECTOR GROUNDS GND RT SYSTEM 0107 CONTROLLER REN Figure 3 3 HB IB Connector The rear panel HP IB connector Figure 3 3 is compatible with the connector on Cable Assemblies 10833A B C and D If a cable is to be locally manufactured use male connector HP part number 1251 0293 TT 9 Logic Levels The HP 8112A HP IB lines use standard TTL logic the levels being as follows True Low digital ground or 0 Vdc to 0 4 Vdc m False High open or 2 5 Vdc to 5 Vdc All HP IB lines have LOW assertion states High states are held at 3 0 Vdc by pull ups within the instrument When a line functions as an input approximately 3 2 mA of current is required to pull it low through a closure to digital ground When a line functions as an output it will sink up to 48 mA in the low state and approximately 0
226. ine Frequency Hz 00000 B Bg B9 Special Notes PERFORMANCE TEST RECORD Page 1 of 6 Testing Performance 8 33 PERFORMANCE TEST RECORD Hewlett Packard 8112A 50 MHz Pulse Generator Serial No ________________________ Report No ______________________ Date _____________ Test Equipment Used Description Model No Serial No Trace No Cal Due Date Counter Oscilloscope Digital Voltmeter Function Generator Controller 8 34 Testing Performance PERFORMANCE TEST RECORD Page 2 of 6 PERFORMANCE TEST RECORD Hewlett Packard 8112A 50 MHz Pulse Generator Serial No ________________________ Report ___ Date Period Period Minimum MEASURED Maximum Uncertainty Delay CR ee Double Pulse 83 75 ns 52 50 us 10 50 ms 950 ms 855 0 ms 945 0 ms Minimum MEASURED Maximum Uncertainty 17 0 ns 19 0 us 100 20 ms 19 0 ms 999 ms 800 ms 760 0 ms PERFORMANCE TEST RECORD Page 3 016 Testing Performance 8 35 PERFORMANCE TEST RECORD Hewlett Packard 8112A 50 MHz Pulse Generator Serial _______________________ Report No Date Pulse Width Pulse Period Width Minimum MEASURED Maximum Uncertainty 100 ns 10 ns 7 5 ns 12 5 ns Settings Uncertainty period Width Minimum MEASURED M
227. ing B 7 In Appendix A Table A 3 delete Reference Description HP Part 1 08112 66501 204 205 224 225 244 246 C F 0 47 pF 0160 0575 CR200 201 220 221 240 241 DIODE 1901 1068 R214 R229 R249 R F 31 6k 1 0698 3160 In Appendix A Table A 3 add Reference Description HP Part 1 08112 66501 203 223 243 0 1 uF 0160 0576 R213 RF10k 1 0757 0442 R227 228 246 247 R F 2 21 k 0757 0430 Control Board In Appendix A Table A 4 modify Reference Description Part A2 08112 66502 1862 R F 51 1 k 0757 0458 R64 R F 51 1 k 0757 0458 VR2 DIODE ZENER 4 3 V 1 1902 0949 DIODE ZENER 4 3 196 1902 0949 Microprocessor Board Appendix A Table 5 add Reference Description HP Part 08116 66523 W1 Jumper 8159 0005 rE Change 13 Component changes to improve slope accuracy and prevent erroneous error message E31 For instruments with serial number 2136G00780 and lower make the following changes to the appropriate parts lists Main Board In Appendix A Table A 3 modify Reference Description HP Part 08112 66501 C305 C F 1000 pf 2 0140 0178 R15 R F 5 2k 1 125W 0698 8863 B 8 Backdating In Appendix A Table A 3 delete Reference Description up Part 08112 66501 R30 R F 200 0757 0407 Microprocessor Board Appendix A Table A 5 modify Reference Description HP Part 08116 66523 017 5 741 5138 1820 1216
228. ins unchanged YES NO Settling time correct YES NO Store and Recall key functions correctly YES NO HP IB programming HP IB functioning YES NO 8 40 Testing Performance VERIFICATION TEST RECORD Page 2 of 2 Adjustment Procedures Safety Considerations Warning Introduction Note Dangerous voltages capable of causing serious personal injury are present in this instrument Use extreme caution when handling testing and adjusting The adjustments described in this chapter are performed with the instrument switched on and its protective covers removed Therefore the adjustments must only be carried out by a skilled person who is aware of the hazards involved and in the presence of another person who is capable of rendering first aid and resuscitation Capacitors inside the instrument may still be charged after the instrument has been disconnected from its external power supply Any disconnection of the protective ground connection inside or outside the instrument is prohibited as this is likely to make the instrument dangerous This chapter describes the adjustment procedures which return the HP 81124 to peak operating condition after repairs are completed The procedures cover Power Supplies m Preliminary Adjustments m Overshoot amp Transition Time Adjustment m Timing m Shaper and Offset Adjustment m Slope Always allow the HP 8112A to warm up for at least 1 hour before starting any adjustmen
229. ipment Procedure 8 22 Testing Performance Counter HP 5335A HP 8112A Figure 8 14 Output Mode Verification Test Oscilloscope HP 54121T Counter HP 5335 Cable Assembly 2 x m Attenuator 20 dB 2 W 2 x m 50 Feedthrough Termination required if counter input impedance gt 500 1 Connect the equipment as shown in the setup 1 figure 2 Set up HP 81124 as follows Trigger Mode NORM Control Mode Off Transition Fixed BUR 472 1 0 us DEL 65 ns DTY 25 Complement Output Off HIL 2 0 V LOL 2 0 V Limit Mode Off 3 Verify that the output signal is inverted by pressing the key oOo Deselect the key Verify that the key disables the output signal Re enable the output signal Change Limit mode to ON Press the key and verify that the vernier keys do not increase the beyond the 2 0 as set previously 9 Press the key and verify that the vernier keys do not decrease the LOL below the 2 0 V as set previously 10 Reconnect the equipment as setup 2 use the 500 feedthrough if neccessary 11 12 13 14 Change the HP 81124 settings as follows Input Mode E BUR HIL 2 0 V LOL 2 0 V Set the counter as follows TOT A GATE Manual Open Slope A Positive Trigger level preset Press the key on the HP 8112A to simulate an external trigger and verify that the counter counts 472 p
230. ith TRANSITION MODE keys It is possible to increase or decrease rise and fall times of output pulses Should you select a rise or fall time which degrades the HIL or LOL settings an EXCESSIVE message will illuminate above the two keys and the key associated with the incompatible parameter will flash When either of these keys is selected the corresponding level may be set The selected HIL value is inoperative in the HILC mode This key causes the HP 8112 to assume a factory programmed parameter set as follows NORM Active PER Active WID 5096 of PER LEE 1096 of PER TRE 1096 of PER SET is automatically eliminated by selection of any other mode or parameter key or by pressing PER again Store and Recall Key Note E The HP 81124 has the capability to store nine complete sets of mode and parameter information in it s memory To store settings press STO RCL The digital display now reads where X is the file identity number 1 to 9 The right hand vernier key is used to alter the value of X to determine which file the parameter set will be stored as Now press the bottom of the left hand vernier key and the current instrument settings will be stored in the selected file To recall settings press STO RCL The digital display now reads where X is the file identity number 1 to 9 The right hand vernier key is used to alter the value of X to determine which parameter set file will be recalled Now press t
231. l about 0 V 14 Set the HP 81124 as follows Transition Linear LEE 5 5 ns TRE 5 5 ns LIMIT Off 15 Adjust A1R318 amplitude R407 bal to achieve an output amplitude of 10 V symmetrical about 0 V 16 Alter HP 8112 Transition to Gaussian 17 Adjust A1R418 amplitude R402 bal to achieve an output amplitude of 10 V symmetrical about 0 V 18 Set up the HP 81124 as follows DTY 75 Transition Fixed HIL 0 5 V LOL 0 5 V LIMIT Off 19 On the oscilloscope remove one of the 20 dB attenuators from input 4 and set the attenuation factor to 10 20 Press and set to 200 mV division Ext trigger pos 21 Turn 2 46 fully clockwise 22 Adjust A2R46 amplitude A1R416 bal for symetrical 1 V signal Overshoot amp Transition Time Adjustment Equipment Procedure Oscilloscope HP 54121T m Attenuator 20 dB 3 x 1 Set up the HP 8112A as follows Trigger Mode NORM Control Mode Off PER 200 ns DEL 65 ns DTY 50 Transition Linear LEE 15 5 ns TRE 15 5 ns HIL 8V LOL 8V COMPL Off DISABLE Off Enable LIMIT Off Connect the HP 8112A main output to the oscilloscope input 4 via two 20 dB attenuators 40 dB Connect the HP 8112A trigger output to the oscilloscope trigger input via 20 dB attenuation Press Autescale Adjust A1R535 to give best slope linearity in both COMPL off Norm and COMPL on modes Set the HP 81124 as follows LEE 5 5 ns TRE 5 5 ns
232. l or individual parameters can be programmmed and uploaded Initiated by syntax and operating errors returns error number Status byte Message Times Returns text of operating error message Time to receive and execute a message 5 ms Offset 30 ms Time to send a message Status byte 15 ms Learn string 1 ms per character Status byte 15 ms ee General Characteristics Environmental Storage temperature range 40 C to 70 C Operating temperature range 0 C to 55 C Humidity range Up to 95 RH between 0 C and 40 C Power supply Weight Dimensions Recalibration period 100 120 220 240 V rms selectable 5 10 48 440Hz 120 V maximum Net 5 9 kg 13 158 Shipping 8 0 kg 18 158 m 89 mm high 3 5 in 213 mm wide 8 4 in 445 mm deep 17 5 in 1 year recommended Specifications 2 7 Installation 3 Introduction Safety Considerations Initial Inspection Warning This chapter provides installation instructions for the HP 8112A It also includes information about initial inspection and damage claims preparation for use packaging storage and shipment The HP 8112A is a Safety Class 1 instrument instrument with an exposed metal chassis that is directly connected to earth via the power supply cable Before operation review the instrument and manual including the red safety page for safety markings and instructions These must then be followed to ensure safe
233. l to the Ext Input 3 Check the input signal from the trigger input circuit at pin 7 of U200 against Figure 10 3 8 0 2V esc 1 6V EXT PER Figure 10 3 8 Period Generator Input pin 7 To check the operation of the Period Generator 1 Set the HP 8112A to RCL 0 2 Check the ramp signal at pin 20 of U200 against Figure 10 3 9 10 3 16 Servicing the Timing and Slope Generators 0 V 1 gt ns Figure 10 3 9 Period Generator ramp signal 20 3 Check the trigger output signal at pin 21 of U200 against Figure 10 3 10 4 Check the signal being sent to the delay generator IC220 at against Figure 10 3 10 OUTPUT ON 21 9 5 0 7 N OUTPUT TO DELRY 50 50 GENERRTOR ON 1 lms Figure 10 3 10 Period Generator output signals 5 Check the period generator operation against Table 10 3 10 and Table 10 3 11 Table 10 3 10 Period Generator Operation U200 Pin Mnemonic Description 5 Period control voltage input 2 Period error output signal 10 PIC Period input store select See Table 10 3 1 11 to 18 LD7 LDO Data to be latched into See Table 10 3 2 the input store of U200 R212 PVC Period vernier current See Table 10 3 11 6 Verify that voltage at U200 pins 1 4 and 5 are at virtual ground min 40 mV max 0 V Servicing the Timing and 10 3 17 Slope Generators
234. line 20 causes a syntax error so that a SRQ is generated Lines 40 to 130 show how the status byte can be interrogated with a user defined function 10 712 20 OUTPUT A XYZ 30 WAIT 05 40 PRINT Status byte FNSpoll A 50 END 60 DEF FNSpoll A TO S_code A DIV 100 80 H addr A MOD 100 90 SEND S code UNL MLA TALK CMD 24 100 ENTER 5 USING B Stb 110 SEND S code CMD 25 UNT 120 RETURN Stb 130 FNEND Interrogate Timing After receiving an interrogate command the HP 8112A needs some time until it is ready to send the response to the computer If the device is not yet ready it will send the string NO MESSAGE instead of the response Should your computer be too fast for the HP 8112 it will be necessary to force the computer to wait a few hundred milli seconds before reading the response after an interrogate command The HP 8112 needs time to interpret and implement the commands which it receives You need to allow for this in your controller program summary of programming timings is given in Table 6 1 Programming 6 21 Programming Examples Introduction General Examples Common Task Examples Note The following examples are an introduction to programming the HP 8112A using HP BASIC 5 0 5 1 for the HP 9000 Series 200 300 controllers The examples cover the following subjects m Testing communication with the HP 8112 m Performing the instrument self test m Using the B
235. ltage 3 2 Adjustment 9 1 B BUR 6 8 C0 6 11 Calibration 9 1 Capability codes 2 6 Connector HP IB 3 5 Control Input 2 5 Control mode 2 4 DELC 4 8 HILC 4 8 PERC 4 8 Programming 6 6 Selecting 4 7 WIDC 4 8 CST 6 11 4 6 6 D DO D1 6 11 DBL 6 7 DCL 6 18 DEL 6 7 Delay Specification 2 2 Delay timing 9 11 DELC 4 8 Dimensions 2 7 Double Pulse Specification 2 2 DTY 6 7 Duty cycle Specification 2 2 Duty Cycle error 6 16 E E01 10 1 5 E11 10 1 5 E12 10 1 5 E13 10 1 5 E14 10 1 5 E21 10 1 7 E22 10 1 7 E31 10 1 7 E32 10 1 7 E33 10 1 7 E34 10 1 7 E35 10 1 7 E36 10 1 9 E37 10 1 9 E38 10 1 9 E39 10 1 9 E41 10 1 9 E42 10 1 9 E51 10 1 9 E52 10 1 9 Environmental characteristics 2 7 Error Duty cycle 6 16 Input 6 17 Limit 6 14 reporting 6 13 Slope 6 15 Syntax 6 15 Timing 6 15 Error detection 2 6 External Input 2 5 External Trigger Controls 4 6 F Fault 0 10 1 5 E01 10 1 5 E11 10 1 5 E12 10 1 5 E13 10 1 5 E14 10 1 5 E21 10 1 7 E22 10 1 7 E31 10 1 7 Index 1 E32 10 1 7 E33 10 1 7 E34 10 1 7 E35 10 1 7 E36 10 1 9 E37 10 1 9 E38 10 1 9 E39 10 1 9 E41 10 1 9 E42 10 1 9 E51 10 1 9 E52 10 1 9 Fault reporting 6 13 10 1 3 G General characteristics 2 7 GET 6 18 GTL 6 18 H High Level Specification 2 3 HIL 6 8 HILC 4 8 Universal commands 6 18
236. m 58 to 30 Change 1 Change 2 Instrument case Display Board HP IB Board Component value change to improve vernier adjustment For instruments with serial numbers 2136G00120 and lower make the following change to the parts list for the Main Board assembly Al in Appendix B Table A 3 Reference Description HP Part Al 08112 66501 R438 RESISTOR 0698 4425 For instruments with serial numbers 2136G00160 and lower make the following changes to the appropriate parts lists In Appendix A Table A 2 modify Reference Description HP Part 0 08112 MP2 SHAFT POWER SW 08112 43701 MP8 FRAME REAR 5020 8814 MP9 PANEL REAR 08112 60253 In Appendix A Table A 7 modify Reference Description HP Part 5 08112 66505 0526 DISPLAY NUM 1990 0649 DS27 DISPLAY NUM 1990 0531 DS28 DISPLAY NUM 1990 0531 DS29 DISPLAY NUM 1990 0531 In Appendix A Table A 8 modify Reference Description Part A6 08116 66506 51 SW AY SL 3101 2097 Backdating B 3 a a Change 3 Minor mechanical improvements were made For instruments with serial numbers 2136G00190 and lower make the following changes to the appropriate parts lists Main Board In Appendix A Table 3 modify Reference Description HP Part Al 08112 66501 MP200 HT SINK 1205 0018 Microprocessor Board Appendix A Table 5 modify Reference Description HP Part 08116 66523 MP1 CLAMP C
237. mes and output levels External Burst Each active input transition generates a preprogrammed number of pulses 1 to 1999 Minimum time between bursts is 100 ns Max Input 20 V Equipment Pulse function generator HP 8116A Oscilloscope HP 54121T m Attenuator 20 dB 2 W 4 x Cable Assembly 5 x m BNC T connector Test Setup Oscilloscope HP 541211 HP HP 22123 20 dB Attenuators with BNC SMA Adaptors Figure 8 12 Trigger Gate E WID amp Verification Test Procedure 1 Connect the equipment as shown in the setup figure 2 Set up the HP 81124 as follows Trigger Mode TRIG Trigger Slope f Control Mode Off Transition Fixed PER 2 0 us DEL 65 ns WID 1 0 us HIL 1 00 V LOL 0 00 V 3 Set up the external pulse generator HP 8116A as follows Frequency 50 kHz Width 5 0 us Amplitude 2 0 V Offset 0 00 V 4 Using the oscilloscope adjust the HP 81124 trigger level to allow triggering from the external pulse generator 5 Verify that each external trigger pulse generates one complete output cycle as shown shown here Testing Performance 8 19 UN EXT INPUT INPUT 1 OUTPUT INPUT 2 TRIG OUTPUT 6 Set the HP 8112A to GATE trigger mode PER 900 ns and DTY 50 Verify that each gate leading edge releases a train of output pulses and that each cycle is complete As shown here EXT INPUT OUTP
238. modify Reference Description HP Part A3 08116 66523 R15 R NETWORK 47k 1810 0378 R16 R NETWORK 47 1810 0378 B 6 Backdating Change 10 Control Board Change 11 Main Board o 12 Component value change to provide greater adjustment range Width generator For instruments with serial number 2136G00605 and lower make the following changes to the appropriate parts list In Appendix A Table A 4 modify Reference Description HP Part A2 08112 66502 R7 R F 4 64 k 0698 3155 For instruments with serial number 2136G00705 and lower make the following changes to the appropriate parts list In Appendix A Table A 3 modify Reference Description Part 1 08112 66501 83117 2k 0757 0283 In Appendix A Table A 3 delete Reference Description Part Al 08112 66501 2541 0 01 uF The performance of the ICs was improved With introduction of new version components and values were changed For instruments with serial number 2136G00730 and lower make the following changes to the appropriate parts lists In Appendix A Table A 3 modify Reference Description HP Part Al 08112 66501 R211 R F 1k 1 125W 0757 0280 R225 R F 1k 1 125W 0757 0280 R244 R F 1k 1 125W 0757 0280 U200 IC TIMING SEL 2 5180 2410 U220 IC TIMING SEL 2 5180 2410 U240 IC TIMING SEL 2 5180 2410 Backdat
239. moving W2 jumper for at least 30 seconds This will destroy the stored RAM data Re connect the RAM back up battery and switch the instrument on The Standard Parameter Set is now loaded into the RAM The keyboard can be checked using signature analysis 1 Servicing the Microprocessor and Front panel Set the microprocessor to free run as described in Free Running Signature Analysis and connect the signature analyzer probes as given in Table 10 7 2 Verify the reading at microprocessor 5 V supply is is 0003 If it is not the microprocessor is not free running Connect the data probe to TP7 on the microprocessor board A3 and check the signature obtained when each key is pressed against Table 10 7 6 10 7 17 Table 10 7 6 Keyboard signatures no key pressed LCL MODEI NORM MODE E BUR CTRL PER DEL WID LEE TRE HIL LOL Slope 7 Slope MAN Pulse Set FIXED LINEAR GAUSS STO RCL LIMIT COMPL DISABLE Vernier MSD UP Vernier MSD DOWN Vernier middle UP Vernier middle DOWN Vernier LSD UP Vernier 150 DOWN RANGE UP RANGE DOWN 10 7 18 Servicing the Microprocessor and Front panel MODEL HP8112A GRID REF GRID REF DES LOC nts 1 C3 MP2 C1 B2 MP4 al C2 2 R1 R2 R3 R3 R2 R4 R2 R6 R9 C3 218 ca MP4 R11 ca R12 ca uie R13 C1 R14 R3 SIE RIS Bl 3 R16 U13 R1 C3 R19 NE R21
240. mplifier 10 4 1 SYMMETRY AMPLITUDE ADJUST CONTROL VOLTAGE CONTROL NORH COMPL N VERNIER INPUT N C SELECT POS NEG ADJUST N C 5 2V Figure 10 4 1 Shaper IC Block Diagram Table 10 4 1 Shaper IC Output Modes Input Selected Output Signal Linear Shaped LO Differential LO HI HI Differential Not used EECL 0 V 0 6 V Fast Pulse The main inputs are differential current inputs INP or INP The single ended EECL voltage input 0 V to 0 6 V generates an output pulse with fast but fixed transition times Wave Forming In Linear transition mode the waveform block within the shaper IC acts as a linear amplifier upon the input from the slope generator See Chapter 10 3 In shaped Gaussian mode the linear slopes ofthe input pulses are given gaussian characteristics controlled by the inputs on pins 1 and 24 of the shaper IC For fixed transitions the single ended EECL input is used to provide fast fixed mode output pulses having a fixed transition of 4 5 ns 10 4 2 Servicing the Shaper and Output Amplifier Current Mirror Output Mode For all waveforms normal or complement output is selected by a digital input from the bus latch to pin 15 of the shaper IC This input works in conjunction with a bias adjusting network and the internal level shift to provide normal and complement output modes Shaper Output portion of the amplitude vernier cont
241. n 21 See Figure Figure 10 3 3 An error output is available at pin 23 this goes active if a trigger input is detected whilst the IC output is still active Linear and Gaussian Transitions In linear and gauss slope modes a differential output OUT OUT is used to drive the Shaper IC See Chapter 10 4 to produce output pulses with variable transition times When linear or gaussian mode is selected the slope generator relies on four current sources and a switched range capacitor network to produce variable transition time leading and trailing edges depending the LEE and TRE DACs in the control section See Chapter 10 5 The slope ramp value is controlled internally or externally according to the condition of pin 10 EXT Servicing the Timing and 10 3 7 Slope Generators Error Feedback Current Sources External constant current sources on the control board A2 provide ref and Idown ref When a rising edge is detected at TRIG IN Q303 is switched on via the internal buffer to enable one of the internal or external ramp capacitors to charge up linearly by derived from Iyp ref at rate set by the LEE DAC on the control board Once the charge threshold of 2 V has been reached charging current is diverted via internal diodes into the current mirror circuit and the capacitor voltage remains constant When a falling edge is detected at pin 1 Q303 is switched off and 9304 is switched on dumping to ground
242. n normal mode the TRIG OUT signal is a 5096 duty cycle square wave at the same frequency as the main HP 8112A output In TRIG and GATE modes the TRIG OUT signal is a pulse shaped equivalent of the trigger input The rising and falling edges correspond to the trigger level voltage passing through the threshold level set by the TRIG LEVEL control This circuit is used during instrument self test which is performed at switch on to verify the operation of the output amplifier and pre attenuator For more details see the self test routine described in chapter 10 1 10 4 6 Servicing the Shaper and Output Amplifier CURRENT MIRROR PRE ATTENUATOR 18v 16v 8 1v 8 99v 8 1v 9 99v 2448 MOOEL HP8112A FIGURE 18 4 4 MAIN BOARD A1 SCHEMATIC 8 SERVICING THE SHAPER AND OUTPUT AMPLIFIER 10 4 7 P O A1 MAIN BOARD FROM A2 CONTROL BOARD 2c 63 28169 SERVICE TO FRONT PANEL 4 TO FRONT PANEL 115 MODEL 112 FIGURE 10 4 5 MAIN BOARD A1 SCHEMATIC 7 SERVICING THE SHAPER AND OUTPUT AMPLIFIER 18 4 9 1 2 P O Al MAIN BOARD OUTPUT AMPLIFIER RS2 OFFSET 84741168 asm n CURRENT COMPENSAT I ON ee 0516 227 15V MS 8517 05 8 __ 558 11K T 128 OFFSET VOLTAGE CONTROL V Troubleshooting If an error code is being displayed by the HP 8112A you must
243. n the range 8 0 V to 8 0 V It is important to note that while the Low Level LOL value can be set to a maximum of 7 95 V in 50 mV steps the LIMIT facility becomes non operational in this Control mode and the button LED will blink See Figure 4 6 HIL Maximum LOL set 7 95 8V 8V 775 8 OV CTRL Input The dotted line shows the HILC range 8V Figure 4 6 High Level Control Capabilities Operating 4 9 Setting Transition Modes 8112A PULSE GENERATOR 50 2 P HEWLETT PACKARD 4 10 Operating Fixed Linear Gaussian Figure 4 7 Transition Controls The transition mode keys enable the operator to select the type of pulse transition and to vary transition time This key provides a fixed transition of 4 5 ns You cannot adjust the LEE or TRE parameters when this key is operated lit Permits both the leading and trailing edges of the HP 8112A output pulse to be programmed independently of each other in the range 6 5 ns to 95 ms by setting values for LEE and TRE Maximum permissible ratio is 1 20 This key is the same as the linear mode key except that edges are co sinusoidal in shape It is important to note that the actual rise and fall times of the transitions will be up to 25 faster than the selected and displayed value for slopes of greater than 50 ns duration For slopes less
244. native equipment may be substituted provided that it meets or exceeds the critical specifications given in the tables Table 1 1 Recommended Test Equipment Instrument Recommended Required Characteristics Model Counter HP 5335A 50 MHz Start Stop with 040 TI to B Alternative 5345 3456 3478 Digital Voltmeter HP 34584 DC 0 01 50 V 004 acc Pulse amplitude facility Function Generator HP 8116A 20 MHz THD lt 1 HP3324A 002 gt 10 GHz Bandwidth HP 54100D lt 30 ps Transition times Flatness 5 lt 100 MHz 502 inputs Digitizing Scope HP 5412xT or HP 5450A Signature Analyzer HP 5005B Power Supply HP 6237B 0 20V HP 3324A Attenuator HP 33340C 20 dB 2W Adaptor SMA to BNC Terminators HP 11048C HP 10100C 10 W 50 0 0 1 2 W 50 0 P Performance Test Adjustments T Troubleshooting Specifications Introduction specifications in the following sections describe the warranted performance of the instrument m Timing parameters m Output parameters Waveform characteristics All specifications apply with a 50 load after a 30 minute warm up period and are valid for ambient temperature in the range 15 C to 35 C Refer to the General Characteristics section of this chapter for the performance derating factor to be used outside this temperature range
245. ng 4 3 Standard Parameter The Standard Parameter Set exists for two reasons Set m If the instrument RAM becomes corrupted due to battery failure the Standard Parameter Set will be selected when the instrument is switched on to give an error free display a If an invalid combination of Operating and Control modes is selected switching the instrument off and on again or selecting RCL 0 will revert to the Standard Parameter Set The Standard Parameter Set is detailed below Trigger mode NORM Normal Control mode CTRL Of Burst BUR 0001 Period PER 1 00 ms Delay DEL 65 ns Pulse width WID 100 Double pulse DBL 200 us Duty cycle DTY 50 Leading edge LEE 10 ns Trailing edge TRE 10 ns High output level 1 00 V Low output level LOL 0 00 V External input EXT INPUT Positive slope Transition Linear Limit Complement Output Disable LIMIT COMPL DISABLE NORM PER WID DEL illuminated active 4 4 Operating Selecting Trigger Mode NORM TRIG GATE O E WID L 8112 PULSE GENERATOR 50MHz jj HEMLETT PACKARD Mode Selection Figure 4 2 Trigger Mode Controls The currently active mode is shown by LED indicator The trigger mode can be cycled through available options by pressing the key below the mode indicators
246. njunction with the Timing range decoder 10 5 4 Servicing the Control Board TIMING COMP HIGH BYTE BURST DAC REFERENCE TO A3 W4 FROM A3 W4 MICROP BD MODEL HP8112A FIGURE 10 5 3 CONTROL BD A2 SCHEMATIC 1 SERVICING THE CONTROL BD 18 5 5 1 2 P O A2 CONTROL BOARD FROM A1 MAIN 80 DAC SUPPLY ADDRESS DECODER TIMING gt 3413 44415 LOW BYTE OFFSET LATCHE cie FROM lt 4 539 o MICROP BD EN ira i 3c 4 1 3 u LE pN 30 3 4 RH 5819 70 ho ie is 7 s2728 18 74 8275 HIGH BYTE OFFSET LATCHE ve SV Dl 1 Ee H 1 H 769518 2 3 SERVICE 2 peron corro EAO 62 54 1K o gt V DELAY CONTROL 162 FROM A1 W7 157 DBL nyna 664 9 99m0 MAIN BD BYG 6 10 BYE gt jam LF 2B MODEL HP8112A FIGURE 10 5 4 CONTROL BD A2 SCHEMATIC 2 SERVICING THE CONTROL BD 10 5 7 FROM A3 W4 gt 74L884N SERVICE TO A1 W7 MAIN BOARD d AMPLITUDE CONTROL 3 1 AMPL CHEF T 6 J34C8 CRS me Ii IZ jp TE E r3 5 N C MIR ZI MODEL HP8112A FIGURE 18 5 5 CONTROL BO
247. nsceiver lt HP IB gt GPIA ROM ie BE Data Bus Big Device Bus sen Tees T 55 eer o Display Board Control Board Figure 10 7 1 Microprocessor board architecture Figure 10 7 1 summarises the parts of the microprocessor board and the connecting busses The purpose of the address bus is to allow the microprocessor to select a particular location in the instrument The location can be in ROM in RAM in the GPIA or one of the other devices The data bus allows the microprocessor to read data from Servicing the Microprocessor and Front panel 10 7 1 or write data to the addressed location Note that some devices can only be read from others can only be written to and others can both be read from and written to Read Only Memory The ROM is a permanent data store which contains the ROM microprocessor program and other fixed data such as the standard parameter set Random Access RAM is data store which the microprocessor can write to and Memory RAM read from using the read write R W control line to choose which operation is required The RAM is used to store the current parameter set and temporary data needed by the microprocessor The HP 8112A RAM has battery back up power supply described in the following section which means the data in the RAM is maintained while the instrument is switched off This allows the current parameter set to be restored when the instrument is swit
248. ntal paths The display driver contains 8 bytes of RAM which store 8 data bits a g and DP to be used with each of the 8 digit outputs DIGO DIG7 The MODE signal determines whether the display driver interprets data as controlinstructions or display data to be stored in RAM Table 10 7 1 Display Driver Control Signals Signal Pin Status Function MODE Load control instruction on WRITE pulse Load display data on WRITE pulse WRITE 8 HIGH Data not loaded LOW Data loaded Servicing the Microprocessor and Front panel 10 7 5 After the appropriate control instruction eight bytes of display data are loaded by the microprocessor using eight successive WRITE pulses HP IB Status Latch U37 The data stored in the HP IB status latch drives the HP IB status LEDs on the frontpanel Display Latche U23 The data stored in the display latch drives the parameter LEDs on the frontpanel Reset Circuits When the instrument is switched on the microprocessor RESET input is held low reset for approximately 2 5 ms This allows the power supplies to become established before the microprocessor starts running This delay is achieved using the CR network R12 3 x 10K and C4 0 1 U27D output goes high when C4 has charged to approximately 420 mV and the RESET signal is withdrawn When the instrument is switched off the Power Down Detected signal goes high forcing the output of U27A high This switches on t
249. ntrol Board Microprocessor Board Keyboard Display Board Reference Chapter s 10 2 10 3 10 4 10 5 10 6 10 7 10 7 10 7 10 1 Instrument Overview and Troubleshooting Guide Theory of Operation The block diagram in Figure 10 1 1 shows the HP 8112 at a functional level DISPLRY BD KEY BORRD BUS DELAY WIDTH LEE TRE AMPLITUDE OFFSET DAC DAC 17x DAC DRC DAC WC ICUP ICON HILC RVC HILC ove EXTERNAL v Y v INPUT TRIGGER 5 AMPLITUDE AMPLITUDE OUTPUT LEVEL SLOPES 1853 RTTENURTOR X TRIGGER OUTPUT TRIGGER RMPLIFIER Figure 10 1 1 HP 8112A Functional block diagram The microprocessor controls the operation of the instrument by reading inputs from the front panel keyboard or the HP IB and sending the appropriate data to the Digital to Analog Converters DACs which control the generator hardware It also updates the front panel LEDs and display in response to the keyboard and HP IB inputs The generator hardware contains three specially developed HP ICs Timing IC This is used as triggerable pulse generators Three ICs are used taking the external signal applied to the Control Input and applying Period Delay and Width control in successive stages to provide pulses for the Slope IC Instrument Overview and Troubleshooting Guide 10 1 1 10 1 2 Slope I
250. o enable the 8112 to request service PRINT End of the main program PRINT End of the program INTR 2 LOCAL 712 END Subroutine for servicing the interrupts 7 12 Programming Examples 290 300 SUB Service srq 310 PRINT 320 PRINT SRQ from 8112 gt Main Program interrupted 330 PRINT 340 Print spoll read the Status Byte and print the results 350 PRINT 360 PRINT End of the interrupt routine 370 PRINT 6 2 5 gt 5 52 45 555555245 5552 2 380 ENABLE Enable interrupts again 390 SUBEND 400 410 SUB Print spoll 420 The subroutine Print spoll conducts a SPOLL to read the Status Byte 430 Errors as indicated by the set bits are printed 440 A SPOLL 712 450 PRINT Value of the Status Byte read with SPOLL A 460 PRINT 470 PRINT Service requested because of 480 IF BIT A 5 THEN PRINT Input Error 490 IF BIT A 4 THEN PRINT Duty Cycle Error 500 IF BIT A 3 THEN PRINT Slope Error 510 IF BIT A 2 THEN PRINT Syntax Error 520 IF BIT A 1 THEN PRINT Timing Error 530 IF 0 THEN PRINT Limit Error 540 X SUBEND S ERROR DEMO Purpose This program demonstrates how to determine which error bit s are set in the HP8112 Status Byte Also it is shown how to get a more detailed description of an error with the interrogate error command IERR Both functions are p
251. ofilm transparencies refer to title page for order number The microfiche package also includes the latest Manual Changes supplement and all relevant Service Notes HEWLETT PACKARD GmbH 285169506 Boeblingen Fed Rep of Germany Figure 1 1 Serial Number Plate FRG Attached to the rear of the instrument is a serial number plate Figure 1 1 The first four digits only change when there is a significant modification to the instrument the last five digits are assigned sequentially to instruments This manual applies directly to the instruments with the serial numbers quoted on the title page For instruments with higher serial numbers refer to the Manual Change sheets in Appendix C Updating To keep this manual up to date Hewlett Packard recommends that you periodically request the latest Manual Change supplement by quoting the part number and print date of this manual both of which appear on the title page Introduction 1 1 Instrument The HP 8112A Programmable Pulse Generator operates over the Description frequency range 1 Hz to 50 MHz with a maximum 32 V peak to peak P output signal delivered into a 50 2 high impedance load Instrument capabilities include m Fixed 5 ns transition times m 6 5 ns to 95 ms variable rise and fall times m Variable delay in all modes m High and Low Level Limit for device under test DUT protection m HP IB programmable m Easily accessible memory for up to 9 s
252. ogrammable to ensure that the specified minimum values can always be obtained Output Parameters Note Output voltages are specified for a 50 load Output voltages double when driving a high impedance load High Level HIL 7 90 V to 8 00 V Low Level LOL 8 00 V to 7 90 V Resolution 3 digits 10 mV Level accuracy 1 of programmed value 3 of amplitude 40 mV Repeatability factor 4 better than accuracy Settling time 100 ns LEE Preshoot Overshoot Ringing 5 10 mV variable transitions 10 10 mV fixed transitions Operating The following sections give non warranted information on the typical Characteristics operating characteristics of the instrument m Trigger modes Control modes m Output modes m Inputs and Outputs m Additional features m General characteristics Specifications 2 3 Trigger Modes Normal Trigger Gate External Width External Burst Control Modes Period Delay Double pulse and Width Control High level Control 2 4 Specifications The external trigger signal referred to in this section is applied to the EXT INPUT BNC connector on the instrument front panel The trigger level and sense are adjustable An external trigger can be simulated by pressing the key The key gives an additional pulse in Gate and External Burst modes continuous pulse train is generated Each active input
253. ogramming 6 19 Terminators Note y Possible Problem with 6 20 Programming SPOLL HP 8112As with the new firmware starting with serial number 2851G07381 work correctly with the terminators listed on page 3 Devices with older firmware will hang up when receiving both CR LF and EOI Therefore termination with both CR LF and EOI should be avoided when programming devices with old firmware Since some controllers cannot easily be configured so that they do not to use CR LF and EOI as terminator the EOI line of some older devices is disconnected Users of some non HP versions of BASIC may experience difficulty in terminating with CRLF alone i e EOI cannot easily be turned off If this is the case a jumper setting inside the instrument allows EOI line to be ignored To set this jumper proceed as follows m Remove rear feet and top cover m Transfer jumper A3W3 at the center of the microprocessor board A3 from the factory setting EOI to position 3 The HP 8112A with old and new firmware does not pull the EOI line The device terminates all messages with CR LF and a space character If the HP 81124 15 the only instrument on the bus the SPOLL statement may cause the instrument to hang up Either of the following will clear the fault 1 Use an HP IB cable of not less than 2m length Or 2 Use a user defined function to interrogate the status byte instead of the usual SPOLL statement In the following program
254. ommand The two examples below will help to understand this structure Learn String Delay Mode active M1 CT0 T1 W2 SM0 L0 C0 D1 BUR 0001 PER 1 00 MS DBL 200 US DEL 65 0 NS DTY 50 WID 100 US LEE 10 0 NS TRE 10 0 NS HIL 41 00 V LOL 40 00 V Learn String Double Mode active ML CTO T1 W2 SMO LO CO D1 BUR 0001 PER 1 00 MS DEL 65 0 NS DBL 200 US 50 WID 100 US LEE 10 0 NS TRE 10 0 NS HIL 1 00 V LOL 40 00 V Please refer to the listing of the program for the exact usage of the commands above Note The Learn String consists of upto 153 ASCII characters The time for transferring Learn Strings may vary with different settings 10 Program name 20 1 30 Function Demonstration of the Learn String s usage 40 Reading the current Learn String with CST 50 Sending the Learn String back to the HP8112A 60 Additional features 1 70 Time taken for transfering the Learn String is printed 80 Recalling a setting from a location is shown 90 100 CLEAR SCREEN 110 120 CLEAR 712 initialize interface and HP8112A 7 16 Programming Examples 130 140 150 160 170 180 190 200 210 220 230 240 250 260 270 280 290 300 310 320 330 340 350 360 370 380 390 400 410 420 430 440 450 460 470 480 490 500 510 520 530 540 A SPOLL 712 clear Status Byte DIM 153 The Learn
255. on string allocates 12 char acters of memory for reply OUTPUT 712 IDEL Request current delay setting ENTER 712 B Read reply into allocated memory PRINT 81124 DEL B Print the reply 6 10 Programming LS 2 Selecting Output Modes Output Controls Example Mnemonic Switch off output limits 10 Switch on output limits Ll Switch off complementary output Complement output C1 Enable output DO Disable output D1 OUTPUT 712 L1 DO Switch on output limits and enable the output signal Reading the Current Settings Note 9 The Current Setting interrogate command CST tells the HP 8112A to send a response that contains all necessary commands to set the device to its present state The response message called ASCII learn string can be retransmitted as a program message without alteration The learn string may be altered in the computer before retransmitting it Since the learn string is made up of the several independent commands it is possible to send parts of the learn string complete commands to the instrument The description of the example program LRN_DEMO in Chapter 7 Programming Ezamples contains more details about the usage of the CST command Also refer to the example program INTERROG When the HP 81124 replies with a string containing all current settings The data is always in the same order M1 CTO T1 W1 SMO LO CO D1 BUR 001 PER
256. operation and to maintain the instrument in safe condition To avoid hazardous electric shock do not perform electrical tests when there are signs of shipping damage to any part of the outer Covers or panels Inspect the shipping container for damage If the container or cushioning material is damaged keep it until the contents of the shipment have been checked for completeness and the instrument has been verified both mechanically and electrically The contents of the shipment should be as shown in the shipping document plus any accessories that were ordered with the instrument Procedures for checking the operation of the instrument are given in Chapter 8 Performance Tests If the contents are incomplete mechanical damage or defect is apparent or if the instrument does not pass the operators checks notify the nearest Hewlett Packard office Keep the shipping materials for carrier s inspection The HP office will arrange for repair or replacement without awaiting settlement Installation 3 1 Power Requirements and Line Voltage Selection Caution BEFORE APPLYING AC LINE POWER TO THE 81124 ensure that the instrument is set to the local line voltage and the correct line fuse is installed in the fuse holder The instrument requires a power source of 100 120 220 or 240 V rms 4 596 10 at frequency of 48 440 Hz single phase The maximum power consumption is 120 VA The line voltage selector switch
257. p lines 250 to 350 every 2 second delay is incremented by 1 ms while width is decremented by 2 ms The current values are printed in the Display subroutine lines 440 to 490 Width finally reaches the value of 2 ms The output is not automatically disabled when the program is exited Program name DEL_WID This example shows how to program and increment some HP8112A parameters width and delay Addr 712 Device address of the HP8112A CLEAR Addr initialize interface and set HP8112A to standard setting A SPOLL Addr clear the status byte OUTPUT Addr PER40MS OUTPUT Addr HIL2 5V LOL 2 5V Set Period to 40 ms High Level 2 5V Low Level 2 5V OUTPUT Addr DEL9MS WID22MS Set Delay to 9 ms Width to 22 ms OUTPUT CLEAR SCREEN Enable Output PRINT The test signals are output now PRINT 7 8 Programming Examples 190 200 210 220 230 240 250 260 270 280 290 300 310 320 330 340 350 360 370 380 390 400 410 420 430 440 450 460 4TO 480 490 500 PRINT Every two seconds delay is incremented by 1 ms and width is decremented PRINT by 2 ms PRINT Delay and Width loop FOR 0 TO 10 New_del 9 I 1 New_wid 22 I 2 GOSUB Display Print the values for the Setup and Hold time 1 OUTPUT Addr DEL New_del MS OUTPUT Addr WID New wid MS WAIT 2 NEXT I LOCAL Addr Turn 8112 back to Local mode PRINT PRINT
258. pl Enable Disable Limit The timings given are worst case When parameter settings are combined into one programming message the combined implementation time can be up to 40 more efficient The Buffer Not Empty flag in the HP 8112 status byte is set during this time The system controller can therefore monitor this flag to detect when a programming message has been implemented Refer to Error Fault and Status Reporting Hardware Settling Time hardware requires time to settle after change This sometimes takes longer than the time taken to interpret and execute the message typically 5 ms Error Fault and Status Reporting HP IB Status Byte The HP 81124 is provided with the capabilities of requesting service from the controller the computer whenever the instrument detects an error To be able to determine if an error was caused Status Reporting Structures are required For this purpose the instrument contains the Status Byte register The Status Byte Register 5 is composed of seven single bit summary messages Each of the bits 0 thru 5 summarizes a specific type of error For example bit 0 represents all types of Limit errors See the operating manual of the HP 8112A Bit 6 of the STB is the Request Service RQS Bit and is set whenever a service request is caused Bit 7 indicates whether the Buffer is empty or not After a Serial Poll SPOLL the complete Status Byte is clear
259. ply 10 2 9 Programming 6 8 Shaper 10 4 11 U Wo W4 6 7 UNL 6 18 Waveform UNT 6 18 programming 6 7 Weight 2 7 WID 6 7 VCO IC 10 3 7 WIDC 4 8 Verification Tests 8 1 Vernier Index 4
260. press key for example to return the microprocessor to normal operation before troubleshooting Note The component layout and locator for the main board 1 is at the end of this chapter Shaper IC Inputs 1 Set up the HP 81124 as follows RCL 0 Output Enabled 2 Press the key 3 Use an oscilloscope to check the signals at pins 19 and 18 of U401 against Figure 10 4 6 Note that the signals on pins 18 and 19 are not necessarily symmetrical 0 26V PIN 19 0 14 0 26V 1 Qus gt 4 18 0 14 Figure 10 4 6 Shaper IC Input Signals on Pins 18 19 0 12 CENS 0 4V lms Figure 10 4 7 Shaper IC Output on Pin 12 4 Change the HP 81124 transition mode to FIXED 5 Check the output on U401 pin 6 against Figure 10 4 8 Servicing the Shaper and Output Amplifier 10 4 11 2 4V FIXED 2 3V lms Figure 10 4 8 Shaper IC Output FIXED 6 Change the HP 81124 transition mode to LINEAR or GAUSSIAN T Check the output on TP6 against Figure 10 4 9 0 05V LINEAR 0 05 _____ 05V GAUSS 0 05 2 1 Figure 10 4 9 Shaper IC Output LINEAR 8 Change the HP 8112A HIL to 4 0 99 V and transition mode to FIXED 9 Check the output on TP6 against Figure 10 4 10 5 5 Figure 10 4 10 Shaper IC Output FIXED HIL 0 99 V 10 4 12 Servicing the Shaper and Output Amplifier Transition Mode and Check the logic levels on shaper I
261. pulse width Input impedance Trig slope Bandwidth Input voltage limits Input impedance High level Low level Duty cycle Output impedance Propagation Delay EXT INPUT to TRIG OUTPUT 10 V adjustable 500 mV p p 20 V 10 ns 10 off pos neg both Trigger and Ext Width only 1 kHz 20 10 42 4 V into 50 Q 4 8 V into high impedance 50 500 25 ns Specifications 2 5 Main Output External voltage limits 0 V 45 V Amplitude 100 mV to 16 V 200 mV to 32 V pp Reflections 1096 Source Impedance 500 Short circuit capability Maximum peak current 150 mA for up to 1 hour 15 C to 35 C External voltage limits 45 0 Additional Features Set Non Volatile Memory Self test Error detection HP IB Capability Capability codes Learn modes Service request 2 6 Specifications Sets up square wave delay min LEE 10 PER or fixed Power down location saves current settings 9 programmable locations each stores a complete setup Standard settings location 100 us 1 V pulse at 1 kHz The instrument performs a self test when switched on and by HP IB command Visual and Status Byte indication of incompatible settings under range control voltage and clipped amplitude excessive transition time The HP 8112A is fully programmable except for the External Input trigger level 5 T6 L4 581 RL1 PPO DTI Al
262. r board and stand it vertically by placing the cut outs on the edge of the board over the locating lugs on the inside of the right hand side panel as seen from the front of the instrument 6 Remove the screen covering the control board T Lift the control board and stand it vertically on the inside of the left hand side panel Microprocessor Board V O O 0 Figure 10 1 3 HP 8112A in its servicing position Instrument Overview and Troubleshooting Guide 10 1 3 POWER KEY YES E JRMMED ES Gu NO LRMP TESTS TIMING TESTS 10 1 4 Instrument Overview and Troubleshooting Guide Key Jammed RAM Test Timing Tests Possible faulty A3 Processor Board ROM reset circuit or power supply fault restart signal A front panel key is stuck The instrument cannot be used until it is freed E01 The microprocessor is unable to load a test pattern into the RAMs U10 U11 and verify it In order to avoid influence from the control or main board remove the device bus cable from the main board Al at connector J2 See Chapter 10 2 mainlayout and from the control board A2 at connector J5 See Chapter 10 5 E11 Period generator U200 is not able to supply a period of 1 ms in MAN mode with a software trigger Possible failure of Period control circuit U4 U7 Error feedback U141 or trigger input stage U101 LDO and Q100 See Chapter 10 3 E12
263. r test T Press the key to turn off output disable mode and enable the output LED extinguished EXT INPUT mew OUTPUT TRIGGER LEVEL Figure 5 4 Typical signals in External Width mode 1 Switch the instrument on using the line switch 2 If neccessary select external width mode by repeatedly pressing the standard mode key until the E WID LED is lit 3 Apply the E WID signal to the EXT INPUT and select trigger slope and level as required Refer to Chapter 4 Operating for information on the trigger controls 4 Select the Transition mode by pressing the key with the appropriate symbol The parameter window will be automatically illuminated 5 Select each output parameter in turn by pressing its associated key Adjust the parameter value using the and keys Refer to Chapter 4 Operating for additional information on parameter adjustment 6 If a Control Function is required select the required mode by repeatedly pressing the control mode key until the required mode is lit Apply the Control signal to the CTRL INPUT connector Refer to Chapter 4 Operating for more permissible combinations of Operating and Control modes Note External Burst Mode Note E You may wish to set up Output Limits as described in Chapter 4 Operating to protect the device under test T Press the key to turn off output disable mode and enable the output LED extinguished EXT INPUT TRIG 1 50 duty OUT
264. ransistor U29A which discharges C4 and switches the output of U27D low The RESET signal to the microprocessor and GPIA is therefore established before their power supply is totally withdrawn 10 7 6 Servicing the Microprocessor and Front panel SERVICE Y mb m DATA BUS TRANSCEIVER 12 noe rem 513 RA 1 43 entan d ADDRESS BUS DRIVER A8 A15 ADORESS BUS ADDRESS BUS DRIVER 7 MODEL HP8112A FIGURE 18 7 4 MICROPROCESSOR BD A3 SCHEMATIC 1 SERVICING THE MICROPROCESSOR AND FRONT PANEL 10 7 7 LEER ERES HERPES PER 2 P O MICROPROCESSOR BOARD C31 8 1u HP IB CONNECTOR 318 41443 2207 J112 31013 410142 3264 3868 18683 3 08 z HP IB CONNECTOR FOR 5 REMOTE PROGR 2 5 4 N C 1 lt 1 B 423 42415 4168 2021 41 24 J2d2 J1 23 420149 41622 42618 71021 42418 41628 42628 4119 42622 91019 42 24 J2d8 5 29 ne Ban ete Ane ILL MC3448AL V 2 3 SERVICE RAM POWER RAM BATTERY SUPPLY SUB DECODER 8 RAM SELECT MODEL 112 FIGURE 10 7 5 MICROPROCESSOR BD A3 SCHEMATIC 2 SERVICING THE MICROPROCESSOR
265. rding to the following table Table 10 5 7 Typical Slope TRE Control DAC Output HP 8112A TRE Voltage at TP5 Amplitude Control 1 Set up the HP 81124 as follows RCL 0 LOL 8 0 Output Enabled 2 Check that U18 operates according to the following table 10 5 14 Servicing the Control Board Table 10 5 8 Amplitude Gain Control truth table HP 8112 Amplitude Setting HIL 48 0 V to HIL 42 0 V 1 99 V to HIL 7 9 V Offset Contro 1 Set the HP 81124 as follows RCL 0 Output Enabled 2 Check the offset DAC s output voltage against the following table If necessary you can also check that the DAC is receiving tlie correct data from the offset latches Table 10 5 9 Offset DAC Output Voltages HP 8112 Setting Voltage HIL LOL at 6 8 00 V 7 90 V 7 45 V 5 62 4 62 24 80 V 1 05 40 95 20 94 V 0 55 0 45 20 47 V 015 V 40 05 0 09 V 0 10 V 0 00 V 0 05 40 05 V 0 05 V lt 10 mV 0 00V 0 10 V 0 05 V 0 05 V 0 15 V 0 09 V 0 45 V 0 55 V 0 47 V 0 95 V 1 05 0 95 V 4 62 V 5 62 V 4 80 V 7 90 8 00 7 45 V Servicing the Control Board 10 5 15 Timer 1 Set the HP 81124 as follows RCL 0 PER 10 ps Output Enabled 2 Check the TIRE signal on U26 pin 4 is HIGH 3 Check U26 pin 3 for a 100 Hz signal 10 5 16 Servicing the Control Board
266. remote mode CLEAR 712 Clear HP 8112A status and select stan dard parameter set OUTPUT 712 CST Request current settings from HP 8112A ENTER 712 A Read the HP 81124 settings PRINT Display the HP 8112 settings 8 30 Testing Performance 3 Verify that the result is W2 D1 PER 1 0 MS DTY 50 HIL 1 0 V LOL 0 0 V M1 CTO T1 LO CO BUR 0001 DEL 65 NS WID 100 US DBL 200 US LEE 10 NS TRE 10 NS 4 Use the following program statements to change some instrument settings and then re read the current settings DIM B 161 Allocate controller memory to receive second status string OUTPUT 712 PER 10 MS Change settings DTY 107 W3 HIL 1 5 V Do OUTPUT 712 Request current settings from HP 8112A ENTER 712 B Read the HP 81124 settings PRINT B Display the HP 8112A settings 5 Verify that the settings are the same as before except for the following DO PER 10 0 MS DTY 10 4 HIL 1 50 V 6 Using the oscilloscope confirm that the HP 8112A output has the following form Pulses Square Period 10 ms Duty Cycle 1096 High Level 1 5 V Low Level 0 0 V Testing Performance 8 31 8 32 Testing Performance PERFORMANCE TEST RECORD Hewlett Packard 8112A 50 MHz Pulse Generator Serial _______________________ Report __________________________ Date U Test Facility Test Conditions Installed Options Ambient Temperature Relative Humidity ___________________ L
267. rigger Input Connect the HP 8112A output to input 4 of the oscilloscope Set the oscilloscope to display one pulse using the Delta t mode Observe LEE on the oscilloscope 10 90 of amplitude Adjust A2R37 for about 0 5 below programmed value i e 99 5 Set HP 8112 follows RCL 2 Observe LEE on the oscilloscope and adjust A2R32 for about 0 596 below programmed value i e 995 Repeat last two steps and re adjust if necessary Set the HP 8112A as follows RCL 5 Check LEE on the oscilloscope for 510 and gt 480 Step LEE up and down using the vernier keys and observe the oscilloscope for 296 deviation Set the HP 81124 as follows RCL 3 Observe TRE on the oscilloscope 90 10 of amplitude and adjust A2R38 for about 0 596 below programmed value i e 99 5 Set the HP 8112 as follows RCL 4 Observe TRE on the oscilloscope and adjust A2R35 for about 0 5 below programmed value i e 995 Repeat last two steps and re ad just if necessary Set the HP 81124 as follows RCL 5 Check TRE on the oscilloscope for 510 and gt 480 Step TRE up and down using the vernier keys and observe the oscilloscope for 296 deviation Set the HP 81124 as follows 26 2T 28 29 30 31 32 33 34 35 36 LEE 1 ms TRE 1 ms Observe TRE on the oscilloscope and adjust A2R27 for 1 000 ms 5 Switch COMPL on
268. rol See Chapter 10 5 and HILC input See Chapter 10 3 are used by the vernier block in the shaper IC to attenuate the output signal The IC output amplifier block is a differential output circuit whose reference currents are derived from the 6 2 V reference on the timing generator The differential output of the shaper IC requires current mirror output stage which eliminates the effect of quiescent currents and doubles the available output signal The operating principle is illustrated in Figure 10 4 2 and depends on and 1 being matched pair so that I Ip In the HP 8112A Q1A Q400A Q1B Q400B and Q2 Q402 In fixed mode Q403 is turned on switching the R430 C409 combination into the current mirror in order to improve its performance Servicing the Shaper and Output Amplifier 10 4 3 Pre Attenuator Signal Output Amplifier 1 AND QIB ARE I R MRTCHED PRIR b iR Figure 10 4 2 Current Mirror The pre attenuator circuit is controlled by the microprocessor via latch U500 Logic signals K4 control relays K500 K503 to provide three levels of attenuation according to the range of output voltage required Table 10 4 2 Pre attenuator ranges Attenuation Active Relay s Final Output Range 0 dB K503 10 to 16 V 4 dB K502 1 9 99 V 24 dB K500 amp 501 0 1 to 0 99 The output amplifier amplifies the signal received from the
269. rshoot Ringing lt 5 of amplitude 10 mV Settling time 107 ns 8 38 Testing Performance PERFORMANCE TEST RECORD Page 6 of 6 VERIFICATION TEST RECORD Hewlett Packard 8112A 50 MHz Pulse Generator Serial No 2 Report No Date Trigger Gate External Width and Burst Modes Trigger Positive trigger initiates one complete output cycle YES NO Gate Each gate leading edge releases train of output YES NO pulses last cycle completed External Width Each ext input pulse enables output pulse of same YES NO width External Burst Number of output cycles set burst number YES NO gt Output modes key functioning YES NO key functioning YES NO Limited output mode functioning YES NO key functioning YES NO key functioning YES NO Period Control PER WID Minimum and Maximum achieved YES NO YES NO YES NO 1000 ms 100 ms YES NO VERIFICATION TEST RECORD Page 1042 Testing Performance 8 39 VERIFICATION TEST RECORD Hewlett Packard 8112A 50 MHz Puise Generator Serial No Report Date _ UEE 0000000000000 Delay Control DEL Minimum and Maximum achieved 100 ns YES NO 10 us YES NO 1000 YES NO 1000 ms YES NO Width Control Minimum and Maximum achieved YES NO YES NO YES NO High Level Control 2 V level rema
270. s byte The conditions which cause them and the description used by the HP 8112A when replying to an IERR command are listed below The limit error bit is not latched therefore a transient error is only recorded by generating an SRQ More than one error condition can occur at one time When using the IERR command ensure that you allow for a reply containing more than one error description IERR Description Comments LIMIT ERROR This error appears only when the limit is on and Timing Error Bit 1 Note y Syntax Error Bit 2 Slope Error Bit 3 Note 9 a the programmed High level is greater than the limited High level b the programmed Low level is lower than the limited Low level LIMIT HILC This error appears only when the limit is on and a High level control has been selected b no High level limit is possible as HILC is an external control voltage There are two types of error shown for NORM mode only which set the timing error bit in the status byte The conditions which cause them and the description used by the HP 8112A when replying to an IERR command are listed below The timing error bit is not latched therefore a transient error is only recorded by generating an SRQ More than one error condition can occur at one time When using the IERR command ensure that you allow for a reply containing more than one error description IERR Description Comments DELAY ERROR Delay value is greater than P
271. s totally inoperable switch it off and disconnect the RAM back up battery for at least 30 seconds This will destroy the stored RAM data Re connect the RAM back up battery and switch the instrument on The Standard Parameter Set is now loaded into the RAM Change 42 change in manufacturing method introduced a part number change for a widely used 0 47 capacitor Backdating 29 Change 43 This change introduced a standardisation of switch part numbers no backdating action is required 0 000000 Change 44 For instruments with serial number 2739G06580 and lower This change introduced a staudardisation of switch part numbers no backdating action is required Main Board In Appendix A Table A 3 modify Reference Description HP Part Al 08112 66511 MP2 MP3 Insulator 08112 05401 Change 45 For instruments with serial number 2739G06930 and lower make the following changes to the appropriate parts list Main Board In Appendix A Table A 3 modify Reference Description HP Part 1 08112 66511 523 524 CAP 270 uF 40 0180 2455 In Appendix A Table A 3 delete Reference Description HP Part Al 08112 66511 W12 13 In Appendix A Table A 3 add Reference Description HP Part 1 08112 66511 F1 2 125 2110 0297 Note replaces W12 and F2 replaces W13 in Figure 10 2 3 and 10 2 6 B 30 Backdating Change 46 This change intro
272. se 130 D 7030 Boeblingen Federal Republic of Germany 2 00 Printing History New editions are complete revisions of the manual Update packages which are issued between editions contain additional and replacement pages to be merged into the manual by the customer The date on the title page and back cover of the manual only changes when a new edition is published When an edition is reprinted all the prior updates to the edition are incorporated No information is incorporated into a new edition unless it appears in a prior update Edition Print Date Manual Part No 1 February 1984 08112 90002 0284 1 January 1992 08112 90004 E0192 Safety This product has been designed and tested according to International Safety Requirements To ensure safe operation and to keep the product safe the information cautions and warnings in this manual must be heeded Preface Introduction Certification Warranty Limitation of Warranty This manual describes the following procedures for the HP 8112A 50MHz Programmable Pulse Generator m Installation m Operation Programming Performance Test m Adjustment m Service Hewlett Packard Company certifies that this product met its published specifications at the time of shipment from the factory Hewlett Packard further certifies that its calibration measurements are traceable to the United States National Institute of Standar
273. sent back to the HP8112A The current setting of the 8112 can be stored in another location with the command STO 1 9 For example STO 3 stores the current setting in location 3 Screen dump of the results printed when running the program INTERROG The current setting of the HP 81124 is M1 CTO T1 W2 SMO LO CO D1 BUR 0001 1 00 MS DBL 200 US DEL 65 0 NS DTY 50 4 WID 100 US LEE 10 0 NS TRE 10 0 NS HIL 41 00 V LOL 40 00 V The current setting of location 5 is SET5 M1 CTO T1 W2 SMO LO CO D1 BUR 0001 PER 1 00 MS DBL 200 US DEL 66 0 NS D TY 90 WID 500 US LEE 100 US TRE 100 US HIL 1 00 V LOL 4 56 V Width and slope error caused Errors read with IERR WIDTH ERROR EXCESSIVE SLOPE Response after command 1 00 MS Response after command HIL 1 00 V Response after IBUR command BUR 0001 End of the program INTERROG Program listing 10 Program name INTERROG 20 gt 5 lt lt lt 2 30 Function Demonstrate the usage of all types interrogate commands 40 offered by the HP81124 50 60 7 18 Programming Examples 70 80 90 100 110 120 130 140 150 160 170 180 190 200 210 220 230 240 250 260 270 280 290 300 310 320 330 340 350 360 370 380 390 400 410 420 430 440 450 460 470 480 490 500 510 520 530 540
274. sists of the following four parts as shown in Figure 10 2 1 m Line voltage selector and transformer m Voltage rectifiers and regulators m Voltage and current sensing circuits m Power down detection circuit REG gt REG 237 REG 3 5 1 LINE gt SELECT _ FAN REG gt 5 G Bue M gt 15V H 17 P D D a n Figure 10 2 1 Power Supply block diagram Refer to Figure 10 2 2 The line voltage selector switches S2 and 3 connect the incoming line voltage lines to an appropriate pair of transformer inputs The transformer provides six ac outputs and an earth line to the bridge rectifiers There are three bridge rectifiers all modular and therefore replaceable Servicing the Power Supply 10 2 1 Table 10 2 1 Power supply rectifiers Rectifier Output CR1 5 V DC CR2 23 V DC CR3 15 V DC The raw voltage outputs are all smoothed by capacitors as shown in Figure 10 2 3 The following supplies are then fed to voltage regulators with potentiometers to adjust the final voltage level Table 10 2 2 Regulated voltage supplies Supply Regulator Adjustor R18 R19 R24 R25 Voltage and Current The smoothed 5 V DC outputs of CR1 which drive the fan also Sensing Circuits provide the basis for the voltage and current sensing circuits which control the 5 1 V 5 V
275. stallation Storage and Shipment The instrument can be stored or shipped at temperatures between 40 C and 75 C The instrument should be protected from temperature extremes which may cause condensation within it Return Shipment to HP If the instrument is to be shipped to a Hewlett Packard Sales Service Office attach a tag showing owner return address model number and full serial number and the type of service required The original shipping carton and packing material may be re usable but the Hewlett Packard Sales Service Office will also provide information and recommendations on materials to be used if the original packing is no longer available or reusable General instructions for repacking are as follows 1 Wrap instrument in heavy paper or plastic 2 Use strong shipping container A double wall carton made of 350 pound test material is adequate 3 Use enough shock absorbing material 3 to 4 inch layer around all sides of the instrument to provide a firm cushion and prevent movement inside container Protect control panel with cardboard 4 Seal shipping container securely 5 Mark shipping container FRAGILE to encourage careful handling 6 In any correspondence refer to instrument by model number and serial number Installation 3 7 Operating Introduction Caution Caution This chapter explains the use of all controls indicators and connectors on the front and rear panels of the
276. t panel RSO RS2 The register select lines are connected to the three lowest address lines A0 A2 and allow the microprocessor to choose a GPIA register to read from or write to The interrupt request output allows the GPIA to interrupt the microprocessor RESET This input is used to initialize the GPIA The signal is the same RESET signal generated to reset the microprocessor E The enable input activates the address inputs R W input and enables data transfer with the data bus It is also used internally as a state counter allowing the GPIA to change interface states 15 connected to the micropocessor clock output 40 EIRG 38 37 35 isi Br 3 83 32 31 185 23 28 UR 27 26 RIN 25 Eo TRIG 23 22 REN NTC Figure 10 7 2 GPIA IC pins HP IB Interface Signals 0 7 Eight HP IB data lines DAC When valid data is received the GPIA switches DAC high to indicate that the data has been accepted RFD The GPIA switches the RFD line high to indicate that it is ready for data DAV The GPIA pulls the DAV linelow to indicate that it has valid data to transmit control the flow of data on the HP IB data lines ASE Enables a data bus driver U36 which allows the remote programmer to read the address set on the HP IB address switch Servicing the Microprocessor and Front panel 10 7 3 Address
277. t panel For example attempting to program a larger LOL than HIL OUTPUT 712 HIL 1 V LOL 2 V Refer to Fault and Status Reporting for details of error fault and status reporting using the HP IB Programming 6 5 Selecting Trigger Modes Standard Trigger Modes Action Mnemonic Select NORM Select M2 Select GATE M3 Select E WID M4 Select E BUR M5 Trigger Control Action Mnemonic Select trigger off TO Select positive trigger slope Select negative trigger slope T2 Select both T3 Example OUTPUT 712 M3 T1 Select GATE mode with a positive trigger slope Selecting Control Modes Mnemonic Switch off control mode Select PERC Select DELC Select WIDC Select HILC Example OUTPUT 712 CT2 Select Delay Control 6 6 Programming Selecting Output Waveform Mode Action Mnemonic Select fixed Select linear Select gaussian Select mode off Select mode on Example OUTPUT 712 W2 SM1 Select linear output waveform transitions Setting Parameters Note A parameter programming mnemonic is the same as its front panel description DEL delay for example Timing parameters Value Delimiter NS nanoseconds Action Set period Set delay Set double pulse Set width Set leading edge Set trailing edge US microseconds MS milliseconds Set duty cycle Example OUTPUT 71
278. t procedures The Power Supply and Preliminary adjustment procedure must always be carried out after any repairs If any re adjustment is required during this procedure then all the remaining procedures must be carried out If no re adjustment is required during the Power Supply and Preliminary adjustment procedure then only those procedures which the repair could affect need to be carried out Adjustment Procedures 9 1 Warning 9 Always carry out an adjustment procedure completely and in the order in which it is presented If the HP 81124 is very badly out of adjustment turn A1R413 fully clockwise and all other adjustment potentiometers to their mid position Then carry out all the adjustment procedures Some of the adjustment procedures may require components to be changed These components are summarised in Table 9 1 Do not change a component while power is connected to the instrument Figure 9 8 and Figure 9 9 at the end of the chapter show the locations of all the adjustment points in the instrument Table 9 1 Adjustment Procedures Changeable Components Procedure Overshoot A1C409 Transition Times Reference 1 414 1 501 A1C502 16528 16532 16535 1 541 A1C200 A1R211 A2VR2 and A2R62 A2R2 A2R53 9 2 Adjustment Procedures Range Description 0 pF open 3 3 pF Increasing the value decreases transition times and increases overshoot in Fixed mode
279. te 10 20 30 40 50 60 TO When programming the HP 8112 it must be considered that the instrument needs some time to m receive the commands m interpret the commands m update the Status Byte The hardware settling time must also be considered See Chapter 2 Specifications for more details When command is sent to the HP 81124 the device places all received characters into a buffer Interpretation of the command s starts as soon as a valid terminator is received To determine if the buffer is empty or not read the Status Byte by conducting a SPOLL If bit 7 is set decimal value of the STB is bigger than 127 then the buffer is not yet empty Whenever the status byte is read directly after sending a command the HP 8112 should be given sufficient time to update the status byte The time needed varies with the type and number of the commands sent For single commands 100 to 200 ms should be adequate Example CLEAR 712 SPOLL 712 OUTPUT WID 10 MS causes error WAIT 2 give 81124 time to update the STB PRINT Status Byte A END If the wait period in line 50 is too low the value of the Status Byte printed in line 60 will be 128 This indicates that the buffer is not yet empty An adequate wait period here 200 ms will give the HP 8112A enough time to process the command and update the status byte As expected the value of the status byte printed in line 60 will therefore be 74 Pr
280. ted modes All parameters are described below Pressing a parameter key selects the parameter indicated by the illuminated mnemonic above the key The current value of the selected parameter is shown on the digital display The parameter units are indicated by the LEDs to the right of the display The currently selected parameter is adjusted using the and rocker keys Each key increments or decrements the corresponding digit in the digital display Similarly the key increases or decreases the parameter value by a factor of 10 When selected allows the period of the HP8112A output signal to be set and or adjusted In EBUR mode this key is used to set the number of pulses between 1 and 1999 which will comprise the burst Operating 4 13 Delay Double Key Width Duty Key Leading and Trailing edge Keys High and Low level Keys Note Set Key 4 14 Operating DEL Enables the operator to set the desired delay between TRIG OUTPUT pulse and HP 8112A OUTPUT pulse DBL When selected double pulses are output their characteristics being defined by the parameter settings The width of each pulse is either equal to the WID setting or half the DTY setting The range of delay between the two pulses is 20 ns to 950 ms Enables pulse width to be set between 10 ns and 950 ms DTY Pulse duty cycle is variable from 196 to 9996 Percentage values are shown on the digital display These two keys are used in conjunction w
281. tes pulse widths and delay times by utilizing a variety of trigger and gate mode inputs CUR REF BURST ON EXT C EXT C1 GND 5 2V GND ERROR OUT o OUTPUT SWITCHING 6 DECADE COUNTER TRIGGER SELECT TRIG IN RRNGE CONTROL INPUT STORE GRTEZTRIG 1 TRIG NEG 5 z eq o 5 E e TIME RRTE TRIG POS Figure 10 3 1 Timing IC block diagram Refer to Figure 10 3 1 and Figure 10 3 6 The timing IC has an input store containing 8 control bits which control the mode of the IC Table 10 3 2 IC Digital Control Signals Function positive edge on this pin latches all the digital control signals into the input store CONTROL ENABLE GATE TRIG TRIG POS TRIG NEG TIME RATE MODE RANGE C RANGE B RANGE A Selects trigger or gate Positive trigger Negative trigger Selects TIME or RATE mode Always 0 in this application Range selection refer to Table 10 3 3 Timing Generation The main timing element of the IC is a voltage controlled oscillator VCO which has two ranges of operation in each of the two operating modes see TIME and RATE below These two basic ranges time and frequency are further divided if necessary by switching divider circuits 6 x decade counters into oper
282. test procedures designed to test the electrical performance of the HP 8112A against the Specifications and Operating Characteristics given in Chapter 2 Specifications The tests described are in two groups Performance tests which check warranted Specifications and Verification tests which verify Operating Characteristics m Period Delay Double Pulse m Pulse Width m Constant Duty Cycle m Output Levels m Transition Times m Pulse Performance Trigger Gate External Width and External Burst modes m Man 1 Pulse Limit Complement and Disable m Store and Recall Functionality m Period Control m Delay Control m Width Control m High Level Control HP IB Capability The tests can be used for incoming inspection troubleshooting or preventative maintenance Note that to prove that the instrument is within specification only the Performance Tests have to be carried out The test results can be recorded on a copy of the Test Records which follow the test procedures Test results recorded at incoming inspection can be used for comparison after carrying out maintenance repair or adjustments The tests must be performed with the HP 8112A in its normal operating condition that is with all shields connections and the case in place Testing Performance 8 1 Test Equipment Table 8 1 Test Equipment Instrument Recommended Required Characteristics Alternative Model Counter HP 5335A 50 MHz Start Stop
283. than the periodic time will cause ERROR OUT to become active Normal output OUT is passed via level shifter Q220 to the width generator trigger input Width Generator The width generator working in TIME mode produces an output of equal repetition rate to its trigger input but whose width is dependant on the analog inputs internal range data In DBL mode the width generator is configured to produce an output pulse at both leading and trailing edges of the trigger pulse from the delay generator See Figure 10 3 2 for an example of signal generation An output pulse width which is greater than the periodic time will cause ERROR OUT to become active Normal output OUT is passed directly to the Slope Generator IC Slope Generation 1 TRIG IN byes I a 23 ERROR our za mone U f VIRT GND lout aras 7 lz s 5 2v Figure 10 3 3 Slope IC block diagram Refer to Figure 10 3 5 and Figure 10 3 3 When triggered by the output of the width generator the Slope IC U301 operates in one of two transition modes Fixed Transition In fixed mode fixed 4 5 ns transitions an ECL trigger output is used by the Shaper IC See Chapter 10 4 to produce fixed transition time output pulses With fixed mode selected the input trigger signal on pin 1 is passed via ECL circuitry to the EECL output pi
284. the instrument s RAM along with the current instrument settings m You can only change the address in NORMal trigger mode immediately after switching the instrument on Pressing the key at any other time displays the current address while the key is depressed but no change is possible m When allocating HP IB addresses make sure no instruments on the bus have the same address If the RAM battery fails the HP IB address is set to 12 when the instrument is switched on To change the instrument s HP IB address 1 Switch the instrument on 2 If the instrument is NOT in NORM trigger mode a Select NORM trigger mode b Switch the instrument off and on again 3 Press the key The current HP IB address is displayed on the frontpanel 4 Use the vernier keys to change the address Programming 6 1 Local Remote and Local Lockout 6 2 Programming 5 Press the key again to set the new address Local mode In this mode the RMT LED is off the front panel is used to operate the instrument and programming messages are ignored You can select local mode in the following ways Switching the HP 8112A on Pressing the key if Local Lockout is inactive Sending an HP IB Local command to the instrument from the system controller use the LOCAL statement in BASIC 5 0 5 1 LOCAL 712 The output signal and all instrument settings remain unchanged following a change from remote to local mode Remote mode In
285. through all addresses continuously To set the microprocessor to free run 1 Move the jumper on J4 to the free run position 2 Disconnect the W4 the cable to the Control Board to force NMI high 3 Reset the microprocessor by shorting TP RES to ground the pin beside TP RES for a short time When you have finished testing return the jumper on J4 to its normal position and reconnect W4 The address bus drivers and decoders can be checked using signature analysis 1 Set the microprocessor to free run as described in Free Running Signature Analysis and connect the signature analyzer probes as given in Table 10 7 2 Table 10 7 2 Signature Analyzer Probe connections Connect to SA Trigger TP gp Ground 2 Verify the reading at microprocessor 4 5 V supply is is 0003 If it is not the microprocessor is not free running 3 Use the data probe to check the signatures given in Table 10 7 3 Servicing the Microprocessor and Front panel 10 7 15 Table 10 7 3 Signatures for Address Drivers and Decoders 03 U4 012 U13 014 010 036 017 018 021 1 667C 2 50 3 6F9A 0002 5 4 5 0759 190 1 90 3P76 6 8759 7 0356 4868 41P4 748C 503 9HIH 8 UUUU 9 1U5P 4FCA 31AC 8069 1FH6 3P76 9HIP 10 36F8 U638 HC8A 8U95 11 4685 9 6 25 55F4 C898 9HIP P763 6028 2000 359H C898 T9HU 65 5
286. timing data against Figure 10 6 3 10 6 6 Servicing the Burst Control Circuit BOARD A2 LEVEL OSCILLOSCOPE SCREEN TIME DIV ues ws 0105 3 ECL CHECK WITH ECL PROBE 0 2 lt 105 2 ECL lus 0105 15 ECL CHECK WITH ECL PROBE Q 2ms 0105 14 ECL lus Ui0672 ECL A c lus Ulll74 TTL CHECK TTL PROBE 2 lt 0111714 TTL qe 2us Ulll 12 TTL 20us 0111413 TTL Seus Ull2712 TTL 0 2 lt 0 2 lt Tu CHECK WITH TTL PROBE Figure 10 6 3 Burst counter waveforms and timing Servicing the Burst Control Circuit 10 6 7 10 7 Servicing the Microprocessor and Front panel Theory of Operation Introduction Bus Keyboard Address Bus Scanner The microprocessor board is the control center of the HP 8112A The microprocessor monitors the keyboard and HP IB interprets the key presses and commands and implements them by sending control data to the control circuits and updating the front panel display and LEDs When in remote control mode all the front panel keys except LcL are ignored by the microprocessor If the local lockout command has been received on the HP IB then the key is also ignored Keyboard Eos Address Decoding Tra
287. tings Example Timing s apace uk M Data Transmission Time Send 5 xac ATSWeP c Implementation Time Hardware Settling Time Error Fault and Status Reporting HP IB Status Byte Limit Error Bit 0 6 1 6 1 6 2 6 3 6 3 6 4 6 4 6 4 6 4 6 4 6 6 6 6 6 6 6 6 6 6 6 7 6 7 6 7 6 7 6 7 6 8 6 8 6 8 6 8 6 8 6 8 6 9 6 9 6 9 6 9 6 9 6 9 6 10 6 10 6 10 6 11 6 11 6 11 6 11 6 12 6 12 6 12 6 12 6 12 6 12 6 13 6 13 6 13 6 14 Timing Error Bit 1 Syntax Error Bit 2 Slope Error 53 Example 09 03 Duty Cycle Error Bit 4 Input Error Bit 5 Service Request Bit 6 PEE ES Buffer not Empty Bit 7 Universal Commands DEL gh ae SDC vere Sexe vert GET A ape ere sat Rt E Hints for solving Problems that might occur Reading the Status Byte Examples Terminators WA edes E Possible Problem with SPOLL Interrogate Timing Programming Examples Introduction General Examples Common Task Examples Testing communication Performin
288. tings command used to read the current instrument state LF line feed ASCII character with the ASCII code 10 STB Status Byte Register RQS Request Service Bit SRQ Service Request SPOLL Serial Poll used to determine whether a device is requesting service returns the value of the Status Byte Register PPOLL Parallel Poll not supported by the HP 8112A Learn ASCII string returned after a CST command contains String all necessary commands to set the HP 8112 to its present state The Learn String may later be sent back to the device to place it in this state The HP 8112 accepts the following terminators a CR LF the default EOL sequence m EOI only CR LF and EOI m LF and EOI LF alone is not accepted as terminator when the HP 8112 is connected to a HP9000 Series 200 300 controller When connected to other controllers the HP 8112A may accept LF as terminator The HP 81124 itself terminates data message sent to the computer with CR LF followed by a SPACE character The EOI line is not polled by the HP 81124 Programming 6 3 Programming Note E Multiple Commands 6 4 Programming To select an operating mode or to set a parameter to a specific value the appropriate ASCII mnemonic must be sent to the HP 8112A Example To set the Operating Mode to TRIG the ASCII mnemonic M2 has to be sent to the HP 8112A HP Basic Statement for this is OUTPUT 712 M2 When programming parameters such as
289. to 9 99 ms Adjust the range low end with A2R15 for approx 1 above the programmed value i e 10 1ms Alter HP 8112A DEL to 3 5 ms Adjustment Procedures 9 11 Note 9 12 Adjustment Procedures 28 29 Check that the mid range for 3 5 ms is 50 ms Repeat steps 18 to 28 and re adjust if necessary If the adjustment is not possible add the value of A2VR4 R64 See table 9 1 and repeat steps 18 to 28 30 31 32 33 34 35 36 3T 38 Set the HP 81124 as follows PER 200 ns DBL 20 ns WID 10 ns LIMIT Off Connect HP 8112A Trigger Output via a 20 dB attenuator to Ext trigger of the HP 54121A Connect HP 8112A Output via a 20 dB attenuator to input 4 of the HP 54121A Press and adjust A2R13 for 18 ns 0 3 ns at 50 of amplitude See Figure 9 5 50 200ns PER Figure 9 5 Double Pulse Adjustment Alter HP 8112A DBL to 99 9 ns Adjust A2R61 for 100 ns 1 ns at 50 of amplitude Alter HP 8112A DBL to 50 ns Check that the mid range reading for 50 ns 215 at 5096 of amplitude If necessary repeat steps 30 to 37 and adjust if necessary Width Adjustment Equipment Procedure Note 1 Counter HP5335A Oscilloscope HP 54121T 1 Set up the HP 8112 as follows Trigger Mode NORM Control Mode Off PER 20 ms DEL 65 ns WID 1 ms Transition Fixed HIL 3 0 V LOL 0 0 V COMPL Off DISABLE Off LIMIT Off Set the counter to TIME
290. to protect the device under test 8 Press the key to turn off output disable mode and enable the output LED extinguished EXT INPUT 7177 qup qu 12 11 50 duty cycle Figure 5 3 Typical signals in Gate mode 1 Switch the instrument on using the line switch 2 If neccessary select gate mode by repeatedly pressing the standard mode key until the GATE LED is lit 3 Apply the external gating signal to the EXT INPUT and select trigger slope and level as required Refer to Chapter 4 Operating for information on the trigger controls Triggering can also be simulated using the key 4 Select the Transition mode by pressing the key with the appropriate symbol The parameter window will be automatically illuminated 5 Select each output parameter in turn by pressing its associated key Adjust the parameter value using the and keys Refer to Chapter 4 Operating for additional information on parameter adjustment Operating Examples 5 3 Note External Width Mode 5 4 Operating Examples 6 If a Control Function is required select the required mode by repeatedly pressing the control mode key until the required mode is lit Apply the Control signal to the CTRL INPUT connector Refer to Chapter 4 Operating for more permissible combinations of Operating and Control modes You may wish to set up Output Limits as described in Chapter 4 Operating to protect the device unde
291. trolled by an external voltage applied to the CTRL INPUT The control mode can be cycled through available options by pressing the key below the mode indicators and the currently active mode is shown by an LED indicator Table 4 1 indicates the permitted combinations of control and operating modes Table 4 1 Operating Control Mode Combinations PERC DELC DBLC WIDC HILC Period Control PERC Control input sensitivity is 1 0 V to 10 0 V 2 0 V to 10 V in the 20 ns to 100 ns range and period ranges from 20 ns to 1 s are available in eight non overlapping decades See Figure 4 5 The decade is selected by setting PER within that decade i e PER 3 would mean than control input voltage cycling between 1 V and 10 V will control the period between 1 and 10 Whatever the value you select for PER the upper limit for that decade is displayed 10 us if 3 us was selected as above The vernier keys are inoperative and the Range key is used to change range Delay Control DELC Control input sensitivity is 1 0 V to 10 0 V Minimum delay is 75 ns and a maximum delay of 1 second is obtainable In DBL mode the time between pulses will be varied by the control input when DELC is selected See Figure 4 5 Width Control WIDC Control input sensitivity is 1 0 V to 10 0 V and width range 10 ns to 1 s in eight non overlapping decades See Figure 4 5 High Level Control HILC High Level control is available i
292. uP Board Connections Start TP SA Stop TP 5 Clock x Verify that the reading at the Microprocessor 5 V is 0003 If it is not then the microprocessor is not free running Check the signatures of U16 against those given in Table 10 6 1 Table 10 6 1 Output Address Decoder Signatures U16 Mnemonic Description Free run Signature 1 Sub decoded address 2 Sub decoded address 3 Sub decoded address 4 amp 5 Sub decoded address 9 Load Burst Counter 10 High Byte Burst 11 Low Byte Burst Servicing the Burst Control Circuit 10 6 5 Burst Counter Test the burst counter circuits using the following procedure 1 Set up the HP 8112A up as follows PER 1 4 E BURST DTY 5096 BUR 1024 2 Switch off the HP 8112A 3 Desolder wire W3 on the control board A2 and resolder it to the test position This pulls BURST ON low via 105 4 Connect A1 U201 pin 10 to ground 5 Switch on the HP 8112A and check that error number E52 is displayed 6 Press 7 Press the button 8 Check the TTL logic levels at the burst acceptors U100 and U101 as follows Table 10 6 2 Signal Pin Level 117100 2 L U100 Pin5 L U100Pin6 L 0100 9 L 0100 12 L 0100 15 L 0100 16 L 0100 19 L 9101 2 L 101 5 L 0101 Pine 9 Using an oscilloscope and ECL and TTL logic probes you can test the burst counter waveform and
293. ued Reference HP Part Qty Description Manufr Part 4 12 5041 0351 7 1 28480 5041 0351 A4 MP13 5041 0351 28480 5041 0351 4 14 5041 0516 28480 5041 0516 4 15 5041 0285 28480 5041 0285 4 16 5041 0285 28480 5041 0285 28480 5041 0351 28480 5041 0351 28480 5041 0342 28480 5041 0285 28480 5041 0285 17 5041 0351 4 1 5041 0351 4 19 5041 0342 4 20 5041 0285 4 21 5041 0285 28480 5041 0285 28480 5041 0285 SW PB SPST 04486 5560 9436 SW PB SPST 04486 5560 9436 SW PB SPST 04486 5560 9436 4 22 5041 0285 4 23 5041 0285 4 51 5060 9436 4 52 5060 9436 A4 S3 5060 9436 SW PB SPST 04486 5560 9436 SW PB SPST 04486 5560 9436 SW PB 5 5 04486 5560 9436 SW PB SPST 04486 5560 9436 SW PB 5 5 04486 5560 9436 A4 84 9060 9436 A4 S5 9060 9436 A4 S6 5060 9436 A4 ST 5060 9436 A4 S8 9060 9436 lt lt e SW PB SPST NO 04486 5560 9436 SW PB SPST 04486 5560 9436 SW PB SPST 04486 5560 9436 SW PB SPST 04486 5560 9436 SW PB SPST 04486 5560 9436 4 59 5060 9436 4 510 5060 9436 4 511 5060 9436 4 512 5060 9436 A4 513 5060 9436 lt lt 4 514 5060 9436 7
294. uffer not Empty flag Program Description DEL WID Shows how to program and increment decrement some HP 8112A parameters SPOLL 2 Shows how to service a SRQ by directly conducting a SPOLL INTR 2 Shows how to service SRQ s by using interrupts and print the error bits which are set in the status byte ERROR_DEMO Demonstrates how to determine which error bits are set in the status byte LRN_DEMO Shows how to read the Learn String with the CST command and how to send it back to the HP 8112A INTERROG Demonstrates the usage of all types of interrogate commands offered by the HP 8112A In the examples it is not strictly necessary to put the HP 8112A into remote mode using the REMOTE 712 command because m The CLEAR 712 statement used to initialise the instrument also selects remote mode m The OUTPUT statement itself selects remote mode However the REMOTE statement is included for completeness Programming Examples 7 1 Testing communication 7 2 Programming Examples START Put 8112A into remote mode Set 8112A delay to 100 ms Interrogate 8112A delay setting Print 8112 delay value mu Programming applications should include an initial check that the HP 8112 is communicating correctly A suitable quick check is to set a parameter to a particular value and then read it back as illustrated by the flow chart and program example given here
295. ulses Press the key and confirm that the counter reading increments to 473 Period Control Verification Test Characteristics Equipment Test Setup HP 62378 HP 3324A Pulse Period 1 10 ratio Control Voltage 1 0 V to 10 V Period Ranges 20 ns to 1 0 s in eight non overlapping decade ranges Bandwidth 1 kHz Counter HP 5335A m Variable Power Supply HP 6237B or HP 3324A Cable Assembly 2 off m 50 Q Feedthrough Termination BNC to Banana plug adaptor Counter 53354 On HP 8112A Figure 8 15 Period Control Verification Test Testing Performance 8 23 Procedure 1 Connect the equipment as shown in the setup figure 2 Set up the HP 8112A as follows Trigger Mode NORM Control Mode PERC Transition Fixed DEL 65 ns HIL 2 00 V LOL 0 00 V 3 Vary the power supply or HP 3324 in DC Mode between approximately 1 volt and 10 volts and verify that the counter display indicates a range of periodic times which agree with the specified limits for each of the HP 81124 settings below HP 8112A Counter setting reading Delay Control Verification Test Characteristics Pulse Delay ratio 1 10 Control Voltage 1 0 V to 10 V Delay Ranges 10 ns to 1 0 s in eight non overlapping decade ranges The fixed 55 ns delay of the instrument has to be added to the delay induced by the CTRL voltage Bandwidth 1 kHz Equipment Oscilloscope HP 54121T Count
296. ut LED extinguished er J LIU ww J JL LJ Figure 5 2 Typical signals Trigger mode 1 Switch the instrument on using the line switch 2 If neccessary select Trig mode by repeatedly pressing the standard mode key until the TRIG LED is lit 3 Apply the external trigger signal to the EXT INPUT and select trigger slope and level as required Refer to Chapter 4 Operating for information on the trigger controls Triggering can also be simulated using the key 4 If a modulated output is required select the required modulation using the key Apply the modulating signal to the CTRL INPUT connector Refer to Chapter 4 Operating for more information on modulating the output signal 5 Select the Transition mode by pressing the key with the appropriate symbol The parameter window will be automatically illuminated Note Gate Mode 6 Select each output parameter in turn by pressing its associated key Adjust the parameter value using the VERNIER and keys Refer to Chapter 4 Operating for additional information on parameter adjustment T Control Function is required select the required mode by repeatedly pressing the control mode key until the required mode islit Apply the Control signal to the CTRL INPUT connector Refer to Chapter 4 Operating for more permissible combinations of Operating and Control modes You may wish to set up Output Limits as described in Chapter 4 Operating
297. ver shoot 16 17 Set the HP 81124 as follows Transition Fixed HIL 410 5 V LOL 0 5 V LIMIT Off Remove one of the two 20 dB attenuators and set attenuation factor to 10 18 Take full screen display on the scope Check that the transition times 4 8 ns in both normal and complement modes 19 Set the HP 8112 to Linear transition 20 Measure the transition times are 6 2 ns Note Transition times can be increased by increasing the overshoot If Overshoot Transition times adjustment cannot be achieved within specification change values of A1C532 C409 See table 9 1 and repeat steps 1 to 15 Adjustment Procedures 9 9 Timing Equipment Procedure 9 10 Adjustment Procedures Counter HP 5335 Oscilloscope HP 52141T Period 1 Set up the HP 81124 as follows Trigger Mode Control Mode PER DEL DTY Transition HIL LOL COMPL DISABLE LIMIT NORM Off 1ms 65 ns 50 Fixed 43 0 V 0 0 V Off Off Off Set the counter for Period measurement Connect HP 8112A output 502 feedthrough to the counter The typical period accuracy of the period decades is as shown in Figure 9 4 2 PERIOD Figure 9 4 Decade Accuracy Adjust the range high end with A2R4 for approx 1 above the programmed value i e 1 01ms Alter HP 8112A PER to 9 99 ms Adjust the range low end with A2R6 for approx 196 above the programmed value 10 1ms
298. witches its output towards its positive supply This Power Down Detected signal is used on the microprocessor board to ensure that the microprocessor and HP IB switch off cleanly Refer to Chapter 10 7 Servicing the Microprocessor Servicing the Power Supply 10 2 3 10 2 4 Servicing the Power Supply SERVICE P O A1 MAIN BOARD LINE VOLTAGE SELECTOR MODEL 112 FIGURE 18 2 2 MAIN BOARD A1 SCHEMATIC 1 SERVICING THE POWER SUPPLY 10 2 5 1 P O A1 MAIN BOARD 24V UNREG C14 lt COMMO 6 t gu Y 22866 1145 e 2288 5V T 4123 24v REG J1 3 see 1 15V ADJ ke 10000 E D i ic s 2 3 SERVICE 23 wiz 8 018 44016 4794 6 6u 34418 44028 4403 4409 V 15 2 4 CONTROL BO TO A3 MICROP BO TO A2 J4 CONTROL BO 9414 9415 9 o 4784 1B MODEL 1 12 FIGURE 10 2 3 MAIN BOARO A1 SCHEMATIC 2 SERVICING THE POWER SUPPLY 10 2 7 Troubleshooting the Power Supply Removing the fan Re fitting the fan BLACK RED 53 WHITE RED GREY BLACK YELLOW Figure 10 2 4 Detail of wiring to Line Voltage Selector switches Starting with the instrument in its Servicing position 1 1 Unplug the red and blue wires connecting the fan to the main board

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