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CRYPTREC Report 2011 暗号実装委員会報告書

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Contents

1. N FARI TEMM ty 2 1 NS JA PIENE gt A E G 3 l reference
2. 2012 3 I A T TIU N 2011 FMZ 6 FIPS RAL CARY bhRE EM mix WS GPKT
3. 10 First Experimental Results of CHES 2011 2011 09 29 Toshiki Nakasone Daisuke Correlation Enhanced EMA Poster Session Nakatsu Yang Li Kazuo Collision Attack Ohta Kazuo Sakiyama 11 High performance Architecture IEICE Trans 2011 10 Takeshi Sugawara Naofumi for Concurrent Error Detection Fundamentals Homma Takafumi Aoki and for AES Processors Vol E94 A Akashi Satoh No 10 pp 1971 1980 2011 12 Intentional Electromagnetic EMCCOMPO 2011 11 08 Yu ichi Hayashi Shigeto Interference for Fault Analysis 201142 2011 Gomisawa Yang Li Naofumi on AES Block Cipher IC Homma Kazuo Sakiyama Takafumi Aoki and Kazuo Ohta 13 ISEC 2011 49 2011 11 15 Bb E 14 AAn On chip Glitchy clock Journal of 2011 12 Sho Endo Naofumi Homma Generator for Testing Fault Cryptographic Takeshi Sugawara Takafumi Injection Attacks Engineering Aoki and Akashi Vol 1 No 4 pp 265 27
4. FIPS 140 3 Ht ISO IEC 19790 1 1 2 2003 2004 2005 4 F AIST16 1 f um Jvw0 4 4t RCIS1 ISO IEC JTC1 SC27 ISO IEC 19790 8 NIST National Institute of Standards amp Technology
5. m 2011 4 RAR 2011 4 vive SUA dE KAE Hu SEHE 2011 7 i8 2011 9 2011 12 Se ig E E 5 3 EG E5 1 1 1 CRYPTREC 3 3 Be E
6. 1 qul mmi o qn as vl PCN L E E nni QA e o wee
7. C 4 1 3 26 34 E 2 2
8. 3 INSTAC 8 32 30 AES Advanced Encryption Standard CK 31 DES Data Encryption Standard IB XE 15 SASEBO 1 2 3 4 5 2009 1
9. FO CMAC AES CMAC f 2 7 011 11 160 10 25 128 128 3
10. uu 23 Lr o nu 6 A B A ISE WebPACK Ox due E
11. i 1 2 3 2011 CRYPTREC Report URL http www cryptrec go jp report html CRYPTREC info cryptrec go p 1 GPKI Government Public Key Infrastructure me ALC ti 2 1 IPA NICT
12. 3 IEE REA nee LILETI A Nm H mmm SRA fy 5992 7 BRASS IRRE 2 PIRRE Hf PF pt LAR In R LT RS 5 ThE Se d i ari 3 thee HA EFE LRE AP HB OMSR RAL EHAT pdt TORIA Uit MUGI 0 Null cipher 2 3 22 uu i i uu i i uu i i d 1 2 3 3 2
13. 1 FPGA 2 A B 21 oo a ai BTS B l bone ng ng 2
14. B ISE pa C D r E E G roll unroll HD EWE D uu 21 4 RARER OW 2009
15. CMVP CRYPTREC NIST FIPS140 2 TIPS 140 2 FIPS 140 3 FIPS 140 3 TETIPS 140 3 ISO IEC 19790 E3 30 EOD ISO IEC 19790 2nd ed 1st WD FIPS 140 3 2010 2 E
16. CRYPTREC CRYPTography Research and Evaluation Committ 2000 ees 2 2003 Pay n tere acce 2002 3 CRYPTREC 29 2003
17. NTT 8 fel d 2011 7 RBE 7k 2011 10 MBA 2011 9 2011 7 2011 10 fit fay TSE 2011 9 p 2011 7 KEEB
18. 1 2000 eee TPA LI E 5 NICT 2001
19. L 2003 4 2003 1 ISO IEC RL HEED a gie 1 27 28 1 2 E 0 E235 RO 2
20. WG MEA H Wee a f I 2013 2009 4 WG WG E 1 1 1 2003 3
21. JIS X 5091 2007 1 FIPS 140 2 ISO IEC 19790 2006 ISO IEC JTC 1 SC 27 19790 ISO IEC 24759 7 25 2 24759 SC 27 14 LICS 2 FIPS 140 3 NIST iX FIPS 140 2 FIPS 140 3 7 13 28
22. de E DPA32 SPA33 2 8 2 18
23. 2 FIPS 140 3 SASEBO W3 7 SASEBO 1 1st CD 1st WD 2nd WD FIPS 140 3 ISO IEC 19790 2011 2009 1 ISO IEC19790 1st CD 2011 9 lL loo 4 FIPS 140 3 DTR ISO IEC 24759 1st WD 2011 6 2nd WD 2012 1 ISO IEC JTC1 SC27 WG3
24. 2011 3 3 1 3 1 2011 H 1 2011 9 12 14 00 16 00 2 2011 12 19 13 307 15 30 3 2012 2 13 13 30 15 30 3 2 WG 2011 WG 3 3 2 3 2 2011 WG
25. a ce js a 8 CPU INSTAC 8 CPU 82 CPU INSTAC nu c zu gt HLT alli alli 9 Field Programmable Gate Array 12
26. 2 3 ISO IEC 19790 FIPS 140 3 ISO IEC 19790 ISO IEC 24759 8 2 2 ISO IEC SC27 WG3 uu 16 1 3 2 2011 2011 pa VICES SE 2011
27. AES ECB MUGI AES CMAC 7 B 7 A DLL B C Lak f lS D ZWE E LEDER Y Wi LB UO 2 1 8
28. Tut 3 2011 8 15 2011 12 15 2011 12 A 15 H 2012 1 831 H 4 A B C 5 A B C E 1 Xilinx Virtex 5 LX50 SASEBO GII FPGA ISE WebPACK Version 12 4 CD ROM Web SEE AR m E 1 128 ECB
29. 2 H fag N 478 721 2039 l x SRR DLL te LLLLTITITTI mM LELETLTTA H HHgHHHHHHHHHHHHI mE M22 3 2011 6 10 2011 8 15 PC sa 2011 10 H F 11
30. ISO2IEC3 NICT IPA NICT IPA NICT IPA 1 1 1 2 3
31. 2009 2 2009 3 ISO IEC 19790 FIPS 140 3 ISO IEC 19790 WG lec 2010 1
32. XE uil SASEBO18 IR FIPS ISO IEC JTC1 SC27 2008 FIPS 140 3 ISO IEC 19790 INSTAC 8 32 INSTAC 8 INSTAC 32 5 TT FIPS 140 3 WG ig SER TZ BRAIN ze AL E 2009 WG
33. WG XX Eod WG a4 E x Teg H gt s E As ROED 2006 4 Hr LX NR 12 Mm lt Me E OT RR ZEE ZC AML MRE pee pase Attack NO gh 2j RBS Oo CHC EDs FIPS4 Federal Information Processing Standard PUB5
34. 18 2 1 1 e mM 18 2 1 2 19 2 1 3 21 2 1 4 m Sf Edin tafe Nia Cute DEI TEE PD eT eee ur e e Ld err 25 2 45 eee mH 26 2 1 6 dudes exuta o ee k LE 26 2 9 va 4 suis ome dov diea ada qat Cra a edo 27 2 8 2011 27 2 3 1 EOS de ER DE E UL ERA MC DANA ME TIE LAU AA eene Mus 27 2 32 OER GE GR SN GE CE NE TSS SG ED EST EE TEE 27 93a s EY 29 2 8 4 30 2 4 ise RS EE acetate edes aoe dete uet peste deste pice Lip uo artes hae 32 2 4 1 eene 32 2 4 2
35. 2 RCIS dii R SASEBO j 2011 Co o Co 3 SASEBO G SASEBO G SASEBO ASIC Application Specific Integrated Circuit SASEBO R TSMC ASIC OAK OAND XOR3 DES MISTY 1 xc2vp7 xc2vp30 DARI OAND D FPGA HH 130nm CMOS 7 Xilinx Virtex II Pro FPGA LSI
36. INSTAC 82 CPU 2003 c FPGA ISEC 7 CHES 2004 8 1ICD 9 CSS 2004 10 ASIACRYPT 2004 12 1ACR e Print Archives Web ni 3 2005 1 FIPS 140 2 ISO IEC 19790
37. E10 YE BRS EP NTT 2011 12 29 2 3 4
38. ISE SASEBO GII 2 1 6 2011 2 A A 3 B C 4 B 2008
39. NIST DTR23 1G23 2 DTR IG OZ NIST NIST CSE 5 FIPS 140 3 2007 7 TFIPS 140 3 1 2009 12 2010 3 11 FIPS 140 3
40. 4 FIPS 140 2 NIST Implementation Guidance for FIPS PUB 140 2 and the Cryptographic Module Validation Program LiKR Ua ho 1T 2311 pir 2008 3 2008 1 24 FIPS PUB 140 2 1 2 2009 PM
41. 1 E R m iH Sa VH 2
42. YX pBABE qu 3 T m ISO IEC 19790 8 ISO IEC SC27 WG3 E FIPS 140 3 2 2 17 2 2011 2 1 2 1 1 2008 X 2 1
43. 2012 2 3 PC 2012 2 1 5 SASEBO GII 2012 4E 1 ISE
44. a c ISO IEC JTC 1 SC 27 WG 3 SO IEC 19790 Fy 9 0 NIST 4847 Implementation Guidance for FIPS PUB 140 2 and the Cryptographic Module Validation Program Last Update April 28 2004 4 28 0 1 2003 0 NIST FIPS 140 2 DTR CHANGE NOTICE 0 1 2 2003
45. RCIS nh SASEBO 2011 R 2 4 2 4 ISEC38 2011 8 2011 05 13 JIM RA Revisit Fault Sensitivity HOST39 2011 2011 06 06 Li Yang Kazuo Ohta and Analysis on WDDL AES Kazuo Sakiyama EMC 2011 17 2011 06 24 pp 53 57 MCHA Non Invasive EMI Based Fault ISEMC 2011 2011 08 18 Yu ichi Hayashi Naofumi Injection Attack against pp 763 767 Homma Takeshi Sugawara Cryptographic Modules Takaaki Mizuki Takafumi Aoki and Hideaki Sone Identification of Information ISEMC 2011 2011 08 18 Olivier Meynard Sylvain Leakage Points on a pp 773 778 Guilley Jean Lu
46. 4 SCIS 31 FFEA FES circuits Express Vol 9 30 LSI SCIS2012 3C2 5 2012 02 01 E F SASEBO RII 31 Fault Sensitivity Analysis SCIS2012 3C3 1 2012 02 01 EEE 32 CPU SCIS2012 3C3 2 2012 02 01 33 SCIS2012 3C3 4 2012 02 01 MINH 34 Information Theoretic Approach IEEE Trans Inf 2012 02 Kazuo Sakiyama Yang Li to Optimal Differential Fault Forensic Secur Mitsugu Iwamoto and Kazuo Analysis Vol 7 No 1 Ohta pp 109 120 35 New Fault Based Side Channel IEEE Trans Inf 2012 02 Yang Li Kazuo Ohta
47. lt Bii y 2 1 18 21 2 1 Intrinsic C WETS
48. 1 5 FIPS 140 2 4 Sa 1 2 2 ISO IEC 19790 amp ISO IEC 24759 ISO IEC 19790 iX FIPS 140 2 1SO IEC JTC 1 SC 277WG 8 2006 3 1 FIPS 140 2 DTR ISO IEC 19790 FIPS 140 2 DTR G 2008 6 ISO IEC 24759 ISO IEC 19790 2007 3 JISC25 JIS26 JIS X 19790 JIS X 19790 0 1 2007 3 JISX 5091
49. n nil alli k l 19 2011 11 18 H 2011 12 zi 4 OS8 A Intel x86 CPU PC CPU Core i5 480M 2 66 MHz DDR3 SDRAM 4GB B OS Windows 7 32 C Visual Studio Visual1 C 2010 10 0 SP1 D E SSE SSE2 Intrinsic 5 A 128 IV
50. 2009 12 FIPS 140 3 ISO IEC 19790 2nd WD 2010 4 JTC1 SC27 WG3 yc FIPS 140 3 ISO IEC 19790 al TU lst WD nb SEXE WG N 3 E 7 3rd WD 2011 E 1 ISO IEC p RJ 2 3 2011 2 3 1 IC
51. Q DLL D 16 bytes 64 bytes 576 bytes 1 536 bytes 4 096 bytes 16 384 bytes 1 048 576 bytes 1MB 7 7 D 8 bytes 64 bytes 576 bytes 1 536 bytes 4 096 bytes 16 384 bytes 1 048 576 bytes 1MB 7 4 B mot xu RE S C uil mm 20 D 8 bytes 64 bytes 576 bytes 1 536 bytes 4 096 bytes 16 384 bytes 1 048 576 bytes 21MB 7 6 A
52. 9 CSE Communications Security Establishment mm B Ww NY KF o CMVP Cryptographic Module Validation Progra m X fus y EXER i ISO International Standard Organization E IEC International Electrotechnical Commission JTC Joint Technical Committee SC SubCommittee WG Working Group CES ER Ride pn UE uk AIST Advanced Industrial Sciens and Technology RCIS Research Center for Information Security 8 2006 E nli JCMVP 2006 FIPS 140 2 FIPS 140 3 1 2007 7 2009 12 140 3 2010 2 1st WD
53. pum HET 5 5 24 f VC 410 Xilinx Virtex 5 LX50 SHA 1 AES a gt 7 A AES ECB B Null cipher C 8 A 3 2 3 CF 2 3 i
54. 4 oem 32 DPA Differential Power Analysis 33 SPA Simple Power Analysis 27 R Hi f S ecu SASEBO Xilinx SASEBO G Xilinx 84 ASIC35 SASEBO R LSI 20 4 F FPGA 36 21 SASEBO G FPGA Virtex 5 LX30 50 SASEBO GII IC ae IC ISO IEC 19790 ISO IEC 24759 uil 1
55. a gt N TX Vies Ev 2009 amp ilk EO IRR Sith EK PSE E 140 3 Ist WD ISO IEC 19790 SC27 WG3
56. LAL ISO IEC 24759 2008 6 JIS X 24759 JIS X 19790 2009 10 JIS X 5091 20 Tnternational Organization for Standardization 21 Tnternational Electrotechnical Commission 22 Communication Security Establishment 3 Derived Test Requirements 24 Implementation Guidance 25 JISC Japanese Industrial Standards Committee 26 JIS Japanese Industrial Standards to lb u 10 2006 3 ISO IEC 19790 13 13 1 2003 2
57. ASIC 6 AES XOR1 E RSA 1024bit SASEBO W IC CASE Camellia SEED CAST128 IC f Xilinx FPGA Spartan 6 LX150 at Ed 28 2 3 3 2012 3 AR BR 5 ZH FR ZH R HD BFE Ji f 2011 4
58. INSTACs INSTAC 8 327 INSTAOC 8 T INSTAC 32 Standard Evaluation BOard SN NN SASEBO Side channel 2008 CRYPTREC A ESI p H ror HE pz H TIE 4 5 6 T INSTAC fii S INSTAC 8 32 Y
59. 1 ae 1 ee ri C 1 f D GT 5 BA ER zu gt HX E 2 8 Ae 3 128 FE ECB Do Pd ET 5 ER QC 3 2 M BEDIEL lt ff J Za E
60. H 1 2011 12 19 WG 16 00 17 30 ISO IEC 2 a 2012 2 13 ISO IEC 16 00 17 00 33 34 1 ISO IEC 1st CD 19790 35 Date 2011 08 25 Document SC 27 N9581 CRYPTREC comments on ISO IEC 1 CD 19790 revision Clause No justi i Resolution Subclause Figure Table on each comment No Note Annex e g Table 1 1 MB Member body enter the ISO 3166 two letter country code e g CN for China comments from the ISO CS editing unit are identified by 2 Type ofcomment ge general te technical ed editorial NOTEColumns 1 2 4 5 are compulsory page 36 of 1 ISO electronic balloting commenting template version 2001 10 36 2 ISO IEC 1st WD 24759 37 Date 2011 08 25 Document SC 27 N9581 CRYPTREC comments on ISO IEC 1 WD 24759 revision Clause No Proposed change by the NB Resolution Subclause Figure Table on each comment No Note Annex e g Table 1 e g 3 1 Last enter seems to be incoherent leave a degraded mode operation paragraph Line 3 JP 2 TIZ Item 2 te Exception seems to include control data output In parentheses add and control d
61. WCG1 9 10 11 INSTAC NIST 3 FIPS 140 2 FIPS 140 3 INSTAC 8 32 9 SASEBO Side Channel Attack Standard Evaluation Board AES30 Camellia DES31 Misty1
62. h 28 IR SCIS2012 2C3 3 2012 01 31 24 Combined Side Channel SCIS2012 2C3 5 2012 01 31 WEE Analysis CPA MIA 25 SCIS2012 3C1 1 2012 02 01 BB 26 KCipher 2 SCIS2012 2012 02 01 Es 3C1 2E HE AK HAEE 27 Sensitive Data Dependency of SCIS2012 2012 02 01 EZ Faulty Behavior and Its 3C1 3E Application 28 SCIS2012 3C2 1 2012 02 01 29 Feistel SCIS2012 3C2 2 2012 02 01 42 EMCCOMPO International Workshop on Electromagnetic Compatibility of Integrated Circuits IEEE 4 TSEC
63. en 32 2 4 3 e M Rt 32 3 RA 33 31 1 3 ERAI DSDEEELLILLLUL LLL LLLI 33 3 2 WG Sr 33 Leda uere isin ba tan se desee vedete dae td a on tp eve de Lin SET aie eee ue Phe Twente c get 34 1 ISO IEC ist CD 19790 M WR resi se sed sarei ek ee hia tals 35 2 ISO IEC 1st WD 24759 Pere eee ere eee ee ee ee eee OF 3 ISO IEC 2nd WD 24759 eee rer Ser ere ee 39 1 2000 3 ee 2 FICE MMS ee H amp LX 2003 4 CRYPTREC LSI un uu a 7
64. xc2vp7 xc2vp30 SASEBO 19 ERE RAPES Xilinx PEGA SASEBO G ALTERA fl LSI SASEBO R 3 fi ARREK WBE a AS LR FPGA SASEBO B E uu eos 19 Cryptographic Module Validation Program SASEBO FIPS 140 2 FIPS 140 2 ISO20 IRC21 19790 1 2 1 FIPS 140 2 140 3 FIPS 140 2 iX KE NIST CSE22 CMVP HH
65. 2 WG WG 1 2011 FED CRYPTREC 0 ff 2 ISO International Standard Organization 3 IEC International Electrotechnical Commission 3 ZEE 2012 3 RE NTT x MPR 2011 10
66. FIPS 2004 2006 FIPS 140 2 FISP 140 3 Tei 2006 12 FIPS 140 3 WG WG 28 B 2009 7 FAD I A DREN HE SF
67. WOO TEM OR EVES ED IL 2006 1 LPL FIPS 140 2 evaluation testing test evaluation X Common Criteria Common Criteria FIPS 140 2 FIPS PUB 140 2 Security requirements for cryptographic modules gt Derived Test Requirements DTR for FIPS PUB 140 2 gt aJISO IEC JTC 1 SC 27 WG 3 FCD 19790 FDIS 19790 b NIST Implementation Guidance for FIPS PUB 140
68. WG FIPS 140 3 ISO IEC 19790 1 2 1 ou NA 18 SASEBO i H CMVP19 Side channel Attack Standard Evaluation BOard 2 Xilinx Virtex II Pro FPGA
69. HE WTF 2 27 2005 4 28 2005 4 lx Ho iX voa EH FJ C288 11 ESNE ED Be ELT EREK 1 EPGA29 2004 1 TSO IRC 19790 C FIPS 140 2 0 a e 8 FIPS 140 2 1st CD 19790 b
70. 0 15 Uniquness Enhancement of PUF ISEC 2011 68 2011 12 14 K Responces Based on the Locations of Random Outputting RS Latches 16 AES ISEC 2011 66 2011 12 14 CHES2011 17 Differential Fault Analysis on IEICE Trans 2012 01 Junko Takahashi Toshinori Stream Cipher MUGI Fundamentals Fukunaga and Kazuo Vol E95 A No 1 Sakiyama 2012 18 SCIS 2012 2012 01 30 RAK KAR HERA 1C2 6 19 AES SCIS2012 2C1 5 2012 01 81 1 K 20 Threshold Implementation SCIS2012 2C2 1 2012 01 31 ly ee MOM AB UE Enocoro 128 v2 R 21 Access Driven Cache Attack SCIS2012 2C2 2 2012 01 31 BEE 22 SCIS2012 2C2 5 2012 01 31
71. 2 and the Cryptographic Module Validation Program OKIKI L ARBRE 2004 0 1 0 1 nu 13 EFDIS 19790 2 2004 382 CPU 2006 1 ISO IEC JTC 1 SC 27 ISO IEC 19790 ISO IE
72. C 24759 24759 WD Ist CD 8C 27 2 FIPS 140 2 FIPS 140 3 INSTAC 8 32 2006 3 JIS 2006 03 31 JTS JIS X 19790
73. CRYPTREC Report 2011 24 3 sir d er ee eee ee eee rere eee eee eee ee eee ee eee Tee eee eee eT eee eee ee ee eee eee ee ee ee eee eee ee eer ee eee 1 ST 2 nce eats v ct aL PP 3 1 DE Ee i SE OE SE ER ED ES i ns 6 1 1 CRYPTREC SO m SS 6 1 1 1 TD EN RO OE RR VED DI ROE SED ERS 7 112 8 1 2 PE Ao se ris su Eee o ES 9 1 2 1 FIPS 140 2 140 3 ccueutettou ds i duet emu Pu op apes RUM E b et 10 12 2 ISO IEC 19790 ISO TEC 24759 MM 10 1 3 NT 11 13 1 11 13 2 2011 SEO EE TEE EA 17 2 2011 SS PHP 18 2 1
74. E tandardization Center FIPS Federal Information Processing Standard FIPS PUB Federal Information Processing Standards Publication Information Technology Research and E rf zu 32bit C8 8bit hk 32 2003 4E 2004 eS ia E NIST8 CSE9 CMVP TGT HZ Federal Information Processing Standard PUB 140 2 ISOMIECY JTC131 SC1427 WG158 E GR CMVP
75. and Attack using Fault Sensitivity Forensic Kazuo Sakiyama New Secur Vol 7 Fault Based Side Channel No 1 pp 88 97 36 A proper security analysis IEICE 2012 03 25 Yoshio Takahashi Tsutomu method for CMOS cryptographic Electronics Matsumoto No 6 pp 458 463 24 2 4 3 Tm 1 TRPE RER 2 4 1 2 2 4 2 1 r k T 2 32 1 2 ISO IEC 19790 24759 3 8 1
76. ata Line 1 output via the control output interface 1 MB Member body enter the ISO 3166 two letter country code e g CN for China comments from the ISO CS editing unit are identified by 2 Type ofcomment ge general te technical ed editorial NOTEColumns 1 2 4 5 are compulsory page 38 of 1 ISO electronic balloting commenting template version 2001 10 38 3 ISO IEC 2nd WD 24759 39 Date 2011 08 25 Document SC 27 N9581 CRYPTREC comments on ISO IEC 2 WD 24759 revision Clause No justi i Proposed change by the NB Resolution Subclause Figure Table on each comment No Note Annex e g Table 1 e g 3 1 JP 1 TE02 15 02 Paragraph 6 if they are do not provide security if they do not provide security grammatical error JP 2 TE02 18 02 Paragraph 6 JP3 TE02 21 01 if they are do not provide security if they do not provide security grammatical error description of the of the non approved description of the non approved grammatical error shall not enter a degraded operation seems to be shall not leave a degraded contrary operation VE03 03 01 VE03 04 01 JP 5 aso2 s2 JP 4 TE02 26 02 Line2 can only be access can only be accessed grammatical error 1 MB Member body enter the ISO 3166 two letter country code e g CN for China comments from the ISO CS editing unit are identifi
77. c Danger Cryptographic Device with an Yu ichi Hayashi and Naofumi RSA Processor Homma Identification of Information ISEMC 2011 2011 08 18 Olivier Meynard Sylvain Leakage Points on a pp 773 778 Guiley Jean Luc Danger Cryptographic Device with an Yu ichi Hayashi and Naofumi RSA Processor Homma ISEC 2011 28 2011 09 09 On the Power of Fault CHES 2011 2011 09 30 Amir Moradi Oliver Mischke Sensitivity Analysis and Christof Paar Yang Li Kazuo Collision Side Channel Attack in Ohta Kazuo Sakiyama a Combined Setting Uniqueness Enhancement of CHES 2011 2011 10 01 Dai Yamamoto Kazuo PUF Responses Based on the Sakiyama Mitsugu Iwamoto Locations of Random Outputting Kazuo Ohta Takao Ochiai RS Latches Masahiko Takenaka Kouichi Itoh 38 ISEC 39 HOST International Symposium on Hardware Oriented Security and Trust IEEE 40 EMC International Symposium on Electromagnetic Compatibility CHES Workshop on Cryptographic Hardware and Embeded Systems IACR 41 30
78. ed by 2 Type of comment ge general te technical ed editorial NOTE Columns 1 2 4 5 are compulsory page 40 of 1 ISO electronic balloting commenting template version 2001 10 40 2012 5 25 1 113 6591 28 8 INFORMATION TECHNOLOGY PROMOTION AGENCY JAPAN 2 28 8 HONKOMAGOME BUNKYO KU TOKYO 113 6591 JAPAN T 184 8795 2 1 NATIONAL INSTITUTE OF INFORMATION AND COMMUNICATIONS TECHNOLOGY 4 2 1 NUKUI KITAMACHI KOGANEI TOKYO 184 8795 JAPAN 41

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