Home

CP6001-V User Guide, Revision 1.0

1. li MB ATI nenn UO tme li p wget lii List of Tables c ix VEE Ke RENE ENE EEE xi Propiietary Noto nennen xiii TAQ GINGA EEE xiii Environmental Protection Statement une neh xiii Explanation of Symbols 22 2 ee ee xiv For Yo r Safety XV High Voltage Safety Instructions nee een XV Special Handling and Unpacking Instructions rrrrrnnrrnnnnnrrrrrrrrrrrrrrrrrrnrrnnnnnnnn XV General Instructions on Usage ssi ne na xvi MOT NNN ee xvii 1 Introduction varmere 1 3 LI Board EN NG 1 3 1 2 Board Specific Information sse 1 4 1 3 System Expansion Capabilities csse 1 5 131 PVC Mod le vase 1 5 1 3 2 CP6001 V MK2 5SATA Assembly Kit sss 1 5 1 3 3 USBZUNANDTFlshNMOGu stetit tu uei paa RRE Rata SR Ri 1 5 1 4 Board DEG MERC t 1 5 1 4 1 Functional Block Diagramme 1 6 14 2 Front Panels EE EESE TETE 1 7 1 4 3 Board Layout arr 1 8 1 5 Technical Specification eese eese 1 10 1 6 Kontron Software Support esssssssssseesen nennen 1 14 1 7 ST Aae 1 15 1 8 Related Publications aaa 1 15 2 Functional Description sums naunnmmnniievvi invi 2 3 ID 1022 4593 Rev 1 0 Page iii Preface CP6001 V m 2 1 CPU Memory and Chipset 2 3 2141 PU 2 3 2 1 2 ME
2. unnn 3 8 3 5 1 USB Device Installation rrrnnnrnnnnnnnnnnnnrrrverrrrverrrnrrrnnnnnnnnnrevennner 3 8 3 5 2 USB 2 0 NAND Flash Module Installation sssse 3 9 3 5 3 Installation of External Serial ATA Devices rrrrrrrnnrrnnnnnrnnrrrrrnnnr 3 9 3 5 4 Onboard 2 5 HDD SSD Installation eessesssssssssss 3 9 3 6 PMC Module Installation anne reine 3 9 30 1 BINS Te 3 10 3 7 Software Installation innere 3 10 4 Configuration c 4 3 ID 1022 4593 Rev 1 0 Page v Preface CP6001 V m 4 1 Jumper Description anna 4 3 414 Clearing BIOS CMOS Setup une 4 3 4 1 2 Shorting Chassis GND Shield to Logic GND 4 3 4 1 3 General Purpose Jumper rrrrrrvvervvvrrrrnrrrnnnnrnnnrnvvrrrvrrrvveerrrerrrnnnnnnen 4 3 4 1 4 CompactPCI Interface Configuration 22222222222222 nenn 4 3 4 1 5 Global Write Protection a 4 4 NNN 4 4 4 3 CP6001 V Specific Registers mmrrmmmrrerrererrrrnrrrnnnrrnsnrrrerrrerrrrrerrrnrrrnnnnnnen 4 5 4 3 1 Status Register 0 STATU ose en 4 5 4 3 2 Status Register 1 SA Luanda 4 6 4 3 3 Control Register 1 CTRL1 rrrnnnnnvvrnnnnnrnnnnvrnnrnnnnnnnnrrernnnnrnnnnnnnnne 4 6 4 3 4 Device Protection Register DPROT rrurnnrrrrnnnnnnnnnnnvrrernnnrnnnnvnnnne 4 7 4 3 5 Reset Status Register RSTAT nennen 4 7 4 3 6 Board Interrupt Configuration Register BICFG
3. 4 8 4 3 7 Board ID Register BID zu 4 8 4 3 8 Board and PLD Revision Register BREV nnnn 4 9 4 3 9 Geographic Addressing Register GEOAD rrrnnnnnnnnnnnnnnnnnnnnnnnnnnnr 4 9 4 3 10 Delay Timer Register DTIM sse 4 10 4 3 11 Watchdog Timer Control Register WTIM ssss 4 11 4 3 12 LED Configuration Register LCFG sss 4 13 4 3 13 LED Control Register LCTRL mrrrnnnnrrrnnnnnnnnrrrennnnnrnnnnnvvnnnnnnnrnnrr 4 14 5 Power Considerations parans anna aps EEE En EL aE 5 3 21 HE POWER eee 5 3 5 1 1 CP6001 V Baseboard an ne 5 3 5 1 2 Backplane vvs den 5 4 5 1 3 Por Supply UNG mm 5 4 5 1 3 1 Start Up Requirement u 5 4 5 1 3 2 Power Up Sequence ana 5 5 2 1 23 Tolerance Em 5 5 OI PT Consumption nie 5 6 5 2 1 Power Consumption of the CP6001 V Accessories 5 8 5 2 2 Power Consumption of the Gigabit Ethernet Controller 5 8 Page vi ID 1022 4593 Rev 1 0 CP6001 V Preface 5 3 Start Up Currents of the CP6001 V sese 5 8 5 4 Power Available for PMC Devices rrrrrrrnnrrrrrrnrnnnnnrrrrrrnnnnnnnrrrrnrnnsrnrrnensnn 5 9 6 Thermal Considerations eee ee reee sees een nana annua 6 3 6 1 Board Internal Thermal Monitoring sss 6 3 6 2 Processor Thermal Monitoring and Regulation sss 6 3 6
4. LED 0 1 red green amber General Purpose POST code lov W399 ds Lov 9399 ds Integral Ethernet LEDs ACT green Ethernet Link Activity SPEED green orange Ethernet Speed SPEED ON orange 1000 Mbit SPEED ON green 100 Mbit SPEED OFF 10 Mbit Note If the General Purpose LEDs are lit red dur ing boot up a failure is indicated before the BIOS has started For further information please contact Kon tron oz gsn 184 0385n ID 1022 4593 Rev 1 0 Page 1 7 Introduction CP6001 V 1 4 3 Board Layout Figure 1 3 CP6001 V Board Layout Front View rH DD SSD LIS 5 EM 5 5 5 5 5 50 5 5 5 5 5 0 5 gy 0 5 5 5 5 0 ggg 1 2 1 2 Channel B J15 ay 63 264 63 53 64 5V 3 3V voltage key voltage key J18 Channel A WD TH LEDs GP POST CODE LEDs Page 1 8 ID 1022 4593 Rev 1 0 CP6001 V Introduction Figure 1 4 CP6001 V Board Layout Reverse View PCle to PCI Bridge ID 1022 4593 Rev 1 0 Page 1 9 Introduction CP6001 V m 1 5 Technical Specification Table 1 1 CP6001 V Main Specifications CP6001 V SPECIFICATIONS CPU The CP6001 V supports the Intel Celeron M processor 440 1 86 GHz 533 MHz FSB 1 MB L2 cache in a 479 UFCBGA packaging Memory Main Memory Up to 4 GB dual channel DDR2 memory running at 533 MHz Cache structure e 64 kB L1 on die full speed processor cache e 32 kB for instruction cache
5. Table 2 6 Watchdog and Temperature Status LEDs Function FUNCTION FUNCTION DURING AFTER BOOT UP IAE BIOS POST fPOSTcodeconfig is it POST code config is disabled enabled WD LED red Watchdog expired green a post AANA ves ETC ANA Watchdog active waiting to be triggered TH LED off The TH LED is off if the CPU temperature is below 100 C normal operation red The TH LED blinks red if the CPU temper ature is above 100 C but below 125 C green BIOS POST bit 0 and BIOS POST bit 0 and bit 4 bit 4 amber If the CPU has been shut off i e the CPU has reached a temperature above 125 C In this event the TH LED remains lit Page2 8 ID 1022 4593 Rev 1 0 CP6001 V Functional Description 2 3 1 3 General Purpose LEDs The CP6001 V provides two General Purpose LEDs LEDO 1 on the front panel They are de signed to indicate the boot up POST code after which they are available to the application If the LEDO 1 are lit red during boot up a failure is indicated before the BIOS has started In this case check the power supply If the power supply appears to be functional and the LEDs are still red please contact Kontron for further assistance The POST code is indicated during the boot up phase After boot up the LEDs indicate Gen eral Purpose or Port 80 signals depending on the BIOS settings The default setting after boot up is General Purpose T
6. i EDCBA ID 1022 4593 Rev 1 0 CP6001 V 2 3 11 2 CompactPCI Connectors J1 and J2 Pinout The CP6001 V is provided with two 2 mm x 2 mm pitch female CompactPCI bus connectors J1 and J2 Table 2 19 CompactPCI Bus Connector J1 System Slot Pinout Functional Description PIN Z A B C E F 25 NC 5V REQ64 ENUM 3 3V 5V GND 24 NC AD 1 5V V I O AD 0 ACK64 GND 23 NC 3 3V AD 4 AD 3 5V AD 2 GND 22 NC AD 7 GND 3 3V AD 6 AD 5 GND 21 NC 3 3V AD 9 AD 8 M66EN C BE 0 GND 20 NC AD 12 GND V I O AD 11 AD 10 GND 19 NC 3 3V AD 15 AD 14 GND AD 13 GND 18 NC SERR GND 3 3V PAR C BE 1 GND 17 NC 3 3V NC NC GND PERR GND 16 NC DEVSEL PCI X_CAP V I O STOP LOCK GND 15 NC 3 3V FRAME IRDY BDSEL TRDY GND 14 12 Key Area 11 NC AD 18 AD 17 AD 16 GND C BE 2 GND 10 NC AD 21 GND 3 3V AD 20 AD 19 GND 9 NC C BE 3 NC AD 23 GND AD 22 GND 8 NC AD 26 GND V I O AD 25 AD 24 GND 7 NC AD 30 AD 29 AD 28 GND AD 27 GND 6 NC REQO CPCI_Present 3 3V CLKO AD 31 GND 5 NC RSV RSV RST GND GNTO GND 4 NC NC Health V I O RSV RSV GND 3 NC INTA INTB INTC 5V INTD GND 2 NC TCK 5V TMS NC TDI GND 1 NC 5V 12V TRST 12V 5V GND ID 1022 4593 Rev 1 0 E Page 2 21 Functional Description CP6001 V Table 2 20 CompactPCI Bus Connector J1 Peripheral S
7. E ID 1022 4593 Rev 1 0 Page 4 13 Configuration CP6001 V m 4 3 13 LED Control Register LCTRL The LED Control Register enables the user to switch on and off the General Purpose LEDs Table 4 17 LED Control Register LCTRL LED CONTROL REGISTER LCTRL ADDRESS 0x291 DESCRIPTION ACCESS 7 4 LCMD LED command 0000 R W 0000 Get LED 0 0001 Get LED 1 0010 0111 Reserved 1000 Set LED 0 1001 Set LED 1 1010 1111 Reserved 3 0 LCOL LED color 000 R W 0000 Off 0001 Green 0010 Red 0011 Amber 0100 1111 Reserved Note This register can only be used if the General Purpose LEDs indicated in the LED Configuration Register Table 4 16 are configured in General Purpose Mode Page 4 14 ID 1022 4593 Rev 1 0 CP6001 V Power Considerations Chapter Power Considerations ID 1022 4593 Rev 1 0 Page 5 1 Power Considerations CP6001 V This page has been intentionally left blank Page 5 2 ID 1022 4593 Rev 1 0 CP6001 V Power Considerations 5 Power Considerations 5 1 System Power The considerations presented in the ensuing chapters must be taken into account by system integrators when specifying the CP6001 V system environment 5 1 1 CP6001 V Baseboard The CP6001 V baseboard itself has been designed for optimal power input and distribution Still it is necessary to observe certain criteria essential for ap
8. CP6001 V 6U CompactPCI Processor Board based on the Intel Celeron M 440 Processor with the Intel 945GM Express Chipset Doc ID 1022 4593 Rev 1 0 August 14 2008 User Guide C kontron IN Preface CP6001 V m Revision History CP6001 V 6U CompactPCI Processor Board based on the Intel Publication Title Celeron M 440 Processor with the Intel 945GM Express Chipset Rev Brief Description of Changes Date of Issue 1 0 Initial issue 14 Aug 2008 Imprint Kontron Modular Computers GmbH may be contacted via the following MAILING ADDRESS TELEPHONE AND E MAIL Kontron Modular Computers GmbH 49 0 800 SALESKONTRON Sudetenstrafse 7 sales kontron com D 87600 Kaufbeuren Germany For further information about other Kontron products please visit our Internet web site www kontron com Disclaimer Copyright 2008 Kontron AG All rights reserved All data is for information purposes only and not guaranteed for legal purposes Information has been carefully checked and is believed to be accurate however no responsibility is assumed for inaccuracies Kontron and the Kontron logo and all other trademarks or registered trademarks are the property of their respective own ers and are recognized Specifications are subject to change without notice Page ii ID 1022 4593 Rev 1 0 CP6001 V Preface Table of Contents Revision HIStory EE RE ees aman li Jn
9. CP6001 V Functional Description 2 2 6 Serial EEPROM This EEPROM is connected to the SMBus provided by ICH7R Table 2 4 EEPROM Address Map ADDRESS FUNCTION 0x000 OxOFF CMOS backup 0x100 0x1FF Production data 0x200 0x3FF OS Boot parameter 0x400 Ox1FFF User 2 2 7 FLASH Memory There are up to four Flash devices available as described below one for the BIOS and three for data storage 2 2 71 BIOS FLASH Firmware Hub The CP6001 V provides one 1 MB Firmware Hub Flash chip for the BIOS 2 2 7 2 USB 2 0 NAND Flash Module The CP6001 V supports one optional USB 2 0 NAND Flash module qualified by Kontron The USB 2 0 NAND Flash module is connected to the onboard connector J11 The USB 2 0 NAND Flash module is a USB 2 0 based NAND Flash drive with a built in full hard disk emulation and a high data transfer rate It is optimized for embedded systems providing high performance reliability and security 2 2 7 3 CompactFlash Socket To enable flexible Flash extension an onboard CompactFlash CF type II socket J16 is available underneath the HDD module CompactFlash is a very small removable mass storage device It provides true IDE functionality compatible with the 16 bit ATA ATAPI 4 interface The CompactFlash socket is connected to the IDE port of the ICH7R and is set to master con figuration The CP6001 V supports DMA as well as both CF type I and CF type Il ID 1022 4593 Rev 1 0 Page
10. CompactFlash memory card and a USB 2 0 NAND Flash module for flexible non volatile non rotating memory extension Onboard SATA HDD SSD support is also provided via an optional CP6001 EXT SATA module The CP6001 V offers a complete set of data and communication interfaces such as four Giga bit Ethernet ports two on front I O and two on rear I O one Parallel ATA interface connected to the CompactFlash socket two onboard Serial ATA interfaces one for connecting a SATA ca ble and one for connecting a 2 5 HDD SSD to the board one high resolution VGA interface CRT and one 32 bit 33 MHz PMC interface In addition three USB 2 0 ports are available on the board two on the front panel and one onboard port for the USB 2 0 NAND Flash mod ule One RS 232 COM port is also available on the front panel The board supports a configurable 32 bit 33 66 MHz hot swap CompactPCI interface If in stalled in the system slot the interface is enabled and if installed in a peripheral slot the CP6001 V is isolated from the CompactPCI bus Designed for stability and packaged in a rugged format the board fits into all applications situated in industrial environments including I O intensive applications where only one slot is available for the CPU making it a perfect core technology for long life applications Components with high temperature tolerance have been selected from embedded technology programs and therefore offer long term availability
11. The CP6001 V supports a flexibly configurable hot swap CompactPCI interface When the board is installed in the system slot the interface is in the transparent mode and when the board is installed in the peripheral slot the CompactPCI interface is isolated so that it cannot communicate with the CompactPCI bus This mode is known as passive mode 2 3 10 1 Board Functionality when Installed in System Slot In a system slot the CP6001 V can communicate with all other CompactPCI boards through a 32 bit 33 66 MHz interface The CP6001 V supports up to seven CompactPCI peripheral slots through a backplane 2 3 10 2 Board Functionality when Installed in Peripheral Slot Passive Mode In a peripheral slot the board receives power but does not communicate on the CompactPCI bus all CompactPCI signals are isolated In this configuration the communication is achieved via the two Gigabit Ethernet ports as de fined in the PICMG 2 16 specification 2 3 10 3 Packet Switching Backplane PICMG 2 16 The CP6001 V supports two Gigabit Ethernet ports on the J3 connector in accordance with the CompactPCI Packet Switching Backplane Specification PICMG 2 16 The two ports are con nected in the chassis via the CompactPCI Packet Switching Backplane to the Fabric slots A and B The PICMG 2 16 feature can be used in the system slot and in the peripheral slot 2 3 10 4 Hot Swap Support To ensure that a board may be removed and replaced in a workin
12. The complete CompactPCI connector configuration comprises three connectors J1 J2 and J3 optional Their functions are as follows J1 J2 32 bit CompactPCI interface with PCI bus signals arbitration clock and power J3 optional with rear I O interface functionality The CP6001 V is designed for a CompactPCI bus archi tecture The CompactPCI standard is electrically identi cal to the PCI local bus However these systems are enhanced to operate in rugged industrial environments and to support multiple slots 2 3 11 1 CompactPCI Connector Keying CompactPCI connectors support guide lugs to ensure a correct polarized mating The CP6001 V supports universal PCI VI O signaling voltages with one common termination resistor configu ration and includes a PCI VI O voltage detection circuit If the PCI VI O voltage is 5 V the maximum supported PCI frequency is 33 MHz Page 2 20 CP6001 V Figure 2 9 CPCI Connectors J1 J3 19 J3 22 J2 25 J1 Note Pinrow F GND Pinrow Z NC
13. 1 NC i GND 2 GND Note Page 2 24 A indicates that the signal normally present at this pin is disconnected from the CompactPCI bus when the CP6001 V is inserted in a peripheral slot ID 1022 4593 Rev 1 0 CP6001 V 2 3 11 3 CompactPCI Rear I O Connectors J3 Pinout The CP6001 V board provides optional rear I O connectivity for Gigabit Ethernet networking accordance with the PICMG 2 16 The CP6001 V conducts all I O signals through the rear I O connectors J3 Table 2 23 CompactPCI Rear I O Connector J3 Pinout Functional Description PIN Z A B ie D E F 19 NC NC NC NC NC NC GND 18 NC LPa_DA LPa_DA GND LPa_DC LPa_DC GND 17 NC LPa_DB LPa_DB GND LPa_DD LPa_DD GND 16 NC LPb_DA LPb_DA GND LPb_DC LPb_DC GND 15 NC LPb_DB LPb_DB GND LPb_DD LPb_DD GND 14 NC NC NC LPab CT1 NC NC GND 13 NC NC NC NC NC NC GND 12 NC NC NC NC NC NC GND 11 NC NC NC NC NC NC GND 10 NC NC NC NC NC NC GND 9 NC NC NC NC NC NC GND 8 NC NC NC NC NC NC GND 7 NC NC NC NC NC NC GND 6 NC NC NC NC NC NC GND 5 NC NC NC NC NC NC GND 4 NC NC NC NC NC NC GND 3 NC NC NC NC NC NC GND 2 NC NC NC NC NC NC GND 1 NC NC NC NC NC NC GND Table 2 24 CompactPCI Rear I O Connector J3 Signals SIGNAL DESCRIPTION LPa Rear I O LAN Port D LPb Rear I O LAN Port C LPab 1 9 V for center tapping ID 1022 4593 Rev 1 0 Page 2 25 Function
14. 2 7 Functional Description CP6001 V 2 3 Board Interfaces 2 3 1 Front Panel LEDs The CP6001 V is equipped with one Watchdog Status LED WD LED one Temperature Status LED TH LED two General Purpose POST code LEDs LEDO 1 and one Hot Swap LED HS LED Their functionality is described in the following chapters and reflected in the registers mentioned in Chapter 4 Configuration 2 3 1 1 Hot Swap LED On the CP6001 V a blue HS LED is provided for example to indicate the status of the shut down process and when the board is ready for extraction Table 2 5 Hot Swap LED Function LED COLOR NORMAL MODE OVERRIDE MODE HS LED blue On ready for hot swap board may be extracted Selectable by user Off board in normal operation do not extract the board Only lamp test Blinking change of status to On Off 2 3 1 2 Watchdog and Temperature Status LEDs The CP6001 V provides one LED for the Watchdog Status WD LED and one for the Temperature Status TH LED Note If the TH LED is lit amber it indicates that the processor junction temperature has reached a level beyond which permanent silicon damage may occur Upon assertion of Thermtrip the processor will shut off its internal clocks thus halting program execution in an attempt to reduce the processor junction temperature Once activated Thermtrip remains latched until a cold restart of the CP6001 V is undertaken all power off and then on again
15. 238 PMG INellate use een 2 16 2 3 8 1 PMC Connectors J17 and J19 Pinout eene 2 17 Page iv ID 1022 4593 Rev 1 0 CP6001 V Preface FALE MEER 01810 1100 0400 Em 2 18 2 3 10 CompactPCI Interface ana uekung 2 18 2 3 10 1 Board Functionality when Installed in System Slot 2 18 2 3 10 2 Board Func when Installed in Periph Slot Passive Mode 2 18 2 3 10 3 Packet Switching Backplane PICMG 2 16 2 18 2 3 10 4 Hot Swap Support una 2 18 2 3 10 5 Power Ramping nee 2 19 25100 PETE sauna 2 19 2 3 10 7 Handle Switch uu u uuesuennnn a 2 19 2 3 10 8 ENUM Interrupt usen raria aa pede ea eo sna suat ieeera 2 19 250100 Hot Swap LED Ve 2 19 2 3 11 CompactPCI Bus Connectot anne 2 20 2 3 11 1 CompactPCI Connector Keying sss 2 20 2 3 11 2 CompactPCI Connectors J1 and J2 Pinout 2 21 2 3 11 3 CompactPCI Rear I O Connectors J3 Pinout 2 25 3 4NStallalion s r M 3 3 3 1 Safety Requirements u naeh 3 3 3 2 CP6001 V Initial Installation Procedures 1rrnnnrrrnnrrrrrerrrrrrnnrrrnnrrrnnnnnnn 3 4 3 3 Standard Removal Procedures u 3 5 3 4 Hot Swap Procedures unse 3 6 3 4 1 Hot Swap of the Board Operated in the System Slot 3 6 3 4 2 Hot Swap of the Board Operated in a Peripheral Slot 3 6 3 5 Installation of CP6001 V Peripheral Devices
16. 3 3V Ground 25 26 C BE 3 IDSEL 25 26 AD 23 AD 22 27 28 AD 21 3 3V 27 28 AD 20 AD 19 29 30 5V AD 18 29 30 Ground V I O 31 32 AD 17 AD 16 31 32 C BE 2 FRAMEZ 33 34 Ground Ground 33 34 PMC RSV NC Ground 35 36 IRDY TRDY 35 36 3 3V DEVSEL 37 38 5V Ground 37 38 STOP GND 39 40 LOCK PERR 39 40 Ground PCI RSV NC 41 42 PCI RSV NC 3 3V 41 42 SERR PAR 43 44 Ground C BE 1 43 44 Ground V I O 45 46 AD 15 AD 14 45 46 AD 13 AD 12 47 48 AD 11 M66EN 47 48 AD 10 AD 09 49 50 5V AD 08 49 50 3 3V Ground 51 52 C BE 0 AD 07 51 52 PMC RSV NC AD 06 53 54 AD 05 3 3V 53 54 PMC RSV NC AD 04 55 56 Ground PMC RSV NC 55 56 Ground V I O 57 58 AD 03 PMC RSV NC 57 58 PMC RSV NC AD 02 59 60 AD 01 Ground 59 60 PMC RSV NC AD 00 61 62 5V ACK64 61 62 3 3V Ground 63 64 REQ64 Ground 63 64 PMC RSV NC ID 1022 4593 Rev 1 0 Page 2 17 Functional Description CP6001 V m 2 3 9 Debug Interface The CP6001 V provides several onboard options for hardware and software debugging such as Two bicolor General Purpose LEDs LEDO 1 which indicate hardware failures BIOS POST codes and port 80 user configurable outputs A JTAG connector J18 for programming and debugging the onboard logic AnITP700 processor JTAG connector J24 for facilitating the debug and BIOS software development 2 3 10 CompactPCI Interface
17. 5SATA CP6001 V MK2 5SATA CP6001 V m This page has been intentionally left blank Page A 2 ID 1022 4593 Rev 1 0 CP6001 V MK2 5SATA A CP6001 V MK2 5SATA Assembly Kit The optional CP6001 V MK2 5SATA assembly kit includes one CP6001 EXT SATA module and the necessary components required for mounting the module on the CP6001 V CP6001 V A 1 CP6001 EXT SATA Module Overview The CP6001 EXT SATA module has been designed for use with the CP6001 V board from Kon tron and enables the user to connect an onboard 2 5 Serial ATA HDD or SSD to the CP6001 V A 2 Technical Specifications Table A 1 CP6001 EXT SATA Main Specifications CP6001 EXT SATA SPECIFICATIONS 8 Board to Board Connectors One 12 pin male board to board connector J1 Serial ATA Connector One 22 pin Serial ATA connector J2 Power Consumption 3 3 V or 5 V depending on the HDD SSD Current 2 5 Serial ATA HDDs do not use 3 3 V Temperature Range Operating temp 0 C to 60 C S Storage temp 55 C to 85 C Climatic Humidity 93 RH at 40 C non condensing acc to IEC 60068 2 78 Dimensions 54 mm x 27 5 mm Board Weight ca 6 grams without HDD SSD A 3 CP6001 EXT SATA Functional Block Diagram Figure A 1 CP6001 EXT SATA Functional Block Diagram SATA Connectivity J2 CP6001 EXT SATA 2 5 HDD SSD 3 3V Power Converter SATA Signals amp Power J1 CP6001 EXT SATA J13 CP6001
18. 7 GND Ground signal Note If the onboard SATA connector J12 will be used due to the big SATA connec tor and the stiff SATA cable the CP6001 V will exceed the thickness of 4HP Note To ensure secure connectivity the SATA connector supports the use of SATA II cables SATA cables with locking latch ID 1022 4593 Rev 1 0 Page 2 15 Functional Description CP6001 V r 2 3 7 2 2 5 SATA HDD SSD Extension Connectors J13 The CP6001 V provides one 12 pin female SATA extension connector J13 for connecting an onboard 2 5 Serial ATA HDD SSD to the CP6001 V through the CP6001 EXT SATA module For further information concerning the CP6001 EXT SATA module refer to Appendix A Figure 2 7 SATA Ext Con J13 FUNCTION Table 2 16 SATA Extension Connector J13 Pinout PIN SIGNAL I O 1 SATA RX2 Differential Receive 11 12 2 GND Ground signal EB 3 SATA RX2 Differential Receive 4 GND Ground signal 12 5 GND Ground signal 6 5V 5V power 7 SATA TX2 Differential Transmit O 8 GND Ground signal 9 SATA_TX2 Differential Transmit O 10 GND Ground signal 11 GND Ground signal 12 5V 5V power 2 3 8 PMC Interface The CP6001 V allows installing a PMC module on the board For flexible and easy configura tion two PMC connectors J17 and J19 are available The J17 Jn1 and J19 Jn2 connectors provide the signals for the 32 bit PCI Bus This interfac
19. CF cards Two onboard Serial ATA interfaces One standard Serial ATA interface for connecting a SATA cable One Serial ATA interface for connecting a Serial ATA 2 5 HDD SSD via the CP6001 EXT SATA module Three USB 2 0 ports Two ports on the front panel One onboard port for the USB 2 0 NAND Flash module One RS 232 COM port on the front panel One 1 MB soldered FWH for BIOS Hardware Monitor Super I O SCH3112 Watchdog Timer Real time clock 4HP 6U CompactPCI Passive heat sink solution for forced convection cooling Hot swap capability as system controller or as peripheral device Supports PICMG Packet Switching Backplane Specification 2 16 AMI BIOS Page 1 4 ID 1022 4593 Rev 1 0 CP6001 V Introduction E 1 3 System Expansion Capabilities 1 3 1 PMC Module The CP6001 V has one PCI 32 bit 33 MHz PMC mezzanine interface This interface supports a wide range of available PMC modules with PCI interface including all of Kontron s PMC mod ules and provides an easy and flexible way to configure the CP6001 V for various application requirements For further information concerning the PMC interface refer to Chapter 2 3 8 PMC Interface 1 3 2 CP6001 V MK2 5SATA Assembly Kit The CP6001 V comes with an optional CP6001 V MK2 5SATA assembly kit comprised of one CP6001 EXT SATA module and the neccessary components needed for mounting the module on the CP6001 V The CP6001 EXT SATA module is required for connecting an
20. CP6001 V wit Linux Win XP in IDLE Mode 5 7 Power Consumption CP6001 V s TDP at 75 sss 5 7 Power Consumption CP6001 V s TDP at 10096 ccccssseeseeeeeeeeeceeeeeeeenees 5 7 Power Consumption of CP6001 V Accessories rrrrrrrrrrrrrrrrrrrnnnrnnnnrrrnrerr 5 8 Power Consumption of the Gigabit Ethernet Controller 5 8 Start Up Currents of the CP6001 V na 5 8 Maximum Output Power Limits sss 5 9 CP6001 EXT SATA Main Specifications rrnrrnnnnnnnnnrrrrrerrrvrrrnrernrrrnnnnnnn A 3 Board to Board Connector J1 Pinout sssssssseeeeeeeeeee A 5 SATA Connector J2 T IBOUED Jaren redd A 6 ID 1022 4593 Rev 1 0 CP6001 V Preface 1 1 1 2 1 3 1 4 2 1 2 3 2 4 2 5 2 6 2 7 2 8 2 9 3 1 6 1 A 1 A 2 A 3 List of Figures CP6001 V Functional Block Diagram sse 1 6 CP6001 V Front Panels unser 1 7 CP6001 V Board Layout Front View sse 1 8 CP6001 V Board Layout Reverse View sss 1 9 USB Connectors J4 and JO anne onte etanol tese end 2 11 USB NAND Flash Connector J19 esses eerie 2 12 D Sub VGA Connector JO nee 2 13 Serial Connector J9 COM cccsscccccccesessnceeeeceeceeeaeeeeeeessnaaeeneeeeessenaas 2 13 Gigabit Ethernet Connectors J7 and J8 ecccccccssseceeecceesnenseeeeessanesseees 2 14 SATA Connector 412 ana 2 15 SATA Extension Connector J13 anne 2 16 PMG
21. Connectors J17 and III ann a de 2 16 CPCI Connectors JER eine 2 20 Connecting a Peripheral Device to the CP6001 V rrrrrrrrnnrrrrrrvrnnnrrerer 3 8 Oper Limits for the CP6001 V with Intel Celeron M 440 1 86 GHz 6 6 CP6001 EXT SATA Functional Block Diagram A 3 CP6001 EXT SATA Module Layout sse A 4 SAA CNF gm m A 6 E ID 1022 4593 Rev 1 0 Page xi Preface CP6001 V This page has been intentionally left blank Page xii ID 1022 4593 Rev 1 0 CP6001 V Preface This document contains information proprietary to Kontron It may not be copied or transmitted by any means disclosed to others or stored in any retrieval system or media without the prior written consent of Kontron or one of its authorized agents Proprietary Note The information contained in this document is to the best of our knowledge entirely correct However Kontron cannot accept liability for any inaccuracies or the consequences thereof or for any liability arising from the use or application of any circuit product or example shown in this document Kontron reserves the right to change modify or improve this document or the product described herein as seen fit by Kontron without further notice Trademarks Kontron the PEP logo and if occurring in this manual CXM are trademarks owned by Kon tron Kaufbeuren Germany In addition this document may include
22. I O Controller Hub Feature set comprises e PCI 2 3 interface with eight PCI IRQ inputs Bus master IDE controller UltraDMA 100 66 33 or PIO mode Five USB controllers with up to eight USB 1 1 or USB 2 0 ports max of 3 ports used on the CP6001 V Hub interface for a 945GM Express Chipset FWH interface LPC interface RTC controller 2 2 Peripherals The following standard peripherals are available on the CP6001 V board 2 2 1 Timer The CP6001 V is equipped with the following timers Real time clock RTC The ICH7R contains an MC146818A compatible real time clock with 256 bytes of bat tery backed RAM The real time clock performs timekeeping functions and includes 256 bytes of general purpose battery backed CMOS RAM All CMOS RAM data from the RTC remains stored in an additional EEPROM This prevents data loss in case the CP6001 V is operated without battery Hardware delay timer for short reliable delay times ID 1022 4593 Rev 1 0 Page 2 5 Functional Description CP6001 V m 2 2 2 Watchdog Timer A Watchdog Timer is provided which forces either an IRQ5 or a reset condition configurable in the Watchdog Register The Watchdog Timer can be programmed in 12 steps ranging from 125 msec up to 256 seconds If the Watchdog Timer is enabled it cannot be stopped 2 2 3 Reset The CP6001 V is automatically reset by a precision voltage monitoring circuit that detects a drop in voltage below the acceptable operating lim
23. This bit can then be polled by the application and handled ac cordingly To continue using the Watchdog write a 1 to the WTE bit and then retrigger the Watchdog using WTR The WTE bit retains its setting as long as no power down up is done Therefore this bit may be used to verify the status of the Watchdog Reset mode This mode is used to force a hard reset in the event of a Watchdog timeout In addition the WTE bit is not reset by the hard reset which makes it available if necessary to determine the status of the Watchdog prior to the reset Interrupt mode This mode causes the generation of an interrupt in the event of a Watchdog timeout The interrupt handling is a function of the application If required the WTE bit can be used to determine if a Watchdog timeout has occurred Dual stage mode This is a complex mode where in the event of a timeout two things occur 1 an interrupt is generated and 2 the Watchdog is retriggered automatically In the event a sec ond timeout occurs immediately following the first timeout a hard reset will be generated If the Watchdog is retriggered normally operation continues The interrupt generated at the first tim eout is available to the application to handle the first timeout if required As with all of the other modes the WTE bit is available for application use E ID 1022 4593 Rev 1 0 Page 4 11 Configuration CP6001 V m Table 4 15 Watchdog Timer Control Register WTIM
24. are taken to preclude damage to the system or in jury to personnel which may arise from the handling of these cables con necting or disconnecting Kontron disclaims all liability for damage or injuries resulting from failure to comply with the above Unscrew the front panel retaining screws Warning 5 Due care should be exercised when handling the board due to the fact that the heat sink can get very hot Do not touch the heat sink when changing the board Using the ejector handles disengage the board from the backplane and carefully remove it from the system Dispose of the old board as required observing the safety requirements indicated in Chapter 3 1 Obtain the replacement CP6001 V board Warning amp When performing the next step DO NOT push the board into the back plane connectors Use the ejector handles to seat the board into the back plane connectors Carefully insert the new board into the old board slot until it makes contact with the backplane connectors Using both ejector handles engage the board with the backplane When the ejector han dles are locked the board is engaged Fasten the front panel retaining screws Connect all required interfacing cables to the board Hot swap of the CP6001 V is now complete Warning amp The CP6001 front panel cables may have power applied which comes from an external source In addition these cables may be connected to de v
25. designated by the application requirements for the board until it makes contact with the backplane connectors Page 3 4 ID 1022 4593 Rev 1 0 CP6001 V Installation 3 Using both ejector handles engage the board with the backplane When the ejector handles are locked the board is engaged 4 Fasten the two front panel retaining screws 5 Connect all external interfacing cables to the board as required 6 Ensure that the board and all required interfacing cables are properly secured The CP6001 V is now ready for initial operation Except for the BIOS at this point there is no other software installed For software installation and further operation of the CP6001 V refer to appropriate CP6001 V software BIOS BSP OS application and system documentation 3 3 Standard Removal Procedures To remove the board proceed as follows 1 Ensure that the safety requirements indicated in Chapter 3 1 are observed Particular at tention must be paid to the warning regarding the heat sink Warning Care must be taken when applying the procedures below to ensure that neither the CP6001 V nor system boards are physically damaged by the application of these procedures 2 Ensure that no power is applied to the system before proceeding Warning Even though power may be removed from the system the CP6001 V front panel cables may have power applied which comes from an exter nal source In addition these cables may be connected
26. die temperature sensors Digital Thermal Sensor DTS Thermal Monitor 1 TM1 Sensor Catastrophic Cooling Failure Sensor Via the Digital Thermal Sensor DTS the BIOS or the application software can measure the processor die temperature The Thermal Monitor 1 TM1 Sensor and the Catastrophic Cooling Failure Sensor are not ac cessible They serve for protecting the processor from overheating These sensors are inte grated in the processor and work without any interoperability of the BIOS or the software application The thermal monitor function utilizes the thermal control circuit to regulate the pro cessor temperature It is enabled in the BIOS and allows the processor to maintain a safe op erating temperature without the need for special software drivers or interrupt handling routines The maximum die temperatures for all processor types is as follows Intel Celeron amp M 440 100 C 6 2 1 Digital Thermal Sensor DTS The processor includes one on die Digital Thermal Sensors DTS that can be read via an in ternal register of the processor no I O interface The Digital Thermal Sensor provides the pre ferred method of reading the processor die temperature since it is located much closer to the hottest portions of the die and can thus more accurately track the die temperature 6 2 2 Thermal Monitor 1 TM1 The Thermal Monitor 1 TM1 Sensor controls the processor temperature and power consump tion by activating the Th
27. eb pesa d 2 6 EEPROM Address Map e 2 7 Hot Swap LED Function nenne ea zen 2 8 Watchdog and Temperature Status LEDs Function ssss 2 8 General Purpose LEDs Function 2 ccscccccccceeeccnsnecenecaasesersssesensseseeeetees 2 9 POST Code Sequence M 2 10 POST Code Exaile E 2 10 USB Con J4 and J5 Pinout au aa 2 11 USB NAND Flash Con J19 Pinout een 2 12 D Sub VGA Connector J6 Pinout sse 2 13 Serial Con J9 COM1 Pinout sense seres eee 2 13 Pinout of J7 and J8 Based on the Implementation 2 14 SATA Connector J12 Pinout MER 2 15 SATA Extension Connector J13 Pinout essen 2 16 Onboard PCI Configuration sss 2 16 PMC Connectors J17 and J19 Pinout sueemmemsmnenleie aha 2 17 CompactPCI Bus Connector J1 System Slot Pinout 2 21 CompactPCI Bus Connector J1 Peripheral Slot Pinout 2 22 64 bit CompactPCI Bus Connector J2 System Slot Pinout 2 23 64 bit CompactPCI Bus Connector J2 Peripheral Slot Pinout 2 24 CompactPCI Rear I O Connector J3 Pinout esses 2 25 CompactPCI Rear I O Connector J3 Signals rrnnnnnnrrrrrrrrrrrrrrrrerrrrrrrrnnn 2 25 Clearing BIOS CMOS Setup nenne 4 3 CompactPCI Clock Configuration nnnnnnnnnrnnrrrrrvverrrrrrrrnrrnnnnnnnnnnnrrrnnnne 4
28. for the hard disk The operating systems used were DOS Linux and Windows XP All measurements were con ducted at a temperature of 25 C The measured values varied because the power consump tion was dependent on the processor activity Note Age The power consumption values indicated in the tables below can vary depend ing on the ambient temperature or the system performance This can result in deviations of the power consumption values of up to 10 The power consumption was measured using the following processor Intel Celeron M processor 440 1 86 GHz 533 MHz FSB 1 MB L2 cache with the following operating systems DOS This operating system has no power management support and provides a very simple method to verify the measured power consumption values Linux Windows XP IDLE Mode With these operating systems both processor cores were in IDLE state and under the following testing conditions CP6001 V s Thermal Design Power TDP at 7596 These values represent the typical maximum power dissipation reached under OS con trolled applications CP6001 V s Thermal Design Power TDP at 10096 These values represent the maximum power dissipation achieved through the use of specific tools to heat up the processor cores 10096 TDP is unlikely to be reached in real applications The following tables indicate the power consumption of the CP6001 V with 1 GB DDR2 SDRAM in dual channel mode For measurements made with t
29. is authorized to make any modification or addition to the above specified terms either verbally or in any other form written or electronically transmitted without the company s consent u ID 1022 4593 Rev 1 0 Page xvii Preface CP6001 V This page has been intentionally left blank Page xviii ID 1022 4593 Rev 1 0 CP6001 V Introduction Chapter Introduction En ID 1022 4593 Rev 1 0 Page 1 1 Introduction CP6001 V m This page has been intentionally left blank Page 1 2 ID 1022 4593 Rev 1 0 CP6001 V Introduction E 1 Introduction 1 1 Board Overview The CP6001 V is a highly integrated GU CompactPCI CPU board based on the Intel Celeron amp M 440 processor combined with the high performance Mobile Intel 945GM Express Chipset The board supports the Intel amp Celeron amp M processor 440 with 1 86 GHz clock speed 533 MHz front side bus speed as well as 64 kB L1 and 1 MB L2 cache provided in a 479 UFCBGA package and utilizes the Mobile Intel 945GM Express Chipset as Graphics Memory Controller Hub and the ICH7R as I O Controller Hub Two SO DIMM sockets are available on the board to provide up to 4 GB dual channel Double Data Rate DDR2 memory running at 533 MHz PC2 4200 The board also includes four Intel amp 82574L Gigabit Ethernet controllers each utilizing a x1 lane PCI Express interconnection to the ICH7R I O Controller Hub In addition the board can accommodate a
30. is used it may not power up correctly and cause the CP6001 V to hang up The solution is to use an industrial PSU or to add more load to the system The start up behavior of CPCI and PCI ATX power supplies is critical for all new CPU boards These boards require a defined power sequence and start up behavior of the power supply For information on the required behavior refer to the power supply specifications on the formfac tors org web site and to the PICMG CompactPCI specification on the picmgeu org web site 5 1 3 1 Start Up Requirement Power supplies must comply with the following guidelines in order to be used with the CP6001 V Beginning at 10 of the nominal output voltage the voltage must rise within gt 0 1msto lt 20 ms to the specified regulation range of the voltage Typically gt 5 ms to lt 15 ms There must be a smooth and continuous ramp of each DC output voltage from 10 to 90 of the regulation band The slope of the turn on waveform shall be a positive almost linear voltage increase and have a value from 0 V to nominal Vout Page 5 4 ID 1022 4593 Rev 1 0 CP6001 V Power Considerations The 5 VDC output level must always be equal to or higher than the 3 3 VDC output during power up and normal operation 5 1 3 2 Power Up Sequence Both voltages must reach their minimum in regulation level not later than 20 ms after the output power ramp start 5 1 3 3 Tolerance The tolerance of the vo
31. on the top The lithium battery must be replaced with an identical battery or a battery type recommended by the manufacturer A suitable battery type is CR2025 Note The user must be aware that the battery s operational temperature range is less than that of the CP6001 V s storage temperature range For exact range information refer to the battery manufacturer s specifications Note Care must be taken to ensure that the battery is correctly replaced The battery should be replaced only with an identical or equivalent type recommended by the manufacturer Dispose of used batteries according to the manufacturer s instructions The typical life expectancy of a 170 mAh battery CR2025 is 5 6 years with an average on time of 8 hours per working day at an operating temperature of 30 C However this typical value varies considerably because the life expectancy is dependent on the operating temperature and the standby time shutdown time of the system in which it operates To ensure that the lifetime of the battery has not been exceeded it is recom mended to exchange the battery after 4 5 years 3 7 Software Installation The installation of the Ethernet and all other onboard peripheral drivers is described in detail in the relevant Driver Kit files Page 3 10 ID 1022 4593 Rev 1 0 CP6001 V Installation Installation of an operating system is a function of the OS software and is not addressed in this
32. to devices that can be damaged by electrostatic discharging or short circuiting of pins It is the responsibility of the system designer or integrator to ensure that appropriate measures are taken to preclude damage to the system or injury to personnel which may arise from the handling of these cables connecting or disconnecting Kontron disclaims all liability for damage or injuries resulting from failure to comply with the above 3 Disconnect any interfacing cables that may be connected to the board 4 Unscrew the front panel retaining screws Warning Due care should be exercised when handling the board due to the fact that the heat sink can get very hot Do not touch the heat sink when changing the board 5 Disengage the board from the backplane by first unlocking the board ejection handles and then by pressing the handles as required until the board is disengaged After disengaging the board from the backplane pull the board out of the slot Dispose of the board as required NO ID 1022 4593 Rev 1 0 Page 3 5 Installation CP6001 V m 3 4 Hot Swap Procedures The CP6001 V is designed for hot swap operation When installed in the system slot it is capa ble of supporting peripheral board hot swapping When installed in a peripheral slot its hot swap capabilities depend on the type of backplane in use and the system controller s capabil ities The reason for this being that communication with the system
33. 0 33 MHz 4 Res Reserved 0 3 CSYS CPCI system slot identification SYSEN signal N A 0 Installed in a system slot 1 7 Installed in a peripheral slot 2 CENUM CPCI system enumeration ENUM signal N A R 0 Indicates the insertion or removal of a hot swap system board 1 No hot swap event 1 CFAL CPCI power supply status FAL signal N A R 0 Power supply failure 1 Power in normal state 0 CDEG CPCI power supply status DEG signal N A R 0 Power derating 1 Power in normal state 4 3 3 Control Register 1 CTRL1 The Control Register 1 holds board specific control information Table 4 7 Control Register 1 CTRL1 REGISTER NAME CONTROL REGISTER 1 CTRL1 ADDRESS 0x283 DESCRIPTION ACCESS 7 5 Res Reserved 000 R 4 CRST CPCI reset when the board is used in a peripheral slot 0 R W 0 Disable CPCI reset to board 1 Enable CPCI reset to board 3 0 Res Reserved 0000 R Page 4 6 ID 1022 4593 Rev 1 0 CP6001 V Configuration 4 3 4 Device Protection Register DPROT The Device Protection Register holds the write protect signals for Flash devices Table 4 8 Device Protection Register DPROT DEVICE PROTECTION REGISTER DPROT ADDRESS 0x284 DESCRIPTION ACCESS 7 GWP Global write protection N A R 0 Memory devices not write protected Boot Flash 1 Memory devices write protected Boot Flash This b
34. 1 0 CP6001 V Functional Description 2 Functional Description 2 1 CPU Memory and Chipset 2 1 1 CPU The CP6001 V supports the latest Intel Celeron M 440 processor with 1 86 GHz processor speed and 533 MHz FSB The following list sets out some of the key features of this processor Supports Intel Architecture with Dynamic Execution On die primary 32 kB instruction cache and 32 kB write back data cache On die 1MB second level cache with Advanced Transfer Cache Architecture Data Prefetch Logic Streaming SIMD Extensions 2 SSE2 Streaming SIMD Extensions 3 SSE3 533 MHz Front Side Bus FSB Digital Thermal Sensor Execute Disable Bit support for enhanced security The following tables provide information about the Intel Celeron M 440 processor supported on the CP6001 V including its maximum power dissipation Table 2 1 Intel Celeron amp M 440 Processor Supported on the CP6001 V Intel amp Celeron amp M 440 1 86 GHz PACKAGE uFCBGA L2 CACHE 1 MB 533 MHz MAX POWER POWER 27 W ID 1022 4593 Rev 1 0 Page 2 3 Functional Description CP6001 V r 2 1 2 Memory The CP6001 V supports a dual channel DDR2 memory without Error Checking and Correcting ECC running at 533 MHz PC2 4200 The maximum memory size per channel is 2 GB The available memory configuration can be either 512 MB 1 GB 2 GB or 4 GB The maximum address space for the entire board is 4 GB and is limit
35. 10 Environmental Climatic Humidity IEC60068 2 78 WEEE Directive 2002 96 EC Waste electrical and electronic equipment RoHS Directive 2002 95 EC Restriction of the use of certain hazardous sub stances in electrical and electronic equipment 1 8 Related Publications The following publications contain information relating to this product Table 1 3 Related Publications PRODUCT PUBLICATION CompactPCI Systems and CompactPCI Specification PICMG 2 0 Rev 3 0 Boards CompactPCI Packet Switching Backplane Specification PICMG 2 16 Rev 1 0 CompactPCI System Management Specification PICMG 2 9 Rev 1 0 CompactPCI Hot Swap Specification PICMG 2 1 Rev 2 0 Kontron CompactPCI Backplane Manual ID 24229 CompactFlash Cards CF and CompactFlash Specification Revision 2 1 PMC Modules IEEE 1386 2001 IEEE Standard for a Common Mezzanine Card CMC Family IEEE 1386 1 2001 IEEE Standard Physical and Environmental Layers for PCI Mezzanine Cards PMC All Kontron products Product Safety and Implementation Guide ID 1021 9142 ID 1022 4593 Rev 1 0 Page 1 15 Introduction CP6001 V m This page has been intentionally left blank Page 1 16 ID 1022 4593 Rev 1 0 CP6001 V Functional Description Chapter Functional Description ID 1022 4593 Rev 1 0 Page 2 1 Functional Description CP6001 V m This page has been intentionally left blank Page 2 2 ID 1022 4593 Rev
36. 2 1 Digital Thermal Sensor DTS un 6 3 622 Thermal Monitor 1 TM1 nee den 6 3 6 2 8 Catastrophic Cooling Failure Sensor sssssss 6 4 6 3 External Thermal Regulation a 6 4 6 3 1 Thermal Characteristic Graph cccceeeeceeeceeeeeeseeceaaeesaeeeeseeses 6 5 632 FonphoralS ea E 6 6 A CP6001 V MK2 5SATA Assembly Kit A 3 A 1 CP6001 EXT SATA Module Overview essen A 3 A2 Technical Specifications ana A 3 A 3 CP6001 EXT SATA Functional Block Diagram sss A 3 A 4 CP6001 EXT SATA Module Layout essen A 4 25 Module Interfaces nennen A 5 A 5 1 Board to Board Connector J una A 5 A392 SAIA CONNECIOr E A 6 E ID 1022 4593 Rev 1 0 Page vii Preface CP6001 V This page has been intentionally left blank Page viii ID 1022 4593 Rev 1 0 CP6001 V Preface 1 1 1 2 1 3 2 1 2 2 2 4 2 5 2 6 27 2 8 2 9 2 10 244 245 2 43 2 14 2 15 2 16 247 2 18 2 19 2 20 2 21 5 95 2 23 2 24 4 1 4 2 4 3 4 4 4 5 List of Tables CP6001 V Main Specifications rrnnnnnnnnnrrrrrrrrrrrrrnrrrrrrrnnnrnnnnnrnnrernnnr 1 10 Standard ER RE 1 15 Related Publications S ibn 1 15 Intel Celeron M 440 Processor Supported on the CP6001 V 2 3 Supported Recommended Memory Configurations uuuuussss 2 4 SMBus Device Addresses nu paca ou venei old
37. 2 COM port COM1 implemented as an RJ 45 connector on the front panel COM1 is fully compatible with the 16550 controller includes a sub set of handshaking and mo dem control signals and provides maskable interrupt generation The data transfer on the COM port is up to 115 2 kbit s The following figure and table provide pinout information for the serial connector J9 COM1 Figure 2 4 Serial Con J9 COM1 Table 2 13 Serial Con J9 COM1 Pinout PIN SIGNAL FUNCTION I O 1 RTS Request to send 2 DTR Data terminal ready 3 TXD Transmit data 4 GND Signal ground cod 5 GND Signal ground 6 RXD Receive data 7 DSR Data set ready 8 CTS Clear to send E ID 1022 4593 Rev 1 0 Page 2 13 Functional Description CP6001 V m 2 3 6 Gigabit Ethernet Figure 2 5 Gigabit Ethernet Con The CP6001 V provides four 10Base T 100Base TX nectors J7 and J8 1000Base T Gigabit Ethernet interfaces two on the front panel GbE A and GbE B and two on the rear I O GbE C and GbE D in accordance with the PICMG 8 id 2 16 specification J8 e The Gigabit Ethernet interfaces on the CP6001 V are GbE B 1 based on the Intel amp 82574L Gigabit Ethernet control lers which are connected to the PCI Express inter ACT face The Intel amp 82574L Gigabit Ethernet Controller s a architecture is optimized to deliver high performance 8 ui with the lowest power consumption The controll
38. 3 CompactPCI Clock Configuration nnnnnnnnrrnnrrrrrrverrrrrrrnnrrnnnnnnnnnnnerrrnnne 4 4 VO Address Map o 4 4 Status Register O STATO u a 4 5 ID 1022 4593 Rev 1 0 Page ix 4 9 4 10 4 11 4 12 4 13 4 14 4 15 4 16 4 17 5 1 5 2 5 3 5 4 5 5 5 6 5 7 5 8 5 9 5 10 5 11 A 1 A 2 A 3 Page x Preface CP6001 V Status Register 1 S TAT Ilse 4 6 Control Register T GURL an e i eres etu Unde bbdesba neccen 4 6 Device Protection Register DPROT eese cessere nnns 4 7 Reset Status Register RSTAT uses nende 4 7 Board Interrupt Configuration Register BICFG nnenn 4 8 Board ID Register BID u en 4 8 Board and PLD Revision Register BREV esee 4 9 Geographic Addressing Register GEOAD 2222222222200nnnnnnnnnn en 4 9 Delay Timer Register DTIM 2 cccccccccceeeseeeeeeeesseeeeeeeesenenseeeeeeeeeeeees 4 10 Watchdog Timer Control Register WTIM sssssssssssss 4 12 LED Configuration Register LCFG sss 4 13 LED Control Register EG TRE een a ende RE eo abo EUN 4 14 Maximum Input Power Voltage Limits eessssssseeeeeee 5 3 DC Operational Input Voltage Ranges rnnnnnnnnrrnnvvrnvrrrnrrrrrrrrnnrrnnnnrrrnnnnn 5 3 Input Voltage GharacterfslGS ssacssccenennes ick canine ea 5 5 Power Consumption CP6001 V with DOS seen 5 7 Power Consumption
39. 4 off 0 HIGH NIBBLE off 0 LOW NIBBLE off 0 off 0 off 0 on 1 0x1 POST CODE 0x41 Note Under normal operating conditions the General Purpose LEDs should not re main lit during boot up They are intended to be used only for debugging purpos es In the event that a General Purpose LED lights up during boot up and the CP6001 V does not boot please contact the Kontron for further assistance Page 2 10 ID 1022 4593 Rev 1 0 CP6001 V Functional Description 2 3 3 USB Interfaces The CP6001 V supports three USB 2 0 ports two on the front I O and one onboard for the USB 2 0 NAND Flash module All three ports are high speed full speed and low speed capable High speed USB 2 0 allows data transfers of up to 480 Mb s 40 times faster than a full speed USB USB 1 1 One USB peripheral may be connected to each port For connecting more USB devices to the CP6001 V than there are available ports an external USB hub is required Note The USB host interfaces can be used with maximum 500 mA continuous load current as specified in the Universal Serial Bus Specification Revision 2 0 Short circuit protection is provided All the signal lines are EMI filtered 2 3 3 1 Front Panel USB Connectors J4 and J5 The CP6001 V has two USB 2 0 interfaces implemented as two 4 pin type A USB connectors on the front panel J4 and J5 with the following pinout Figure 2 1
40. 4593 Rev 1 0 CP6001 V Introduction Table 1 1 CP6001 V Main Specifications Continued CP6001 V SPECIFICATIONS CompactPCl Compliant with the CompactPCl Specification PICMG 2 0 R3 0 e System controller operation e 32 bit 33 66 MHz PCI master interface 3 3V or 5V signaling levels universal signaling support Compliant with Packet Switching Specification PICMG 2 16 R1 0 When installed in a peripheral slot the CP6001 V is electrically isolated from the CompactPCI bus It receives power from the backplane and supports rear I O in compliance with the PICMG 2 16 specification Rear I O The following interfaces are routed to the rear I O connector J3 2x Gigabit Ethernet compliant with PICMG 2 16 Hot Swap Compatible The CP6001 V supports System Master hot swap functionality and application dependent hot swap functionality when used in a peripheral slot When used as a System Master the CP6001 V supports individual clocks for each slot and the ENUM signal handling is in compliance with the PICMG 2 1 Hot Swap Specification VGA Built in Intel 3D Graphics accelerator for enhanced graphics performance Supports resolutions of up to 2048 x 1536 at a 75 Hz refresh rate Hardware motion compensation for software MPEG2 decoding Dynamic Video Memory Technology DVMT3 0 Interfaces Gigabit Ethernet Up to four 10 Base T 100 Base TX 1000 Base T Gigabit Ethernet interfaces based on the Intel 82574L Ethernet PCI Express b
41. D V I O AD 37 AD 36 GND 12 NC AD 42 AD 41 AD 40 GND AD 39 GND 11 NC AD 45 GND V I O AD 44 AD 43 GND 10 NC AD 49 AD 48 AD 47 GND AD 46 GND 9 NC AD 52 GND V I O AD 51 AD 50 GND 8 NC AD 56 AD 55 AD 54 GND AD 53 GND 7 NC AD 59 GND V I O AD 58 AD 57 GND 6 NC AD 63 AD 62 AD 61 GND AD 60 GND 5 NC C BE 5 NC V I O C BE 4 PAR64 GND 4 NC V I O RSV CIBE 7 R GND C BE 6 GND 3 NC CLK4 GND GNT3 REQ4 GNT4 GND 2 NC CLK2 CLK3 SYSEN GNT2 REQ3 GND 1 NC CLK1 GND REQ1 GNT1 REQ2 GND Note The 64 bit CompactPCI signals are not used on the board but all 64 control and address signals are terminated to V I O ID 1022 4593 Rev 1 0 Page 2 23 Functional Description r Table 2 22 64 bit CompactPCI Bus Connector J2 Peripheral Slot Pinout CP6001 V PIN Z A B C E F 22 NC GA4 GA3 GA2 GA1 GAO GND 21 NC GND RSV RSV RSV GND 20 NC i GND RSV GND RSV GND 19 NC GND GND NC NC NC GND 18 NC RSV RSV RSV GND RSV GND 17 NC RSV GND PRST i GND 16 NC RSV RSV DEG GND RSV GND 15 NC RSV GND FAL 7 GND 14 NC P i GND i GND 13 NC GND V I O GND 12 NC ii GND 7 GND 11 NC GND V I O i GND 10 NC i P GND i GND 9 NG GND V I O i i GND 8 NC li i GND GND 7 NC GND v I 0 5 GND 6 NC i li GND GND 5 NG NC V I O 5 i GND 4 NC V I O RSV GND i GND 3 NC GND i GND 2 NC 7 SYSEN GND
42. I reset ID 1022 4593 Rev 1 0 Page 4 7 Configuration CP6001 V m 4 3 6 Board Interrupt Configuration Register BICFG The Board Interrupt Configuration Register holds a series of bits defining the interrupt routing for the Watchdog If the Watchdog Timer fails it can generate an IRQ5 interrupt The enumeration signal is generated by a hot swap compatible board after insertion and prior to removal The system uses this interrupt signal to force the software to configure the new board The derate signal indicates that the power supply is beginning to derate its power output Table 4 10 Board Interrupt Configuration Register BICFG BOARD INTERRUPT CONFIGURATION REGISTER BICFG ADDRESS 0x286 DESCRIPTION RESET VALUE 7 6 CFICF CPCI fail signal interrupt configuration FAL signal 00 R 00 Disabled 01 IRQ5 10 Reserved 11 Reserved ACCESS 5 CEICF CPCI enumeration signal to IRQ5 routing ENUM signal 0 R W 0 Disabled 1 Enabled 4 CDICF CPCI derate signal to IRQ5 routing DEG signal 0 R W 0 Disabled 1 Enabled 3 2 Res Reserved 00 R 1 0 WICF Watchdog interrupt configuration 00 R W 00 Disabled 01 IRQ5 11 Reserved 4 3 7 Board ID Register BID This register provides the board s coded ID which is unique for the CP6001 V Table 4 11 Board ID Register BID BOARD ID REGISTER BID ADDRESS 0x288 DESCRIPTIO
43. MO RE OL 2 4 2 1 3 Intel 945GM Express Chipset Overview ccccceceeeeeeeeeeeeeneeees 2 4 2 1 4 Mobile Intel 945GM Express Chipset GMCH 2 4 215 VO Controller Hub ICHZR 1 eost ttn etnies 2 5 PN NEN UR 2 5 22 Tee ee ee 2 5 222 Watchdog Timer aaa 2 6 2 2 3 ROSEL c a E AARE CEE TEER EERS 2 6 2 2 4 SMBus Devices iussit i eei eine 2 6 2 2 5 Thermal Management System Monitoring rrrnnnnnnrrrrrrrrrnnnnnnnnnnn 2 6 220 Serial EEPROM sertis uten ieii EEE 2 7 227 FASHA MOMO RE REE 2 7 2 2 7 1 BIOS FLASH Firmware Hub 2 7 2 2 7 2 USB 2 0 NAND Flash Module 0222222222222 22222 2 7 22 13 CompactFlash Socket Mm T 2 7 23 Board Interfaces 2 d eek 2 8 2231 FONN PO LEDS m 2 8 24311 FO SUP LED eee en 2 8 2 3 1 2 Watchdog and Temperature Status LEDS 2 8 2 3 1 3 General Purpose LEDS nung 2 9 2 3 2 How to Read the 8 Bit POST Code rrrrrrnrnrrrrnnnnnnnnnrrrrrrrenrernnrennn 2 10 23 3 USB MENES nenne arg 2 11 2 3 3 1 Front Panel USB Connectors J4 and J5 2 2 11 2 3 3 2 Onboard USB NAND Flash Connector J19 2 12 2 3 4 Graphics Controller nee 2 12 239 COM PL eee ea 2 13 250 GOD BENENE vasene 2 14 2 3 7 Serial ATA Interface iesu i EE arena added 2 15 2 3 7 1 Serial ATA Connector J12 anne 2 15 2 3 7 2 2 5 SATA HDD SSD Extension Connectors J13 2 16
44. N RESET VALUE ACCESS Board identification 0xB0 CP6001 V Page 4 8 ID 1022 4593 Rev 1 0 CP6001 V Configuration 4 3 8 Board and PLD Revision Register BREV The Board and PLD Revision Register signals to the software when differences in the board and the Programmable Logic Device PLD require different handling by the software It starts with the value 0x00 for the initial board prototypes and will be incremented with each change in hardware as development continues Table 4 12 Board and PLD Revision Register BREV REGISTER NAME BOARD AND PLD REVISION REGISTER BREV ADDRESS 0x289 DESCRIPTION ACCESS BREV Board revision PREV PLD revision N A R 4 3 9 Geographic Addressing Register GEOAD The Geographic Addressing Register describes the CompactPCI geographic addressing sig nals Table 4 13 Geographic Addressing Register GEOAD REGISTER NAME GEOGRAPHIC ADDRESSING REGISTER GEOAD ADDRESS 0x28A DESCRIPTION ACCESS 7 5 Res Reserved 000 R GA CPCI geographic address N A R ID 1022 4593 Rev 1 0 Page 4 9 Configuration CP6001 V m 4 3 10 Delay Timer Register DTIM The delay timer enables the user to realize short reliable delay times It runs by default and does not start again on its own It can be restarted at anytime by writing anything other than a 0 to the Delay Timer Register The hardware delay timer pr
45. P6001 V Installation 3 5 2 USB 2 0 NAND Flash Module Installation A USB 2 0 NAND Flash module may be connected to the CP6001 V via the onboard USB 2 0 NAND Flash connector J11 This optionally available module must be physically installed on the CP6001 V prior to installation of the CP6001 V in a system During installation it is necessary to ensure that the USB 2 0 NAND Flash module is properly seated in the onboard USB 2 0 NAND Flash connector i e the pins are aligned correctly and not bent To secure the USB 2 0 NAND Flash module to the CP6001 V tighten the fastening Screw Before putting the CP6001 V into operation ensure that the boot priority is configured as re quired for the application 3 5 3 Installation of External Serial ATA Devices The following information pertains to external SATA devices which may be connected to the CP6001 V via normal cabling Some symptoms of incorrectly installed SATA devices are Device on a SATA channel does not spin up check power cables and cabling May also result from a bad power supply or SATA device The SATA connector on the CP6001 V provides only a data connection The power for this device must be supplied by a separate connector For further information refer to the respective documentation of the device SATA device fail message at boot up may be a bad cable or lack of power going to the drive 3 5 4 Onboard 2 5 HDD SSD Installation One 2 5 SATA HDD SSD may be direct
46. REGISTER NAME WATCHDOG TIMER CONTROL REGISTER WTIM ADDRESS 0x28C DESCRIPTION ACCESS 7 WTE Watchdog Timer expired status bit 0 R W 0 Watchdog Timer has not expired 1 Watchdog Timer has expired Writing a 1 to this bit resets it to 0 6 5 WMD Watchdog Mode 00 R W 00 Timer only mode 01 Reset mode 10 Interrupt mode 11 Cascaded mode dual stage mode 4 WEN WTR Watchdog enable Watchdog trigger control bit 0 R W 0 Watchdog Timer not enabled Prior to the Watchdog being enabled this bit is known as WEN After the Watchdog is enabled it is known as WTR Once the Watchdog Timer has been enabled this bit cannot be reset to 0 As long as the Watchdog Timer is enabled it will indicate a 1 1 Watchdog Timer enabled Writing a 1 to this bit causes the Watchdog to be retriggered to the timer value indicated by bits WTM 3 0 3 0 WTM Watchdog timeout settings 0000 R W 0000 0 125 s 0001 0 25 s 0010 2 0 5s 0011215 0100225 0101245 0110 85 0111 16s 1000 325 1001 64s 1010 128 s 1011 256 s 1100 reserved 1101 7 reserved 1110 reserved 1111 reserved The nominal timeout period is 5 longer than the above stated val ues Page 4 12 ID 1022 4593 Rev 1 0 CP6001 V Configuration 4 3 12 LED Configuration Register LCFG The LED Configuration Register holds a series of bits defining the onboard configuration for the front panel LED
47. Reset the solder jumper JP1 to the normal position open Reboot the system Table 4 1 Clearing BIOS CMOS Setup JP1 DESCRIPTION Open Normal boot using the CMOS settings Closed Clear the CMOS settings and use the default values The default setting is indicated by using italic bold 4 1 2 Shorting Chassis GND Shield to Logic GND The front panel and the front panel connectors are isolated from the logic ground by means of capacitors If it is necessary to connect the logic GND with the chassis GND this should be done on the backplane not on the board itself see the PICMG CompactPCI Specification 2 0 R3 0 section 3 6 For further information refer to the Kontron CompactPCl Backplane Manual on the Kontron web site 4 1 3 General Purpose Jumper The CP6001 V provides one general purpose jumper J20 which is reserved for future use 4 1 4 CompactPCI Interface Configuration The CP6001 V provides one jumper J21 for CompactPCI clock configuration This jumper is used to force the CompactPCI interface to operate at 33 MHz even when the system is able to operate at higher clock rates Table 4 2 CompactPCI Clock Configuration J21 DESCRIPTION Open PCI 33 MHz 66 MHz auto detection via the CompactPCI backplane Closed PCI fregency configured to 33 MHz The default setting is indicated by using italic bold E ID 1022 4593 Rev 1 0 Page 4 3 Configuration CP6001 V 4 1 5 Global Write Protec
48. TA TX Differential Transmit l Segment S3 SATA TX Differential Transmit S7 S4 GND Ground signal S5 SATA_RX Differential Receive P1 S6 SATA RX Differential Receive S7 GND Ground signal Signal Segment L Power Segment Central Connector Polarizer Power Segment L P1 3 3V 3 3V power P15 P2 33V 3 3V power P3 3 3V 3 3V power P4 GND Ground signal P5 GND Ground signal P6 GND Ground signal P7 5V 5V power P8 5V 5V power P9 5V 5V power P10 GND Ground signal P11 RES Reserved P12 GND Ground signal P13 12V NC Not connected P14 12V NC Not connected P15 12V NC Not connected Power Segment Key PageA 6 ID 1022 4593 Rev 1 0
49. The board is offered with Microsoft Windows XP Windows XP Embedded and Linux operating systems Please contact Kontron for further information concerning the operation of the CP6001 V with other operating systems ID 1022 4593 Rev 1 0 Page 1 3 Introduction CP6001 V m 1 2 Board Specific Information The CP6001 V is a CompactPCI single board computer based on the Intel Celeron amp M processor 440 processor and specifically designed for use in highly integrated platforms with solid mechanical interfacing for a wide range of industrial environment applications Some of the CP6001 V s outstanding features are Intel Celeron M processor 440 1 86 GHz 533 MHz FSB 1 MB L2 cache 479 pin uFCBGA package 64 kB L1 and up to 1 MB L2 cache on die running at CPU speed Mobile Intel 945GM Express Chipset with Intel 82801GR ICH7R I O Controller Hub Up to 4 GB DDR2 SDRAM memory running at 533 MHz Integrated 3D high performance VGA controller Analog display support for up to 2048 x 1536 pixels at 75 Hz 32 bit 33 66 MHz CompactPCI interface PICMG 2 0 PMC interface with bezel cutout on front panel and PCI functionality 32 bit 33 MHz PCI Four Gigabit Ethernet interfaces utilizing a x1 lane PCI Express per GbE controller Two Gigabit Ethernet interfaces on the front panel Two optional Gigabit Ethernet interfaces on the rear I O PICMG 2 16 EIDE Ultra ATA interface for onboard CompactFlash socket type I and type II
50. USB Con J4 and J5 Table 2 10 USB Con J4 and J5 Pinout ji PIN SIGNAL FUNCTION I O 4 321 1 VCC VCC 2 UVO Differential USB I O J4 3 UVO Differential USB 1 0 4 8 2 1 4 GND GND Note Windows kernel debugging is supported via the USB Port 0 of the ICH7R chipset The USB Port 0 is routed to the USB connector J5 E ID 1022 4593 Rev 1 0 Page 2 11 Functional Description CP6001 V r 2 3 3 2 Onboard USB NAND Flash Connector J19 The CP6001 V has one onboard USB 2 0 interface for connecting an optional USB 2 0 NAND Flash mezzanine module This interface is implemented as a 10 pin connector J19 with the fol lowing pinout Figure 2 2 USB NAND Flash Con J19 Table 2 11 USB NAND Flash Con J19 Pinout PIN SIGNAL FUNCTION I O 1 VCC VCC 3 UVO Differential USB I O 2 10 Eg 5 UVO Differential USB I O 1 9 7 GND GND 9 Key 2 4 6 8 NC Not connected 10 Res Reserved 2 3 4 Graphics Controller The 945GM Express GMCH includes a highly integrated graphics accelerator delivering high performance 3D 2D graphics capabilities Integrated 2D 3D Graphics Intel Gen3 5 integrated graphics engine Smart 2D display technology S2DDT Dynamic video memory technology Integrated 400 MHz RAMDAC Resolution up to 2048 x 1536 pixels 75 Hz QXGA Integrated H W Motion Compensation for MPEG2 decode Graphics Memory Usage The 945GM Express GMCH supports the Dyn
51. V ID 1022 4593 Rev 1 0 Page A 3 CP6001 V MK2 5SATA CP6001 V m A 4 CP6001 EXT SATA Module Layout The CP6001 EXT SATA module includes one board to board connector J1 and one SATA connector J2 Figure A 2 CP6001 EXT SATA Module Layout Page A 4 ID 1022 4593 Rev 1 0 CP6001 V A 5 Module Interfaces A 5 1 Board to Board Connector J1 The board to board connector J1 on the CP6001 EXT SATA module is connected to the SATA extension connector J13 on the CP6001 V Table A 2 Board to Board Connector J1 Pinout PIN SIGNAL FUNCTION 1 SATA RX Differential Receive 2 GND Ground signal 3 SATA RX Differential Receive 4 GND Ground signal 5 GND Ground signal 6 5V 5V power 7 SATA_TX Differential Transmit 8 GND Ground signal 9 SATA TX Differential Transmit 10 GND Ground signal 11 GND Ground signal 12 5V 5V power ID 1022 4593 Rev 1 0 CP6001 V MK2 5SATA Page A 5 CP6001 V MK2 5SATA CP6001 V m A 5 2 SATA Connector J2 The SATA connector J2 on the CP6001 EXT SATA module is connected to the 2 5 SATA HDD mounted on the CP6001 V The SATA connector is divided into two segments a signal segment and a power segment Figure A 3 SATA Connector J2 Table A 3 SATA Connector J2 Pinout PIN SIGNAL FUNCTION I O Signal Segment Key S1 S1 GND Ground signal Signal S2 SA
52. able 2 7 General Purpose LEDs Function FUNCTION DURING FUNCTION BIOS POST DEFAULT FUNCTION DURING BOOT UP if POST code config is AFTER BOOT UP enabled LED1 red When lit up during boot up it indicates a hard t a General Purpose or Port 80 green BIOS POST bit 2 and Default General Purpose bit 6 amber LEDO red When lit up during boot up it indicates a ower on reset P General Purpose or Port 80 green BIOS POST bit 3 and Default General Purpose bit 7 amber For further information on configuring the General Purpose LEDs refer to Chapter 4 3 12 LED Configuration Register LCFG and Chapter 4 3 13 LED Control Register LCTRL ID 1022 4593 Rev 1 0 Page 2 9 Functional Description CP6001 V 2 3 2 How to Read the 8 Bit POST Code Due to the fact that only 4 bits are available and 8 bits must be displayed the POST code output is multiplexed on the WD LED TH LED and the General Purpose LEDs Table 2 8 POST Code Sequence STATE GENERAL PURPOSE LEDs 0 All LEDs are OFF start of sequence 1 High nibble 2 Low nibble The following is an example of the operation of the Temperature Status LED Watchdog Status LED and General Purpose LEDs if POST configuration is enabled see also Table 2 6 Watch dog and Temperature Status LEDs Function and Table 2 7 General Purpose LEDs Func tion Table 2 9 POST Code Example on 1 off 0 0x
53. al Description CP6001 V m This page has been intentionally left blank Page 2 26 ID 1022 4593 Rev 1 0 CP6001 V Installation E Chapter Installation E ID 1022 4593 Rev 1 0 Page 3 1 Installation CP6001 V This page has been intentionally left blank Page 3 2 ID 1022 4593 Rev 1 0 CP6001 V Installation 3 Installation The CP6001 V has been designed for easy installation However the following standard pre cautions installation procedures and general information must be observed to ensure proper installation and to preclude damage to the board other system components or injury to per sonnel 3 1 Safety Requirements The following safety precautions must be observed when installing or operating the CP6001 V Kontron assumes no responsibility for any damage resulting from failure to comply with these requirements Warning s Due care should be exercised when handling the board due to the fact that the heat sink can get very hot Do not touch the heat sink when installing or removing the board In addition the board should not be placed on any surface or in any form of storage container until such time as the board and heat sink have cooled down to room temperature Caution A If your board type is not specifically qualified as being hot swap capable switch off the CompactPCI system power before installing the board in a free CompactPCI slot Failure to do so could en
54. amic Video Memory Technology DVMT 3 0 This technology ensures the most efficient use of all available memory for maximum 3D graphics performance DVMT dynamically responds to application requirements allocating display and texturing memory resources as required The graphics controller is fed with data from the 945GM Express GMCH The graphics perfor mance is directly related to the amount of memory bandwith available Graphics Resolution The 945GM Express GMCH has an integrated 400 MHz RAMDAC that can directly drive a progressive scan analog monitor up to a resolution of 2048 x 1536 pixels 75 Hz Graphics Interfaces The internal graphics controller provides one analog VGA interface on the front panel Page 2 12 ID 1022 4593 Rev 1 0 CP6001 V Functional Description Analog VGA Connector J6 The 15 pin female connector J6 is available on the CP6001 V and is used to connect an an alog VGA monitor to the CP6001 V Figure 2 3 D Sub VGA Con J6 Table 2 12 D Sub VGA Connector J6 Pinout PIN SIGNAL FUNCTION I O 1 Red Red video signal output 2 Green Green video signal output 3 Blue Blue video signal output 10 GND Ground signal 13 Hsync Horizontal sync TTL Out 14 Vsync Vertical sync TTL Out 12 Sdata l C data EDID I O 15 Scik l C clock EDID I O 9 VCC Power 5V 1 5 A fuse O protection 5 6 7 8 GND Ground signal 4 11 NC 2 3 5 COM Port The CP6001 V provides one RS 23
55. ard is properly configured for operation in accordance with application requirements before installing For information regarding the configuration of the CP6001 V refer to Chapter 4 For the installation of CP6001 V specific peripheral devices refer to the appropriate sub chapters in Chapter 3 Warning Care must be taken when applying the procedures below to ensure that neither the CP6001 V nor other system boards are physically damaged by the application of these procedures 3 To install the CP6001 V perform the following 1 Ensure that no power is applied to the system before proceeding Warning Even though power may be removed from the system the CP6001 V front panel cables may have power applied which comes from an exter nal source In addition these cables may be connected to devices that can be damaged by electrostatic discharging or short circuiting of pins Itis the responsibility of the system designer or integrator to ensure that appropriate measures are taken to preclude damage to the system or injury to personnel which may arise from the handling of these cables connecting or disconnecting Kontron disclaims all liability for damage or injuries resulting from failure to comply with the above Warning When performing the next step DO NOT push the board into the back plane connectors Use the ejector handles to seat the board into the backplane connectors 2 Carefully insert the board into the slot
56. ase This warranty is not transferable nor extendible to cover any other users or long term storage of the product It does not cover products which have been modified altered or repaired by any other party than Kontron or their authorized agents Furthermore any product which has been or is sus pected of being damaged as a result of negligence improper use incorrect handling servicing or maintenance or which has been damaged as a result of excessive current voltage or tem perature or which has had its serial number s any other markings or parts thereof altered de faced or removed will also be excluded from this warranty If the customer s eligibility for warranty has not been voided in the event of any claim he may return the product at the earliest possible convenience to the original place of purchase togeth er with a copy of the original document of purchase a full description of the application the product is used on and a description of the defect Pack the product in such a way as to ensure safe transportation see our safety instructions Kontron provides for repair or replacement of any part assembly or sub assembly at their own discretion or to refund the original cost of purchase if appropriate In the event of repair re funding or replacement of any part the ownership of the removed or replaced parts reverts to Kontron and the remaining part of the original guarantee or any new guarantee to cover the repaired or rep
57. controller requires either front panel Ethernet I O or use of a packet switching backplane In any event hot swap is also a function of the application running on the CP6001 V 3 4 1 Hot Swap of the Board Operated in the System Slot Hot swapping of the CP6001 V itself when used as the system controller is possible but will result in any event in a cold start of the CP6001 V and consequently a reinitialization of all pe ripheral boards Exactly what transpires in such a situation is a function of the application and is not addressed in this manual The user must refer to appropriate application documentation for applicable procedures for this case In any event the safety requirements above must be observed 3 4 2 Hot Swap of the Board Operated in a Peripheral Slot This procedure assumes that the system supports hot swapping and that the replacement for the board to be hot swapped is configured hardware and software wise for operation in the application To hot swap the CP6001 V proceed as follows 1 Ensure that the safety requirements indicated in Chapter 3 1 are observed Particular at tention must be paid to the warning regarding the heat sink Warning u Care must be taken when applying the procedures below to ensure that neither the CP6001 V nor other system boards are physically damaged by the application of these procedures 2 Unlock both board ejection handles ensuring that the bottom handle has activated the hot swap sw
58. d CPU overtemperature protection is provided by Functions Internal processor temperature control unit e CPU shut down via the hardware monitor System Monitoring In SCH3112 integrated hardware monitor for supervision of Several system power voltages Board temperature Software BIOS AMI BIOS with 1 MB Flash memory and the following features User BIOS defaults Setup Default Override SDO e ACPI support FWH write protection BIOS Flash e Fail safe mechanism Boot block recovery e CMOS parameters are saved in the EEPROM o PCHealth Monitoring S e Manufacturing data 5 Serial number ea Material number Chipset revision CPU microcode Operating Systems Operating systems supported Microsoft amp Windows amp XP Microsoft amp Windows amp XP Embedded Linux ID 1022 4593 Rev 1 0 E Page 1 13 Introduction CP6001 V m Table 1 1 CP6001 V Main Specifications Continued CP6001 V SPECIFICATIONS Mechanical 6U 4HP CompactPCl compliant form factor Power Consumption Typical 24 W Refer to Chapter 5 for further information Temperature Ranges Operational 0 C to 60 C Standard Storage 55 C to 85 C Without battery or any additional components Note When a battery is installed refer to the operational specifications of the battery as this determines the storage temperature of the CP6001 V See Battery below Note When additional components are installed refer to their op
59. danger your life or health and may damage your board or system Note Certain CompactPCI boards require bus master and or rear I O capability If you are in doubt whether such features are required for the board you intend to install please check your specific board and or system documentation to make sure that your system is provided with an appropriate free slot in which to insert the board Se ESD Equipment A This CompactPCI board contains electrostatically sensitive devices Please observe the necessary precautions to avoid damage to your board Discharge your clothing before touching the assembly Tools must be dis charged before use Do not touch components connector pins or traces e If working at an anti static workbench with professional discharging equipment please do not omit to use it ID 1022 4593 Rev 1 0 Page 3 3 Installation CP6001 V m 3 2 CP6001 V Initial Installation Procedures The following procedures are applicable only for the initial installation of the CP6001 V in a sys tem Procedures for standard removal and hot swap operations are found in their respective chapters To perform an initial installation of the CP6001 V in a system proceed as follows 1 Ensure that the safety requirements indicated in Chapter 3 1 are observed Warning Failure to comply with the instruction above may cause damage to the board or result in improper system operation 2 Ensure that the bo
60. e 32 kB for data cache e 1 MB L2 on die full speed processor cache FLASH Memory One 1 MB onboard FWH for BIOS CompactFlash memory optionally available USB 2 0 NAND Flash memory optionally available e g 8 GB Serial ATA SSD Flash memory optionally available Serial EEPROM e 24LC64 64 kbit Intel 945GM Mobile Intel 945GM Express Graphics Memory Controller Hub Express GMCH Support for a single Intel Celeron amp M processor 440 e 64 bit AGTL AGTL based System Bus interface up to 533 MHz e System Memory interface with optimized support for dual channel DDR2 SDRAM memory at 533 MHz without ECC Integrated 2D and 3D Graphics Engines Integrated 400 MHz RAMDAC Intel ICH7R Intel 82801GR I O Controller Hub ICH7R Power management logic support Enhanced DMA controller interrupt controller and timer functions Integrated IDE controller Ultra ATA 100 66 33 and PIO mode USB 2 0 host interface with seven USB ports only three ports are used on the CP6001 V SATA Host Controller with two ports 3 Gbit s transfer rate e Five of the six x1 PCI Express ports are used on the CP6001 V Four x1 PCI Express ports are used for Gigabit Ethernet e One x1 PCI Express port is used for the PCle to CPCI bridge System Management Bus SMBus compatible with most I C de vices Low Pin Count LPC interface Firmware Hub FWH interface support Processor and Memory Chipset Page 1 10 ID 1022
61. e has been designed to comply with the IEEE1386 1 specification which defines a PCI electrical interface for the CMC Common Mezzanine Card form factor The CP6001 V provides 3 3V PMC PCI signaling environment If 5V PMC PCI signaling environment is re quired please contact Kontron for further assistance The PMC interface supports the following configuration Table 2 17 Onboard PCI Configuration PMC Connectors J17 and J19 1 2 1 2 J17 J19 Jn1 Jn2 63 64 63 64 ID 1022 4593 Rev 1 0 Figure 2 8 SIZE SPEED INTERFACE 32 bit 33 MHz PCI Page 2 16 CP6001 V 2 3 8 1 Functional Description PMC Connectors J17 and J19 Pinout Table 2 18 PMC Connectors J17 and J19 Pinout J17 Jn1 J19 Jn2 SIGNAL SIGNAL LJ SIGNAL SIGNAL EN EAKA TCK pull up 1 2 12V 12V 1 2 TRST pull down Ground 3 4 INTA TMS pull up 3 4 TDO NC INTB 5 6 INTC TDI pull up 5 6 Ground BUSMODE1 7 8 5V Ground 7 8 PCI RSV NC NC INTD 9 10 PCI RSV NC PCI RSV NC 9 10 PCI RSV NC Ground 11 12 3V3 AUX NC BUSMODE2 11 12 3 3V pull up CLK 13 14 Ground RST 13 14 BUSMODE3 GND Ground 15 16 GNT 3 3V 15 16 BUSMODE4 GND REGH 17 18 5V PCI RSV NC 17 18 Ground V I O 19 20 AD 31 AD 30 19 20 AD 29 AD 28 21 22 AD 27 Ground 21 22 AD 26 AD 25 23 24 Ground AD 24 23 24
62. ecial features and the CompactPCI control signals Normally only the system BIOS uses these registers but they are documented here for application use as required Note Take care when modifying the contents of these registers as the system BIOS may be relying on the state of the bits under its control 4 3 1 Status Register 0 STATO The Status Register 0 holds general common status information Table 4 5 Status Register 0 STATO REGISTER NAME STATUS REGISTER 0 STATO ADDRESS 0x280 ACCESS DESCRIPTION 7 HSHS Hot swap handle status N A R 0 Hot swap handle in closed position 1 Hot swap handle in open position 6 BBEI BIOS boot end indication 0 R 0 BIOS is booting 1 BIOS boot is finished 5 4 BFSS Boot Flash selection status N A R 00 Boot Flash 0 active 01 Reserved 10 External boot Flash active 11 Reserved 3 0 Res Reserved 0000 R ID 1022 4593 Rev 1 0 Page 4 5 Configuration CP6001 V 4 3 2 Status Register 1 STAT1 The Status Register 1 holds board specific status information Table 4 6 Status Register 1 STAT1 STATUS REGISTER 1 STAT1 ADDRESS 0x281 ACCESS DESCRIPTION 7 C66EN CPCI PCI speed M66EN signal N A R 0 33 MHz 1 66 MHz 6 CVIO CPCI backplane VI O voltage configuration N A R 0 3 3V VI O voltage 1 5V VI O voltage 5 P66EN PMC PCI speed M66EN signal 0 R
63. ed by the chipset For this reason there is less than 4 GB physical memory available for applications The integrated VGA controller uses up to 128 MB physical memory as well Note Only qualified DDR2 SO DIMM modules from Kontron are authorized for use with the CP6001 V Table 2 2 Supported Recommended Memory Configurations CHANNEL A Channel B SO DIMM SO DIMM TOTAL 512 MB 512 MB 512 MB 512 MB 1GB 1GB 1GB 1GB 1 GB 2 GB 2 GB 2 GB 2 GB 2 GB 4 GB Warning Memory configuration changes are only permitted to be performed at the fac tory Failure to comply with the above may result in damage to the board or improper operation 2 1 3 Intel 945GM Express Chipset Overview The Intel 945GM Express Chipset consists of the following devices Mobile Intel 945GM Express Chipset Graphics Memory Controller Hub 945GM Ex press Chipset GMCH O Controller Hub 7 ICH7R The 945GM Express Chipset GMCH provides the processor interface for the Intel Celeron M 440 processor and the two DDR2 channels and includes a high performance graphics ac celerator The ICH7R is a centralized controller for the boards I O peripherals such as the PCI PCI Express USB 2 0 SATA II IDE and LPC ports 2 1 4 Mobile Intel amp 945GM Express Chipset GMCH The Mobile Intel amp 945GM Express Chipset Graphics Memory Controller Hub 945GM Express Chipset GMCH is a highly integrated hub that pr
64. er s J7 o architecture includes independent transmit and re ceive queues and a PCI Express interface that maxi GbE A 1 9 mizes the use of bursts for efficient bus usage The Boot from LAN PXE feature is supported The Ethernet connectors J7 and J8 are realized as RJ 45 connectors The interfaces provide automatic detection and switching between 10Base T 100Base TX and 1000Base T data transmission Auto Negotiation Auto wire switching for crossed cables is also supported Auto MDI X RJ 45 Connectors J7 and J8 Pinout The J7 and J8 connectors supply the 10Base T 100Base TX and 1000Base T interfaces to the Ethernet controller Table 2 14 Pinout of J7 and J8 Based on the Implementation MDI STANDARD ETHERNET CABLE MDI X CROSSED ETHERNET CABLE 10BASE T 100BASE TX 1000BASE T PIN 10BASE T 100BASE TX 1000BASE T VO SIGNAL I O I O EJ IO SIGNAL 0 SIGNAL O TX O TX I O BI_DA 1 RX RX I O BIL DB lo tx o wo BLDA 2 1 RX RX vo BLDB RX RX I O BI_DB 3 O TX O TX I O BI_DA I O BI_DC 4 I O BI_DD I O BI DC 5 I O BI DD RX RX I O BI DB 6 O TX O TX I O BI DA I O BI_DD 7 I O BI DC I O BI DD 8 I O BI DC Page 2 14 ID 1022 4593 Rev 1 0 CP6001 V Functional Description Ethernet LED Status ACT green This LED indicates network connection and ac
65. era tional specifications as this will influence the operational and stor age temperature ofthe CP6001 V General Climatic Humidity 93 RH at 40 C non condensing acc to IEC 60068 2 78 Dimensions 233 35 mm x 160 mm Board Weight 550 g 4HP with heat sink and SO DIMM modules but without mezzanine boards such as PMC module HDD SSD and CP6001 EXT SATA module Battery The CP6001 V provides a 3 0V lithium battery for RTC with battery socket Recommended type CR2025 Temperature ranges Operational 20 C to 70 C typical refer to the battery manufacturer s specifications for exact range Storage 55 C to 70 C typical no discharge 1 6 Kontron Software Support Kontron is one of the few CompactPCI and VME manufacturers providing inhouse support for most of the industry proven real time operating systems that are currently available Due to its close relationship with the software manufacturers Kontron is able to produce and support BSPs and drivers for the latest operating system revisions thereby taking advantage of the changes in technology Page 1 14 ID 1022 4593 Rev 1 0 CP6001 V Introduction 1 7 Standards The CP6001 V complies with the requirements of the following standards Table 1 2 Standards TYPE ASPECT STANDARD CE Emission EN55022 EN61000 6 3 Immission EN55024 EN61000 6 2 Electrical Safety EN60950 1 Mechanical Mechanical Dimensions IEEE 1101
66. ermal Control Circuit TCC when the processor silicon reaches its maximum operating temperature 100 C ID 1022 4593 Rev 1 0 Page 6 3 Thermal Considerations CP6001 V m When TM1 is enabled and a high temperature situation exists the processor clock is modulat ed using duty cycles Once the temperature has dropped below the maximum operating tem perature the Thermal Control Circuit goes inactive The temperature at which TM1 activates the Thermal Control Circuit is neither user config urable nor software visible TM1 does not require any additional hardware software drivers or interrupt handling routines This function can be enabled and disabled in the BIOS Note The TH LED on the front panel shows the status of the internal thermal super vision if POST code configuration is disabled in the BIOS 6 2 3 Catastrophic Cooling Failure Sensor The Catastrophic Cooling Failure Sensor protects the processor from catastrophic overheating The Catastrophic Cooling Failure Sensor threshold is set well above the maximum operating temperature to ensure that there are no false trips The processor will stop all executions when the junction temperature exceeds approximately 125 C Once activated the event remains latched until the CP6001 V undergoes a power on restart all power off and then on again This function cannot be enabled or disabled in the BIOS It is always enabled to ensure that the processor is protected in an
67. g bus without disturbing the system the following additional features are required Power ramping Precharge Hot swap control and status register bits Automatic interrupt generation whenever a board is about to be removed or replaced A hot swap LED to indicate that the board may be safely removed Page 2 18 ID 1022 4593 Rev 1 0 CP6001 V Functional Description E On the CP6001 V a special hot swap controller is used to ramp up the onboard supply voltage This is done to avoid transients on the 3 3V 5V 12V and 12V power supplies from the hot swap system When the power supply is stable the hot swap controller generates an onboard reset to put the board into a definite state 2 3 10 5 Power Ramping 2 3 10 6 Precharge Precharge is provided on the CP6001 V by a resistor on each signal line PCI bus connected to a 1V reference voltage 2 3 10 7 Handle Switch A microswitch is situated in the extractor handle The status of the handle is included in the on board logic The microswitch is connected to the onboard connector J10 2 3 10 8 ENUMH Interrupt If the board is operated in the system slot the ENUM signal is an input 2 3 10 9 Hot Swap LED On the CP6001 V a blue HS LED is provided for example to indicate the status of the shut down process and when the board is ready for extraction ID 1022 4593 Rev 1 0 Page 2 19 Functional Description m 2 3 11 CompactPCI Bus Connector
68. he CP6001 V has one Watchdog Timer provided with a programmable timeout ranging from 125 msec to 256 sec Failure to strobe the Watchdog Timer within a set time period results in a system reset or an interrupt The interrupt mode can be configured via the Board Interrupt Configuration Register 0x286 There are four possible modes of operation involving the Watchdog Timer Timer only mode Reset mode Interrupt mode Dual stage mode At power on the Watchdog is not enabled If not required it is not necessary to enable it If re quired the bits of the Watchdog Timer Control Register 0x282 must be set according to the application requirements To operate the Watchdog the mode and time period required must first be set and then the Watchdog enabled Once enabled the Watchdog can only be disabled or the mode timeout changed by powering down and then up again To prevent a Watchdog timeout the Watchdog must be retriggered before timing out This is done by writing a 1 to the WTR bit In the event a Watchdog timeout does occur the WTE bit is setto 1 What transpires after this depends on the mode selected The four operational Watchdog Timer modes can be configured by the WMD 1 0 bits and are described as follows Timer only mode In this mode the Watchdog is enabled using the required timeout period Normally the Watchdog is retriggered by writing a 1 to the WTR bit In the event a timeout occurs the WTE bit is set to 1
69. he Linux and Windows XP op erating systems the VGA resolution was 1280 x 1024 pixels Page 5 6 ID 1022 4593 Rev 1 0 CP6001 V Power Considerations 7 Table 5 4 Power Consumption CP6001 V with DOS Celeron M 440 Celeron M 440 1 86 GHz 1 86 GHz 1GB SO DIMM DDR2 2 GB 4 GB SO DIMM DDR2 12V 50 mW 50 mW 5V 16 W 16 W 3 3 V 6 3 W 6 6 W Total 22 35 W 22 65 W Table 5 5 Power Consumption CP6001 V wit Linux Win XP in IDLE Mode Table 5 6 Celeron M 440 1 86 GHz 1GB SO DIMM DDR2 Celeron M 440 1 86 GHz 1GB SO DIMM DDR2 Celeron M 440 1 86 GHz 2 GB 4 GB SO DIMM DDR2 Power Consumption CP6001 V s TDP at 75 Celeron M 440 1 86 GHz 2 GB 4 GB SO DIMM DDR2 Table 5 7 Power Consumption CP6001 V s TDP at 100 Celeron M 440 Celeron M 440 1 86 GHz 1 86 GHz 1GB SO DIMM DDR2 2 GB 4 GB SO DIMM DDR2 12 V 50 mW 50 mW 5V 21 5 W 21 5 W 3 3 V 6 6 W 6 6 W Total 28 15 W 28 15 W ID 1022 4593 Rev 1 0 Page 5 7 Power Considerations CP6001 V 5 2 1 Power Consumption of the CP6001 V Accessories The following table indicates the power consumption of the CP6001 V accessories Table 5 8 Power Consumption of CP6001 V Accessories MODULE POWER 5 V re Keyboard 100 mW CompactFlash 100 mW 300 mW USB 2 0 NAND Flash module 325 mW 400 mW 2 5 HDD SSD refer to the respective datasheet 5 2 2 Power Consumption
70. ices that can be damaged by electrostatic discharging or short circuiting of pins It is the responsibility of the system designer or integrator to ensure that appropriate measures are taken to preclude damage to the system or in jury to personnel which may arise from the handling of these cables con necting or disconnecting Kontron disclaims all liability for damage or injuries resulting from failure to comply with the above ID 1022 4593 Rev 1 0 Page 3 7 Installation CP6001 V m 3 5 Installation of CP6001 V Peripheral Devices The CP6001 V is designed to accommodate various peripheral devices such as USB devices Serial ATA devices PMC devices rear I O devices etc The following figure shows the place ment of the USB 2 0 NAND Flash module and the CP6001 EXT SATA module which is re quired to connect an onboard HDD SSD to the CP6001 V Figure 3 1 Connecting a Peripheral Device to the CP6001 V USB20NAND gt K Flash Module AIK DF pw 5 f Sy f SATA con for external SATA devices CP6001 EXT SATA Module The following chapters provide information regarding installation aspects of peripheral devices 3 5 1 USB Device Installation The CP6001 V supports all USB Plug and Play computer peripherals e g keyboard mouse printer etc Note Ag All USB devices may be connected or removed while the host or other peripherals are powered up Page 3 8 ID 1022 4593 Rev 1 0 C
71. ing Instructions ESD Sensitive Device A Electronic boards and their components are sensitive to static elec tricity Therefore care must be taken during all handling operations and inspections of this product in order to ensure product integrity at all times Do not handle this product out of its protective enclosure while it is not used for operational purposes unless it is otherwise protected Whenever possible unpack or pack this product only at EOS ESD safe work stations Where a safe work station is not guaranteed it is important for the user to be electrically discharged before touching the product with his her hands or tools This is most easily done by touching a metal part of your system housing It is particularly important to observe standard anti static precautions when changing piggy backs ROM devices jumper settings etc If the product contains batteries for RTC or memory backup ensure that the board is not placed on conductive surfaces including anti static plas tics or sponges They can cause short circuits and damage the batteries or conductive circuits on the board ID 1022 4593 Rev 1 0 Page xv Preface CP6001 V m General Instructions on Usage In order to maintain Kontron s product warranty this product must not be altered or modified in any way Changes or modifications to the device which are not explicitly approved by Kontron and described in this manual or received from Kontron s Technical S
72. it indicates the status of the global write protection jumper J22 6 1 Res Reserved 000000 R 0 BFWP Boot Flash write protection 0 R W 0 Boot Flash not write protected 1 Boot Flash write protected Writing a 1 to this bit sets the bit If the bit is set it cannot be cleared 4 3 5 Reset Status Register RSTAT The Reset Status Register is used to determine the host s reset source Table 4 9 Reset Status Register RSTAT REGISTER NAME RESET STATUS REGISTER RSTAT ADDRESS 0x285 ACCESS DESCRIPTION 7 PORS Power on reset status N A R W 0 System reset generated by software warm reset 1 System reset generated by power on cold reset Writing a 1 to this bit clears the bit 6 3 Res Reserved 0000 R 2 FPRS Front panel push button reset status 0 R W 0 System reset not generated by front panel reset 1 System reset generated by front panel reset Writing a 1 to this bit clears the bit 1 CPRS CompactPCI reset status PRST signal 0 R W 0 System reset not generated by CPCI reset input 1 System reset generated by CPCI reset input Writing a 1 to this bit clears the bit 0 WTRS Watchdog timer reset status 0 R W 0 System reset not generated by Watchdog timer 1 System reset generated by Watchdog timer Writing a 1 to this bit clears the bit Note The reset status register is set to the default values by power on reset not by PC
73. it of 4 7 V for the 5 V line and below 3 1 V for the 3 3 V line or in the event of a power failure of the DC DC converters Other reset sources include the Watchdog Timer and the push button switch on the front panel The CP6001 V responds to any of these sources by initializing local peripherals A reset will be generated if one of the following events occurs e 5 V supply falls below 4 7 V typ e 3 3 V supply falls below 3 1 V typ Power failure of at least one onboard DC DC converter e Push button RESET pressed on the front panel Watchdog expired CompactPCI backplane PRST input CompactPCl backplane RST input software configurable when the board is in peripheral mode 2 2 4 SMBus Devices The CP6001 V provides a System Management Bus SMBus for access to several system monitoring and configuration functions The SMBus consists of a two wire I C bus interface The following table describes the function and address of every onboard SMBus device Table 2 3 SMBus Device Addresses DEVICE SMB ADDRESS EEPROM 24LC64 1010111xb Clock core 1101001xb Clock PCI Express 1101110xb SPD channel A 1010000xb SPD channel B 1010010xb 2 2 5 Thermal Management System Monitoring The SCH3112 is used to measure the ambient temperature via its own internal sensor and monitors the CPU s internal temperature to ensure proper operation and stability of the system Page 2 6 ID 1022 4593 Rev 1 0
74. itch this occurs with a very small amount of movement of the handle Note a What transpires at this time is a function of the application If hot swap is Qs supported by the application then the blue HS LED should light up after a short time period This indicates that the system has recognized that the CP6001 V is to be hot swapped and now indicates to the operator that hot swapping of the CP6001 V may proceed If the blue HS LED does not light up after a short time period either the system does not support hot swap or a malfunction has occurred In this event the application is responsible for handling this situation and must provide the operator with appropriate guidance to remedy the situation 3 After approximately 1 to 15 seconds the blue HS LED should light up If the LED lights up proceed with the next step of this procedure If the LED does not light up refer to ap propriate application documentation for further action Page 3 6 ID 1022 4593 Rev 1 0 CP6001 V Installation 4 Disconnect any interfacing cables that may be connected to the board 10 11 12 Warning The CP6001 front panel cables may have power applied which comes from an external source In addition these cables may be connected to de vices that can be damaged by electrostatic discharging or short circuiting of pins amp It is the responsibility of the system designer or integrator to ensure that appropriate measures
75. laced items will be transferred to cover the new or repaired items Any exten sions to the original guarantee are considered gestures of goodwill and will be defined in the Repair Report issued by Kontron with the repaired or replaced item Kontron will not accept liability for any further claims resulting directly or indirectly from any warranty claim other than the above specified repair replacement or refunding In particular all claims for damage to any system or process in which the product was employed or any loss incurred as a result of the product not functioning at any given time are excluded The extent of Kontron liability to the customer shall not exceed the original purchase price of the item for which the claim exists Kontron issues no warranty or representation either explicit or implicit with respect to its products reliability fitness quality marketability or ability to fulfil any particular application or purpose As a result the products are sold as is and the responsibility to ensure their suitability for any given task remains that of the purchaser In no event will Kontron be liable for direct indirect or consequential damages resulting from the use of our hardware or software products or documentation even if Kontron were advised of the possibility of such claims prior to the purchase of the product or during any period since the date of its purchase Please remember that no Kontron employee dealer or agent
76. lot Pinout PIN Z B C D E F 25 NC 5V ENUM 3 3V 5V GND 24 NC 5V V I O GND 23 NC 3 3V li 5V GND 22 NC GND 3 37 i GND 21 NC 3 37 li GND 20 NC GND V I O GND 19 NC 3 37 GND GND 18 NC GND 3 3V i 7 GND 17 NC 3 3V NC NC GND i GND 16 NE i V I O GND 15 NC 3 3V 7 7 BDSEL ii GND 14 12 Key Area 11 NC i i s GND GND 10 NC n GND 3 3V z M GND 9 NC NC j GND GND 8 NG GND V I O i i GND 7 NC GND B GND 6 NC i CPCI_Present 3 3V 7 GND 5 NC NC RSV RST GND GND 4 NC NC Healthy V I O RSV RSV GND 3 NC 5V GND 2 NC TCK 5V TMS NC TDI GND 1 NC 5V 12V TRST 12V 5V GND Note Page 2 22 A indicates that the signal normally present at this pin is disconnected from the CompactPCI bus when the CP6001 V is inserted in a peripheral slot When the CP6001 V is inserted in a peripheral slot the function of the RST signal is maskable ID 1022 4593 Rev 1 0 CP6001 V Functional Description Table 2 21 64 bit CompactPCI Bus Connector J2 System Slot Pinout PIN Z A B C D E F 22 NC GA4 GA3 GA2 GA1 GAO GND 21 NC CLK6 GND RSV RSV RSV GND 20 NC CLK5 GND RSV GND RSV GND 19 NC GND GND NC NC NC GND 18 NC RSV RSV RSV GND RSV GND 17 NC RSV GND PRST REQ6 GNT6 GND 16 NC RSV RSV DEG GND RSV GND 15 NC RSV GND FAL REQ5 GNT5 GND 14 NC AD 35 AD 34 AD 33 GND AD 32 GND 13 NC AD 38 GN
77. ltage lines is described in the CPCI specification PICMG 2 0 R3 0 The recommended measurement point for the voltage is the CPCI connector on the CPU board The following table provides information regarding the required characteristics for each board input voltage Table 5 3 Input Voltage Characteristics VOLTAGE NOMINAL VALUE TOLERANCE MAX RIPPLE p p REMARKS 5V 5 0 VDC 5 3 50 mV Main voltage 3 3 V 3 3 VDC 5 3 50 mV 12 V 12 VDC 5 5 240 mV Required 12 V 12 VDC 5 5 240 mV Not required VI O PCI voltage 3 3 VDC or 5 VDC 5 3 50 mV GND Ground not directly connected to potential earth PE The output voltage overshoot generated during the application load changes or during the removal of the input voltage must be less than 5 of the nominal value No voltage of reverse polarity may be present on any output during turn on or turn off ID 1022 4593 Rev 1 0 Page 5 5 Power Considerations CP6001 V 5 2 Power Consumption The goal of this description is to provide a method to calculate the power consumption for the CP6001 V baseboard and for additional configurations The processor dissipates the majority of the thermal power The power consumption tables below list the voltage and the power specifications for the CP6001 V board and its accessories The values were measured using an 8 slot passive Com pactPCl backplane with two power supplies one for the CPU and the other
78. ly connected to the board via J13 and the adapter mod ule CP6001 ETX SATA This module is required to provide Serial ATA interfacing to the HDD SSD For further information regarding the CP6001 ETX SATA module refer to Appendix A 3 6 PMC Module Installation The CP6001 V supports the installation of a PMC module via the connectors J17 and J19 For the initial installation and standard removal of all PMC modules refer to the documentation provided with the module ID 1022 4593 Rev 1 0 Page 3 9 Installation CP6001 V m Prior to installation or removal ensure that the safety requirements indicated in Chapter 3 1 of this user guide are observed Particular attention must be paid to the warning regarding the heat sink Warning Always ensure that the board s PMC PCI signaling environment and the PMC card s PCI signaling environment are compatible The CP6001 V is delivered with 3 3V PMC PCI signaling environment configu ration If 5V PMC PCI signaling environment is required please contact Kon tron for further assistance Failure to comply with the instruction above may result in improper operation or damage to the PMC module 3 6 1 Battery The CP6001 V is provided with a 3 0 V coin cell lithium battery for the RTC To replace the battery proceed as follows Turn off power Remove the battery Place the new battery in the socket Make sure that you insert the battery the right way round The plus pole must be
79. manual Refer to appropriate OS software documentation for installation Note i Users working with pre configured operating system installation images for X Plug and Play compliant operating systems for example Windows XP Win dows XP Embedded must take into consideration that the stepping and revi sion ID of the chipset and or other onboard PCI devices may change Thus a re configuration of the operating system installation image deployed for a pre vious chipset stepping or revision ID is in most cases required The correspond ing operating system will detect new devices according to the Plug and Play configuration rules E ID 1022 4593 Rev 1 0 Page 3 11 Installation CP6001 V This page has been intentionally left blank Page 3 12 ID 1022 4593 Rev 1 0 CP6001 V Configuration Chapter Configuration ID 1022 4593 Rev 1 0 Page 4 1 Configuration CP6001 V m This page has been intentionally left blank Page 4 2 ID 1022 4593 Rev 1 0 CP6001 V Configuration E 4 Configuration 4 1 Jumper Description 4 1 1 Clearing BIOS CMOS Setup If the system does not boot due to for example the wrong BIOS configuration or wrong pass word setting the CMOS setting may be cleared by using the solder jumper JP1 Procedure for clearing the CMOS setting Power down the system Set the solder jumper JP1 to closed Power up the system Power down the system again
80. n a a 2 Ls Ei ee ige ps E Ty 20s es Pe DA EPJ JR JE Qa ef E f 4 i re FE vr EEG o t iz L 3x3 rot SE EE NE f Vf x L H fi Er FE diu i o ud oar if fof recommended m operating range Ede ee SV Lu As KA oe 10 z z 0 j l LaL rara Ai i Mii A liri 5 10 15 20 25 30 Volumetric Flow Rate m h l l J 0 5 1 1 5 2 2 5 3 35 4 Airflow m s 6 3 2 Peripherals When determining the thermal requirements for a given application peripherals to be used with the CP6001 V must also be considered Devices such as hard disks PMC modules etc which are directly attached to the CP6001 V must also be capable of being operated at the tempera tures foreseen for the application It may very well be necessary to revise system requirements to comply with operational environment conditions In most cases this will lead to a reduction in the maximum allowable ambient operating temperature or even require active cooling of the operating environment Warning a As Kontron assumes no responsibility for any damage to the CP6001 V or other equipment resulting from overheating of the CPU or any other board components it is highly recommended that system integrators as well as end users confirm that the operational environment of the CP6001 V complies with the thermal considerations set forth in this document Page 6 6 ID 1022 4593 Rev 1 0 CP6001 V CP6001 V MK2 5SATA Appendix CP6001 V MK2
81. names company logos and trademarks which are registered trademarks and therefore proprietary to their respective owners Environmental Protection Statement This product has been manufactured to satisfy environmental protection requirements where possible Many of the components used structural parts printed circuit boards connectors batteries etc are capable of being recycled Final disposition of this product after its service life must be accomplished in accordance with applicable country state or local laws or regulations ID 1022 4593 Rev 1 0 Page xiii Preface CP6001 V m Explanation of Symbols Caution Electric Shock A This symbol and title warn of hazards due to electrical shocks gt 60V when touching products or parts of them Failure to observe the pre cautions indicated and or prescribed by the law may endanger your life health and or result in damage to your material Please refer also to the section High Voltage Safety Instructions on the following page Warning ESD Sensitive Device This symbol and title inform that electronic boards and their compo nents are sensitive to static electricity Therefore care must be taken during all handling operations and inspections of this product in order to ensure product integrity at all times Please read also the section Special Handling and Unpacking Instructions on the following page Warning This symbol and title emphasize p
82. ny intervention of thermal supervision When operated above the corresponding curve various thermal protection mechanisms may take effect resulting in temporarily reduced CPU perfor mance or finally in an emergency stop in order to protect the CPU from thermal destruction In real applications this means that the board can be operated temporarily at a higher ambient temperature or at a reduced flow rate and still provide some margin for temporarily requested peak performance before thermal protection will be activated 6 3 1 Thermal Characteristic Graph An airflow of 2 0 m s to 2 5 m s is a typical value for a standard Kontron ASM rack 6U CompactPCI rack with a 1U cooling fan tray For other racks or housings the available airflow will differ The maximum ambient operating temperature must be recalculated and or measured for such environments For the calculation of the maximum ambient operating temperature the processor and chipset junction temperature must never exceed the specified limit for the involved processor and chipset TDP curve 100 TDP curve This load complies with the maximum thermal design power TDP indicated in Chap ter 5 2 Power Consumption Table 5 7 100 TDP can be achieved through the use of specific tools to heat up the CPU but 100 TDP is unlikely to be reached in real applications How to read the diagram Choose a specific working point indicated in TDP percentage For a given flow rate there is a maximum airfl
83. of the Gigabit Ethernet Controller The following table indicates the power consumption of the Intel 82574L GbE controller Table 5 9 Power Consumption of the Gigabit Ethernet Controller ETHERNET PORT Intel 82574L one Ethernet port plugged 1000 Mb s approx 0 5 W 5 3 Start Up Currents of the CP6001 V The following table indicates the basic start up currents of the CP6001 V during the first 2 3 seconds after power has been applied power on or hot swap insertion Table 5 10 Start Up Currents of the CP6001 V Celeron M 440 1 86 GHz 5V peak 7 0 A average 2 0 A 3 3 V peak 6 0 A average 3 2 A Page 5 8 ID 1022 4593 Rev 1 0 CP6001 V Power Considerations 5 4 Power Available for PMC Devices The following table indicates the power made available by the CP6001 V to PMC devices Table 5 11 Maximum Output Power Limits VOLTAGE CONTINUOUS CURRENT PEAK CURRENT 3 3 V 2 27 A 4 0A 5 V 1 5A 3 0A 12 V 0 5A 0 8A 12 V 0 1A 0 2A Note A maximum power of 7 5 W is available on the pins of the PMC connectors J17 and J19 which provide a voltage of 3 3 V or 5 V This is in accordance with the draft standard P1386 Draft 2 4a The maximum power of 7 5 W can be arbitrarily divided on the 3 3 V and 5 V voltage lines The 12 V voltage line is only required for operation of PMC modules Their availability depends on the power supply ID 1022 4593 Rev 1 0 Page 5 9 P
84. oints which if not fully understood and taken into consideration by the reader may endanger your health and or result in damage to your material Note This symbol and title emphasize aspects the reader should read through carefully for his or her own advantage Va GO Page xiv ID 1022 4593 Rev 1 0 CP6001 V Preface Your new Kontron product was developed and tested carefully to provide all features necessary to ensure its compliance with electrical safety requirements It was also designed for a long fault free life However the life expectancy of your product can be drastically reduced by improper treatment during unpacking and installation Therefore in the interest of your own safety and of the correct operation of your new Kontron product you are requested to conform with the following guidelines For Your Safety High Voltage Safety Instructions Warning All operations on this device must be carried out by sufficiently skilled personnel only Caution Electric Shock Before installing a not hot swappable Kontron product into a system always ensure that your mains power is switched off This applies also to the installation of piggybacks Serious electrical shock hazards can exist during all installation repair and maintenance operations with this product Therefore always unplug the power cable and any other cables which provide external voltages before performing work Special Handling and Unpack
85. onboard 2 5 Serial ATA HDD SSD to the CP6001 V For further information concerning the CP6001 EXT SATA module refer to Appendix A 1 3 3 USB 2 0 NAND Flash Module The CP6001 V provides support for one optional USB 2 0 NAND Flash module For information on the USB 2 0 NAND Flash interface refer to chapter 2 2 7 2 USB 2 0 NAND Flash Module 1 4 Board Diagrams The following diagrams provide additional information concerning board functionality and component layout ID 1022 4593 Rev 1 0 Page 1 5 u ZHIN99 C 40j28uu02 2d JeMod 399 399 Wa ZE lod CP6001 V CP6001 V Functional Block Diagram Functional Block Diagram Introduction 1 4 1 Figure 1 1 dems joH d ZHN99 uopdo 9LZ 9WOld 191928 171828 399 ZHINEE 1 Gio wa ze 19d 7 ZHW EES Id1 en bnqeg bod 1 HM men 103305 p eog 172528 171928 V9dJ 399 399 Gel eil q o gt o 2 E lt nn SU s aa Si Si PH asn Sif suonng sq31 VON 19000 190001 xa Woo d ID 1022 4593 Rev 1 0 Page 1 6 CP6001 V Introduction 1 4 2 Front Panels Figure 1 2 CP6001 V Front Panels Legend Status LEDs WD red green Watchdog Status TH red green amber Temperature Status HS blue Hot Swap Control General Purpose LEDs
86. ovides a set of outputs for defined elapsed time periods The timer outputs reflected in the Delay Timer Register are set consec utively and remain set until the next restart is triggered again Table 4 14 Delay Timer Register DTIM REGISTER NAME DELAY TIMER REGISTER DTIM ADDRESS 0x28B ACCESS DESCRIPTION 7 0 DTC The hardware delay timer is operated via one simple 8 bit control 0x00 R W status register During normal operation each of the 8 bits reflects a timer output which means defined elapsed time period after the last restart according to the following bit mapping DTC 7 0 Value Accuracy Bit 7 Ims lt 0 04 Bit 6 500us lt 0 08 Bit 5 250us lt 0 16 Bit 4 100us lt 0 4 Bit 3 50pus lt 0 8 Bit 2 10us lt 4 Bit 1 bus lt 8 Bit 0 Ins lt 40 Since the timer width and thus the availability of outputs varies over different implementations it is necessary to be able to determine the timer capability Therefore writing a 0 to the Delay Timer Register followed by reading indicates the timer capability not the timer outputs For example writing 0x00 and then reading OxFF results in a 8 bit wide timer register This status register mode can be switched off to normal timer operation by writing anything other than a 0 to this register Page 4 10 ID 1022 4593 Rev 1 0 CP6001 V Configuration 4 3 11 Watchdog Timer Control Register WTIM T
87. ovides the CPU interface two DDR2 SDRAM system memory interfaces at 533 MHz a hub link interface to the ICH7R and high performance internal graphics controller Page 2 4 ID 1022 4593 Rev 1 0 CP6001 V Functional Description Graphics and Memory Controller Hub Feature Set Host Interface The 945GM Express Chipset GMCH supports a Front Side Bus FSB frequency of 533 MHz using 1 05 V AGTL signaling The AGTL bus supports 32 bit host addressing for decoding up to 4 GB memory address space System Memory Interface The 945GM Express Chipset GMCH integrates a dual channel DDR2 SDRAM controller with two 64 bit interfaces without ECC bits The chipset supports DDR533 DDR2 SDRAM for sys tem memory 945GM Express Chipset GMCH The 945GM Express Chipset GMCH includes a highly integrated graphics accelerator deliver ing high performance 3D and 2D graphic capabilities The internal graphics controller provides an interface for a standard analog VGA display 2 1 5 I O Controller Hub ICH7R The ICH7R is a highly integrated multifunctional I O Controller Hub that provides the interface to the PCI Bus and integrates many of the functions needed in today s PC platforms for exam ple PCI Express Ultra DMA 100 66 33 IDE controller SATA controller USB host controller supporting USB 2 0 LPC interface and a FWH Flash BIOS interface controller The ICH7R communicates with the 945GM Express Chipset GMCH over a dedicated hub interface
88. ow input temperature ambient temperature provided Below this operating point thermal supervision will not be activated Above this operating point thermal supervision will become active protecting the CPU from thermal destruction The minimum airflow rate pro vided must not be less than the value specified in the diagram Volumetric flow rate The volumetric flow rate refers to an airflow through a fixed cross sectional area i e slot width x depth The volumetric flow rate is specified in m h cubic meter per hour or cfm cubic feet per minute respectively Conversion 1 cfm 1 7 m h 1 m h 0 59 cfm Airflow At a given cross sectional area and a required flow rate an average homogeneous airflow speed can be calculated using the following formula Airflow Volumetric flow rate area The airflow is specified in m s meter per second or in fps feet per second respectively Conversion 1 fps 0 3048 m s 1 m s 3 28 fps ID 1022 4593 Rev 1 0 Page 6 5 Thermal Considerations CP6001 V m The following figure illustrates the operational limits of the CP6001 V taking into consideration power consumption vs ambient air temperature vs airflow rate The measurements were made based on a 4HP slot Figure 6 1 Oper Limits for the CP6001 V with Intel Celeron M 440 1 86 GHz Volumetric Flow Rate CFM 5 10 15 20 25 0 La Kr UT ko FO LS aS 90r 7 O C ae ee Gr Ge EI E 100 TDP IN M re Re
89. ower Considerations CP6001 V This page has been intentionally left blank Page 5 10 ID 1022 4593 Rev 1 0 CP6001 V Thermal Considerations Chapter 6 Thermal Considerations ID 1022 4593 Rev 1 0 Page 6 1 Thermal Considerations CP6001 V m This page has been intentionally left blank Page 6 2 ID 1022 4593 Rev 1 0 CP6001 V Thermal Considerations 6 Thermal Considerations The following chapters provide system integrators with the necessary information to satisfy thermal and airflow requirements when implementing CP6001 V applications 6 1 Board Internal Thermal Monitoring To ensure optimal operation and long term reliability of the CP6001 V all onboard components must remain within the maximum temperature specifications The most critical components on the CP6001 V are the processor and the chipset Operating the CP6001 V above the maxi mum operating limits will result in permanent damage to the board The CP6001 V includes the following sensors to measure the CPU temperature and regulate the board s power consumption Thermal sensors integrated in the processor Temperature sensor integrated in the Super I O The temperature sensor integrated on the Super I O is accessible via the host For information on the temperature sensor integrated in the CPU refer to Chapter 6 2 6 2 Processor Thermal Monitoring and Regulation The Intel Celeron M 440 processor includes the following on
90. planes for the 3 3 V and 5 V voltages Input power connections to the backplane itself should be carefully specified to ensure a mini mum of power loss and to guarantee operational stability Long input lines under dimensioned cabling or bridges high resistance connections etc must be avoided It is recommended to use POSITRONIC or M type connector backplanes and power supplies where possible 5 1 3 Power Supply Units Power supplies for the CP6001 V must be specified with enough reserve for the remaining sys tem consumption In order to guarantee a stable functionality ofthe system it is recommended to provide more power than the system requires An industrial power supply unit should be able to provide at least twice as much power as the entire system requires An ATX power supply unit should be able to provide at least three times as much power as the entire system requires As the design of the CP6001 V has been optimized for minimal power consumption the power supply unit shall be stable even without minimum load Where possible power supplies which support voltage sensing should be used Depending on the system configuration this may require an appropriate backplane The power supply should be sufficient to allow for backplane input line resistance variations due to temperature changes etc Note Non industrial ATX PSUs may require a greater minimum load than a single CP6001 V is capable of creating When a PSU of this type
91. plication stability and reliability The table below indicates the absolute maximum input voltage ratings that must not be exceed ed Power supplies to be used with the CP6001 V should be carefully tested to ensure compli ance with these ratings Table 5 1 Maximum Input Power Voltage Limits SUPPLY VOLTAGE MAXIMUM PERMITTED VOLTAGE 3 3 V 3 6 V 5 V 5 5 V 12 V 14 0 V 12 V 14 0 V Warning The maximum permitted voltage indicated in the table above must not be exceeded Failure to comply with the above may result in damage to your board The following table specifies the ranges for the different input power voltages within which the board is functional The CP6001 V is not guaranteed to function if the board is not operated within the prescribed limits Table 5 2 DC Operational Input Voltage Ranges EU c ABSOLUTE RANGE RECOMMENDED RANGE 3 3 V 3 2 V min to 3 47 V max 3 3 V min to 3 47 V max 5 V 4 85 V min to 5 25 V max 5 0 V min to 5 25 V max 12 V 11 4 V min to 12 6 V max 12 V min to 12 6 V max 12 V 11 4 V min to 12 6 V max Only for PMC E ID 1022 4593 Rev 1 0 Page 5 3 Power Considerations CP6001 V 5 1 2 Backplane Backplanes to be used with the CP6001 V must be adequately specified The backplane must provide optimal power distribution for the 3 3 V 5 V and 12 V power inputs It is recom mended to use only backplanes which have at least two power
92. r Solid State Drive SSD is supported via the 12 pin Serial ATA connector J13 and the CP6001 EXT SATA module Front Panel Connectors VGA 15 pin D Sub connector USB two type A connectors Ethernet two RJ 45 connectors COM 8 pin RJ 45 connector PMC front panel Onboard Connectors Sockets Onboard connectors USB 2 0 NAND Flash connector J11 O extension connector J14 PMC connectors J17 and J19 Jn1 and Jn2 Two SATA connectors e One 7 pin standard SATA connector with locking mechanism J12 One 12 pin SATA extension connector J13 CompactPCI Connector J1 to J3 One CompactFlash socket for type I and type II CF cards J16 One JTAG connector J18 One ITP700 JTAG connector J24 Two 200 pin SO DIMM sockets J14 and J15 Page 1 12 ID 1022 4593 Rev 1 0 CP6001 V Introduction Table 1 1 CP6001 V Main Specifications Continued CP6001 V SPECIFICATIONS 7 LEDs System Status LEDs WD red green Watchdog Status TH red green amber Temperature Status HS blue Hot Swap Control General Purpose LEDs LED 0 1 red green amber General Purpose POST code Gigabit Ethernet Status gt ACT green Ethernet Link Activity ES SPEED green orange Ethernet Speed e SPEED ON orange 1000 Mbit e SPEED ON green 100 Mbit x SPEED OFF 10 Mbit Watchdog Software configurable Watchdog generates IRQ or hardware reset Thermal Relate
93. s Table 4 16 LED Configuration Register LCFG REGISTER NAME LED CONFIGURATION REGISTER LCFG ADDRESS 0x290 DESCRIPTION ACCESS 7 4 Res Reserved 0000 R LCON Front panel LEDs Configuration 0000 R W 0000 POST 0001 General Purpose Mode 0010 1111 Reserved Regardless of the selected configuration the front panel LEDs are used to signal a number of fatal onboard hardware errors such as LEDO BIOS boot fail red LED1 BIOS boot fail red WD LED Watchdog enabled green and Watchdog expired red THLED Thermal alarm red blinking thermal shutdown amber 1 In BIOS POST mode default the LEDs build a binary vector to display BIOS POST code during the BIOS boot phase In doing so the higher 4 bit nibble of the 8 bit BIOS POST code is displayed followed by the lower nibble followed by a pause BIOS POST code is displayed in general in green color LEDO POST bit 3 and bit 7 green LED1 POST bit 2 and bit 6 green WD LED POST bit 1 and bit 5 green TH LED POST bit 0 and bit 4 green For further information on reading the 8 Bit BIOS POST Code refer to Chapter 2 3 2 2 Configured for General Purpose Mode the LEDs are dedicated to functions as follows LEDO LED 0 controlled by HOST red green LED1 LED 1 controlled by HOST red green WD LED Watchdog enabled green and Watchdog expired red THLED Thermal alarm red blinking thermal shutdown amber
94. tion The CP6001 V provides one jumper J22 used to prevent onboard memory devices from un authorized or accidental write cycles On the CP6001 V only the BIOS Flash can be write pro tected via this jumper Table 4 3 CompactPCI Clock Configuration J22 DESCRIPTION Open Write protection disabled Closed Write protection enabled The default setting is indicated by using italic bold 4 2 I O Address Map The following table indicates the CP6001 V specific registers Table 4 4 I O Address Map ADDRESS DEVICE 0x080 POST Code Low Byte Register POSTL 0x081 POST Code High Byte Register POSTH 0x280 Status Register 0 STATO 0x281 Status Register 1 STAT1 0x282 Reserved 0x283 Control Register 1 CTRL1 0x284 Device Protection Register DPROT 0x285 Reset Status Register RSTAT 0x286 Board Interrupt Configuration Register BICFG 0x287 Reserved 0x288 Board ID Register BID 0x289 Board and PLD Revision Register BREV 0x28A Geographic Addressing Register GEOAD 0x28B Delay Timer Register DTIM 0x28C Watchdog Timer Control Register WTIM 0x28D 0x28F Reserved 0x290 LED Configuration Register LCFG 0x291 LED Control Register LCTRL 0x292 0x29F Reserved Page 4 4 ID 1022 4593 Rev 1 0 CP6001 V Configuration 4 3 CP6001 V Specific Registers The following registers are special registers which the CP6001 V uses to watch the onboard hardware sp
95. tivity status When this LED is lit it means that a link has been established The LED blinks when network packets are sent or received through the RJ 45 port When this LED is not lit there is no link established SPEED green orange This LED lights up to indicate a successful 100Base TX or 1000Base T connection When green it indicates a 100Base TX connection and when orange it indi cates a 1000Base TX connection When not lit and the ACT LED is active the connection is operating at 10Base T 2 3 7 Serial ATA Interface The CP6001 V provides two Serial ATA SATA interfaces implemented as onboard SATA con nectors The SATA interfaces support SATA I 1 5 Gbit sec and SATA II 3 0 Gbit sec One of the onboard SATA connectors supports the mounting of an onboard 2 5 HDD SSD The other SATA connector is used for standard SATA devices with cable connection All SATA interfaces are realized as SATA II with a data transmission of up to 300 MB s and are compatible with SATA I 2 3 7 1 Serial ATA Connector J12 The CP6001 V provides a SATA connector J12 for connecting standard HDDs SSDs and oth er SATA devices to the CP6001 V Figure 2 6 SATA Con J12 Table 2 15 SATA Connector J12 Pinout PIN SIGNAL FUNCTION I O 1 GND Ground signal 2 SATA TX0 Differential Transmit 3 SATA TX0 Differential Transmit 7 1 4 GND Ground signal 5 SATA RX0 Differential Receive 6 SATA RX0 Differential Receive
96. upport as a special handling instruction will void your warranty This device should only be installed in or connected to systems that fulfill all necessary technical and specific environmental requirements This applies also to the operational temperature range of the specific board version which must not be exceeded If batteries are present their temperature restrictions must be taken into account In performing all necessary installation and application operations please follow only the instructions supplied by the present manual Keep all the original packaging material for future storage or warranty shipments If it is necessary to store or ship the board please re pack it as nearly as possible in the manner in which it was delivered Special care is necessary when handling or unpacking the product Please consult the special handling and unpacking instruction on the previous page of this manual Page xvi ID 1022 4593 Rev 1 0 CP6001 V Preface Two Year Warranty Kontron grants the original purchaser of Kontron s products a TWO YEAR LIMITED HARDWARE WARRANTY as described in the following However no other warranties that may be granted or implied by anyone on behalf of Kontron are valid unless the consumer has the express written consent of Kontron Kontron warrants their own products excluding software to be free from manufacturing and material defects for a period of 24 consecutive months from the date of purch
97. us controllers Two RJ 45 connectors on front panel Two optional Gigabit Ethernet interfaces on the rear I O connector J3 PICMG 2 16 Automatic mode recognition Auto Negotiation Automatic cabling configuration recognition Auto MDI X Cabling requirement Category 5 UTP four pair cabling USB Three USB 2 0 ports supporting UHCI and EHCI Two type A connectors on the front panel One onboard connector for the USB 2 0 NAND Flash module E ID 1022 4593 Rev 1 0 Page 1 11 Introduction m CP6001 V Table 1 1 CP6001 V Main Specifications Continued CP6001 V SPECIFICATIONS Serial PMC One 16C550 compatible UART on the front panel RS 232 signaling PMC interface Jn1 and Jn2 PCI mezzanine connectors for standard PMC modules 32 bit 33 MHz PCI interface Supported voltages 3 3 V 5 V 12 V and 12 V Supports 3 3 V 5V signaling voltage VI O Keyboard and Mouse USB Support for keyboard and mouse Mass Storage Interfaces EIDE ATA One onboard ATA interface for the CompactFlash socket supporting type I and type II CompactFlash cards true IDE mode and Multiword DMA support SATA Integrated Serial ATA Host Controllers Provide independent DMA operation on 2 channels e One onboard SATA interface for connection to a SATA cable One onboard SATA interface for connection to the CP6001 EXT SATA module Onboard 2 5 HDD SSD Onboard 2 5 Hard Disk Drive HDD o
98. y event Note When the TH LED on the front panel is lit amber after a successful boot up and the POST code configuration is disabled it indicates that the processor die tem perature is above 125 C 6 3 External Thermal Regulation To ensure the best possible basis for operational stability and long term reliability the CP6001 V is equipped with a heat sink Coupled together with system chassis which provides variable configurations for forced airflow controlled active thermal energy dissipation is guaranteed The physical size shape and construction of the heat sink ensure the lowest possible thermal resistance In addition the CP6001 V has been specifically designed to efficiently support forced airflow as found in modern CompactPCI systems The CP6001 V must not be operated without the minimum required forced airflow Page 6 4 ID 1022 4593 Rev 1 0 CP6001 V Thermal Considerations The thermal characteristic graph shown in this section illustrates the maximum ambient air tem perature as a function of the volumetric airflow rate for the power consumption indicated The diagram is intended to serve as guidance for reconciling board and system with the required computing power considering the thermal aspect One diagram per CPU version is provided There is one curve representing upper level working points based on maximum level of CPU utilization When operating below the corresponding curve the CPU runs steadily without a

CP6001-V User Guide, Revision 1.0

Contents

Download Pdf Manuals

Related Search

Related Contents