DLP-USB232M User's Manual
Contents
1. DLP Design DLP USB232M USB SERIAL UART Interface Module The DLP USB232M uses FTDI s 2nd generation FT232BM USB UART chip that adds extra functionality to its predecessor the FT8U232AM and reduces external component count HARDWARE FEATURES e Single Chip USB Asynchronous Serial Data Transfer e Full Handshaking amp Modem Interface Signals e UART I F Supports 7 8 Bit Data 1 2 Stop Bits and Odd Even Mark Space No Parity e Data rate 300 gt 3M Baud TLL e Data rate 300 gt 1M Baud RS232 e Data rate 300 gt 3M Baud RS422 RS485 e 384 Byte Receive Buffer 128 Byte Transmit Buffer for high data throughput e Adjustable RX buffer timeout e Full hardware assisted hardware or X On X Off handshaking e In built support for event characters and line break condition e Auto Transmit Buffer control for RS485 e Support for USB Suspend Resume through SLEEP and RI pins e Support for high power USB Bus powered devices through PWRENF pin e Integrated level converter on UART and control signals for interfacing to 5v and 3 3v logic e Integrated 3 3v regulator for USB IO e Integrated Power On Reset circuit e Integrated 6GMHz 48Mhz clock multiplier PLL e USB Bulk or Isocronous data transfer modes e 4 4v to 5 25v single supply operation e UHCI OHCI EHCI host controller compatible e USB 1 1 and USB 2 0 compatible e USB VID PID Serial Number and Product Description strings in external E2. When interfacing with 3 3v external logic connect VCC IO to the 3 3v supply of the external logic otherwise connect to VCC to drive out at 5v CMOS level This pin must be connected to VCC from the target electronics or EXTVCC EXTVCC In Use for applying main power 4 4 to 5 25 Volts to the module Connect to PORTVCC if module is to be powered by the USB port typical configuration PORTVCC Out Power from USB port Connect to EXTVCC if module is to be powered by the USB port typical configuration 500mA maximum current available to USB adapter and target electronics if USB device is configured for high power TXLED O C LED Drive Pulses Low when Transmitting Data via USB PWRCTL IN Bus Powered Tie Low Self Powered Tie High suspend Can be used to control power to external logic using a P Channel Logic Level MOSFET switch Enable the Interface Pull Down Option in EEPROM when using the PWREN pin in this way TXDEN OUT Enable Transmit Data for RS485 RI IN Ring Indicator Control Input When the Remote Wakeup option is enabled in the EEPROM taking RI low can be used to resume the PC USB Host controller from suspend RXD IN Receive Asynchronous Data Input TXD OUT Transmit Asynchronous Data Output 13 ta POWEREN OUT Goes Low after the device is configured via USB then high during USB 16 18 19 20 21 22 23 24 DEVICE CONFIGURATION EXAMPLES DLPLUSB232M User s Manual USB Bus Powered and S
3. Bit Bang mode In Bit Bang mode the eight UART interface control lines can be switched between UART interface mode and an 8 bit Parallel IO port Data packets can be sent to the device and they will be sequentially sent to the interface at a rate controlled by the prescaler setting As well as allowing the device to be used stand alone as a general purpose IO controller for example controlling lights relays and switches some other interesting possibilities exist For instance it may be possible to connect the device to an SRAM configurable FPGA as supplied by vendors such as Altera and Xilinx The FPGA device would normally be un configured i e have no defined function at power up Application software on the PC could use Bit Bang Mode to download configuration data to the FPGA which would define it s hardware function then after the FPGA device is configured the FT232BM can switch back into UART interface mode to allow the programmed FPGA device to communicate with the PC over USB This approach allows a customer to create a generic USB peripheral whose hardware function can be defined under control of the application software The FPGA based hardware can be easily upgraded or totally changed simply by changing the FPGA configuration data file Application notes software and development modules for this application area will be available from FTDI and other 3rd party developers e USB 2 0 full speed option A
4. Powered high current devices The previous devices had a USBEN pin which became active when the device was enumerated by USB To provide power control this signal had to be externally gated with SLEEP and RESETH This gating is now done on chip USBEN has now been replaced with the new PWREN signal which can be used to directly drive a transistor or P Channel MOSFET in applications where power switching of external circuitry is required Anew EEPROM based option makes the device pull gently down its UART interface lines when the power is shut off PWRENF is High In this mode any residual voltage on external circuitry is bled to GND when power is removed thus ensuring that external circuitry controlled by PWREN resets reliably when power is restored e Lower Suspend Current Integration of RCCLK within the device and internal design improvements reduce the suspend current of the FT232BM to under 200uUA excluding the 1 5k pull up on USB DP in USB suspend mode This allows greater margin for peripherals to meet the USB Suspend current limit of SOOUA e Support for USB Isocronous Transfers While USB Bulk transfer is usually the best choice for data transfer the scheduling time of the data is not guaranteed For applications where scheduling latency takes priority over data integrity such as transferring audio and low bandwidth video data the new device now offers an option of USB Isocronous transfer via an option bit in t
5. EPROM e EEPROM programmable on board via USB VIRTUAL COM PORT VCP DRIVERS for Windows 98 and Windows 98 SE Windows 2000 ME XP Windows CE MAC OS 8 and OS 9 MAC OS X Linux 2 40 and greater D2XX USB Direct Drivers DLL S W Interface Windows 98 and Windows 98 SE Windows 2000 ME XP In planning or under development APPLICATION AREAS USB RS232 Converters USB RS422 RS485 Converters Upgrading RS232 Legacy Peripherals to USB Cellular and Cordless Phone USB data transfer cables and interfaces Interfacing MCU based designs to USB USB Audio and Low Bandwidth Video data transfer PDA USB data transfer USB Smart Card Readers Set Top Box S T B PC USB interface USB Hardware Modems USB Wireless Modems USB Instrumentation USB Bar Code Readers ENHANCEMENTS This section summarizes the enhancements of the 2nd generation silicon from FTDI compared to its FT8U232AM predecessor For further details consult the device pin out description and functional descriptions e Integrated Level Converter on UART interface and control signals The previous devices would drive the UART and control signals at 5v CMOS logic levels The new device has a separate VCC IO pin allowing the device to directly interface to 3 3v and other logic families without the need for external level converter i c s e Improved Power Management control for USB Bus
6. elf Powered Configuration Figure 1 illustrates a typical USB bus powered configuration A Figure 1 USB Bus Powered device gets its power from the USB bus Basic rules for USB Bus power devices are as follows a On plug in the device must draw no more than 100mA b On USB Suspend the device must draw no more than 500UA c A Bus Powered High Power Device one that draws more than 100mA should use the SLEEP pin to keep the current below Easic pie Parera 100mA on plug in and 500uA on USB suspend E Syste n d A device that consumes more than 100mA can not be plugged into a USB Bus Powered Hub e No device can draw more that 500mA from the USB Bus f The power descriptor in the SV Figure 2 See Foyer ed oi System Figure 2 illustrates a typical USB self powered configuration AUSB Self Powered device gets its power from its own Power Supply and does not draw current from the USB bus Basic rules for USB Self power devices are as follows a A Self Powered device should not force current down the USB bus when the USB Host or Hub Controller is powered down b A Self Powered Device can take as much current as it likes during normal operation and USB suspend as it has its own Power Supply c A Self Powered Device can be used with any USB Host and both Bus and Self Powered USB Hubs Figure 3 shows how to configure the DLP USB232M to interface with a 3 3v logic device in Bus Powered configuration In
7. he EEPROM e Programmable Receive Buffer Timeout In the previous device the receive buffer timeout used to flush remaining data from the receive buffer was fixed at 16ms timeout This timeout is now programmable over USB in 1ms increments from 1ms to 255ms thus allowing the device to be better optimized for protocols requiring faster response times from short data packets e TXDEN Timing fix TXDEN timing has now been fixed to remove the external delay that was previously required for RS485 applications at high baud rates TXDEN now works correctly during a transmit send break condition e Improved PreScaler Granularity The previous version of the Prescaler supported division by n 0 n 0 125 n 0 25 and n 0 5 where n is an integer between 2 and 16 384 214 To these have been added n 0 375 n 0 625 n 0 75 and n 0 875 which can be used to improve the accuracy of some baud rates and generate new baud rates which were previously impossible especially with higher baud rates e PreScaler Divide By 1 Fix The previous device had a problem when the integer part of the divisor was set to 1 In the 2nd generation device setting the prescaler value to 1 gives a baud rate of 2 million baud and setting it to zero gives a baud rate of 3 million baud Non integer division is not supported with divisor values of O and 1 e Bit Bang Mode The 2nd generation device has a new option referred to as
8. ill automatically reset itself when power is re applied on coming out of suspend b Set the soft pull down option bit in the FT232BM EEPROM c For 3 3v power controlled circuits VCCIO must not be powered down with the external circuitry PWREN gets it s VCC supply from VCCIO MECHANICAL DRAWINGS PRELIMINARY INCHES MILLIMETERS UNLESS OTHERWISE NOTED j X _ it 53 O O O O O O O O 1 5 typ O a 38 1 typ O O 10 typ C O 2 54 typ 235 typ O O 6 0 typ O O O O O O m 16 5 typ 50 typ 12 7 typ C 32 typ 8 0 typ A 52 typ dia 13 2 typ y rr he 19t die pl 46 typ lt q typ 16 typ 15 2 typ 36 typ dia 4 2 typ Tt 9 2 typ 17 8 typ Storage Temperature Ambient Temperature Power Applied VCC Supply Voltage DC Input Voltage Inputs DC Input Voltage High Impedance Bidirectionals DC Output Current Outputs DC Output Current Low Impedance Bidirectionals Power Dissipation VCC 5 25v Electrostatic Discharge Voltage lt 1uA Latch Up Current Vi lt 0 or Vi gt Vcc D C Characteristics DC Characteristics Ambient Temperature 0 70 C Operating Voltage and Current Vcc1 VCC Operating Supply 4 4 Voltage Voltage Operating Supply Current Operating Supply Current Note 2 Supply current excludes the 200uUA nominal d
9. new EEPROM based option allows the FT232BM to return a USB 2 0 device descriptor as opposed to USB 1 1 Note The device would be a USB 2 0 Full Speed device 12Mb s as opposed to a USB 2 0 High Speed device 480Mb s Table 1 DLP USB232M PINOUT DESCRIPTION Fi t iz S ta t BOARD ID Out Identifies the board as either a DLP USB245M or DLP USB232M High for DLP USB232M and low for DLP USB245M RESET In Can be used by an external device to reset the FT245BM If not required this pin must be tied to VCC RESETO Out Output of the internal Reset Generator Stays high impedance for 2ms after VCC gt 3 5v and the internal clock starts up then clamps it s output to the 3 3v output of the internal regulator Taking RESET low will also force RSTOUT to go high impedance RSTOUT is NOT affected by a USB Bus Reset 3V3OUT Out Output from the integrated L D O regulator It s primary purpose is to provide the internal 3 3v supply to the USB transceiver cell and the RSTOUT pin A small amount of current lt 5mA can be drawn from this pin to power external 3 3v logic if required SLEEP Out Goes Low during USB suspend mode Typically used to power down an external TTL to RS232 level converter IC in USB gt RS232 converter designs RXLED O C LED Drive Pulses Low when Receiving Data via USB VCC IO In 3 0 volt to 5 25 volt VCC to the UART interface pins 10 12 14 16 and 18 25
10. pull up resistor to VCCIO Note 3 Driver Output Impedance includes the external 27R series resistors on USBDP and Disclaimer Neither the whole nor any part of the information contained in or the product described in this datasheet may be adapted or reproduced in any material or electronic form without the prior written consent of the copyright holder This product and its documentation are supplied on an as is basis and no warranty as to their suitability for any particular purpose is either made or implied DLP Design will not accept any claim for damages howsoever arising as a result of use or failure of this product Your statutory rights are not affected This product or any variant of it is not intended for use in any medical appliance device or system in which the failure of the product might reasonably be expected to result in personal injury This document provides preliminary information that may be subject to change without notice Contact Information DLP Design PO Box 503762 San Diego CA 92150 3762 Phone 858 513 2777 Fax 858 513 2777 Email support dlpdesign com Internet http www dlpdesign com malts WG resold IU ZO s7e ndoa HOD JINBENA JH Ol pIEC Nzte il d IU ZO s7e ndoa HOD JH FC mae Appendix A DLP USB232M Schematic
11. rawn by the external pull up resistor on UART IO Pin Characteristics VCCIO 5 0v Output Voltage High Output Voltage Low nput Switching Threshold nput Switching Hysteresis These are the absolute maximum ratings for the DLP USB232M module in accordance with the Absolute Maximum Rating System IEC 60134 Exceeding these may cause permanent damage Max 5 25 2 Max 0 7 65 C to 150 C 0 5v to 6 00v 0 5v to VCC 0 5v 0 5v to VCC 0 5v Units Conditions 25 mA Normal Operation 300 400 UA USB Suspend Note 1 Units Conditions V V sink 4 mA V V UART IO Pin Characteristics VCCIO 3 3v Description Min Typ Voh _ OutputVoltageHigh 27 Vol Output VoltageLow 01 f 220 nput Switching Hysteresis Max Units Conditions a RESET IO Pin Characteristics Description Max Units Conditions Min VHys _ Input SwitchingHysteresis 200 mV RSTOUT Pin Characteristics Description Min Max Units Conditions Typ Voh _ Output Voltage High 3 0 36 V Isource 2mA lol Leakage Current Tri State 5 va gt USB IO Pin Characteristics Description Min Typ UVoh IO Pins Static Output High 28 3 6v V fos v 20 Vv Po ae V I Max Units Conditions 0 25 V V ohm Differential Common Mode UVDIf Differential Input Sensitivity 0 Driver Output Impedance Note 2 Inputs have an internal 200k
12. this example a LDO regulator provides 3 3 volts from the USB Bus to the target microcontroller and the VCCIO line pin 10 which in turn will cause the UART interface IO pins to drive out at 3 3v level Figure 3 1 4 LOO REGULATOR 5m ERLU TEAT Bus F omered St System vith 3 3 Wol Logic Interface Bus Powered Circuit with Power Control USB Bus powered circuits need to be able to power down in USB suspend mode in order to meet the lt 500uA total suspend current requirement including external logic Figure 4 shows how to use a discrete P Channel Logic Level MOSFET to control the power to external logic circuits A suitable device could be a Fairchild NDT456P or equivalent This configuration is suitable for powering external logic where the normal supply current is lt 100mA and the logic to be controlled does not generate an appreciable current surge at power up For power switching external logic that takes over 100mA or generates a current Surge on powerup we recommend that a dedicated power switch i c with inbuilt soft start is used instead of a MOSFET A suitable power switch i c for such an application would be a Micrel www micrel com MIC2025 2BM or equivalent Figure 4 F tarini Power lt FET Power controlled by sLEEP Please note the following points in connection with power controlled designs a The logic to be controlled must have it s own reset circuitry so that it w
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