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nRF51822_422_Eval_Kit User Guide.fm

1. Debug Trace Flash Download J Link J Trace Adapter a f SWD 0k0BB11477 ARM CoreSight SW DP Up Down ID CODE Manual Configuration Device Mame odd Delete Update IR len Cache Options Download Options I Cache Code Verify Code Download I Cache Memory T Download to Flash Scan State ready Figure 36 Debug settings 6 Select the J Link device for target programming and provide the appropriate code memory algorithm Page 43 of 47 NORDIC SEMICONDUCTOR nRF51422 Evaluation Kit User Guide v1 1 Device Target Output Listing User C C Asm Linker Debug Utities Configure Hash Menu Command Use Target Driver for Hash Programming Run Independent Figure 37 Flash settings 7 Ifthe J Link serial number appears in the SN field the device is properly installed The default settings can be accepted by clicking OK closing both the SEGGER Control Panel and Keil target Driver Setup Page 44 of 47 NORDIC SEMICONDUCTOR nRF51422 Evaluation Kit User Guide v1 1 JLinkSettings ini file While debugging with a SoftDevice change AllowSimulation 1 to AllowSimulation 0 in your default JLinkSettings ini file under your project 1 Enter the utilities settings from KEIL target options ALT F7 and click the button to select the JLinksettings ini file 2 Click Edit and change the AllowSimulation as specified above Configure Flash
2. The main differences are memory layout and the call stack size 6 2 1 Configuring memory layout Specific SoftDevice versions and stacks can have different requirements Please review these before proceeding The applications vector table must be set up differently depending on whether it will run on a chip that is blank or pre programmed with a SoftDevice The SoftDevice program area starts at address 0x0 and has a predefined size The application start vector must be placed right after the SoftDevice The available size has to be set so that it uses the remaining memory for the application Similarly the SoftDevice data area starts at the lowest RAM address The application data area must be placed after the SoftDevice data area Table 3 shows examples for setting up the start address and size depending on the code and data size used by the SoftDevice The example is based on a chip with 256 kB of code memory and 16 kB of RAM Blank chip 0 kB 0 kB 0x0 0x40000 0x20000000 0x4000 SoftDevice A 64 kB 2 kB 0x10000 0x30000 0x20000800 0x3800 SoftDevice B 128 kB 8 kB 0x20000 0x20000 0x20002000 0x2000 Table 3 SoftDevice memory layout Note See the nRF51422 Product Specification for details on the total code memory and RAM available in the device The amount of code memory and RAM used by the SoftDevice is described in the 210 nRF51422 SoftDevice Specification There are two ways to configure the memory layout e Using the Keil IDE e Using
3. SEGGER chip To use pins P0 08 to P0 11 for other purposes than UART to the SEGGER chip the shorting of the solder bridges should be removed See Figure 14 _ SB9 lt _ SB10 ia SB11 SB12 Figure 14 Disconnecting UART lines Cut Note In order to use the USB to UART bridge the software on the nRF51422 must enable flow control For details on how to set up the UART with flow control see the nRF51 Series Reference Manual Page 18 of 47 NORDIC SEMICONDUCTOR nRF51422 Evaluation Kit User Guide v1 1 5 1 11 Measuring current The current drawn by the nRF51422 device can be monitored on the PCA10003 To measure the current you must first prepare the board by cutting the shorting of solder bridge SB8 There are two ways of measuring the current consumption 1 Connect an ampere meter between pin 1 and pin 2 of connector P1 This will monitor the current directly Connect an ampere meter iy u a La Varir r r l al e De pcect NRF current esa nRF_RESET measurement am Cut ii C33 ia ge no cus C18 aD SECGER ah 9 a J Link Technology www segger com 0038 C22 Be oe z we i 2 Mount a resistor on the footprint for R4 The resistor should not be larger than 10 Q Connect an oscilloscope or similar with two probes on pin 1 and pin 2 on the P1 connector and measure the voltage drop The voltage drop will be proportional with the current consump
4. TAVA NORWEGIA ACCREDITATION No 03 NS EN ISO 9001 CERTIFICATED IRM Page 46 of 47 NORDIC SEMICONDUCTOR nRF51422 Evaluation Kit User Guide v1 1 Revision history February 2013 1 1 Updated content to match v2 0 of the hardware Updated hardware information in section 5 on page 12 November 2012 1 0 First release ARM statement Keil uVision and Cortex are trademarks of ARM Limited All other brands or product names are the property of their respective holders Page 47 of 47
5. Translator Direct Test Mode nRF8002 Motherboards 4 nRF51 evaluation boards Segger EEE nRF51 Programming Bootloaders Evaluation board fas ANT device with pre programed SoftDevice nRF51422 QFAACA Region 1 Addr 0Oxa000 Region 0 Read back Protected Size 40 kB FW 5210_nRF51422_1 2 0 alpha Program SoftDevice Program Application Programing of application on nRF51 device E Lock entire chip from read back File to program c Nordic Semiconductor ASA 2008 2011 1 Follow the steps in section 6 1 1 on page 23 and then select the Program Application tab 2 Click Browse and select the HEX file to program 3 Select whether to enable or disable readback protection of the entire chip If you enable readback protection you will have to do an Erase All to reprogram the chip again A chip that is programmed with Lock entire chip from read back enabled will not work with a development toolchain To make it work you must perform Erase all Lock entire chip from read back can be used to prevent an accidental overwrite of the chip content Page 24 of 47 NORDIC SEMICONDUCTOR nRF51422 Evaluation Kit User Guide v1 1 6 2 Application development The user application is compiled linked and downloaded independently from the SoftDevice This means that developing and debugging on a chip pre programmed with a SoftDevice is similar to that of a blank chip
6. 0 T E CCM System 51 while true WDT p l Intemal 52 QDEC Mode Thread 53 nrf gpio_port_write LED_PORT 3 tate LED OFFSET i Stack MSP 54 output_state output state SWI K i 55 nrf_delay ms 100 NVMC i i l z I E Project Registers FICR Command Il Stack Locals UICR i GPIO ame Location Value Type i JLink Info J Link Flash download Total time needed 1116735 007s Prep main Ox0000A148 int f0 Load C Keil ARM Device Nordic nrf51422 Board nrf6310 blinky_examp _ output_state lt not in scope gt auto unsigned char JLink Warning Debugger writes to flash 428 bytes address 0x0000A000 E Write to flash is performed Further writes to flash memory will not cause v m r gt ASSIGN BreakDisable BreakEnable BreakKill BreakList BreakSet BreakAccess E1Call Stack Locals 2 Memory 1 J LINK J Trace Cortex t1 0 00000000 sec CAP NUM SCRL O Figure 27 System Viewer Windows Page 34 of 47 NORDIC SEMICONDUCTOR nRF51422 Evaluation Kit User Guide v1 1 File Edit View Project Flash Debug Peripherals Tools SVCS Window Help Ode Blo cleo PRA F FERD nme aA o o oes TEOTEO gt eaa a a M q Disassembly R13 SP R14 LR R15 PC xPSR Mode Stack q RNG uint8_t output_state 0 Configure LED pins as outputs Property TASKS START nrf_gpio_range cfg_output LED START LED STOP m TASKS STOP MOVS r0 0x08 EVENTS_VALRDY MONTS
7. 05 P0 29 6 5 P0 28 P0 06 7 8 P0 07 P0 27 4 3 P0 26 GND 9 10 VCC P0 25 2 1 P0 24 P4 Po P0 08 1 2 P0 09 VCC 10 9 GND P0 10 3 4 P0 11 P0 23 8 7 P0 22 P0 12 5 6 P0 13 P0 21 6 5 P0 20 P0 14 7 8 P0 15 P0 19 4 3 P0 18 GND 9 10 VCC P0 17 2 1 P0 16 Figure 10 PCA10003 GPIO pin headers Note Some pins have default settings e P0 26 and P0 27 are by default used for the 32 kHz crystal and are not available on the P6 connector Please see section 5 1 9 on page 18 for more information e P0 16 P0 17 P0 18 and P0 19 are by default connected to the buttons and LED Please see section 5 1 8 for more information e P0 08 P0 09 P0 10 and P0 11 are by default used by the UART Please see section 5 1 10 on page 18 for more information Page 16 of 47 NORDIC SEMICONDUCTOR nRF51422 Evaluation Kit User Guide v1 1 5 1 8 Buttons and LEDs The two buttons and two LEDs on EK board PCA10003 are connected to dedicated I Os on the nRF51422 chip The connections are shown in Table 1 Button 0 P0 16 Button 1 P0 17 LED O P0 18 SB6 LED 1 P0 19 SB7 Table 1 Button and LED connection If GPIO P0 18 and P0 19 are needed elsewhere the LEDs can be disconnected by cutting the short on SB6 and SB7 see Figure 11 Cut lt SB7 a Bur SB6 T ae Figure 11 Disconnecting the LEDs The buttons are active low meaning the input will be connected to ground when the button is activated The buttons have no external pull up resistor so to use the but
8. 1 FAVAR SHORTS VALRDY_STOP OxFFFFFFFF OxFFFFFFFF OxFFFFFFFF OxFFFFFFFF xy OxFFFFFFFF MSP gt output_state output_state 1 amp STATE MAS i nrf delay ms 100 E Project amp Registers Command JLink Info JLink Warning Debugger writes to flash 428 bytes address 0x0000A000 a Write to flash is performed Further writes to flash memory will not cause v i4 J Link Flash download gt v X G INTENSET main function VALRDY return 0 int return type required by ANSI ISO standard amp INTENCLR VALRDY CONFIG int main void uint amp t output_state 0 DERCEN VALUE Configure LED pins as outputs VALUE nrf_gpio range cfg output LED START LED STOP while true nrf_gpio_ port _write LED PORT 1 lt lt output_state LED OFFSET 0x00000000 0x00000000 0x00000000 0 0 Disabled Shortcut disabled 0 0 Disabled Interrupt disabled 0 0 Disabled Interrupt disabled 0 0 Disabled Digital error correction disabled 0 0x00 VALUE m Bits 31 0 RW 0x4000D508 RNG random number q Call Stack Locals A Name Location Value Type int f0 Total time needed 1116735 007s Prep S main stee eS Load C Keil ARM Device Nordic nrf51422 Board nrf6310 blinky_examp output_state lt not in scope gt auto unsigned E r ASSIGN BreakDisable BreakEnable BreakKill Br
9. 22 Evaluation Kit User Guide v1 1 6 1 1 Selecting a board to program 1 Open nRFgo Studio 2 Inthe Device Manager pane select which board to program or erase 3 The nRF51422 Evaluation Board PCA10003 will show up under nRF51 evaluation boards The SEGGER serial number identifies the device 4 Select the board directly by clicking on the SEGGER module listed The selected board is identified with board type SEGGER serial number and the nRF51 chip 6 1 2 Identifying the nRF51422 chip and chip content When you select a board nRFgo Studio identifies the nRF51422 chip and how its memory is organized The following chip and memory information is displayed e nNRF51 chip identification Identifies the chip by name and build code for example nRF51422 QFAACA If the debugger is not connected to the chip or the debugger has a problem communicating with the chip it will show the following message No device detected Ensure that you have the SEGGER connected correctly to the board and that the board is powered and configured for debugging Code memory Shows how the code memory is divided whether into one or two regions and the size of each region nRF51422 will always show two regions For devices containing a SoftDevice the code memory is divided in two regions with the SoftDevice in Region 0 The tool shows you how much memory is used by the SoftDevice and how much is left for the application e Memory readback protecti
10. E amp E GESER c o DrGAFRN EDENDE NES Registers q Disassembly 0x000020AE 0000 0x000020B0 0000 0x000020B2 0000 0x000020B4 0000 0x000020B6 0000 0x000020B8 0000 0x000020BA 0000 0x000020BC 0000 0x000020BE 0000 0x000020C0 0000 0x000020C2 0000 0x000020C4 0000 0x000020C6 0000 0x000020C8 0000 0x000020CA 0000 0x000020CC 0000 ALNANNNAFPACF NNNNA 4 x20000014 Ox00000041 OxE000E200 Ox00000041 Ox2000081C Ox00000002 000000000 000000000 OxFFFFFFFF OxFFFFFFFF 000008004 000008004 OxFFFFFFFF Ox20001898 Ox000001 7F Ox000020AC Ox61000000 simple uart config RTS PIN NUMBER TX PIN NUMBER CTS PIN NUMBER RX PIN NUMBER printf enter main n Thread MSP softdevice setup timer _init E Project amp Registers m Command q 00000000 R5 00000001 R6 0000A319 R7 2000030 a Location Value JLink Info J Link Flash download Total time needed 1116735 238s E aes C Keil ARM Nevice Nordic nrf514227 Roard nrf63i10 anr ant 4 m gt ASSIGN BreakDisable BreakEnable BreakKill BreakList BreakSet BreakAccess gcall Stack Locals Gia Memory 1 J LINK J Trace Cortex t1 0 00000000 sec L 87 G4 Figure 29 Debugger information for a setup with a SoftDevice enabled in the protected area Page 36 of 47 NORDIC SEMICONDUCTOR nRF51422 Evaluation Kit User Guide v1 1 EEE C Keil ARM Device Nordic nrf51422 Board nrf6310 an
11. Menu Command Use Target Driver for Hash Programming J LINK J Trace Cortex Settings Iw Update Target before Debugging Figure 38 Locating JLinkSettings ini Page 45 of 47 NORDIC SEMICONDUCTOR nRF51422 Evaluation Kit User Guide v1 1 Liability disclaimer Nordic Semiconductor ASA reserves the right to make changes without further notice to the product to improve reliability function or design Nordic Semiconductor ASA does not assume any liability arising out of the application or use of any product or circuits described herein Life support applications Nordic Semiconductor s products are not designed for use in life support appliances devices or systems where malfunction of these products can reasonably be expected to result in personal injury Nordic Semiconductor ASA customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Nordic Semiconductor ASA for any damages resulting from such improper use or sale Contact details For your nearest dealer please see http www nordicsemi com Information regarding product updates downloads and technical support can be accessed through your My Page account on our homepage Main office Otto Nielsens veg 12 Mailing address Nordic Semiconductor 7052 Trondheim P O Box 2336 Norway 7004 Trondheim Phone 47 72 89 89 00 Norway Fax 4772 89 89 89 a Q
12. NORDIC SEMICONDUCTOR NRF51422 Evaluation Kit NRF51422 User Guide v1 1 Copyright 2013 Nordic Semiconductor ASA All rights reserved Reproduction in whole or in part is prohibited without the prior written permission of the copyright holder NORDIC SEMICONDUCTOR nRF51422 Evaluation Kit User Guide v1 1 Contents 1 BAEC ARNEE EEEE A E EAN 3 1 1 Minimum reguiremerntS ca sccctaeevessacnccassstotencessnohescacce tuecstapdotansea nen antesrsieaseecneataniscuesstosasecancs deacansaeioeeantnsansersines 3 1 2 EBdernal resol CE S eenn A E ENER 3 1 3 Writing COnventionS 5c ccacece tacepeucieyocasstacaeyocasyscnsucsteqoesssecsaesosanscpscesaessieesessaeserscsas aersenconeanertaneeptarmaemnecsencieries 3 1 4 Eval ation kit release Notes caccaeset cates ene tes saeestnssne ssc tenta sens teaestcear teed enicacstecadpieececusss ia aiii 3 2 POPE COMUNE AEE EE AA ETET AE ETEA E EA E TE E ETT 4 2 1 NRF51422 Evaluation Kit hardware COntent esseseesesessesessesessesessesessessesesessesresesseseesesreseseesesresesseseseeses 4 2 2 Downloadable Content scenene eao i e erR Ea Na EEan Ea eainiie 5 3 OUR SM eaa EEEE EREE EEES 6 3 1 Install the nRF51422 Evaluation board PCA10003 ssssessssessesesesseseesesessessesesseseesesresesessesresesseseeseses 7 3 2 ANTENE OCIMO aaa cat cae cs cess cece wren cases evens case nenenscta aioe cattdacceusnaeadeesanncis 8 4 Evaluation kit CONFIQUIATION ccssccssscsssccessccssccsscessscesscccs
13. ONDUCTOR nRF51422 Evaluation Kit User Guide v1 1 6 Flash programming and application development The nRF51422 chip is shipped with the SoftDevice pre programmed It is not possible to upgrade or erase the SoftDevice on nRF51422 6 1 Use nRFgo Studio to program or erase an application HEX file onto the nRF51422 chip Programming and erasing flash using nRFgo Studio Note For details on memory organization and protection see the nRF51 Series Reference Manual List of SEGGER debuggers Code memory Memory readback protection Programming tools Device Manager hRFgo Studio View nRF8001 Setup Help es nRF51 chip identification SoftDevice identification 2 4 GHz 4 Front End Tests TX carrier wave output RX constant carrier LO leakage TX RX channel sweep nRF8002 Addr Oxa000 Motherboards 4 nRF51 evaluation boards Segger muumi nRF51 Programming Bootloaders Region 0 Read back Protected Size 40 kB Fw 210_nRF51422_1 2 0 alpha E Lock entire chip from read back RX sensitivity Program SoftDevice Program Application Bluetooth nRF8001 Configuration Programing of application on nRF51 device Dispatcher Trace Translator Size 216 kB File to program Direct Test Mode c Nordic Semiconductor ASA 2008 2011 Figure 18 nRFgo Studio dashboard Page 22 of 47 NORDIC SEMICONDUCTOR nRF514
14. a Scatter file Note The example code given by Nordic Semiconductor configures the memory layout in the Keil IDE Scatter file loading is not available when using the evaluation version of the Keil IDE Page 25 of 47 NORDIC SEMICONDUCTOR nRF51422 Evaluation Kit User Guide v1 1 6 2 1 1 Memory layout configuration in Keil IDE To access the Keil IDE memory layout 1 Click the Project menu and select Options for Target 2 Select the Linker tab 3 Check Use memory layout from Target Dialog Options for Target nf51 Lm Device Target Output Listing User C C Asm Linker Debug Utilities M Use Memory Layout from Target Dialog Make RW Sections Position Independent FO Base axo0000000 Make RO Sections Position Independent R W Base eo Dont Search Standard Libraries Report might fail Conditions as Erors disable Warings cpu Cortex MO o strict scatter _build ant_broadcast_te sct summary_stden info summarysizes map ref callgraph symbals Figure 19 Keil linker settings Select the Target tab In Read Only Memory Areas define values for Start and Size In Read Write Memory Areas define values for Start and Size as seen in Figure 20 on page 27 Click OK OS i Below is an example configuration for an application using a chip with 256 kB of code memory and 16 kB of RAM and a SoftDevice using 128 kB of code memory and 8 kB of RAM SoftDevice B described in Table 3 on
15. allation you will be prompted to select the IDE that should be updated with the latest SEGGER DLLs Check the box for Keil MDK and any other IDEs you want to use with SEGGER Rell MOK W454 DLL Y4 53b in OO RelM4AM SS egger Select All Select None Select the ones you would like to replace by this version The previous version will be renamed and kept in the same folder allowing manual undo In case of doubt do not replace existing DLLs You can always perform this operation at a later time via start menu coa Go to www nordicsemi com and log in to your Nordic My Page account Select My Products from the left menu This takes you to the My Products page Enter the product key included with this kit into the Product Key field and click Add From the Add product box select the product name and click Add Click the Downloads link in the Overview My Products table Download and run the nRF514 SDK installer Make sure to choose the Keil MDK ARM installer option ee aS Page 6 of 47 NORDIC SEMICONDUCTOR nRF51422 Evaluation Kit User Guide v1 1 3 1 Install the nRF51422 Evaluation board PCA10003 Connect the hardware 1 Connect a USB cable from the PCA10003 board to your computer nRF_Reset g OH aNg pi g p mg JLink OF a n HI n F 5 Ea R2E d EEEE oo Ee ee O Kope i zy SB18 ug 30332 S1 0d 80 0d LO0d 000d Sip Tuts ya SEGGER Bk SB9 Sa J Link Technology z www segger co
16. and see their contents in separate windows see Figure 27 In the View menu point to System Viewer and select the peripheral you want to see The peripheral register values are displayed in their respective pane in Keil as seen in Figure 28 on page 35 More information on System Viewer can be found at http www keil com uvision db_view_sysview asp i C Keil ARM Device Nordic nrf51422 Board nrf6310 blinky_example arm blinky uvproj pVision4 Bj x File Edit View Project Flash Debug Peripherals Tools SVCS Window Help Ogee s 8 S RRR ESL S wpne Fla l eo oe lee 4 S O et e o gt EEsaa a s 2 H x Registers q Disassembly POWER uint8_t output_state 0 CLOCK 47 a MPU Configure LED pins as outpi Ox0000A149 RADIO 040000500 49 F n z TEI 0062D780D a nrf_gpio range cfg output UARTO OkDEADBE 3 SPI p Ox0000A1AC OxOO00A14A 2008 MOVS r0 0x08 i pag aAvnnnanaiac IINR MAg wt ENVAR 00000001 MERE ala t 0x0000A1AC GPIOTE i OxFFFFFFFF LC ADC f OxFFFFFFFF main function TIMER gt OxFFFFFFFF return 0 int return type requi SO standard i OxFFFFFFFF RTC gt OxFFFFFFFF F i i int main void OxFFFFFFFF aso k 0x20001000 ES 4 6 uint8 t output state 0 RNG i O 0000A12D 47 ECB j Ox0000A148 48 Configure LED pins as outputs AAR i Ox61000000 49 nrf_gpio range cfg output LED STi p i Banked 5
17. cific Get ID Get Status Set Channel Period 8192 32768 s period or Set Radio Frequency 2400Mhz 66 Mbhz 2466 Mhz Page 9 of 47 Channel 4 Channel5 Channel6 Channel 7 RECEIVED DRUAUVLAS I UVAIA_UX4E 4e 00 00 00 00 00 00 00 00 62 Received BROADCAST_DATA_0x4E 4e 00 00 00 00 00 00 00 00 63 Received BROADCAST_DATA_0x4E 4e 00 00 00 00 00 00 00 00 64 Received BROADCAST_DATA_Ox4E 4e 00 00 00 00 00 00 00 00 65 Received BROADCAST_DATA_0x4E 4e 00 00 00 00 00 00 00 00 66 Received BROADCAST_DATA_Ox4E 4e 00 00 00 00 00 00 00 00 67 Received BROADCAST_DATA_0Ox4E 4e 00 00 00 00 00 00 00 00 68 Received BROADCAST_DATA_0x4E 4e 00 00 00 00 00 00 00 00 69 Received BROADCAST_DATA_Ox4E 4e 00 00 00 00 00 00 00 00 6A Received BROADCAST_DATA_Ox4E 4e 00 00 00 00 00 00 00 00 6B Received BROADCAST_DATA_0x4E 4e 00 00 00 00 00 00 00 00 6C Received BROADCAST_DATA_0x4E 4e 00 00 00 00 00 00 00 00 6D a Clear Show Pop out v Scroll to New Msgs FEER Simulation Broadcast Br e ame TE a a e C E E 00 00 00 00 00 00 00 00 Set Broadcast NORDIC SEMICONDUCTOR nRF51422 Evaluation Kit User Guide v1 1 4 Evaluation kit configuration This chapter shows where to download third party content and how the development environment is set up 4 1 Development environment ARM compiler IDE not included in this kit All the source code projects and examples can be compiled and used
18. d layout on these boards is suitable for applications using TX output power 0 dBm or less These boards are not suitable for applications using 4 dBm TX output power Page 3 of 47 NORDIC SEMICONDUCTOR nRF51422 Evaluation Kit User Guide v1 1 2 Kit content The nRF51422 Evaluation Kit consists of hardware and access to software components documentation and design files from www nordicsemi com The 210 nRF51422 SoftDevice is pre programmed on the chip and cannot be deleted or modified 2 1 nRF51422 Evaluation Kit hardware content 1 x Litium 3 V battery RF f NORDIC SEMICONDUCTOR SERIES Thank you for purchasing a Nordic Semiconductor product Energizer PERIG Please download and read the User Guide before you begin The instructions are on the back of this card a ee ee ee ee ae ee ae bs bd ok et ghetereeceececegcecceecer TREPEPPR ERP R PROPOR RRR R RES n a_a a TR Best i timed By 03 2020 1x nRF51422 EK board 1x ANT USB dongle PCA10003 nRF2779 Figure 1 nRF51422 Evaluation Kit hardware content Page 4 of 47 NORDIC SEMICONDUCTOR nRF51422 Evaluation Kit User Guide v1 1 2 2 Downloadable content The nRF51422 Evaluation Kit includes firmware source code documentation hardware schematics and layout files To access this information log in to your My Page account enter your product key and download the files Instructions can be found in chapter 3 on pa
19. eakList BreakSet BreakAccess gall Stack Locals E Memory 1 J LINK J Trace Cortex Figure 28 System viewer window of the RNG peripheral Page 35 of 47 CAP NUM SCRL O NORDIC SEMICONDUCTOR nRF51422 Evaluation Kit User Guide v1 1 7 1 2 Debugging an application when a readback protected SoftDevice is present Debugging applications with a SoftDevice present behaves as described in http www keil com uvision debug asp except when the program counter is in Region 0 on a SoftDevice with readback protection enabled Code words from addresses in the protected area will always return zero to the debugger Any values in peripheral registers that are restricted or blocked by the SoftDevice will be invisible to the debugger as well Information on the SoftDevice configuration and memory resource mapping can be found in the 210 nRF51422 SoftDevice Specification Note Avoid single stepping to the protected area Instead set the breakpoint right after SVC calls while debugging and run the application to the actual breakpoint see Figure 30 on page 37 The step over function F10 may also be used instead to step over SVC calls to avoid delays when entering the readback protected area C KeilARM Device Nordic nrf51422 Board nrf6310 ant ant_hrm hrm_te arm ant_hrm_tcuvproj pVisiond S een File Edit View Project Flash Debug Peripherals Tools SVCS Window Help 3 Oga gl ms a eR A a E Ej Hz Z txd_pin_number a I
20. ge 6 2 2 1 nRF51422 software e nNRFgo Studio e NRF51 Software Development Kit SDK e Precompiled HEX files e Source code e Keil ARM project files e ANTware Il 2 2 2 nRF51422 documentation nRF51422 Evaluation Kit User Guide nRF51 Series Reference Manual nRF51422 PS 210 NRF51422 SoftDevice Specification nRF51422 PAN ANT API documentation 2 2 3 Schematics Bill of Materials PCB layout files and production files The ZIP file and its subdirectories contain the hardware design files for the Evaluation Kit e Altium Designer files e Schematics e PCB layout files e Production files e Assembly drawings e Drill files e Gerber files e Pick and Place files e Bill of Materials Page 5 of 47 NORDIC SEMICONDUCTOR nRF51422 Evaluation Kit User Guide v1 1 3 Quick start This section shows you how to set up the nRF51422 Evaluation Kit and provides example applications to help you start programming your device Register download and install 1 If you have Keil MDK ARM Lite already installed go to step 2 Otherwise download and install Keil MDK ARM Lite from https www keil com demo eval arm htm to your hard drive Keil downloads to c Keil unless you change the location when installing 2 Download and run the J Link Software and documentation pack for Windows from http www segger com jlink software html The serial number from your SEGGER J Link hardware is needed to identify your device 3 During inst
21. igure 3 PCA10003 top any to lo lex Page 12 of 47 NORDIC SEMICONDUCTOR nRF51422 Evaluation Kit User Guide v1 1 Short Function Figure 4 PCA10003 bottom 5 1 3 Block diagram gt Current VCC_nRF External supply R ener Vv SWD Antenna Voltage regulator Segger OB nRF51422 Osc Osc 32 768 kHz 16 MHz Figure 5 PCA10003 module block diagram Matching network 5 1 4 Reset button The EK board PCA10003 is equipped with a reset button SW3 for the nRF51422 When debugging the nRF51422 using the J Link OB you should use the reset functionality built into the computer software Page 13 of 47 NORDIC SEMICONDUCTOR nRF51422 Evaluation Kit User Guide v1 1 5 1 5 Power supply The EK board PCA10003 has several power options e USB see Figure 6 e External power supply through P1 1 8 V to 3 6 V e CR2032 coin cell battery see Figure 7 wes a wes wll G USB Si w N P1 Figure 6 USB and external power supply Coin cell battery holder Figure 7 Coin cell battery supply Page 14 of 47 NORDIC SEMICONDUCTOR nRF51422 Evaluation Kit User Guide v1 1 The 5 V from the USB is regulated down to 3 3 V through an on board voltage regulator The battery and external power supply is not regulated The power sources are routed through a set of diodes D1A D1B and D1C where the circuit is sup
22. lication Reset Vector Note Using Keil with the ARMCC toolchain the call stack size can be set using the Stack_S1ze definitions in your projects startup file typically arm_startup_nrf51 5s Stack_Size EQU 0x400 The application call stack size protocol call stack size AREA STACK NOINIT READWRITE ALIGN 3 Stack_Mem SPACE Stack_Si1ze __initial_sp Page 28 of 47 NORDIC SEMICONDUCTOR nRF51422 Evaluation Kit User Guide v1 1 6 2 3 Debugger configuration Project files delivered in the SDK are configured and ready for download and debugging If a new application project is used the debugger must be properly configured To configure the debugger 1 In Keil select Options for Target ALT F7 from the Project menu The Options for Target dialog box appears Select the Debug tab Apply the Use option and select the J Link J Trace debugger from the list Set Driver DLL to SARMCM3 DLL Set Dialog DLL to TARMCM1 DLL a aN Other options can be selected as needed To take full advantage of the debugger and its features the following are advised e Breakpoints e Load Application at Startup e Memory Display e Toolbox e Watch Windows Kd Options for Target nrf51422 Device Target Output Listing User C C Asm Linker Debug Uities Use Simulator Settings Use RII SRS eee Limit Speed to Real Time M Load Application at Startup I Run to maini M Load Application at Startup V Run
23. lick the Load icon to download and run the Broadcast example firmware w Note LEDO indicates ANT is transmitting and LED1 indicates that the device is idle Page 8 of 47 X NORDIC SEMICONDUCTOR nRF51422 Evaluation Kit User Guide v1 1 Start ANTware Il and configure the ANT channel Below is an example of how to set the Slave setting in ANTware II Select ANT dongle Device A Set Channel Assignment to Slave In the Channel ID window set Device to 0 set Device Type to 0 and set Trans Type to 0 Click Auto Open oY Monitor the traffic in the ANTware II Received Broadcast Data is shown in the feedback window showing packets coming from the ANT Broadcast TX A counter is added on the two last digits and will increase by one for each packet received Log Files Settings Help Available Devices Click on a device to view its channels Device A USB 0 Baud 57 6k Max ANT Channels 8 Max Networks 3 Max Data Channels 0 Capabilities Private Networks Serial Number Per Channel Tx Power Low Priority Search Search List Extended Messaging Scan Channel Support Ext Channel Assignment Proximity Search 4 BANT Refresh Channel o Channel 1 Channel2 Channel 3 Device A Channel O SlaveRx ID 2 2 1 Mandatory Channel Setup Channel ID a 0 0 0 Device 0 Release Device Type 0 Trans Type 0 Pairing Set ID Refresh Display Close Basic Advanced Inc ExcList Device Spe
24. ls The debugger does not halt on breakpoints Some Keil projects in the SDK have Optimization level 3 03 and Optimize for time checked If you are debugging an application with these settings your breakpoint set might have no effect Press AIt F7 to open the Target options dialog Select C C Select Optimization level 0 from the scroll down list Uncheck Optimize for time SS Software gets out of sync while debugging Setting modifying breakpoints on a running system using the SEGGER debugger halts the CPU which may result in software that is out of sync You should avoid setting breakpoints while the system is running The debugger is not able to detect my nRF51 device after have downloaded my firmware If the nRF51 device goes to SystemOFf Ff too soon after reset it will have a problem communicating with the J Link debugger You can recover using the Recover button in nRFgo Studio 1 Cycle the power to the nRF51 chip before you start the Recover application Note The Recover function will erase all application firmware on the chip Page 39 of 47 NORDIC SEMICONDUCTOR nRF51422 Evaluation Kit User Guide v1 1 Appendix A Installing drivers and configuring KEIL projects for the SEGGER debugger This appendix describes the steps for installing the software and using the SEGGER J Link Lite debugger with Keil uVision for nRF51 series devices based on J Link software version 4 52b or later Prerequisite Y
25. m QR ey cE c38 aes 9 SE TE CK cad mal Ms TEE D E Ax Hi ae Png p N 29 uu 2 2 Cc i pir A 4 O AJ P0 16 P0 23 PO D4 P0 31 Annne Bee BV LED 1 Button 0 Button 1 Start the Blinky project 1 Locate the Blinky project found under lt keil path gt ARM Device Nordic nrf51422 Board pca10003 blinky_example arm 2 Open the Blinky project in Keil uVision by double clicking the blinky uvproj file 3 Select nRF51422 from the Select Target list and click Build or press F7 to compile the Blinky project 4 Click the Load icon to download and run the Blinky example firmware LED 0 and LED 1 on the PCA10003 should now blink sequentially Page 7 of 47 NORDIC SEMICONDUCTOR nRF51422 Evaluation Kit User Guide v1 1 3 2 ANT Link demo Download and install ANTware II 1 Go to www nordicsemi com and log in to your Nordic My Page account 2 Download and install ANTware Il Plug in the ANT dongle 1 Plug the ANT dongle nRF2779 into your computer with a USB cable The driver installation will start automatically Start the ANT TX broadcast example 1 Goto the ANT Broadcast TX project found under lt keilpath gt ARM Device Nordic nrf51422 Board pca10003 ant ant_broadcast broadcast_tx arm 2 Open the project in Keil uVision by double clicking the ant_broadcast_tx uvproj file Click the Build icon or press F7 to compile the project 4 C
26. n 0 int return type required by ANSI ISO standard i H core int main void Hg lib i 46 uint8_t output_state 0 47 48 Configure LED pins as outputs 49 nrf_gpio range cfg output LED START LED STOP 50 S while true ae g3 nrf gpio port _write LED PORT 1 lt lt output_state LED OFFSET 54 output_gtate output state 1 amp STATE MASK 55 nrf delay ms 1900 56 E Pr Bo Fu Oy Te Build Output q JLink Info J Link Flash download Flash programming performed for 1 range 0 bytes W jJLink Error PC of target system has unexpected value after programming sector PC OxFFFFFFFE JLink Info J Link Flash download Total time needed 134552735 622s Prepare 0 118s Compare 0 009s Program 727945417 067s Verify 593392682 385s 7 mW CAP NUM SCRL OVR R Enter or leave a debug session JLink Info Found Cortex M0 r0p0 Little endian J LINK J Trace Cortex Figure 26 Start debugging mode Page 33 of 47 NORDIC SEMICONDUCTOR nRF51422 Evaluation Kit User Guide v1 1 7 1 nRF51422 debug features and precautions This section contains information about the System Viewer Windows debugging an application when a readback protected SoftDevice is present and setting a breakpoint using a SEGGER J Link debugger 7 1 1 System Viewer windows The System Viewer enables you to select device peripherals
27. ng J LINK J Trace Cortex Page 31 of 47 NORDIC SEMICONDUCTOR nRF51422 Evaluation Kit User Guide v1 1 8 Inthe Utilities tab select Use Target Driver for Flash Programming 9 Choose the available debugger from the list as shown in Figure 25 Device Target Output Listing User C C Asm Linker Debug Utilities Configure Aash Menu Command Use Target Driver for lash Programming fan i Pine Cane Settings _Settnas eater circ bien Use Extemal Tool for Pash Programming Arguments T Aun Independent Figure 25 Debugger selection Page 32 of 47 NORDIC SEMICONDUCTOR nRF51422 Evaluation Kit User Guide v1 1 7 Debugging the nRF51422 chip For debugging with SEGGER J Link see Appendix A on page 40 For general information on how to debug using the Keil uVision IDE see http www keil com uvision debug asp The following steps tell how to configure the debugger in Keil 1 Inthe Project menu click Options for Target CTRL F7 2 Select the Debug tab 3 To enter debugging mode click Start Stop Debug Session or CTRL F5 T le mp C Keil ARM Device Nordic nrf51422 Board nrf6310 blinky_example arm blinky uvproj Visi fon ol aS File Edit View Project Flash Debug Peripherals Tools SVCS Window Help O d s 8 E RBM ESL B wpne JAFRA e oee So S uz FEE Lae a Enter or leave a debug session B 63 app a A main c main function o a keil_arm_uv4 Int retur
28. on Shows how the readback protection is set The two possible options are readback protection on Region 0 or readback protection of the whole code memory e SoftDevice identification nRFgo Studio tries to identify the firmware located in the chip at Region 0 Recognized firmware is displayed as its ID unrecognized firmware is displayed as its FWID number 6 1 3 Erase all You should use the Erase all function in the following situation e You have programmed an application on top of the 210 nRF51422 SoftDevice and selected Lock entire chip from readback Once you have performed Erase All the application will be erased from the chip The 210 nRF51422 SoftDevice will not be erased Page 23 of 47 NORDIC SEMICONDUCTOR nRF51422 Evaluation Kit User Guide v1 1 6 1 4 This function lets you program an application onto the chip on top of the 210 nRF51422 SoftDevice Programming an application Before nRFgo Studio starts programming it verifies that the HEX file matches the actual memory configuration If it matches nRFgo Studio continues with the programming if not it stops the programming and returns an error message Note This programming will not set up any memory Regions nRFgo Studio File View nRF8001 Setup Help Features 4 2 4 GHz 4 Front End Tests TX carrier wave output RX constant carrier LO leakage TX RX channel sweep RX sensitivity 4 Bluetooth nRF8001 Configuration Dispatcher Trace
29. ou already have the Keil MDK toolchain installed Page 38 of 47 NORDIC SEMICONDUCTOR nRF51422 Evaluation Kit User Guide v1 1 9 Troubleshooting The nRF51422 device on hardware v1 0 of the PCA10003 does not respond when try to contact it What has happened Verify that both jumpers on connector P8 on the PCA10003 are in place When I connect multiple SEGGER J Link debugger boards to my computer Vision does not recognize them correctly This is a known limitation with uVision in MDK v4 53 or earlier that is fixed in later versions Upgrade to version 4 54 or later On my 32 bit Windows XP machine I get an error message with code 2908 when reinstalling either the nRF514 SDK or nRF518 SDK Installing or reinstalling either the nRF518 SDK or the nRF514 SDK after the nRF518 SDK has been uninstalled will cause error message code 2908 during installation Use the Task manager Ctrl Shift Esc to end the task nRF514 8 SDK Setup Drivers included in nRF518 will still be installed if they are not already installed The debugger seems to freeze while debugging If running a SoftDevice that has been programmed with the Lock SoftDevice from Readback enabled see section section 6 1 on page 22 the debugger will halt while stepping to an SVC instruction You should set the breakpoint after the SVC instruction and run the application to the breakpoint or step over any SVC instructions See section 7 1 2 on page 36 for more detai
30. ou need Keil Vision with ARM MDK that you have tested to be working with MDK version 4 54 Note All projects in the nRF514 SDK are preset to work with the SEGGER debugger Only the following step Download and install SEGGER drivers is needed Download and install SEGGER drivers 1 Download the latest SEGGER J Link software and documentation pack from http www segger com jlink software html 2 Download and run the J Link Software and documentation pack for Windows from http www segger com jlink software html The serial number from your SEGGER J Link hardware is needed see Figure 32 on page 41 3 During installation you will be prompted to select the IDE that you want updated with the latest SEGGER DLLs Check the box for Keil MDK and any other IDEs you want to use with SEGGER Rell MOK W454 DLL V4 53b in CO AReIWAM SS egger Select All Select None Select the ones you would like to replace by this version The previous version will be renamed and kept in the same folder allowing manual undo ln case of doubt do not replace existing DLLs You can always perform this operation at a later time via start menu caret Figure 31 IDEs selected for updating to the latest SEGGER DLLs Page 40 of 47 NORDIC SEMICONDUCTOR nRF51422 Evaluation Kit User Guide v1 1 4 Go to http www segger com IDE_Integration_Keil html knownproblems for MDK v4 54 Download JL2CM3 and copy it to lt keil gt ARM Segger This pa
31. page 25 e Base code memory address 0x20000 and available code memory size is Ox20000 128 kB e Base RAM memory address 0x20002000 and available RAM size is 0x2000 8 kB Page 26 of 47 NORDIC SEMICONDUCTOR nRF51422 Evaluation Kit User Guide v1 1 Ed Options for Target nrf51 Device Target Output Listing User C C Asm Linker Debug Utities Nordic nRF51422 Code Generation Mal MHz 16 0 Operating system None Use Cross Module Optimization System Viewer File Str Figure 20 Memory layout with example SoftDevice IROM1 Start Specify the start address for the application code Size Specify available code memory size for the application code IRAM1 Start Specify start address for the application data Size Specify available RAM size for the application data Table 4 Memory layout Page 27 of 47 NORDIC SEMICONDUCTOR nRF51422 Evaluation Kit User Guide v1 1 6 2 2 Shared call stack The user application shares the call stack with the SoftDevice if the SoftDevice is loaded on the chip The application must reserve enough memory for both itself and the SoftDevice in the call stack The call stack size required by the SoftDevice varies between devices and protocol stack versions and is supplied in the 210 SoftDevice Specification The user application sets its call stack size plus the amount needed by the SoftDevice It then writes the stack pointer at the first address of the app
32. plied from the source with the highest voltage VCC IO VCC nRF e P1 for 4 OR N C 2 V3 DIA VCC nRF 3 gt 2 SD103ATW 7 F Solderbridge Pin List 1x4 GND DIB SV gt VCCS5 1 Bat SD103ATW 7 F T Bat Holder CR2032 u2 GND VCC3 DIC Vin Vout L AP7333 33SAG 7 ad ae GND GND GND GND Figure 8 Power supply circuitry 5 1 6 SEGGER SWD disconnect The SEGGER J Link OB circuit on the EK board PCA10003 only works when the board is powered through the USB connector To ensure that the J Link OB will not hold any of the SWD lines while powered down the SWD lines will be disconnected automatically when the USB cable is unplugged However to disconnect the SWD lines manually the board is equipped with a switch SW4 that disconnects the lines even if the board is powered through the USB see Figure 9 VCC 10 U4 VCC3 NCI vcc SW4 a COMI SW EN i gt a NOl IN WEN ee 100k Switch nc m2 SEN NO2 GND GND GND STG3684A GND Figure 9 SWD disconnect logic Note To program or debug the nRF51422 using the SEGGER J Link OB the SW4 must be switched to ON Page 15 of 47 NORDIC SEMICONDUCTOR nRF51422 Evaluation Kit User Guide v1 1 5 1 7 GPIO interface Access to the nRF51422 GPIOs is available at connectors P3 P4 P5 and P6 on the EK board PCA10003 P3 P6 P0 00 1 2 P0 01 VCC 10 9 GND P0 02 3 4 P0 03 8 7 P0 30 P0 04 5 6 P0
33. reads this area as 0x0000 no operation instruction 6 2 5 Programming the device The code memory area occupied by the SoftDevice is read write and erase protected The debugger will read this area as 0x0000 no operation instruction When the SoftDevice is enabled the Memory Protection Unit enables write protection for certain peripherals used by the protocol stack Protected peripherals are described in the 270 nRF51422 SoftDevice Specification Configure the debugger and compile and link the application code Download the application using the Keil IDE download button To configure and start the download Select Options for Target in the Project menu Select the Utilities tab in the Options for Target dialog box Click Settings Select the Program check box Choose Erase Full Chip Click Add and select the nRF51xxx algorithm from the list to select the programming algorithm used by Keil IDE 7 Click Download oo SS Note The nRF51xxx algorithm is installed automatically during the SDK installation This algorithm is a generic nRF51 series algorithm which provides download capabilities to all series devices up to 2 MB of code memory coe inne Tager re see M Debug Trace Flash Download Download Function RAM for Algorithm Erase Full Chip V Program LOAD Erase Sectors W Verify Start 020000000 Size 0800 Donot Erase W Reset and Run Address Range 00000000H 001FFFFFH Figure 24 Selecti
34. rf51422 Board nrf6310 blinky_example arm blinky uvproj pVision4 rnm File Edit View Project Flash Debug Peripherals Tools SVCS Window Help Ogag aa o c o n P RAR E E R vanner JAPAO Celaya i ye ES 3 nrf51422 AS Start Stop Debug Session Ctri F5 Enter or leave a debug session q E 3333 a42 nrf51422 error Board is not defined lt 3 app endif fl A main c vo aa keil_arm_uv4 Int p s b i core main function i return 0 int return type required by ANSI ISO standard H lib p uint8_ t output state 0 Configure LED pins as outputs nrf_gpio range cfg output LED START LED STOP while true nrf_gpio port _write LED PORT 1 lt lt output_state LED OFFSET output state output state 1 amp STATE MASK nrf delay ms i00 bo 3 Fu Oy Te m Build Output compiling system nrf51 c creating preprocessor file for nrf_delay c compiling nrf delay c 4 JLink Info Found Cortex M0 r0p0 Little endian J LINK J Trace Cortex Figure 23 Debugger initiation Page 30 of 47 NORDIC SEMICONDUCTOR nRF51422 Evaluation Kit User Guide v1 1 6 2 4 Limitation when debugging on a chip with a SoftDevice When a SoftDevice is installed in a device there are certain limitations when debugging The nRF51422 has a Memory Protection Unit that prevents the debugger from having read write access to the SoftDevice flash area The debugger
35. sases ioietsxetuerinesarskecesubsssavesasea estore EEES EENET ECETES E EEANN renee 39 Appendix A Installing drivers and configuring KEIL projects for the SEGGER CSU COE scriisiisdacreiisna sitieni near ii ideiak i es EE ee i iaeia 40 Page 2 of 47 NORDIC SEMICONDUCTOR nRF51422 Evaluation Kit User Guide v1 1 1 Introduction The nRF51422 ANT Evaluation Kit EK provides a complete solution for testing and evaluating the nRF51422 device The nRF51422 is part of the nRF51 series which offers a range of ultra low power System on Chip SoC solutions for your 2 4 GHz wireless products 1 1 Minimum requirements e NRFgo Studio v1 14 or later e Computer with a minimum of 2 USB ports e Windows XP or Windows 7 1 2 External resources e Keil MDK ARM Lite v4 54 or later https www keil com demo eval arm htm e J Link Software v4 52b or later http www segger com jlink software html 1 3 Writing conventions This User Guide follows a set of typographic rules that makes the document consistent and easy to read The following writing conventions are used e Commands are written in Lucida Console e Pin names are written in Consolas e File names and user interface components are written in bold e Internal cross references are italicized and written in semi bold 1 4 Evaluation kit release notes January 2013 2 0 Fixed known issue in kit v1 0 November 2012 1 0 Known issues PCA10003 v1 0 e The antenna matching network an
36. ssecssscssscesssecssscessesesscesssecssecessssessecenseees 10 4 1 Development CHV INOMPICING sieciisisi cincscaticecsshitexsstxastiarersenciseacpesatesete abdeciassnesusacdtarargetsecesesecutbice lnaterebiaxiasess 10 5 Hardware description cccatcccesceicicscctesuenencnicsccenatschcaestecscscesevenctnsaces cGusiseseicisoncameiasedeavctususeseitsidscessiicistecests 12 5 1 nRF51422 Evaluation Kit board PCA10003 ssesesseseseesesseseesesseseseesesresesseseesesseseseesesseseesessesesseseseeses 12 5 2 nRFready ANT USB dongle nRF2779 es ssessessseessesssesssessersssesseesseosseesseesseoseesseessersseesseosseoserssseoseosseose 20 6 Flash programming and application development sseesseessecessoesocessecescessocssocesseessoessocssocesocesseess 22 6 1 Programming and erasing flash using nRFgo Studio e ssesssesssesssesseesseesseessessecesseoseesseesseesseosseessees 22 6 2 Application develop I IN seersrcanranienie n en NE EENE EEO NE OE teases 25 7 Debugging the nRF51422 chip esseesseesceessocesecesoeesocesocesoeessocssocecoeesoessocesocesseesooesccessoeesocssocesoeesoeesseees 33 7 1 nRF51422 debug features and precautions se ssessseesseesseessessecsseesssesseesseesseesscoseceseosersseesseesseosseessees 34 8 Software Development Kit sssesesesseescoesseessoessocesoeesocesocesoeescoessoesooessoeesoeesoeesooescoesseeesoeesoessoeessesssoeeosee 38 8 1 eeek eaaa ae e A EEA 38 9 TrouDles NOONG cases siccnsesctasucastacicovsacevesstv
37. ste 43 output_state output_state 1 5 inline_delay_ms 100 nRF2779 AP2 Dongle Keil uVision IDE Control and monitor ANTware Figure 2 nRF51422 Evaluation Kit configuration Page 11 of 47 NORDIC SEMICONDUCTOR nRF51422 Evaluation Kit User Guide v1 1 5 Hardware description This chapter describes the nRF51422 Evaluation Kit hardware 5 1 nRF51422 Evaluation Kit board PCA10003 The nRF51422 Evaluation Kit board PCA10003 is a standalone nRF51422 ANT evaluation board with an integrated debugger from SEGGER Note It is not possible to erase or upgrade the SoftDevice on this chip 5 1 1 Key features The nRF51422 EK board PCA10003 has the following key features e NRF51422 flash based ANT SoC solution e Buttons and LEDs for user interaction I O interface for plug in modules e SEGGER J Link OB programming and debugging capabilities e USB to UART bridge 5 1 2 Hardware pictures a RF current LAL EEEE 99 haces nRF_RESE SR Ncomantetion S1 0d 80 0d Z0 0d 00 0d S818 Hines us E 2033 apa x TTE O gt ALLEE TETEE EE NERA 0 Aap 7SEGGER g J Link Technology www segger com er T Xo D2 Cy 0 ve SBS SB10 SB11 SB12 N O P v m Eg KU 49 Pas ED 2 cS ab a 50O zJ SO SO A DDD c27 2 PO 24 P0 31 N g h x APR as fF 5 oom LED 1 Button O Er waa Button 1 1 Y0000F g sez 0 afl Poz i tips Ona O F
38. t ant_hrm hrm_tx arm ant_hrm_i File Edit View Project Flash Debug Peripherals Tools SVCS Window Help Oe a s Blocleo PRanl Fee gw svc Harao o eam Sa HER 0o gt sBla G s RA DEF Registers q Disasse g event flags amp EVENT TIMER EXPIRED return_value nrf_wait_for_ app event DF3D SVC Ox3D 0001 MOVS t E a L if NRF_SUCCESS return _ value Code that should never be reached D002 BEQ Ox0000A5FC aborthandler ASSERT nrf wait_for_app_event return value No else clause needed AOS7 ADR r0 pc 2 0x0000A754 FOOOFS4E BL W aborthandler 0x0000A898 if g_event_ flags 6820 LDR ro r4 0x00 2800 CMP r0 0x00 DOF6 BEQ OxO000ASFO if g_event flags amp EVENT ANT STACK and after that return to the sleep mode while 1 return value nrf_wait for _ app event if NRF_SUCCESS return_value Code that should never be reached aborthandler ASSERT nrf wait for app event return value No else clause needed if g_event flags As we wake up for every periodic timer tick count interrupt most of the time we don t need to enter this method application_event_process No else clause needed Project Registers Command q Call Stack Locals Name Location Value Type JLink Info J Link Flash download Total time needed 1116735 2 Z mainhrmix 0x0000A5F4 void f0 Load OTE ETE E A Y return_value lt not in scope gt auto unsigned int BS an
39. t_hrm tx main hrm tx c 80 OO000AECC ASSIGN BreakDisable BreakEnable BreakKill BreakList BreakSet amp amp Call Stack Locals EE Memory 1 J LINK J Trace Cortex t1 0 00000000 sec at Figure 30 Setup with a breakpoint after an SVC call Page 37 of 47 NORDIC SEMICONDUCTOR nRF51422 Evaluation Kit User Guide v1 1 8 Software Development Kit The nRF51 Software Development Kit SDK enables you to develop applications for the following protocol Stacks ANT e ANT Note ANT keys are needed to use ANT profiles included in the SDK Please register as an ANT adopter at http thisisant com to get the keys 8 1 Installing the nRF51 SDK The nRF51 SDK is a part of the downloadable content available from your My Page account see section 2 2 on page 5 The SDK is downloaded as a MSI file a Windows Installer and is installed by running the application When installing the SDK you can select Keil MDK Support and or Custom install The following describes each installation option e Keil MDK support installs Keil uVision example project files the code memory programming algorithm for the J Link debugger and the Nordic nRF51 series device database file for Keil e Custom install installs a software archive to a customized location nrfjprog installs a command line programming interface to be used with SEGGER debuggers Note The Keil MDK Support option will only be available if y
40. tch is necessary for the SEGGER debugger to work 5 Plug the Evaluation Board PCA10003 into your computer with a USB cable The LD3 LED will blink while the driver installation occurs Wait until the LED is continuously lit LD3 RALA S re OFF g DV PE ee 5 dp Cd Sannn ore Ea R28 S nF a TR current LA ae Ao SBI Sis Oeics Io Li eis TIC33D sh 0d 80 0d LO Sa 00 0d aa MIMI Te Rest IN Yeon el B a Bed TE paca 901 Link Technology www segger com ae Ji a Tt 3 3 F PUTTEUU EEE ES 2 is _ ED ZL zZ eo ro O n m Q oO Z g ne e a EB C13 c278 P0 16 P0 23 P0 24 P0 31 EE E E oo yy Bi zns sawo vO000P Serial number Figure 32 J Link Lite CortexM 9 serial number location Page 41 of 47 NORDIC SEMICONDUCTOR nRF51422 Evaluation Kit User Guide v1 1 Configuring KEIL projects for the SEGGER debugger for first time use Create the JLinkSettings ini file with the contents shown in Figure 38 on page 45 The file JLinkSettings ini should be saved in the same folder as the Keil uVision project uvpro file 1 Double click an example project file to open the Keil Vision IDE 2 Click Target Options on the toolbar or click Project menu and select Options for Target Debug Peripherals Tools SVCS Window Help e altr AR amp se e a Q Configure target options Figure 33 Keil Target configuration Under
41. the Debug tab in the Use list select J LINK J Trace Cortex option as shown in Figure 34 Click Settings as shown in Figure 34 Both the SEGGER Control Panel and the Keil Target Driver Setup will open opto Tose Sz a Device Target Output Listing User C C Asm Linker Debug aes Settings Use ILINK Trace Cotex gt _Setings Limit Speed to Real Time V Load Application at Startup M Run to maing Figure 34 Selecting JLink debugger in Keil Page 42 of 47 NORDIC SEMICONDUCTOR nRF51422 Evaluation Kit User Guide v1 1 Note If the SEGGER J Link Lite firmware requires an update you will be prompted with the message A new firmware version is available for the connected emulator In this case click OK General Settings Breakpoints Log CPU Regs Target Power SWV RAW Trace Device Emulator MemMap Flash Jv Start minimiz v Always onto rocess IC Kel UV4 UV4EXE o DLL CAKeih UvA JLinkKARM dll Jik S Target l ndian 4 a E Actual A l Host Doo swt ttsti i i i s SOS S OOOOOOCS License About JLINK_GetFirmwareString Done 169 650 sec in 2 calls Figure 35 Segger control panel 5 Click the Debug tab shown in Figure 36 Set Port to SW and Max Clock to 1 MHz as shown in Figure 36 Make sure that SN and IDCODE are populated as seen in Figure 36 and click OK a k g RR ray 13 Cortex JLink JTrace Target Driver Setup Z
42. tion For example if a 1 Q resistor is chosen 1 mV equals 1 mA Connect an oscilloscope we hl La aN I ME mN nRF_RESET measurement mm Cut E 0C33 opp did e u3 NEEG SE Y SEGGE J Link Technology www segger com C 2c38 F 0043 k AA Mount a resistor H mmo Page 19 of 47 NORDIC SEMICONDUCTOR nRF51422 Evaluation Kit User Guide v1 1 5 2 nRFready ANT USB dongle nRF2779 The nRFready ANT USB dongle nRF2779 enables you to send data to nRF51422 as well as monitor the data sent from nRF51422 Software and drivers for the ANT USB dongle install automatically but are also available for download from the nRFready ANT USB dongle product page at www nordicsemi com The ANT USB dongle combined with ANTware II gives you a peer device for nRF51422 that you can use to test the wireless connection 5 2 1 Key features The nRF2779 has the following key features e NRF24AP2 IC e ANT compatible 5 2 2 Hardware pictures tag 2 w L B a E C1 R2G i olan z C2 oO O QO m Z O LLI N 2 Q aa O Z Figure 16 nRF2779 bottom side Page 20 of 47 NORDIC SEMICONDUCTOR nRF51422 Evaluation Kit User Guide v1 1 5 2 3 Block diagram USB VBUS ee Data nRF24AP2 USB Antenna M Matching network Osc 16 MHz Figure 17 nRF2779 block diagram Page 21 of 47 NORDIC SEMIC
43. to main Initialization File Initialization File PO BI Edit OoOo R Edit Restore Debug Session Settings Restore Debug Session Settings IW Breakpoints I Toolbox V Breakpoints I Toolbox Iv Watch Windows amp Performance Analyzer I Watch Windows I Memory Display I Memory Display CPU DLL Parameter Driver DLL Parameter SARMCM3 BLL SARMCM3 DLL Dialog DLL Parameter Dialog DLL Parameter DARMCMT DUL anRF5 TARMCM1 0LL Figure 21 Debugger options 6 Click Settings next to the Use field in the top right of the window 7 Inthe Target driver setup provide information about debugging protocol and maximum speed Select SW in the Port drop down 8 In Max Clock the maximum speed for the debugging port cannot be exceeded 1 MHz A proper configuration is shown in Figure 22 on page 30 Page 29 of 47 NORDIC SEMICONDUCTOR nRF51422 Evaluation Kit User Guide v1 1 se JLink JTrace Target Drive Debug Trace Flash Download J Link J Trace Adapter SN a j i Move Device J Link Lite Cortex M SWD Ox0BB11477 ARM CoreSight SW DP up HW v8 00 dill V452b Down FW nk Lite Cortex M V8 compi Automatic Detection ID CODE Manual Configuration Device Name Auto Ok Add Delete Update IF lerr Figure 22 Target driver setup 9 Click Start Stop Debug Session CTRL F5 in the Keil IDE to start debugging C Keil ARM Device Nordic n
44. tons the P0 16 and P0 17 pins must be configured as an input with internal pull up resistor The LEDs are active high meaning that writing a logical one 1 to the output pin will illuminate the LED A z S z SB6 SB7 5 z Solderbridge Solderbridge m m R5 R6 220R 220R SWI1 SW2 LD1 LD2 PB SW PB SW LO805G L0805G GND GND GND GND Figure 12 Button and LED configuration Page 17 of 47 NORDIC SEMICONDUCTOR nRF51422 Evaluation Kit User Guide v1 1 5 1 9 32 768 kHz crystal nRF51422 can use an optional 32 768 kHz crystal X2 for higher accuracy and lower average power consumption On the EK board PCA10003 module P0 26 and P0 27 are by default used for the 32 768 kHz crystal and are not available as a GPIO on the P6 connector If P0 26 and P0 27 are needed as normal I Os the 32 768 kHz crystal can be disconnected and the GPIO routed to the P6 connector Cut the shorting track on SB2 and SB3 and solder SB4 and SB5 See Figure 13 on page 78 for reference x lt sla D Oo SB Cut 2 Solder SB s SB4 13 Figure 13 Disconnecting 32 768 kHz crystal and connecting P0 26 and P0 27 to P6 5 1 10 UART configuration Table 2 shows an overview of the UART connections on nRF51422 and the SEGGER IC P0 08 RTS SB9 CTS P0 09 TXD SB11 RXD P0 10 CTS SB10 RTS P0 11 RXD SB12 TXD Table 2 Relationship of UART connections on nRF51422 and SEGGER The UART signals by default are routed directly to the
45. with the Keil Microcontroller Development Kit MDK For full use of the Development Kit source code projects and to upgrade firmware download and install the free KEIL MDK ARM Lite from https www keil com demo eval arm htm J Link OB driver not included in this kit For installing drivers for the integrated SEGGER chip visit http www segger com jlink software html You will be asked to enter your SEGGER serial number before the download will begin You must correctly install the drivers for the device to use the J Link debugger with Keil MDK See Appendix A Installing drivers and configuring KEIL projects for the SEGGER debugger on page 40 4 1 1 Development environment setup The nRF51422 device can be programmed from several environments This section shows the development setup using Keil MDK ARM The nRF51422 EK can be configured for standard ANT profile based applications For development or demonstration of standard ANT profile based applications you need e 1xnRF51422 Evaluation board PCA10003 1x nRF2779 AP2 dongle e ANTware II PC software Figure 2 on page 11 show the relationship between the hardware and software components and the Evaluation board Note The Keil uVision IDE is not included in the kit content Page 10 of 47 NORDIC SEMICONDUCTOR nRF51422 Evaluation Kit User Guide v1 1 Examples and Applications written for Keil nRF51 SDK a2 NRF_GPIC gt OUT 1UL lt lt output_

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