altaccumulate Megafunction User Guide
Contents
1. a subtract function If this parameter is not used the accumulator performs add functions only sign data No Specifies the numerical Ifthe sign data portis high representation of the data port the accumulator treats the data port as a signed two s complement Ifthe sign data port is low the accumulator treats the data port as an unsigned two s complement 3 2 altaccumulate Megafunction User Guide Altera Corporation March 2007 Specifications Table 3 2 shows the input ports for the altaccumulate megafunction Table 3 2 altaccumulate Megafunction Output ports Port Name Required Description Comments result Yes Accumulator output port Output port WIDTH OUT 1 0 wide cout No Carry out borrow in of the The cout port has a physical MSB interpretation as the carry out borrow in of the MSB The cout port is most meaningful for detecting overflow in unsigned operations The cout port operates in the same manner for signed and unsigned operations overflow No Overflow port for the accumulator Table 3 3 shows the parameterized megafunction interface of the altaccumulate megafunction Table 3 3 altaccumulate Megafunction Parameters Parameter Type Required Comments WIDTH IN Integer Yes Width of the data port WIDTH OUT Integer Yes Width of the result port LPM REPRESENTATION String No Specifies the numer2. architectures Using megafunctions instead of coding your own logic saves valuable design time Additionally the Altera provided functions may offer more efficient logic synthesis and device implementation You can scale the megafunction s size by setting parameters Featu res The altaccumulate megafunction implements an accumulator and offers many additional features which include W Parameterizable input data widths W Support for pipelining with parameterized output latency B Active high asynchronous clear and clock enable control inputs G ene ral The altaccumulate megafunction is an arithmetic megafunction provided gn in the Quartus II software MegaWizard Plug In Manager Description Accumulators are common basic building blocks useful in digital signal processing DSP functions The altaccumulate megafunction implements an accumulator that adds its input data to the registered result of its previous operation allowing the accumulator to store the sum of a serial data stream Figure 1 1 illustrates a basic 8 bit addition based accumulator Figure 1 1 8 Bit Accumulator Block Diagram result data overflow clk 1 2 Altera Corporation altaccumulate Megafunction User Guide March 2007 About This Megafunction Resource Utilization amp Performance Altera Corporation March 2007 Figure 1 2 Basic altaccumulate Symbol accumulator UNSIGNED result 7 0 The altaccu
3. for the altaccumulate Megafunction clock dataa datab result On Page 4 of the altaccumulate wizard see Figure 2 4 you can specify optional input and output ports for the accumulator Altera Corporation 2 3 March 2007 altaccumulate Megafunction User Guide Using the MegaWizard Plug In Manager Figure 2 4 MegaWizard Plug In Manager altaccumulate Page 4 of 6 MegaWizard Plug In Manager altaccumulate page 4 of 6 ALTACCUMULATE Version 6 0 About r Input Options Ll Add an extra latency of 1 clock cycles C Create an add sub port C Create a clken port Create a cin port Create an acl port C Create a sload port r Output Options C Create an overflow port 38 lut 36 reg Cancel lt Back Next gt Einish Table 2 2 shows the options available on Page 4 of the altaccumulate wizard For more information on the ports refer to Tables 3 1 and 3 2 in this user guide Table 2 2 altaccumulate Wizard Page 4 Parameter Description Input ports Select which input ports you would like to add e Addan extra latency of specify how many clock cycles clock cycles Create an add sub port Create a cin port Create a sload port Create a clken port Create an aclr port Output ports Create a cout port Create an overflow port 2 4 Altera Corporation altaccumulate Megafunction User Guide March 2007 Getting Started I
4. in a list of items vvhen the sequence of the items is not important v The checkmark indicates a procedure that consists of one step only Es The hand points to information that requires special attention The caution indicates required information that needs special consideration and A understanding and should be read prior to starting or continuing with the procedure or process The warning indicates information that should be read prior to starting or continuing the procedure or processes The angled arrow indicates you should press the Enter key Uc The feet direct you to more information on a particular topic vi Altera Corporation altaccumulate Megafunction User Guide March 2007 Chapter 1 About This A DTE RA Megafunction Device Fami ly The altaccum megafunctions support the following target Altera device Su p p 0 rt families Stratix III Stratix II GX Stratix II Stratix Stratix GX Cyclone III Cyclone II Cyclone HardCopy II HardCopy Stratix MAX II MAX 3000A MAX 7000AE MAX 7000 B MAX 7000 S ACEX 1K APEX II APEX 20KC APEX 20KE FLEX 10K FLEX 10KA FLEX 10KE FLEX 6000 Altera Corporation 1 1 March 2007 altaccumulate Megafunction User Guide Introduction Introduction As design complexities increase use of vendor specific intellectual property IP blocks has become a common design methodology Altera provides megafunctions with adjustable parameters that optimizes with Altera device
5. mod modelsim html which is a support page for ModelSim Altera There are various links here to topics such as installation usage and troubleshooting Set up the ModelSim Altera simulator by performing the following steps 1 Unzip the altaccumulate msim zip file to any working directory on your PC 2 Browse to where you have unzipped the files and open the mult accum do file in a text editor Altera Corporation 2 15 March 2007 altaccumulate Megafunction User Guide Design Example 8 Bit Multiplier Accumulator 3 Inline 1 of the mult accum do file replace insert directory path here with the directory path of the appropriate library files For example C Modeltech ae altera verilog stratixii 4 From the File menu select Save 5 Start ModelSim Altera 6 From the File menu select Change Directory 7 Select the folder where you have unzipped your files and click OK 8 Fromthe Tools menu select Execute Macro 9 Selectthe mult accum do file and click Open This is a script file for ModelSim which automates all the necessary settings for the simulation 10 Verify the results by looking at it in the Waveform Viewer window You may need to rearrange signals remove redundant signals and change the radix to suit the results in the Quartus II Simulator Figure 2 12 shows the expected simulation results in ModelSim Figure 2 12 ModelSim Simulation Results Fo wave default Fle Edt View Insert Format Tocs
6. Page 2a expand the Arithmetic folder and select the ALTACCUMULATE megafunction Select Stratix II for Which device family will you be using Select Verilog HDL for Which type of output file do you want to create Specify the output file name as project directory Naccum Click Next Page 3 is shown Figure 2 6 Altera Corporation altaccumulate Megafunction User Guide March 2007 Getting Started Figure 2 6 MegaWizard Plug In Manager altaccumulate Page 3 of 6 MegaWizard Plug In Manager altaccumulate page 3 of 6 ALTACCUMULATE Version 6 0 About z ANE v How wide should the data input bus be vw bits How wide should the result output bus be 35 bits result 35 0 Data Representation D Signed Unsigned Create sign data input port to do both 1 signed 0 unsigned Resource Usage 38 lut 36 reg 10 On Page 3 of the altaccumulate wizard select 18 bits for How wide should the data input bus be 11 Select 36 bits for How wide should the result output bus be 12 Select Unsigned for Data Representation 13 Click Next Page 4 appears Altera Corporation 2 9 March 2007 altaccumulate Megafunction User Guide Design Example 8 Bit Multiplier Accumulator Figure 2 7 MegaWizard Plug In Manager altaccumulate Page 4 of 6 MegaWizard Plug In Manager altaccumulate page 4 of 6 4 h ALTACCUMULA
7. Report window view the simulation output waveforms and verify the results Figure 2 11 shows the expected simulation results 2 14 Altera Corporation altaccumulate Megafunction User Guide March 2007 Getting Started Figure 2 11 mult accum Simulation Results Simulation Report Simulation Waveforms 5 Simulation Report Simulation Waveforms ESE Legal Notice Simulation mode Functional EE Flow summary GE Flow Settings Ad Simulator EES Summary SE Selaings Master Time Bar 17 15 ns 4 gt Pointer 1 35 ns Interval 15 8 ns Start Sau Simulation Waveforms ES Simulation Coverage 200ns 40 0ns 60 0ns S800ns 1000ns 1200ns 1400ns 160 0ns 1800ns GSE IN Usage 5 17 15 ns cia 2 Y 3 X 4 X 5 X6 X7 YS X 3 X010 X T X012 V 13 4 V5 C16 C17 X18 26 Y 27 Y 28 Y 28 Y 30 Y 31 Y 32 Y 33 Y 34 Y 35 Y ED ERED 38 Y 40 CIB FST TESTET TTT TITTAT TI LI LI TI Result 28 Y 74 Y 3152 Y 260 400 574 Y 784 UI 1320 1650 2024y2444 2812 5430y 8000 82 overflow Simulate the 8 Bit Multiplier Accumulator Design in ModelSim Altera Simulate the design in ModelSim to compare the results of both simulators Note that this ModelSim design example is for the ModelSim Altera Verilog version This User Guide assumes that you are familiar with using ModelSim Altera before trying out the design example If you are unfamiliar please refer to http www altera com support software products modelsim
8. TE Version 6 0 About Input Options Arnal M Add an extra latency of 1 clock cycles UNSIGNED result 35 0 f i Create a cin port Mi Create an aclr port erflow C Create an add sub port C Create a clken port C Create a sload port Output Options C Create a cout port 38 ut 74 reg 14 On Page 4 select Add an extra latency of clock cycles and set it to 1 clock cycle Figure 2 7 15 Select Create an aclr port 16 Select Creat e an overflow port 17 Click Next Page 5 appears listing the simulation model file s needed to properly simulate the generated design files Figure 2 8 2 10 Altera Corporation altaccumulate Megafunction User Guide March 2007 Getting Started Figure 2 8 MegaWizard Plug In Manager altaccumulate Page 5 of 6 MegaWizard Plug In Manager altaccumulate page 5 of 6 Simulation Libraries ALTACCUMULATE Yersion 6 0 1 Parameter Settings To properly simulate the generated design files the following simulation model file s are needed 18 Click Next Page 6 appears Altera Corporation 2 11 March 2007 altaccumulate Megafunction User Guide Design Example 8 Bit Multiplier Accumulator Figure 2 9 MegaWizard Plug In Manager altaccumulate Page 6 of 6 Summary MegaWizard Plug In Manager altaccumulate page 6 of 6 Summary ALTACCUMULATE Version 6 0 About Wh
9. Window Ops to 185 ns i Now 1us Delta 0 2 16 Altera Corporation altaccumulate Megafunction User Guide March 2007 Getting Started Conclu si on The Quartus II software provides parameterizable megafunctions ranging from simple arithmetic units such as adders and counters to advanced phase locked loop PLL blocks multipliers and memory structures These megafunctions are performance optimized for Altera devices and therefore provide more efficient logic synthesis and device implementation because they automate the coding process and save valuable design time The altaccumulate megafunction implements an accumulator which stores the sum of a serial data stream You can use the MegaWizard Plug In Manager to parameterize this megafunction for specific needs Altera Corporation 2 17 March 2007 altaccumulate Megafunction User Guide Conclusion 2 18 Altera Corporation altaccumulate Megafunction User Guide March 2007 Chapter 3 Specifications ANU S nYAN Ports amp Parameters Altera Corporation March 2007 This chapter describes the ports and parameters for the altaccumulate megafunction Figure 3 1 shows all the available ports and parameters for an altaccumulate megafunction Tables 3 1 and 3 2 show the input and output ports respectively Table 3 3 shows the parameterized megafunction interface of the altaccumulate megafunction These parameter details are relevant to users who do not use th
10. afunction User Guide March 2007 Getting Started Implement the 8 Bit Multiplier Accumulator Compile the project to implement the 8 bit multiplier accumulator by performing the following steps 1 From the Project menu select Add Remove Files in Project Add mult v accum v and mult accum bdf to the project From the Processing menu select Start Compilation or click the compile button to compile the design Click Yes to save any changes in the dialog box asking Save changes to mult accum bdf Click OK when the Full compilation was successful message box is shown To view how the module is implemented in the Stratix II device from the Assignments menu select Timing Closure Floorplan Simulate the 8 Bit Multiplier Accumulator Design in Quartus II Use the Quartus II software to simulate the multiplier accumulator design module and verify the results Set up the Quartus II simulator by performing the following steps 1 Altera Corporation March 2007 From the Processing menu select Generate Functional Simulation Netlist When the Functional simulation netlist generation was successful message box appears click OK From the Assignments menu select Settings to open the Settings dialog box Select the Simulator Settings category in the Category list Under Simulation mode select Functional and then select the mult accum vwf input vector waveform file Figure 2 10 2 13 altaccumulate Megafunctio
11. altaccumulate Megafunction User Guide JAN DTE RA e 101 Innovation Drive San Jose CA 95134 408 544 7000 Software Version 7 0 www altera com Document Version 2 3 Document Date March 2007 Copyright O 2007 Altera Corporation All rights reserved Altera The Programmable Solutions Company the stylized Altera logo specific device des ignations and all other words and logos that are identified as trademarks and or service marks are unless noted otherwise the trademarks and service marks of Altera Corporation in the U S and other countries All other product or service names are the property of their respective holders Al tera products are protected under numerous U S and foreign patents and pending applications maskwork rights and copyrights Altera warrants performance of its semiconductor products to current specifications in accordance with Altera s standard warranty but reserves the right to make changes to any products and services at any time without notice Altera assumes no responsibility or liability arising out of the ap plication or use of any information product or service described herein except as expressly agreed to in writing by Altera NSAI Corporation Altera customers are advised to obtain the latest version of device specifications before relying on any published in formation and before placing orders for products or services I S EN ISO 9001 UG MF83104 2 3 ii Altera Corporation altaccumulate Megafunc
12. an altaccumulate megafunction using the MegaWizard Plug In Manager In this case an altaccumulate is instantiated after a multiplier to create the multiplier accumulator You can change the parameters as needed for your own design In this example you will perform the following activities E Generate an 8 bit accumulator design module WB Implement the multiplier accumulator design module in an Altera device by assigning the Stratix II EP2515F484C3 device and compiling the project W Simulate the customized accumulator design module Figure 2 5 shows the multiplier accumulator megafunction design Figure 2 5 Multiplier Accumulator Design id mult accum LATENC Y 1 UNSIGNED REL resut 35 0 bc ation overflow Altera Corporation March 2007 2 7 altaccumulate Megafunction User Guide Design Example 8 Bit Multiplier Accumulator Generate an 8 Bit Accumulator Use the following steps to generate an 8 bit accumulator 1 2 2 8 Open the project file mult accum qpf Open the top level file mult accum bdf This file is an incomplete design You will be adding the accumulator to create the multiplier accumulator Double click on a blank area in the block design bdf file In the Symbol window or from the Tools menu select MegaWizard Plug In Manager On Page 1 of the MegaWizard Plug In Manager select Create a new custom megafunction variation and click Next Page 2a appears On
13. and analyze data samples for the top level ports of the Altera megafunctions in your design while your system is running at full speed To monitor signals from your Altera megafunctions you must first configure the SignalTap II embedded logic analyzer in the Quartus II software and then include the analyzer as part of your Quartus II project The Quartus II software will then embed the analyzer along with your design seamlessly in the selected device For more information about using the SignalTap II embedded logic analyzer refer to the Design Debugging Using the SignalTap II Embedded Logic Analyzer chapter in volume 3 of the Quartus II Handbook Altera Corporation altaccumulate Megafunction User Guide March 2007 Getting Started Design Example 8 Bit Multiplier Accumulator Accumulators are common basic building blocks useful in DSP functions This section presents a design example that uses the altaccumulate megafunction to generate a basic multiplier accumulator This example uses the MegaWizard Plug In Manager in the Quartus II software to customize this megafunction As you go through the wizard each page is described in detail When you are finished with this example you can incorporate it into the overall design Design Files The example design files are available in the Quartus II Projects section on the Design Examples page of the Altera web site www altera com Example This example shows how to instantiate
14. e MegaWizard Plug In Manager interface and use the megafunction as a directly parameterized instantiation in their design The details of these parameters are hidden if you use the MegaWizard Plug In Manager interface Refer to the latest version of the Quartus II software Help for the most current information on the ports and parameters for this megafunction Figure 3 1 altaccumulate Symbol LATENCY 1 3 1 altaccumulate Megafunction User Guide Ports amp Parameters Table 3 1 shows the input ports for the altaccumulate megafunction Table 3 1 altaccumulate Megafunction Input Ports Port Name Required Description Comments data Yes Data input to the accumulator Inputport WIDTH IN 1 0 wide clock Yes Clock input to the accumulator cin No Carry in to the low order bit for If omitted the default is 0 for add add operations Borrow in to the operations and 1 for subtract low order bit for subtract operations operations clken No Clock enable for the clock port sload No Synchronous load input Loads Default 0 disabled If the the accumulator with the value of sload port is used the the data port on the next data port must be active clock edge connected aclr No Asynchronous clear input add sub No Controls the operation of the If the signal is high the accumulator accumulator performs an add function If the signal is low the accumulator performs
15. en the Finish button is pressed the MegaWizard Plug In Manager will create the checked files in the Following list You may choose to include or exclude a File LATENC Y by checking or unchecking its corresponding checkbox respectively The state of UNSIGNED checkboxes will be remembered for the next MegaWizard Plug In Manager result 17 0 session The MegaWizard Plug In Manager will create these files in the directory C Documents and SettinactchlaveantMecbkan WerlFilact Draiacte Manshiinctione albare imi d aka Daci 4f accum v Variation file DO accum inc AHDL Include file O accum cmp VHDL Component declaration file 4f accum bsf Quartus symbol file O accum inst v Instantiation template file EH accum bb v Verilog Black Box declaration file 18 lut 38 reg 19 Verify that the Quartus Symbol File bsf is checked Figure 2 9 20 Click Finish The altaccumulate megafunction is built 21 Click OK Completing the Design File 1 Move the mouse to place the accum symbol in between the input and output ports of the mult accum bdf file 2 Click the left mouse button to place the accumulator symbol 3 Connectthe output of the multiplier block result port to the data port of the accumulator and similarly connect the clock and signals as shown in Figure 2 5 4 From the File menu select Save You have now completed the design file Figure 2 5 2 12 Altera Corporation altaccumulate Meg
16. erformed using the post place and route netlist When performing a timing simulation you add only signals that exist after place and route These signals are found with the Post Compilation filter of the Node Finder During synthesis and place and route process the names of your RTL signals will change Therefore it might be difficult to find signals from your megafunction instantiation in the Post Compilation filter However if you want to preserve the names of your signals during the synthesis and place and route stages you must use the synthesis attributes keep or preserve These are Verilog and VHDL synthesis attributes that direct Analysis amp Synthesis to keep a particular wire register or node intact More information on these attributes is available in the Integrated Synthesis chapter in volume 1 of the Quartus II Handbook EDA Simulation Depending on the third party simulation tool you are using refer to the appropriate chapter in the Simulation section in volume 3 of the Quartus II Handbook The Quartus II Handbook chapters show you how to perform functional and gate level timing simulations that include the megafunctions with details about the files that are needed and the directories where those files are located TheSignalTap II embedded logic analyzer provides you with a non intrusive method of debugging all of the Altera megafunctions within your design With the SignalTap II embedded logic analyzer you can capture
17. extensions and software utility names are shown in bold type Examples fmax qdesigns directory d drive chiptrip gdf file Documenttitles are shown in italic type with initial capital letters Example AN 75 High Speed Board Design Internal timing parameters and variables are shown in italic type Examples tpa n 1 Variable names are enclosed in angle brackets gt and shown in italic type Example file name project name gt pof file Initial Capital Letters Keyboard keys and menu names are shown with initial capital letters Examples Delete key the Options menu Subheading Title References to sections within a document and titles of on line help topics are shown in quotation marks Example Typographic Conventions Courier type Signal and port names are shown in lowercase Courier type Examples data1 tdi input Active low signals are denoted by suffix n e g resetn Anything that must be typed exactly as it appears is shown in Courier type For example c qdesigns tutorial chiptrip gdf Also sections of an actual file such as a Report File references to parts of files e g the AHDL keyword SUBDESIGN as well as logic function names e g TRI are shown in Courier 1 2 3 and Numbered steps are used in a list of items when the sequence of the items is a b C etc important such as the steps listed in a procedure Me Bullets are used
18. go to the Altera world wide web site at www altera com For technical support on this product go to www altera com mysupport For additional information about Altera products consult the sources shown below Information Type USA amp Canada All Other Locations Technical support www altera com mysupport altera com mysupport 800 800 EPLD 3753 1 408 544 8767 1 7 00 a m to 5 00 p m Pacific Time 7 00 a m to 5 00 p m GMT 8 00 Pacific Time Product literature www altera com 1 www altera com 1 Altera literature services literature altera com literature altera com Non technical customer 800 767 3753 1 408 544 7000 service 7 00 a m to 5 00 p m GMT 8 00 Pacific Time FTP site ftp altera com ftp altera com Note to table 1 You can also contact your local Altera sales office or sales representative Altera Corporation March 2007 v altaccumulate Megafunction User Guide Typographic Conventions Typographic Conventions This document uses the typographic conventions shown below Visual Cue Bold Type with Initial Capital Letters Meaning Command names dialog box titles checkbox options and dialog box options are shown in bold initial capital letters Example Save As dialog box bold type Italic Type with Initial Capital Letters Italic type External timing parameters directory names project names disk drive names filenames filename
19. ical representation of the data input Values are UNSIGNED and SIGNED When this parameter is set to UNSIGNED the accumulator interprets the data input as an unsigned two s complement When this parameter is set to SIGNED the accumulator interprets the data as a signed two s complement This parameter should not be used if the sign data port is specified If omitted the default is UNSIGNED EXTRA_LATENCY Integer No Specifies the number of clock cycles of latency USE_WYS String No Specifies whether to construct an optimized accumulator with the data from the result port that cannot be merged with any other logic Values are ON and OFF If omitted the default is ON Altera Corporation March 2007 3 3 altaccumulate Megafunction User Guide Ports amp Parameters 3 4 Altera Corporation altaccumulate Megafunction User Guide March 2007
20. its 8 ALUTs Stratix Stratix GX Speed 8 bits 8LEs HardCopy Stratix Balanced 8 bits 8LEs Cyclone III Cyclone ll Cyclone Area 8 bits 8LEs altaccumulate Megafunction User Guide Altera Corporation March 2007 N DTE RYA 2 Getting Started System amp Software Requirements MegaWizard Plug In Manager Customization qmegawiz Using the MegaWizard Plug In Manager Altera Corporation March 2007 The instructions in this section require the following hardware and software W A PC running either Windows NT 2000 XP Red Hat Linux 7 3 or 8 0 Red Hat Linux Enterprise 3 or an HP workstation running the HP UX version 11 0 operating system or a Sun workstation running the Solaris 8 or 9 operating system B Quartus II software version 6 0 You can use the MegaWizard Plug In Manager to set the altaccumulate megafunction ports and parameters for each accumulator in the design Search for altaccumulate in the Quartus II Help for a listing of the parameters to use when instantiating the megafunction if you are not using the MegaWizard Plug In Manager Start the MegaWizard Plug In Manager in one of the following ways m On the Tools menu click the MegaWizard Plug In Manager command m When working in the Block Editor from the Edit menu click Insert Symbol as Block or Right click in the Block Editor point to Insert and click Symbol as Block Then in the Symbol dialog box c
21. lick MegaWizard Plug In Manager mM Start the stand alone version of the MegaWizard Plug In Manager by typing the following command on a command prompt This section provides an in depth description of each page in the altaccumulate megafunction Tables 2 1 and 2 2 show the features or settings for the altaccumulate megafunction You can use these tables to determine appropriate settings for your accumulator designs 2 1 altaccumulate Megafunction User Guide Using the MegaWizard Plug In Manager Use Page 3 of the altaccumulate MegaWizard Plug In Manager to select the data representation and specify the input data widths refer to Figure 2 1 Figure 2 1 MegaWizard Plug In Manager allaccumulate Page 3 of 5 NegaWizard Plug In Manager altaccumulate page 3 of 6 ALTACCUMULATE Version 6 0 about Documentation Parameter Z Simulation 5 Summary 5 Library Page mult accum imp v How wide should the data input bus be I8 v bits SIGNED How wide should the result output bus be 8 bits resutt 7 0 r Data Representation Signed 2 Unsigned Create sign data input port to do both 1 signed 0 unsigned 8 lut 3 reg Cancel lt Back Next gt Finish Table 2 1 shows the options available on Page 3 of the altaccumulate wizard Table 2 1 altaccumulate Wizard Page 3 Parameter Description How wide should the result output bus be Select the wid
22. mulate megafunction implements a basic accumulator and offers additional features including W Parameterizable input and output data widths W Parameterizable output types signed unsigned or the ability to create a sign data input port to select dynamically between the two representations W Support for both signed and unsigned data representation formats W Support for pipelining with parameterized output latency m Active high asynchronous clear and clock enable control inputs Common Applications Accumulator applications include parity and magnitude detection state machines basic control logic and other applications that involve determining data relationships For details about using an accumulator in parity detection applications refer to Using Parity to Detect Memory Errors in Stratix Devices White Paper The altaccumulate megafunction is implemented in adaptive look up tables ALUTs in Stratix II devices and in logic elements LES in Stratix Stratix GX HardCopy Stratix Cyclone II and Cyclone devices 1 3 altaccumulate Megafunction User Guide Resource Utilization amp Performance 1 4 Table 1 1 summarizes the amount of resources required when using the altaccumulate function to implement an 8 bit unsigned accumulator Table 1 1 altaccumulate Megafunction Resource Usage Device Optimization Width Logic Usage Speed 8 bits 8 ALUTs Stratix II Stratix III Balanced 8 bits 8 ALUTs Area 8 b
23. n User Guide Design Example 8 Bit Multiplier Accumulator Figure 2 10 Simulator Settings Settings mult accum Category General Simulator Settings Files User Libraries Current Project Select simulation options Device Timing Analysis Settings ye Fea EDA Tool Settings Simulation made Functional Compilation Process Settings Simulation input sign exampleNQuartusllNaltaccum ulatetmult accumNmult accum vwf n Analysis amp Synthesis Settings Fitter Settings Simulation period Hi Assembler Run simulation until all vector stimuli are used Design Assistant SignalT ap II Logic Analyzer C End simulation at zj Logic Analyzer Interface SignalProbe Settings IV Automatically add pins to simulation output waveforms 1 Simulator Settings Simulation Power Check outputs Waveform Comparison Settings PowerPlay Power Analyzer Settings r Se me viol t or ju IV Simulation coverage reporting Report Settings IT Overwrite simulation input file with simulation results r snd hold de More Settings Description Specifies the source of input vectors to be used for simulation Cancel 6 Click Open and then click OK 7 From the Processing menu select Start Simulation or press Ctrl I or click on the Simulation button to run a simulation 8 When the simulation completes a Simulator was successful message box appears Click OK 9 Inthe Simulation
24. nferring Megafunctions from HDL Code Instantiating Megafunctions in HDL Code Identifying a Megafunction after Compilation Simulation Altera Corporation March 2007 Synthesis tools including Quartus II integrated synthesis recognize certain types of HDL code and automatically infer the appropriate megafunction when a megafunction will provide optimal results That is the Quartus II software uses the Altera megafunction code when compiling your design even though you did not specifically instantiate the megafunction The Quartus II software infers megafunctions because they are optimized for Altera devices so the area use and or performance may be better than generic HDL code Additionally you must use megafunctions to access certain Altera architecture specific features for example memory DSP blocks and shift registers that improve performance compared with basic LEs Refer to the Recommended HDL Coding Styles chapter in volume 1 of the Quartus II Handbook for information about your particular megafunction When you use the MegaWizard Plug In Manager to set up and parameterize a megafunction it creates either a VHDL or Verilog HDL wrapper file that instantiates the megafunction a black box methodology For some megafunctions you can generate a fully synthesizable netlist for improved results with EDA synthesis tools such as Synplify a clear box methodology Both clear box and black box methodologies are described in
25. sses enne rese nnne nnne te nennt rnnt nn rennen enne Implement the 8 Bit Multiplier Accumulator seen Simulate the 8 Bit Multiplier Accumulator Design in Quartus II Simulate the 8 Bit Multiplier Accumulator Design in ModelSim Altera ves DITE TU LL E N E dona Pe ca nase Chapter 3 Specifications Ports Ec Parameteis uui tete rete ste apod R riui dust tie ec Mesum e td beer le rre ed AES 3 1 Altera Corporation iii altaccumulate Megafunction User Guide Contents altaccumulate Megafunction User Guide iv Altera Corporation altaccumulate Megafunction User Guide About This User Guide Revision History The table below displays the revision history for the chapters in this User Guide Date Version March 2007 2 3 Changes Made Minor update to add Cyclone III device information no new screenshots were added December 2006 2 2 Minor update to add Stratix IIl device information no new screenshots were added May 2006 2 1 Minor update April 2006 2 0 Updated for Quartus 6 0 including e Steps and screenshots updated for Quartus II 6 0 version software e New section on ModelSim simulation January 2006 1 1 Updated for Quartus 5 1 including e Steps and screenshots updated for Quartus II 5 1 version software e Removed Timing Wizard September 2004 1 0 Initial release How to Contact Altera For the most up to date information about Altera products
26. th of the output bus Data Representation Choose whether you want the accumulation performed to be represented as signed or unsigned or create a sign_data input port to dynamically select between the two representations ls Starting on Page 3 of the altaccumulate wizard you can generate a sample simulation waveform and launch the Quartus II software Help for the altaccumulate megafunction by selecting Generate Sample Waveforms or Quartus II Megafunction Reference from the Documentation button see Figure 2 2 Selecting On the Web brings up this user guide 2 2 Altera Corporation altaccumulate Megafunction User Guide March 2007 Getting Started Figure 2 2 Documentation Button in the altaccumulate Wizard MegaWizard Plug In Manager altaccumulate page 3 of 5 4 ALTACCUMULATE Version 6 0 How wide should the data input bus be How wide should the result output bus be Data Representation Signed Unsigned Create sign data input port to do both 1 signed 0 unsigned Cancel x Back The sample waveform as shown in Figure 2 3 indicates the behavior of the altaccumulate megafunction for the chosen set of parameters in the altaccumulate design module This option generates a sample waveform in HTML format in the specified design directory The HTML file contains descriptions showing the accumulator operation Figure 2 3 Sample Waveforms
27. the Quartus II Handbook During compilation with the Quartus II software analysis and elaboration is performed to build the structure of your design You can locate your megafunction in the Project Navigator window by expanding the compilation hierarchy and locating the megafunction by its name Similarly to search for node names within the megafunction using the Node Finder click Browse in the Look in box and select the megafunction in the Hierarchy box The Quartus II Simulation tool provides an integrated solution for performing simulations The following sections describe the simulation options Quartus II Simulation With the Quartus II Simulator you can perform functional and timing simulation A functional simulation in Quartus II enables you to verify the logical operation of your design without taking into consideration the timing delay in the FPGA This simulation is performed using only your RTL code When performing a functional simulation you add only 2 5 altaccumulate Megafunction User Guide SignalTap II Embedded Logic Analyzer SignalTap II Embedded Logic Analyzer 2 6 signals that exist before synthesis You can find these signals with the Registers pre synthesis Design Entry or the pin filters in the Node Finder The top level ports are found using these filters Timing simulation in the Quartus II software verifies the operation of your design with annotated timing information This simulation is p
28. tion User Guide March 2007 N D TE YAN Contents About This User Guide spo How to Contact Altera Typographic Conventions etienne reiten ri rete be tid ee DH RE ede e tiaara Ee a vi Chapter 1 About This Megafunction Device Family Support nte ect e e ed rnit rente rai tite rt aTi Eiaeai suenak 1 1 INTE OC UCtlOD i iier ne E TELE CENE ERE EE EUR Da RT dee ER EVE CE UHR ER RE ENSE RANN ree RENSAR FHeatufeSu icones ERR Ue rei ede GRES PGA ERIS HS E A SENARE ee E ER Re General Description Common Applications reete tete retten rete bet te tti te Ex re Er nd dese RASER 1 3 Resource Utilization amp Performance 1 sese rne rnnt nnne 1 3 Chapter 2 Getting Started System amp Software RequirementS eeieimizststt menester nit is 2 1 MegaWizard Plug In Manager Customization s seesssssesessensrrssrnnsrnsernsrrnsrrnnrnnn rens nnnsrnn enn nn nn 2 1 Using the MegaWizard Plug In Manager Inferring Megafunctions from HDL Code 7 seen eene Instantiating Megafunctions in HDL Code 2 cese eene eee Identifying a Megafunction after Compilation Simulation Quartus II Simulation EDA Siri A th OM sca oS can vides danas cacucea TUE PETERE SignalTap II Embedded Logic Analyzer treten tinte ttt ttti Design Example 8 Bit Multiplier Accumulator Design Piles 2 eee aeterne Example iiie Generate an 8 Bit Accumulator e
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