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1. Clamshell 6 U2 o000000000000000 17 J2 32 UC Connector J5 External power connection Remove R8 and jumper R9 Figure B 14 MSP TS430PM64 Target Socket module PCB Pictorials If external supply voltage remove and add RS Ohm JTAG RST NMI TCK not assembled IMS TDI XT2IN IDO XT20UT i 92 122 gt R2 18uF amp 3U 0R C6 10uF 6 3U ES not ass d not assembled LFXTCLK DIN 3 16 7 LENS 5888 Open J if LCD is connected QF P8 PN Socket Yamaichi 1C201 0804 014 53 53 52 52 119 assembled If BSL is used 51 51 86751 49 ae 45 55 5 32 3 4 If external supply voltage remove R11 and add R10 0 Ohm MSP43 Target Socket MSP TS43 PN82 for F43x TITLE MSP TS43 PN8 Document Number Date 10 04 2003 10 46 28 Sheet 1 1 Figure B 15 MSP TS430PN80 Target Socket module Schematic B 16
2. 14 19 0000000 TE 0000 600000902 9 92 01 JTAG ee BOOTST LED connected to pin 12 y cem 7 ERU e 5 00000000000000009090 6 Connector J5 Se 6 39 gamta 41 9 External power connection 9 5 ON 7 Jumper J6 Remove R8 and jumper R9 Open to disconnect LED 3 0000000 o 0000000 82 E o ae 9 6 ul o 0 2075 19 352 999 o o 999 Q 90 oj 999 990 n n ols 909 c 0 2 Orient Pin 1 of MSP430 device 718 A e cid nooo 39 722 9 05 LEXIL o Roca NEN 15 20 00 oocoooooocoooooooooooo0 2 Figure B 16 MSP TS430PN80 Target Socket module PCB Pictorials 1f external supply voltage remove RB and add R9 Ohm JTAG BSI NMI CK MS not assembled FE25 1A4 JP1Q l1QguF 6 3U not assembled U1 1f BSL is used external supply voltage QFP1 0097 remove R11 and add 18 8 Ohm 511847 653 E reserved foi further enhancement ot assembled LFXTCLK
3. 15 Compiler optimization can remove unused variables and or statements that have no effect and can effect debugging Optimization NONE is supported within PROJECT gt OPTIONS gt COMPILER gt CODE gt OPTIMIZATIONS Alternatively variables can be declared volatile 16 The IAR Tutorial assumes a Full or Baseline version of the Workbench Within a Kickstart system it is not possible to configure the C compiler to output assembler mnemonics 17 Existing projects from an IAR 1 x system can be used within the new IAR 2 x 3 x system refer to the IAR document Migration guide for EW430 x x This document can be located in Installation Root Embedded Workbench x x 430 doc migration htm 18 Assembler projects must reference the code segment RSEG CODE in order to use the PROCESSING gt FILL UNUSED CODE MEMORY mechanism No special steps are required to use LINKER gt PROCESSING FILL UNUSED CODE MEMORY with C projects 19 Ensure that the proper C runtime library is selected for C only and mixed C Assembly language projects PROJECT GENERAL OPTIONS gt LIBRARY CONFIGURATION gt LIBRARY For assembly only projects the runtime library must not get linked in otherwise the build will fail and a linker error will be output e g that the RESET vector is allocated twice 20 Numerous C and C runtime libraries are provided with the Workbench cl430d C 64 bit doubles c
4. C 2 1 3 EMULATOR RESYNCHRONIZE C 2 1 4 EMULATOR INIT NEW C 2 1 5 EMULATOR C 3 C 1 6 EMULATOR SHOW USED C 3 1 7 EMULATOR ADVANCED gt CLOCK 5 C 3 C 1 8 EMULATOR ADVANCED gt EMULATION C 3 C 1 9 EMULATOR gt ADVANCED gt MEMORY C 3 1 10 EMULATOR gt ADVANCED gt BREAKPOINT COMBINER C 3 1 11 EMULATOR STATE STORAGE CONTROL C 3 1 12 EMULATOR STATE STORAGE C 4 1 13 EMULATOR gt SEQUENCER CONTROL sese C 4 1 14 EMULATOR gt POWER ON 4 1 15 EMULATOR gt C 4 1 16 EMULATOR LEAVE TARGET C 4 1 17 EMULATOR FORCE SINGLE 2 C 4 1 18 EMULATOR SET C 4 80 MSP430F44x and MSP430F43x Device Emulation D 1 MSP FET430UIF Installation Guide 11 E 1 E 1 Hardware
5. SR SP 85 etc Variables watched within the Watch Window are only updated when C SPY gets control of the device say following a breakpoint hit a single step or a STOP escape Although registers can be monitored in the Watch Window VIEW gt REGISTER is a superior method 2 11 Chapter 3 Design Considerations for In Circuit Programming This chapter presents signal requirements for in circuit programming of the MSP430 Topic Page 3 1 Signal Connections for In System Programming and Debugging 3 2 MSP FET430PIF MSP FET430UIF GANG430 PRGS430 3 2 External Power 3 4 3 3 Bootstrap Loader 3 5 3 1 3 1 Signal Connections for In System Programming and Debugging MSP 3 2 FET430PIF MSP FET430UIF GANG430 PRGS430 With the proper connections you can use the C SPY debugger and an FET hardware JTAG interface such as the MSP FET430PIF and MSP FET430UIF to program and debug code on your own target board In addition the connections will also support the GANG430 or PRGS430 production programmers thus providing an easy way to program prototype boards if desired Figure 3 1 shows the connections between the 14 pin FET Interface module connector and the target device required to support in system programming and debugging using C SPY for 4 wire JTAG communication Figure 3 2 shows the connections for 2 wire JTAG mode Spy Bi Wire While 4 wire JTAG mode is generally supported on all MSP430
6. ivelit eo e ec INR DES 1 1 1 1 Kit Contents 430 110 1 2 1 2 Kit Contents 4 1 2 1 3 Kit Contents MSP FET430Pxx0 15120 P140 P410 P430 440 1 2 1 4 Kit Contents 4 1 3 1 5 Kit Contents MSP FET430Uxx U14 1028 1038 040 048 U64 U80 ME 1 4 1 6 Sottware at epe deb 1 5 1 7 Hardware Installation 430 110 1 6 1 8 Hardware Installation MSP FET430PIF 1 6 1 9 Hardware Installation 2 1 6 1 10 Hardware Installation MSP FET430Uxx 014 U28 038 U40 1048 064 4080 10100 MSP FET430Pxx0 45120 P140 P410 P430 1440 1 7 Te Ail LED 2 54 1 7 1 12 Important MSP430 Documents on the CD ROM and WEB 1 8 Development Chen a Yid 2 1 2v aestas ta D od odeur Doce s ap slot Tte al 2 2 27 iid CL 2 2 221 Project Settings ce dee 2 3 2 2 2 Creating a Project from 2 5 2 2 3 Using an Ex
7. Socket Yamaichi 1 201 1004 008 Open 26 if LCD a is connected 25 163 MSP43 Target Socket 5 5430 2100 for F43x and F44x TITLE MSP TS430P2100 25 182 Document Number Date 25 10 2001 12 09 44 Sheet 1 1 Connections between the JTAG header and pins XOUT and XIN are no longer required Figure 17 MSP TS430PZ100 Target Socket module Schematic and should not be made Note B 18 Jumper J6 Jumper J7 Open to disconnect LED Open to measure current 14 10 999 9991 6 eoo0e O 00000002 000002 LED connected pin 12 1 7TT86 n B OTST 5 lt Open 76 if LCD connected Connector J5 6000000000000000000000000 External power connection 00 9275 E OR So Remove 1 8 and jumper R9 nus o o 55 o eo 4 bn 2185 0 19 00000000 o 2 91 o BH 9 2 9 9 9 9 99 69 2 9 o 996 960 o 55 960 J2 o9 9 8 o 9 9 898 o b 00000000 Orient Pin 1 of MSP430 device 9 000000000 E nooo n o R12 i le H LEX o C2 o cms S Sn a pout 5 iQ Jt 15
8. D 2 Xi xii Chapter 1 Get Started Now This chapter will enable you to inventory your FET and then it will instruct you to install the software and hardware and then run the demonstration programs Topic Page 1 1 Kit Contents MSP FET430X110 1 2 1 2 Kit Contents MSP FET430PIF 1 2 1 3 Kit Contents MSP FET430Pxx0 42120 P140 P410 P430 1 2 440 1 4 Kit Contents MSP FET430UIF 1 3 1 5 Kit Contents MSP FET430Uxx 4 14 1028 038 U40 U48 U64 1 4 U80 0100 1 6 Software Installation 1 5 1 7 Hardware Installation MSP FET430X110 1 6 1 8 Hardware Installation MSP FET430PIF 1 6 1 9 Hardware Installation MSP FET430UIF 1 6 1 10 Hardware Installation MSP FET430Uxx 4 14 4028 038 4 40 1 7 U48 064 080 4 100 MSP FET430Pxx0 120 P140 P410 12430 P440 1 11 Flash ing the LED 1 7 1 12 Important MSP430 Documents on the CD ROM and WEB 1 8 1 1 1 1 Kit Contents MSP FET430X110 One READ ME FIRST document One MSP430 CD ROM One MSP FET430X110 Flash Emulation Tool This is the on which is mounted a 20 pin ZIF socket for the MSP430F11xIDW MSP430F11x1AIDW MSP430F11x2IDW device 25 conductor cable originates from the FET for connecting to the PC parallel port One small box containing two MSP430F1121AIDW device samples 1 2 Kit Contents MSP FET430PIF One READ ME FIRST document One MSP430 CD ROM One MSP FET430PIF interface module
9. E 2 Figures Figure 3 1 Signal Connections for 4 Wire JTAG Communication 3 3 Figure 3 2 Signal Connections for 2 Wire JTAG Communication Spy Bi Wire 3 4 Figure B 1 MSP FET430X110 Schematic eere B 2 Figure B 2 MSP FET430X110 Pictorials 2 2 70 B 3 Figure B 3 MSP TS430PW14 Target Socket module Schematic 4 Figure 4 5430 14 Target Socket module Pictorials B 5 Figure 5 MSP TS430DW28 Target Socket module Schematic B 6 Figure B 6 MSP TS430DW28 Target Socket module PCB Pictorials B 7 Figure B 7 MSP TS430DA38 Target Socket module Schematic B 8 Figure B 8 MSP TS430DA38 Target Socket module PCB Pictorials B 9 Figure 9 MSP TS430QFN40 Target Socket module Schematic B 10 Figure B 10 MSP TS430QFN40 Target Socket module Pictorials B 11 Figure B 11 MSP TS430DL48 Target Socket module Schematic B 12 Figure B 12 MSP TS430DL48 Target Socket module PCB B 13 Figure B 13 MSP TS430PM64 Target Socket module Schematic B 14 Figure B 14 MSP TS430PM64 Target Socket module PCB Pictorials
10. Figure 2 MSP FET430X110 Pictorials B 3 RST NMI SBHTCK IMS 101 TDO SBHTDIO TEST SBWTCK JTAG gt R2 338R TEST SBWTCK R5 47K BST SBHTDIO SBW gt 77 to measure supply current J6 ca 104 10 DNP ER UCC430 P1 6 TDI 1 5 5 Pl 4 TCK J9 Jil JTAG Mode selection J12 4 uire JTAG Set jumpers J7 to J12 to position 2 3 2 uire GND SpuyBi Hi r e 1 9 XIN Pl Pi 2 XOUT IEST SBHTCK 1 3 RST SBHTDIO P1 4 TCK 1 2 100 5 TMS P1 6 TDI T 10177 DNP d GND Socket ENPLAS Type OTS 14 65 Set jumpers J7 to J12 to position 2 1 MSP TS43 PWI1 4 Target Socket Board TITLES MSP TS430PW1 4 Document Number Date 5 08 2006 10 03 54a Sheet 1 1 lic Schema TS430PW14 Target Socket module MSP 3 Figure B 4 LED connected to P1 0 Jumper J4 Open to disconnect LED Orient Pin 1 of MSP430 device Connector J3 External power connector Jumper J5 to ext Jumpers J7 J12 Close 1 2 to debug in SpyBiWire Mode or close 2 3 to debug in 4175 JTAG mode Jumper J6 Open to measure current Figure B 4 MSP TS430PW14 Target Socket module PCB Pictorials B 5 If external supply voltage remove R8 and add R9
11. 3 4 5 6 7 8 9 Specify the target device GENERAL OPTIONS gt TARGET gt DEVICE Enable an assembler project or a C assembler project GENERAL OPTIONS gt TARGET gt ASSEMBLER ONLY PROJECT Enable the generation of an executable output file GENERAL OPTIONS gt OUTPUT gt OUTPUT FILE gt EXECUTABLE Accept the factory settings for the compiler C C COMPILER gt FACTORY SETTINGS Accept the factory settings for the assembler ASSEMBLER gt FACTORY SETTINGS Accept the factory settings for the linker LINKER gt FACTORY SETTINGS Accept the factory settings for C SPY DEBUGGER gt FACTORY SETTINGS To debug on the hardware select DEBUGGER gt SETUP gt DRIVER gt FET DEBUGGER Specify the active parallel port used to interface to the FET if not LPT1 FET DEBUGGER gt SETUP gt CONNECTION gt or specify the USB port FET DEBUGGER gt SETUP gt CONNECTION gt TI USB FET Note Avoid the use of absolute pathnames when referencing files Instead use the relative pathname keywords TOOLKIT DIR and PROJ DIR Refer to the IAR documentation for a description of these keywords The use of relative pathnames will permit projects to be moved easily and projects will not require modification when IAR Systems are upgraded say from Kickstart or Baseline to Full 2 2 2 Creating a Project from Scratch The following section presen
12. B 15 Figure B 15 MSP TS430PN80 Target Socket module Schematic B 16 Figure B 16 MSP TS430PN80 Target Socket module PCB Pictorials B 17 Figure B 17 MSP TS430PZ100 Target Socket module Schematic B 18 Figure B 18 MSP TS430PZ100 Target Socket module Pictorials B 19 Figure B 19 MSP FET430PIF FET Interface module Schematic B 20 Figure B 20 MSP FET430PIF FET Interface module PCB Pictorials B 21 Figure 21 MSP FET430UIF USB Interface Schematic B 22 Figure B 22 MSP FET430UIF USB Interface PCB Pictorial B 26 Figure E 1 WinXP Hardware Recognition E 2 Figure E 2 WinXP Hardware Wizard nnn nnn E 2 Figure E 3 WinXP Driver Location Selection Folder eee E 3 Figure E 4 WinXP Driver nnn E 4 Figure E 5 Device Manager rad na me cu aan Ebo ipu iaa RED aps E 5 Tables Table 2 1 Number of device breakpoints and other emulation features 2 9 Table 0 1 80 Signal
13. Figure B 8 MSP TS430DA38 Target Socket module PCB Pictorials B 9 10uF 10 M GND m 100nF 2 1 zl DNP ci DNP aT XOUTIP2 7 12pF DNP R1 3308 P10 01 ki ZH XIN P2 6 XOUT P2 7 P1 0 P1 1 1 2 P1 3 P1 4 P1 5 P1 6 PRR P2 0 2 4 2 2 2 3 P2 4 2 5 P3 0 P3 1 P3 2 U1 D AVSS RST NMI TCK TMS TDI TDO P4 7 P4 6 P4 5 P4 4 P4 3 P4 2 P4 1 P4 0 P37 P3 6 P3 5 P3 4 P3 3 Socket Enplas QFN 40B BOOTST 0 5 01 MSP TS430QFN40 Target Socket Board for MSP430F23x0IRHA TITLE MSP TS436QF N48 Document Number Date 9 26 2006 03 57 If external supply voltage remove R11 and add R10 0 Ohm Sheet 1 1 Figure B 9 MSP TS430QFN40 Target Socket module Schematic B 10 Jumper JP2 Open to measure current Jumper JP3 Open to disconnect LED LED connected to P1 0 14 4110 22522441 090960690 00000002 06060002 Connector J5 BOOTSTg gas External power R2 connector 56950500000 10 Jumper JP1 to ext 40 35 31 GND J5 30 9 70000000000 10000000000 2 mci ut J2 0000000000 el 11 15 20 5 INSTRUMENTS
14. TEXAS INSTRUMENTS MSP FET430 FLASH Emulation Tool FET For use with IAR Workbench Version 3 x Users Guide October 2006 SLAU138 Mixed Signal Products IMPORTANT NOTICE Texas Instruments and its subsidiaries reserve the right to make changes to their products or to discontinue any product or service without notice and advise customers to obtain the latest version of relevant information to verify before placing orders that information being relied is current and complete All products are sold subject to the terms and conditions of sale supplied at the time of order acknowledgment including those pertaining to warranty patent infringement and limitation of liability TI warrants performance of its products to the specifications applicable at the time of sale in accordance with 1115 standard warranty Testing and other quality control techniques are utilized to the extent deems necessary to support this warranty Specific testing of all parameters of each device is not necessarily performed except those mandated by government requirements Customers are responsible for their applications using Tl components In order to minimize risks associated with the customer s applications adequate design and operating safeguards must be provided by the customer to minimize inherent or procedural hazards TI assumes no liability for applications assistance or customer product design TI does not warrant or represent that
15. 0 Ohm TST VPP R1 C1 C2 not assembled Socket Yamaichi 189 0282 042 SOCK28DW TDI 27 TMS gt P1 3 P12 23 RST NMI SMD Footprint F123 P35 16 P34 15 not assembled external supply voltage remove R11 and add R10 0 Ohm MSP TS430DW28 Target Socket DW28 TITLE MSP TS430DW28 Document Number Date 4 23 2003 11 01 30a 1 1 Connections between the JTAG header and pins and XIN no longer required and should not be made Note 110 Schema TS430DW28 Target Socket module MSP 5 Figure B 6 Jumper J4 Open to disconnect LED O Connector J3 V EEG External power connector od 2 Remove R8 and jumper R9 RS Orient Pin 1 of MSP430 device A S M a 5 S b 00000000000000 O LED connected to P1 0 Jumper J5 Open to measure current O z0000000 000000 700000 900000 Figure B 6 MSP TS430DW28 Target Socket module PCB Pictorials B 7 1806 18 JTAG Mode selection 4 uire JTA 2 vire G Set jumpers JP4 to JPS to position 2 3 Set jumpers JP4 to JPS to position 2 1 R3 5608 1
16. One 25 conductor cable One 14 conductor cable 1 3 Kit Contents MSP FET430Pxx0 120 42140 P410 P430 440 One READ ME FIRST document One MSP430 CD ROM One MSP FET430PIF FET Interface module This is the unit that has a 25 pin male D Sub connector on one end of the case and a 2x7 pin male connector on the other end of the case MSP FET430P120 One MSP TS430DW28 Target Socket module This is the PCB on which is mounted a 28 pin ZIF socket for the MSP430F12xIDW or MSP43012x2IDW device A 2x7 pin male connector is also present on the PCB MSP FET430P140 One MSP TS430PM64 Target Socket module This is the PCB on which is mounted a 64 pin clam shell style socket for the MSP430F13xIPM MSP430F14xIPM MSP430F15xIPM MSP430F16xIPM or MSP430F161xIPM device A 2x7 pin male connector is also present on the PCB MSP FET430P410 One MSP TS430PM64 Target Socket module This is the PCB on which is mounted a 64 pin clam shell style socket for the MSP430F41xIPM device A 2x7 pin male connector is also present on the PCB MSP FET430P430 One MSP TS430PN80 Target Socket module This is the PCB on which is mounted an 80 pin ZIF socket for the MSP430F43xIPN device A 2x7 pin male connector is also present on the PCB MSP FET430P440 One MSP TS430PZ100 Target Socket module This is the PCB on which is mounted a 100 pin ZIF socket for the MSP430F43xIPZ MSP430F44xIPZ device A 2x7 pin male connector is also present on the
17. PROGRAMS IAR SYSTEMS gt IAR EMBEDDED WORKBENCH KICKSTART FOR MSP430 V3 Tool User s Guide Most Up To Date Information Workbench C SPY EW430_UsersGuide pdf readme htm ew430 htm cs430 htm cs430f htm Assembler EW430_AssemblerReference paf a430 htm a430_msg htm Compiler EW430_CompilerReference pdf icc430 htm icc430_msg htm C library CLibrary htm Linker and Librarian xlink pdf xlink htm xman htm xar htm 2 2 Using Kickstart 2 2 The Kickstart development environment is function limited The following restrictions are in place The C compiler will not generate an assembly code list file The linker will link a maximum of 4K bytes of code originating from C source but an unlimited amount of code originating from assembler source The simulator will input a maximum of 4K bytes of code A Full i e unrestricted version of the software tools can be purchased from IAR A mid featured tool set called Baseline with a 12K byte C code size limitation and basic floating point operations is also available from IAR Consult the IAR web site www iar se for more information 2 2 1 Project Settings The settings required to configure the Workbench and C SPY are numerous and detailed Please read and thoroughly understand the documentation supplied by IAR when dealing with project settings Please review the project settings of the supplied assembler and C
18. gt PROGRAMS gt IAR SYSTEMS gt IAR EMBEDDED WORKBENCH KICKSTART FOR MSP430 V3 gt EMBEDDED WORKBENCH Use FILE gt OPEN WORKSPACE to open the file at lt Installation Root gt Embedded Workbench x x 430 FET_examples fet_projects eww The workspace window will open Click on the tab at the bottom of the workspace window that corresponds to your tool FETxxx and desired language assembler or C Use PROJECT gt OPTIONS gt FET Debugger gt Setup gt Connection to select the appropriate port LPTx for the parallel FET Interface or TI USB FET for the USB Interface or for the eZ430 Use PROJECT gt REBUILD ALL to build and link the source code You can view the source code by double clicking on the project and then double clicking on the displayed source file Use PROJECT gt DEBUG to start the C SPY debugger C SPY will erase the device Flash and then download the application object file to the device Flash Refer to FAQ Debugging 1 if C SPY is unable to communicate with the device Use DEBUG gt GO to start the application The LED should flash Use DEBUG gt STOP DEBUGGING to stop debugging to exit C SPY and to return to the Workbench Use FILE gt EXIT to exit the Workbench Congratulations you ve just built and tested your first MSP430 application 1 12 Important MSP430 Documents on the CD ROM and WEB The primary sources of MSP430 information are the device specific data sheet
19. 13 Revi 4upd Sheet 2 4 B 23 VF 3 6V 1 8V 5V OUT1 IN2 902 EN FB PG TPS76601D GND GND ND 100u16V 39k2 0 1 30k1 0 1 GND R16 R18 R48 R15 VCC 301 0 1 3041 01 9 2 0 19 ADC2 VCCR 30 01 R17 R19 RIY 22k110 196 22k110 1 22k110 1 22k110 1 3 6V INT OUT1 IN2 OUT2 GND RES EN FB RIN ROUT TPS77301DGK J1 BUCHSE2 OUT GND GND 1 C2 C1 J4 USBFET BUCHSE2 INVLD GND FO TITLE MSP FETU43 I1F _ 1 4upd Document Number Date 10 05 2005 09 38 37a Sheet 3 4 MAX3221IPW B 24 RST 3410 R13 33k VREGEN RESET WAKEUP SUSPEND GND 1K4148 CLKOUT TXD SIN RXDU SOT UCTS UDSR C In e R46_33R URTS 2 2 UDTR R24 33R OO SDA SCL P3 0 P3 1 P3 3 P3 4 GND 845 100 1 SHIELD SHIELD1 10041 USB RECEPTACLE Type B x1 x2 TUSB3410VF Joo o U12 SN75240PW USBFET 24LC128l SN TITLE Revi1 4upd Document Number Date 10 05 2005 09 38 37a Sheet 4 4 C33 100nF B 25 B 26 BEE 20 223 020 Gb 5967 e ocu EN AU H Kd Z aca TIN Figure B 22 MSP FET430UIF USB Interface PCB
20. 3 Using C SPY 2 8 2 3 4 Breakpoint Types 2 8 2 3 2 Using Breakpoints 2 9 2 3 3 Using Single Step 2 10 2 3 4 Using Watch Windows 2 11 2 4 Overview Applications are developed in assembler and or C using the Workbench and they are debugged using C SPY C SPY is seamlessly integrated into the Workbench However it is more convenient to make the distinction between the code development environment Workbench and the debugger C SPY C SPY can be configured to operate with the FET i e an actual MSP430 device or with a software simulator of the device Kickstart is used to refer to the Workbench and C SPY collectively The Kickstart software tools are a product of IAR Documentation for the MSP430 family and Kickstart is extensive CD ROM supplied with this tool contains a large amount of documentation describing the MSP430 The MSP430 home page www ti com msp430 is another source of MSP430 information The components of Kickstart workbench debugger assembler compiler linker are fully documented in Installation Root gt Embedded Workbench and Installation Root Embedded WorkbenchM S30 doc files located throughout the Kickstart directory tree contain the most up to date information and supplement the pdf files In addition Kickstart documentation is available on line via HELP Read Me Firsts from IAR and and this document be accessed using START gt
21. 9 VeREF 10 10 VREF VeREF 11 11 5 1 50 12 12 5 0 51 13 13 4 7 52 14 14 14 46 4 6 53 15 15 15 47 4 5 54 16 16 16 48 4 4 55 17 17 17 49 4 3 56 18 16 18 50 4 2 57 19 19 19 51 P4 1 S8 20 20 20 62 P4 0 S9 21 21 21 63 510 22 22 511 23 23 512 24 24 513 25 25 514 26 26 515 27 27 516 28 28 517 29 29 P2 7 ADC12CLK S18 30 30 P2 6 CAOUT S19 31 31 S20 32 32 521 33 33 522 34 34 523 35 35 P3 7 S24 36 36 36 64 P3 6 S25 37 37 37 65 P3 5 S24 38 38 38 66 P3 4 S27 39 39 39 67 P3 3 UCLK0 S28 40 40 40 68 P3 2 SOMI0 S29 41 41 41 69 P3 1 SIMO0 S30 42 42 42 70 P3 0 STE0 S31 43 43 43 71 COMO 44 52T P5 2 COM1 45 53 P5 3 COM2 46 54 5 4 47 55 703 48 56 P5 5 R13 49 57 P5 6 R23 50 58 P5 7 R33 51 59 DVcc2 52 60 DVss2 53 61 P2 5 URXDO P2 4 UTXDO P2 3 TB2 P2 2 TB1 P2 1 TBO P2 0 TA2 P1 7 CA1 P1 6 CAO P1 5 TACLK ACLK P1 4 TBCLK SMCLK P1 3 TBOUTH SVSOUT P1 2 TA1 P1 1 TAO MCLK P1 0 TAO 7209 XT2IN TDO TDI TDI TMS TCK RST NMI P6 0 A0 P6 1 A1 P6 2 A2 Avss DVss1 Avcc Note discontinuity of pin numbering sequence 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 741 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 92 93 94 95 96 97 98 99 100 0 3 D 4 Appendix E MSP FET430UIF Installation Guide This section describes the hardware installation process of the MSP FET430UIF USB debug interfac
22. C SPY cannot input a TXT file 7 Position Independent code can be generated using PROJECT gt OPTIONS gt GENERAL OPTIONS gt TARGET POSITION INDEPENDENT CODE 8 Within the C libraries GIE Global Interrupt Enable is disabled before and restored after the hardware multiplier is used Contact if you wish the source code for these libraries so that this behavior can be disabled 9 It is possible to mix assembler and C programs within the Workbench Refer to the Assembler Language Interface chapter of the C C Compiler Reference Guide from 10 The Workbench can produce an object file in Texas Instruments TXT format C SPY cannot input an object file in Texas Instruments TXT format An error message will be output in this case 11 The example programs giving in the Kickstart documentation i e Demo Tutor etc are not correct The programs will work only in the simulator However the programs will not function correctly on an actual device because the Watchdog mechanism is active The programs need to be modified to disable the Watchdog mechanism Disable the Watchdog mechanism with the C statement WDTCTL WDTPW WDTHOLD or mov w WDTPW WDTHOLD amp WDTCTL in assembler 12 Access to MPY using an 8 bit operation is flagged as an error Within the h files 16 bit registers are defined in such a way that 8 bit operations upon them are flagged as an error This feature is normally a
23. Debugging 11 and Hardware 11 14 The VIEW gt MEMORY MEMORY FILL dialog of C SPY requires hexadecimal values for Starting Address Length and Value to be preceded with Otherwise the values are interpreted as decimal 15 The MEMORY debug view of C SPY VIEW gt MEMORY can be used to view the RAM the INFORMATION memory and the Flash MAIN memory The MEMORY utility of C SPY can be used to modify the RAM the INFORMATION memory and Flash MAIN memory cannot be modified using the MEMORY utility The INFORMATION memory and Flash MAIN memory can only be programmed when a project is opened and the data is downloaded to the device or when EMULATOR INIT NEW DEVICE is selected 16 C SPY does not permit the individual segments of the INFORMATION memory and the Flash MAIN memory to be manipulated separately consider the INFORMATION memory to be one contiguous memory and the Flash MAIN memory to be second contiguous memory 17 The MEMORY window correctly displays the contents of memory where it is present However the MEMORY window incorrectly displays the contents of memory where there is none present Memory should only be used in the address ranges as specified by the device data sheet 18 C SPY utilizes the system clock to control the device during debugging Therefore device counters etc that are clocked by the Main System Clock MCLK will be effected when C SPY has control of the device Special precaut
24. and User s Guide The most up to date versions of these documents available at the time of production have been provided on the CD ROM included with this tool The MSP430 web site www ti com msp430 will contain the latest version of these documents From the MSP430 main page on the CD ROM navigate to Literature gt 5 430 Literature gt Data Sheets to access the MSP430 device data sheets From the MSP430 main page on the CD ROM navigate to Literature gt MSP4930 Literature gt User s Guides to access the MSP430 device User s Guides and tools Documents describing the IAR tools Workbench C SPY the assembler the C compiler the linker and the librarian are located in common Wdoc and 430 doc The documents are in PDF format Supplements to the documents i e the latest information are available in HTML format within the same directories 430 doc readme_start htm provides a convenient starting point for navigating the IAR documentation Chapter 2 Development Flow This chapter discusses how to use Kickstart to develop your application software and how to use C SPY to debug it Topic Page 21 Overview 2 2 2 2 Using Kickstart 2 2 2 2 1 Project Settings 2 3 2 2 2 Creating a Project from Scratch 2 5 2 2 3 Using an Existing IAR V1 x V2 x Project 2 6 2 2 4 Stack Management and xcl Files 2 6 2 2 5 How to Generate Texas Instruments TXT and other format 2 7 Files 2 2 6 Overview of Example Programs 2 7 2
25. any license either express or implied is granted under any patent right copyright mask work right or other intellectual property right of TI covering or relating to any combination machine or process in which such products or services might be or are used TI s publication of information regarding any third party s products or services does not constitute approval license warranty or endorsement thereof Reproduction of information in TI data books or data sheets is permissible only if reproduction is without alteration and is accompanied by all associated warranties conditions limitations and notices Representation or reproduction of this information with alteration voids all warranties provided for an associated product or service is an unfair and deceptive business practice and is not responsible nor liable for any such use Resale of Tl s products or services with statements different from or beyond the parameters stated by for that product or service voids all express and any implied warranties for the associated TI product or service is an unfair and deceptive business practice and is not responsible nor liable for any such use Also see Standard Terms and Conditions of Sale for Semiconductor Products www ti com sc docs stdterms htm Mailing Address Texas Instruments Post Office Box 655303 Dallas Texas 75265 Copyright O 2006 Texas Instruments Incorporated EVALUATION BOARD KIT IMPORT
26. devices 2 wire JTAG mode is available on selected devices only Refer to Table 2 1 above for information on which interfacing method can be used on which device The connections for the FET Interface module and the GANG430 or PRGS430 are identical Both the FET Interface module and GANG430 can supply V to your target board via pin 2 In addition the FET Interface module and GANG430 have V sense feature that if used requires an alternate connection pin 4 instead of pin 2 The 8 5 feature senses the local present on the target board i e a battery or other local power supply and adjusts the output signals accordingly If the target board is to be powered by local then the connection to pin 4 on the JTAG should be made and not the connection to pin 2 This utilizes the V sense feature and prevents any contention that might occur if the local on board were connected to the supplied from the FET Interface module or the GANG430 If the 8 5 feature is not necessary i e the target board is to be powered from the FET Interface module or the GANG430 the connection is made to pin 2 on the JTAG header and no connection is made to pin 4 Figure 3 1 and Figure 3 2 show a jumper block which supports both scenarios of supplying 1 the target board If this flexibility is not required the desired V connections may be hard wired eliminating the jumper block Pin
27. examples the project settings are accessed using PROJECT gt OPTIONS with the project name selected Use these project settings as templates when developing your own projects Note that if the project name is not selected when settings are made the settings will be applied to the selected file and not to the project The following project settings are recommended required Specify the target device GENERAL OPTIONS gt TARGET gt DEVICE Enable an assembler project or a C assembler project GENERAL OPTIONS gt TARGET gt ASSEMBLER ONLY PROJECT Enable the generation of an executable output file GENERAL OPTIONS gt OUTPUT gt OUTPUT FILE gt EXECUTABLE In order to most easily debug a C project disable optimization C C COMPILER gt CODE gt OPTIMIZATIONS gt SIZE gt NONE BEST DEBUG SUPPORT Enable the generation of debug information in the compiler output C C COMPILER gt OUTPUT gt GENERATE DEBUG INFO Specify the search path for the C preprocessor C C COMPILER gt PREPROCESSOR gt INCLUDE PATHS Enable the generation of debug information in the assembler output ASSEMBLER gt OUTPUT gt GENERATE DEBUG INFO Specify the search path for the assembler preprocessor ASSEMBLER gt PREPROCESSOR gt INCLUDE PATHS In order to debug the project using C SPY specify a compatible format LINKER gt OUTPUT gt FORMAT gt DEBUG INFO WITH TERMINAL IOJ Specify the search pat
28. from Customers should erase the Information Memory before its first usage Main Memory of packaged devices is blank when the device is delivered from 11 The device current increases by approximately 10uA when a device in low power mode is stopped using ESC and then the low power mode is restored using GO This behavior appears to happen on all devices except the MSP4SOF 12x 12 The following ZIF sockets are used in the FET tools and Target Socket modules 14 pin device PW package ENPLAS OTS 14 065 01 20 pin device PW package Yamaichi IC189 0202 64 28 pin device DW package Wells CTI 652 0028 38 pin device DA package Yamaichi IC189 0382 037 40 pin device RHA package Enplas QFN 40B 0 5 01 48 pin device DL package Yamaichi 51 0482 1163 64 pin device PM package Yamaichi IC51 0644 807 80 pin device PN package Yamaichi IC201 0804 014 100 pin device PZ package Yamaichi IC201 1004 008 ENPLAS http www enplas com Wells CTI _http Awww wellscti com Yamaichi http www yamaichi us 13 Supply current measurement on Target Socket modules On each module a jumper connects Vcc with Vcc430 If this jumper is removed and a ampere meter is connected to the jumper pins the supply current of the module can be measured As the pull up resistor 47k on the Reset line is connected to Vcc the MSP430 device sees a marginal voltage at pin RST NMI if Vcc is present and the jumper is open The
29. liability for proper and safe handling of the goods Further the user indemnifies TI from all claims arising from the handling or use of the goods Due to the open construction of the product it is the user s responsibility to take any and all appropriate precautions with regard to electrostatic discharge EXCEPT TO THE EXTENT OF THE INDEMNITY SET FORTH ABOVE NEITHER PARTY SHALL BE LIABLE TO THE OTHER FOR ANY INDIRECT SPECIAL INCIDENTAL OR CONSEQUENTIAL DAMAGES TI currently deals with a variety of customers for products and therefore our arrangement with the user is not exclusive TI assumes no liability for applications assistance customer product design software performance or infringement of patents or services described herein Please read the User s Guide and specifically the Warnings and Restrictions notice in the User s Guide prior to handling the product This notice contains important safety information about temperatures and voltages For additional information on TI s environmental and or safety programs please contact the TI application engineer or visit www ti com esh No license is granted under any patent right or other intellectual property right of TI covering or relating to any machine process or combination in which such TI products or services might be or are used FCC WARNING This evaluation board kit is intended for use for ENGINEERING DEVELOPMENT DEMONSTRATION OR EVALUATION PURPOSES ONLY and is not consi
30. the PC via the parallel port If the externally supplied voltage differs from that of the FET Interface module the Target Socket module must be modified so that the externally supplied voltage is routed to the FET Interface module so that it may adjust its output voltage levels accordingly Again refer to the Target Socket module schematics in 38 3 3 Bootstrap Loader The JTAG pins provide access to the Flash memory of the MSP430Fxxx devices On some devices these pins are shared with the device port pins and this sharing of pins can complicate a design or it may simply not be possible to do so As an alternative to using the JTAG pins most MSP430Fxxx devices contain a program a Bootstrap Loader that permits the Flash memory to be erased and programmed simply using a reduced set of signals Application Notes SLAA089 SLAAO96 fully describe this interface TI does not produce a BSL tool However customers can easily develop their own BSL tools using the information in the Application Notes or BSL tools can be purchased from 3 parties Refer to the MSP430 web site for the Application Notes and a list of MSP430 3 party tool developers Texas Instruments suggests that MSP430Fxxx customers design their circuits with the BSL in mind i e we suggest providing access to these signals e g via a header Refer to FAQ Hardware 9 for a second alternative to sharing the JTAG and port pins The BSL tool requires the follo
31. 28 25 up O0000000000000000000000020 Figure B 18 MSP TS430PZ100 Target Socket module PCB Pictorials TPS77001 optional optional 02125112284 13 25 12 24 m 23 18 22 21 28 19 18 12 16 15 14 A2 G 248 244 029 e A2 D 5 746HC244 997 TLCB55CD We A2 GND u A4 1 5 cu 8 5 748HC240 TR USB Al 2 At 5 74AHC240 Gi 0 32KHz R35 sni TEXAS INSTRUMENTS Project MSP FETP43 IF Flash Emulation Kit Interface File MSP FETP430IF Rev 1 3 Date 26 07 2001 10 03 24 Sheet 1 1 Figure B 19 MSP FET430PIF FET Interface module Schematic B 20 M25HP284 AEE 9 88 she e x rig 28 Co Ol 5 ABE pag Led teuo idog 1 N eC H ot 2 ty 11 Tn 15420 18 1 7 4797 2249 28 74AHC244 TO 05 65 23 69 99 oo w w w amp to 5 1 ERR 82828 n 8 n 229 5 5 a iE 518 219 X OT x w
32. 9 01 yellou ed ONP GND 5 4 2274108 TEST SBHTCK 1 7 00 DUCC P1 6 TDI 2 5 P1 5 TMS DUSS P1 4 TCK 2 7 1 3 2 6 1 2 RST SBHOAT P1 1 2 P2 1 P2 4 P2 2 P2 3 P3 8 11 P3 7 P3 1 P3 6 P3 2 P3 5 P3 3 P3 4 AUSS P4 7 AUCC P4 6 P4 8 Socket P4 5 24 1 vasaichi 4 4 P4 2 1 189 0382 094 3 34 34 33 P12 33 32 p 32 31 3 __ 22 4 ae 29 p 29 28 p 28 27 P36 27 26 p 26 25 p 25 24 p47 247 23 p46 23 22 p4 22 21 p4 21 28 p4 28 GNO external supply voltage remove R11 and add R18 0 Ohm MSP TS430DR38 Target Socket Board for MSP43 F2247IDA TITLE MSP TS430DR38 Document Number REU 1 3 Date 3 13 2006 02 53 39 Sheet 1 1 Figure B 7 MSP TS430DA38 Target Socket module Schematic B 8 LED connected to P1 0 Jumper JP3 Open to disconnect LED Jumper JP2 Open to measure current Connector J3 External power connector Jumper JP1 to ext d 410 FEN 0000000 00000 00000002 000002 JTAG BOOTST JP1 ext 760 m m m m m aS 23 Ucc N N N N e R18 in La Lal La JP 726 JP5 4 10 22 30 35 39 Naa Jumpers JP4 JP9 Close 1 2 to debug in SpyBiWire Mode or close 2 3 to debug in 4Wire JTAG mode Orient pin 1 of MSP430 device
33. ANT NOTICE Texas Instruments TI provides the enclosed product s under the following conditions This evaluation board kit is intended for use for ENGINEERING DEVELOPMENT DEMONSTRATION OR EVALUATION PURPOSES ONLY and is not considered by TI to be a finished end product fit for general consumer use Persons handling the product s must have electronics training and observe good engineering practice standards As such the goods being provided are not intended to be complete in terms of required design marketing and or manufacturing related protective considerations including product safety and environmental measures typically found in end products that incorporate such semiconductor components or circuit boards This evaluation board kit does not fall within the scope of the European Union directives regarding electromagnetic compatibility restricted substances RoHS recycling WEEE FCC CE or UL and therefore may not meet the technical requirements of these directives or other related directives Should this evaluation board kit not meet the specifications indicated in the User s Guide the board kit may be returned within 30 days from the date of delivery for a full refund THE FOREGOING WARRANTY IS THE EXCLUSIVE WARRANTY MADE BY SELLER TO BUYER AND IS IN LIEU OF ALL OTHER WARRANTIES EXPRESSED IMPLIED OR STATUTORY INCLUDING ANY WARRANTY OF MERCHANTABILITY OR FITNESS FOR ANY PARTICULAR PURPOSE The user assumes all responsibility and
34. EATE 7 Add the text file to the project PROJECT ADD FILES Select the text file and press OPEN Alternatively double click on the text file to add it to the project 2 5 Note How to add assembler source files to your project The default file type presented in the Add Files window is Files In order to view assembler files 543 select Assembler Files in the Files of type drop down menu 8 Configure the project options PROJECT gt OPTIONS For each of the listed subcategories GENERAL OPTIONS COMPILER ASSEMBLER LINKER DEBUGGER accept the default Factory Settings with the following exceptions Specify the target device GENERAL OPTIONS gt TARGET gt DEVICE Enable an assembler project or a C assembler project GENERAL OPTIONS gt gt ASSEMBLER ONLY PROJECT Enable the generation of an executable output file GENERAL OPTIONS gt gt OUTPUT FILE gt EXECUTABLE To debug the FET i e MSP430 select DEBUGGER gt SETUP gt DRIVER gt FET DEBUGGER Specify the active port used to interface to the FET FET DEBUGGER gt SETUP gt CONNECTION 8 Build the project PROJECT gt REBUILD ALL 9 Debug the application using C SPY PROJECT gt DEBUG This will start C SPY and C SPY will get control of the target erase the target memory program the target memory with the application and reset the target Refer
35. Figure 20 MSP FET430PIF FET Interface module PCB Pictorials B 21 GND 10OuF 6 3V 10007 ADC3 SETVCCT C10 10uF 6 3V 52 33107 8MHz c1 3319 R3 q 4708 02 MODE MN R20 470R D4 POWER TCK MSP430F1612IPM TDO TDI IMS VF2TEST VF2TDI TDIOFF XOUT TCLK VEREF VEREF VCCTON 20 TEST 567 5 IGTRST SCL SDA RST 3410 RXD XD USBFET TITLE MSP FETU43 I1F Revi 4upd Document Number Date 10 05 2005 09 39 37a Sheet 1 4 Figure B 21 MSP FET430UIF USB Interface Schematic B 22 99 05 4 D m Erie TEST SN74LVC1G125DBV U15 SN74LVC1G125DBV 034 6 SN74LVC1G125DBV 035 E SN74LVC1G125DBV 2 INI2Os C15 VCCT 100nF 1 R GND 47k 08 TDO TTDO R8 4708 SN74LVC1GO7DBV TGTRST U4 AQY211EHA VE2TEST VF2TDI U13 AQY211EHA 5 75240 5 75240 VCCTON o1 ed 2 gt K 92 014 AQY211EHA TDIOFF o1 gt 2 gt K 92 GND TTMS ITCK R74 100R TTDOP R21 100R TARGET CON 1 TTDIP 3 R42 e 100R SN74LVC1G125DBV assembled SN74LVC1GO7DBV R22 100R USBFET MSP FETU43 1F Document Number Date 10 05 2005 09 38 37a 5 7 8
36. O MSP TS430QFN40 Rev 2 2 Figure B 10 MSP TS430QFN40 Target Socket module PCB Pictorials C3 10uF 10V YAMASOCK48DL TDO TDI TDITCLK TMS TCK RST NMI 55 XIN XOUT AVSS VREF 10uFA10V 91 C1 C2 not assembled UARZ3 RST NMI LCDCAPO LCDCAP1 1 0 P1 1 5 P1 2 P14 4 P4 3 1 51 0482 1163 04 10uFA0V GND c ard c MSP TS430DL48 Target Socket 0148 TITLE MSP TS430DL48 Document Number Date 2 02 2005 02 04 15p 1 1 Figure 11 MSP TS430DL48 Target Socket module Schematic B 12 p 00000001 000001 00000002 000002 2 Jumper J5 JTAG BOOTST F Open to measure mt current pz x LED connected to Connector J3 J3 4 P1 0 External power 8 connector 000000000000 1 Jumper JP1 to s 900000000000 Jumper J4 ext U1 Open to disconnect LED 000000000000 000000000000 Orient pin 1 of MSP430 device Figure B 12 MSP TS430DL48 Target socket PCB B 13 remove R8 and add R9 0 Ohm external supply voltage JP1Q 100 180 R12 5 Uo ce 55 a a enhancement not assembled not assembled lQuF 6 3U 11 C2 LFXTCLK 91 rl JP1Q 26 Open J6 if LCD
37. PCB One 25 conductor cable One 14 conductor cable MSP FET430P120 Four PCB 1x14 pin headers Two male and two female MSP FET430P140 Eight PCB 1x16 pin headers Four male and four female MSP FET430P410 Eight PCB 1x16 pin headers Four male and four female MSP FET430P430 Eight PCB 1x20 pin headers Four male and four female MSP FET430P440 Eight PCB 1x25 pin headers Four male and four female One small box containing two or four MSP430 device samples MSP FET430P120 MSP430F123IDW and or MSP430F12321DW MSP FET430P140 MSP430F149IPM and or 5 4 0 169 MSP FET430P410 MSP430F413IPM MSP FET430P430 MSP430F437IPN and or MSP430FG439 MSP FET430P440 MSP430F449IPZ Consult the device data sheets for device specifications Device errata can be found in the respective device product folder on the web provided as a PDF document Depending on the device errata may also be found in the device bug database at http www ti com sc cgi bin buglist cgi 1 4 Kit Contents MSP FET430UIF One READ ME FIRST document One MSP430 CD ROM One MSP FET430UIF interface module One USB Cable One 14 conductor cable 1 5 Kit Contents MSP FET430Uxx 4 14 4028 038 40 048 U64 080 40100 One READ ME FIRST document One MSP430 CD ROM One MSP FETP430UIF USB Interface module This is the unit that has a USB B connector on one end of the case and a 2x7 pin male connector on the other end of the cas
38. PN Package MSP FET430U100 for MSP430 devices in 100 pin PZ Package This tool contains the most up to date materials available at the time of packaging For the latest materials data sheets User s Guides software application information etc visit the MSP430 web site at www ti com msp430 or contact your local TI sales office Information About Cautions and Warnings This book may contain cautions and warnings This is an example of a caution statement A caution statement describes a situation that could potentially damage your software or equipment This is an example of a warning statement A warning statement describes a situation that could potentially cause harm to you The information in a caution or a warning is provided for your protection Read each caution and warning carefully vi Related Documentation From Texas Instruments MSP430xxxx Device Data Sheets MSP430x1xx Family User s Guide SLAUO49 MSP430x2xx Family User s Guide SLAU144 MSP430x3xx Family User s Guide SLAUO12 MSP430x4xx Family User s Guide SLAUO56 If You Need Assistance FCC Warning Support for the MSP430 device and the FET is provided by the Texas Instruments Product Information Center PIC Contact information for the PIC can be found on the TI web site at www ti com Additional device specific information can be found on the MSP430 web site at www ti com msp430 Note Kickstart is supported by Texas Instrumen
39. Pictorial gt m M E 1 eed n Meta 64 ers EQ 89 o 814 520 TARGET CON MSP FET430UIF Revision History Revision 1 3 Initial released hardware version Assembly change on 1 3 May 2005 R29 R51 R42 R21 R22 R74 value changed from to 100R Changes 1 3 gt 1 4 Aug 2005 J5 VBUS and RESET additionally connected R29 R51 R42 R21 R22 R74 value changed from to 100R 01 U7 F1612 can reset TUSB3410 R44 OR added TARGET CON pins 6 10 12 13 14 disconnected from GND Firmware upgrade option through BSL R49 R52 R53 R54 added R49 R52 are currently DNP Pull ups on TCK and TMS R78 R79 added 02 Changed from SN75LVC1G125DBV to SN75LVC1G07DBV Assembly change on 1 4 January 2006 R62 not populated Note Using a locally powered target board with hardware revision 1 4 Using an MSP FET430UIF interface hardware revision 1 4 with populated R62 in conjunction with a locally powered target board is not possible In this case the target device RESET signal is pulled down by the FET tool It is recommended to remove R62 to eliminate this restriction This component is located close to the 14 pin connector on the MSP FET430UIF PCB Refer to Figure B 18 on page B 22 for the exact location B 27 B 28 Appendix C FET Specific Menus This appendix describes the C SPY men
40. TS Figure E 3 WinXP Driver Location Selection Folder 6 The Wizard should generate a message that an appropriate driver has been found 7 Note that WinXP shows a warning that the driver is not certified by Microsoft Ignore this warning and click Continue Anyway Figure E 4 E 3 Found New Hardware Wizard Please wait while the wizard installs the software gt all MSP430 USB FET Adapter Hardware Installation Ad The software you are installing for this hardware MSP430 USB FET Adapter has not passed Windows Logo testing to verify its compatibility with Windows Tell me why this testing is important Continuing your installation of this software may impair or destabilize the correct operation of your system either immediately or in the future Microsoft strongly 4 recommends that you stop this installation now and contact the hardware vendor for software that has passed Windows Logo testing Continue Anyway STOP Installation Figure E 4 WinXP Driver Installation 8 Inthe next step the Wizard installs the driver files 9 The Wizard now shows a message that it has finished the installation of the software for MSP430 USB FET Adapter 10 After closing the Hardware Wizard Windows automatically recognizes another new hardware device called Texas Instruments UMP Serial Port 11 Depending on the current update version of the OS correspondin
41. after the function reference and a GO will be implicitly executed This will cause the function to be executed at full speed If no hardware breakpoints are available the function will be executed in Non Realtime mode STEP INTO is supported STEP OUT is supported Within Disassembly mode VIEW gt DISASSEMBLY a step operation of a non CALL instruction executes the instruction at full device speed Within Disassembly mode VIEW gt DISASSEMBLY a step operation of a CALL instruction will place if possible a hardware breakpoint after the CALL instruction and then execute GO The CALL ed function will execute at full device speed If no hardware breakpoint is available prior to the GO the CALL ed function will be executed in Non Realtime mode In either case execution will stop at the instruction following the CALL It is only possible to single step when source statements are present Breakpoints must be used when running code for which there is no source code i e place the breakpoint after the CALL to the function for which there is no source and then GO to the breakpoint in Realtime mode If during a single step operation an interrupt becomes active the current instruction is completed and C SPY will stop at the first instruction of the interrupt service routine Refer to FAQ Debugging 25 2 3 4 Using Watch Windows The C SPY Watch Window mechanism permits C variables to be monitored during the debugging
42. an be transferred When the DTC is enabled and configured for two block transfer mode the DTC may not stop precisely on a block boundary when stopped in response to a single step or a breakpoint 29 The C SPY Register window supports instruction cycle length counters The cycle counter is only active while single stepping The count is reset when the device is reset or the device is run GO The count can be edited normally set to zero at any time 30 It s possible to use C SPY to get control of a running device whose state is unknown Simply use C SPY to program a dummy device and then start the application with RELEASE JTAG ON GO selected Remove the JTAG connector from the dummy device and connect to the unknown device Select DEBUG gt BREAK or the stop hand to stop the unknown device The state of the device can then be interrogated 31 RESET ing a program temporarily requires a breakpoint if PROJECT gt OPTIONS gt DEBUGGER gt SETUP gt RUN TO is enabled If N or more breakpoints are set RESET will set a virtual breakpoint and will run to the RUN TO function Consequently it may require a significant amount of time before the program resets i e stops at the RUN TO function During this time the C SPY will indicate that the program is running and C SPY windows may be blank or may not be correctly updated 32 RUN TO CURSOR temporarily requires a breakpoint If N breakpoints are set and virtua
43. ceed 8 inches 20 centimeters in length The signal assignment on the 14 conductor cable is identical for the parallel port interface and the USB FET To utilize the on chip ADC voltage references C6 10uF 6 3V low leakage must be installed on the Target Socket module Crystals resonators Q1 and Q2 if applicable are not provided on the Target Socket module For MSP430 devices which contain user selectable loading capacitors the effective capacitance is the selected capacitance plus 3pF pad capacitance divided by two Crystals resonators have no effect upon the operation of the tool and C SPY as any required clocking timing is derived from the internal DCO FLL On 20 pin and 28 pin devices with multiplexed port JTAG pins P1 4 P1 7 it is required that RELEASE JTAG ON GO be selected in order to use these pins in their port capacity Refer to C 1 2 EMULATOR RELEASE JTAG ON GO for additional information regarding this mechanism As an alternative to sharing the JTAG and port pins on 20 and 28 pin devices consider using an MSP430 device that is a superset of the smaller device A very powerful feature of the MSP430 is that the family members are code and architecturally compatible so code developed on one device say without shared JTAG and port pins will port effortlessly to another assuming an equivalent set of peripherals 10 Information Memory may not be blank erased to Oxff when the device is delivered
44. cted to pin 4 of the target connector so the USB FET can set the level of the output signals accordingly C 1 2 EMULATOR gt RELEASE JTAG ON GO C SPY uses the device JTAG signals to debug the device On some MSP430 devices these JTAG signals are shared with the device port pins Normally C SPY maintains the pins in JTAG mode so that the device can be debugged During this time the port functionality of the shared pins is not available However when RELEASE JTAG ON GO is selected the JTAG drivers are set to tri state and the device is released from JTAG control TEST pin is set to GND when GO is activated Any active on chip breakpoints are retained and the shared JTAG port pins revert to their port functions At this time C SPY has no access to the device and cannot determine if an active breakpoint if any has been reached C SPY must be manually commanded to stop the device at which time the state of the device will be determined i e Was a breakpoint reached Refer to FAQ Debugging 11 C 1 3 EMULATOR RESYNCHRONIZE JTAG Regain control of the device It is not possible to RESYNCHRONIZE JTAG while the device is operating C 1 4 EMULATOR gt INIT NEW DEVICE Initialize the device according to the settings the DOWNLOAD OPTIONS Basically the current program file is downloaded to the device memory The device is then reset This option can be used to program multiple devices with the same program from within th
45. dered by TI to be a finished end product fit for general consumer use It generates uses and can radiate radio frequency energy and has not been tested for compliance with the limits of computing devices pursuant to part 15 of FCC rules which are designed to provide reasonable protection against radio frequency interference Operation of this equipment in other environments may cause interference with radio communications in which case the user at his own expense will be required to take whatever measures may be required to correct this interference Mailing Address Texas Instruments Post Office Box 655303 Dallas Texas 75265 Preface Read This First About This Manual This manual documents the Texas Instruments MSP FET430 Flash Emulation Tool FET The FET is the development tool for the MSP430 ultra low power microcontroller Both available interfaces the Parallel Port Interface and the USB Interface are described here How to Use This Manual Read and follow the Get Started Now chapter This chapter will enable you to inventory your FET and then it will instruct you to install the software and hardware and then run the demonstration programs Once you ve been demonstrated how quick and easy it is to use the FET we suggest that you complete the reading of this manual This manual describes the set up and operation of the FET but does not fully teach the MSP430 or the development software systems For details of these it
46. e MSP FET430U14 One MSP TS430PW14 Target Socket module This is the on which is mounted 14 pin ZIF socket It fits all MSP430 devices in 14 pin PW Packages A 2x7 pin male connector is also present on the PCB MSP FET430U28 One MSP TS430DW28 Target Socket module This is the on which is mounted 28 pin ZIF socket It fits all MSP430 devices in 20 and 28 pin DW Packages A 2x7 pin male connector is also present on the PCB MSP FET430U38 One MSP TS430DA38 Target Socket module This is the on which is mounted 38 pin ZIF socket It fits all MSP430 devices in 38 pin DA Packages A 2x7 pin male connector is also present on the PCB MSP FET430U40 One MSP TS430QFN40 Target Socket module This is the PCB on which is mounted a 40 pin ZIF socket It fits only MSP430F2330 F2350 F2370 devices in 40 pin RHA Package A 2x7 pin male connector is also present on the PCB MSP FET430U48 One MSP TS430DL48 Target Socket module This is the on which is mounted a 48 pin ZIF socket It fits all MSP430 devices in 48 pin DL Package A 2x7 pin male connector is also present on the PCB MSP FET430U64 One MSP TS430PM64 Target Socket module This is the on which is mounted a 64 pin ZIF socket It fits all MSP430 devices in 64 pin PM Package A 2x7 pin male connector is also present on the PCB MSP FET430U80 One MSP TS430PN80 Target Socket module This is the on which is mounted 80 socket It fi
47. e chunk and the progress bar will not be updated until the entire write operation is complete A 11 Appendix B Hardware This appendix contains information relating to the FET hardware including schematics and PCB pictorials Topic Page Figure B 1 MSP FET430X110 Schematic B 2 Figure 2 MSP FET430X110 PCB Pictorials B 3 Figure B 3 MSP TS430PW14 Target Socket module Schematic B 4 Figure B 4 MSP TS430PW14 Target Socket module PCB Pictorials B 5 Figure B 5 MSP TS430DW28 Target Socket module Schematic B 6 Figure B 6 MSP TS430DW28 Target Socket module PCB Pictorials B 7 Figure B 7 MSP TS430DA38 Target Socket module Schematic B 8 Figure B 8 MSP TS430DA38 Target Socket module PCB Pictorials B 9 Figure B 9 MSP TS430QFN40 Target Socket module Schematic B 10 Figure B 10 MSP TS430QFN40 Target Socket module PCB B 11 Pictorials Figure B 11 MSP TS430DL48 Target Socket module Schematic B 12 Figure B 12 MSP TS430DL48 Target Socket module PCB B 13 Figure B 13 MSP TS430PM64 Target Socket module Schematic B 14 Figure B 14 MSP TS430PM64 Target Socket module Pictorials B 15 Figure B 15 MSP TS430PN80 Target Socket module Schematic B 16 Figure B 16 5 5430 80 Target Socket module Pictorials B 17 Figure B 17 MSP TS430PZ100 Target Socket module Schematic B 18 Figure B 18 MSP TS430PZ100 Target Socket module PCB Pictorials B 19 Figure 19 MSP FET430PIF FET Interface module Schematic B 20 Figu
48. e on a PC running Windows XP The installation procedure for a Windows 2000 system is very similar and therefore not shown here Topic Page E 1 Hardware Installation E 2 E 1 E 1 E 2 Hardware Installation 1 Connect the MSP FET430UIF USB Debug Interface with a USB cable to a USB port of your PC 2 Windows now should recognize the new hardware as an MSP430 USB FET Figure E 1 Found New Hardware x MSP430 USB FET 1 01 07 29 38 5 Figure E 1 WinXP Hardware Recognition 3 The Hardware Wizard should start automatically and popup the Found New Hardware Wizard dialog window 4 Instruct the Wizard to install the hardware driver from a specific location Figure E 2 Found New Hardware Wizard Welcome to the Found New Hardware Wizard Y This wizard helps you install software for MSP430 USB FET 1 01 07 If your hardware came with an installation CD or floppy disk insert it now What do you want the wizard to do Install the software automatically Recommended Click Next to continue lt Back Cancel Figure E 2 WinXP Hardware Wizard 5 Point the Hardware Wizard to the folder where the corresponding driver information files are located on your hard disk Found New Hardware Wizard Please choose your search and installation options C my data projects MSP430 USB_FET USB_FE
49. e same C SPY session It is not possible to select INIT NEW DEVICE while the device is operating 2 C 1 6 C 1 7 C 1 9 C 1 10 C 1 11 EMULATOR gt SECURE Blows the fuse on the target device After the fuse is blown no communication with the device is possible EMULATOR gt SHOW USED BREAKPOINTS List all used hardware and virtual breakpoints as well as all currently defined EEM breakpoints EMULATOR gt ADVANCED gt CLOCK CONTROL Disable the specified system clock while C SPY has control of the device following a STOP or breakpoint All system clocks are enabled following a GO or a single step STEP STEP INTO Refer to FAQ Debugging 18 EMULATOR gt ADVANCED gt EMULATION MODE Specify the device to be emulated The device must be reset or reinitialized through INIT NEW DEVICE following a change to the emulation mode Refer to Appendix D EMULATOR gt ADVANCED gt MEMORY DUMP Write the specified device memory contents to a specified file A conventional dialog is displayed that permits the user to specify a file name a memory starting address and a length The addressed memory is then written in a text format to the named file Options permit the user to select word or byte text format and address information and register contents can also be appended to the file EMULATOR gt ADVANCED gt BREAKPOINT COMBINER Open the Breakpoint Combiner dialog box The Breakpoint Combine
50. ems refer to the appropriate and IAR documents listed in Chapter 1 12 Important MSP430 Documents on the CD ROM and WEB This manual is applicable to the following tools and devices MSP FET430PIF debug interface with parallel port connection for all MSP430 Flash based devices MSP FET430UIF debug interface with USB connection for all MSP430 Flash based devices Below tools contain the parallel port debug interface MSP FET430PIF and the respective target socket module MSP FET430X110 for the MSP430F11xIDW MSP430F11x1AIDW and MSP430F11x2IDW devices MSP FET430P120 for the MSP430F12xIDW MSP430F12x2IDW devices MSP FET430P140 for MSP430F13xIPM MSP430F14xIPM MSP430F15xIPM MSP430F16xIPM and MSP430F161xIPM devices MSP FET430P410 for the MSP430F41xIPM devices MSP FET430P430 for the MSP430F43xIPN devices MSP FET430P440 for the MSP430F43xIPZ and MSP430F44xIPZ devices The following tools contain the USB debug interface MSP FET430UIF and the respective target socket module MSP FET430U14 for MSP430 devices in 14 pin PW Packages MSP FET430U28 for MSP430 devices in 20 and 28 pin DW Packages MSP FET430U38 for MSP430 devices 38 pin DA Packages MSP FET430U40 for MSP430F2330 F2350 F2370 devices 40 pin RHA Packages only MSP FET430U48 for MSP430 devices 48 pin DL Package MSP FET430U64 for MSP430 devices 64 pin PM Package MSP FET430U80 for MSP430 devices 80 pin
51. g drivers are installed automatically or the Hardware Wizard pops up again In case of the Wizard is started please repeat the steps already described above again 12 Finally the MSP FET430UIF debug interface is installed and ready to use The Device Manager should list a new entry as shown in Figure E 5 Device Manager Batteries b4 Bluetooth Devices Computer gt Disk drives EH Display adapters DVD CD ROM drives gy Human Interface Devices IDE controllers 9 05 Keyboards H 12 Mice and other pointing devices Modems A Multi port serial adapters Sq MSP430 USB FET Adapter E9 Broadcom 570x Gigabit Integrated Controller 88 Dell TrueMobile 1300 WLAN Mini PCI Card 8 PCMCIA adapters Ports COM amp LPT 7 Bluetooth Communications Port COM4 7 Bluetooth Communications Port 7 Communications Port 1 7 ECP Printer Port LPT1 7 SCDTech UMP Port 9 9 Processors e Smart card readers Sound video and game controllers H System devices W Universal Serial Bus controllers Figure E 5 Device Manager 51711
52. good thing and can catch register access violations However in the case of MPY it is also valid to access this register using 8 bit operators If 8 bit operators are used to access MPY the access violation check mechanism can be defeated by using MPY to reference the register Similarly 16 bit operations on 8 bit registers are flagged 13 Constant definitions define used within the h files are effectively reserved and include for example C 7 and V Do not create program variables with these names 14 The CSTARTUP that is implicitly linked with all C applications does not disable the Watchdog timer Use WDT WDTPW WDTHOLD to explicitly disable the Watchdog This statement is best placed in the level init function that gets executed before main If the Watchdog timer is not disabled and the Watchdog triggers and resets the device during CSTARTUP the source screen will go blank as C SPY is not able to locate the source code for CSTARTUP Be aware that CSTARTUP can take a significant amount of time to execute if a large number of initialized global variables are used int __ low level init void Insert your low level initializations here WDTCTL WDTPW WDTHOLD Stop Watchdog timer gt Choose if segment initialization should be done or not Return 0 to omit seg init 1 to run seg init
53. h for any used libraries LINKER gt CONFIG gt SEARCH PATHS Specify the C SPY driver Select PROJECT gt OPTIONS gt Debugger gt Setup gt Driver gt FET Debugger to debug on the FET i e MSP430 device Select SIMULATOR to debug on the simulator If FET Debugger is selected use PROJECT gt OPTIONS gt FET Debugger gt Setup gt Connection to select the appropriate port LPTx for the parallel FET Interface or TI USB FET for the USB Interface Enable the Device Description file This file makes C SPY aware of the specifics of the device it is debugging This file will correspond to the specified target device DEBUGGER gt SETUP gt DEVICE DESCRIPTION gt OVERRIDE DEFAULT 2 3 2 4 Enable the erasure of the Main and Information memories before object code download FET DEBUGGER gt SETUP gt DOWNLOAD CONTROL gt ERASE MAIN AND INFORMATION MEMORY In order to maximize system performance during debug disable Virtual Breakpoints FET DEBUGGER gt SETUP gt USE VIRTUAL BREAKPOINTS and disable all System Breakpoints FET DEBUGGER gt SETUP gt SYSTEM BREAKPOINTS ON Note Use of Factory Settings to quickly configure a project It is possible to use the Factory Settings button to quickly configure a project to a usable state The following steps can be used to quickly configure a project Note The GENERAL OPTIONS tab does not have a FACTORY SETTINGS button 1 2
54. ice errata may also be found in the device bug database at http www ti com sc cgi bin buglist cgi 1 6 Software Installation Follow the instructions on the supplied READ ME FIRST document to install the IAR Embedded Workbench Kickstart Read the file Installation Root gt Embedded Workbench x x 430 doc readme htm from IAR for the latest information about the Workbench The term Kickstart is used to refer to the function limited version of Embedded Workbench including C SPY debugger Kickstart is supplied on the CD ROM included with each FET and the latest version is available from the MSP430 web site The above documents and this document can be accessed using START gt PROGRAMS gt IAR SYSTEMS gt IAR EMBEDDED WORKBENCH KICKSTART FOR MSP430 V3 Kickstart is compatible with Windows 98 2000 ME NT4 0 and XP However the USB FET Interface works only with Windows 2000 and XP 1 7 Hardware Installation MSP FET430X110 1 Connect the 25 conductor cable originating from the FET to the parallel port of your PC The necessary driver for accessing the PC parallel port will be installed automatically during IAR Embedded Workbench installation Note that a restart is required after the IAR Embedded Workbench installation for the driver to become active Ensure that the MSP430F1121AIDW is securely seated in the Socket and that its pin 1 indicated with a circular indentation on the top surface aligns with the 1 mark o
55. imited amount of current Owing to the ultra low power capability of the 5 430 a stand alone FET does not exceed the available current However if additional circuitry is added to the tool this current limit could be exceeded In this case external power can be supplied to the tool via connections provided on the MSP FET430X110 and the Target Socket modules Refer to the schematics and pictorials of the MSP FET430X110 and the Target Socket modules presented in 38 to locate the external power connectors The MSP FET430UIF can supply targets with up to 100 mA through pin 2 of the 14 pin connector for the target can be selected between 1 8V and 5 0V in steps of 0 1V Alternatively the target can be supplied externally In this case the external voltage should be connected to pin 4 of the 14 pin connector The MSP FET430UIF then adjusts the level of the JTAG signals to external automatically Only pin 2 MSP 8 4 FET430UIF supplies target OR pin 4 target is externally supplied must be connected not both at the same time When an 430 110 is powered from an external supply an on board device regulates the external voltage to the level required by the MSP430 When a Target Socket module is powered from an external supply the external supply powers the device on the Target Socket module and any user circuitry connected to the Target Socket module and the FET Interface module continues to be powered from
56. ions are taken to minimize the effect upon the Watchdog Timer The CPU core registers are preserved All other clock sources SMCLK ACLK and peripherals continue to operate normally during emulation In other words the Flash Emulation Tool is a partially intrusive tool Devices which support Clock Control EMULATOR ADVANCED CLOCK CONTROL can further minimize these effects by selecting to stop the clock s during debugging Refer to FAQ Debugging 23 19 There is a time after C SPY performs a reset of the device when the C SPY session is first started when the Flash is reprogrammed via INITNEW DEVICE and when JTAG is resynchronized RESYNCHRONIZE JTAG and before C SPY has regained control of the device that the device will execute code normally This behavior may have side effects Once C SPY has regained control of the device it will perform a reset of the device and retain control 20 When programming the Flash do not set a breakpoint on the instruction immediately following the write to Flash operation A simple work around to this limitation is to follow the write to Flash operation with a NOP and set a breakpoint on the instruction following the Refer to FAQ Debugging 22 21 The Dump Memory length specifier is restricted to four hexadecimal digits 0 ffff This limits the number of bytes that be written from 0 to 65535 Consequently it is not possible to write memory from 0 to Oxffff inclu
57. is connected R3 568R FE16 1 1 not assembled MSP64PM Socket Yamaichi C51 0644 807 3 11 1118 not assembled D For BSL usage add a R6 R7 213 R14 MSP430F14x 0 0 open open MSP430F41x open open 0 If external supply voltage remove R11 and add R10 lt 8 Ohm MSP TS430PM64 Target Socket 2164 for 4 41 TITLE MSP TS430PM64 Document Number Date 11 07 2001 16 41 20 Sheet 1 1 Connections between the JTAG header and pins XOUT and XIN are no longer required and should not be made Note Figure B 13 MSP TS430PM64 Target Socket module Schematic B 14 LED connected to pin 12 Jumper J7 Open to measure current Jumper J6 Open to disconnect LED Orient Pin 1 of MSP430 device 14 11 00000001 00000002 10 00000 000002 n R1 n H XTCLK R18 R11 2 R BOOT R13 R14 R6 n R7 H o0000000000000000 9 64 J4 4 1 51 0644 807 00000
58. isting IAR V1 x V2 x 2 6 2 2 4 Stack Management and Files 2 6 2 2 5 to Generate Texas Instruments TXT and other format Files 2 7 2 2 6 Overview of Example 2 7 2 3 Using GASP Vise 2822 2 8 2 31 Breakpoint Types tee et iret dee ra e e E eg rte 2 8 2 3 2 Breakpolnts e tee LC ER A tered 2 9 2 53 Using Single Step nece oerte 2 10 2 3 4 Using Watch 2 11 Design Considerations for In Circuit Programming 3 1 3 1 Signal Connections for In System Programming and Debugging MSP FET430PIF MSP FET430UIF GANG430 430 3 2 3 2 External POWER a rete 3 4 3 9 BootStrap 10802178555 3 5 Frequently Asked Questions A 1 1 2 A 2 Program Development Assembler C Compiler Linker A 3 A3 Debugging A 6 e B 1 EET C 1 X WIS cn C 2 1 1 EMULATOR DEVICE INFORMATION eese C 2 1 2 EMULATOR RELEASE JTAG
59. l breakpoints are disabled RUN TO CURSOR will incorrectly use a virtual breakpoint This results in very slow program execution 33 The simulator is a CPU core simulator only peripherals are not simulated and interrupts are statistical events 34 On devices without data breakpoint capabilities it s possible to associate with an instruction breakpoint an arbitrarily complex expression that C SPY evaluates when the breakpoint is hit This mechanism can be used to synthesize a data breakpoint Refer to the C SPY documentation for a description of this complex breakpoint mechanism 35 The ROM Monitor referenced by the C SPY documentation applies only to older MSP430Exxx EPROM based devices it can be ignored when using the FET and the FLASH based MSP430F device 36 Special Function Registers SFRs and the peripheral registers are displayed in VIEW gt REGISTER 37 The putchar getchar breakpoints are set only if these functions are present and the mechanism is enabled Note that putchar getchar could be indirectly referenced by a library function 38 The Flash program download progress bar does not update gradually This behavior is to be expected The progress bar updates whenever a chunk of memory is written to Flash The development tools attempt to minimize the number of program chunks in order to maximize programming efficiency Consequently its possible for say a 60K byte program to be reduced to a singl
60. l430dp 64 bit doubles position independent cl430f C 32 bit doubles cl430fp C 32 bit doubles position independent di430d 64 bit doubles di430dp C 64 bit doubles position independent 01430 C 32 bit doubles dl430fp C 32 bit doubles position independent Refer to the IAR MSP430 C C compiler reference guide for more information on which library to use A 5 A 3 A 6 Debugging C SPY 1 3 Debugging with C SPY does not seem to affect an externally connected MSP430 device Should this be the case check whether the main debugger menu bar contains a menu item called SIMULATOR If so an actual C SPY MSP430 core simulator session is running and no actual communication with the target device is established Solution ensure that the C SPY driver is set to FET Debugger PROJECT gt OPTIONS gt DEBUGGER gt DRIVER C SPY reports that it cannot communicate with the device Possible solutions to this problem include Ensure that the correct debug interface is selected use PROJECT gt OPTIONS gt FET DEBUGGER gt CONNECTION Ensure that the correct parallel port LPT1 2 or 3 is being specified in the C SPY configuration in the case a parallel port MSP FET430PIF interface is used use PROJECT gt OPTIONS gt FET DEBUGGER gt CONNECTION gt PARALLEL PORT gt LPT1 default or LPT2 or LPT3 Check the PC BIOS for the parallel port address 0x378 0x278 Ox3bc and the parallel por
61. n is optional when using 4 Wire JTAG communication mode capable only devices and not required for device programming or debugging However this connection is required when using 2 Wire JTAG communication mode capable devices in 4 Wire JTAG mode When using 2 Wire JTAG communication capable devices in 4 Wire JTAG mode the upper limit for should not exceed 2 2 This applies to both FET Interface modules LPT USB AVcc DVcc MSP430Fxxx TDO TDI RST NMI SBWTDIO TEST SBWTCK Vss AVss DVss Figure 3 2 Signal Connections for 2 Wire JTAG Communication Spy Bi Wire Make either connection J1 in case a local target power supply is used OR connection J2 to power target from the debug programming adapter i Note that the device RST NMI SBWTDIO pin is used in 2 wire mode for bi directional communication with the device during JTAG access and that any capacitance attached to this signal may affect the ability to establish a connection with the device The upper limit for C1 is 2 2 nF when using current TI FET Interface modules USB FET R2 is used to protect the JTAG debug interface signal against the JTAG security fuse blow voltage that is supplied by the TEST VPP pin during the fuse blow process In the case that fuse blow functionality is not needed R2 is not required becomes 0 and the connection TEST VPP must not be made 3 2 External Power The PC parallel port can only source a l
62. n the PCB Ensure that jumpers J1 near the non socketed IC on the FET and J5 near the LED are in place Pictorials of the FET and its parts are presented in Appendix B 1 8 Hardware Installation MSP FET430PIF 1 Use the 25 conductor cable to connect the FET Interface module to the parallel port of your PC The necessary driver for accessing the PC parallel port will be installed automatically during IAR Embedded Workbench installation Note that a restart is required after the IAR Embedded Workbench installation for the driver to become active Use the 14 conductor cable to connect the parallel port debug interface module to a target board such as an MSP TS430xxx Target Socket Module 1 9 Hardware Installation MSP FET430UIF 1 Use the USB cable to connect the USB FET Interface module to a USB port of your PC The USB FET should be recognized instantly as the USB device driver should have been installed already with the Kickstart SW If for any reason the Install Wizard starts respond to the prompts and point the wizard to the driver files which are located in directory Installation Root gt Embedded Workbench x x 430 bin WinXP Detailed driver installation instructions can be found in Appendix E After connecting to a PC the USB FET performs a selftest where the red LED flashes for about 2 seconds If the selftest passed successfully the green LED lights permanently Use the 14 conductor cable to connect the USB FET I
63. nterface module to a target board such as an MSP TS430xxx Target Socket Module Ensure that the MSP430 device is securely seated the socket and that its pin 1 indicated with a circular indentation on the top surface aligns with the 1 mark on the PCB Compared to the parallel port debug interface the USB FET has additional features like JTAG security fuse blow and adjustable target 1 8V 3 6V target can be supplied with up to 100 mA 1 10 Hardware Installation MSP FET430Uxx 4 14 028 U38 40 048 U64 080 40100 MSP FET430Pxx0 42120 P140 P410 P430 440 1 Connect the MSP FET430PIF or MSP FET430UIF debug interface to the appropriate port of your PC Use the 14 conductor cable to connect the FET Interface module to the supplied Target Socket module Ensure that the MSP430 device is securely seated the socket and that its pin 1 indicated with a circular indentation on the top surface aligns with the 1 mark on the PCB Ensure that the two jumpers LED and near the 2x7 pin male connector are in place Pictorials of the Target Socket module and its parts are presented in Appendix B 1 11 Flash ing the LED This section demonstrates on the FET the equivalent of the C language Hello World introductory program an application that flashes the LED is developed and downloaded to the FET and then run 1 2 9 Start the Workbench START
64. of breakpoints to be set regardless of the USE VIRTUAL BREAKPOINTS setting of C SPY If virtual breakpoints are disabled a maximum of N breakpoints can be set within C SPY RESET ing a program temporarily requires a breakpoint if PROJECT gt OPTIONS gt DEBUGGER SETUP gt RUN TO is enabled Refer to FAQ Debugging 31 The RUN TO CURSOR operation temporarily requires a breakpoint Consequently only N 1 breakpoints can be active when RUN TO CURSOR is used if virtual breakpoints are disabled Refer to FAQ Debugging 32 If while processing a breakpoint an interrupt becomes active C SPY will stop at the first instruction of the interrupt service routine Refer to FAQ Debugging 25 2 9 2 3 3 Using Single Step 2 10 When debugging an assembler file STEP OVER STEP OUT and NEXT STATEMENT operate like STEP INTO the current instruction is executed at full speed When debugging an assembler file a step operation of a CALL instruction stops at the first instruction of the CALL ed function When debugging an assembler file true STEP OVER a CALL instruction that executes the CALL ed function at full device speed can be synthesized by placing a breakpoint after the CALL and GO ing to the breakpoint in Realtime mode When debugging a C file a single step STEP operation executes the next C statement Thus it is possible to step over a function reference If possible a hardware breakpoint will be placed
65. ore processing non ISR i e mainline code A work around for this behavior is while within the ISR to disable the GIE bit on the stack so that interrupts will be disabled after exiting the ISR This will permit the non ISR code to be debugged but without interrupts Interrupts can later be re enabled by setting GIE in the status register in the Register window On devices with the Clock Control emulation feature it may be possible to suspend a clock between single steps and delay an interrupt request EMULATOR gt ADVANCED gt CLOCK CONTROL 26 The base decimal hexadecimal etc property of Watch Window variables is not preserved between C SPY sessions the base reverts to Default Format A 9 27 On devices equipped with a Data Transfer Controller DTC the completion of a data transfer cycle will preempt a single step of a low power mode instruction The device will advance beyond the low power mode instruction only after an interrupt is processed Until an interrupt is processed it will appear that the single step has no effect A work around to this situation is to set a breakpoint on the instruction following the low power more instruction and then execute GO to this breakpoint 28 The transfer of data by the Data Transfer Controller DTC may not stop precisely when the DTC is stopped in response to a single step or a breakpoint When the DTC is enabled and a single step is performed one or more bytes of data c
66. ost PC the system operates at a much slower speed but offers unlimited software breakpoint or Non Realtime During Non Realtime mode the PC effectively repeatedly single steps the device and interrogates the device after each operation to determine if a breakpoint has been hit Both code address and data value breakpoints are supported Data breakpoints and range breakpoints each require two MSP430 hardware breakpoints Table 2 1 Number of device breakpoints and other emulation features Device 4 Wire 2 Wire Range Clock State Trace JTAG JTAGT N Breakpoints Control Sequencer Buffer MSP430F11x1 X 2 MSP430F1 1x2 X MSP430F 12x X 2 MSP430F12x2 X 2 MSP430F 13x X 3 X MSP430F 14x X 3 X 5 430 15 X 8 X X X X 5 430 16 X 8 X X X X MSP430F161x X 8 X X X X 5 430 20 X X 2 X MSP430F21x1 X 2 X MSP430F22x4 X X 2 X MSP430F23x0 X 2 X MSP430F41x X 2 X MSP430F42x X 2 X MSP430F42x0 X 2 X MSP430F43x X 8 X X X X MSP430F44x X 8 X X X X MSP430FE42x X 2 X MSP430FG43x X 2 X MSP430FG461x X 8 X X X X MSP430FW42x X 2 X The 2 wire JTAG debug interface is also referred to as Spy Bi Wire interface 2 3 2 Using Breakpoints If C SPY is started with greater than N breakpoints set and virtual breakpoints are disabled a message will be output that informs the user that only N Realtime breakpoints are enabled and one or more breakpoints are disabled Note that the workbench permits any number
67. r dialog box permits one to specify breakpoint dependencies A breakpoint will be triggered when the breakpoints are encountered in the specified order EMULATOR gt STATE STORAGE CONTROL Open the State Storage dialog box The State Storage dialog box permits one to use the state storage module The state storage module is present only in those devices that contain the EEM Refer to the IAR C SPY FET Debugger section in the MSP430 IAR Embedded Workbench IDE User Guide C 3 C 1 12 C 1 13 C 1 14 C 1 15 C 1 16 C 1 17 C 1 18 4 EMULATOR gt STATE STORAGE WINDOW Open the State Storage window and display the stored state information as configured by the State Storage dialog Refer to the IAR C SPY FET Debugger section in the MSP430 IAR Embedded Workbench IDE User Guide EMULATOR SEQUENCER CONTROL Open the Sequencer dialog box The Sequencer dialog box permits one to configure the sequencer state machine Refer to the IAR C SPY FET Debugger section in the MSP430 IAR Embedded Workbench IDE User Guide EMULATOR gt POWER ON RESET Cycle power to the device to effect a reset EMULATOR gt on off Enables or disables all interrupts Needs to be restored manually before GO EMULATOR gt LEAVE TARGET RUNNING If C SPY is closed the target keeps running the user program EMULATOR gt FORCE SINGLE STEPPING On GO the program is executed by single steps Only in this mode the cycle coun
68. re B 20 FET Interface module Pictorial B 21 Figure 21 MSP FET430UIF USB Interface Schematic B 22 Figure 22 MSP FET430UIF USB Interface PCB Pictorial B 26 Exi PUR TPS77001 optiona optional PINHD 2X13 Mells Socket 652 SOP ZIF MSP432F112 PINHD 1X2 74AHC244 n I 85956 PINHD 2X5 PINHD 2X8 025 30 placed close not assembled to Socket layout prepared at TEXAS INSTRUMENTS Project MSP430F112 Flash Emulation Kit Hardware Block Size Files TI F112 Flash Emu Kit Revs 1 1 Date 10 04 2001 12 06 38 Sheet 1 1 Figure B 1 MSP FET430X1 10 Schematic B 2 1909 1971 id lo 7 MSP FET43 x11x Connector J4 External power connector LED connected to P1 0 R 10000 Jumper J5 d 52 Open to disconnect LED R6 Orient Pin 1 of MSP430 Ensure value is 82 ohms device Jumper Open to measure current J2 J3 P2 1 RST XOUT P2 5 TST P2 4 1 3 1 5 P1 7 P2 2 P2 0 XIN Vss 2 3 P1 0 P1 2 P1 4 P1 6
69. refore Vcc should be applied after the ampere meter has been connected A 2 Program Development Assembler C Compiler Linker 1 The files supplied in the 430 tutor folder work only with the simulator Do not use the files with the FET Refer to FAQ Program Development 11 A common MSP430 mistake is to fail to disable the Watchdog mechanism the Watchdog is enabled by default and it will reset the device if not disabled or properly handled by your application Refer to FAQ Program Development 14 When adding source files to a project do not add files that are include ed by source files that have already been added to the project say an h file within or 543 file These files will be added to the project file hierarchy automatically In assembler enclosing a string in double quotes string automatically appends a zero byte to the string as an End Of String marker Enclosing a string single quotes string does not When using the compiler or the assembler if the last character of a source line is backslash 1 the subsequent carriage return line feed is ignored i e it is as if the current line and the next line are A 3 single line When used in this way the backslash character is a Line Continuation character 6 The linker output format must be Debug information for C SPY d43 for use with C SPY C SPY will not start otherwise and an error message will be output
70. s 2 and 4 must not be connected simultaneously Note that in 4 Wire JTAG communication mode Figure 3 1 the connection of the target RST signal to the JTAG connector is optional and not required when using 4 Wire JTAG communication mode capable only devices However when using 2 Wire JTAG communication mode capable devices in 4 Wire JTAG mode the RST connection must be made The MSP430 development tools and device programmers perform a target reset through issuing JTAG command to gain control over the device However in the case this should be unsuccessful the RST signal of the JTAG connector may be used by the development tool or device programmer as an additional way to assert a device reset Voc Vcc AVcc DVoc MSP430Fxxx TDO TDI TDO TDI MS TMS Hoc 7 TEST VPP 11 Vss AVss DVss 10nF 2 2nF VCC TOOL VCC TARGET Figure 3 1 Signal Connections for 4 Wire JTAG Communication Make either connection J1 in case a local target power supply is used OR connection J2 to power target from the debug programming adapter i The RST NMI pin R1 C1 configuration is device family dependent Refer to the respective MSP430 Family User s Guide for the recommended configuration The TEST VPP pin is only available on MSP430 family members with multiplexed JTAG pins Refer to the device data sheet to see if this pin is available 4 The connection to the JTAG connector RST pi
71. s not asserted low C SPY sets the logic driving RST NMI to high impedance and RST NMI is pulled high via a resistor on the PCB RST NMI may get asserted and negated after power is applied when C SPY is started RST NMI may then get asserted and negated a second time after device initialization is complete Within C SPY EMULATOR gt POWER ON RESET will cycle the power to the target to generate a power on reset 9 C SPY can debug a device whose program reconfigures the function of the RST NMI pin to NMI 10 The level of the XOUT TCLK pin is undefined when C SPY resets the device The logic driving XOUT TCLK is set to high impedance at all other times 11 When making current measurements of the device ensure that the JTAG control signals are released EMULATOR gt RELEASE JTAG ON GO otherwise the device will be powered by the signals on the JTAG pins and the measurements will be erroneous Refer to FAQ Debugging 13 and Hardware 11 12 Most C SPY settings breakpoints etc are preserved between sessions A 7 13 When C SPY has control of the device the CPU is ON i e it is not in low power mode regardless of the settings of the low power mode bits in the status register Any low power mode conditions will be restored prior to STEP or GO Consequently do not measure the power consumed by the device while C SPY has control of the device Instead run your application using GO with JTAG released Refer to FAQ
72. session Although not originally designed to do so the Watch Window mechanism can be extended to monitor assembler variables Assume that the variables to watch are defined in RAM say RSEG DATA16 I varword ds 2 two bytes per word varchar ds 1 one byte per character In C SPY 1 Open the Watch Window WATCH 2 Use DEBUG gt QUICK WATCH 3 To watch varword enter in the Expression box __data16 unsigned int varword 4 To watch varchar enter in the Expression box data16 unsigned char varchar 5 Press the Add Watch button 6 Close the Quick Watch window 7 For the created entry in the Watch Window click on the symbol This will display the contents or value of the watched variable To change the format of the displayed variable default binary octal decimal hex char select the type click the right mouse button and then select the desired format The value of the displayed variable can be changed by selecting it and then entering the new value In C variables can be watched by selecting them and then dragging n dropping then into the Watch Window Since the MSP430 peripherals are memory mapped it is possible to extend the concept of watching variables to watching peripherals Be aware that there may be side effects when peripherals are read and written by C SPY Refer to FAQ Debugging 823 CPU core registers can be specified for watching by preceding their name with i e
73. sive as this would require a length specifier of 65536 or 10000h 22 Multiple internal machine cycles are required to clear and program the Flash memory When single stepping over instructions that manipulate the Flash control is given back to C SPY before these operations are complete Consequently C SPY will update its memory window with erroneous information A work around to this behavior is to follow the Flash access instruction with a and then step past the NOP before reviewing the effects of the Flash access instruction Refer to FAQ Debugging 20 23 Peripheral bits that are cleared when read during normal program execution i e Interrupt Flags will be cleared when read while being debugged i e memory dump peripheral registers When using certain MSP430 devices such as MSP430F15x 16x and MSP430F43x 44x devices bits do not behave this way i e the bits are not cleared by C SPY read operations 24 C SPY cannot be used to debug programs that execute in the RAM of F12x and F41x devices A work around to this limitation is to debug programs in Flash 25 While single stepping with active and enabled interrupts it can appear that only the interrupt service routine ISR is active i e the non ISR code never appears to execute and the single step operation always stops on the first line of the ISR However this behavior is correct because the device will always process an active and enabled interrupt bef
74. t configuration ECP Compatible Bidirectional or Normal Refer to FAQ Debugging 7 later in this document For users of IBM Thinkpads please try port specifications LPT2 and LPT3 despite the fact that the operating system reports the parallel port is located at LPT1 Ensure that no other software application has reserved taken control of the parallel port say printer drivers ZIP drive drivers etc in the case a parallel port MSP FET430PIF interface is used Such software can prevent the C SPY FET driver from accessing the parallel port and hence communicating with the device It may be necessary to reboot the computer to complete the installation of the required port drivers Ensure that the MSP430 device is securely seated in the socket so that the fingers of the socket completely engage the pins of the device and that its pin 1 indicated with a circular indentation on the top surface aligns with the 1 mark on the PCB CAUTION Possible Damage To Device Always handle MSP430 devices with using vacuum pick up tool only do not use your fingers as they can easily bend the device pins and render the device useless Also always observe and follow proper ESD precautions C SPY can download data into RAM INFORMATION and Flash MAIN memories A warning message is output if an attempt is made to download data outside of the device memory spaces 4 C SPY can debug applications that utilize interrupts and low po
75. ter works correctly EMULATOR gt SET VCC On the USB FET the target supply voltage can be adjusted between 1 8V and 3 6V This voltage is available on pin 2 of the 14 pin target connector to supply the target from the USB FET If the target is supplied externally the external supply voltage should be connected to pin 4 of the target connector so the USB FET can set the level of the output signals accordingly Note Availability of EMULATOR gt ADVANCED menus Not all EMULATOR gt ADVANCED menus are supported by all MSP430 devices These menus will be grayed out Appendix D 80 MSP430F44x and MSP430F43x Device Emulation 80 14574307445 and MSP430F43x devices can be emulated by the 100 MSP430F449 device Table D 1 F4xx 80 pin Signal Mapping lists where the pin signals of an 80 pin device appear on the pins of an MSP TS430PZ100 Target Socket module Note The MSP TS430PZ100 must be modified as indicated Refer to Appendix C 1 8 EMULATOR gt ADVANCED gt EMULATION MODE to enable the emulation mode Topic Page Table D 1 80 Signal Mapping D 2 D 1 Table D 1 80 Signal Mapping D 2 80 Signal F4xx 80 pin Pin MSP430 Connection required Number TS430PZ100 between indicated Pin Number pins of MSP430 TS430PZ100 socket 0 1 1 1 P6 3 A3 2 2 P6 4 A4 3 3 P6 5 A5 4 4 P6 6 A6 5 5 P6 7 A7 6 6 VREF 7 7 XIN 8 8 XOUT 9
76. to FAQ Debugging 1 if C SPY is unable to communicate with the device 10 Use DEBUG gt GO to start the application 11 Use DEBUG gt STOP DEBUGGING to stop the application to exit C SPY and to return to the Workbench 12 Use FILE gt EXIT to exit the Workbench 2 2 8 Using an Existing IAR V1 x V2 x Project It is possible to use an existing project from an IAR V1 x V2 x system with the new IAR V3 x system refer to the IAR document Step by step migration for EW430 x xx This document can be located in Installation Root Embedded Workbench x x 430 doc migration htm 2 2 4 Stack Management and xcl Files 2 6 The reserved stack size can be configured through either the project options dialog GENERAL OPTIONS gt STACK HEAP or through direct modification of the xcl linker control files These files are input to the linker and contain statements that control the allocation of device memory RAM Flash Refer to the IAR XLINK documentation for a complete description of these files The xcl files provided with the FET Installation Root gt Embedded Workbench x x 430 config Ink430xxxx xcl define a relocatable segment RSEG called CSTACK CSTACK is used to define the region of RAM that is used for the system stack within C programs CSTACK can also be used in assembler programs MOV W SFE CSTACKk SP CSTACK is defined to extend from the last location of RAM for 50 bytes i e the stack extends downwards thro
77. ts Although Kickstart is a product of IAR Texas Instruments provides the support for it Therefore please do not request support for Kickstart from IAR Please consult the extensive documentation provided with Kickstart before requesting assistance This equipment is intended for use in a laboratory test environment only It generates uses and can radiate radio frequency energy and has not been tested for compliance with the limits of computing devices pursuant to subpart J of part 15 of FCC rules which are designed to provide reasonable protection against radio frequency interference Operation of this equipment in other environments may cause interference with radio communications in which case the user at his own expense will be required to take whatever measures may be required to correct this interference vii viii Contents Read 111115 71151 5 25 05555552535555355585555548858585585845548 85858558455785448582355585185558258880458528248585885758581587848 V About THS Manual How to Use This Mantull ciere tat rr ete tid V Information About Cautions and 0 vi Related Documentation From Texas vii If You Need 5 vii EET MUERE vii ML ML rre ix lg E xi TANS EID xi
78. ts all MSP430 devices in 80 pin PN Package A 2x7 pin male connector is also present on the PCB MSP FET430U100 One MSP TS430PZ100 Target Socket module This is the PCB on which is mounted a 100 pin ZIF socket It fits all MSP430 devices 100 pin PZ Package 2x7 pin male connector is also present on the PCB One USB Cable One 14 conductor cable MSP FET430U14 Four PCB 1x7 pin headers Two male and two female MSP FET430U28 Four PCB 1x14 pin headers Two male and two female MSP FET430U38 Four 1x19 pin headers Two male and two female MSP FET430U40 Eight PCB 1x10 pin headers Four male and four female MSP FET430U48 Four PCB 2x24 pin headers Two male and two female MSP FET430U64 Eight 1x16 pin headers Four male and four female MSP FET430U80 Eight 1x20 pin headers Four male and four female MSP FET430U100 Eight PCB 1x25 pin headers Four male and four female One small box containing two or four MSP430 device samples MSP FET430U14 MSP430F2013IPW MSP FET430U28 MSP430F123IDW and or MSP430F1232IDW MSP FET430U38 MSP430F2274IDA MSP FET430U40 MSP430F2370IRHA MSP FET430U48 MSP430F4270IDL MSP FET430U64 MSP430F417IPM and MSP430F169IPM MSP FET430U80 MSP430FG439 MSP FET430U100 MSP430F449IPZ Consult the device data sheets for device specifications Device errata can be found in the respective device product folder on the web provided as a PDF document Depending on the dev
79. ts step by step instructions to create an assembler or C project from scratch and to download and run the application on the MSP430 Refer to Project Settings above Also the MSP430 IAR Embedded Workbench IDE User Guide presents a more comprehensive overview of the process 1 Start the Workbench START gt PROGRAMS IAR SYSTEMS gt IAR EMBEDDED WORKBENCH KICKSTART FOR MSP430 V3 gt KICKSTART IAR EMBEDDED WORKBENCH 2 Create a new text file FILE gt NEW gt SOURCE TEXT 3 Enter the program text into the file Note Use h files to simplify your code development Kickstart is supplied with files for each device that define the device registers and the bit names and these files can greatly simplify the task of developing your program The files are located in lt Installation Root gt Embedded Workbench x x 430 inc Simply include the h file corresponding to your target device in your text file include msp430xyyy h Additionally files io430xxxx h are provided and are optimized to be included by C source files 4 Save the text file FILE gt SAVE It is recommended that assembler text file be saved with a file type suffix of s43 and that C text files be saved with a file type suffix of 5 Create new workspace FILE gt NEW gt WORKSPACE Specify a workspace name and press SAVE 6 Create a new project PROJECT gt CREATE NEW PROJECT Specify a project name and press CR
80. ugh RAM for 50 bytes Other statements in the xcl file define other relocatable regions that are allocated from the first location of RAM to the bottom of the stack It is critical to note that 1 The supplied xcl files reserve 50 bytes of RAM for the stack regardless if this amount of stack is actually required or if it is sufficient 2 There is no runtime checking of the stack The stack can overflow the 50 reserved bytes and possible overwrite the other segments No error will be output The supplied xcl files can be easily modified to tune the size of the stack to the needs of the application simply edit D STACK SIZE xx to allocate xx bytes for the stack Note that the xcl file will also reserve 50 byes for the heap if required say by malloc 2 2 5 How to Generate Texas Instruments TXT and other format Files The Kickstart linker can be configured to output objects TI TXT format for use with the GANG430 and PRGS430 programmers Select PROJECT gt OPTIONS gt LINKER gt gt FORMAT gt OTHER gt MSP430 TXT Intel and Motorola formats can also be selected Refer to FAQ Program Development 6 2 2 6 Overview of Example Programs Example programs for MSP430 devices are provided in Installation Root gt Embedded Workbench examples Each tool folder contains folders that contain the assembler and C sources Installation Root gt Embedded Workbench x x 430 FET_e
81. us that are specific to the FET Topic Page 1 1 EMULATOR DEVICE INFORMATION 2 1 2 gt RELEASE JTAG GO 2 1 3 EMULATOR RESYNCHRONIZE JTAG 2 1 4 EMULATOR gt INIT NEW DEVICE 2 1 5 EMULATOR gt SECURE 3 1 6 EMULATOR gt SHOW USED BREAKPOINTS C 3 1 7 EMULATOR gt ADVANCED gt CLOCK CONTROL C 3 C 1 8 EMULATOR gt ADVANCED gt EMULATION MODE 3 1 9 EMULATOR ADVANCED gt MEMORY DUMP 3 1 10 EMULATOR gt ADVANCED gt BREAKPOINT 3 COMBINER 1 11 EMULATOR gt STATE STORAGE CONTROL C 3 1 12 EMULATOR gt STATE STORAGE WINDOW C 4 1 13 EMULATOR gt SEQUENCER CONTROL 4 1 14 EMULATOR gt POWER RESET 4 C 1 15 EMULATOR gt GIE on off 4 1 16 EMULATOR gt LEAVE TARGET RUNNING C 4 1 17 EMULATOR gt FORCE SINGLE STEPPING 4 1 18 EMULATOR gt SET 4 1 Menus C 1 1 EMULATOR DEVICE INFORMATION Opens a window with information about the target device being used Also this window allows adjusting the target voltage in the case an MSP FET430UIF interface is used to supply power to the target by performing a right click inside this window The supply voltage can be adjusted between 1 8V and 5 0V This voltage is available on pin 2 of the 14 pin target connector to supply the target from the USB FET If the target is supplied externally the external supply voltage should be conne
82. wer modes Refer to FAQ Debugging 25 5 C SPY cannot access the device registers and memory while the device is running C SPY will display to indicate that register memory field is invalid The user must stop the device in order to access device registers and memory Any displayed register memory fields will then be updated 6 When C SPY is started the Flash memory is erased and the opened file is programmed in accordance with the download options as set in PROJECT gt OPTIONS gt FET DEBUGGER gt DOWNLOAD CONTROL This initial erase and program operations can be disabled selecting PROJECT gt OPTIONS gt FET DEBUGGER gt DOWNLOAD CONTROL gt SUPPRESS DOWNLOAD Programming of the Flash can be initiated manually with EMULATOR gt INIT NEW DEVICE 7 The parallel port designators LPTx have the following physical addresses LPT1 378h LPT2 278h LPT3 3BCh The configuration of the parallel port ECP Compatible Bidirectional Normal is not significant ECP seems to work well Refer FAQ Debugging 1 for additional hints on solving communication problems between C SPY and the device 8 C SPY may assert RST NMI to reset the device when C SPY is started and when the device is programmed The device is also reset by the C SPY RESET button and when the device is manually reprogrammed EMULATOR gt INIT NEW DEVICE and when the is resynchronized EMULATOR gt RESYNCHRONIZE JTAG When RST NMI i
83. wing device signals RST NMI TEST TCKT GND P1 1 P2 2 or P1 0t If present on device i 2 devices use pins P1 1 P2 2 for the BSL devices use pins P1 0 and P1 1 for the BSL 3 5 3 6 Appendix A Frequently Asked Questions This appendix presents solutions to frequently asked questions regarding hardware program development and debugging tools Topic Page A 1 Hardware A 2 A 2 Program Development Assembler C Compiler Linker A 3 A 3 Debugging C SPY A 6 A 1 A 2 Hardware The state of the device CPU registers RAM memory etc is undefined following a reset Exceptions to the above statement are that the PC is loaded with the word at Oxfffe i e the reset vector the status register is cleared and the peripheral registers SFRs are initialized as documented in the device Family Users Guides C SPY resets the device after programming it When the 430 110 is used as an interface to an MSP430 on the user s circuit i e there is no MSP430 device in the FET socket the XOUT and XIN signals from the FET should not be connected to the corresponding pins of the in circuit MSP430 Similarly when using the Interface module do not connect the XOUT and XIN signals from the Interface module to the corresponding pins of the in circuit 5 430 The 14 conductor cable connecting the FET Interface module and the Target Socket module must not ex
84. xamples fet_projects eww conveniently organizes the FET_1 demonstration code into a workspace The workspace contains assembler and C projects of the code for each of the FET tools Debug and Release versions are provided for each of the projects lt Installation Root gt Embedded Workbench x x 430 FET_examples code_examples eww conveniently organizes the code examples into a workspace The workspace contains assembler and C projects of the code for each of the FET tools Debug and Release versions are provided for each of the projects 2 7 2 3 Using C SPY Installation Root gt Embedded Workbench x x 430 FET_examples contents htm conveniently organizes and documents the examples Additional code examples can be found on the MSP430 home page under Design Resources Note Some example programs require a 32 kHz crystal on LFXT1 and not all FETs are supplied with a 32 kHz crystal Refer to Appendix C for a description of FET specific menus within C SPY 2 3 1 Breakpoint Types 2 8 The C SPY breakpoint mechanism makes use of a limited number of on chip debugging resources specifically N breakpoint registers refer to Table 2 1 below When N or fewer breakpoints are set the application runs at full device speed or Realtime When greater than N breakpoints are set and Use Virtual Breakpoints is enabled FET DEBUGGER gt SETUP gt USE VIRTUAL BREAKPOINTS the application runs under the control of the h

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