VeriSilicon GSMC 0.18um Syn. DROM Compiler User's Guide
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1. frequency Frequency Specify the frequency of the clock of the chip in MHz The default value is 100MHz codefile CodeFile Specify the code file of the ROM Please refer to the following VeriSilicon GSMC 0 18um Syn DROM Compiler User s Guide Using the ROM Compiler Bsiticon 13 figure for detailed information about the code file format If customer doesn t specify the code file or the code file he specifies doesn t exist all the bits of the ROM block will be set to 0 automatically The default is NOCODE Specify the column multiplexer width The default value is 8 There are three buttons for your choice 8 Multiplexer muxwidth FE 16 or 32 When this option is set to different values the width I and height of the block will change accordingly For detailed information please refer to Parameter Range section on page 6 Vertical Specify which metal layer will be the vertical ring layer It can be vlayer Ring Layer mi m4 N Horizontal Specify which metal layer will be the horizontal ring layer It can hlayer Ring Layer be m1 m4 topmetal Top Metal Specify the top metal layer It can be m4 m5 or m6 The default Layer value is m4 area yin Once area y is used the compiler will only generate a report showing width X height Default is n The following illustrates the format of a code file with a ROM name of DROM2. Park Pudong New Area Shanghai 201204 P R China Tel 86 21 5131 1118 Fax 86 21 5131 1119 Web _ http www verisilicon com 3 Contents Chapter 1 Introduction 4 1 1 Compiler Description 4244444ennnnnn nennen 4 12 PCAN OS nenne 4 1 3 Operating Conditions 2424244444nnnnnnnn nennen 4 1 4 Pin DesetploB en e a 4 1 5 Parameter Rande ee 5 1 6 ROM Floor Panzer 5 Chapter 2 Timing Diagram 6 2 1 Timing Specifications for Diffusion ROM 6 Timing Parameters nnnnnnnnssnnnnnnnnnnnnnnnnnnnn 6 Power PAlaMGlers vascsexusicasinsaisaninuseewaenatiasaies 6 Chapter 3 Using the ROM Compiler 8 3 1 System Requirement ccceeeeeeeeeeceeeeeeeeeeeeeeeeeees 8 3 2 Software Environment ceeceeeeeeceeeeeeeeeeeeeeeeeeees 8 3 3 Installing ROM Compiler c ccseeeeeeeeeeeeeeeeeteees 8 3 4 Inputs and Duip lsaneaneae a 9 35 Getting Started isisisi sesiis 10 Using Shell Commands 10 Using Graphical User Interface GU I 11 3 6 Generating the Outputs sssseeeeeeeeeseeenernrneeeeeeeeee 13 VeriSilicon GSMC 0 18um Syn DROM Compiler User s Guide Introduction Introduction 1 1 Compiler Description VeriSilicon GSMC 0 18um Synchronous Diffusion ROM compiler optimized for Grace Semiconductor Manufacturing Corporation GSMC 0 18um Logic 1P6M Salicide 1 8 3 3V process can flexibly genera
3. 64 X 7 64 words 7 bits Column 1 bit 6 Column 7 bit 0 the highest bit 1010001 the lowest bit 1111111 Line 1 address 0 0000000 0011110 Line 64 address 63 1100111 Each character in a line indicates the bit of a word 3 6 Generating the Outputs When you click on the Default button in the GUI window the ROM compiler will automatically load the default parameters of the ROM and generate the ROM based on the default parameters To generate the outputs click on Generate button All the outputs are generated according to the generic parameters you set and are placed in the VeriSilicon GSMC 0 18um Syn DROM Compiler User s Guide Using the ROM Compiler user specified running directory lt running_dir gt Bsiticon 14 The following table lists the detailed description of the output files Name Description tlf TLF Model lib Synopsys Model net Cdl netlist gds GDS file ds Datasheet V Verilog Model dat Rom Code File lef LEF view antenna lef Antenna LEF view antenna clf Antenna CLF model And click on Exit button to quit the ROM compiler VeriSilicon GSMC 0 18um Syn DROM Compiler User s Guide Using the ROM Compiler
4. VeriSilicon GSMC 0 18um Synchronous Diffusion ROM Compiler User s Guide siticon Trademark Acknowledgments VeriSilicon amp the VeriSilicon logo are the trademarks of VeriSilicon Microelectronics Shanghai Co Ltd All other products and company names mentioned may be the trademarks of their respective owners 2005 VeriSilicon Microelectronics Shanghai Co Ltd All rights reserved Printed in P R China VeriSilicon Microelectronics Shanghai Co Ltd reserves all its copy rights and other intellectual property rights ownership powers benefits and rights arising or to arise from this manual All or part of the contents of this manual may be changed by VeriSilicon Microelectronics Shanghai Co Ltd without notice at any time for any reason including but not limited to improvement of the product relating hereto VeriSilicon Microelectronics Shanghai Co Ltd shall not undertake or assume any obligation responsibility or liability arising out of or in respect of the application or use of the product described herein except for reasonable careful and normal uses Nothing whether in whole or in part within this manual can be reproduced duplicated copied changed or disposed of in any form or by any means without prior written consent by VeriSilicon Microelectronics Shanghai Co Ltd VeriSilicon Microelectronics Shanghai Co Ltd 3F Building 1 No 200 Zhangheng Road Zhangjiang Hi Tech
5. ak current Ipeak lavg IS the average current in A 100MHz unit The average current in the datasheet is achieved under below assumptions 1 Input net transition is 0 2ns 2 Output port capacitance is OpF Consequently the total average current of the memory can be estimated according to the following equation lag lavg F 1 2 C V F N Where lavg the total average current of the memory A F the frequency of clock 100MHz C the average capacitance of output port F V the voltage supply V f the frequency of output port Hz N number of switched ports ipeak S the peak current of memory during operation in unit A VeriSilicon GSMC 0 18um Syn DROM Compiler User s Guide Timing Diagram 3 1 3 2 3 3 Using the ROM Compiler System Requirement Before installation make sure that the following minimum host configuration is available e Sun Microsystem s Solaris7 Software Environment The ROM compiler requires UNIX and X Window as its GUI was developed with Motif Installing ROM Compiler To install ROM compiler please follow the instructions bellow 1 Create an installation directory where you wish to install the ROM compiler NOTE lt install_dir gt will stand for the directory you have created for installation hereafter cd lt install_dir gt gunzip lt lt release_compressed file gt tar xvf Copy vsmerc file to the home directory Add the follo
6. e generated by the ROM compiler automatically Antenna CLF model 3 5 Getting Started There are two ways to start ROM compiler as follows Using Shell Commands Users can launch ROM compiler using commands line in the shell window Enter the following commands to launch the ROM compiler directly from the shell cd lt running_dir gt MC options with parameters The lt running_dir gt is the directory which the ROM compiler runs in All the outputs will be generated in this directory Make sure that the running directory lt running_dir gt is different from the installation directory lt install_dir gt The following options can be specified in the command line lib lib_dir outdir run_dir block mem_name wordsnumber memlength bitsnumber datawidth ringwidth ringwidth muxwidth varMuxWidth viayer varVLayer hlayer varHLayer frequency frequency codefile codefile topmetal topmetal area y n Please see section Parameters under GUI and Shell Commands for details explanation Example VeriSilicon GSMC 0 18um Syn DROM Compiler User s Guide Using the ROM Compiler Bsiticon 11 MC lib gsmc_drom 18 block DROM2048X16 wordsnumber 2048 bitsnumber 16 muxwidth 16 vlayer m3 hlayer m4 frequency 100 codefile DROM2048X16 topmetal m4 This command will generate a ROM name of DROM2048X16 with 2048 words 16 bits 16 column multiplexer width frequency 100MHz metal layer 3 as the vertical ring la
7. le compiler You can click on the browse button to find the valid library you have installed rundir Running Directory Specify the output directory of the ROM compiler The directory name can be any valid path name supported by the system The default is current directory block Block Name Specify the block name The block name can include any alphanumeric value and must be unique to avoid name conflicts for blocks within the same library It is recommended that a block name is no more than 16 characters for we will identify two blocks by their first 16 letters The default is DROM4096X32M8 wordsnumber Number of Words Specify the number of words in the block The default value is 4096 The range for words can be 64 to 32768 The following gives the detailed information Mux Number of words Increment 8 64 to 8192 Mux 8 16 128 to 16384 Mux 8 32 256 to 32768 Mux 8 bitsnumber Number of Bits Specify the number of bits in the block The default value is 32 The range for bits can be 2 to 128 The following gives detailed information Mux Number of Bits Increment 8 2 to 128 1 16 2 to 128 1 32 2 to 64 1 ringwidth Ring Width Specify the ring width of the block in um The default value is 5 The minimum is 2 The designer must decide the ring width based on the power analysis
8. te memory blocks via a friendly GUI or shell commands The compiler supports a comprehensive range of word length and bit length While satisfying speed and power requirements it was optimized for area efficiency VeriSilicon GSMC 0 18um Synchronous Diffusion ROM compiler uses four metal layers within the blocks and supports metal 4 5 or 6 as the top metal Dummy bit cells are synthesized with the intention to enhance reliability 1 2 Features e High Density e High Speed e Size Sensitive Self time Delay for Fast Access and Zero Hold Time e Automatic Power Down 1 3 Operating Conditions The following table gives the recommended operating conditions for memory blocks generated by ROM compiler Parameter Minimum Maximum Supply Voltage 1 62V 1 98V Temperature 0 C 125 C 1 4 Pin Descriptions The following table gives detailed information of pins for ROM Bus index in descending order VeriSilicon GSMC 0 18um Syn DROM Compiler User s Guide Introduction 5 Pin Description D l Data output AL Address input CSB Chip enable input low enable CLK CLK input positive edge active 1 5 Parameter Range Parameter Range Memory Array Range 128 to 2M Bits Data Width 2 to 128 Bits Increments of 1 ROM Address Depth 64 to 32768 Words Increments of 8 X Column Mux The following list shows the changes of width and height when col
9. umn mux is set to different values Suppose when column mux is 16 the width and height are standard Column Mux Width Height 8 1 2 2 16 1 1 32 2 1 2 Top Metal m4 m5 or m6 The same drive as INVHD4X cell in VeriSilicon GSMC Output Drive Strength f 0 18um High Density Standard Cell Library 1 6 ROM Floor Plan Memory Anay Row decoder Memory Array Column Decoder Sense Amplifier CLK Control Sense Arnphifier EN Data Output Data Output Fig 1 ROM Floor Plan VeriSilicon GSMC 0 18um Syn DROM Compiler User s Guide Introduction Timing Diagram 2 1 Timing Specifications for Diffusion ROM This section specifies the timing specifications for the diffusion ROM Ali CLK Dfi CSB Fig 2 Read Function Timing Timing Parameters The following table specifies the timing parameters in the datasheet generated by the ROM compiler Timing Parameters Parameter Symbol Cycle time teyc Access time ta Address setup time tas Address hold time tah Chip enable setup time tes Chip enable hold time tch Parameters values are dependent on the load Power Parameters The following table specifies the power parameters in the datasheet generated by the ROM compiler VeriSilicon GSMC 0 18um Syn DROM Compiler User s Guide Timing Diagram 7 Power Parameters Parameter Symbol Average current lavg Pe
10. wing to cshrc file pro m source vsmcrc 6 Modify vsmerc file as the following and source it setenv VERISILICON_MC_DIR lt install_dir gt After a successful installation the following directory structure will be created under lt install_dir gt gsmc_drom 18 This directory contains the technical files and library files of the ROM VeriSilicon GSMC 0 18um Syn DROM Compiler User s Guide Using the ROM Compiler Bsiticon 9 The following table lists the names of the executable files in the installation directory and its description compiler Name Description MC The executable file of ROM compiler NOTE Be sure not to edit any files in lt install_dir gt directory 3 4 Inputs and Outputs The ROM compiler allows users to define the following input parameters for a specific ROM block Library Running Directory Block Name Number of Words Number of Bits Ring Width Frequency MHz ROM Code File Multiplexer Width Horizontal Ring Layer Vertical Ring Layer Top Metal Layer The ROM compiler generates the following output files GDSII Layout File GDSII format LVS Netlist CDL format Verilog Model Code TLF Timing Synopsys Model Datasheet ROM code file LEF view Antenna LEF view VeriSilicon GSMC 0 18um Syn DROM Compiler User s Guide Using the ROM Compiler Bsiticon 10 After inputting the parameters users should wait a few minutes for the outputs to b
11. yer metal layer 4 as the horizontal ring layer and metal layer 4 as the top metal layer according to the code file DROM2048X16 Using Graphical User Interface GUI We provide a friendly GUI to enable the users to configure parameters and generate all the outputs in the directory specified From the shell type the commands as follows cd lt running_dir gt MC Click on the browse button to select the ROM s library then the following GUI window for ROM compiler will appear on your screen Es Library GSMC 18u Diffusion ROM Running Directory Block Name DROM4096X32M5 Number of Words 4096 Number of Bits 32 Ring Width lt um gt 5 000000 Frequency lt MHz gt 100 000000 Rom Code File NOCODE Multiplexer Width g 16 32 Horizontal Ring Layer 3 E m3 m4 Vertical Ring Layer C m3 m4 Top Metal Layer m5 m6 AREA lt um x um gt width x height Foretell Default Generate Exit Fig 3 the ROM Compiler GUI Fill content in the blank for each option and click the proper button you will get your results VeriSilicon GSMC 0 18um Syn DROM Compiler User s Guide Using the ROM Compiler Bsiticon 12 Parameters under GUI and Shell Commands The section specifies detailed descriptions of the parameters of the ROM compiler and their corresponding default values Parameter under Shell Commands Parameter under GUI Description lib Library Specify the library directory used by the Register Fi
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