VeriSilicon GSMC 0.15um Syn. DROM Compiler User's Guide
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1. 8 64 to 8192 Mux 8 16 128 to 16384 Mux 8 32 256 to 32768 Mux 8 Specify the number of bits in the block The default value is 32 The range for bits can be 2 to 128 The following gives the detailed information bitsnumber Number of Mux Number of Bits Increment Bits 8 2 to 128 1 16 2 to 128 1 32 2 to 64 1 Specify the ring width of the block in um ringwidth Ring Width The default value is 5 The minimum is 2 The designer must decide the ring width according the power analysis Specify the frequency of the clock of the chip in MHz The default frequency Frequency value is 100MHz It dose not affect anything now and it is just reserved for future usage VeriSilicon GSMC 0 15um Syn DROM Compiler User s Guide Using the ROM Compiler siticon 14 Specify the code file of the ROM Please refer to the following figure for detailed information about the code file format If codefile CodeFile customer doesn t specify the code file or the code file he specifies doesn t exist all the bits of the ROM block will be set to 1 automatically The default is NOCODE Specify the column multiplexer width The default value is 8 There are three buttons for your choice 8 Multiplexer muxwidth idth 16 or 32 When this option is set to different values the width l and height of the block will change correspondingly For detailed information please refer to Parameter Range section on page 5 i2. varMuxWidth viayer varVLayer hlayer varHLayer frequency frequency no use now codefile codefile topmetal topmetal area y n Please see section Parameters under GUI and Shell Commands for details explanation VeriSilicon GSMC 0 15um Syn DROM Compiler User s Guide Using the ROM Compiler Bsiicon 12 Example MC lib gsmc_drom 15 block DROM2048X16 wordsnumber 2048 bitsnumber 16 muxwidth 16 vlayer m3 hlayer m4 frequency 100 codefile DROM2048X16 topmetal m4 This command will generate a ROM name of DROM2048X16 with 2048 words 16 bits 16 column multiplexer width frequency 100MHz metal layer 3 as the vertical ring layer metal layer 4 as the horizontal ring layer and metal layer 4 as the top metal layer according to the code file DROM2048X16 Using Graphical User Interface GUI We provide a friendly GUI to enable the users to configure parameters and generate all the outputs in the directory specified From the shell type the commands as follows cd lt running_dir gt MC Click on the browse button to select the ROM s library then the following GUI window for ROM compiler will appear on your screen HC Library GSH 154 Diffusion ROW Bunning Directory Block Mame DRM Sh RI 2HE Humber of Worda Jr Mimbar of Rita Bing Width um 5 ROG Frequency lt Hilz gt jue Rem Coda Fila WEYHE KHultipleser Width Horizontal Bing Layer Wertical Ring Layer Top Metal Layer AREA Som K um w
3. Parameters Parameter Symbol Cycle time tcyc Access time ta VeriSilicon GSMC 0 15um Syn DROM Compiler User s Guide Timing Diagram siicon 8 Address setup time tas Address hold time tah Chip enable setup time tes Chip enable hold time tch Output enable to hi Z time tiz Output enable active time thz Parameters values are load dependent Power Parameters The following table specifies the power parameters in the datasheet generated by the ROM compiler Power Parameters Parameter Symbol Average current lavg Peak current Ipeak lavg IS the average current in A 100MHz unit The average current in the datasheet is achieved under below assumption 1 Input net transition is 0 2ns 2 Output port capacitance is OpF The total average current of the memory than can be estimated according following equation lavg lag F 1 2 C V f N Where lavg the total average current of the memory A F the frequency of clock 100MHz C the average capacitance of output port F V the voltage supply V f the frequency of output port Hz N switched ports number ipeak IS the peak current of memory during operation in A unit VeriSilicon GSMC 0 15um Syn DROM Compiler User s Guide Timing Diagram 3 1 3 2 3 3 siticon 9 Using the ROM Compiler System Requirement Before installation m
4. Synopsys Model net Cdl netlist gds GDS file ds Datasheet V Verilog Model vhd VHDL Model dat Rom Code File lef LEF view antenna lef Antenna LEF view antenna clf Antenna CLF model And click on Exit button to quit the ROM compiler VeriSilicon GSMC 0 15um Syn DROM Compiler User s Guide Using the ROM Compiler
5. Vertical Specify which metal layer will be the vertical ring layer It can vlayer E Ring Layer only be m4 Horizontal Specify which metal layer will be the horizontal ring layer It can hlayer Ring Layer only be m3 topmetal Top Metal Specify the top metal layer It can be m4 m5 or m6 The default Layer value is m4 area yin Once area y is used the compiler will only generate a width X height report Default is n The following illustrates the format of code file of a ROM name of DROM64 x 7 with 64 words 7 bits Column 1 bit 6 the highest bit Line 1 address 0 Line 64 address 63 Column 7 bit 0 the lowest bit 1010001 S 1111111 0000000 S 0011110 1100111 Each character of a line indicates the bit of a word 3 6 Generating the Outputs When you click on the Default button in the GUI window the ROM compiler will automatically load the default parameters of the ROM and generate the ROM based on the default parameters To generate the outputs click on Generate button All the outputs are VeriSilicon GSMC 0 15um Syn DROM Compiler User s Guide Using the ROM Compiler siticon 15 generated according to the generic parameters you set and place in the user specify running directory lt running_dir gt The following table lists the detailed description of the output files Name Description tlf TLF Model lib
6. blocks by a friendly GUI or shell commands The compiler supports comprehensive range of word length and bit length While satisfying speed and power requirements it was optimized for area efficiency VeriSilicon GSMC 0 15um Synchronous Diffusion ROM compiler uses three metal layers within the blocks and supports metal 4 5 6 or 7 as the top metal Dummy bit cells are designed in with the intention to enhance reliability 1 2 Features e High Density e High Speed e Size Sensitive Self time Delay for Fast Access Time and Zero Hold Time e Automatic Power Down 1 3 Operating Conditions The following table gives the recommended operating conditions for memory blocks generated by ROM compiler Operating Conditions Parameter Rating Supply Voltage 1 5V 1 35V to 1 65V Temperature 25 C 0 C to 125 C VeriSilicon GSMC 0 15um Syn DROM Compiler User s Guide Introduction 1 4 Pin Descriptions QBsiticon 5 The following table gives detailed information of pin descriptions for ROM Bus index descending ordered Pin Description DOUT i Data output ADL I Address input CEN Chip enable input low enable CLK CLK input positive edge active OE Output enable high enable 1 5 Parameter Range Parameter Range Memory Array Range 128 to 2M Bits Data Width 2 to 128 Bits Increments of 1 ROM Addres
7. specific ROM block Library Running Directory Block Name Number of Words Number of Bits Ring Width Frequency MHz no use now ROM Code File Multiplexer Width Horizontal Ring Layer Vertical Ring Layer Top Metal Layer The ROM compiler generates the following output files GDSII Layout File GDSII format LVS Netlist CDL format Verilog Model Code VHDL Model Code TLF Timing Synopsys Model Datasheet ROM code file LEF view VeriSilicon GSMC 0 15um Syn DROM Compiler User s Guide Using the ROM Compiler siicon 11 Antenna LEF view Antenna CLF model After inputting the parameters users should wait a few minutes for the outputs to be generated by the ROM compiler automatically 3 5 Getting Started There are two ways to start ROM compiler as follows Using Shell Commands Users can launch ROM compiler using commands line in the shell window Enter the following commands to launch the ROM compiler directly from the shell cd lt running_dir gt MC options with parameters The lt running_dir gt is the directory which the ROM compiler run in All the outputs will be generated in this directory Make sure that the running directory lt running_dir gt is different from the installation directory lt install_dir gt The following options can be specified in the command line lib lib_dir outdir run_dir block mem_name wordsnumber memlength bitsnumber datawidth ringwidth ringwidth muxwidth
8. VeriSilicon GSMC 0 15um Synchronous Diffusion ROM Compiler User s Guide siticon Trademark Acknowledgments VeriSilicon amp the VeriSilicon logo are the trademarks of VeriSilicon Microelectronics Shanghai Co Ltd All other products and company names mentioned may be the trademarks of their respective owners 2002 VeriSilicon Microelectronics Shanghai Co Ltd All rights reserved Printed in P R China VeriSilicon Microelectronics Shanghai Co Ltd reserves all its copy rights and other intellectual property rights ownership powers benefits and rights arising or to arise from this manual All or part of the contents of this manual may be changed by VeriSilicon Microelectronics Shanghai Co Ltd without notice at any time for any reason including but not limited to improvement of the product relating hereto VeriSilicon Microelectronics Shanghai Co Ltd shall not undertake or assume any obligation responsibility or liability arising out of or in respect of the application or use of the product described herein except for reasonable careful and normal uses Nothing whether in whole or in part within this manual can be reproduced duplicated copied changed or disposed of in any form or by any means without prior written consent by VeriSilicon Microelectronics Shanghai Co Ltd VeriSilicon Microelectronics Shanghai Co Ltd 3F Building 1 No 200 Zhangheng Road Zhangjiang Hi Tech P
9. ake sure that the following minimum host configuration is available e Sun Microsystem s Solaris Software Environment The ROM compiler requires UNIX and X Window as its GUI was developed with Motif Installing ROM Compiler To install ROM compiler please follow the instructions bellow 1 Create an installation directory where you wish to install the ROM compiler NOTE lt install_dir gt will stand for the directory you have created for installation hereafter cd lt install_dir gt gunzip lt lt release_compressed file gt tar xvf Copy vsmerc file to the home directory Add the following to cshrc file pro m source vsmcrc 6 Modify vsmerc file as the following and source it setenv VERISILICON_MC_DIR lt install_dir gt After successful installation the following directory structure will be created under lt install_dir gt gsmc_drom 15 This directory contains the technology files and library files of the ROM VeriSilicon GSMC 0 15um Syn DROM Compiler User s Guide Using the ROM Compiler Bsiicon 10 The following table lists the names of the executable files in the installation directory and its description compiler Name Description MC The executable file of ROM compiler NOTE Be sure not to edit any files in lt install_dir gt directory 3 4 Inputs and Outputs The ROM compiler allows users to define the following input parameters for a
10. ark Pudong New Area Shanghai 201204 P R China Tel 86 21 5131 1118 Fax 86 21 5131 1119 Web http www verisilicon com Bsiicon 3 Contents Chapter 1 Introduction 4 1 1 Compiler Description 24424444nnnennnnnnneennnnnn 4 12 Feat ES ceana i 4 1 3 Operating Conditions ccccceeeeeeeeeeeeeeeeeeeeeeeeeeeees 4 1 4 Pin DesetploB en 5 1 5 Parameter Rande 5 1 6 ROM Floor Planes 6 Chapter 2 Timing Diagram 7 2 1 Timing Specifications for Diffusion ROM 7 Timing Parameters nnnnnnnnsnnnnnnnnnnnnnnnnnnnnnn 7 Power POlAIMNGVENS sisiscnasincsbnssisueinuaerasionasiasstins 8 Chapter 3 Using the ROM Compiler 9 3 1 System Requirement cee eee ceeeeeeeeeeeeeeeeeeeeeeees 9 3 2 Software Environment 2444444snnnnnnnn nennen 9 3 3 Installing ROM Compiler su444 nennen 9 3 4 Inputs and Dipl 10 35 Getting Started esorta sioe 11 Using Shell CommandsS 11 Using Graphical User Interface GU I 12 3 6 Generating the Outputs 2244000ennnnnn nennen 14 VeriSilicon GSMC 0 15um Syn DROM Compiler User s Guide Introduction Bsiicon 4 Introduction 1 1 Compiler Description VeriSilicon GSMC 0 15um Synchronous Diffusion ROM compiler optimized for Grace Semiconductor Manufacturing Corporation GSMC 0 15um Logic 1P7M Salicide 1 5 3 3V process can flexibly generate memory
11. idth haight Feratall Default Fenerate Exit Fig 1 the ROM Compiler GUI Fill content in the blank for each option and click the proper button you will get your results VeriSilicon GSMC 0 15um Syn DROM Compiler User s Guide Using the ROM Compiler siticon 13 Parameters under GUI and Shell Commands The section specifies detailed descriptions of the parameters of the ROM compiler and their corresponding default value Parameter under Parameter Shell Description under GUI Commands Specify the library directory used by the Register File compiler lib Library You can click on the browse button to find the valid library you have installed Specify the output directory of the ROM compiler Running rundir Direct The directory name can be any valid path name supported by the irectory system The default is current directory Specify the block name The block name can include any alphanumeric value and must be unique to avoid name conflicts for blocks within the same block Block Name library It is recommended that a block name is no more than 16 characters for we will identify two blocks by their first 16 letters The default is DROM4096X32M8 Specify the number of words in the block The default value is 4096 The range for words can be 64 to 32768 5 Number of The following gives the detailed information nee Words Mux Number of words Increment
12. s Depth 64 to 32768 Words Increments of 8 X Column Mux The following lists the changes of width and height when column mux is set to different values Suppose when column mux is 16 the width and height is a standard Column Mux Width Height 8 1 2 2 16 1 1 32 2 1 2 Top Metal m4 m5 m6 or m7 Output Drive Strength The same drive as INVHD8xX cell in VeriSilicon GSMC 0 15um High Density Standard Cell Library VeriSilicon GSMC 0 15um Syn DROM Compiler User s Guide Introduction 1 6 ROM Floor Plan Memory Array Row decoder Memory Array Column Decoder Sense Amplifier CLK control Column Decoder Sense Amplifier Data Output CLK amp CEN amp AD amp OE Data Output Fig 1 ROM Floor Plan siicon 6 VeriSilicon GSMC 0 15um Syn DROM Compiler User s Guide Introduction Bsiicon 7 Timing Diagram 2 1 Timing Specifications for Diffusion ROM This section specifies the timing specifications for the diffusion ROM Fig 2 gives the read function timing diagrams of diffusion ROM tas tah AD i CLK DOUTIi CEN Fig 2 Read Function Timing Fig 3 gives the diffusion ROM output enable timing diagrams OE t z DOUTIi Fig 3 Output Enable Function Timing Timing Parameters The following table specifies the timing parameters in the datasheet generated by the ROM compiler Timing
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