UG-2896GDEAF11 EVK user guide v1.0 - data
Contents
1. TSP A RE UG 2896GDEAF11 Application note Evaluation Kit User Guide Writer Sean Lai Email sean lai univision com tw Version Preliminary Si AIZAT Contents 1 REVISI N HISTORY na ab 3 2 A Senen unir rada il da a atea estalla dae 4 A Sn EP E 5 4 TIMMING CHARACTERISTICS ENN 7 4 1 6800 Series MPU parallel Interface aen 7 4 2 8080 Series MPU parallel Interface o oo Wo Wo W W oo 8 43 A bItSPI Hano enam 9 e WE ae Inten ea O 10 5 EV K USeiintrodU CO E 11 6 Power down and Power up Geoguence oo eee c Wo W Woo 13 7 How to USE SSD 1351 MOOUIE ooooooooo oom ri 14 TA na Step TOW aa aa Na 14 7 2 RD recommend Initial Code for 80 Interface 15 7 2 1 Sub Function for 80 Interface EEN 17 Si A RE Ing 2 T R el Z 2 Schematic 2 1 EVK Schematic te D oF Cd Le Cd r ae 53 pal oq E E E S a G gt Les E EH RAJ HA es K3 C3 r ale z SI S CH HiH ele J ae Eg ES a E El El z Gol 23 Le 2 SA al al bal T 1q a Ss a es Ed ES 2 5 rd K CI bal ZC Hea T es MU e SE ea SHA Pcs Gs Ei 3 cul bea a E 48888 L Tora DOI a EE HI IDA S T MI 223 a e It LA el gt aa Si A RE 3 Symbol define DO D7 Th2. 35 write d 37 write d 39 write d 42 write d 45 write d 48 write d 51 write d 54 write d 57 write d 60 write d 63 write d 66 write d 69 write d 72 write d 76 write d 80 write d 84 write d 88 write 01921 write d 96 write d 100 write d 104 write d 108 write d 112 write d 116 write d 120 write d 125 write d 130 write d 135 write d 140 write d 145 write d 150 write d 155 write d 160 write d 165 write d 170 write d 175 write d 180 write c 0xbb write d 0x17 write c Oxbe write d 0x05 TSP ARA 1150 1151 1152 1153 1154 1155 1156 157 1158 1159 60 1161 62 1163 Set pre charge voltage of color AB C Set VcomH Si A RAE write_c Oxc1 Set contrast current for AB C write d 0xc8 write d 0x80 write d 0x8a write c 0xc7 Set master contrast write d 0xOf write c Oxca Duty write d 0x5f write c Oxaf Display on 7 2 1 Sub Function for 80 Interface void write c unsigned char out command DC 0 CS 0 RW 0 P1 out_command RW 1 CS 1 DC 1 void write_d unsigned char out_data DC 1 CS 0 RW 0 P1 out_ data RW 1 CS 1 DC 0 Note 1 For 80 series CPU interface 2 For 8 Bbit Ttiple Transfer 65K support 17
3. HW tp Lr i tes Write Low Time tes Chip select setup time tesu Chip select hold time to read signal Chip select hold time Table 3 8080 Series MPU parallel Interface Timing Characteristics A RAE 4 3 4 Wire SPI Interface CSH C35 CLEL e tr DEW 5 90 Valid Data TX Ces N SCLK R W RST 500400 or X n Kas KK Ko X n EE Figure 3 Serial interface characteristics 4 wire SPI ss 24 to 2 6V Vopio l 65V oz 28V Ta 25 C e a FS tan AddressHoldTime Sis Chip Select Setup Time 240 e E EE ES ae Write Data Setup Time O O O OOO O O O OO OOOO yO Write Data Setup Time Vaate Data Hold Time PENE Glock Lew 7 RN Ep en Clock HighTime LA jas e TERA LR FallTime Sis Table 4 Serial Interface Timing Characteristics 4 wire SPI TSP A RAE 4 4 3 Wire SPI Interface CSF Y gag KK pe NBR KX D4 Ko Ko XK DX DO CS less loa to CLEH CLEL SCLK F We W R tr te T nw 2 Figure 4 Serial interface characteristics 3 wire SPI L VY nn S Vee 2 4 16 2 6V Vonio 1 65V Va 28V Ta 25 C twee Clock CyeleTime ST ss Chip Select Setup Time 20 as Write Data Setup Time 2 Write Data Hold Time 15 Table 5 Serial Interface Timing Characteristics 3 wire SPI 10 Univision ISHER RR 9 5 EVK use introducti
4. PIOO Detail refer to Command B5h GPIO1 Detail refer to Command B5h Si A RE 4 TIMMING CHARACTERISTICS 4 1 6800 Series MPU parallel Interface wwe E CYCLE PW CSH tp Tw D 17 07 WRITE D 17 0 0 log Note D when 8 bit used D 7 0 instead when 16 bit used D 15 0 instead when 18 bit used 13 1 7 0 instead Figure 1 6800 series MCU parallel interface characteristics Von Vss 2 4 to 2 6V Vnpro 1 63V Ve 2 8V T 25 C pp Parameter Clock Cycle Time Tas Address Setup Time Write Data Hold Time 7 Read Data Hold Time 20 Output Disable Time Access Time Clup Select Low Pulse Width read Chip Select Low Pulse Width write Chip Select High Pulse Width read 4 S rT Ar 7 c E j Rise Time Fall Time Table 2 6800 Series MCU Parallel Interface Timing Characteristics t TSP A RE 4 2 8080 Series MPU parallel Interface Write cycle CSF DC 7 X E t ai 4 DSi Leid Read cycle CSH tos j WE D C RD Joer lop DII 7 0 8 TTA Cl Wu Lau Note T when 8 bit used Di 7 0 instead when 16 bit used 15 0 instead when 18 bit used DII 7 0 instead Figure 2 8080 Series MCU Parallel Interface Timing Characteristics fon Ves 2 4 to 2 6V Vppro 1 69V Va 2 8V Ta 25 C Parameter Address Setup Time Address Hold Time Write Data Setup Time V
5. ese pins are bi directional data bus connecting to the MCU data bus For SPI application D O SCLK 8 D 1 SDIN Unused pins are recommended to tie LOW except 12 BS0 BS1 BS2 BS3 MCU bus interface selection pins Select appropriate logic setting as described in the following table BS3 and BS2 are command programmable by command ABh reset 00 BS1 and BSO are pin select J3 J4 Regarding to the application of BS3 and 852 they should be fixed as 00 BS 3 0 XX00 4 line SPI XXO1 3 line SPI 0011 8 b1t 6800 parallel 5 0010 bit 8080 parallel Table 1 MCU Interface Selection Setting E RDA This pin is MCU interface input When 6800 interface mode is selected this pin will be used as the Enable E signal Read write operation is initiated when this pin is pulled HIGH and the chip is selected When 8080 interface mode is selected this pin receives the Read RD signal Read operation is initiated when this pin is pulled LOW and the chip is selected When serial interface is selected this pin E RD must be connected to Vss R W This pin is read write control input pin connecting to the MCU interface When 6800 interface mode is selected this pin will be used as Read Write R W selection input Read mode will be carried out when this pin is pulled HIGH and write mode when LOW When 8080 interface mode is selected this pin will be the Write WR input Data write operation is initiated when this pi
6. n is pulled LOW and the chip is selected When serial interface is selected this pin R W WR must be connected to Vss D C This pin is Data Command control pin connecting to the MCU When the pin is pulled HIGH the data at D 7 0 will be interpreted as data A RAE When the pin is pulled LOW the data at D 7 0 will be interpreted as command 4 Wire SPI Interface D C pin Data Command control pin connecting to the MCU 3 Wire SPI Interface D C pin Tie Low RES This pin is reset signal input When the pin is pulled LOW initialization of the chip is executed Keep this pin pull HIGH during normal operation CS This pin is the chip select input connecting to the MCU The chip is enabled for MCU communication only when CS is pulled LOW VCC Power supply for panel driving voltage This is also the most positive power voltage supply pin It is supplied by external high voltage source VCI Low voltage power supply GND Power supply ground VDDIO Power supply for interface logic level It should match with the MCU interface voltage level and must be connected to external source VSL This is segment voltage reference pin When external VSL is not used this pin should be left open When external VSL is used connect with resistor and diode to ground details depend on application VcomH COM signal deselected voltage level A capacitor should be connected between this pin and Vss G
7. on ck module HE EE E 11 Univision Figure 6 The combination of the module and EVK Because the package of UG 2896GDEAF11 is COF that the connect pads are on the top of the module and the connector which on the EVK PCB board is double size connect type So when assemble the module with EVK The module must face up first and plug into the connector When finished assembled the module and EVK then push the locking pad to lock the module See the figure 6 When finished assembled the module and EVK User can use leading wire to connect EVK with customer s system The example shows as figure 7 Figure 7 control MCU connect with EVK Note 1 Itis the external most positive voltage supply In this sample is connected to power supply 12 A RAE 6 Power down and Power up Seguence To protect OLED panel and extend the panel life time the driver IC power up down routine should include a delay period between high voltage and low voltage power sources during turn on off Such that panel has enough time to charge up or discharge before after operation Power up Seguence 1 Power up VCI and VDDIO sik 2 Send Display off command me aes 3 Driver IC Initial Setting 4 Clear Screen Wan 5 Power up Vcc 6 Delay 100ms Va when Var 15 stable V Ground 7 Send Display on command Power down Sequence Send Display off command ES T 0 VCI VDDIO off 1 2 P
8. ower down Vcc 3 Delay 100ms 4 V cc Power down VCI and VDDIO Va V k Ground 13 Si A RE 7 How to use SSD1351 module 7 1 Initial Step Flow Initial IC Clear RAM Display on Start send write c Oxfd write d 0xb1 write c Oxae write c 0x15 write d 0x00 write d 0x71 write c 0x75 write d 0x00 write d 0x5f write c Oxa0 write d 0x74 write c Oxa1 write d 0x00 write c Oxa2 write d 0x00 write c Oxa6 write c Oxab write d 0x00 write c Oxaf write c 0xb1 write d 0x32 write c 0xb3 write d 0xf1 0xb4 write Oxa0 write d write d write d Oxb5 0x55 write c 0xb5 write d OxOA write c 0xb6 write d 0x01 TSP A RAE 7 2 RD recommend Initial Code for 8080 Interface Set Command Lock Display off set column set row Set Re map Color Depth Set display start line Set display offset Normal display Set Function selection Set Sleep mode Set pre amp dis charge clock 8 frequency Set Segment LOW Voltage Set GPIO Set Second Pre charge Period Set Gray Table 0 1 Ve 15 write d 12 write d 13 write d 14 write d 15 write d 16 write d 17 write d 18 write d 19 write d 21 write 012231 write 01251 write d 27 write 01291 write d 31 write d 33 write d
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