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Renesas Starter Kit+ for RZ/A1H User's Manual

1. R20UT2587EG0200 Rev 2 00 Mar 21 2014 RENES Page 13 of 58 RSK RZA1H 3 Board Layout 3 E LOJ Ca OM E EEB BEI TAPERS e P rss cet 5 Ge zs E Bund HELASO EI AE ol ol Al En ial S 2 E E B 0216 os LEI Ec 54 DOJ EA EE EEERIEE B ors rs CJ Lo 3 sl l s iro ku o rd d Bf ea Ht E HE Figure 3 4 Bottom Side Component Placement R20UT2587EG0200 Rev 2 00 ENESAS Page 14 of 58 Mar 21 2014 RSK RZA1H 4 Connectivity 4 1 Internal RSK Connections The diagram below shows the RSK board components and their connectivity to the MCU PMOD interface 2 channels Audio CODEC USB Serial Interface 3x Power LEDS SDRAM BIMB 512Mh 4x User LEDs PORTS E NOR Flash 64MB i 512Mb SDCARD Slot MMCCARD Slot BUS NAND Flash 256MB 2Gb OPI Flash 128MB 1Gb BMB 1G NAND EEPROM 16kB Composite Video IG Ethernet MA aksa Au CVin thermal MAC Storage USB CAN 2 channels USB GIE Mi 1xHost Function video ector l default as Host 8 or 16 bit possible RGB888 RMI 1xFunction Host selected 8 bit default as Function SIM Card Fads Only Not fitted CMOS Camera Interface Connector Only Mo Camera Sal Interface Pin header only Debugger JLIMK 20pin ULINKZ 0pin EIM External display Panel T Projective Capacitive touch 1024 x 800 SPDIF Figure 4 1 Internal RSK Block
2. 20 BD3 P630D5 21 BD4 P64A2 22 BD P65Cl 2 BD6 P66D2 24 BD7 P67 D1 25 BD 0 P78K4 Riss 26 BW P75J1 27 R164 2 BB P68E3 30 BD P69E2 31 33 35 L4 18 37 BA16 gt P88V2 38 BA17 PBOVS 39 BA18 P810W2 40 BA9 P811w3 41 BAO P812Y1 42 BA21 P8 3VA 43 BA22 P814Y2 44 BCKIO CKIO VI 45 BWAT P113 Y18 46 BCKE P7AJ2 47 BWE1 DOMLU P77K2 48 BWEO DOMLL P7 6K3 49 B AS P73 3 R173 50 BRAS P2M Table 7 3 Application Header JA3 Connections R20UT2587EG0200 Rev 2 00 ENESAS Page 42 of 58 Mar 21 2014 RSK RZA1H 7 Headers Table 7 4 below lists the connections of the Misc Connector CN15 Misc Connector CN15 Mises Connector CN Header Name MCU Link Header Name MCU Link Port Pin Required Port Pin Required P2 11 E19 e eel 1 P2 10 B22 MOSI4 PEL _EN1 BA24 P9 0 AB2 P2 RSPCK4 Set _EN1 BA25 P9 1 AA3 P2 E SSL40 Set _EN1 P5B 10 P5 10 B7 R207 Table 7 4 Connector CN15 Connections Table 7 5 below lists the connections of the application header JA5 Application Header JA5 JA5 B Header Name Link Header Name Link Port Pin Required pe Pin P1 12 P1 12 AB19 R307 2 OPEN aia rume ree oe 5 owe Peter mee 5 Gou PSSAT moa 7 omeno P
3. 4 CPU LOADER PROGRAM BOOT PROCESS 16 KB QSPI INTERFACE CHANNEL O PORTO 8 1 DUAL QUAD BIT MODE OX20023FFF 0X20024000 OXO3FFFFFF RAM MEMORY FOR USER CODE 1 OX20XXXXXX QSPI DUAL QUAD BIT BUS AREA CHANNEL 0 amp 1 64 MB SERIAL MEMORY 2 4B RUNNING PROGRAM FROM RAM AFTER COPY 0X00000000 4 IF VALID PROGRAM DETECTED USER BOOT LOADER CHOOSES TO COPY TO RAM 1 AND RUN ORRUN IN PLACE 0X18000000 OX00003FFF 0X00040000 LOADER PROGRAM OX1807FFFF 0X18080000 CPU USER PROGRAM QSPI INTERFACE 4A RUNNING CHANNEL O PROGRAM FROM DOSPI PORTO amp 1 DUAL IN PLACE QUAD BIT MODE OXO3FFFFFF OX1BFFFFFF Figure 8 2 Boot process of user code stored in QSPI devices QSPI Boot Process 1 Initiation of the QSPI Interface Channel 0 in Single Bit mode Following a reset the RZ A1 executes the Boot Program located in the high exception vector address OxFFFFOOOO which then configures the QSPI bus Channel 0 Port 0 only in Single Bit mode and external address space read mode ready to read directly from the connected serial flash memory Execution of user code in this configuration is possible but will be slower than necessary Therefore a small User Boot Loader is provided 2 Transfer of the Loader Program The User Boot Loader Program copies itself to internal RAM and executes here The Loader program ca
4. COMA COMO Click OK to complete the process R20UT2587EG0200 Rev 2 00 RENESAS Page 27 of 58 Mar 21 2014 RSK RZA1H o User Circuitry 5 17 Pmod Module Connectors A Pmod Compatible debug LCD module is supplied with the RSK and should be connected to the PMOD1 header Care should be taken when installing the LCD module to ensure pins are not bent or damaged The LCD module is vulnerable to electrostatic discharge ESD therefore appropriate ESD protection should be used The Digilent Pmod Compatible header uses a SPI interface Some RSKs will be provided with a monochrome display others will have a colour display Code for the appropriate display will be included in the product software support Connection information for the Digilent Pmod Compatible header is provided in Table 5 18 for Pmod connector 1 and Table 5 19 for Pmod connector 2 Please note that the connector numbering adheres to the Digilent Pmod standard and is different from all other connectors on the RSK designs Details can be found in the Digilent Pmod Interface Specification Revision November 20 2011 Digilent Pmod Compatible Header Connections Circuit Net Name MCU I Circuit Net Name PMOD1 CS P14 B17 PMOD INT A18 Port Expander 1 P11 14 MOSI1 P11 14 H3 PMOD1 RST IO 4 See section 5 5 3 Pesmo emis x s Poopo E Fe s ew eene 8 Bedv seve Table 5 18 PMOD 1 Header
5. Swa LANStap Option Ot On Signal name a mo MDrX Enable 1 o LORS 3 GAwmgEmbe 1 0 ELRXIK 3 Pw o ELIO 4 we o ELRO rume o erws eros MEN er ra 8 Fast J Std JK 1 0 ET TXCLK Table 6 18 Ethernet configuration via SW4 R20UT2587EG0200 Rev 2 00 ENESAS Page 38 of 58 Mar 21 2014 RSK RZA1H 6 Configuration 6 4 Jumper Link Configuration Table 6 19 describes the jumper link option configurations available on the RSK RZA1H board JP1 Enable SIM card 2 way communication or TX only Link 2 way communication enabled TXD and RXD connected to SIM TXD to SIM only JP3 Write protect NAND FLASH IC27 Jumper Position Link 1 2 Link 2 3 R233 Not Fitted NAND FLASH IC27 not write protected NAND FLASH IC27 write protected Do NOT short pins 2 and 3 of JP3 when R233 is fitted which is default configuration P c n MCU Core Current Measurement Remove R24 and short JP4 with meter to measure MCU core current P c al Disable Ethernet MAC EEPROM write protection IC11 Link EEPROM IC11 write unprotected EEPROM IC11 write protected P MCU Port Pins Current Measurement Cc o Remove R26 and short JP6 with meter to measure MCU port pin current JP11 USB VBUS power select Link 1 2 BOARD 5V Link 2 3 VBUS JP12 USB VBUS1 power select Link 1 2 Link 2 3 BOARD 5V Power from connector CN9 pin1 VBUS1 JP18 NOR Flash Chip
6. Clock circuits are fitted to the RSK to generate the required clock signals to drive the MCU and associated peripherals Refer to the RZ A1H Group Hardware Manual for details regarding the clock signal requirements and the RSK RZA1H board schematics for information regarding the clock circuitry in use on the RSK Details of the oscillators fitted to the board are listed in Table 5 1 below GrysiaOscilator Funcion Default Placement Frequency Device Package Table 5 1 Oscillators 5 3 RCA Video Input The RSK board provides two channels of RCA video input to the RZ A1H MCU on connectors CN38 and CN39 These connect to the RSK RZA1H MCU on pins VIN1A B15 and VIN2A A15 respectively via 100nF decoupling capacitors Refer to the RSK RZA1H board schematics for further information 5 4 Switches There are five switches located on the RSK board The function of each switch and its connection is shown in Table 5 2 For further information regarding switch connectivity refer to the RSK RZA1H schematics When pressed the microcontroller is reset RES ROS PLO az P18 E ROS EL Table 5 2 Switch Connections R20UT2587EG0200 Rev 2 00 RENESAS Page 17 of 58 Mar 21 2014 RSK RZA1H o User Circuitry 5 5 Port Expander The RSK board utilises two port expander ICs IC34 and IC35 in order to provide more VO signals These devices are the CAT9554 from On Semiconductor For further information on these devices visi
7. W 102 HOLD 103 SPBSSL_1 SPBCLK_1 SPBMOO 1 SPBIOOO 1 PORTO SPBMIO 1 SPBIO10 1 SPBIO20 1 SPBIO30 1 SPBMO1 T SPBIOOT 1 PORT 1 SPBMI1 1 SPBIO11 1 SPBIO21 1 SPBIO31 1 Figure 5 5 1 RZ A1H SPI multi VO controller Each QSPI memory device can support one two or four simultaneous serial lines of VO Furthermore the controller allows each channel s ports to work in parallel providing up to eight simultaneous serial lines of VO in dual QSPI mode During the QSPI boot mode Port 0 is used and is accessed using only the clock SPBMOO and SPBMIO signals Single bit Single channel SPBSSL TTT SPBCLK Ff EF EI LI TI TI LI LIL Channel 0 Serial SPBMOO I SEE LL ODE EL KE SPBMIO Figure 5 5 2 Single bit single channel operation mode R20UT2587EG0200 Rev 2 00 TENESAS Page 21 of 58 Mar 21 2014 RSK RZA1H o User Circuitry It is important to recognise that these eight lines are serial inputs and are not operating on the same byte but successive bytes When operating over the two ports it should be noted that the memory structure is fundamentally different from single channel operation as lines 1 4 are working with the memory on Port 0 and 5 8 are working with Port 1 Figure 5 3 attempts to show this visually Single Channel Mode Serial Flash 0 Byte13 PORTO Byte14 Byte15 Wd E Byte16 Serial Flash 1 NOT ACCESSED Dual Channel Mode Serial Flash 0 Serial Flash 1 Fi
8. 05 00 0000 Ox5EFF FFFF GESPI Channel 0 Mirror Area Dx5800 0000 x5 FF FFFF C55 Mirror Area 05400 0000 Ox53FF FFFF C54 Mirror Area ox5000 0000 Ox4F FF FFFF CS3 Mirror Area 04 00 0000 Ox4EFF FFFF CS2 Mirror Area Oxd48OO 0000 Ox47FF FFFF C51 Mirror Area 04400 0000 Ox43FF FFFF CEO Mirror Area Oud DON 0000 uns RSK Memory GSF Channel 1 Bl SPI Channel O Bib Onboard HAND FLASH Ello C53 Space nat useable if On board SERAM is Active Onboard SDRAM 32Mh 7 Onboard HOF FLASH 328b Upper Address Function Lower Address On3F FF FFFF ME Ox3FFF Cono GOEFE BEEF Reserverd Dar EFC DO43FEF BEEF MO Dxw3FEF 4000 s3EEF SFEF Reserved Dar ooo Ox209F FFFF On Chip Large Capacity RAM Dez 0000 02001 FFFF On Chip data Retention FM 02000 0000 DxIFFF FFFF GESPI Channel 1 OxICOO 0000 DEFF FFFF SFI Channel O Oyl800 0000 DxI7FF FFFF CES OyI4QO 0000 xI3FF FFFF C54 0x1000 0000 Ox0FFF FFFF Cxi 0x0C00 0000 Ox0BFF FFFF Cxi 0x0800 0000 OEOTFF FFFF CS 00400 0000 0x03FF FFFF Eso prn OOO RSK Memory GSP Channel 1 Bb SPI Channel O Bb Onboard NANO FLASH B4Mb CSS Space not useable if On board SORAht is Active Onboard SDRAM 32hb 4 Onboard WOR FLASH 3204 To enable SDRAM JP18 must be open and SW6 3 must be in the ON position CS0 MBOOT 2 low To enable NOR FLASH JP18 m
9. MIRRORED VECTOR TABLE 0x60040000 The EXEC BASE variable specifies where in memory the user application code resides and executed from The QSPI load file uses the following variables EXEC BASE 0x18080000 MIRRORED VECTOR TABLE 0x60040000 LOAD BASE 0x20040000 As for the QSPI loadfile the user application resides in the EXEC BASE address It is mapped by the Load Program to the LOAD BASE address RAM to be executed from there An example of a mapping instruction to copy the user application code stored in the serial flash device to the RAM is shown below reset EXEC BASE AT LOAD BASE The NOR load file does not include a load base address It has an execution address set to 0x00000000 EXEC BASE 0x00000000 To change between the load files click on the project folder RZ A1H spibsc boot init RSK in the Project Explorer view Select File gt Properties gt C C Build gt Settings gt GCC Linker gt General Add linker script filet T FILE IProjDirPath f compiler specific GML DS 5 IRAM Id The RAM load file is configured by default in all samples other than the RZ A1H Tutorial RSK Change GNU DS5 SIRAM Id to GNU DS 5 QSPl Id to use the QSPI load file R20UT2587EG0200 Rev 2 00 ENESAS Page 51 of 58 Mar 21 2014 RSK RZA1H 8 Code Development 8 9 Dual QSPI Debugger Programming Settings Additional steps are required for connecting to the RSK RZA1H with a DS 5 project configured to run
10. uses multiplexing on various channels in order to increase the amount of available I O Table 5 22 Table 5 23 and Table 5 24 describe the signals being multiplexed and the signals that control them MCU Signal Routed to MCU P2 0 L21 P2 0 ETTXCLK ET TXCLK P2 0 100 P2 1 K22 P2 1 ETTXER ET TXER P2 1 101 P2 2 F21 P2 2 ETTXEN ET TXEN P2 1 102 P2 3 ETCRS ET CRS P2 1 103 P2 4 ETTXDO ET TXDO P2 1 104 P2 5 ETTXD1 ET TXD1 P2 1 105 P2 6 ETTXD2 ET TXD2 P2 1 106 P2 7 ETTXD3 ET TXD3 P2 1 107 P2 8 ETTRXDO RSPCK4 ET RXDO RSPCK4 P2 9 ETRXD1 SSL40 ET RXD1 SSL40 P2 10 B22 P2 10 ETRXD2 MOSI4 ET RXD2 MOSI4 P2 11 E19 P2 11 ETRXD3 MISO4 ET RXD3 MISO4 P33 AAB P3 3 ETMDIO SCICTS1 ET MDIO SIM RESET E ARA P3 4 ETRXCLK SCISCKO ET RXCLK SIM CLK P3 5 P3 5 ETRXER SCITXDO ET RXER SIM TXD P3 6 ETRXDV_SCIRXDO ET RXDV SIM RXD PX1_EN1 is connected to the MCU via port expander IC35 See section 5 5 for further details Table 5 22 Multiplexing for Signal PX1 EN1 IC29 MCU Signal Routed to MCU P4 4 SSISCKO PWM2E PWM2E SSISCKO P4 5 SSIWSO PWM2F PWM2F SSIWSO P4 6 SSIRXDO PWM2G PWM2G SSIRXDO P4 7 SSITXDO PWM2H PWM2H SSITXDO PX1 EN3 is connected to the MCU via port expander IC35 See section 5 5 for further details Table 5 23 Multiplexing for Signal PX1 EN3 IC30 MCU ib Routed to MCU P8 10 w P8 10 A18 SGOUTO SGOUTO P8 11 w P8 11 A19 SGOUT1 SGOUT1 PX1_EN7 is connected to the MCU via port expander IC35 See section 5 5 for further detai
11. 3 SPBSSL 0 Slave Select Common to both QSPI devices IC25 and IC26 SPBCLK SPBCLK 0 Clock Common to both QSPI devices IC25 and E SPBIOO0 P9 4 SPBIOOO 0 Data IC26 Pin Enabled Slave Select These signals are have been used for other ns Mons Table 8 2 QSPI communication pins at boot R20UT2587EG0200 Rev 2 00 RENESAS Page 47 of 58 Mar 21 2014 RSK RZA1H 8 Code Development The RZ A1 has two QSPI channels 0 and 1 and allows for one or two serial flash memories to be directly connected per channel The number of connected memories is specified by writing to the BSZ bits of register CMNCR of the QSPI bus controller Booting from QSPI is only possible on channel 0 using Single Channel Single Bit SPI mode On the RSK RZA1H the two QSPI flash devices are connected to channel 0 Figure 8 2 is a graphical representation of the boot sequence between the RZ A1 and the QSPI RZ A1 1 BOOT PROGRAM EXECUTES FROM SPI O OXFFFFOOOO OSPI INTERFACE FRI 1 CPU CHANNELOPORTO ON CHIP BOOT ROM BOOT SINGLE BIT MODE 2 USER BOOT LOADER LARGE CAPACITY ON CHIP RAM YY COPIES ITSELF INTO LARGE PAGE 0 CAPACITY ON CHIP RAM SERIAL MEMORY 1 0X00000000 LOADER PROGRAM Execute In Place Single Channel Single SPI 0X00003FFF 0X00040000 1 RAM Memory for user code can be internal or external RAM 3 LOADER RECONFIGURES DOSPI CHANNELS 0X20020000 WORK MEMORY
12. Connections Digilent Pmod Compatible Header Connections mm ron Fn 2 P11 14 MOSI1 P11 14 PMOD2 RST Port Expander 1 H3 IO 5 See section 5 5 3 pienso emis x s Pwop pat Fe 5 eeue ROD s Bedv seve Table 5 19 PMOD 2 Header Connections R20UT2587EG0200 Rev 2 00 TENESAS Page 28 of 58 Mar 21 2014 RSK RZA1H o User Circuitry 5 18 TFT LCD Panel Connector A TFT display can connect to the RSK board via connector CN44 The signals route to the MCU via multiplexers IC37 and IC38 as described by Table 5 20 Refer to the schematic for further information CN44 Pin P10 8 LCDODATA15 ENG Table 5 20 TFT Signal Connections R20UT2587EG0200 Rev 2 00 ENESAS Page 29 of 58 Mar 21 2014 RSK RZA1H o User Circuitry a E TFT CS Port E ome 2 2 See section 5 5 Table 5 20 TFT Signal Connections continued 519 LVDS The RSK board provides an LVDS interface from connector CN17 Connection details to the MCU are described in Table 5 21 CN17 Pin P5 6 TXOUTOP LVDS Channel 0 Positive Line rs Deur vosen Teoste ea em tf PESTOUTA Vos channet winustine P amp 3 s0 ie Psa txOUTAP VOS Channel 2 Postvetre Ps2 AO 4 PEOTKOLKOUT vos GockFosivetine mso AM Table 5 21 LVDS Connections R20UT2587EG0200 Rev 2 00 ENESAS Page 30 of 58 Mar 21 2014 RSK RZA1H o User Circuitry 5 220 Pin Multiplexing The RSK
13. Electronics does not assume any liability for infringement of patents copyrights or other intellectual property rights of third parties by or arising from the use of Renesas Electronics products or technical information described in this document No license express implied or otherwise is granted hereby under any patents copyrights or other intellectual property rights of Renesas Electronics or others 4 You should not alter modify copy or otherwise misappropriate any Renesas Electronics product whether in whole or in part Renesas Electronics assumes no responsibility for any losses incurred by you or third parties arising from such alteration modification copy or otherwise misappropriation of Renesas Electronics product o Renesas Electronics products are classified according to the following two quality grades Standard and High Quality The recommended applications for each Renesas Electronics product depends on the product s quality grade as indicated below Standard Computers office equipment communications equipment test and measurement equipment audio and visual equipment home electronic appliances machine tools personal electronic equipment and industrial robots etc High Quality Transportation equipment automobiles trains ships etc traffic control systems anti disaster systems anticrime systems and safety equipment etc Renesas Electronics products are neither intended nor authoriz
14. Header Remove Pin Remove Nao Flas s6 cio rem mer me Table 6 6 Option Link configuration for NAND FLASH 6 1 6 QSPI FLASH Table 6 7 details the option links associated with the QSPI FLASH MCU O Exclusive Function Header Connection Header Table 6 7 Option Link configuration for QSPI FLASH 6 1 7 CAN Channels Table 6 8 details the option links associated with the CAN interface H r CAN 510 B7 CAN CTX1 R206 R207 JAS Pind sek a ERA AA mi iM mM sam CAN 73 J3 CANCDO RIZA R173 JASPMZ CHANNEL 72 Hi GAN CRx2 RiB R4 JASPmB Table 6 8 Option Link configuration for CAN R20UT2587EG0200 Rev 2 00 ENESAS Page 34 of 58 Mar 21 2014 RSK RZA1H 6 Configuration 6 1 8 Ethernet Table 6 9 details the option links associated with the Ethernet Functionality Eco Exclusive Function Header Connection Header Remove Pin Remove me aao 114 AA19 ET COL R270 R278 JAS Pin3 R278 N Ethernet mm R104 Table 6 9 Option Link configuration for Ethernet 6 1 9 USB Serial Table 6 10 details the option links associated with the USB Serial Interface Exclusive Function Header Connection Header R177 USB Serial R162 JA2 Pin23 R163 Table 6 10 Option Link configuration for USB Serial 6 1 10 TFT Table 6 11 details the option links associated with the TFT display connection MU Exclusive Function Header Connection Hea
15. Headers This RSK is fitted with application headers which can be used to connect compatible Renesas application devices or as easy access to MCU pins The following tables provide details of the pin connections of these headers Some pins will require link resistors to be fitted in order to make the connection to the specified MCU pin These resistors are also documented in the tables highlighted in bold blue if they are fitted by default or normal text if they are not fitted as standard Table 7 1 below lists the connections of the application header JA1 Application Header JA1 JA1 B Header Name MCU Pin Link Header Name MCU Pin Link Required Required 1 CON8V E R2 j OV p 3 CON 3v3 6 RA OV LL i 5 CONAVCC RI16 6 CON AVSS A RI53 7 CONAVREF RI3 8 ADIRG R247 9 ADPOTCN P115 Y19 R347 10 R421 n 11 P1 10 Y17 R422 P1 11 AA18 R423 OPEN PE E 14 OPEN ET P2 0 L21 P2 1 K22 15 P2 0 IO0 Set PX1 EN1 16 P2 1 101 Set PX1 EN1 1 1 P2 2 F21 P2 3 G20 17 P2 2 102 Set PX1 EN1 18 P2 3 103 Set PX1 ENT 1 1 P2 4 F19 P2 5 E22 19 P2 4 104 Set PX1 ENT 20 P2 5 105 Set PX1 ENT 1 E 1 P2 6 E20 P2 7 C22 21 P2 6 IO6 SetPX1 EN1 22 P2 7 107 Set PX1 EN1 1 1 IRQ3 P1_9 AB18 R114 OPEN MEE R141 R140 JA1_SDA3 P1 7 B16 R209 JA1 SCL3 P1 6 A17 R208 Table 7 1 Application Header JA1 Connections R20UT2587EG0200 Rev 2 00 ENESAS Page 41 of 5
16. ValidProgramTest The start is a function label for loading the user application code s vector table The code start and code end labels contain variable specifying the start and end address of the entire user application code including the vector addresses The code execute label contains the execute variable used to indicate the execution start address The string variable is a signature marker used by the Load Program to validate the user application code whether to load the code or not If the location constants and string variable in the start S file is not found immediately after the vector table as shown above the configuration is deemed invalid and LEDO will be used to flash in the sequence of one long 2 second followed by one short 0 5 second pulse so that the error can be recognised If valid the User Boot Loader Program checks the start address If this matches the current location the execute address is used and the program is launched and executes from QSPI Otherwise the start and end addresses are used to copy the program to the required destination using the DMA controller On completion the program is launched at the provided execute address R20UT2587EG0200 Rev 2 00 ENESAS Page 49 of 58 Mar 21 2014 RSK RZA1H 8 Code Development 8 7 QSPI Data Reading Reading of QSPI data can be configured for single or dual device read depending on the number of serial memories connected to a ch
17. e Append the string shown below taking care to add the space between the J Link serial and the colon J LINKUSB xxxxxxxx SetCFl Flash 0x00000000 0x03FFFFFF SetWorkRAM 0x20020000 0x20021FFF Please refer to the RZ A1H device group s hardware manual for more information on boot modes R20UT2587EG0200 Rev 2 00 ENESAS Page 53 of 58 Mar 21 2014 RSK RZA1H 9 Additional Information 9 Additional Information Technical Support For details on how to use DS 5 refer to the help file by opening DS 5 then selecting Help Help Contents from the menu bar T Welcome Help Contents TP Search Dynamic Help For information about the RZ A1H series microcontrollers refer to the RZ A1H Group Hardware Manual For information about the RZ assembly language refer to the RZ Series Software Manual Technical Contact Details Please refer to the contact details listed in section 10 of the Quick Start Guide General information on Renesas Microcontrollers can be found on the Renesas website at http www renesas com Trademarks All brand or product names used in this manual are trademarks or registered trademarks of their respective companies or organisations Copyright This document may be wholly or partially subject to change without notice All rights reserved Duplication of this document either in whole or part is prohibited without the written permission of Renesas Electronics Europe Limited 2014 Renesa
18. from QSPI The following steps assume the user has gone through the RSK RZA1H s Quick Start Guide These steps also assume that the User Boot Loader is still resident on your board If you have re programmed the Channel 0 Port 0 QSPI flash device this loader may not be resident In this case we provide the source project for the User Boot Loader in the sample set and a simple batch file to re flash the User Boot Loader Please refer to the description txt file in this project for details Append the following string to the debugger s serial number in the debug configurations settings of the DS 5 user application sample project device R7S721001 DualSPI without the quote marks Note This must not be used when using the User Boot Loader Program sample project in DS 5 To open the debug configurations settings in DS 5 click on the small triangle to the right of the Debug icon and select Debug Configurations from the menu bar as shown below BOG BL ina launch history Debug As Debug Configurations Organize Favorites Expand the DS 5 Debugger entry to reveal the debug configuration as shown in the following example c C C Application c C C Attach to Application c C C Pastmartem Debugger c C C Remote Application a X5 D5 5 Debugger Bl Iron Python Run Iron Python unittest Click on the desired configuration e g RZA1 Debug to open the Files tabs Under the Connection tab append the
19. required with appropriate changes to jumper settings as detailed in Table 2 1 Ensure to check the three pin PWR_SEL jumper settings prior to connecting the power supply Details of the power supply requirements for the RSK and configuration are shown in Table 2 1 below The default RSK power configuration is shown in bold blue text It is essential that if a 12V supply is used that PWR_SEL is NOT linked on pins 2 3 or an overvoltage will be applied to the MCU and associated devices resulting in likely destruction of the whole board CN5 Setting PWR_SEL Setting Regulator IC Output Pin1 2 shorted IC21 E NM 1 18V CORE VCC P d Table 2 1 Main Power Supply Requirements The main power supply connected to PWR1 should supply a minimum of 5W to ensure full functionality When designing an RZ A1H MCU into a new board it should be noted that if the 3 3V supply is valid and the 1 18V core supply is not then MCU input and output ports will be in an undefined state until the 1 18V core supply is valid When designing the MCU power sequencing during board hardware design it is strongly advised to ensure that the 1 18V supply is valid before the 3 3V The 1 18V core supply on the RSK RZA1H board is valid before the 3 3V supply so on the RSK RZA1H the input output ports remain in a defined state during the power up period 2 2 Power Up Behaviour When the RSK is purchased the RSK board has the Release o
20. string to the detected J Link debugger s serial number highlighted in the example below J Connection lin Files 5 Debugger fiia OS Awareness 6 Arguments PE Environment select target select the manufacturer board project type and debug operation to use Currently selected Renesas RZ ATH R75721001 Bare Metal Debug Debug Cortex A9 via DSTREAM RT a RAfAJH EIS AAON 2 a Bare Metal Debug Debug Cortex AB via DSTREAM RVI Debug Cortex 49 via ULINE Debug Cortex 49 via ULINE pro Linux Application Debug n DTSL Options Edit Configure trace or other target options Using default configuration options 5 5 Debugger will connect via DSTREAM or KVI to debug a bare metal application Connections Bare Metal Debug Connection I LinkLISBoseceececcdevice R75721001_DualsFI Browse R20UT2587EG0200 Rev 2 00 TENESAS Page 52 of 58 Mar 21 2014 RSK RZA1H 8 Code Development Please refer to the RSK RZA1H s Quick Start Guide for detailed instructions on how to create and setup the debug configurations With this configuration on connecting to the target board with the User Application the application will be automatically programmed into the flash 8 10 NOR Flash Boot Loader The RZ A1 device is designed to boot from the memory device connected to address space CSO Booting from this address space has two modes Mode 1 and Mode 2 Boot Mode 1 uses 16 bit bus addressing and Boot Mode 2 uses 32 bit bus ad
21. 15 Option Link configuration for SD Card CN2 R20UT2587EG0200 Rev 2 00 aLENESAS Page 37 of 58 Mar 21 2014 RSK RZA1H 6 Configuration 6 2 Power Supply Configuration Power to the RSK RZA1H board should be applied to connector CN5 from a 5mm diameter centre positive plug at either 5Vdc or 12Vdc The header PWR_SEL is used to select operation from a 12V or 5V supply It is essential that if a 12V supply is used that PWR_SEL is NOT linked on pins 2 3 or an overvoltage will be applied to the MCU and associated devices resulting in likely destruction of the whole board Table 6 16 describes the jumper settings for the PWR_SEL header Table 6 16 PWR_SEL Header Configuration There are 2 headers available that can be used to measure the current taken by the MCU during operation JP4 can be used to measure the MCU core current and JP6 can be used to measure current drawn by the MCU port pins by shorting them via a current meter In order to use these functions it is necessary to remove links R24 and R26 respectively Table 6 17 provides a summary MCU Core Current Measurement Remove R24 and short JP4 with meter to measure MCU core current MCU Port Pins Current Measurement Remove R26 and short JP6 with meter to measure MCU port pin current Table 6 17 MCU Current Measurement Headers 6 3 Ethernet Configuration Table 6 18 below details the options configurable for the Ethernet function via the 8 way DIP switch SW4
22. 200 Rev 2 00 TENESAS Page 12 of 58 Mar 21 2014 RSK RZA1H 3 Board Layout 3 3 Component Placement Figure 3 3 below shows placement of individual components on the top side PCB Figure 3 4 shows placement of individual components on the underside of the PCB Component types and values can be looked up using the board schematics E TJ e Pp CN25 o Figure 3 3 Ia Component Placement Bo s Bp g BH CN8 B CN9 F OE HEER X HEREREEEREE gg I R342 Ejea IC6 i IC31 of seri B JP3 PIE E a amp TP10 SEE ma EB E E E l EE dui CN20 i e Esa my l 1C11 EES x 9 Bos i gt O o o q 5 o B LEN D ET Ek e ri 5 BE He med De B af Hoo HERE E Ico E O vae m o Fl pej EJEl JE EE a B 2 5 E C 6 br alo o o la E ICi TO malsa na 7 de EE d i ilon t me ga EEE as e Je fs a 9 FERI KREI FE la s m ls TP16 o a i z R R AF B A ag E IC23 o 2 i BEBE E ma a f BEE i E IEEE QR UN x ENAZ E m TAREN EE 5 a d TAP EEE e i ra a E w El El TU Tie El E gt El a dt H Lu GIE O O E LEDO a nungoo dos Ji m SI LEDO LEDI LED LED3 BIE SW6 n dw ol seel 2 a TP35 RTO mie RIGO E ger EI c71 E z He e e E ca g El O C68 ol lol lo nik a l p ER SW1 SW2 SW3 CN2 o cnie TP6
23. 20UT2587EG0200 Rev 2 00 ENESAS Page 36 of 58 Mar 21 2014 RSK RZA1H 6 Configuration 6 1 13 Pmod Interfaces Table 6 14 details the option links associated with the Pmod Interfaces PMOD2 6 1 14 SD Card Exclusive Function Header Connection Remove Header Remov Pin O EN R227 R144 CN25 Pin10 Y4 CN26 Pin10 PMOD_PIN10 R171 R171 UJ de N T PMOD1 CS CN25 Pin CN25 Pin9 CN26 Pin9 al F22 PMOD PIN9 R175 R176 CN25 Pin7 1 CN26 Pin7 PMOD INT R247 R227 R144 CN25 Pin10 PMOD PIN10 CN26 Pin10 R171 R171 16 PMOD2 CS CN26 Pin CN25 Pin9 A Y4 C 1 F22 CN26 Pin9 PMOD_PIN9 R175 R176 a 5 3 5 3 CN25 Pin7 CN26 Pin7 1_ N E 4 i R247 A18 PMOD INT Table 6 14 Option Link configuration for PMOD Table 6 11 details the option links associated with SD card connector CN2 Note that the SD card connector CN2 is not fitted as standard Exclusive Function Header Connection Header Remove Pin Remove R384 R290 R289 CN2 Pin2 O 3 BA co K21 SD WP EXT R290 D gt 00 K20 SD_CD_EXT R306 CN2 Pin3 R180 R179 CN2 Pin4 R311 CN2 Pin5 R306 R180 L GW G21 SD CMD EXT I X N H22 SD CLK EXT SD Card H19 SD DO EXT R315 J22 SD_D1_EXT R294 CN2 Pin7 R176 R175 CN2 Pin8 R178 CN2 Pin9 R294 F22 SD D2 EXT R176 G19 SD D3 EXT R178 P olo a Table 6
24. 44 NESAS jam Y D m o 3 u RZ A1H Group Renesas Starter Kit User s Manual For DS 5 ASSAM RENESAS MCU Family RZ A1H Series All information contained in these materials including products and product specifications represents information on the product at the time of publication and is subject to change by Renesas Electronics Corporation without notice Please review the latest information published by Renesas Electronics Corporation through various means including the Renesas Electronics Corporation website http www renesas com Renesas Electronics www renesas com Rev 2 00 Mar 2014 Notice 1 Descriptions of circuits software and other related information in this document are provided only to illustrate the operation of semiconductor products and application examples You are fully responsible for the incorporation of these circuits software and information in the design of your equipment Renesas Electronics assumes no responsibility for any losses incurred by you or third parties arising from the use of these circuits software or information 2 Renesas Electronics has used reasonable care in preparing the information included in this document but Renesas Electronics does not warrant that such information is error free Renesas Electronics assumes no liability whatsoever for any damages incurred by you resulting from errors in or omissions from the information included herein 3 Renesas
25. 8 Mar 21 2014 RSK RZA1H 7 Headers Table 7 2 below lists the connections of the application header JA2 Application Header JA2 JA2 B Header Name MCU Link Header Name Link Port Pin Required Port Pin Required EE A IS ARII E 3 uu va v 5 IRO P1019 R37 6 TADO P49K2 R28 7 OPEN 8 RXD P41022 R298 9 IRA P11 Ct7 R304 10 SCKO P48 K20 R300 o 1 OPEN X 12 OPEN O 13 OPEN 14 OEN 15 PEN 16 OEN 17 OPEN y 9 18 OEN 19 OFEN 20 TOCJA P78K4 R159 28 IRG2 P18 AM17 R163 24 OPEN 25 OPEN 20 JOPEN y Table 7 2 Application Header JA2 Connections Table 7 3 below lists the connections of the application header JA3 Note that address lines BA23 BA25 are manifested on Connector CN15 as detailed in Table 7 4 Application Header JA3 JA3 B Header Name MCU Link Header Name MCU Link Port Pin Required Port Pin Required BA2 P7103 4 BAS P71 2 BAM PaM 6 BAS P713N1 7 BB P714N2 8 BA7 PRI5 NS BA PBOPI 10 BA9 P81 P2 1 BAO P82P3 12 BAN P83R1 13 BA12 P84R2 14 BABS P85R3 15 BA4 P86U2 16 BAS P87U4 17 BDO P6083 18 BD1 gt PENDE i9 BD2 P62C4
26. Diagram R20UT2587EG0200 Rev 2 00 RENESAS Page 15 of 58 Mar 21 2014 RSK RZA1H 4 Connectivity 4 2 Debugger Connections The diagram below shows the connections between the RSK SEGGER JLink Lite debugger and the host PC User Interface E i zc T Cable USB Cable SEGGER aso iale No Eds J Jlink Lite 7 x BSK AE CLIO DON XX N Y ETE MN N A A ACK LMM SES NI LILA NW E MATA N Host PC Figure 4 2 Debugger Connection Diagram R20UT2587EG0200 Rev 2 00 ENESAS Page 16 of 58 Mar 21 2014 RSK RZA1H o User Circuitry 5 User Circuitry 5 1 Potentiometer A single turn potentiometer RV1 is connected as a potential divider to analogue input AN7 P1 15 pin Y19 The potentiometer can be used to create a voltage between AVCC and AD Ground The potentiometer is fitted to offer an easy method of supplying a variable analogue input to the microcontroller It does not necessarily reflect the accuracy of the controllers ADC Refer to the RZ A1H Group Hardware Manual for further detalls 5 2 Clock Circuit
27. ER Indicates the status of the BOARD VCC 3 3V power rail DEI LEDO Green User operated LED LED1 User operated LED LED2 Red User operated LED LED3 Red User operated LED LED4 Ethernet Indication LEDS Ethernet Indication LED6 Ethernet Indication a These LEDs are connected to port expander IC 34 s I O pin See section 5 5 for further details Table 5 15 LED Connections 5 14 Reset Circuit A reset control circuit is fitted to the RSK to generate the required reset signal and is triggered from the RES switch power supply monitor and debugger connection Refer to the RZ A1 hardware manual for details regarding the reset signal timing requirements and the RSK schematics for information regarding the reset circuitry in use on the board 5 15 Audio The RSK board provides audio input via a 3 5mm Stereo jack CN19 and audio output via 3 5mm stereo jack CN20 It also incorporates an audio codec device IC14 which is linked to the MCU via the signals described in Table 5 16 SDA3 Serial Data Line B16 Connection to ports via multiplexer IC30 See section 5 20 for more details Table 5 16 Audio Codec Connections R20UT2587EG0200 Rev 2 00 ENESAS Page 25 of 58 Mar 21 2014 RSK RZA1H o User Circuitry 5 16 USB Serial Port A USB serial port implemented in another Renesas low power microcontroller RL78 G1C is fitted on the RSK to the microcontroller Serial Communications Interface SCl module Multip
28. Enable Link NOR Flash active on CSO Open NOR Flash inactive JP21 Defining Function of BSCANP pin on RZ A1H MCU Jumper Position Normal Operation Boundary Scan BSCANP AA22 Pin held low Pin pulled up to BOARD VCC via R264 22K resistor PWR_SEL i O Select Input power voltage setting Link 1 2 Link 2 3 12V 5V Do NOT connect a 12V input source to the RSK when PWR SEL jumper is set to link pins 2 3 Table 6 19 Jumper Option descriptions R20UT2587EG0200 Rev 2 00 TENESAS Page 39 of 58 RSK RZA1H 6 Configuration 6 5 MCU Boot and Oscillator Configuration The six way DIP switch SW6 provides some configuration options for the RZ A1H MCU Switches 1 2 and 3 are used to set the boot mode of the RZ A1H Table 6 20 provides details of the available modes and the corresponding switch settings Due to pull up resistors in the circuit a 1 is produced when the corresponding switch position is OFF and a 0 is produced when it is ON MD BOOTO MD BOOT MD BOOT2 JP18 Boot Mode x 1 m 2 PING 3 SHORT Boot mode 0 CSO space 16 bit booting Boots the from memory bus width 16 bits connected to the CSO space Uses NOR flash IC23 Boot mode 1 CS0 space 32 bit booting Boots the LSI from memory bus width 32 bits connected to the CSO space Not supported on RSK Boot mode 3 serial flash booting Boots the LSI from the serial flash memory connected to the SPI multi VO bus space The only
29. Kong Limited Unit 1601 1613 16 F Tower 2 Grand Century Place 193 Prince Edward Road West Mongkok Kowloon Hong Kong Tel 852 2886 9318 Fax 852 2886 9022 9044 Renesas Electronics Taiwan Co Ltd 13F No 363 Fu Shing North Road Taipei Taiwan Tel 886 2 81 75 9600 Fax 886 2 8175 9670 Renesas Electronics Singapore Pte Ltd 80 Bendemeer Road Unit 06 02 Hyflux Innovation Centre Singapore 339949 Tel 65 6213 0200 Fax 65 6213 0300 Renesas Electronics Malaysia Sdn Bhd Unit 906 Block B Menara Amcorp Amcorp Trade Centre No 18 Jin Persiaran Barat 46050 Petaling Jaya Selangor Darul Ehsan Malaysia Tel 60 3 7955 9390 Fax 60 3 7955 9510 Renesas Electronics Korea Co Ltd 12F 234 Teheran ro Gangnam Gu Seoul 135 080 Korea Tel 82 2 558 3737 Fax 82 2 558 5141 http www renesas com O 2014 Renesas Electronics Corporation All rights reserved Colophon 2 0 RZ A1H Group LENESAS Renesas Electronics Corporation R20UT2587EGO200
30. OION sss a E OE ES mE 50 Mer Nml p EB oOEOE El q EO Oh hH e o e oer 51 Dual QSPI Debugger Programming SettingS cccoooccncoconconoconnnnconanonononcnnonnanonnononrnnononnnnnnnnrnnonanenss 52 NOR Flash Boot Loader aid 53 9 Additional Information s s s ss ss ssss sssscsssssqssssvqsssussqstssqqcsstasnscosa 54 LENESAS RSK RZA1H R20UT2587EG0200 Rev 2 00 RENESAS STARTER KIT Mar 21 2014 1 Overview 1 1 Purpose This RSK is an evaluation tool for Renesas microcontrollers This manual describes the technical details of the RSK hardware The Quick Start Guide and Tutorial Manual provide details of the software installation and debugging environment 1 2 Features This RSK provides an evaluation of the following features e Renesas microcontroller programming e User code debugging User circuitry such as switches LEDs and a potentiometer e Sample application e Sample peripheral device initialisation code The RSK board contains all the circuitry required for microcontroller operation R20UT2587EG0200 Rev 2 00 TEE Mar 21 2014 TENESAS RSK RZA1H 2 Power Supply 2 Power Supply 2 1 Requirements This RSK is supplied with a SEGGER JLink Lite debugger This board is supplied with a 5Vdc supply using a 5 0mm barrel power jack The board can operate with a supply of up to 12Vdc if
31. SK and RSK RZA1H R20UT2588EG run the first sample on a single A4 sheet Quick Start Guide Schematics Full detail circuit schematics of the RSK RSK RZA1H R20UT2586EG Schematics Hardware Manual Provides technical details of the RZ A1 RZ A1H Group RO1UHO403EJ microcontroller User s Manual Hardware 2 List of Abbreviations and Acronyms Abbreviation ADC Analog to Digital Converter Ra imtemupt Request UART Universal Asynchronous Receiver Transmitter USB Universal Serial Bus VCU nia RSK SAU sp Universal Asynchronous ReceiverWransmitley SSS Universal Serial Bus SSCS Table of Contents iO CTV EA EE EP EE 9 id 0009 RTT RR c 9 dc2 pee et a gei MEUM OE M IR IU RE Rum e Ee 9 2 OWE SUDDIV deem m 10 2 1 A ecce acc eu LE eR Mu aM ac Mui 10 Ze PowerUp BEAM a a o Ld muri td cet 10 eM 612 6 EMOSIE m 11 94 Component O EN 11 32 Board DIMENSIONS E emen 12 So Component Placement lt a A o o a a fu sa 13 A Connectivity s s esscssscsscssscssscesucentennuantrnnnntnnrtantennrrantnnrnnrtnnrranenntenns 15 4 niermal RSKEONEEIONS SE e dia 15 AZ JBDebugder CohrnecllOls tunes nesana nen SAJ ti 16 mre ses TE RRTRTTERRRRRE p F y Ey E E6 17 osli POLO MUO CLC iun Tm mI 17 52 A A a AE Ee ma EE 17 ou ACA Video PA EE a RE DE e A e ao p NO SN nima SE KONON 17 S egis EE Se DE ER ee AE AE EE och 17 go FONE All EI SE ra a ach na M EE i EA UL amen
32. annel Differences between the two modes are clearly explained in the next two diagrams From the diagrams it is clear to see the advantages of dual read mode over single read With two devices connected using dual mode doubles the storage space and reduces the number cycles taken to read the same amount of data in single mode Channel 0 Serial Flash SPBSSL SPBCLK SPBIO30 SPBIO20 SPBIO10 SPBIOOO Figure 8 3 Example of a 4 bit data size using one serial flash memory Channel 0 Serial Flash SPBSSL SPBCLK SPBIO30 SPBIO20 SPBIO10 SPBIOOO SPBIO31 SPBIO21 SPBIO11 SPBIOO1 Figure 8 4 Example of a 4 bit data size using two serial flash memories R20UT2587EG0200 Rev 2 00 ENESAS Page 50 of 58 Mar 21 2014 RSK RZA1H 8 Code Development 8 8 Load Files The Tutorial sample project provides two load files ld used to specify where the user code is to be located and executed Execution is either directly from RAM when debugging in RAM in this case the RAM is initialised by the debugger Alternatively the program is loaded into QSPI and then is copied at start up by the User Boot Loader and runs from RAM The load files can be found in the project folder under the project Explorer view Fi Project Ex Streamlin m 15 RZ AIH Tutorial REK Low Binaries ri Includes compiler specific scripts gt src The RAM load file contains the following two lines EXEC BASE 0x20040000
33. as Ra 8 ow ome Pram Re s mu Pio vm mie to imas PLTLAMB RS mom NO li EE MEM 177 OPEN 18 OPEN P4 4 M21 P4 5 M20 a el IE 21 P4 6 L22 P4 7 L20 KI aa NEFIE MEEN EENS Bles Id LAN Table 7 5 Application Header JA5 Connections R20UT2587EG0200 Rev 2 00 ENESAS Page 43 of 58 Mar 21 2014 RSK RZA1H 7 Headers Table 7 6 below lists the connections of the application header JAG Application Header JA6 JA6 B Header Name MCU Link Header Name MCU Link Port Pin Required Port Pin Required 11 13 EN NN EEN WE ore njon efm e joren foen 1 nom jw som jw Table 7 6 Application Header JA6 Connections R20UT2587EG0200 Rev 2 00 ENESAS Page 44 of 58 Mar 21 2014 RSK RZA1H 8 Code Development 8 Code Development 8 1 Overview For all code debugging using Renesas software tools the RSK board must be connected to a PC via a Segger JLink Lite debugger which is supplied with this RSK product 8 2 Mode Support The RZ A1 microcontroller supports five boot modes which includes booting from memory connected to the CSO space serial flash memory the NAND flash memory with an SD controller and the NAND flash memory with an MMC controller 8 3 Compiler Restrictions The version of the compiler provided with this RSK is a fully functional GNU compiler used in RSK RZA1H sample proj
34. der sem mE eee Table 6 11 Option Link configuration for TFT R20UT2587EG0200 Rev 2 00 ENESAS Page 35 of 58 Mar 21 2014 RSK RZA1H 6 Configuration 6 1 11 Audio Codec Table 6 12 details the option links associated with the Audio Codec E MCU Exclusive Function Header Connection Header R107 LINEIN1 R129 R130 CN19 Pin2 NS Audio Lise i LINEIN2 R131 R132 CN19Pins JACKSNS R323 R324 mich RIGO Rizo OMDPMZ Audio Mic In 4 MICR R132 TEE CN19Pin3 JACKSNS R324 eT IR R134 CN20 Pino aal NICE Headphone op He Amas Ri cNzoping ado toum Ri34 Riss cnzoping o leono toum Rie mts ONZOPim2 Audio Input MICGND R319 R320 CN20Pint R319 R320 Gnd AUDIO GND R320 R319 CN20Pin R320 R319 Via 1uF Decoupling Capacitor Table 6 12 Option Link configuration for the Audio Codec 6 1 12 LVDS Table 6 13 details the option links associated with the LVDS functionality MCU Exclusive Function Header Connection Header FT 56 A9 Ps 6 TXOUTOP R170 R169 CN17Pin6 R170 E3 87 Be Ps 7 TXOUTOM R182 R183 CN17 Pin5 Ime R183 LVDS P5 4 TXOUTIP_X R432 CNT Ping R432 Channel 1 P5 5 TXOUT1M R168 R167 CN17 Pin8 R168 R167 Table 6 13 Option Link configuration for LVDS R
35. dressing The NOR flash memory on the RSK ZA1H has a 16 bit bus To configure the RZ A1 to boot from this memory set the all switches on SW6 to the ON position In this mode following cancelation of the power on reset the RZ A1begins program execution from address 0x00000000 The NOR flash is connected to CSO address space The RZ A1H NOR INIT Sample project is a boot loader Two methods for programming the NOR flash memory device on the RSK RZA1H are provided in the software package that is copied to the user PC after running the installer The methods are e Sample code o Allows the user to program and debug the Boot Loader using the DS 5 o User application code to be programmed into the NOR flash is also provided o Requires modification to the script file to enable write access to the NOR flash region e Batch Files o Allows programming the user application code into the NOR flash o This is independent of the IDE The user application code provided RZ A1H Display Board RSK is built in RAM and loaded into the NOR flash using the Boot Loader The NOR Boot Loader similar to the QSPI Boot Loader checks for the signature string BootLoad ValidProgramTest This signals the Loader to load the user application code into the NOR flash device Please ensure to modify the J Link connection string to allow read and write access to the NOR flash e In DS 5 select the project under the Project Tree view e Open the Debug Configurations
36. e 6 R21 IO line 7 R20 Write Enable N22 Address latch Enable 1 Command Latch Enable 2 P4 0 FRE MMCD4 Read Enable 0 FCE NAND Chip Enable P5 5 C10 RESET2 N Write Protect Connected to reset circuit Table 5 7 NAND Flash Connection 2 2 2 2 2 2 2 P2 P2 P2 B1 To enable boot for the NAND FLASH set SW6 pins 1 2 3 to OFF The NAND device is 256MByte in size however it should be noted however that only 64MByte is addressable Refer to section 6 1 5 for further details 5 10 Dual QSPI Flash The RSK board provides two 64MByte Serial Flash memory ICs IC25 and IC26 which connect to the RZ A1 MCU via the SPI Multi VO Bus Controller Signal Connections are detailed in Table 5 8 below mm E pen ice 0 ice 0 E ice 0 P9 7 SPBIO30 0 P2 12 SPBIOO1 0 A21 P2_13_SPBIO11_0 P2 15 SPBIO31 0 IRQ1 Table 5 8 SPI Flash Connection R20UT2587EG0200 Rev 2 00 aLENESAS Page 20 of 58 Mar 21 2014 RSK RZA1H o User Circuitry 5 10 1 QSPI Modes of Operation There are several modes of operation of the QSPI memory in conjunction with the serial memory controller in the RZ A1H MCU On the RSK board there are two QSPI memory devices attached to ports 0 and 1 of the Multi I O SPI controller s channel 0 Channel 1 is used for other functions SPI multi I O bus controller IC26 Serial Flash 0 SPBSSL 0 SPBCLK 0 Hm SPBMOO_ O SPBIOOO 0 HE SI 100 SO 101 i SPBMIO O SPBIO10 SE W 102 HOLD 103
37. e and other pointing devices gt UE Modems AL Monitors i amp Network adapters EI Portable Devices a IF Ports COM amp LPT 2 Communications Port COMI poj 7 ECP Printer Port LPT1 f RSK USB Serial Port COM3 n Processors Update Driver Software X Sound video and game contro DERE JE System devices Universal Serial Bus controllers Uninstall Scan for hardware changes Oper eT dek Properties 2 Select the Port Settings tab and click Advanced A RSK USB Serial Port COM3 Properties mj General Port Settings Driver Details Bits per second 115200 Z Data bits 8 Parity None y Stop bits 1 Flow control None m Advanced Restore Defaults Cancel 3 Select the new COM port from the drop down list Bear in mind that the in use label on various ports listed may not actually mean that that port is in use at this current point in time Advanced Settings for COM3 ma ml Use FIFO buffers requires 16550 compatible UART Select lower settings to correct connection problems Cancel Select higher settings for faster performance EI Defaults Receive Buffer Low 1 i P High 14 14 Tranemit Buffer Low 1 i p High 16 TE COM Port Number COM in use o COM COMS in use COM4 in use 7 COMS in use COME in use COME in use
38. eae E 18 o Mo a a 18 51 SDIMME TTE ee 19 56 SDRAMIANOR Flake e EG e dana e eb Ee 19 597 NAND A a EE a ED Ee 20 9 16 Dial CSP IIASA RS Rec 20 9 11 Uimversalserial Bus HUSB iS Ed um kamo lO Ea 23 9 42 JING Ce EEPROM ES iS ie De sa bubo sm lo DE lao a da ul Ge oso do ee 24 se uM NZD cL A A 25 old RESET dos aten e eo e den Lo so 25 ole A DE o a E 25 310 OSB Seal POM E i io mok A A 26 317 Prod Mod le GONE Sa Re a 28 5 18 TFTECD PaNe ONNEGIOF ninoma a a ato lange es 29 AS EVD EUER 30 9 20 SPIB NIUTUDISXIDIO maks kaa poka vr a sole seta dada Ed fua Suo 31 O CONMOUFATON IIA 32 o NOONAN il E e o o n ie 32 02 Power stipplEoRNAURUO SE aaa 38 D suene odi alo si EE do ES RE GED EE GE AS EE IE NN ESS 38 64 Amper ikKESRIANRAIOR EE EE a Ge E E AA 39 6 5 MCU Boot and Oscillater Conflguratlons tein UR e a Lo l sala 40 O AAA Um 41 L Application Headers oc 41 0 VOJE Developments EES EE l EE Raka dpe Saka E Safa Ee aia Ee ed 45 Sl ANGIVE W sairon GR EET 45 8 2 Mode SUP DOM EE EE RE A I D CMM ED Re OE UE 45 9 9 COMPpIIEKIRESMCHIORNS ED o dd NO an ee Ru a o dott iu koaj du uo ko stop ad 45 84 Debugger Support ll oe ek e M 45 6 5 A U MOSS Space as KE a ola WE A RE De Ku LO ee o Fu No nau AA EE N 46 8 6 Boot WO Sucia oa dey TEF dete GE 47 CISOPEIDA IG R
39. ects Additionally the DS 5 Starter Kit for Renesas RZ edition provides the ARM compiler with a 32KB limit for instructions and unlimited for data This can be found on the ARM website at the following link and requires activation http ds arm com renesas rza starter kit 8 4 Debugger Support The RSK board is supplied with a Segger JLink Lite Debugger Please refer to the Segger website for further information www segger com R20UT2587EG0200 Rev 2 00 ENESAS Page 45 of 58 Mar 21 2014 RSK RZA1H 8 Code Development 8 5 Address Space Figure 8 1 below details the address space of the MCU This diagram is based on the Hardware Manual version 0 6 For further details refer to the RZ A1H Group Hardware Manual Upper Address Function Lower Address xFFFF FFFF Iu xFFFF DOODO SFFEE EFFF Reserved Hs FLIO xFCFF FFFF I axFCFF 0000 DIFCFE FFFF IO xFCFE 0000 DXEGELEEFEE Reserved Ux E Ere CIO xFC T FFFF In OxFCO 0000 UXFEFFFFER Fieserved Pec cae a real xF nD IFFF Cortes 49 Private Area OxFOO0 0000 DzEFFF FEFF Reserved UE Ot xEazz2 FFFF HO OxES20 0000 xEZJE FEFF Reserved PERO xES13 FFFF Iu OxE810 00010 DzESBUF FEFF Fieserved GESE nan OxE amp O4 FFFF KO OxE803 0000 UEESOSFFFF Reserved Farjon EH OxES Oj FFFF IO OxEGSOO 0000 HzETEF FFEF Fieserved Ure Ds URE TUJA On chip RAM Mirror Area ox6000 0000 Ox5FFF FFFF SPI Channel 1 Mirror Area
40. ed for use in products or systems that may pose a direct threat to human life or bodily injury artificial life support devices or systems surgical implantations etc or may cause serious property damages nuclear reactor control systems military equipment etc You must check the quality grade of each Renesas Electronics product before using it in a particular application You may not use any Renesas Electronics product for any application for which it is not intended Renesas Electronics shall not be in any way liable for any damages or losses incurred by you or third parties arising from the use of any Renesas Electronics product for which the product is not intended by Renesas Electronics 6 You should use the Renesas Electronics products described in this document within the range specified by Renesas Electronics especially with respect to the maximum rating operating supply voltage range movement power voltage range heat radiation characteristics installation and other product characteristics Renesas Electronics shall have no liability for malfunctions or damages arising out of the use of Renesas Electronics products beyond such specified ranges Although Renesas Electronics endeavors to improve the quality and reliability of its products semiconductor products have specific characteristics such as the occurrence of failure at a certain rate and malfunctions under certain use conditions Further Renesas Electronics products are not sub
41. g margins immunity to noise and amount of radiated noise When changing to a product with a different part number implement a system evaluation test for the given product How to Use This Manual 1 Purpose and Target Readers This manual is designed to provide the user with an understanding of the RSK hardware functionality and electrical characteristics It is intended for users designing sample code on the RSK platform using the many different incorporated peripheral devices The manual comprises of an overview of the capabilities of the RSK product but does not intend to be a guide to embedded programming or hardware design Further details regarding setting up the RSK and development environment can found in the tutorial manual Particular attention should be paid to the precautionary notes when using the manual These notes occur within the body of the text at the end of each section and in the Usage Notes section The revision history summarizes the locations of revisions and additions It does not list all revisions Refer to the text of the manual for details The following documents apply to the RZ ATH Group Make sure to refer to the latest versions of these documents The newest versions of the documents listed may be obtained from the Renesas Electronics Web site User s Manual Describes the technical details of the RSK hardware H E aa User s Manual Quick Start Guide Provides simple instructions to setup the R
42. gure 5 3 Memory access of Single and Dual Mode QSPI Operation The consequence of this is that data stored in QSPI FLASH needs to be accessed in the same manner as it has been programmed in If data is accessed in Single QSPI mode when it has been programmed in Dual QSPI mode then every fourth group of four bytes will be missing Conversely data accessed in Dual Channel mode when it has been programmed in Single Channel mode will have blocks of four bytes from the other port inserted between every fourth byte of correct data R20UT2587EG0200 Rev 2 00 ENESAS Page 22 of 58 Mar 21 2014 RSK RZA1H o User Circuitry 5 11 Universal Serial Bus USB This RSK board is fitted with two channels of USB Each channel can operate as either a host or as a function device Channel O is by default configured as USB Function and the connector and jumper link settings for the channel 0 power supply are shown in Table 5 10 Channel 1 is by default configured as USB Host and the connector and jumper link settings for the Channel 1 power supply are shown in Table 5 12 The signal connections to the MCU for Channel 0 and Channel 1 are detailed in Table 5 9 and Table 5 11 respectively Note Default settings are shown in bold blue text AR Poto O DP Positive differential data signal DO J AA2 USB OVR CURRENT Over current detection signal Table 5 9 USBO Module MCU Connections Operation as USB Fit Connector CN6 Do Not Fi
43. in12 R423 mr R181 Table 6 2 Option Link configuration for user switches pot and LEDs Switch bank SW4 is used to control the functionality of the Ethernet connection Please refer to section 6 3 Ethernet Configuration on page 38 for further information Switch bank SW6 is used to control the boot options Please refer to section 6 5 MCU Boot and Oscillator Configuration on page 40 for further information 6 1 2 SP DIF Table 6 3 details the option links associated with SP DIF MU Exclusive Function Header Connection Header om p e se al ETE Table 6 3 Option Link configuration for SP DIF 6 1 3 SDRAM Table 6 4 details the option links associated with the SDRAM e ue MCU Exclusive Function Header Connection Header Remove Pin Remove Os esse avo mm e s wr ou mw me Pra 2 cKesoraw ems 1l Table 6 4 Option Link configuration for SDRAM R20UT2587EG0200 Rev 2 00 TENESAS Page 33 of 58 Mar 21 2014 RSK RZA1H 6 Configuration 6 1 4 NOR FLASH Table 6 5 details the option links associated with the NOR FLASH TES Exclusive Function Header Connection Header Remove Pin Remove NoRFLASA rs Ka ADNOR mes Riso meno rise Table 6 5 Option Link configuration for NOR FLASH 6 1 5 NAND FLASH Table 6 6 details the option links associated with the NAND FLASH rare Exclusive Function Header Connection
44. ject to radiation resistance design Please be sure to implement safety measures to guard them against the possibility of physical injury and injury or damage caused by fire in the event of the failure of a Renesas Electronics product such as safety design for hardware and software including but not limited to redundancy fire control and malfunction prevention appropriate treatment for aging degradation or any other appropriate measures Because the evaluation of microcomputer software alone is very difficult please evaluate the safety of the final products or systems manufactured by you 8 Please contact a Renesas Electronics sales office for details as to environmental matters such as the environmental compatibility of each Renesas Electronics product Please use Renesas Electronics products in compliance with all applicable laws and regulations that regulate the inclusion or use of controlled substances including without limitation the EU RoHS Directive Renesas Electronics assumes no liability for damages or losses occurring as a result of your noncompliance with applicable laws and regulations 9 Renesas Electronics products and technology may not be used for or incorporated into any products or systems whose manufacture use or sale is prohibited under any applicable domestic or foreign laws or regulations You should not use Renesas Electronics products or technology described in this document for any purpose relating to military application
45. le can be disconnected and re connected to show the COM port appearing and disappearing p Device Manager moj File Action View Help eg IH AN RG a 3 BED 365 D Batteries MM Computer ca Disk drives amp Display adapters ea DVD CD ROM drives S Human Interface Devices ca IDE ATA ATAPI controllers Keyboards n Mice and other pointing devices ij Modems E Monitors Network adapters 9 Ports COM amp LPT 17 Communications Port COMI 1 ECP Printer Port LPT1 gt RSK USB Serial Port COM3 D Processors 4 Sound video and game controllers h TM System devices Q Universal Serial Bus controllers R20UT2587EG0200 Rev 2 00 a LENESAS Page 26 of 58 Mar 21 2014 RSK RZA1H 5 User Circuitry 5 16 2 Changing the Virtual COM Port Number Some PC applications will only work with particular COM port numbers COM port numbers for the RSK serial USB are assigned automatically at the time of first connection to the PC It is possible to assign a different value manually The procedure to do this is as follows 1 Right click the USB Serial port in device manager and select Properties 24 Device Manager File Action View Help 9g oe ls 4 Ey BED7365 gt Batteries 1E Computer xs Disk drives A Display adapters gt 3 DVD CD ROM drives Y Human Interface Devices gt ca IDE ATA ATAPI controllers Keyboards P Mic
46. le options are provided to allow re use of the serial interface Connections between the USB to Serial converter and the microcontroller are listed in Table 5 17 below Signal Name P30 TXD2 0 TXD2 External SCI Transmit Signal mm ET E _2 RXD2 External SCI Receive Signal me wo GIC RTS Request to Send PA 14 Table 5 17 Serial Port Connections When the RSK is first connected to a PC running Windows with the USB Serial connection the PC will look for a driver This driver is installed during the installation process so the PC should be able to find it The PC will report that it is installing for a driver and then report that a driver has been installed successfully as shown in Figure 5 4 The exact messages may vary depending upon operating system l Installing device driver software _ RSK USB Serial Port COM3 Click here for status _ _ FF B UY Device driver software installed successfully Figure 5 4 USB Serial Windows Installation message 5 16 1 Reading the Virtual COM Port Number In order for the PC to be able to communicate with the RSK board via the USB virtual COM port the correct COM port number must be determined If the COM port number is not known follow this process 1 Connectthe PC to the serial USB port 2 On the PC go to Start Control Panel Device Manager Go to the Ports COM amp LPT section and the COM port should be listed there To verify the correct port the USB cab
47. ls Table 5 24 Multiplexing for Signal PX1_EN7 IC20 R20UT2587EG0200 Rev 2 00 TENESAS Page 31 of 58 Mar 21 2014 RSK RZA1H 6 Configuration 6 Configuration 6 1 Modifying the RSK This section lists the option links that are used to modify the way RSK operates in order to access different configurations Configurations are made by modifying link resistors or headers with movable jumpers Table 6 1 below shows the RSKRZ A1 default configuration with respect to the peripheral functionality Bold blue text indicates the default configuration that the RSK is supplied with It is noted that certain peripheral functions are disabled by default as shown in Table 6 1 in the column entitled Secondary Function It is possible to activate these disabled peripherals but at the expense of the default peripheral functions as shown in the Table Refer to the sections cited in the Table in order to perform any required modifications When removing soldered components always ensure that the RSK is not exposed to a soldering iron for intervals greater than five seconds This is to avoid damage to nearby components mounted on the board When modifying a link resistor always check the related option links to ensure there is no possible signal contention or short circuits Because many of the MCU s pins are multiplexed some of the peripherals must be used exclusively Refer to RZ A1H Group Hardware Manual and RSK RZA1H schematics for further infor
48. mation Primary Function Secondary Function See Section s Various IRQ Analogue lines on Application 6 1 1 headers LEDs Timer channel TIOCOB external bus chip 6 1 1 select CS3 Soma GCANGhamo2 inrchamnalTOGi 019 CAN Channel 1 Some Ethernet lines Misc Connector CN15 Audio Codec IRQ for port expander TFT PWM control 6 1 11 LVDS SP DIF 6 1 12 PMOD Interfaces Various SD Timer and Application Header 6 1 13 signals Various Comms lines on Application Headers SD card interface 6 1 14 TFT FC Interrupt line TFT lC Connection Various IRQ lines to Application Headers 6 1 10 Table 6 1 RSK Default Configuration by Function A link resistor is a OO surface mount resistor which is used to short or isolate parts of a circuit Option links are listed in the following sections detailing their function when fitted or removed Refer to the component placement diagram Figure 3 3 Figure 3 4 to locate the option links and jumpers Bold blue text indicates the default configuration that the RSK is supplied with R20UT2587EG0200 Rev 2 00 ENESAS Page 32 of 58 Mar 21 2014 RSK RZA1H 6 Configuration 6 1 1 Switches Potentiometer and LED Table 6 2 details the option links associated with the user switches pot and LEDs MU Exclusive Function Header Connection Header JA1 Pin23 R114 _ m ie es JA1Pin23 R114 R421 JA1 Pin10 R421 R163 JA2 Pin23 R163 R189 JA5Pin10 R189 R423 JA1 P
49. ms The RSK is not guaranteed to be error free and the entire risk as to the results and performance of the RSK is assumed by the User The RSK is provided by Renesas on an as is basis without warranty of any kind whether express or implied including but not limited to the implied warranties of satisfactory quality fitness for a particular purpose title and non infringement of intellectual property rights with regard to the RSK Renesas expressly disclaims all such warranties Renesas or its affiliates shall in no event be liable for any loss of profit loss of data loss of contract loss of business damage to reputation or goodwill any economic loss any reprogramming or recall costs whether the foregoing losses are direct or indirect nor shall Renesas or its affiliates be liable for any other direct or indirect special incidental or consequential damages arising out of or in relation to the use of this RSK even if Renesas or its affiliates have been advised of the possibility of such damages Precautions The following precautions should be observed when operating any RSK product This Renesas Starter Kit is only intended for use in a laboratory environment under ambient temperature and humidity conditions A safe separation distance should be used between this and any sensitive equipment Its use outside the laboratory classroom study area or similar such area invalidates conformity with the protection requirements of the Elect
50. n the Handling of MPU MCU Products The following usage notes are applicable to all MPU MCU products from Renesas For detailed usage notes on the products covered by this document refer to the relevant sections of the document as well as any technical updates that have been issued for the products 1 Handling of Unused Pins Handle unused pins in accord with the directions given under Handling of Unused Pins in the manual The input pins of CMOS products are generally in the high impedance state In operation with an unused pin in the open circuit state extra electromagnetic noise is induced in the vicinity of LSI an associated shoot through current flows internally and malfunctions occur due to the false recognition of the pin state as an input signal become possible Unused pins should be handled as described under Handling of Unused Pins in the manual 2 Processing at Power on The state of the product is undefined at the moment when power is supplied The states of internal circuits in the LSI are indeterminate and the states of register settings and pins are undefined at the moment when power is supplied In a finished product where the reset signal is applied to the external reset pin the states of pins are not guaranteed from the moment when power is supplied until the reset process is completed In a similar way the states of pins in a product that is reset by an on chip power on reset function are not guaranteed from the mome
51. n then disable the QSPI channel reconfigure it to the Dual port Quad Bit SPI mode for maximum speed and look for a User Application Program Note The external address space for channel 0 is mapped internally to the address range 0x18000000 to Ox1BFFFFFF giving a total of four gigabytes of address space when one memory device is connected With two devices connected as in the case of the RSK RZA1H the internal address space is doubled to eight gigabytes The RZ A1H Boot Program uses 16KB of work RAM memory 0x20020000 to 0x20023FFF R20UT2587EG0200 Rev 2 00 TENESAS Page 48 of 58 Mar 21 2014 RSK RZA1H 8 Code Development 3 Transfer of a User Application Program as Desired After configuring the external address space the User boot Loader Program inspects the User Application Program to validate its configuration Four items inspected in the user application program are the start and end addresses of the user application program the execution address and a boot load string These can be found in the start S file of the user s DS 5 project A snippet of the contents of start S file is shown below global start func start start LDR pc reset_handler LDR pc undefined_handler LDR pc svc_handler LDR pc prefetch_handler LDR pc abort_handler LDR pc reserved_handler LDR pc irq_handler LDR pc fiq_handler code_start word start code end Word end code execute Word execute string BootLoad
52. nd SDRAM device will be connected also to CS3 As such it is necessary that the BSC within the RZ A1 MCU is configured to use both CS2 and CS3 as SDRAM even though a second SDRAM is not present on CS3 and that CS3 is not used on the expansion headers As such option link R164 must NOT be fitted to prevent bus conflicts By default this link is not fitted as this port pin is configured for LEDO For other external memory mapped devices chip select CS1 remains available for use This is a known limitation of the RSK board For new applications with only one SDRAM it is recommended to connect the SDRAM to CS3 which will allow single SDRAM use without issue See the hardware manual Bus State Controller section 8 4 3 CS2WCR SDRAM p171 for further details Note that the NOR Flash is configured to operate on the bus control line CSO In order for this to operate Jumper link JP18 and resistor link R314 fitted as default must be connected Refer to the RSK RZA1H board schematics for further information R20UT2587EG0200 Rev 2 00 ENESAS Page 19 of 58 Mar 21 2014 RSK RZA1H o User Circuitry 5 9 NAND Flash The connections of the NAND FLASH are detailed in Table 5 7 MCU NAFO TRACEDO SMCD NAF1 TRACED1 SMWP 1 NAF2 TRACED2 SMD1 NAF3 TRACED3 SMDO NAF4 SMCLK NAF5 SMCMD NAF6 TRACECLK SMD3 NAF7 SMD2 P4 3 FWE MMCD7 P4 2 FALE MMCD6 P4 1 FCLE MMCD5 E V19 IO line 1 W20 IO line 2 T20 IO line 3 T21 IO line 4 T22 R22 IO lin
53. nection Details 5 6 CAN There are two CAN channels which connect to the MCU as listed in Table 5 5 MCU CAN Signal CAN CTX1 CAN Channel 1 Transmit P5 10 CAN CRX1 CAN Channel 1 Receive P3 9 CAN_CTX2 CAN Channel 2 Transmit P7 3 CAN CRX2 CAN Channel 2 Receive Table 5 5 CAN Connection R20UT2587EG0200 Rev 2 00 ENESAS Page 18 of 58 Mar 21 2014 RSK RZA1H o User Circuitry 5 7 SD MMC The RSK board provides an SD MMC card socket CN1 The connections are detailed in Table 5 6 BEEN T NAF1 TRACED1 SMWP1 Write Protect P3 9 NAFO TRACEDO SMCD Card Detect P3 8 NAF5 SMCMD Command VO P3 13 NAF4 SMCLK Clock P3 12 NAF3 TRACED3 SMDO Data 0 P3 11 NAF2 TRACED2 SMD1 Data 1 P3 10 NAF7 SMD2 Data 2 P3 15 NAF6 TRACECLK SMD3 Data3 P3 14 P4 0 FRE MMCD4 Data 4 P4 0 P4 1 FCLE MMCD5 Data 5 P4 1 P4 2 FALE MMCD6 Data 6 P4 2 e ME Table 5 6 SD MMC Connection Note that it is not possible to boot from an SD card that is connected to the SD MMC connector CN1 This is because the connector utilises channel 1 of the SD controller integrated in the RZ A1 MCU For further information refer to the hardware manual table 3 1 5 8 SDRAM NOR Flash The RSK board provides 32MByte SDRAM IC24 and 16MByte NOR Flash IC23 connected to the address data buses Note that the SDRAM as fitted on the RSK board is configured in hardware to use the Chip Select line CS2 The BSC module within the RZ A1 MCU assumes a seco
54. nt when power is supplied until the power reaches the level at which resetting has been specified 3 Prohibition of Access to Reserved Addresses Access to reserved addresses is prohibited The reserved addresses are provided for the possible future expansion of functions Do not access these addresses the correct operation of LSI is not guaranteed if they are accessed 4 Clock Signals After applying a reset only release the reset line after the operating clock signal has become stable When switching the clock signal during program execution wait until the target clock signal has stabilized When the clock signal is generated with an external resonator or from an external oscillator during a reset ensure that the reset line is only released after full stabilization of the clock signal Moreover when switching to a clock signal produced with an external resonator or by an external oscillator while program execution is in progress wait until the target clock signal is stable 5 Differences between Products Before changing from one product to another i e to a product with a different part number confirm that the change will not lead to problems The characteristics of an MPU or MCU in the same group but having a different part number may differ in terms of the internal memory capacity layout pattern and other factors which can affect the ranges of electrical characteristics such as characteristic values operatin
55. r stand alone code from the example tutorial software pre programmed into the Renesas microcontroller On powering up the board the LEDs will start to flash After 200 flashes or after pressing any switch the text on the LCD display will change and the LED s will begin to flash at a rate controlled by the potentiometer R20UT2587EG0200Rev 200 gt n erne page 10 of 58 Mar 21 2014 TENESAS RSK RZA1H 3 Board Layout 3 Board Layout 3 1 Component Layout Figure 3 1 below shows the top component layout of the board Reset Switch Video In UZBO Host LVDS USBi Host Pmod2 Prmod1 USBO Fn USB1 Fn oj AA LJ E l l Application Headers a l Audio In a Audio Qut ARM JTAG CORESIGHT dh Li l RZ ATH CAN1 2 k 1 SSIF x m E a USB Serial m L n t um tu d User LEDs SWA 1 8 SW6 1 6 PWR_SEL US E averia mm EE j ot fot or ole User Switches NMI Switch Potentiometer Figure 3 1 Board Layout R20UT2587EG0200 Rev 2 00 ENESAS Page 11 of 58 Mar 21 2014 RSK RZA1H 3 Board Layout 3 2 Board Dimensions Figure 3 2 below gives the board dimensions and connector positions All the through hole connectors are on a common 0 1 inch grid for easy interfacing 2118 99 6 29 D 3 3 4 PLACES R3 4 PLACES 10 Enn ni m 1meosos y un IT ERI a 133 4 dt EL 128 4 CO un o Jl Figure 3 2 Board Dimensions R20UT2587EG0
56. romagnetic Compatibility Directive and could lead to prosecution The product generates uses and can radiate radio frequency energy and may cause harmful interference to radio communications However there is no guarantee that interference will not occur in a particular installation If this equipment causes harmful interference to radio or television reception which can be determined by turning the equipment off or on you are encouraged to try to correct the interference by one or more of the following measures ensure attached cables do not lie across the equipment reorient the receiving antenna increase the distance between the equipment and the receiver connect the equipment into an outlet on a circuit different from that which the receiver is connected power down the equipment when not in use consult the dealer or an experienced radio TV technician for help NOTE lt is recommended that wherever possible shielded interface cables are used The product is potentially susceptible to certain EMC phenomena To mitigate against them it is recommended that the following measures be undertaken e The user is advised that mobile phones should not be used within 10m of the product when in use e The user is advised to take ESD precautions when handling the equipment The Renesas Starter Kit does not represent an ideal reference design for an end product and does not fulfil the regulatory standards for an end product General Precautions i
57. s Electronics Europe Limited All rights reserved 2014 Renesas Electronics Corporation All rights reserved 2014 Renesas Solutions Corp All rights reserved R20UT2587EG0200 Rev 2 00 ENESAS Page 54 of 58 Mar 21 2014 REVISION HISTORY RSK RZ A1H User s Manual Rev Description Nov 21 2013 NN First Edition issued Mar 21 2014 47 52 Added QSPI boot loader sections Renesas Starter Kit Manual User s Manual Publication Date Rev 2 00 Mar 21 2014 Published by Renesas Electronics Corporation 24 NE SAS SALES OFFICES Renesas Electronics Corporation Refer to http www renesas com for the latest and detailed information California Eastern Laboratories Inc 4590 Patrick Henry Drive Santa Clara California 95054 U S A Tel 1 408 919 2500 Fax 1 408 988 0279 Renesas Electronics Europe Limited Dukes Meadow Millboard Road Bourne End Buckinghamshire SL8 5FH U K Tel 44 1628 651 700 Fax 44 1628 651 804 Renesas Electronics Europe GmbH Arcadiastrasse 10 40472 D sseldorf Germany Tel 49 211 65030 Fax 49 211 6503 1327 Renesas Electronics China Co Ltd Tth Floor Quantum Plaza No 27 ZhiChunLu Haidian District Beijing 100083 P R China Tel 86 10 8235 1155 Fax 86 10 8235 7679 Renesas Electronics Shanghai Co Ltd Unit 301 Tower A Central Towers 555 LanGao Rd Putuo District Shanghai China Tel 86 21 2226 0888 Fax 86 21 2226 0999 Renesas Electronics Hong
58. s or use by the military including but not limited to the development of weapons of mass destruction When exporting the Renesas Electronics products or technology described in this document you should comply with the applicable export control laws and regulations and follow the procedures required by such laws and regulations 10 Itis the responsibility of the buyer or distributor of Renesas Electronics products who distributes disposes of or otherwise places the product with a third party to notify such third party in advance of the contents and conditions set forth in this document Renesas Electronics assumes no responsibility for any losses incurred by you or third parties as a result of unauthorized use of Renesas Electronics products 11 This document may not be reproduced or duplicated in any form in whole or in part without prior written consent of Renesas Electronics 12 Please contact a Renesas Electronics sales office if you have any questions regarding the information contained in this document or Renesas Electronics products or if you have any other inquiries Note 1 Renesas Electronics as used in this document means Renesas Electronics Corporation and also includes its majority owned subsidiaries Note 2 Renesas Electronics product s means any product developed or manufactured by or for Renesas Electronics 2012 4 Disclaimer By using this Renesas Starter Kit RSK the user accepts the following ter
59. t Connector CN8 Function Power from Connector CN6 Link JP11 pins 2 and 3 l Fit Connector CN8 Do Not Fit Connector CN6 Operation as USB Host Power from RSK Link JP11 pins 1 and 2 Table 5 10 USB0 Module Connector and Power Settings MCU Positive differential data signal AB11 VBUS1 Cable monitor pin VBUSIN1 USB_PWR_ENB VBUS power supply enable Port Expander 2 IO 6 See Table 5 4 USB OVR CURRENT Over current detection signal Port Expander 2 IO 4 See Table 5 4 Table 5 11 USB1 Module MCU Connections l Fit Connector CN8 Do Not Fit Connector CN6 Operation as USB Host Power from RSK Link JP11 pins 1 and 2 Operation as USB Fit Connector CN6 Do Not Fit Connector CN8 Function Power from Connector CN6 Link JP11 pins 2 and 3 Table 5 12 USB1 Module Connector and Power Settings Note e When evaluating OTG ensure to replace the default USB connector USBO D with a USB Micro AB connector e Connectors such as the one manufactured by Hirose Electric with part number ZX62R AB 5P can be used R20UT2587EG0200 Rev 2 00 ENESAS Page 23 of 58 Mar 21 2014 RSK RZA1H o User Circuitry 5 12 Ethernet amp EEPROM This RSK board is fitted with an Ethernet connection The connections from the Ethernet driver IC IC12 are detailed in Table 5 13 Refer to the RZ A1 board schematics for further information ET MDC P5 9 ET MDIO P3 3 Multiplexed ET IRQ P4 14 IRO6 ET RXCLK P3 4 Multiplexed ET RXD3 P2 11 Multiple
60. t the On Semiconductor website at www onsemi com The port expanders provide 8 parallel VO lines each which can be accessed via an I C SMBus serial connection On the RSK board they are able to be accessed at different addresses on C channel 3 on the MCU The FC logical address for IC34 is 0x40 and IC35 is 0x41 Table 5 3 details the signal connections to IC34 and Table 5 4 details the signal connections to IC35 KNN LED1 LED output control Output low ON output high OFF LED2 LED output control Output low ON output high OFF EN LED3 LED output control Output low ON output high OFF 3 NORAS S NOR ias Adaro 4 PMODLRST Reset no orPMOD Channel oo s PMODLRST Cn 8 S0_CONN_PWR_EN Powersuppiyonablofo external SD cardconnecion 7777 Table 5 3 Port Expander IC34 Connection Details Port Number Signal name Function 0 PX1 ENO Multiplex control for LCD DV Data Lines Low LCD High DV PX1 EN1 Multiplex control for Ethernet general Data Lines Low general High Ethernet TFT CS Chip select for TFT PX1 EN3 Multiplex control for PWM timer channels and audio codec IC14 serial ADC DAC VO lines USB OVR CURRENT Signal from USB power controller indicating overcurrent condition USB PWR ENA Enable USB power supply for channel 0 USB PWR ENB Enable USB power supply for channel 1 PX1 EN Multiplex control for Address bus line A18 A21 and sound generator outputs SGOUTO 4 Table 5 4 Port Expander IC35 Con
61. ust be shorted and SW6 3 must be in the ON position CS0 MBBOOT2 low To enable QSPI JP18 must be shorted and SW6 s switches SW6 1 SW6 6 need to be set to OFF ON OFF ON ON ON Note that SDRAM and NOR FLASH cannot be enabled at the same time Device is 256MByte but only 64MByte is addressable Figure 8 1 RZ A1H Address Map On RSK Board R20UT2587EG0200 Rev 2 00 Mar 21 2014 24 NEC S AS Page 46 of 58 RSK RZA1H 8 Code Development 8 6 Boot Modes A boot loader is the first program executed in the microcontroller following a system reset It is used to configure the device to a known state load a new boot program and if necessary copy the main program to the allocated program memory RAM of the microcontroller The RZ A1 supports five boot modes see section 6 5 Boot mode 0 Boots the LSI from the memory bus width 16 bits connected to the CSO space Boot mode 1 Boots the LSI from the memory bus width 32 bits connected to the CSO space Boot mode 3 Boots the LSI from the serial flash memory connected to the SPI multi VO bus space Boot mode 4 Boots the LSI from the NAND flash memory with the SD controller enabled Boot mode 5 Boots the LSI from the NAND flash memory with the MMC controller enabled The requirements for booting from QSPI on the RSK RZA1H are as follows SW6 SW6 1 SW6 2 SW6 3 SW64 SW65 SW6 Table 8 1 SW6 configuration Gal real GEL ENE Signal Name Signal Name SPBSSL P9
62. way of booting this LSI chip is from channel 0 P9 2 to P9 5 in this mode Uses QSPI flash IC26 only Boot mode 4 eSD booting Boots the LSI from the NAND flash memory with the SD controller The only way of booting this LSI chip is from channel 0 P4_10 to P4 15 in this mode Not supported on RSK Boot mode 5 eMMC booting Boots the LSI from the NAND flash memory with the MMC controller The only way of booting this LSI chip is from channel 0 P3 10 to P3 15 in this mode Uses NAND flash IC27 Table 6 20 MCU Boot Modes Note that it is not possible to boot from an SD card that is connected to the SD MMC connector CN1 This is because the connector utilises channel 1 of the SD controller which can only boot from channel 0 For further information refer to the hardware manual Table 3 1 note column order is transposed cf Table 6 20 SW6 4 Clock Signal Source ON EXTAL Uses OSC2 13 33MHz OFF USB X1 Uses X4 48MHz Table 6 21 Clock Signal Source SW6 5 Spread Spectrum Clock Generator SSCG Mode Enables the SSCG function of the MCU s internal PLL circuit This function attempts to reduce EMI peak levels by slightly modulating the output frequency Disables the SSCG function Table 6 22 Spread Spectrum Clock Generator SSCG Mode SW6 6 is for test purposes only default is ON R20UT2587EG0200 Rev 2 00 ENESAS Page 40 of 58 Mar 21 2014 RSK RZA1H 7 Headers 1 Headers 7 1 Application
63. xed ET RXD2 P2 10 Multiplexed zl m ET_TXD3 P2_7 Multiplexed C22 zl mi l ET TXCLK P2 0 Multiplexed L21 ET TXER P2 1 Multiplexed K22 ET CRS P2 3 Multiplexed G20 OE NR RESET2 N Connected to reset circuit ET COL P1 14 AA19 This pin is connected to the MCU via link R105 and is not fitted as default Refer to section 6 1 8 for further details These pins are connected to the MCU via a multiplexer IC IC29 Set Signal PX1 EN 1 High to connect these signals to the MCU See section 5 20 for further details of the multiplexing on the RSK board Table 5 13 Ethernet Connection A 2KByte EEPROM is fitted in order to store the MAC address for the Ethernet connection This can be accessed via I C channel 3 with address OxAO Connection details are described in Table 5 14 below SDA3 Serial Data Line Table 5 14 EEPROM Connection on I C Channel 3 There is an eight way configuration DIP switch SW4 which is used to determine Ethernet settings on the RSK4 board Refer to section 6 3 for further details R20UT2587EG0200 Rev 2 00 ENESAS Page 24 of 58 Mar 21 2014 RSK RZA1H o User Circuitry 513 LEDS There are ten LEDs on the RSK The function of each LED its colour and connection are shown in Table 5 15 FF ii EEN POWER IN Indicates the status of the power connected to CN4 DEI POWER Indicates the status of the BOARD 5V 5V power rail POW

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