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LM3S9B92 ROM User's Guide

1. Parameters ulBase is the EPI module base address ulCount is the maximum count of items to read pucBuf is the caller supplied buffer where the read data should be stored Description This function reads 8 bit data items from the read FIFO and stores the values in a caller sup plied buffer The function will read and store data from the FIFO until there is no more data in the FIFO or the maximum count is reached as specified in the parameter ulCount The actual count of items will be returned Returns The number of items read from the FIFO ROM EPINonBlockingReadStart Starts a non blocking read transaction Prototype void ROM EPINonBlockingReadStart unsigned long ulBase unsigned long ulChannel unsigned long ulCount ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM EPITABLE is an array of pointers located at ROM_APITABLE 23 ROM EPINonBlockingReadStart is a function pointer located at ROM EPITABLE 9 January 26 2012 9 2 1 21 9 2 1 22 External Peripheral Interface EPI Parameters ulBase is the EPI module base address ulChannel is the read channel 0 or 1 ulCount is the number of items to read 1 4095 Description This function starts a non blocking read that was previously configured with the function ROM EPINonBlockingReadConfigure Once this function is called the EPI module w
2. Parameters ulBase is the base address of the CAN controller pulRxCount is a pointer to storage for the receive error counter pulTxCount is a pointer to storage for the transmit error counter Description Reads the error counter register and returns the transmit and receive error counts to the caller along with a flag indicating if the controller receive counter has reached the error passive limit The values of the receive and transmit error counters are returned through the pointers provided as parameters After this call pulFixCount will hold the current receive error count and pulTxCount will hold the current transmit error count 44 January 26 2012 6 2 1 7 6 2 1 8 Controller Area Network CAN Returns Returns true if the receive error count has reached the error passive limit and false if the error count is below the error passive limit ROM_CANInit Initializes the CAN controller after reset Prototype void ROM_CANInit unsigned long ulBase ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM CANTABLE is an array of pointers located at ROM APITABLE 18 ROM CANInit is a function pointer located at ROM CANTABLE 1 Parameters ulBase is the base address of the CAN controller Description After reset the CAN controller is left in the disabled state However the memory used for message objects contains undefined va
3. Parameters ulBase is the base address of the ADC module ulSequenceNum is the sample sequence number Description This will clear an overflow condition on one of the sample sequences The overflow condition must be cleared in order to detect a subsequent overflow condition it otherwise causes no harm Returns None ROM ADCSequenceStepConfigure Configure a step of the sample sequencer Prototype void ROM ADCSequenceStepConfigure unsigned long ulBase unsigned long ulSequenceNum unsigned long ulStep unsigned long ulConfig ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM ADCTABLE is an array of pointers located at ROM APITABLE 5 ROM ADCSequenceStepConfigure is a function pointer located at ROM ADCTABLE co Parameters ulBase is the base address of the ADC module ulSequenceNum is the sample sequence number ulStep is the step to be configured ulConfig is the configuration of this step must be a logical OR of ADC CTL TS ADC CTL IE ADC CTL END ADC CTL D one of the input channel selects ADC CTL CHO through ADC CTL CH15 and one of the digital comparator selects ADC CTL CMPO through ADC CTL CMPT7 January 26 2012 Analog to Digital Converter ADC Description This function will set the configuration of the ADC for one step of a sample sequence The ADC can be configured for single ended or differential opera
4. Parameters ulBase is the base address of the timer module ulTimer specifies the timer s to adjust must be one of TIMER A TIMER B or TIMER BOTH Only TIMER A should be used when the timer is configured for 32 bit operation ulValue is the match value Description This function sets the match value for a timer This is used in capture count mode to determine when to interrupt the processor and in PWM mode to determine the duty cycle of the output signal Returns None 21 2 1 16 ROM TimerPrescaleGet Get the timer prescale value Prototype unsigned long ROM TimerPrescaleGet unsigned long ulBase unsigned long ulTimer ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM TIMERTABLE is an array of pointers located at ROM APITABLE 11 ROM TimerPrescaleGet is a function pointer located at ROM TIMERTABLE 11 Parameters ulBase is the base address of the timer module ulTimer specifies the timer must be one of TIMER A or TIMER B Description This function gets the value of the input clock prescaler The prescaler is only operational when in 16 bit mode and is used to extend the range of the 16 bit timer modes Returns The value of the timer prescaler 21 2 1 17 ROM TimerPrescaleMatchGet Get the timer prescale match value January 26 2012 255 Timer Prototype unsigned long ROM_TimerPrescaleMatchGet unsigned long
5. Parameters ulBase is the base address of the watchdog timer module Description Enables the watchdog timer interrupt Note This function will have no effect if the watchdog timer has been locked See also ROM WatchdogLock ROM WatchdogUnlock ROM WatchdogEnable Returns None ROM WatchdoglntStatus Gets the current watchdog timer interrupt status Prototype unsigned long ROM WatchdogIntStatus unsigned long ulBase tBoolean bMasked ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM WATCHDOGTABLE is an array of pointers located at ROM APITABLE 12 ROM WatchdogIntStatus is a function pointer located at ROM_WATCHDOGTABLE 12 January 26 2012 347 Watchdog Timer 25 2 1 5 25 2 1 6 348 Parameters ulBase is the base address of the watchdog timer module bMasked is false if the raw interrupt status is required and true if the masked interrupt status is required Description This returns the interrupt status for the watchdog timer module Either the raw interrupt status or the status of interrupt that is allowed to reflect to the processor can be returned Returns Returns the current interrupt status where a 1 indicates that the watchdog interrupt is active and a 0 indicates that it is not active ROM_WatchdogLock Enables the watchdog timer lock mechanism Prototype void ROM_WatchdogLock unsigned long ulBase ROM Loca
6. Parameters ulBase is the base address of the CAN controller pClkParms is a pointer to a structure to hold the timing parameters Description This function reads the current configuration of the CAN controller bit clock timing and stores the resulting information in the structure supplied by the caller Refer to ROM CANBitTimingSet for the meaning of the values that are returned in the structure pointed to by pCikParms Returns None ROM CANBitTimingSet Configures the CAN controller bit timing Prototype void ROM CANBitTimingSet unsigned long ulBase tCANBitClkParms xpClkParms ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM CANTABLE is an array of pointers located at ROM APITABLE 18 ROM CANBitTimingSet is a function pointer located at ROM CANTABLE A is January 26 2012 Controller Area Network CAN Parameters ulBase is the base address of the CAN controller pClkParms points to the structure with the clock parameters Description Configures the various timing parameters for the CAN bus bit timing Propagation segment Phase Buffer 1 segment Phase Buffer 2 segment and the Synchronization Jump Width The values for Propagation and Phase Buffer 1 segments are derived from the combina tion pClkParms gt uSyncPropPhase1Seg parameter Phase Buffer 2 is determined from the pClkParms uPhase2Seg parameter These two parameters alon
7. Parameters ulBase is the base address of the watchdog timer module Description This function gets the value that is loaded into the watchdog timer when the count reaches zero for the first time See also ROM WatchdoghReloadSet Returns None ROM WatchdoghReloadSet Sets the watchdog timer reload value Prototype void ROM WatchdogReloadSet unsigned long ulBase unsigned long ulLoadVal ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM WATCHDOGTABLE is an array of pointers located at ROM APITABLE 12 ROM WatchdogReloadSet is a function pointer located at ROM WATCHDOGTABLE 8 Parameters ulBase is the base address of the watchdog timer module ulLoadVal is the load value for the watchdog timer January 26 2012 349 Watchdog Timer 25 2 1 9 Description This function sets the value to load into the watchdog timer when the count reaches zero for the first time if the watchdog timer is running when this function is called then the value will be immediately loaded into the watchdog timer counter If the ulLoadVal parameter is 0 then an interrupt is immediately generated Note This function will have no effect if the watchdog timer has been locked See also ROM_WatchdogLock ROM_WatchdogUnlock ROM_WatchdogReloadGet Returns None ROM_WatchdogResetDisable Disables the watchdog timer reset Prototype void ROM_WatchdogResetDisabl
8. Parameters ulBase is the base address of the quadrature encoder module Description This returns the current position of the encoder Depending upon the configuration of the encoder and the incident of an index pulse this value may or may not contain the expected data that is if in reset on index mode if an index pulse has not been encountered the position counter will not be aligned with the index pulse yet Returns The current position of the encoder 17 2 1 11 ROM QbElPositionSet Sets the current encoder position Prototype void ROM QEIPositionSet unsigned long ulBase unsigned long ulPosition ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM QEITABLE is an array of pointers located at ROM_APITABLE 9 ROM QEIPositionsSet is a function pointer located at ROM OEITABLE 4 Parameters ulBase is the base address of the quadrature encoder module ulPosition is the new position for the encoder January 26 2012 203 Quadrature Encoder QE Description This sets the current position of the encoder the encoder position will then be measured relative to this value Returns None 17 2 1 12 ROM_QElVelocityConfigure Configures the velocity capture Prototype void ROM_OQFTVelocityConfigure unsigned long ulBase unsigned long ulPreDiv unsigned long ulPeriod ROM Location ROM APITABLE is an array of
9. zi Parameters ullnterrupt specifies the interrupt in question Description This function gets the priority of an interrupt See ROM_IntPrioritySet for a definition of the priority value Returns Returns the interrupt priority or 1 if an invalid interrupt was specified ROM JIntPriorityGroupingGet Gets the priority grouping of the interrupt controller Prototype unsigned long ROM IntPriorityGroupingGet void ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM INTERRUPTTABLE is an array of pointers located at ROM APITABLE 14 ROM IntPriorityGroupingGet is a function pointer located at ROM INTERRUPTTABLE 5 z z Description This function returns the split between preemptable priority levels and subpriority levels in the interrupt priority specification Returns The number of bits of preemptable priority ROM JIntPriorityGroupingSet Sets the priority grouping of the interrupt controller Prototype void ROM IntPriorityGroupingSet unsigned long ulBits ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM INTERRUPTTABLE is an array of pointers located at ROM APITABLE 14 January 26 2012 163 Interrupt Controller NVIC ROM_IntPriorityGroupingSet is a function pointer located at ROM_INTERRUPTTABLE 4 Parameters ulBits specifies the number of bits of preemptable
10. Parameters ulBase is the base address of the I2C Slave module bMasked is false if the raw interrupt status is requested and true if the masked interrupt status is requested 138 January 26 2012 Inter Integrated Circuit I2C Description This returns the interrupt status for the I2C Slave module Either the raw interrupt status or the status of interrupts that are allowed to reflect to the processor can be returned Returns Returns the current interrupt status enumerated as a bit field of values described in ROM I2CSlavelntEnableEx 12 2 1 28 ROM_l2CSlaveStatus Gets the I2C Slave module status Prototype unsigned long ROM I2CSlaveStatus unsigned long ulBase ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM I2CTABLE is an array of pointers located at ROM_APITABLE 3 ROM I2CSlaveStatus is a function pointer located at ROM I2CTABLE 21 Parameters ulBase is the base address of the I2C Slave module Description This function will return the action requested from a master if any Possible values are I2C SLAVE ACT NONE I2C SLAVE ACT RREQ I2C SLAVE ACT TREQ I2C SLAVE ACT RREQ FBR Returns Returns I2C SLAVE ACT NONE to indicate that no action has been requested of the 12C Slave module I2C SLAVE ACT RREOQ to indicate that an I2C master has sent data to the I2C Slave module I2C SLAVE ACT TREOQ to indicate that an I2C master has requested that the I
11. Prototype unsigned long ROM_USBEndpointDataAvail unsigned long ulBase unsigned long ulEndpoint ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM USBTABLE is an array of pointers located at ROM APITABLE 16 ROM USBEndpointDataAvail is a function pointer located at ROM_USBTABLE 44 Parameters ulBase specifies the USB module base address ulEndpoint is the endpoint to access Description This function will return the number of bytes of data currently available in the FIFO for the given receive OUT endpoint It may be used prior to calling ROM USBEnapointDataGet to determine the size of buffer required to hold the newly received packet Returns This call will return the number of bytes available in a given endpoint FIFO 24 3 1 12 ROM USBEndpointDataGet Retrieves data from the given endpoint s FIFO Prototype long ROM USBEndpointDataGet unsigned long ulBase unsigned long ulEndpoint unsigned char pucData unsigned long xpulSize ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM USBTABLE is an array of pointers located at ROM APITABLE 16 ROM USBEndpointDataGet is a function pointer located at ROM USBTABLE 10 January 26 2012 USB Controller Parameters ulBase specifies the USB module base address ulEndpoint is the endpoint to access pucDaia is a poi
12. ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM QEITABLE is an array of pointers located at ROM_APITABLE 9 ROM QEIEnable is a function pointer located at ROM OEITABLE 1 Parameters ulBase is the base address of the quadrature encoder module Description This will enable operation of the quadrature encoder module It must be configured before it is enabled See also ROM QklConfigure Returns None ROM QEIErrorGet Gets the encoder error indicator Prototype tBoolean ROM QEIErrorGet unsigned long ulBase ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM OQEITABLE is an array of pointers located at ROM APITABLE 9 ROM QEIErrorGet is a function pointer located at ROM QOEITABLE 6 Parameters ulBase is the base address of the quadrature encoder module Description This returns the error indicator for the quadrature encoder It is an error for both of the signals of the quadrature input to change at the same time Returns Returns true if an error has occurred and false otherwise January 26 2012 17 2 1 6 17 2 1 7 Quadrature Encoder QE ROM QbElIIntClear Clears quadrature encoder interrupt sources Prototype void ROM QOEIIntClear unsigned long ulBase unsigned long ulIntFlags ROM Location ROM APITABLE is
13. January 26 2012 ulPeripheral is the peripheral in question 231 System Control Description Determines if a particular peripheral is present in the device Each member of the Stellaris family has a different peripheral set this will determine which are present on this device The ulPeripheral parameter must be only one of the following values SYSCTL_PERIPH_ADCO SYSCTL_PERIPH_ADC1 SYSCTL_PERIPH_CANO SYSCTL_PERIPH_CAN1 SYSCTL_PERIPH_CAN2 SYSCTL PERIPH COMPO SYSCTL PERIPH COMP 1 SYSCTL PERIPH COMP2 SYSCTL PERIPH EPIO SYSCTL PERIPH ETH SYSCTL PERIPH GPIOA SYSCTL PERIPH GPIOB SYSCTL PERIPH GPIOC SYSCTL PERIPH GPIOD SYSCTL PERIPH GPIOE SYSCTL PERIPH GPIOF SYSCTL PERIPH GPIOG SYSCTL PERIPH GPIOH SYSCTL PERIPH GPIOJ SYSCTL_PERIPH_HIBERNATE SYSCTL PERIPH I2CO SYSCTL PERIPH I2C1 SYSCTL PERIPH 12S0 SYSCTL PERIPH IEEE1588 SYSCTL PERIPH MPU SYSCTL PERIPH PLL SYSCTL PERIPH PWM SYSCTL PERIPH QEIO SYSCTL PERIPH QEI SYSCTL PERIPH SSIO SYSCTL PERIPH SSI1 SYSCTL PERIPH TIMERO SYSCTL PERIPH TIMER1 SYSCTL PERIPH TIMER2 SYSCTL PERIPH TIMERS3 SYSCTL PERIPH TEMP SYSCTL PERIPH UARTO SYSCTL PERIPH UART 1 SYSCTL PERIPH UART2 SYSCTL PERIPH UDMA SYSCTL PERIPH USBO SYSCTL_PERIPH_WDOGO or SYSCTL PERIPH WDOG1 Returns Returns true if the specified peripheral is present and false if it is not 19 2 1 23 ROM SysCtlPeripheralReset Performs a software reset of a peripheral Prototype void ROM SysCtl
14. Parameters ulBase is the base address of the SSI port ulDMAFlags is a bit mask of the DMA features to disable Description This function is used to disable SSI DMA features that were enabled by ROM SSIDMAEnable The specified SSI DMA features are disabled The ulDMAFlags parameter is the logical OR of any of the following values m SSI DMA RX disable DMA for receive m SSI DMA TX disable DMA for transmit Returns None January 26 2012 Synchronous Serial Interface SS 18 2 1 9 ROM SSIDMAEnable Enable SSI DMA operation Prototype void ROM SSIDMAEnable unsigned long ulBase unsigned long ulDMAFlags ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM SSITABLE is an array of pointers located at ROM APITABLE 2 ROM SSIDMAEnable is a function pointer located at ROM SSITABLE 12 Parameters ulBase is the base address of the SSI port ulDMAFlags is a bit mask of the DMA features to enable Description The specified SSI DMA features are enabled The SSI can be configured to use DMA for transmit and or receive data transfers The ulDMAFlags parameter is the logical OR of any of the following values m SSI DMA RX enable DMA for receive m SSI DMA TX enable DMA for transmit Note The uDMA controller must also be set up before DMA can be used with the SSI Returns None 18 2 1 10 ROM SSIEnable Enables the synchronous serial i
15. Prototype long ROM_UARTCharGetNonBlocking unsigned long ulBase ROM Location ROM_APITABLE is an array of pointers located at 0x0100 0010 ROM UARTTABLE is an array of pointers located at ROM_APITABLE 1 ROM UARTCharGetNonBlocking is a function pointer located at ROM UARTTABLE 13 Parameters ulBase is the base address of the UART port Description Gets a character from the receive FIFO for the specified port Returns Returns the character read from the specified port cast as a long A 1 is returned if there are no characters present in the receive FIFO The ROM UARTCharsAvail function should be called before attempting to call this function ROM UARTCharPut Waits to send a character from the specified port Prototype void ROM UARTCharPut unsigned long ulBase unsigned char ucData ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM UARTTABLE is an array of pointers located at ROM APITABLE 1 ROM UARTCharPut is a function pointer located at ROM_UARTTABLE 0 Parameters ulBase is the base address of the UART port ucData is the character to be transmitted Description Sends the character ucData to the transmit FIFO for the specified port If there is no space available in the transmit FIFO this function waits until there is space available before returning Returns None January 26 2012 22 2 1 6 22 2 1 7
16. Prototype void ROM EthernetPHYPowerOn unsigned long ulBase ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM ETHERNETTABLE is an array of pointers located at ROM APITABLE 15 ROM EthernetPHYPoweroOn is a function pointer located at ROM ETHERNETTABLE 22 Parameters ulBase is the base address of the controller Description This function will power on the Ethernet PHY enabling it return to normal opera tion By default the PHY is powered on so this function only needs to be called if ROM EthernetPHYPowerOff has previously been called Returns None January 26 2012 69 Ethernet Controller 8 2 1 19 8 2 1 20 70 ROM EthernetPHYRead Reads from a PHY register Prototype unsigned long ROM EthernetPHYRead unsigned long ulBase unsigned char ucRegAddr ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM ETHERNETTABLE is an array of pointers located at ROM APITABLE 15 ROM EthernetPHYReadis a function pointer located at ROM ETHERNETTABLE 18 Parameters ulBase is the base address of the controller ucRegAddr is the address of the PHY register to be accessed Description This function will return the contents of the PHY register specified by ucHegAdar Returns Returns the 16 bit value read from the PHY ROM EthernetPHYWrite Writes to th
17. Returns Returns the value of the interrupt priority level mask 14 2 1 11 ROM IntPriorityMaskSet Sets the priority masking level Prototype void ROM IntPriorityMaskSet unsigned long ulPriorityMask 164 January 26 2012 Interrupt Controller NVIC ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM INTERRUPTTABLE is an array of pointers located at ROM APITABLE 14 ROM IntPriorityMaskSet is a function pointer located at ROM INTERRUPTTABLE 10 Parameters ulPriorityMask is the priority level that will be masked Description This function sets the interrupt priority masking level so that all interrupts at the specified or lesser priority level is masked This can be used to globally disable a set of interrupts with priority below a predetermined threshold A value of 0 disables priority masking Smaller numbers correspond to higher interrupt priorities So for example a priority level mask of 4 will allow interrupts of priority level 0 3 and interrupts with a numerical priority of 4 and greater will be blocked The hardware priority mechanism will only look at the upper N bits of the priority level where N is 3 for the Stellaris family so any prioritization must be performed in those bits Returns None 14 2 1 12 ROM IntPrioritySet Sets the priority of an interrupt Prototype void ROM IntPrioritySet unsigned long ulInterrupt unsigned char ucPriority
18. UDMA CHANNEL TMROA UDMA CHANNEL TMROB m UDMA CHANNEL TMR1A m UDMA CHANNEL TMR1B m UDMA SEC CHANNEL TMR1A m UDMA SEC CHANNEL TMR1B January 26 2012 uDMA Controller UDMA SEC CHANNEL TMR2A 4 m UDMA SEC CHANNEL TMR2B 5 m UDMA SEC CHANNEL TMR2A 6 m UDMA SEC CHANNEL TMR2B 7 m UDMA SEC CHANNEL TMR2A 14 UDMA SEC CHANNEL TMR2B 15 m UDMA SEC CHANNEL TMR3A m UDMA SEC CHANNEL TMR3B UDMA CHANNEL UARTORX UDMA CHANNEL UARTOTX m UDMA CHANNEL UART1RX m UDMA CHANNEL UART1TX m UDMA SEC CHANNEL UART1RX m UDMA SEC CHANNEL UART1TX m UDMA SEC CHANNEL UART2RX 0 m UDMA SEC CHANNEL UART 2TX 1 m UDMA SEC CHANNEL UART2RX 12 m UDMA SEC CHANNEL UART 2TX 13 UDMA CHANNEL USBEP1RX m UDMA CHANNEL USBEP1TX m UDMA CHANNEL USBEP2RX m UDMA CHANNEL USBEP2TX m UDMA CHANNEL USBEP3RX m UDMA CHANNEL USBEPS3TX UDMA CHANNEL SW UDMA SEC CHANNEL SW The ulAttr parameter is the logical OR of any of the following m UDMA ATTR USEBURST is used to restrict transfers to use only a burst mode m UDMA ATTR ALTSELECT is used to select the alternate control structure for this chan nel it is very unlikely that this flag should be used UDMA ATTR HIGH PRIORITY is used to set this channel to high priority UDMA ATTR REQMASK is used to mask the hardware request signal from the periph eral for this channel Returns None 23 2 1 8 ROM uDMAChannelAttributeGet Gets the enabled attributes of a uDMA channel Prototype un
19. 15 1 Introduction The Memory Protection Unit MPU API provides functions to configure the MPU The MPU is tightly coupled to the Cortex M3 processor core and provides a means to establish access permissions on regions of memory Up to eight memory regions can be defined Each region has a base address and a size The size is specified as a power of 2 between 32 bytes and 4 GB inclusive The region s base address must be aligned to the size of the region Each region also has access permissions Code execution can be allowed or disallowed for a region A region can be set for read only access read write access or no access for both privileged and user modes This can be used to set up an environment where only kernel or system code can access certain hardware registers or sections of code The MPU creates 8 sub regions within each region Any sub region or combination of sub regions can be disabled allowing creation of holes or complex overlaying regions with different permis sions The sub regions can also be used to create an unaligned beginning or ending of a region by disabling one or more of the leading or trailing sub regions Once the regions are defined and the MPU is enabled any access violation of a region will cause a memory management fault and the fault handler will be activated Generally the memory protection regions should be defined before enabling the MPU The regions can be configured by calling ROM MPURegionSet onc
20. 17 2 Functions Functions m void ROM QkElConfigure unsigned long ulBase unsigned long ulConfig unsigned long ul MaxPosition m long ROM_QEIDirectionGet unsigned long ulBase m void ROM QEIDisable unsigned long ulBase January 26 2012 197 Quadrature Encoder QE m void ROM QEIEnable unsigned long ulBase m tBoolean ROM QkElErrorGet unsigned long ulBase m void ROM QkElIntClear unsigned long ulBase unsigned long ullntFlags m void ROM_QElIntDisable unsigned long ulBase unsigned long ullntFlags m void ROM QkElIntEnable unsigned long ulBase unsigned long ullntFlags m unsigned long ROM QbkElIntStatus unsigned long ulBase tBoolean bMasked m unsigned long ROM QElIPositionGet unsigned long ulBase m void ROM_QE PositionSet unsigned long ulBase unsigned long ulPosition n void ROM QkElVelocityConfigure unsigned long ulBase unsigned long ulPreDiv unsigned long ulPeriod void ROM QbEIVelocityDisable unsigned long ulBase void ROM QEIVelocityEnable unsigned long ulBase unsigned long ROM QkElVelocityGet unsigned long ulBase 17 2 1 Function Documentation 17 2 1 1 ROM QkElConfigure Configures the quadrature encoder Prototype void ROM QEIConfigure unsigned long ulBase unsigned long ulConfig unsigned long ulMaxPosition ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM QEITABLE is an array of pointers located at ROM_APITABLE 9 ROM QEIConfig
21. ROM SysTickPeriodGet is a function pointer located at ROM SYSTICKTABLE 6 Description This function returns the rate at which the SysTick counter wraps this equates to the number of processor clocks between interrupts Returns Returns the period of the SysTick counter ROM SysTickPeriodSet Sets the period of the SysTick counter Prototype void ROM SysTickPeriodSet unsigned long ulPeriod January 26 2012 243 System Tick SysTick 20 2 1 7 244 ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM SYSTICKTABLE is an array of pointers located at ROM APITABLE 10 ROM SysTickPeriodSet is a function pointer located at ROM SYSTICKTABLE Sue Parameters ulPeriod is the number of clock ticks in each period of the SysTick counter must be between 1 and 16 777 216 inclusive Description This function sets the rate at which the SysTick counter wraps this equates to the number of processor clocks between interrupts Note Calling this function does not cause the SysTick counter to reload immediately If an immediate reload is required the NVIC ST CURRENT register must be written Any write to this register clears the SysTick counter to 0 and will cause a reload with the u Period supplied here on the next clock after the SysTick is enabled Returns None ROM SysTickValueGet Gets the current value of the SysTick counter Pr
22. The CCP pins must be properly configured for the timer peripheral to function correctly This function provides a typical configuration for those pin s other configurations may work as well depending upon the board setup for example using the on chip pull ups The pin s are specified using a bit packed byte where each bit that is set identifies the pin to be accessed and where bit 0 of the byte represents GPIO port pin 0 bit 1 represents GPIO port pin 1 and so on Note This cannot be used to turn any pin into a timer pin it only configures a timer pin for proper operation Returns None 11 2 1 27 ROM_GPIOPinTypeUART Configures pin s for use by the UART peripheral Prototype void ROM_GPIOPinTypeUART unsigned long ulPort unsigned char ucPins ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM GPIOTABLE is an array of pointers located at ROM_APITABLE 4 ROM GPIOPinTypeUART is a function pointer located at ROM GPIOTABLE 21 Parameters ulPort is the base address of the GPIO port ucPins is the bit packed representation of the pin s Description The UART pins must be properly configured for the UART peripheral to function correctly This function provides a typical configuration for those pin s other configurations may work as well depending upon the board setup for example using the on chip pull ups The pin s are specified using a bit packe
23. UDMA SRC INC 8 UDMA DST INC NONE UDMA ARB 64 The next step is to actually start the uDMA transfer once the data is ready to be sent There are the only two calls that the application needs to call to start a new transfer Normally all of the previous uDMA configuration can stay the same The first call ROM uDMAChannelTransferSet resets the source and destination addresses for the DMA transfer and specifies how much data will be sent The next call ROM uDMAChannelEnable actually allows the uDMA controller to begin requesting data Example Start the transfer of data on endpoint 1 a Configure the address and size of the data to transfer ROM uDMAChannelTransferSet UDMA CHANNEL USBEPITX UDMA MODE BASIC pData void ROM USBFIFOAddr USBO BASE USB EP 1 64 Start the transfer ROM_uDMAChannelEnable UDMA CHANNEL USBEPITX January 26 2012 305 USB Controller 306 Because the uDMA interrupt occurs on the same interrupt vector as any other USB interrupt the application must perform an extra check to determine what was the actual source of the interrupt It is important to note that this DMA interrupt does not mean that the USB transfer is complete but that the data has been transferred to the USB controller s FIFO There will also be an interrupt indicating that the USB transfer is complete However both events need to be handled in the same interrupt routine This because if other code in the
24. is called with flag PWM GEN MODE FAULT PER set in the u Config parameter When a fault input is as serted the minimum fault period timer ensures that it remains asserted for at least the number of clock cycles specified Note This function is only available on devices supporting extended PWM fault handling Returns None 16 2 1 10 ROM PWMGenFaultStatus Returns the current state of the fault triggers for a given PWM generator Prototype unsigned long ROM PWMGenFaultStatus unsigned long ulBase unsigned long ulGen unsigned long ulGroup ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM PWMTABLE is an array of pointers located at ROM APITABLE 8 ROM PWMGenFaultStatus is a function pointer located at ROM PWMTABLE 2 s Parameters ulBase is the base address of the PWM module January 26 2012 183 Pulse Width Modulator PWM ulGen is the PWM generator whose fault trigger states are being queried Must be one of PWM GEN 0 PWM GEN 1 PWM GEN 2 or PWM GEN 3 ulGroup indicates the subset of faults that are being queried This must be PWM FAULT GROUP 0 or PWM FAULT GROUP 1 Description This function allows an application to query the current state of each of the fault trig ger inputs to a given PWM generator The current state of each fault trigger in put is returned unless ROM PWMdGenConfigure has previously been called with flag PWM
25. pControlTable is a pointer to the 1024 byte aligned base address of the uDMA channel control table Description This function sets the base address of the channel control table This table resides in system memory and holds control information for each uDMA channel The table must be aligned on a 1024 byte boundary The base address must be set before any of the channel functions can be used The size of the channel control table depends on the number of uDMA channels and which transfer modes are used Refer to the introductory text and the microcontroller data sheet for more information about the channel control table Returns None January 26 2012 299 uDMA Controller 23 2 1 18 ROM_uDMADisable Disables the UDMA controller for use Prototype void ROM_uDMADisable void ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM UDMATABLE is an array of pointers located at ROM APITABLE 17 2 ROM uDMADisable is a function pointer located at ROM UDMATABLE Description This function disables the uDMA controller Once disabled the uDMA controller will not operate until re enabled with ROM uDMAEnable Returns None 23 2 1 19 ROM uDMAEnable Enables the uDMA controller for use Prototype void ROM uDMAEnable void ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM UDMATABLE is an array of pointers located at ROM APITABLE 17 ROM
26. pulPinType is a pointer to storage for the output drive type Description This function gets the pad configuration for a specified pin on the selected GPIO port The values returned in pulStrength and pulPinType correspond to the values used in ROM GPlOPadConfigSet This function also works for pin s configured as input pin s January 26 2012 105 GPIO 11 2 1 6 106 however the only meaningful data returned is whether the pin is terminated with a pull up or down resistor Returns None ROM_GPIOPadConfigSet Sets the pad configuration for the specified pin s Prototype void ROM GPIOPadConfigSet unsigned long ulPort unsigned char ucPins unsigned long ulStrength unsigned long ulPinType ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM GPIOTABLE is an array of pointers located at ROM_APITABLE 4 ROM GPIOPadConfigSet is a function pointer located at ROM GPIOTABLE ol Parameters ulPort is the base address of the GPIO port ucPins is the bit packed representation of the pin s ulStrength specifies the output drive strength ulPinType specifies the pin type Description This function sets the drive strength and type for the specified pin s on the selected GPIO port For pin s configured as input ports the pad is configured as requested but the only real effect on the input is the configuration of the pull up or pull down termination T
27. ulBase is the base address of the timer module Description This function causes the timer to stop counting when in RTC mode Returns None January 26 2012 257 Timer 21 2 1 21 ROM_TimerRTCEnable Enable RTC counting Prototype void ROM_TimerRTCEnable unsigned long ulBase ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM TIMERTABLE is an array of pointers located at ROM APITABLE 11 ROM TimerRTCEnable is a function pointer located at ROM TIMERTABLE 8 Parameters ulBase is the base address of the timer module Description This function causes the timer to start counting when in RTC mode If not configured for RTC mode this will do nothing Returns None 21 2 1 22 ROM TimerValueGet 258 Gets the current timer value Prototype unsigned long ROM TimerValueGet unsigned long ulBase unsigned long ulTimer ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM TIMERTABLE is an array of pointers located at ROM APITABLE 11 ROM TimerValueGet is a function pointer located at ROM TIMERTABLE 16 Parameters ulBase is the base address of the timer module ulTimer specifies the timer must be one of TIMER A or TIMER B Only TIMER A should be used when the timer is configured for 32 bit operation Description This function reads the current value of the specif
28. unsigned long ROM I2CMasterDataGet unsigned long ulBase ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM I2CTABLE is an array of pointers located at ROM_APITABLE 3 ROM I2CMasterDataGet is a function pointer located at ROM I2CTABLE 20 Parameters ulBase is the base address of the I2C Master module Description This function reads a byte of data from the I2C Master Data Register Returns Returns the byte received from by the I2C Master cast as an unsigned long ROM l2CMasterDataPut Transmits a byte from the I2C Master Prototype void ROM I2CMasterDataPut unsigned long ulBase unsigned char ucData ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM I2CTABLE is an array of pointers located at ROM_APITABLE 3 ROM I2CMasterDataPut is a function pointer located at ROM I2CTABLE Ce Parameters ulBase is the base address of the I2C Master module ucData data to be transmitted from the 12C Master Description This function will place the supplied data into 12C Master Data Register Returns None ROM 2CMasterDisable Disables the I2C master block January 26 2012 127 Inter Integrated Circuit I2C 12 2 1 7 12 2 1 8 128 Prototype void ROM I2CMasterDisable unsigned long ulBase ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM I2CTABLE
29. 4 Parameters ulBase is the I2S module base address ulData is the single or dual channel 12S data Description This function writes a single channel sample or combined left right samples to the 12S trans mit FIFO The format of the sample is determined by the configuration that was used with the function ROM l2STxConfigSet If the transmit mode is I28 MODE DUAL STEREO then the u Data parameter contains either the left or right sample The left and right sample alternate with each write to the FIFO left sample first If the transmit mode is I28 MODE COMPACT STEREO 16 or I28 MODE COMPACT STEREO 8 then the ulData parameter contains both the left and right samples If the transmit mode is I28 MODE SINGLE MONO then the u Data parameter contains the single channel sample For the compact modes both the left and right samples are written at the same time If 16 bit compact mode is used then the least significant 16 bits contain the left sample and the most significant 16 bits contain the right sample If 8 bit compact mode is used then the lower 8 bits contain the left sample and the next 8 bits contain the right sample with the upper 16 bits unused If there is no room in the transmit FIFO then this function will return immediately without writing any data to the FIFO Returns The number of elements written to the 12S transmit FIFO 1 or 0 13 2 1 17 ROM_I2STxDisable 152 Disables the 12S transm
30. ADC PHASE 90 ADC PHASE 112 5 ADC PHASE 135 ADC PHASE 157 5 ADC PHASE 180 ADC PHASE 202 5 ADC PHASE 225 ADC PHASE 247 5 ADC PHASE 270 ADC PHASE 292 5 ADC PHASE 315 or ADC PHASE 337 5 Description This function sets the phase delay between the detection of an ADC trigger event and the start of the sample sequence By selecting a different phase delay for a pair of ADC modules such January 26 2012 5 2 1 15 5 2 1 16 Analog to Digital Converter ADC as ADC PHASE 0 and ADC PHASE 180 and having each ADC module sample the same analog input it is possible to increase the sampling rate of the analog input with samples N N 2 N 4 and so on coming from the first ADC and samples N 1 N 3 N 5 and so on coming from the second ADC The ADC module has a single phase delay that is applied to all sample sequences within that module Returns None ROM ADCProcessorTrigger Causes a processor trigger for a sample sequence Prototype void ROM ADCProcessorTrigger unsigned long ulBase unsigned long ulSequenceNum ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM ADCTABLE is an array of pointers located at ROM APITABLE 5 ROM ADCProcessorTrigger is a function pointer located at ROM ADCTABLE 13 Parameters ulBase is the base address of the ADC module ulSequenceNum is the sample sequence number with ADC TRIGGER WAIT or ADC TRIGGER SIGNAL optionally ORed into
31. Disables EPI interrupt sources Prototype void ROM EPIIntDisable unsigned long ulBase unsigned long ulIntFlags ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM EPITABLE is an array of pointers located at ROM_APITABLE 23 ROM EPIIntDisable is a function pointer located at ROM EPITABLE 19 Parameters ulBase is the EPI module base address ullntFlags is a bit mask of the interrupt sources to be disabled Description This function disables the specified EPI sources for interrupt generation The ulIntFlags param eter can be the logical OR of any of the following values EPI INT RXREQ EPI INT TXREQ orI2S INT ERR Returns Returns None ROM EPlIntEnable Enables EPI interrupt sources Prototype void ROM EPIIntEnable unsigned long ulBase unsigned long ulIntFlags ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM EPITABLE is an array of pointers located at ROM_APITABLE 23 ROM EPIIntEnable is a function pointer located at ROM EPITABLE 18 Parameters ulBase is the EPI module base address ullntFlags is a bit mask of the interrupt sources to be enabled Description This function enables the specified EPI sources to generate interrupts The ullntFlags param eter can be the logical OR of any of the following values m EPI INT TXRE
32. It is important to note that the first 64 bytes of this memory are dedicated to endpoint 0 for control transactions The remaining 4032 bytes are configurable however the application desires The FIFO configuration is usually set at the beginning of the application and not modified once the USB controller is in use The FIFO configuration uses the ROM USBFIFOConfigSet API to set the starting address and the size of the FIFOs that are dedicated to each endpoint Example FIFO Configuration 0 64 endpoint 0 IN OUT 64 bytes Hl January 26 2012 303 USB Controller 24 2 304 64 576 endpoint 1 IN 512 bytes 576 1088 endpoint 1 OUT 512 bytes 1088 1600 endpoint 2 IN 512 bytes ff FIFO for endpoint 1 IN starts at address 64 and is 512 bytes in size ROM_USBFIFOConfigSet USBO_BASE USB EP 1 64 USB_FIFO_SZ_512 USB EP DEV IN FIFO for endpoint 1 OUT starts at address 576 and is 512 bytes in size ROM_USBFIFOConfigSet USBO_BASE USB EP 1 576 USB FIFO SZ 512 USB EP DEV OUT FIFO for endpoint 2 IN starts at address 1088 and is 512 bytes in size ft ROM_USBFIFOConfigSet USBO BASE USB EP 2 1088 USB FIFO SZ 512 USB EP DEV IN Using USB with the uDMA Controller The USB controller can be used with the uDMA for either sending or receiving data with both host and device controllers The uDMA controller cannot be used to access endpoint 0 however all o
33. Likewise the functions ROM l2SRxDataGet and ROM I2SRxDataGetNonBlocking are used to read data from the receive FIFO There are several functions that can be used to query the status of the 12S peripheral The functions ROM I2SRxFIFOLevelGet and ROM I2STxFIFOLevelGet can be used to read the number of samples in the receive or transmit FIFO January 26 2012 141 Inter IC Sound 12S 13 2 13 2 1 13 2 1 1 142 There is a master clock that is used to derive the serial bit clock SCLK and the left right word clock LRCLK timings The master clock can be sourced from the microcontroller s in ternal PLL or from an external pin The master clock source is configured with the function ROM 1l2SMasterClockSelect This function will configure both the transmit and receive module If the internal PLL is used then the master clock rate must be set using ROM_SysCtll2SMClkSet Interrupts for the transmit and receive modules are configured together since there is one interrupt for both Interrupts are enabled or disabled using ROM l2SIntEnable and ROM l2SIntDisable The interrupt status can be read using ROM I2SIntStatus from within the interrupt handler or non interrupt code When in the interrupt handler the pending interrupts must be cleared using ROM I2SIntClear Functions Functions void ROM I2SIntClear unsigned long ulBase unsigned long ullntFlags void ROM I2SIntDisable unsigned long ulBase unsigned long ul
34. PWM OUT 2 PWM OUT 3 PWM OUT 4 PWM OUT 5 PWM OUT 6 or PWM OUT 7 Description This function gets the currently programmed pulse width for the specified PWM output If the update of the comparator for the specified output has yet to be completed the value returned may not be the active pulse width The value returned is the programmed pulse width mea sured in PWM clock ticks Returns Returns the width of the pulse in PWM clock ticks 16 2 1 27 ROM PWMPulseWiadthSet Sets the pulse width for the specified PWM output Prototype void ROM PWMPulseWidthSet unsigned long ulBase unsigned long ulPWMOut unsigned long ulWidth 194 January 26 2012 Pulse Width Modulator PWM ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM PWMTABLE is an array of pointers located at ROM APITABLE 8 ROM PWMPulseWidthSet is a function pointer located at ROM PWMTABLE Ce Parameters ulBase is the base address of the PWM module ulPWMOut is the PWM output to modify Must be one of PWM OUT 0 PWM OUT 1 PWM OUT 2 PWM OUT 3 PWM OUT 4 PWM OUT 5 PWM OUT 6 or PWM OUT 7 ulWidth specifies the width of the positive portion of the pulse Description This function sets the pulse width for the specified PWM output where the pulse width is defined as the number of PWM clock ticks Note Any subsequent calls made to this function before an update occurs will cause the pre
35. Parameters ulBase is the 12S module base address pulData points to storage for the returned I2S sample data Description This function reads a single channel sample or combined left right samples from the 12S re ceive FIFO The format of the sample is determined by the configuration that was used with the function ROM I2SRxConfigSet If the receive mode is I28 MODE DUAL STEREO then the received data contains either the left or right sample The left and right sample alternate with each read from the FIFO left sample first If the receive mode is I28 MODE COMPACT STEREO 16 or I28 MODE COMPACT STEREO 8 then the received data contains both the left and right samples If the receive mode is I28 MODE SINGLE MONO then the received data contains the single channel sample For the compact modes both the left and right samples are read at the same time If 16 bit compact mode is used then the least significant 16 bits contain the left sample and the most significant 16 bits contain the right sample If 8 bit compact mode is used then the lower 8 bits contain the left sample and the next 8 bits contain the right sample with the upper 16 bits unused If there is no data in the receive FIFO then this function will return immediately without reading any data from the FIFO Returns January 26 2012 The number of elements read from the 12S receive FIFO 1 or 0 147 Inter IC Sound 12S 13 2 1 9 ROM I2SRxDisable Disables th
36. Pulse Width Modulator PWM Note This function is only available on devices supporting extended PWM fault handling Returns None 16 2 1 13 ROM PWMdGenlntClear Clears the specified interrupt s for the specified PWM generator block Prototype void ROM PWMGenIntClear unsigned long ulBase unsigned long ulGen unsigned long ulInts ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM PWMTABLE is an array of pointers located at ROM APITABLE 8 ROM PWMGenIntClear is a function pointer located at ROM_PWMTABLE 17 Parameters ulBase is the base address of the PWM module ulGen is the PWM generator to query Must be one of PWM GEN 0 PWM GEN 1 PWM GEN 2 or PWM GEN 3 ullnts specifies the interrupts to be cleared Description Clears the specified interrupt s by writing a 1 to the specified bits of the interrupt sta tus register for the specified PWM generator The ullnts parameter is the logical OR of PWM INT CNT ZERO PWM INT CNT LOAD PWM INT CNT AU PWM INT CNT AD PWM INT CNT BU or PWM INT CNT BD Note Because there is a write buffer in the Cortex M3 processor it may take several clock cycles before the interrupt source is actually cleared Therefore it is recommended that the interrupt source be cleared early in the interrupt handler as opposed to the very last action to avoid returning from the interrupt handler before the interrupt source is actu
37. ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM INTERRUPTTABLE is an array of pointers located at ROM APITABLE 14 ROM IntPrioritySet is a function pointer located at ROM INTERRUPTTABLE 6 Parameters ullnterrupt specifies the interrupt in question ucPriority specifies the priority of the interrupt Description This function is used to set the priority of an interrupt When multiple interrupts are asserted simultaneously the ones with the highest priority are processed before the lower priority in terrupts Smaller numbers correspond to higher interrupt priorities priority O is the highest interrupt priority The hardware priority mechanism will only look at the upper N bits of the priority level where N is 3 for the Stellaris family so any prioritization must be performed in those bits The remaining bits can be used to sub prioritize the interrupt sources and may be used by the hardware priority mechanism on a future part This arrangement allows priorities to migrate to different NVIC implementations without changing the gross prioritization of the interrupts Returns None January 26 2012 165 Interrupt Controller NVIC 166 January 26 2012 Memory Protection Unit MPU 15 Memory Protection Unit MPU SPT ncniieatncunsdkta cdma Add a dabas unte aa un desi a eode cid dare dean bias 167 PPOO Foe nde esu hee penta UEM MU MEE ELLA LM EL cL M ER Oe 168
38. SYSCTL XTAL 10MHZ SYSCTL XTAL 12MHZ SYSCTL XTAL 12 2MHZ SYSCTL XTAL 13 5MHZ SYSCTL XTAL 14 3MHZ SYSCTL XTAL 16MHZ or SYSCTL XTAL 16 3MHZ Values below SYSCTL XTAL 3 57MHZ are not valid when the PLL is in operation The oscillator source is chosen with one of the following values SYSCTL OSC MAIN SYSCTL OSC INT SYSCTL OSC INT4 or SYSCTL_OSC_INT30 The internal and main oscillators are disabled with the SYSCTL INT OSC DIS and SYSCTL MAIN OSC DIS flags respectively The external oscillator must be enabled in order to use an external clock source Note that attempts to disable the oscillator used to clock the device will be prevented by the hardware To clock the system from an external source such as an external crystal oscillator use SYSCTL USE OSC SYSCTL OSC MAIN To clock the system from the main oscillator use SYSCTL USE OSC SYSCTL OSC MAIN To clock the system from the PLL use SYSCTL USE PLL SYSCTL OSC MAIN and select the appropriate crystal with one of the SYSCTL XTAL xxx values Note If selecting the PLL as the system clock source that is via SYSCTL USE PLL this function will poll the PLL lock interrupt to determine when the PLL has locked If an interrupt handler for the system control interrupt is in place and it responds to and clears the PLL lock interrupt this function will delay until its timeout has occurred instead of completing as soon as PLL lock is achieved Returns None 19 2 1 5 ROM SysC
39. Saves the flash protection settings Prototype long ROM FlashProtectSave void January 26 2012 95 Flash 10 2 1 9 ROM Location ROM_APITABLE is an array of pointers located at 0x0100 0010 ROM_FLASHTABLE Is an array of pointers located at ROM_APITABLE 7 ROM_FlashProtect Save is a function pointer located at ROM FLASHTABLE 6 Description This function will make the currently programmed flash protection settings permanent This is a non reversible operation a chip reset or power cycle will not change the flash protection This function will not return until the protection has been saved Returns Returns 0 on success or 1 if a hardware error is encountered ROM FlashProtectSet Sets the protection setting for a block of flash Prototype long ROM FlashProtectSet unsigned long ulAddress tFlashProtection eProtect ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM FLASHTABLE is an array of pointers located at ROM APITABLE 7 ROM FlashProtectSet is a function pointer located at ROM FLASHTABLE ol Parameters ulAddress is the start address of the flash block to be protected eProtect is the protection to be applied to the block Can be one of FlashReadWrite FlashReadOnly or FlashExecuteOnly Description This function will set the protection for the specified 2 kB block of flash Blocks which are read write can be made read only or execute only Blo
40. UDMA ATTR HIGH PRIORITY is used to set this channel to high priority UDMA ATTR REQMASK is used to mask the hardware request signal from the periph eral for this channel Returns None January 26 2012 281 uDMA Controller 23 2 1 2 ROM _uDMAChannelAttributeEnable Enables attributes of a UDMA channel Prototype void ROM_uDMAChannelAttributeEnable unsigned ROM Location long ul unsigned long ul ChannelNum Attr ROM APITABLE is an array of pointers located at 0x0100 0010 ROM UDMATABLE is an array of pointers located at ROM APITABLE 17 ROM uDMAChannelAttributeEnable is a ROM UDMATABLE 11 Parameters ulChannelNum is the channel to configure ulAtir is a combination of attribu Description tes for the channel function pointer located at This function is used to enable attributes of a uDMA channel The ulChannelNum parameter must be only one of the following values m UDMA CHANNEL ADCO UDMA CHANNEL ADC1 m UDMA CHANNEL ADC2 UDMA CHANNEL ADC3 282 m UDMA SEC CHANNEL ADC10 m UDMA SEC CHANNEL ADC11 m UDMA SEC CHANNEL ADC12 m UDMA SEC CHANNEL ADC13 m UDMA SEC CHANNEL EPIORX m UDMA SEC CHANNEL EPIOTX UDMA CHANNEL ETHORX UDMA CHANNEL ETHOTX UDMA CHANNEL I2S0RX m UDMA CHANNEL I2SO0TX m UDMA CHANNEL SSIORX m UDMA CHANNEL SSIOTX m UDMA CHANNEL SSHRX UDMA CHANNEL SSHTX m UDMA SEC CHANNEL SSHRX m UDMA SEC CHANNEL SSHTX
41. signal If the update of the counter for the specified PWM generator has yet to be completed the value returned may not be the active period The value returned is the programmed period measured in PWM clock ticks Returns Returns the programmed period of the specified generator block in PWM clock ticks 16 2 1 18 ROM_PWMGenPeriodSet Set the period of a PWM generator Prototype void ROM_PWMGenPeriodSet unsigned long ulBase unsigned long ulGen unsigned long ulPeriod ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM PWMTABLE is an array of pointers located at ROM APITABLE 8 ROM PWMGenPeriodSet is a function pointer located at ROM_PWMTABLE 2 Parameters ulBase is the base address of the PWM module ulGen is the PWM generator to be modified Must be one of PWM GEN 0 PWM GEN 1 PWM GEN 2 or PWM GEN 3 ulPeriod specifies the period of PWM generator output measured in clock ticks Description This function sets the period of the specified PWM generator block where the period of the generator block is defined as the number of PWM clock ticks between pulses on the generator block zero signal Note Any subsequent calls made to this function before an update occurs will cause the previous values to be overwritten Returns None 16 2 1 19 ROM PWMIntDisable Disables generator and fault interrupts for a PWM module Prototype void ROM PWMI
42. unsigned long ulBase ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM I2CTABLE is an array of pointers located at ROM_APITABLE 3 ROM I2CSlaveDataGet is a function pointer located at ROM I2CTABLE 23 Parameters ulBase is the base address of the I2C Slave module Description This function reads a byte of data from the I2C Slave Data Register Returns Returns the byte received from by the I2C Slave cast as an unsigned long January 26 2012 Inter Integrated Circuit I2C 12 2 1 16 ROM_l2CSlaveDataPut Transmits a byte from the I2C Slave Prototype void ROM_I2CSlaveDataPut unsigned long ulBase unsigned char ucData ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM I2CTABLE is an array of pointers located at ROM_APITABLE 3 ROM I2CSlaveDataPut is a function pointer located at ROM I2CTABLE 22 Parameters ulBase is the base address of the I2C Slave module ucData data to be transmitted from the 12C Slave Description This function will place the supplied data into I2C Slave Data Register Returns None 12 2 1 17 ROM_l2CSlaveDisable Disables the I2C slave block Prototype void ROM I2CSlaveDisable unsigned long ulBase ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM I2CTABLE is an array of pointers located at ROM_APITABLE 3 ROM I2CSlave
43. 16 bit timers each timer is separately configured The first timer is configured by setting u Config to the result of a logical OR operation between one of the following values and ulConfig m TIMER CFG A ONE SHOT 16 bit one shot timer m TIMER CFG A ONE SHOT UP 16 bit one shot timer that counts up instead of down m TIMER CFG A PERIODIC 16 bit periodic timer TIMER CFG A PERIODIC UP 16 bit periodic timer that counts up instead of down TIMER CFG A CAP COUNT 16 bit edge count capture m TIMER CFG A CAP COUNT UP 16 bit edge count capture that counts up instead of down TIMER CFG A CAP TIME 16 bit edge time capture m TIMER CFG A CAP TIME UP 16 bit edge time capture that counts up instead of down m TIMER CFG A PWM 16 bit PWM output Similarly the second timer is configured by setting u Config to the result of a logical OR oper ation between one of the corresponding TIMER CFG B values and ulConfig Returns None ROM TimerControlLevel Controls the output level Prototype void ROM TimerControlLevel unsigned long ulBase unsigned long ulTimer tBoolean bInvert ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM TIMERTABLE is an array of pointers located at ROM APITABLE 11 ROM TimerControlLevel is a function pointer located at ROM_TIMERTABLE 4 Parameters ulBase is the base address of the timer module ulTimer specifies
44. APITABLE 17 RO DMAControlAlternateBaseGet is a function pointer located at uU ROM UDMATABLE 21 Description 298 This function gets the base address of the second half of the channel control table that holds the alternate control structures for each channel January 26 2012 uDMA Controller Returns Returns a pointer to the base address of the second half of the channel control table 23 2 1 16 ROM_uDMAControlBaseGet Gets the base address for the channel control table Prototype void x ROM uDMAControlBaseGet void ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM UDMATABLE is an array of pointers located at ROM APITABLE 17 ROM uDMAControlBaseGet is a function pointer located at ROM UDMATABLE 9 Description This function gets the base address of the channel control table This table resides in system memory and holds control information for each uDMA channel Returns Returns a pointer to the base address of the channel control table 23 2 1 17 ROM uDMAControlBaseSet Sets the base address for the channel control table Prototype void ROM uDMAControlBaseSet void pControlTable ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM UDMATABLE is an array of pointers located at ROM APITABLE 17 ROM uDMAControlBaseSet is a function pointer located at ROM_UDMATABLE 8 Parameters
45. APITABLE is an array of pointers located at 0x0100 0010 ROM FLASHTABLE is an array of pointers located at ROM APITABLE 7 ROM FlashIntDisable is a function pointer located at ROM FLASHTABLE 11 Parameters ullntFlags is a bit mask of the interrupt sources to be disabled Can be any of the FLASH INT PROGRAM or FLASH INT ACCESS values Description Disables the indicated flash controller interrupt sources Only the sources that are enabled can be reflected to the processor interrupt disabled sources have no effect on the processor Returns None ROM FlashlntEnable Enables individual flash controller interrupt sources Prototype void ROM FlashIntEnable unsigned long ulIntFlags ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM FLASHTABLE is an array of pointers located at ROM APITABLE 7 ROM FlashIntEnable is a function pointer located at ROM FLASHTABLE 10 January 26 2012 93 Flash 10 2 1 5 10 2 1 6 94 Parameters ullntFlags is a bit mask of the interrupt sources to be enabled Can be any of the FLASH_INT_PROGRAM or FLASH_INT_ACCESS values Description Enables the indicated flash controller interrupt sources Only the sources that are enabled can be reflected to the processor interrupt disabled sources have no effect on the processor Returns None ROM_FlashIntStatus Gets the current interrupt status Prototype unsigned long ROM
46. APITABLE is an array of pointers located at 0x0100 0010 ROM MPUTABLE is an array of pointers located at ROM APITABLE 20 ROM MPUDisable is a function pointer located at ROM_MPUTABLE 1 Description This function disables the Cortex M3 memory protection unit When the MPU is disabled the default memory map is used and memory management faults are not generated Returns None ROM MPUEnable Enables and configures the MPU for use January 26 2012 Memory Protection Unit MPU Prototype void ROM_MPUEnable unsigned long ulMPUConfig ROM Location ROM_APITABLE is an array of pointers located at 0x0100 0010 ROM MPUTABLE is an array of pointers located at ROM_APITABLE 20 ROM MPUEnable is a function pointer located at ROM MPUTABLE 0 Parameters ulMPUConfig is the logical OR of the possible configurations Description This function enables the Cortex M3 memory protection unit It also configures the default behavior when in privileged mode and while handling a hard fault or NMI Prior to enabling the MPU at least one region must be set by calling ROM MPURegionSet or else by enabling the default region for privileged mode by passing the MPU CONFIG PRIV DEFAULT flag to ROM MPUEnable Once the MPU is enabled a memory management fault will be generated for any memory access violations The ulMPUConfig parameter should be the logical OR of any of the followin
47. CMD BURST SEND CONT or I2C MASTER CMD BURST RECEIVE CONT commands and for the last byte sent or received using either the 1I2C MASTER CMD BURST SEND FINISH or I2C MASTER CMD BURST RECEIVE FINISH commands If any error is detected during the burst transfer the ROM lI2CMasterControl function should be called using the appropriate stop command I2C MASTER CMD BURST SEND ERROR STOP or I2C MASTER CMD BURST RECEIVE ERROR STOP For the interrupt driven transaction the user must register an interrupt handler for the 12C devices and enable the I2C master interrupt the interrupt will occur when the master is no longer busy Slave Operations When using this API to drive the I2C slave module the user must first initialize the 12C slave module with a call to ROM l2CSlavelnit This will enable the 12C slave module and initialize the slave s own address After the initialization is complete the user may poll the slave sta tus using ROM l2CSlaveStatus to determine if a master requested a send or receive opera tion Depending on the type of operation requested the user can call ROM I2CSlaveDataPut or ROM l2CSlaveDataGet to complete the transaction Alternatively the I2C slave can handle transactions using an interrupt handler Functions Functions m tBoolean ROM l2CMasterBusBusy unsigned long ulBase m tBoolean ROM l2CMasterBusy unsigned long ulBase m void ROM l2CMasterControl unsigned long ulBase unsigned long ulCmd unsigned
48. CS or EPI HB16 CSCFG ALE DUAL CS EPI HB16 CSCFG CS sets EPI30 to operate as a Chip Select CSn sig nal EPI HB16 CSCFG ALE sets EPI30 to operate as an address latch ALE EPI HB16 CSCFG DUAL CS sets EPI30 to operate as CSOn and EPI27 as CS1n with the asserted chip select determined from the most significant address bit for the respective external address map EPI HB16 CSCFG ALE DUAL CS sets EPI30 as an address latch ALE EPI27 as CSOn and EPI26 as CS1n with the asserted chip select determined from the most significant address bit for the respective external address map parameter ulMaxWait is used if the FIFO mode is chosen If a FIFO is used along with RXFULL or TXEMPTY ready signals then this parameter determines the maximum number of clocks to wait when the transaction is being held off by by the FIFO using one of these ready sign Returns Non als A value of 0 means to wait forever e ROM EPiIConfigHB8Set Configures the interface for Host bus 8 operation Prototype void ROM EPIConfigHB8Set unsigned long ulBase unsigned long ulConfig unsigned long ulMaxWait ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM ROM EPITABLE is an array of pointers located at ROM APITABLE 23 EPIConfigHB8Set is a function pointer located at ROM_EPITABLE 5 Parameters ulBase is the EPI module base address ulConfig is the interface con
49. Documentation ROM EthernetConfigGet Gets the current configuration of the Ethernet controller Prototype unsigned long ROM EthernetConfigGet unsigned long ulBase January 26 2012 8 2 1 2 Ethernet Controller ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM ETHERNETTABLE is an array of pointers located at ROM_APITABLE 15 ROM EthernetConfigGet is a function pointer located at ROM ETHERNETTABLE 3 Parameters ulBase is the base address of the controller Description This function will query the control registers of the Ethernet controller and return a bit mapped configuration value See also The description of the ROM EthernetConfigSet function provides detailed information for the bit mapped configuration values that will be returned Returns Returns the bit mapped Ethernet controller configuration value ROM EthernetConfigSet Sets the configuration of the Ethernet controller Prototype void ROM EthernetConfigSet unsigned long ulBase unsigned long ulConfig ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM ETHERNETTABLE is an array of pointers located at ROM APITABLE 15 ROM EthernetConfigSet is a function pointer located at ROM ETHERNETTABLE 2 Parameters ulBase is the base address of the controller ulConfig is the conf
50. EPI GPMODE RDYEN the external peripheral drives an iRDY signal into pin EPIOS27 If absent the peripheral is assumed to be ready at all times This flag may only be used with a free running clock EPI GPMODE CLKQGATE is absent EPI GPMODE FRAMEPIN framing signal is emitted on a pin EPI GPMODE FRAMESO framing signal is 50 50 duty cycle otherwise it is a pulse EPI GPMODE READWRITE read and write strobes are emitted on pins EPI GPMODE WRITE2CYCLE a two cycle write is used otherwise a single cycle write is used EPI GPMODE READ2CYCLE a two cycle read is used otherwise a single cycle read is used EPI GPMODE ASIZE NONE EPI GPMODE ASIZE 4 EPI GPMODE ASIZE 12 or EPI GPMODE ASIZE 20 to choose no address bus or and address bus size of 4 12 or 20 bits EPI GPMODE DSIZE 8 EPI GPMODE DSIZE 16 EPI GPMODE DSIZE 24 or EPI GPMODE DSIZE 32 to select a data bus size of 8 16 24 or 32 bits EPI GPMODE WORD ACCESS use Word Access mode to route bytes to the correct byte lanes allowing data to be stored in the upper bits of the word when necessary parameter ulFrameCount is the number of clocks used to form the framing signal if the framing signal is used The behavior depends on whether the frame signal is a pulse or a 76 January 26 2012 External Peripheral Interface EPI 50 50 duty cycle This value is not used if the framing signal is not enabled with the option EPI GPMODE FRAMEPIN The parameter u MaxWait is used if
51. GPIOG or SYSCTL PERIPH GPIOH Returns None ROM SysCtIGPIOAHBEnable Enables a GPIO peripheral for access from the AHB Prototype void ROM SysCtlGPIOAHBEnable unsigned long ulGPIOPeripheral ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM SYSCTLTABLE is an array of pointers located at ROM APITABLE 13 ROM SysCtlGPIOAHBEnable is a function pointer located at ROM SYSCTLTABLE 29 Parameters ulGPIlOPeripheral is the GPIO peripheral to enable Description This function is used to enable the specified GPIO peripheral to be accessed from the Ad vanced Host Bus AHB instead of the legacy Advanced Peripheral Bus APB When a GPIO peripheral is enabled for AHB access the AHB BASE form of the base address should be used for GPIO functions For example instead of using GPIO PORTA BASE as the base address for GPIO functions use GPIO PORTA AHB BASE instead The ulGPlOPeripheral argument must be only one of the following values SYSCTL PERIPH GPIOA SYSCTL PERIPH GPIOB SYSCTL PERIPH GPIOC January 26 2012 223 System Control SYSCTL_PERIPH_GPIOD SYSCTL_PERIPH_GPIOE SYSCTL_PERIPH_GPIOF SYSCTL_PERIPH_GPIOG or SYSCTL_PERIPH_GPIOH Returns None 19 2 1 10 ROM_SysCtll2SMClkSet Sets the MCLK frequency provided to the 12S module Prototype unsigned long ROM SysCtlI2SMClkSet unsigned long ulInputClock unsigned long ulMClk ROM Location ROM A
52. GPIOPinTypeGPIOInput is a function pointer located at ROM_GPIOTABLE 14 Parameters ulPort is the base address of the GPIO port ucPins is the bit packed representation of the pin s Description The GPIO pins must be properly configured in order to function correctly as GPIO inputs This function provides the proper configuration for those pin s The pin s are specified using a bit packed byte where each bit that is set identifies the pin to be accessed and where bit 0 of the byte represents GPIO port pin 0 bit 1 represents GPIO port pin 1 and so on Returns None 11 2 1 19 ROM GPIOPinTypeGPlOOutput Configures pin s for use as GPIO outputs Prototype void ROM GPIOPinTypeGPIOOutput unsigned long ulPort unsigned char ucPins ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM GPIOTABLE is an array of pointers located at ROM_APITABLE 4 ROM GPIOPinTypeGPIOOutput is a function pointer located at ROM_GPIOTABLE 15 Parameters ulPort is the base address of the GPIO port ucPins is the bit packed representation of the pin s Description The GPIO pins must be properly configured in order to function correctly as GPIO outputs This function provides the proper configuration for those pin s The pin s are specified using a bit packed byte where each bit that is set identifies the pin to be accessed and where bit 0 of the byte represents GP
53. GPIOTABLE is an array of pointers located at ROM_APITABLE 4 ROM GPIOPinTypeSSI is a function pointer located at ROM GPIOTABLE 19 Parameters ulPort is the base address of the GPIO port ucPins is the bit packed representation of the pin s Description The SSI pins must be properly configured for the SSI peripheral to function correctly This function provides a typical configuration for those pin s other configurations may work as well depending upon the board setup for example using the on chip pull ups The pin s are specified using a bit packed byte where each bit that is set identifies the pin to be accessed and where bit 0 of the byte represents GPIO port pin 0 bit 1 represents GPIO port pin 1 and so on Note This cannot be used to turn any pin into a SSI pin it only configures a SSI pin for proper operation Returns None 11 2 1 26 ROM GPIOPinTypeTimer Configures pin s for use by the Timer peripheral Prototype void ROM GPIOPinTypeTimer unsigned long ulPort unsigned char ucPins ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM GPIOTABLE is an array of pointers located at ROM_APITABLE 4 ROM GPIOPinTypeTimer is a function pointer located at ROM GPIOTABLE 20 Parameters ulPort is the base address of the GPIO port ucPins is the bit packed representation of the pin s 118 January 26 2012 GPIO Description
54. I2C Slave interrupt sources Prototype void ROM I2CSlaveIntClearEx unsigned long ulBase unsigned long ulIntFlags ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM I2CTABLE is an array of pointers located at ROM_APITABLE 3 ROM I2CSlaveIntClearEx is a function pointer located at ROM I2CTABLE 28 Parameters ulBase is the base address of the I2C Slave module ullntFlags is a bit mask of the interrupt sources to be cleared Description The specified I2C Slave interrupt sources are cleared so that they no longer assert This must be done in the interrupt handler to keep it from being called again immediately upon exit The ullntFlags parameter has the same definition as the ullntFlags parameter to ROM I2CSlavelntEnableEx Note Because there is a write buffer in the Cortex M3 processor it may take several clock cycles before the interrupt source is actually cleared Therefore it is recommended that the interrupt source be cleared early in the interrupt handler as opposed to the very last action to avoid returning from the interrupt handler before the interrupt source is actually cleared Failure to January 26 2012 135 Inter Integrated Circuit I2C do so may result in the interrupt handler being immediately reentered because the interrupt controller still sees the interrupt source asserted Returns None 12 2 1 22 ROM 2CSlavelntDisabl
55. January 26 2012 uDMA Controller UDMA CHANNEL UARTOTX m UDMA CHANNEL UART1RX m UDMA CHANNEL UART1TX m UDMA SEC CHANNEL UART1RX m UDMA SEC CHANNEL UART1TX m UDMA SEC CHANNEL UART2RX 0 m UDMA SEC CHANNEL UART 2TX 1 m UDMA SEC CHANNEL UART2RX 12 m UDMA SEC CHANNEL UART2TX 13 UDMA CHANNEL USBEP1RX m UDMA CHANNEL USBEP1TX m UDMA CHANNEL USBEP2RX m UDMA CHANNEL USBEP2TX UDMA CHANNEL USBEP3RX UDMA CHANNEL USBEPS3TX m UDMA CHANNEL SW m UDMA SEC CHANNEL SW Returns Returns the logical OR of the attributes of the uDMA channel which can be any of the following UDMA ATTR USEBURST is used to restrict transfers to use only a burst mode m UDMA ATTR ALTSELECT is used to select the alternate control structure for this chan nel UDMA ATTR HIGH PRIORITY is used to set this channel to high priority UDMA ATTR REQMASK is used to mask the hardware request signal from the periph eral for this channel 23 2 1 4 ROM uDMAChannelControlSet Sets the control parameters for a uDMA channel control structure Prototype void ROM uDMAChannelControlSet unsigned long ulChannelStructIndex unsigned long ulControl ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM UDMATABLE is an array of pointers located at ROM APITABLE 17 ROM uDMAChannelControlSet is a function pointer located at ROM_UDMATABLE 14 Parameters ulChannelStructindex is the logical OR of the uDMA ch
56. January 26 2012 129 Inter Integrated Circuit I2C 12 2 1 11 130 Prototype void ROM I2CMasterIntClear unsigned long ulBase ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM I2CTABLE is an array of pointers located at ROM_APITABLE 3 ROM I2CMasterIntClear is a function pointer located at ROM I2CTABLE 13 Parameters ulBase is the base address of the I2C Master module Description The I2C Master interrupt source is cleared so that it no longer asserts This must be done in the interrupt handler to keep it from being called again immediately upon exit Note Because there is a write buffer in the Cortex M3 processor it may take several clock cycles before the interrupt source is actually cleared Therefore it is recommended that the interrupt source be cleared early in the interrupt handler as opposed to the very last action to avoid returning from the interrupt handler before the interrupt source is actually cleared Failure to do so may result in the interrupt handler being immediately reentered because the interrupt controller still sees the interrupt source asserted Returns None ROM l2CMasterlntDisable Disables the I2C Master interrupt Prototype void ROM I2CMasterIntDisable unsigned long ulBase ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM I2CTABLE is an array of pointers located at ROM APITAB
57. PWM module ulGen is the PWM generator whose fault triggers are being set Must be one of PWM GEN 0 PWM GEN 1 PWM GEN 2 or PWM GEN 3 ulGroup indicates the subset of possible faults that are to be configured This must be PWM FAULT GROUP 0 or PWM FAULT GROUP 1 ulFaultTriggers defines the set of inputs that are to contribute towards generation of the fault signal to the given PWM generator For PWM FAULT GROUP OQ this will be the log ical OR of PWM FAULT FAULTO PWM FAULT FAULT1 PWM FAULT FAULT2 or PWM FAULT FAULTS3 For PWM FAULT GROUP 1 this wil be the logi cal OR of PWM FAULT DCMPO PWM FAULT DCMP1 PWM FAULT DCMP2 PWM FAULT DCMP3 PWM FAULT DCMPA PWM FAULT DCMP5 PWM FAULT DCMP6 or PWM_FAULT_DCMP7 Description January 26 2012 This function allows selection of the set of fault inputs that will be combined to gener ate a fault condition to a given PWM generator By default all generators use only FAULTO for backwards compatibility but if ROM PWMdGenConfigure is called with flag PWM GEN MODE FAULT SRC in the u Config parameter extended fault handling is en abled and this function must be called to configure the fault triggers The fault signal to the PWM generator is generated by ORing together each of the sig nals whose inputs are specified in the u FaultTriggers parameter after having adjusted the sense of each FAULTn input based on the configuration previously set using a call to ROM PWMGenFaultConfigure 185
58. Parameters ulChannelNum is the channel number to enable Description DMATABLE 5 This function enables a specific uDMA channel for use This function must be used to enable a channel before it can be used to perform a uDMA transfer When a uDMA transfer is completed the channel will be automatically disabled by the uDMA controller Therefore this function should be called prior to starting up any new transfer The ulChannelNum parameter must be only one of the following values m UDMA CHANNEL ADCO m UDMA CHANNEL ADC1 m UDMA CHANNEL ADC2 m UDMA CHANNEL ADC3 m UDMA SEC CHANNEL ADC10 m UDMA SEC CHANNEL ADC11 UDMA SEC CHANNEL ADC12 UDMA SEC CHANNEL ADC13 m UDMA SEC CHANNEL EPIORX m UDMA SEC CHANNEL EPIOTX m UDMA CHANNEL ETHORX m UDMA CHANNEL ETHOTX m UDMA CHANNEL I2S0RX January 26 2012 uDMA Controller UDMA_CHANNEL_I2SOTX m UDMA CHANNEL SSIORX m UDMA CHANNEL SSIOTX m UDMA CHANNEL SSHRX m UDMA CHANNEL SSHTX m UDMA SEC CHANNEL SSHRX m UDMA SEC CHANNEL SSHTX UDMA CHANNEL TMROA UDMA CHANNEL TMROB UDMA CHANNEL TMR1A m UDMA CHANNEL TMR1B m UDMA SEC CHANNEL TMR1A m UDMA SEC CHANNEL TMR1B m UDMA SEC CHANNEL TMR2A 4 m UDMA SEC CHANNEL TMR2B 5 m UDMA SEC CHANNEL TMR2A 6 m UDMA SEC CHANNEL TMR2B 7 UDMA SEC CHANNEL TMR2A 14 UDMA SEC CHANNEL TMR2B 15 m UDMA SEC CHANNEL TMR3A m UDMA SEC CHANNEL TMR3B m UDMA CHANNEL UARTORX UDMA CHANNEL UARTOTX m UDMA CHANNEL UART1RX m UDMA CHA
59. RGN SIZE 2G MPU RGN SIZE 4G The read write access permissions are applied separately for the privileged and user modes The read write access flags must be one of the following MPU RGN PERM PRV NO USR NO no access in privileged or user mode m MPU RGN PERM PRV RW USR NO privileged read write user no access MPU RGN PERM PRV RW USR RO privileged read write user read only 172 January 26 2012 Memory Protection Unit MPU MPU RGN PERM PRV RW USR RW privileged read write user read write MPU RGN PERM PRV RO USR NO privileged read only user no access m MPU RGN PERM PRV RO USR RO privileged read only user read only The region is automatically divided into 8 equally sized sub regions by the MPU Sub regions can only be used in regions of size 256 bytes or larger Any of these 8 sub regions can be disabled This allows for creation of holes in a region which can be left open or overlaid by another region with different attributes Any of the 8 sub regions can be disabled with a logical OR of any of the following flags MPU SUB RGN DISABLE 0 MPU SUB RGN DISABLE 1 MPU SUB RGN DISABLE 2 MPU SUB RGN DISABLE 3 MPU SUB RGN DISABLE 4 MPU SUB RGN DISABLE 5 MPU SUB RGN DISABLE 6 MPU SUB RGN DISABLE 7 Finally the region can be initially enabled or disabled with one of the following flags MPU RGN ENABLE MPU RGN DISABLE As an example to set a region with the following attributes size of 32 KB execution en abl
60. ROM APITABLE 1 ROM UARTIntStatus is a function pointer located at ROM UARTTABLI Parameters ulBase is the base address of the UART port bMasked is false if the raw interrupt status is required and true if the masked interrupt status is required Description This returns the interrupt status for the specified UART Either the raw interrupt status or the status of interrupts that are allowed to reflect to the processor can be returned Returns Returns the current interrupt status enumerated as a bit field of values described in ROM UARTIntEnable 272 January 26 2012 UART 22 2 1 24 ROM UARTParityModeGet Gets the type of parity currently being used Prototype unsigned long ROM UARTParityModeGet unsigned long ulBase ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM UARTTABLE is an array of pointers located at ROM APITABLE 1 ROM UARTParityModeGet is a function pointer located at ROM UARTTABLE 2 Parameters ulBase is the base address of the UART port Description This function gets the type of parity used for transmitting data and expected when receiving data Returns Returns the current parity settings specified as one of UART CONFIG PAR NONE UART CONFIG PAR EVEN UART CONFIG PAR ODD UART CONFIG PAR ONE or UART CONFIG PAR ZERO 22 2 1 25 ROM UARTParityModeSet Sets the type of parity Prototype void ROM UARTParityModeSet unsigned
61. ROM APITABLE 8 ROM_PWMOutput State is a function pointer located at ROM PWMTABLE 11 Parameters ulBase is the base address of the PWM module ulPWMOutBits are the PWM outputs to be modified Must be the logical OR of any of PWM OUT O0 BIT PWM OUT 1 BIT PWM OUT 2 BIT PWM OUT 3 BIT PWM OUT 4 BIT PWM OUT 5 BIT PWM OUT 6 BIT or PWM OUT 7 BIT bEnable determines if the signal is enabled or disabled January 26 2012 193 Pulse Width Modulator PWM Description This function is used to enable or disable the selected PWM outputs The outputs are selected using the parameter u PWMOutBits The parameter bEnable determines the state of the se lected outputs If bEnable is true then the selected PWM outputs are enabled or placed in the active state If bEnable is false then the selected outputs are disabled or placed in the inactive state Returns None 16 2 1 26 ROM PWMPulseWidthGet Gets the pulse width of a PWM output Prototype unsigned long ROM PWMPulseWidthGet unsigned long ulBase unsigned long ulPWMOut ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM PWMTABLE is an array of pointers located at ROM APITABLE 8 ROM PWMPulseWidthGet is a function pointer located at ROM PWMTABLE Ox Parameters ulBase is the base address of the PWM module ulPWMOut is the PWM output to query Must be one of PWM OUT 0 PWM OUT 1
62. ROM APITABLE is an array of pointers located at 0x0100 0010 ROM TIMERTABLE is an array of pointers located at ROM APITABLE 11 ROM TimerControlTrigger is a function pointer located at ROM TIMERTABLE O1 January 26 2012 21 2 1 5 21 2 1 6 Timer Parameters ulBase is the base address of the timer module ulTimer specifies the timer to adjust must be one of TIMER A TIMER B or TIMER BOTH bEnable specifies the desired trigger state Description This function controls the trigger output for the specified timer If the bEnable parameter is true then the timer s output trigger is enabled otherwise it is disabled Returns None ROM TimerControlWaitOnTrigger Controls the wait on trigger handling Prototype void ROM TimerControlWaitOnTrigger unsigned long ulBase unsigned long ulTimer tBoolean bWait ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM TIMERTABLE is an array of pointers located at ROM APITABLE 11 ROM TimerControlWaitOnTrigger is a function pointer located at ROM TIMERTABLE 22 Parameters ulBase is the base address of the timer module ulTimer specifies the timer s to be adjusted must be one of TIMER A TIMER B or TIMER BOTH bWait specifies if the timer should wait for a trigger input Description This function controls whether or not a timer waits for a trigger input to start counting When e
63. TRIG xxx and ADC COMP INT xxx values The ADC COMP TRIG xxx term can take on the following values January 26 2012 January 26 2012 Analog to Digital Converter ADC m ADC_COMP_TRIG_NONE to never trigger PWM fault condition ADC_COMP_TRIG_LOW_ALWAYS to always trigger PWM fault condition when ADC out put is in the low band ADC COMP TRIG LOW ONCE io trigger PWM fault condition once when ADC output transitions into the low band ADC COMP TRIG LOW HALWAYS to always trigger PWM fault condition when ADC output is in the low band only if ADC output has been in the high band since the last trigger output m ADC COMP TRIG LOW HONCE to trigger PWM fault condition once when ADC output transitions into low band only if ADC output has been in the high band since the last trigger output m ADC COMP TRIG MID ALWAYS to always trigger PWM fault condition when ADC out put is in the mid band m ADC COMP TRIG MID ONCE to trigger PWM fault condition once when ADC output transitions into the mid band m ADC COMP TRIG HIGH ALWAYS to always trigger PWM fault condition when ADC out put is in the high band m ADC COMP TRIG HIGH ONCE to trigger PWM fault condition once when ADC output transitions into the high band ADC COMP TRIG HIGH HALWAYS to always trigger PWM fault condition when ADC output is in the high band only if ADC output has been in the low band since the last trigger output m ADC COMP TRIG HIGH HONCE to trigger PWM fault condi
64. UDMA ATTR USEBURST ROM uDMAChannelControlSet UDMA CHANNEL USBEPIRX UDMA SIZE 8 UDMA SRC INC NONE UDMA DST INC 8 UDMA ARB 64 The next step is to actually start the uDMA transfer Unlike the transfer side if the application is ready this can be set up right away to wait for incoming data Like the transmit case these are the only calls needed to start a new transfer normally all of the previous uDMA configuration can remain the same Example Start requesting of data on endpoint 1 Configure the address and size of the data to transfer The transfer is from the USB FIFO for endpoint 0 to g DataBufferIn ROM uDMAChannelTransferSet UDMA CHANNEL USBEPIRX UDMA MODE BASIC void ROM USBFIFOAddr USBO BASE USB EP 1 g DataBufferIn 64 Enable the uDMA channel and wait for data ROM_uDMAChannelEnable UDMA_CHANNEL_USBEP1RX The uDMA interrupt occurs on the same interrupt vector as any other USB interrupt this means that the application needs to check to see what was the actual source of the interrupt It is possible that the USB interrupt does not indicate that the USB transfer was complete The interrupt could also have been caused by a short packet error or even a transmit complete This requires that the application check both receive cases to determine if this is related to receiving data on the endpoint Because the USB has no status bit indicating that the interrupt was due to a uDMA comple
65. USB controller when ROM USBHostPwrEnable is called USB HOST PWREN AUTOLOW USBEPEN is driven low by the USB controller auto matically if USBOTGSessionRequest has enabled a session USB HOST PWREN AUTOHIGH USBEPEN is driven high by the USB controller auto matically if USBOTGSessionRequest has enabled a session The USB HOST PWREN FILTER flag can be added to enable the VBUS glitch filter which ignores small short drops in VBUS level caused by high power consumption This is mainly used to avoid causing VBUS errors caused by devices with high in rush current Note This function should only be called in host mode Returns None 24 3 1 34 ROM USBHostPwrDisable Disables the external power pin Prototype void ROM USBHostPwrDisable unsigned long ulBase ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM USBTABLE is an array of pointers located at ROM APITABLE 16 ROM USBHostPwrDisable is a function pointer located at ROM USBTABLE 28 Parameters ulBase specifies the USB module base address Description This function disables the USBEPEN signal to disable an external power supply in host mode operation Note This function should only be called in host mode Returns None 24 3 1 35 ROM USBHostPwrEnable Enables the external power pin January 26 2012 331 USB Controller Prototype void ROM_USBHostPwrEnable unsigned long u
66. USBEndpointDataAvail unsigned long ulBase unsigned long ulEnd point long ROM USBEndpointDataGet unsigned long ulBase unsigned long ulEndpoint unsigned char xpucData unsigned long xpulSize long ROM USBEndpointDataPut unsigned long ulBase unsigned long ulEndpoint unsigned char pucData unsigned long ulSize long ROM_USBEndpointDataSend unsigned long ulBase unsigned long ulEndpoint un signed long ulTransType void ROM USBEndpointDataToggleClear unsigned long ulBase unsigned long ulEndpoint unsigned long ulFlags void ROM USBEndpointDMAChannel unsigned long ulBase unsigned long ulEndpoint un signed long ulChannel void ROM USBEndpointDMADisable unsigned long ulBase unsigned long ulEndpoint un signed long ulFlags January 26 2012 USB Controller void ROM_USBEndpointDMAEnable unsigned long ulBase unsigned long ulEndpoint un signed long ulFlags unsigned long ROM_USBEndpointStatus unsigned long ulBase unsigned long ulEndpoint unsigned long ROM USBFIFOAddrGet unsigned long ulBase unsigned long ulEndpoint void ROM USBFIFOConfigGet unsigned long ulBase unsigned long ulEndpoint unsigned long pulFIFOAddress unsigned long pulFIFOSize unsigned long ulFlags void ROM USBFIFOConfigSet unsigned long ulBase unsigned long ulEndpoint unsigned long ulFIFOAddress unsigned long ulFIFOSize unsigned long ulFlags void ROM_USBFIFOFlush unsigned long ulBase unsigned long ulEndpoint unsigned long ulFlags
67. a a eee 207 iS FUNCIONS e ss a ee ae en a Re wt Gt av ae ee a We ak he ae ke bh eB et i a 207 19 System Contool oeer as nasa YP eS EE eee es 217 T9 1 OGURO o ie ick ee ee eS BRS De ek RB DEER Rhee Soe Doe a ed 217 19 2 Functions 2 22e mo oom ox x RR Rx RR som moin nono a 218 20 System Tick GSvysTICK oc uon RR RR RR RR RENE RE Rm Ee 241 20 1 introduction s uuum soo momoxok om mcm m ae cm RC ROR 241 a0 FUNCIONS sos e i kB ede dee amp dede ie eiaa E ou xix mim b boe Ri de ek A A lee et 241 21 Tieb ivo vxo a Xew ow xow xoxo omUEORCE WOO X xxx x ox X ow w Re CY WO xOoxsw X Y E X 245 Ste BDIFOOUGNOEE uu eer ree uu enum cbr ek ee ete aie caer Qiu E wem Re mue com er Bed we 245 2 Fund lt s e bebo ee we da ed eee PEE es Mie Oe a a Wm Sos Ee E 245 22 MIT satis ie sae eRe eee ek ee RR Ae ae Se fedus an ye Be ee PD ee a m ELS 259 22 1 InlOd cHOh gt s ss se ee a a ee ee ee eae ee 259 adus FUNCIONS uod omnem mmm Gs Be es ee BA ee boue ee ee ees 259 23 uDMAController 0 00 0 css hominom hom aoa yo aon n 277 23 1 IDONEOS de de hoes Sek oe ee a EE Ree PS GS maed 277 23 2 FURCHOMS e s seces ee aoo ooo Re ee a ae a eo eo m ms OR RSS RS s 279 24 USB OGonlell l 22 2922 3 ee Xo iex cxx o Roo wo owOw wy Qa d X Um X wow ws 303 241 lntf d chl h 222 x ee NA ee x ok moms c3 ms ok m x SOROR 303 24 2 Using USB with the UDMA Controller 2 llle 304 24 3 PUNCHONS 22 2 zero m kockocx mo mom x xXx m
68. a boolean that is true if the sleep and deep sleep peripheral configuration should be used and false if not Description This function controls how peripherals are clocked when the processor goes into sleep or deep sleep mode By default the peripherals are clocked the same as in run mode if peripheral clock gating is enabled they are clocked according to the config uration set by ROM SysCtlPeripheralSleepEnable ROM SysCtlPeripheralSleepDisable ROM SysCtlPeripheralDeepSleepEnable and ROM SysCtlPeripheralDeepSleepDisable Returns None 19 2 1 18 ROM SysCtlPeripheralDeepSleepDisable Disables a peripheral in deep sleep mode Prototype void RO ROM Location ROM SysCtlPeripheralD pSleepDisable unsigned long ulPeripheral APITABLE is an array of pointers located at 0x0100 0010 ROM SYSC RO iTABL E is an array of pointers located at ROM_APITABL SysCtlPeripheralD pSleepDisable is a function ROM SYSC Parameters iTABL E 11 ulPeripheral is the peripheral to disable in deep sleep mode Description E 13 pointer located at This function causes a peripheral to stop operating when the processor goes into deep sleep mode Disabling peripherals while in deep sleep mode helps to lower the current draw of the device and can keep peripherals that require a particular clock frequency from oper ating when the clock chan
69. a function pointer located at ROM I2STABLE 20 Parameters ulBase is the I2S module base address ulMClock is the logical OR of the master clock configuration choices Description This function selects whether the master clock is sourced from the device internal PLL or comes from an external pin The 12S serial bit clock SCLK and left right word clock LRCLK are derived from the I2S master clock The transmit and receive modules can be configured independently The u MClock parameter is chosen from the following m one of l28 TX MCLK EXT orl28 TX MCLK INT m one of l28 RX MCLK EXT orl28 RX MCLK INT Returns Returns None ROM I2SRxConfigSet Configures the I2S receive module Prototype void ROM_I2SRxConfigSet unsigned long ulBase unsigned long ulConfig ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM I2STABLE is an array of pointers located at ROM_APITABLE 22 ROM I2SRxConfigSet is a function pointer located at ROM_I2STABLE 13 January 26 2012 145 Inter IC Sound 12S Parameters ulBase is the 2S module base address ulConfig is the logical OR of the configuration options Description This function is used to configure the options for the 12S receive channel The parameter ulConfig is the logical OR of the following options m l28 CONFIG FORMAT 12S for standard 12S format 128 CONFIG FORMAT LEFT JUST for left ju
70. a short packet is received This is useful for BULK endpoints that may not have prior knowledge of how much data is being received USB EP AUTO CLEAR should normally be specified when using uDMA to prevent the need for application code to ac knowledge that the data has been read from the FIFO The example below configures endpoint 1 as a Device mode Bulk OUT endpoint using DMA mode 1 with a max packet size of 64 bytes Example Configure endpoint 1 receive channel Endpoint 1 is a device mode BULK OUT endpoint using uDMA iff ROM_USBDevEndpointConfigSet USBO_BASE USB_EP_1 64 USB_EP_DEV_OUT USB_EP_MODE_BULK USB EP DMA MODE 1 USB EP AUTO CLEAR Next the configuration of the actual uDMA controller is needed Like the transmit case the first a call to ROM uDMAChannelAttributeDisable is made to clear any previous settings This is followed January 26 2012 USB Controller by acall to ROM uDMAChannelAttributeEnable with the DMA ATTR USEBURST value Note All uDMA transfers used by the USB controller must use burst mode The final call sets the read access size to 8 bits wide the source address increment to 0 the destination address increment to 8 bits and the uDMA arbitration size to 64 bytes Example Configure endpoint 1 transmit channel ff Clear out any uDMA settings ROM_uDMAChannelAttributeDisable UDMA_CHANNEL_USBEP1RX UDMA ATTR ALL ROM uDMAChannelAttributeEnable UDMA CHANNEL USBEPIRX
71. appli cation that the command was received successfully and the part will be reset The format of the command is as follows unsigned char ucCommand 1 ucCommand 0 COMMAND RESET The definitions for these commands are provided as part of the Stellaris Peripheral Driver Library in boot loader bl commands h January 26 2012 11 Boot Loader 2 3 12 Ethernet Interface When using the Ethernet interface to communicate with the boot loader the BOOTP and TFTP protocols are utilized By using standard protocols the boot loader will co exist in a normal Ethernet environment without causing any problems other than using a small amount of network bandwidth The bootstrap protocol BOOTP a predecessor to the DHCP protocol is used to discover the IP address of the client the IP address of the server and the name of the firmware image to use BOOTP uses UDP IP packets to communicate between the client and the server the boot loader acts as the client First it will send a BOOTP request using a broadcast message When the server receives the request it will reply thereby informing the client of its IP address the IP address of the server and the name of the firmware image Once this reply is received the BOOTP protocol has completed Then the trivial file transfer protocol TFTP is used to transfer the firmware image from the server to the client TFTP also uses UDP IP packets to communicate between the client and the ser
72. array of pointers located at ROM APITABLE 7 ROM FlashUsersSave is a function pointer located at ROM_FLASHTABLE 9 Description This function will make the currently programmed user register settings permanent This is a non reversible operation a chip reset or power cycle will not change this setting This function will not return until the protection has been saved Returns Returns 0 on success or 1 if a hardware error is encountered 10 2 1 14 ROM FlashUserSet Sets the user registers Prototype long ROM_FlashUserSet unsigned long ulUser0 unsigned long ulUserl ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM FLASHTABLE is an array of pointers located at ROM APITABLE 7 ROM FlashUserSet is a function pointer located at ROM FLASHTABLE 8 Parameters ulUserO is the value to store in USER Register 0 ulUser1 is the value to store in USER Register 1 98 January 26 2012 Flash Description This function will set the contents of the user registers 0 and 1 to the specified values Returns Returns 0 on success or 1 if a hardware error is encountered January 26 2012 99 Flash 100 January 26 2012 11 11 1 11 2 GPIO GPIO al ess lU ele MENTI ees eee eee Oo TETTE 101 FORENS Condo der nM E SUN Mud IM MEE E DI Edu nd p UE 101 Introduction The GPIO module provides control for up to eight independent GPIO pins the a
73. controller provides a register that contains the number of packets available in the receive FIFO When the last bytes of a packet are successfully received that is the frame check sequence bytes the packet count is incremented Once the packet has been fully read including the frame check sequence bytes from the FIFO the packet count will be decre mented Returns Returns true if there are one or more packets available in the receive FIFO including the current packet being read and false otherwise ROM EthernetPacketGet Waits for a packet from the Ethernet controller Prototype long ROM EthernetPacketGet unsigned long ulBase unsigned char xpucBuf long lBufLen ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM ETHERNETTABLE is an array of pointers located at ROM APITABLE 15 ROM EthernetPacketGet is a function pointer located at ROM_ETHERNETTABLE 11 Parameters ulBase is the base address of the controller pucBuf is the pointer to the packet buffer IBufLen is the maximum number of bytes to be read into the buffer Description This function reads a packet from the receive FIFO of the controller and places it into pucBuf The function will wait until a packet is available in the FIFO Then the function will read the entire packet from the receive FIFO If there are more bytes in the packet than will fit into pucBuf as spe
74. disable its output which allows a master device to be coupled with multiple slave devices The SSI module also includes a programmable bit rate clock divider and prescaler to generate the output serial clock derived from the SSI module s input clock Bit rates are generated based on the input clock and the maximum bit rate supported by the connected peripheral For devices that include a DMA controller the SSI module also provides a DMA interface to facilitate data transfer via DMA Functions Functions m tBoolean ROM SSIBusy unsigned long ulBase m void ROM SSIConfigSetExpCIk unsigned long ulBase unsigned long ulSSICIk unsigned long ulProtocol unsigned long ulMode unsigned long ulBitRate unsigned long ulDataWidth void ROM SSIDataGet unsigned long ulBase unsigned long pulData long ROM SSIDataGetNonBlocking unsigned long ulBase unsigned long xpulData void ROM SSIDataPut unsigned long ulBase unsigned long ulData long ROM SSIDataPutNonBlocking unsigned long ulBase unsigned long ulData void ROM SSiDisable unsigned long ulBase void ROM SSIDMADisable unsigned long ulBase unsigned long ulIDMAFlags void ROM SSIDMAEnable unsigned long ulBase unsigned long ulDMAFlags void ROM SSIEnable unsigned long ulBase void ROM SSIIntClear unsigned long ulBase unsigned long ullntFlags void ROM SSIIntDisable unsigned long ulBase unsigned long ullntFlags void ROM SSIIntEnable unsigned long ulBase unsigned long ullntFl
75. for a PWM module Prototype void ROM_PWMFaultIntClear unsigned long ulBase ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM PWMTABLE is an array of pointers located at ROM_APITABLE 8 ROM PWMFaultIntClear is a function pointer located at ROM_PWMTABLE 20 Parameters ulBase is the base address of the PWM module Description Clears the fault interrupt by writing to the appropriate bit of the interrupt status register for the selected PWM module This function clears only the FAULTO interrupt and is retained for backwards compatibility It is recommended that ROM PWMFaultlntClearExt be used instead since it supports all fault interrupts supported on devices with and without extended PWM fault handling support Note Because there is a write buffer in the Cortex M3 processor it may take several clock cycles before the interrupt source is actually cleared Therefore it is recommended that the interrupt source be cleared early in the interrupt handler as opposed to the very last action to avoid returning from the interrupt handler before the interrupt source is actually cleared Failure to do so may result in the interrupt handler being immediately reentered because the interrupt controller still sees the interrupt source asserted Returns None ROM PWMFaultlntClearExt Clears the fault interrupt for a PWM module Prototype void ROM PWMFaultIntClearExt unsi
76. handler may therefore reenter immediately if it exits prior to expiration of the fault timer January 26 2012 16 2 1 6 16 2 1 7 Pulse Width Modulator PWM Note Changes to the counter mode will affect the period of the PWM signals produced ROM_PWMGerPeriodSet and ROM PWMPulseWidthSet should be called after any changes to the counter mode of a generator Returns None ROM_PWMGenDisable Disables the timer counter for a PWM generator block Prototype void ROM_PWMGenDisable unsigned long ulBase unsigned long ulGen ROM Location ROM_APITABLE is an array of pointers located at 0x0100 0010 ROM PWMTABLE is an array of pointers located at ROM_APITABLE 8 ROM PWMGenDisable is a function pointer located at ROM PWMTABLE O1 Parameters ulBase is the base address of the PWM module ulGen is the PWM generator to be disabled Must be one of PWM GEN 0 PWM GEN 1 PWM GEN 2 or PWM GEN 3 Description This function blocks the PWM clock from driving the timer counter for the specified generator block Returns None ROM PWMGenEnable Enables the timer counter for a PWM generator block Prototype void ROM PWMGenEnable unsigned long ulBase unsigned long ulGen ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM PWMTABLE is an array of pointers located at ROM APITABLE 8 ROM PWMGenEnable is a function pointer located at R
77. in host mode Returns None 24 3 1 30 ROM USBHostHubAddrGet Get the current device hub address for this endpoint Prototype unsigned long ROM USBHostHubAddrGet unsigned long ulBase unsigned long ulEndpoint unsigned long ulFlags ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM USBTABLE is an array of pointers located at ROM APITABLE 16 ROM USBHostHubAddrGet is a function pointer located at ROM USBTABLE 26 Parameters ulBase specifies the USB module base address ulEndpoint is the endpoint to access ulFlags determines if this is an IN or an OUT endpoint 328 January 26 2012 24 3 1 31 USB Controller Description This function will return the current hub address that an endpoint is using to communicate with a device The ulFlags parameter determines if the device address for the IN or OUT endpoint is returned Note This function should only be called in host mode Returns This function returns the current hub address being used by an endpoint ROM USBHostHubAdadrSet Set the hub address for the device that is connected to an endpoint Prototype void ROM USBHostHubAddrSet unsigned long ulBase unsigned long ulEndpoint unsigned long ulAddr unsigned long ulFlags ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM USBTABLE is an array of pointers located at ROM_A
78. interface for external peripherals and memories The EPI can be configured to support several types of external interfaces and different sized address and data buses Some features of the EPI module are configurable interface modes including SDRAM HostBus and simple read write protocols configurable address and data sizes blocking and non blocking reads and writes FIFO for streaming reads H L m configurable bus cycle timing a m interrupt and UDMA support The function ROM EPIModeSet is used to select the interface mode The clock divider is set with the ROM EPlbDividerSet function which will determine the speed of the external bus The external device is mapped into the processor memory or peripheral space using the ROM EPlIAddressMapSet function Once the mode is selected the interface is configured with one of the configuration functions If SDRAM mode was chosen the function ROM EPIConfigSDRAMSet is used to configure the SDRAM interface If Host bus 8 mode was chosen the function ROM EPIConfigHB8Set is used to configure the Host bus 8 interface If Host bus 16 mode was chosen the function ROM EPIConfigHB16Set is used to configure the Host bus 16 interface If general purpose mode was chosen then the function ROM EPIConfigGPModeSet is used to configure the general purpose interface After the mode has been selected and configured then the device can be accessed by reading and writing to the memory or peri
79. is an array of pointers located at ROM_APITABLE 3 ROM I2CMasterDisable is a function pointer located at ROM I2CTABLE ol Parameters ulBase is the base address of the I2C Master module Description This will disable operation of the I2C master block Returns None ROM l2CMasterEnable Enables the I2C Master block Prototype void ROM_I2CMasterEnable unsigned long ulBase ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM I2CTABLE is an array of pointers located at ROM_APITABLE 3 ROM I2CMasterEnable is a function pointer located at ROM I2CTABLE 3 Parameters ulBase is the base address of the I2C Master module Description This will enable operation of the I2C Master block Returns None ROM l2CMasterErr Gets the error status of the I2C Master module Prototype unsigned long ROM I2CMasterErr unsigned long ulBase ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM I2CTABLE is an array of pointers located at ROM_APITABLE 3 ROM I2CMasterErr is a function pointer located at ROM I2CTABLE 19 January 26 2012 12 2 1 9 Inter Integrated Circuit I2C Parameters ulBase is the base address of the I2C Master module Description This function is used to obtain the error status of the Master module send and receive opera tions Return
80. it Description This function triggers a processor initiated sample sequence if the sample sequence trigger is configured to ADC TRIGGER PROCESSOR If ADC TRIGGER WAIT is ORed into the sequence number the processor initiated trigger is delayed until a later processor initiated trigger to a different ADC module that specifies ADC TRIGGER SIGNAL allowing multiple ADCs to start from a processor initiated trigger in a synchronous manner Returns None ROM ADChReferenceGet Returns the current setting of the ADC reference Prototype unsigned long ROM ADCReferenceGet unsigned long ulBase ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM ADCTABLE is an array of pointers located at ROM APITABLE 5 ROM ADCReferenceGet is a function pointer located at ROM ADCTABLE 23 January 26 2012 31 Analog to Digital Converter ADC 5 2 1 17 5 2 1 18 32 Parameters ulBase is the base address of the ADC module Description Returns the value of the ADC reference setting The returned value will be one of ADC REF INT or ADC REF EXT 3V Returns The current setting of the ADC reference ROM ADChReferenceSet Selects the ADC reference Prototype void ROM ADCReferenceSet unsigned long ulBase unsigned long ulRef ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM ADCTABLE is an array of pointers located at ROM APITABLE
81. located at ROM USBTABLE 41 Parameters ulBase specifies the USB module base address ulEndpoint is the endpoint to access pulMaxPacketSize is a pointer which will be written with the maximum packet size for this endpoint pulFlags is a pointer which will be written with the current endpoint settings On entry to the function this pointer must contain either USB EP DEV IN or USB EP DEV OUT to indicate whether the IN or OUT endpoint is to be queried Description This function will return the basic configuration for an endpoint in device mode The values re turned in pulMaxPacketSize and pulFlags are equivalent to the u MaxPacketSize and ulFlags previously passed to ROM USBDevEndpointConfigSet for this endpoint Note This function should only be called in device mode Returns None ROM USBbDevEnapointConfigSet Sets the configuration for an endpoint Prototype void ROM USBDevEndpointConfigSet unsigned long ulBase unsigned long ulEndpoint unsigned long ulMaxPacketSize unsigned long ulFlags January 26 2012 USB Controller ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM USBTABLE is an array of pointers located at ROM_APITABLE 16 ROM USBDevEndpointConfigSet is a function pointer located at ROM USBTABLE 5 Parameters ulBase specifies the USB module base address ulEndpoint is the endpoin
82. long ulBase unsigned long ulEndpoint unsigned long ulFl AB AB E is an array of pointers located at ROM APITABLI ROM USBDevEndpointStatusClear is a function pointer located at ROM USBTABLE Parameters ulBase specifies the USB module base address ulEndpoint is the endpoint to access ulFlags are the status bits that will be cleared Description ags E is an array of pointers located at 0x0100 0010 E 16 o This function will clear the status of any bits that are passed in the ulFlags parameter The ulFlags parameter can take the value returned from the ROM_USBEndpointStatus call Note This function should only be called in device mode Returns None 24 3 1 10 ROM USBDevMode Change the mode of the USB controller to device Prototype void ROM USBDevMode unsigned long ulBase ROM Location ROM API ROM USB AB is an array of pointers located at ROM APITABLI E is an array of pointers located at 0x0100 0010 ABLE E 16 ROM USBDevMode is a function pointer located at ROM_USBTABLE 55 January 26 2012 315 USB Controller 24 3 1 11 Parameters ulBase specifies the USB module base address Description This function changes the mode of the USB controller to device mode Returns None ROM_USBEndpointDataAvail Determine the number of bytes of data available in a given endpoint s FIFO
83. long ulConfig void ROM EthernetDisable unsigned long ulBase void ROM EthernetEnable unsigned long ulBase void ROM EthernetlnitExpCIk unsigned long ulBase unsigned long ulEthCIk void ROM EthernetIntClear unsigned long ulBase unsigned long ullntFlags void ROM EthernetIntDisable unsigned long ulBase unsigned long ullntFlags void ROM EthernetIntEnable unsigned long ulBase unsigned long ullntFlags unsigned long ROM EthernetlntStatus unsigned long ulBase tBoolean bMasked void ROM EthernetMACAddrGet unsigned long ulBase unsigned char pucMACAddr void ROM EthernetMACAddrSet unsigned long ulBase unsigned char pucMACAddr tBoolean ROM EthernetPacketAvail unsigned long ulBase long ROM EthernetPacketGet unsigned long ulBase unsigned char pucBuf long IBufLen long ROM EthernetPacketGetNonBlocking unsigned long ulBase unsigned char pucBuf long IBufLen long ROM EthernetPacketPut unsigned long ulBase unsigned char pucBuf long IBufLen long ROM EthernetPacketPutNonBlocking unsigned long ulBase unsigned char pucBuf long IBufLen void ROM EthernetPHYPowerOff unsigned long ulBase void ROM EthernetPHYPowerOn unsigned long ulBase unsigned long ROM EthernetPHYRead unsigned long ulBase unsigned char ucRegAddr void ROM EthernetPHYWrite unsigned long ulBase unsigned char ucRegAddr unsigned long ulData tBoolean ROM EthernetSpaceAvail unsigned long ulBase void ROM UpdateEthernet void Function
84. masked and the processor interrupt can be globally masked as well without affecting the individual source masks The NVIC is tightly coupled with the Cortex M3 microprocessor When the processor responds to an interrupt NVIC will supply the address of the function to handle the interrupt directly to the processor This eliminates the need for a global interrupt handler that queries the interrupt controller to determine the cause of the interrupt and branch to the appropriate handler reducing interrupt response time The interrupt prioritization in the NVIC allows higher priority interrupts to be handled before lower priority interrupts as well as allowing preemption of lower priority interrupt handlers by higher prior ity interrupts Again this helps reduce interrupt response time for example a 1 ms system control interrupt is not held off by the execution of a lower priority 1 second housekeeping interrupt handler Sub prioritization is also possible instead of having N bits of preemptable prioritization NVIC can be configured via software for N M bits of preemptable prioritization and M bits of subpriority In this scheme two interrupts with the same preemptable prioritization but different subpriorities will not cause a preemption tail chaining will instead be used to process the two interrupts back to back If two interrupts with the same priority and subpriority if so configured are asserted at the same time the one with t
85. module are m Up to four generator blocks each containing One 16 bit down or up down counter Two comparators PWM generator Dead band generator m Control block PWM output enable Output polarity control Synchronization Fault handling Interrupt status When discussing the various components of the PWM module the following conventions are used m The four generator blocks are called Gen0 Gent Gen2 and Gen3 m The two PWM output signals associated with each generator block are called OutA and OutB m The eight output signals are called PWMO PWM1 PWM2 PWM3 PWM4 PWM5 PWM6 and PWM7 PWMO and PWM are associated with Gen0 PWM2 and PWM3 are associated with Gen1 PWM4 and PWM5 are associated with Gen2 and PWM6 and PWM7 are associated with Gen3 Also as a simplifying assumption for this API comparator A for each generator block is used exclu sively to adjust the pulse width of the even numbered PWM outputs PWMO PWM2 PWMA and PWM6 In addition comparator B is used exclusively for the odd numbered PWM outputs PWMt PWM3 PWM5 and PWM7 16 2 Functions Functions m void ROM PWMDeadBanoaDisable unsigned long ulBase unsigned long ulGen January 26 2012 175 Pulse Width Modulator PWM void ROM_PWMDeadBandEnable unsigned long ulBase unsigned long ulGen unsigned short usRise unsigned short usFall void ROM PWMrFaultIntClear unsigned long ulBase void ROM PWMFaultIntClearExt unsigned l
86. of the PWM module ulGen is the PWM generator to have interrupts and triggers enabled Must be one of PWM GEN 0 PWM GEN 1 PWM GEN 2 or PWM GEN 3 ullntTrig specifies the interrupts and triggers to be enabled Description Unmasks the specified interrupt s and trigger s by setting the specified bits of the in terrupt trigger enable register for the specified PWM generator The ullntTrig parameter is the logical OR of PWM INT CNT ZERO PWM INT CNT LOAD PWM INT CNT AU PWM INT CNT AD PWM INT CNT BU PWM INT CNT BD PWM TR CNT ZERO PWM TR CNT LOAD PWM TR CNT AU PWM TR CNT AD PWM TR CNT BU or PWM TR CNT BD Returns None 16 2 1 17 ROM PWMGenPeriodGet Gets the period of a PWM generator block Prototype unsigned long ROM PWMGenPeriodGet unsigned long ulBase unsigned long ulGen ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM PWMTABLE is an array of pointers located at ROM APITABLE 8 ROM PWMGenPeriodGet is a function pointer located at ROM_PWMTABLE 3 Parameters ulBase is the base address of the PWM module ulGen is the PWM generator to query Must be one of PWM GEN 0 PWM GEN 1 PWM GEN 2 or PWM GEN 3 188 January 26 2012 Pulse Width Modulator PWM Description This function gets the period of the specified PWM generator block The period of the generator block is defined as the number of PWM clock ticks between pulses on the generator block zero
87. of the serial bit clock m l28 CONFIG MODE DUAL for dual channel stereo I28 CONFIG MODE COMPACT 16 for 16 bit compact stereo mode I28 CONFIG MODE COMPACT 8 for 8 bit compact stereo mode or I28 CONFIG MODE MONO for single channel mono format I28 CONFIG CLK MASTER or I28 CONFIG CLK SLAVE to select whether the I2S transmitter is the clock master or slave I2S CONFIG SAMPLE SIZE 32 24 20 _16 or 8 to select the number of bits per sample I28 CONFIG WIRE SIZE 32 24 20 16 or 8to select the number of bits per word that are transferred on the data line 12S CONFIG EMPTY ZERO or I28 CONFIG EMPTY REPEAT to select whether the module transmits zeroes or repeats the last sample when the FIFO is empty Returns None 13 2 1 15 ROM I2STxDataPut Writes data samples to the 12S transmit FIFO with blocking Prototype void ROM I2STxDataPut unsigned long ulBase unsigned long ulData ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM I2STABLE is an array of pointers located at ROM APITABLE 22 ROM I2STxDataPut is a function pointer located at ROM_I2STABLE 3 Parameters ulBase is the I2S module base address ulData is the single or dual channel 12S data Description This function writes a single channel sample or combined left right samples to the 12S trans mit FIFO The format of the sample is determined by the configuration that was used with the function ROM l
88. of the timer module The timer must be configured before it is en abled Returns None ROM TimerlntClear Clears timer interrupt sources Prototype void ROM TimerIntClear unsigned long ulBase unsigned long ulIntFlags January 26 2012 21 2 1 9 Timer ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM TIMERTABLE is an array of pointers located at ROM APITABLE 11 ROM TimerIntClear is a function pointer located at ROM TIMERTABLE 0 Parameters ulBase is the base address of the timer module ullntFlags is a bit mask of the interrupt sources to be cleared Description The specified timer interrupt sources are cleared so that they no longer assert This must be done in the interrupt handler to keep it from being called again immediately upon exit The ullntFlags parameter has the same definition as the ullntFlags parameter to ROM TimerlntEnable Note Because there is a write buffer in the Cortex M3 processor it may take several clock cycles before the interrupt source is actually cleared Therefore it is recommended that the interrupt source be cleared early in the interrupt handler as opposed to the very last action to avoid returning from the interrupt handler before the interrupt source is actually cleared Failure to do so may result in the interrupt handler being immediately reentered because the interrupt controller still sees the interr
89. only if ADC output has been in the low band since the last trigger output 23 Analog to Digital Converter ADC 5 2 1 2 5 2 1 3 24 Returns None ROM ADCComparatorlntClear Clears sample sequence comparator interrupt source Prototype void ROM ADCComparatorIntClear unsigned long ulBase unsigned long ulStatus ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM ADCTABLE is an array of pointers located at ROM APITABLE 5 ROM ADCComparatorIntClear is a function pointer located at ROM ADCTABLE 21 Parameters ulBase is the base address of the ADC module ulStatus is the bit mapped interrupts status to clear Description The specified interrupt status is cleared Returns None ROM ADCComparatorlntDisable Disables a sample sequence comparator interrupt Prototype void ROM ADCComparatorIntDisable unsigned long ulBase unsigned long ulSequenceNum ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM ADCTABLE is an array of pointers located at ROM APITABLE 5 ROM ADCComparatorIntDisable is a function pointer located at ROM ADCTABLE 18 Parameters ulBase is the base address of the ADC module ulSequenceNum is the sample sequence number Description This function disables the requested sample sequence comparator interrupt Returns None January 26 2012 5 2 1
90. pointer located at ROM_SOFTWARETABLE 2 Parameters ulWordLen is the length of the array in words pulData is a pointer to the array of words pusCrc3 is a pointer to an array into which the three CRC values are to be placed Description This function is used to calculate three CRC 16s from the same array This computes the CRC 16 on all of the bytes same as ROM_Crc16Array on the even bytes and on the odd bytes This calculation of three CRC 16s increases the chance of detecting errors because it is much harder for a set of errors to end up being correct for all three CRC 16s Returns None January 26 2012 8 8 1 Ethernet Controller Ethernet Controller INO OUCH asinn a aa Exo naliceatgheha hace ease eneent bdo pud Edd 57 FOREN aiae n vix Mx cd En PPM ME MC aU MM ADEM 58 Introduction The Stellaris Ethernet controller consists of a fully integrated media access controller MAC and a network physical PHY interface device The Ethernet controller conforms to IEEE 802 3 specifi cations and fully supports 10BASE T and 100BASE TX standards The Ethernet API provides the set of functions required to implement an interrupt driven Ethernet driver for this Ethernet controller Functions are provided to configure and control the MAC to access the register set on the PHY to transmit and receive Ethernet packets and to configure and control the interrupts that are available For any applicatio
91. pointers located at 0x0100 0010 ROM QEITABLE is an array of pointers located at ROM_APITABLE 9 ROM QEIVelocityConfigure is a function pointer located at ROM OEITABLE WO me Parameters ulBase is the base address of the quadrature encoder module ulPreDiv specifies the predivider applied to the input quadrature signal before it is counted can be one of QEI VELDIV 1 QEI VELDIV 2 QEI VELDIV 4 QEI VELDIV 8 QEI VELDIV 16 QEI VELDIV 32 QEI VELDIV 64 or QEI VELDIV 128 ulPeriod specifies the number of clock ticks over which to measure the velocity must be non zero Description This will configure the operation of the velocity capture portion of the quadrature encoder The position increment signal is predivided as specified by u PreDiv before being accumulated by the velocity capture The divided signal is accumulated over u Period system clock before being saved and resetting the accumulator Returns None 17 2 1 13 ROM_QElVelocityDisable Disables the velocity capture Prototype void ROM_QEIVelocityDisable unsigned long ulBase ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM_QEITABLE is an array of pointers located at ROM_APITABLE ROM QEIVelocityDisable is a function pointer located at ROM QOEITABLE 8 Gl Ne ii 204 January 26 2012 Quadrature Encoder QE Parameters ulBase is the
92. s device address is returned Note This function should only be called in host mode January 26 2012 325 USB Controller Returns Returns the current function address being used by an endpoint 24 3 1 26 ROM_USBHostAddrSet Sets the functional address for the device that is connected to an endpoint in host mode Prototype void ROM_USBHostAddrSet unsigned long ulBase unsigned long ulEndpoint unsigned long ulAddr unsigned long ulFlags ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM_USBTABLE is an array of pointers located at ROM_APITABLE 16 ROM_USBHostAddrSet is a function pointer located at ROM USBTABLE 21 Parameters ulBase specifies the USB module base address ulEndpoint is the endpoint to access ulAddr is the functional address for the controller to use for this endpoint ulFlags determines if this is an IN or an OUT endpoint Description This function will set the functional address for a device that is using this endpoint for commu nication This u Addr parameter is the address of the target device that this endpoint will be used to communicate with The u Flags parameter indicates if the IN or OUT endpoint should be set Note This function should only be called in host mode Returns None 24 3 1 27 ROM USBHostEndpointDataAck Acknowledge that data was read from the given endpoint s FIFO in host mode Prototype vo
93. specifies which control interrupts to disable Description This function will disable the control interrupts for the USB controller specified by the u Base parameter The ulFlags parameter specifies which control interrupts to disable The flags passed in the ulFlags parameters should be the definitions that start with USB INTCTRL x and not any other USB INT flags Returns None 24 3 1 46 ROM USBlIntDisableEndpoint Disables endpoint interrupts on a given USB controller Prototype void ROM USBIntDisableEndpoint unsigned long ulBase unsigned long ulFlags ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM USBTABLE is an array of pointers located at ROM APITABLE 16 ROM USBIntDisableEndpoint is a function pointer located at ROM USBTABLE m Ikl Parameters ulBase specifies the USB module base address ulFlags specifies which endpoint interrupts to disable January 26 2012 337 USB Controller Description This function will disable endpoint interrupts for the USB controller specified by the u Base parameter The ulFlags parameter specifies which endpoint interrupts to disable The flags passed in the ulFlags parameters should be the definitions that start with USB INTEP and not any other USB INT flags Returns None 24 3 1 47 ROM USBlintEnable Enables the sources for USB interrupts Prototype void ROM USBIntEnable unsigned l
94. successfully transmitted m CAN STATUS LEC MSK mask of last error code bits 3 bits m CAN STATUS LEC NONE no error m CAN STATUS LEC STUFF stuffing error detected m CAN STATUS LEC FORM a format error occurred in the fixed format part of a message m CAN STATUS LEC ACK a transmitted message was not acknowledged m CAN STATUS LEC BIT1 dominant level detected when trying to send in recessive mode m CAN STATUS LEC BITO recessive level detected when trying to send in dominant mode m CAN STATUS LEC CRC CRC error in received message The remaining status registers are 32 bit bit maps to the message objects They can be used to quickly obtain information about the status of all the message objects without needing to query each one They contain the following information m CAN STS TXREQUEST if a message object s TxRequest bit is set that means that a transmission is pending on that object The application can use this to determine which objects are still waiting to send a message m CAN STS NEWDAT if a message object s NewDat bit is set that means that a new message has been received in that object and has not yet been picked up by the host application m CAN STS MSGVAL if a message object s MsgVal bit is set that means it has a valid configuration programmed The host application can use this to determine which message objects are empty unused Returns Returns the value of the status register January 26 2012 53 C
95. system holds off the USB interrupt routine both the uDMA complete and transfer complete can occur before the USB interrupt handler is called The USB has no status bit indicating that the interrupt was due to a DMA complete which means that the application must remember if a UDMA transaction was in progress The example below shows the g_ulFlags global variable being used to remember that a uDMA transfer was pending Example Interrupt handling with uDMA if g ulFlags amp EP1 DMA IN PEND amp amp ROM uDMAChannelModeGet UDMA CHANNEL USBEPITX UDMA MODE STOP Handle the uDMA complete case Get the interrupt status ff ulStatus ROM_USBIntStatus USBO_BASE if ulStatus amp USB_INT_DEV_IN_EP1 Handler the transfer complete case To use the USB device controller with an OUT endpoint the application must use a receive uDMA channel When calling ROM_USBDevEndpointConfigSet for an endpoint that uses uDMA the application must set extra flags in the u Flags parameter The USB_EP_DMA_MODE_0 and USB EP DMA MODE 1 control the mode of the transaction USB EP AUTO CLEAR allows the data to be received automatically without needing to manually acknowledge that the data has been read USB EP DMA MODE 9O will not generate an interrupt when each packet is sent over USB and will only interrupt when the uDMA transfer is complete USB EP DMA MODE 1 will interrupt when the uDMA transfer complete or
96. the UART Returns None 22 2 1 18 ROM UARTFIFOLevelGet Gets the FIFO level at which interrupts are generated Prototype void ROM UARTFIFOLevelGet unsigned long ulBase unsigned long xpulTxLevel unsigned long xpulRxLevel ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM UARTTABLE is an array of pointers located at ROM APITABLE 1 ROM UARTFIFOLevelGet is a function pointer located at ROM UARTTABLE pcm a Parameters ulBase is the base address of the UART port pulTxLevel is a pointer to storage for the transmit FIFO level returned as one of UART_FIFO_TX1_8 UART_FIFO_TX2_8 UART_FIFO_TX4_8 UART_FIFO_TX6_8 or UART_FIFO_TX7_8 pulRxLevel is a pointer to storage for the receive FIFO level returned as one of UART_FIFO_RX1_8 UART_FIFO_RX2_8 UART_FIFO_RX4_8 UART_FIFO_RX6_8 or UART_FIFO_RX7_8 Description This function gets the FIFO level at which transmit and receive interrupts are generated Returns None 22 2 1 19 ROM UARTFIFOLevelSet Sets the FIFO level at which interrupts are generated January 26 2012 269 UART Prototype void ROM_UARTFIFOLevelSet unsigned long ulBase unsigned long ulTxLevel unsigned long ulRxLevel ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM UARTTABLE is an array of pointers located at ROM APITABLE 1 ROM UARTFIFOLevelSet is a function pointer lo
97. the maximum size of a packet which allows up to 252 data bytes to be transferred at a time The command terminates programming once the number of bytes indicated by the COMMAND DOWNLOAD command has been received Each time this function is called it should be followed by a COMMAND GET STATUS command to ensure that the data was successfully programmed into the flash If the boot loader sends a NAK to this command the boot loader will not in crement the current address which allows for retransmission of the previous data The format of the command is as follows unsigned char ucCommand 9 ucCommand 0 COMMAND SEND DATA ucCommand 1 Data 0 ucCommand 2 Data 1 ucCommand 3 Data 2 ucCommand 4 Data 3 ucCommand 5 Data 4 ucCommand 6 Data 5 ucCommand 7 Data 6 ucCommand 8 Data 7 COMMAND_RESET This command is used to tell the boot loader to reset This is 0x25 used after downloading a new image to the microcontroller to cause the new application to start from a reset The normal boot sequence occurs and the image runs as if from a hardware reset It can also be used to reset the boot loader if a critical error occurs and the host device wants to restart communication with the boot loader The boot loader responds with an ACK signal to the host device before actually executing the software reset on the microcon troller running the boot loader This informs the updater
98. the timer s to adjust must be one of TIMER A TIMER B or TIMER BOTH binvert specifies the output level 247 Timer 21 2 1 3 21 2 1 4 248 Description This function sets the PWM output level for the specified timer If the b nvert parameter is true then the timer s output will be made active low otherwise it will be made active high Returns None ROM_TimerControlStall Controls the stall handling Prototype void ROM_TimerControlStall unsigned long ulBase unsigned long ulTimer tBoolean bStall ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM_TIMERTABLE is an array of pointers located at ROM APITABLE 11 ROM TimerControlStall is a function pointer located at ROM TIMERTABLE 7 Parameters ulBase is the base address of the timer module ulTimer specifies the timer s to be adjusted must be one of TIMER A TIMER B or TIMER BOTH bSiall specifies the response to a stall signal Description This function controls the stall response for the specified timer If the bStall parameter is true then the timer will stop counting if the processor enters debug mode otherwise the timer will keep running while in debug mode Returns None ROM TimerControlTrigger Enables or disables the trigger output Prototype void ROM TimerControlTrigger unsigned long ulBase unsigned long ulTimer tBoolean bEnable ROM Location
99. trigger the ADC when the comparator output is low m COMP TRIG FALL to trigger the ADC when the comparator output goes low m COMP TRIG RISE to trigger the ADC when the comparator output goes high m COMP TRIG BOTH to trigger the ADC when the comparator output goes low or high The COMP INT xxx term can take on the following values m COMP INT HIGH to generate an interrupt when the comparator output is high COMP INT LOW to generate an interrupt when the comparator output is low m COMP INT FALL to generate an interrupt when the comparator output goes low COMP INT RISE to generate an interrupt when the comparator output goes high m COMP INT BOTH to generate an interrupt when the comparator output goes low or high The COMP ASRCP xxx term can take on the following values m COMP ASRCP PIN to use the dedicated Comp pin as the reference voltage m COMP ASRCP PINO to use the Comp0 pin as the reference voltage this the same as COMP ASRCP PIN for the comparator O COMP ASRCP REF to use the internally generated voltage as the reference voltage The COMP OUTPUT xxx term can take on the following values COMP OUTPUT NORMAL to enable a non inverted output from the comparator to a device pin COMP OUTPUT INVERT to enable an inverted output from the comparator to a device pin Returns None ROM ComparatorlntClear Clears a comparator interrupt Prototype void ROM ComparatorIntClear unsigned long ulBase unsigned
100. ulAddr is the base address of the region It must be aligned according to the size of the region specified in ulFlags ulFlags is a set of flags to define the attributes of the region January 26 2012 171 Memory Protection Unit MPU Description This function sets up the protection rules for a region The region has a base address and a set of attributes including the size which must be a power of 2 The base address parameter ulAdar must be aligned according to the size The ulFlags parameter is the logical OR of all of the attributes of the region It is a combination of choices for region size execute permission read write permissions disabled sub regions and a flag to determine if the region is enabled The size flag determines the size of a region and must be one of the following The execute permission flag must be one of the following MPU RGN PERM EXEC enables the region for execution of code MPU RGN PERM NOEXEC disables the region for execution of code MPU RGN SIZE 32B MPU RGN SIZE 64B MPU RGN SIZE 128B MPU RGN SIZE 256B MPU RGN SIZE 512B MPU RGN SIZE 1K MPU RGN SIZE 2K MPU RGN SIZE 4K MPU RGN SIZE 8K MPU RGN SIZE 16K MPU RGN SIZE 32K MPU RGN SIZE 64K MPU RGN SIZE 128K MPU RGN SIZE 256K MPU RGN SIZE 512K MPU RGN SIZE 1M MPU RGN SIZE 2M MPU RGN SIZE 4M MPU RGN SIZE 8M MPU RGN SIZE 16M MPU RGN SIZE 32M MPU RGN SIZE 64M MPU RGN SIZE 128M MPU RGN SIZE 256M MPU RGN SIZE 512M MPU RGN SIZE 1G MPU
101. unsigned long ulBase ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM EPITABLE is an array of pointers located at ROM_APITABLE 23 ROM EPINonBlockingReadAvail is a function pointer located at ROM EPITABLE 12 Parameters ulBase is the EPI module base address Description This function gets the number of items that are available to read in the read FIFO The read FIFO is filled by a non blocking read transaction which is configured by the functions ROM EPINonBlockingReadConfigure and ROM EPINonBlockingReadStart Returns The number of items available to read in the read FIFO ROM EPINonBlockingReadConfigure Configures a non blocking read transaction Prototype void ROM EPINonBlockingReadConfigure unsigned long ulBase unsigned long ulChannel unsigned long ulDataSize unsigned long ulAddress January 26 2012 85 External Peripheral Interface EPI 9 2 1 16 86 ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM EPITABLE is an array of pointers located at ROM_APITABLE 23 ROM EPINonBlockingReadConfigure is a function pointer located at ROM EPITABLE co nem Parameters ulBase is the EPI module base address ulChannel is the read channel 0 or 1 ulDataSize is the size of the data items to read ulAddress is the starting address to
102. used by the U S Government It is a strong encryption method with reasonable performance and size AES is fast in both hardware and software is fairly easy to implement and requires little memory AES is ideal for applications that can use pre arranged keys such as setup during manufacturing or configuration Four data tables used by the XySSL AES implementation are provided in the ROM The first is the forward S box substitution table the second is the reverse S box substitution table the third is the forward polynomial table and the final is the reverse polynomial table The meanings of these tables and their use can be found in the AES code provided in StellarisWare Data Structures Data Structures m ROM pvAESTable Data Structure Documentation ROM pvAESTable This structure describes the AES tables that are available in the ROM ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM SOFTWARETABLE is an array of pointers located at ROM APITABLE 21 ROM pvAESTable is an array located at ROM SOFTWARETABLE 7 Definition typedef struct unsigned char ucForwardSBox 256 unsigned long ulForwardTable 256 unsigned char ucReverseSBox 256 unsigned long ulReverseTable 250 ROM_pvAESTable Members ucForwardSBox This table contains the forward S Box as defined by the AES standard January 26 2012 13 AES Data Tables ulForwardTable T
103. watchdog timer is enabled Prototype tBoolean ROM WatchdogRunning unsigned long ulBase ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM WATCHDOGTABLE is an array of pointers located at ROM APITABLE 12 ROM WatchdogRunning is a function pointer located at ROM WATCHDOGTABLE mn ii Parameters ulBase is the base address of the watchdog timer module Description This will check to see if the watchdog timer is enabled Returns Returns true if the watchdog timer is enabled and false if it is not 25 2 1 12 ROM WeatchdogStallDisable Disables stalling of the watchdog timer during debug events Prototype void ROM WatchdogStallDisable unsigned long ulBase January 26 2012 351 Watchdog Timer ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM WATCHDOGTABLE is an array of pointers located at ROM APITABLE 12 ROM WatchdogStallDisable is a function pointer located at ROM WATCHDOGTABLE 14 Parameters ulBase is the base address of the watchdog timer module Description This function disables the debug mode stall of the watchdog timer By doing so the watchdog timer continues to count regardless of the processor debug state Returns None 25 2 1 13 ROM_WatchdogStallEnable Enables stalling of the watchdog timer during debug events Prototype void ROM WatchdogStallEnable unsigned long ulBase ROM Locat
104. www ti com wirelessconnectivity TI E2E Community Home Page e2e ti com Mailing Address Texas Instruments Post Office Box 655303 Dallas Texas 75265 Copyright 2008 2012 Texas Instruments Incorporated 354 January 26 2012
105. 0 ROM USBTABLE is an array of pointers located at ROM APITABLE 16 ROM USBHostPwrConfig is a function pointer located at ROM_USBTABLE 30 Parameters ulBase specifies the USB module base address ulFlags specifies the configuration of the power fault Description This function controls how the USB controller uses its external power control pins USBnPFTL and USBnEPEN The flags specify the power fault level sensitivity the power fault action and the power enable level and source One of the following can be selected as the power fault level sensitivity m USB HOST PWRFLT LOW An external power fault is indicated by the pin being driven low m USB HOST PWRFLT HIGH An external power fault is indicated by the pin being driven high One of the following can be selected as the power fault action m USB HOST PWRFLT EP NONE No automatic action when power fault detected m USB HOST PWRFLT EP ThHI Automatically Tri state the USBnEPEN pin on a power fault m USB HOST PWRFLT EP LOW Automatically drive USBnEPEN pin low on a power fault m USB HOST PWRFLT EP HIGH Automatically drive USBnEPEN pin high on a power fault 330 January 26 2012 USB Controller One of the following can be selected as the power enable level and source m USB HOST PWREN MAN LOW USBEPEN is driven low by the USB controller when ROM USBHostPwrEnable is called m USB HOST PWREN MAN HIGH USBEPEN is driven high by the
106. 0x0100 0010 ROM GPIOTABLE is an array of pointers located at ROM_APITABLE 4 ROM GPIOPinTypeaADC is a function pointer located at ROM GPIOTABLE 23 Parameters ulPort is the base address of the GPIO port ucPins is the bit packed representation of the pin s Description The analog to digital converter input pins must be properly configured to function correctly This function provides the proper configuration for those pin s 110 January 26 2012 GPIO The pin s are specified using a bit packed byte where each bit that is set identifies the pin to be accessed and where bit 0 of the byte represents GPIO port pin 0 bit 1 represents GPIO port pin 1 and so on Note This cannot be used to turn any pin into an ADC input it only configures an ADC input pin for proper operation Returns None 11 2 1 14 ROM_GPIOPinTypeCAN Configures pin s for use as a CAN device Prototype void ROM_GPIOPinTypeCAN unsigned long ulPort unsigned char ucPins ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM GPIOTABLE is an array of pointers located at ROM_APITABLE 4 ROM GPIOPinTypeCAN is a function pointer located at ROM GPIOTABLE 12 Parameters ulPort is the base address of the GPIO port ucPins is the bit packed representation of the pin s Description The CAN pins must be properly configured for the CAN peripherals to function correctly This functi
107. 11 2 1 17 ROM_GPIOPinTypeEthernetLED Configures pin s for use by the Ethernet peripheral as LED signals Prototype void ROM_GPIOPinTypeEthernetLED unsigned long ulPort unsigned char ucPins ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM GPIOTABLE is an array of pointers located at ROM_APITABLE 4 ROM GPIOPinTypeEthernetLED is a function pointer located at ROM GPIOTABLE 27 Parameters ulPort is the base address of the GPIO port ucPins is the bit packed representation of the pin s Description The Ethernet peripheral provides two signals that can be used to drive an LED e g for link status activity This function provides a typical configuration for the pins The pin s are specified using a bit packed byte where each bit that is set identifies the pin to be accessed and where bit 0 of the byte represents GPIO port pin 0 bit 1 represents GPIO port pin 1 and so on Note This cannot be used to turn any pin into an Ethernet LED pin it only configures an Ethernet LED pin for proper operation Returns None 11 2 1 18 ROM GPIOPinTypeGPlOlnput Configures pin s for use as GPIO inputs Prototype void ROM GPIOPinTypeGPIOInput unsigned long ulPort unsigned char ucPins January 26 2012 113 GPIO ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM_GPIOTABLE is an array of pointers located at ROM_APITABLE 4 ROM
108. 16 USE TXEMPTY enable TXEMPTY signal with FIFO EPI HB16 USE RXFULL enable RXFULL signal with FIFO EPI HB16 WRHIGH use active high write strobe otherwise it is active low EPI HB16 RDHIGH use active high read strobe otherwise it is active low one of EPI HB16 WRWAIT 0 EPI HB16 WRWAIT 1 EPI HB16 WRWAIT 2 or EPI HB16 WRWAIT 3 to select the number of write wait states default is 0 wait states one of EPI HB16 RDWAIT 0 EPI HB16 RDWAIT 1 EPI HB16 RDWAIT 2 or EPI HB16 RDWAIT 3 to select the number of read wait states default is 0 wait states EPI HB16 WORD ACCESS use Word Access mode to route bytes to the correct byte lanes allowing data to be stored in bits 31 8 If absent all data transfers use bits 7 0 77 External Peripheral Interface EPI 9 2 1 4 78 The EPI HB16 BSEL enables byte selects In this mode two EPI signals operate as byte selects allowing 8 bit transfers If this flag is not specified data must be read and written using only 16 bit transfers EPI HB16 CSBAUD DUAL use different baud rates when accessing devices on each CSn CSOn uses the baud rate specified by the lower 16 bits of the divider passed to ROM EPlDividerSet and CS1n uses the divider passed in the upper 16 bits If this option is absent both chip selects use the baud rate resulting from the divider in the lower 16 bits of the parameter passed to ROM EPlDividerSet one of EPI HB16 CSCFG CS EPI HB16 CSCFG ALE EPI HB16 CSCFG DUAL
109. 16 bits If this option is absent both chip selects use the baud rate resulting from the divider in the lower 16 bits of the parameter passed to ROM EPlDividerSet one of EPI HB8 CSCFG CS EPI HB8 CSCFG ALE EPI HB8 CSCFG DUAL CS or EPI HB8 CSCFG ALE DUAL CS EPI HB8 CSCFG CS sets EPI30 to operate as a Chip Select CSn signal EPI HB8 CSCFG ALE sets EPI30 to operate as an address latch ALE EPI HB8 CSCFG DUAL CS sets EPI30 to operate as CSOn and EPI27 as CS1n with the asserted chip select determined from the most significant address bit for the respective external address map EPI HB8 CSCFG ALE DUAL CS sets EPI30 as an address latch ALE EPI27 as CSOn and EPI26 as CSin with the asserted chip select determined from the most significant address bit for the respective external address map The parameter ulMaxWait is used if the FIFO mode is chosen If a FIFO is used along with RXFULL or TXEMPTY ready signals then this parameter determines the maximum number of clocks to wait when the transaction is being held off by by the FIFO using one of these ready signals A value of 0 means to wait forever Returns None 9 2 1 5 ROM EPIConfigSDRAMSet Configures the SDRAM mode of operation Prototype void ROM EPIConfigSDRAMSet unsigned long ulBase unsigned long ulConfig unsigned long ulRefresh ROM Location January 26 2012 ROM APITABLE is an array of pointers located at 0x0100 0010 ROM EPITABLE is an arr
110. 2C Slave module send data and I2C SLAVE ACT RREO FBR to indicate that an 12C master has sent data to the I2C slave and the first byte following the slave s own address has been received 12 2 1 29 ROM Updatel2C Starts an update over the I2CO interface Prototype void ROM UpdateI2C void ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM I2CTABLE is an array of pointers located at ROM_APITABLE 3 ROM UpdateI2Cis a function pointer located at ROM_I2CTABLE 24 January 26 2012 139 Inter Integrated Circuit I2C Description Calling this function commences an update of the firmware via the I2CO interface This function assumes that the I2CO interface has already been configured and is currently operational The I2C0 slave is used for data transfer and the I2CO master is used to monitor bus busy conditions therefore both must be enabled Returns Never returns 140 January 26 2012 Inter IC Sound 12S 13 Inter IC Sound 12S INPUT MUNG ET ina harass tuk kira tsa kota ahic di anokech oats anton a eed CIA NI Ua adeeb eee sa qe tod a d ido a ea 141 PUMA NE eea coe tee pete UEM MU LIA LL RA LM ee Ares mM ERN eee 142 13 1 Introduction The 12S API provides functions to use the I2S peripheral in the Stellaris microcontroller The I28 peripheral provides an interface for serial transfer of variable sized data samples typically for audio or analog applications Th
111. 2S interrupt sources January 26 2012 13 2 1 2 Inter IC Sound I2S Prototype void ROM I2SIntClear unsigned long ulBase unsigned long ulIntFlags ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM I2STABLE is an array of pointers located at ROM APITABLE 22 ROM I2SIntClear is a function pointer located at ROM_I2STABLE 23 Parameters ulBase is the I2S module base address ullntFlags is a bit mask of the interrupt sources to be cleared Description This function clears the specified pending I2S interrupts This must be done in the inter rupt handler to keep the handler from being called again immediately upon exit The ullnt Flags parameter can be the logical OR of any of the following values I28 INT RXERR I28 INT RXREQ I28 INT TXERR or l28 INT TXREQ Note Because there is a write buffer in the Cortex M3 processor it may take several clock cycles before the interrupt source is actually cleared Therefore it is recommended that the interrupt source be cleared early in the interrupt handler as opposed to the very last action to avoid returning from the interrupt handler before the interrupt source is actually cleared Failure to do so may result in the interrupt handler being immediately reentered because the interrupt controller still sees the interrupt source asserted Returns Returns None ROM I2SIntDisable Disables 12S interrupt sour
112. 2STxConfigSet If the transmit mode is I28 MODE DUAL STEREO then the u Data parameter contains either the left or right sample The left and right sample alternate with each write to the FIFO left sample first If the transmit mode is I28 MODE COMPACT STEREO 16 or I28 MODE COMPACT STEREO 8 then the ulData parameter contains both the left and right samples If the transmit mode is I28 MODE SINGLE MONO then the u Data parameter contains the single channel sample For the compact modes both the left and right samples are written at the same time If 16 bit compact mode is used then the least significant 16 bits contain the left sample and the most significant 16 bits contain the right sample If 8 bit compact mode is used then the lower 8 bits contain the left sample and the next 8 bits contain the right sample with the upper 16 bits unused January 26 2012 151 Inter IC Sound 12S If there is no room in the transmit FIFO then this function will wait in a polling loop until the data can be written Returns None 13 2 1 16 ROM_l2STxDataPutNonBlocking Writes data samples to the 12S transmit FIFO without blocking Prototype long ROM I2STxDataPutNonBlocking unsigned long ulBase unsigned long ulData ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM I2STABLE is an array of pointers located at ROM APITABLE 22 ROM I2STxDataPutNonBlocking is a function pointer located at ROM_I2STABLE
113. 4 5 2 1 5 5 2 1 6 Analog to Digital Converter ADC ROM ADCComparatorlntEnable Enables a sample sequence comparator interrupt Prototype void ROM ADCComparatorIntEnable unsigned long ulBase unsigned long ulSequenceNum ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM ADCTABLE is an array of pointers located at ROM APITABLE 5 ROM ADCComparatorIntEnable is a function pointer located at ROM_ADCTABLE 19 Parameters ulBase is the base address of the ADC module ulSequenceNum is the sample sequence number Description This function enables the requested sample sequence comparator interrupt Returns None ROM ADCComparatorlntStatus Gets the current comparator interrupt status Prototype unsigned long ROM ADCComparatorIntStatus unsigned long ulBase ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM ADCTABLE is an array of pointers located at ROM APITABLE 5 ROM ADCComparatorIntStatus is a function pointer located at ROM ADCTABLE 20 Parameters ulBase is the base address of the ADC module Description This returns the digitial comparator interrupt status bits This status is sequence agnostic Returns The current comparator interrupt status ROM ADCComparatorRegionSet Defines the ADC digital comparator regions January 26 2012 25 Analog to Digital C
114. 5 ROM ADCReferenceSet is a function pointer located at ROM ADCTABLE 22 Parameters ulBase is the base address of the ADC module ulRef is the reference to use Description The ADC reference is set as specified by u Ref It must be one of ADC REF INT or ADC REF EXT 3V for internal or external reference If ADC REF INT is chosen then an internal 3V reference is used and no external reference is needed If ADC REF EXT 3V is chosen then a 3V reference must be supplied to the AVREF pin Returns None ROM ADCSequenceConfigure Configures the trigger source and priority of a sample sequence Prototype void ROM ADCSequenceConfigure unsigned long ulBase unsigned long ulSequenceNum unsigned long ulTrigger unsigned long ulPriority ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM ADCTABLE is an array of pointers located at ROM APITABLE 5 ROM ADCSequenceConfigure is a function pointer located at ROM ADCTABLE T January 26 2012 Analog to Digital Converter ADC Parameters ulBase is the base address of the ADC module ulSequenceNum is the sample sequence number ulTrigger is the trigger source that initiates the sample sequence must be one of the ADC TRIGGER x values ulPriority is the relative priority of the sample sequence with respect to the other sample sequences Description This function configures the initiation criteria f
115. A UDMA DEF ADCOi SEC TMR2B UDMA DEF ADCO02 SEC RESERVED UDMA DEF ADCO3 SEC RESERVED UDMA DEF TMROA SEC TMR1A UDMA DEF TMROB SEC TMR1B UDMA DEF TMR1A SEC EPIORX UDMA DEF TMR1B SEC EPIOTX UDMA DEF UARTiRX SEC RESERVED UDMA DEF UART1TX SEC RESERVED UDMA DEF SSHRX SEC ADC10 UDMA DEF SSHTX SEC ADC11 UDMA DEF I2S0RX SEC RESERVED UDMA DEF I2S0TX SEC RESERVED Returns None 23 2 1 12 ROM uDMAChannelSelectSecondary Selects the secondary peripheral for a set of uDMA channels Prototype void ROM uDMAChannelSelectSecondary unsigned long ulSecPeriphs ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM UDMATABLE is an array of pointers located at ROM APITABLE 17 ROM uDMAChannelSelectSecondary is a function pointer located at ROM UDMATABLE 17 Parameters ulSecPeriphs is the logical or of the uDMA channels for which to use the secondary periph eral instead of the default peripheral January 26 2012 295 uDMA Controller Description This function is used to select the secondary peripheral assignment for a set of UDMA chan nels By selecting the secondary peripheral assignment for a channel the default peripheral assignment is no longer available for that channel The parameter ulSecPeriphs can be the logical OR of any of the following macros If one of the macros below is in the list passed to this function then the sec
116. A controller re arbitrates for the bus Choose the arbitration size from one of UDMA ARB 1 UDMA ARB 2 UDMA ARB 4 UDMA ARB 8 through UDMA ARB 1024 to select the arbitration size from 1 to 1024 items in powers of 2 The value UDMA NEXT USEBURST is used to force the channel to only respond to burst requests at the tail end of a scatter gather transfer Note The address increment cannot be smaller than the data size Returns None ROM uDMaAChannelDisable Disables a uDMA channel for operation Prototype void ROM uDMAChannelDisable unsigned long ulChannelNum ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM UDMATABLE is an array of pointers located at ROM APITABLE 17 ROM uDMAChannelDisable is a function pointer located at ROM UDMATABLE 6 Parameters ulChannelNum is the channel number to disable Description This function disables a specific uDMA channel Once disabled a channel will not respond to uDMA transfer requests until re enabled via ROM uDMAChannelEnable January 26 2012 January 26 2012 uDMA Controller The ulChannelNum parameter must be only one of the following values UDMA CHANNEL ADCO UDMA CHANNEL ADC1 m UDMA CHANNEL ADC2 m UDMA CHANNEL ADC3 m UDMA SEC CHANNEL ADC10 m UDMA SEC CHANNEL ADC11 m UDMA SEC CHANNEL ADC12 m UDMA SEC CHANNEL ADC13 m UDMA SEC CHANNEL EPIORX m UDMA SEC CHANNEL EPIOTX UDMA CHANNEL ETHORX m UDMA CHA
117. APITABLE 8 ROM PWMOutputFault is a function pointer located at ROM PWMTABLE 13 Parameters ulBase is the base address of the PWM module ulPWMOutBits are the PWM outputs to be modified Must be the logical OR of any of PWM OUT 0 BIT PWM OUT 1 BIT PWM OUT 2 BIT PWM OUT 3 BIT PWM OUT 4 BIT PWM OUT 5 BIT PWM OUT 6 BIT or PWM OUT 7 BIT bFaultSuppress determines if the signal is suppressed or passed through during an active fault condition Description This function sets the fault handling characteristics of the selected PWM outputs The outputs are selected using the parameter u PWMOutBits The parameter bFaultSuppress determines the fault handling characteristics for the selected outputs If bFaultSuppress is true then the selected outputs will be made inactive If bFaultSuppress is false then the selected outputs are unaffected by the detected fault January 26 2012 191 Pulse Width Modulator PWM On devices supporting extended PWM fault handling the state the affected output pins are driven to can be configured with ROM PWMoOuUtputFaultLevel If not configured or if the device does not support extended PWM fault handling affected outputs will be driven low on a fault condition Returns None 16 2 1 23 ROM PWMoOUtputFaultLevel Specifies the level of PWM outputs suppressed in response to a fault condition Prototype void ROM PWMOutputFaultLevel unsigned long ulBase unsigned long ulPW
118. Avail returns the number of items in the FIFO that can be read im mediately without stalling There are 3 functions available for reading data from the FIFO and into a buffer provided by the application These functions are ROM EPINonBlockingReadGet32 ROM EPINonBlockingReadGet16 ROM EPINonBlockingReadGet8 to read the data from the FIFO as 32 bit 16 bit or 8 bit data items The read FIFO and write transaction FIFO can be configured with the function ROM_EPIFIFOConfig This function is used to set the FIFO trigger levels and to enable error interrupts to be generated when a read or write is stalled Interrupts are enabled or disabled with the functions ROM_EPIIntEnable and ROM_EPIIntDisable The interrupt status can be read by calling ROM EPlIntStatus If there is an error interrupt pending the cause of the error can be determined with the function ROM EPlIntErrorStatus The error can then be cleared with ROM_EPIIntErrorClear Functions Functions m void ROM EPIAddressMapSet unsigned long ulBase unsigned long ulMap m void ROM EPIConfigGPModeSet unsigned long ulBase unsigned long ulConfig unsigned long ulFrameCount unsigned long ulMaxWait void ROM EPIConfigHB16Set unsigned long ulBase unsigned long ulConfig unsigned long ulMaxWait m void ROM EPIConfigHB8Set unsigned long ulBase unsigned long ulConfig unsigned long ulMaxWait m void ROM EPIConfigSDRAMSet unsigned long ulBase unsigned long ulConfig uns
119. BLE 12 Parameters ulBase is the base address of the UART port Description This function returns a flag indicating whether or not there is space available in the transmit FIFO Returns Returns true if there is space available in the transmit FIFO or false if there is no space available in the transmit FIFO 22 2 1 29 ROM UARTTxIntModeGet Returns the current operating mode for the UART transmit interrupt Prototype unsigned long ROM UARTTxIntModeGet unsigned long ulBase ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM UARTTABLE is an array of pointers located at ROM APITABLE 1 ROM UARTTxIntModeGet is a function pointer located at ROM UARTTABLE 28 Parameters ulBase is the base address of the UART port Description This function returns the current operating mode for the UART transmit interrupt The return value will be UART TXINT MODE EOT if the transmit interrupt is currently set to be asserted once the transmitter is completely idle the transmit FIFO is empty and all bits including any stop bits have cleared the transmitter The return value will be UART TXINT MODE FIFO if the interrupt is set to be asserted based upon the level of the transmit FIFO Returns Returns UART TXINT MODE FIFO or UART TXINT MODE EOT January 26 2012 275 UART 22 2 1 30 ROM UARTTxIntModeSet 22 2 1 31 276 Sets the op
120. CONFIG PAR ZERO select the parity mode no parity bit even parity bit odd parity bit parity bit always one and parity bit always zero respectively The peripheral clock will be the same as the processor clock This will be the value returned by ROM SysCtlClockGet or it can be explicitly hard coded if it is constant and known to save the code execution overhead of a call to ROM SysCtlClockGet Returns None 22 2 1 10 ROM UARTDisable Disables transmitting and receiving Prototype void ROM UARTDisable unsigned long ulBase ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM UARTTABLE is an array of pointers located at ROM APITABLE 1 ROM UARTDisable is a function pointer located at ROM_UARTTABLE 8 Parameters ulBase is the base address of the UART port Description Clears the UARTEN TXE and RXE bits then waits for the end of transmission of the current character and flushes the transmit FIFO Returns None 22 2 1 11 ROM UARTDisableSIR Disables SIR IrDA mode on the specified UART January 26 2012 265 UART Prototype void ROM_UARTDisableSIR unsigned long ulBase ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM UARTTABLE is an array of pointers located at ROM APITABLE 1 ROM UARTDisableSIRis a function pointer located at ROM UARTTABLE 10 Parameters ulBase is the base addres
121. CTL PERIPH GPIOA SYSCTL PERIPH GPIOB SYSCTL PERIPH GPIOC SYSCTL PERIPH GPIOD SYSCTL PERIPH GPIOE SYSCTL PERIPH GPIOF SYSCTL PERIPH GPIOG SYSCTL PERIPH GPIOH 229 System Control SYSCTL PERIPH GPIOJ SYSCTL PERIPH I2CO SYSCTL PERIPH I2C1 SYSCTL PERIPH 12S0 SYSCTL PERIPH PWM SYSCTL PERIPH QEIO SYSCTL PERIPH QEIt SYSCTL_PERIPH_SSIO SYSCTL_PERIPH_SSI1 SYSCTL PERIPH TIMERO SYSCTL_PERIPH_TIMER1 SYSCTL PERIPH TIMER2 SYSCTL PERIPH TIMERS3 SYSCTL PERIPH UARTO SYSCTL PERIPH UART 1 SYSCTL PERIPH UART2 SYSCTL PERIPH UDMA SYSCTL PERIPH USBO SYSCTL PERIPH WDOGOQ or SYSCTL_PERIPH_WDOG1 Returns None 19 2 1 20 ROM SysCtlPeripheralDisable Disables a peripheral Prototype void ROM SysCtlPeripheralDisable unsigned long ulPeripheral ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM SYSCTLTABLE is an array of pointers located at ROM APITABLE 13 ROM SysCtlPeripheralDisable is a function pointer located at ROM SYSCTLTABLE J Parameters ulPeripheral is the peripheral to disable Description Peripherals are disabled with this function Once disabled they will not operate or respond to register reads writes The ulPeripheral parameter must be only one of the following values SYSCTL_PERIPH_ADCO SYSCTL_PERIPH_ADC1 SYSCTL_PERIPH_CANO SYSCTL_PERIPH_CAN1 SYSCTL_PERIPH_CAN2 SYSCTL_PERIPH_COMPO SYSCTL_PERIPH_COMP1 SYSCTL_PERIPH_COMP2 SYSCTL_PERIPH_EP
122. Control unsigned long ulBase unsigned long ulFlags ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM USBTABLE is an array of pointers located at ROM_APITABLE 16 ROM USBIntEnableControlis a function pointer located at ROM_USBTABLE 49 Parameters ulBase specifies the USB module base address ulFlags specifies which control interrupts to enable Description This function will enable the control interrupts for the USB controller specified by the u Base parameter The ulFlags parameter specifies which control interrupts to enable The flags passed in the ulFlags parameters should be the definitions that start with USB INTCTRL x and not any other USB INT flags Returns None 24 3 1 49 ROM USBlIntEnableEndpoint Enables endpoint interrupts on a given USB controller Prototype void ROM USBIntEnableEndpoint unsigned long ulBase unsigned long ulFlags ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM USBTABLE is an array of pointers located at ROM APITABLE 16 ROM USBIntEnableEndpoint is a function pointer located at ROM USBTABLE 52 Parameters ulBase specifies the USB module base address ulFlags specifies which endpoint interrupts to enable Description This function will enable endpoint interrupts for the USB controller specified by the u Base parameter The ulFlags parameter s
123. Description This returns the current speed of the encoder The value returned is the number of pulses detected in the specified time period this number can be multiplied by the number of time periods per second and divided by the number of pulses per revolution to obtain the number of revolutions per second Returns Returns the number of pulses captured in the given time period 206 January 26 2012 18 18 1 18 2 Synchronous Serial Interface SS Synchronous Serial Interface SSI l bliej lU ee M RITO TESTE TO SETTE 207 EEE Condom dU dec nA RE SUN uud IMEEM LI E RM LL ME T UU EE MEER 207 Introduction The Synchronous Serial Interface SSI module provides the functionality for synchronous serial communications with peripheral devices and can be configured to use either the Motorola amp SPI National Semiconductor amp Microwire or the Texas Instruments synchronous serial interface frame formats The size of the data frame is also configurable and can be set to be between 4 and 16 bits inclusive The SSI module performs serial to parallel data conversion on data received from a peripheral device and parallel to serial conversion on data transmitted to a peripheral device The TX and RX paths are buffered with internal FIFOs allowing up to eight 16 bit values to be stored independently The SSI module can be configured as either a master or a slave device As a slave device the SSI module can also be configured to
124. Disable is a function pointer located at ROM I2CTABLE Ox Parameters ulBase is the base address of the I2C Slave module Description This will disable operation of the I2C slave block Returns None 12 2 1 18 ROM l2CSlaveEnable Enables the I2C Slave block January 26 2012 133 Inter Integrated Circuit I2C Prototype void ROM I2CSlaveEnable unsigned long ulBase ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM I2CTABLE is an array of pointers located at ROM_APITABLE 3 ROM I2CSlaveEnable is a function pointer located at ROM_I2CTABLE 4 Parameters ulBase is the base address of the I2C Slave module Description This will enable operation of the I2C Slave block Returns None 12 2 1 19 ROM_l2CSlavelnit Initializes the I2C Slave block Prototype void ROM I2CSlaveInit unsigned long ulBase unsigned char ucSlaveAddr ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM I2CTABLE is an array of pointers located at ROM APITABLE 3 ROM I2CSlaveInit is a function pointer located at ROM I2CTABLE 2 Parameters ulBase is the base address of the I2C Slave module ucSlaveAddr 7 bit slave address Description This function initializes operation of the I2C Slave block Upon successful initialization of the I2C blocks this function will have set t
125. FO Returns Returns true if there is data in the receive FIFO or false if there is no data in the receive FIFO January 26 2012 263 UART 22 2 1 8 ROM _UARTConfigGetExpClk 22 2 19 264 Gets the current configuration of a UART Prototype void ROM UARTConfigGetExpClk unsigned long ulBase unsigned long ulUARTIClk unsigned long xpulBaud unsigned long xpulConfig ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM UARTTABLE is an array of pointers located at ROM APITABLE 1 ROM UARTConfigGetExpClk is a function pointer located at ROM UARTTABLE Oy men Parameters ulBase is the base address of the UART port ulUARTCIk is the rate of the clock supplied to the UART module pulBaud is a pointer to storage for the baud rate pulConfig is a pointer to storage for the data format Description The baud rate and data format for the UART is determined given an explicitly provided periph eral clock hence the ExpClk suffix The returned baud rate is the actual baud rate it may not be the exact baud rate requested or an official baud rate The data format returned in pul Config is enumerated the same as the ulConfig parameter of ROM UARTConfigSetExpCIk The peripheral clock will be the same as the processor clock This will be the value returned by ROM SysCtlClockGet or it can be explicitly hard coded if it is constant and known to save the co
126. FlashIntStatus tBoolean bMasked ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM FLASHTABLE is an array of pointers located at ROM APITABLE 7 ROM FlashIntStatus is a function pointer located at ROM FLASHTABLE 12 Parameters bMasked is false if the raw interrupt status is required and true if the masked interrupt status is required Description This returns the interrupt status for the flash controller Either the raw interrupt status or the status of interrupts that are allowed to reflect to the processor can be returned Returns The current interrupt status enumerated as a bit field of FLASH INT PROGRAM and FLASH INT ACCESS ROM FlashProgram Programs flash Prototype long ROM FlashProgram unsigned long pulData unsigned long ulAddress unsigned long ulCount ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM FLASHTABLE is an array of pointers located at ROM APITABLE 7 ROM FlashProgramis a function pointer located at ROM_FLASHTABLE 0 January 26 2012 Flash Parameters pulData is a pointer to the data to be programmed ulAddress is the starting address in flash to be programmed Must be a multiple of four ulCount is the number of bytes to be programmed Must be a multiple of four Description This function will program a sequence of words into the on chip flash Each word in a page of flash can only be program
127. GEN MODE LATCH FAULT in the u Config parameter in which case the returned sta tus is the latched fault trigger status If latched faults are configured the application must call ROM PWMdGenFaultClear to clear each trigger Note This function is only available on devices supporting extended PWM fault handling Returns Returns the current state of the fault triggers for the given PWM generator A set bit indicates that the associated trigger is active For PWM FAULT GROUP Q the returned value will be a logical OR of PWM FAULT FAULTO PWM FAULT FAULT1 PWM FAULT FAULT2 or PWM FAULT FAULT3 For PWM FAULT GROUP 1 the return value will be the logical OR of PWM FAULT DCMPO PWM FAULT DCMP1 PWM FAULT DCMP2 PWM FAULT DCMP3 PWM FAULT DCMPA PWM FAULT DCMP5 PWM FAULT DCMP6 or PWM FAULT DCMP7 16 2 1 11 ROM PWMGenFaultTriggerGet Returns the set of fault triggers currently configured for a given PWM generator Prototype unsigned long ROM PWMGenFaultTriggerGet unsigned long ulBase unsigned long ulGen unsigned long ulGroup ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM PWMTABLE is an array of pointers located at ROM APITABLE 8 ROM PWMGenFaultTriggerGet is a function pointer located at ROM PWMTABLE 26 Parameters ulBase is the base address of the PWM module ulGen is the PWM generator whose fault triggers are being queried Must be one of PWM GEN 0
128. I interrupt status It can return either the raw or masked interrupt status Returns Returns the masked or raw EPI interrupt status as a bit field of any of the following values EPI INT TXREGQ EPI INT RXREQ or EPI INT ERR ROM EPIModeSet Sets the usage mode of the EPI module Prototype void ROM EPIModeSet unsigned long ulBase unsigned long ulMode ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM EPITABLE is an array of pointers located at ROM_APITABLE 23 ROM EPIModeSet is a function pointer located at ROM EPITABLE 1 Parameters ulBase is the EPI module base address ulMode is the usage mode of the EPI module January 26 2012 9 2 1 14 9 2 1 15 External Peripheral Interface EPI Description This functions sets the operating mode of the EPI module The parameter u Mode must be one of the following EPI MODE GENERAL use for general purpose mode operation EPI MODE SDRAM use with SDRAM device EPI MODE HB8 use with host bus 8 bit interface EPI MODE HB16 use with host bus 16 bit interface EPI MODE DISABLE disable the EPI module Selection of any of the above modes will enable the EPI module except for EPI MODE DISABLE which should be used to disable the module Returns None ROM EPINonBlockingReadAvail Get the count of items available in the read FIFO Prototype unsigned long ROM EPINonBlockingReadAvail
129. IGGER ALWAYS A trigger that is always asserted causing the sample se quence to capture repeatedly so long as there is not a higher priority source active The ulPriority parameter is a value between 0 and 3 where 0 represents the highest priority and 3 the lowest Note that when programming the priority among a set of sample sequences each must have unique priority it is up to the caller to guarantee the uniqueness of the priori ties Returns None January 26 2012 33 Analog to Digital Converter ADC 5 2 19 5 2 1 20 34 ROM ADCSequenceDataGet Gets the captured data for a sample sequence Prototype long ROM ADCSequenceDataGet unsigned long ulBase unsigned long ulSequenceNum unsigned long xpulBuffer ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM ADCTABLE is an array of pointers located at ROM APITABLE 5 ROM ADCSequenceDataGet is a function pointer located at ROM_ADCTABLE 0 Parameters ulBase is the base address of the ADC module ulSequenceNum is the sample sequence number pulBuffer is the address where the data is stored Description This function copies data from the specified sample sequence output FIFO to a memory resi dent buffer The number of samples available in the hardware FIFO are copied into the buffer which is assumed to be large enough to hold that many samples This will only return the samples that are prese
130. IO SYSCTL_PERIPH_ETH SYSCTL_PERIPH_GPIOA SYSCTL_PERIPH_GPIOB SYSCTL_PERIPH_GPIOC SYSCTL_PERIPH_GPIOD SYSCTL_PERIPH_GPIOE SYSCTL_PERIPH_GPIOF SYSCTL_PERIPH_GPIOG SYSCTL_PERIPH_GPIOH SYSCTL PERIPH GPIOJ SYSCTL PERIPH I2CO SYSCTL PERIPH I2C1 SYSCTL PERIPH 12S0 SYSCTL PERIPH PWM SYSCTL_PERIPH_QEIO SYSCTL_PERIPH_QEI1 SYSCTL_PERIPH_SSIO SYSCTL_PERIPH_SSI1 SYSCTL PERIPH TIMERO SYSCTL_PERIPH_TIMER1 SYSCTL PERIPH TIMER2 SYSCTL PERIPH TIMERS3 SYSCTL PERIPH UARTO SYSCTL PERIPH UART 1 SYSCTL PERIPH UART2 SYSCTL PERIPH UDMA SYSCTL PERIPH USBO SYSCTL PERIPH WDOGO or SYSCTL_PERIPH_WDOG1 Returns None 19 2 1 24 ROM SysCtlPeripheralEnable Enables a peripheral 230 January 26 2012 System Control Prototype void ROM_SysCtlPeripheralEnable unsigned long ulPeripheral ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM SYSCTLTABLE is an array of pointers located at ROM APITABLE 13 ROM SysCtlPeripheralEnable is a function pointer located at ROM SYSCTLTABLE Ox Parameters ulPeripheral is the peripheral to enable Description Peripherals are enabled with this function At power up all peripherals are disabled they must be enabled in order to operate or respond to register reads writes The ulPeripheral parameter must be only one of the following values SYSCTL PERIPH ADCO SYSCTL PERIPH ADC1 SYSCTL PERIPH CANO SYSCTL PERIPH CANT SYSCTL
131. IO port pin 0 bit 1 represents GPIO port pin 1 and so on Returns None 11 2 1 20 ROM GPIOPinTypeGPlOOutputOD Configures pin s for use as GPIO open drain outputs 114 January 26 2012 GPIO Prototype void ROM GPIOPinTypeGPIOOutputOD unsigned long ulPort unsigned char ucPins ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM GPIOTABLE is an array of pointers located at ROM_APITABLE 4 ROM GPIOPinTypeGPIOOutputOD is a function pointer located at ROM GPIOTABLE 22 Parameters ulPort is the base address of the GPIO port ucPins is the bit packed representation of the pin s Description The GPIO pins must be properly configured in order to function correctly as GPIO outputs This function provides the proper configuration for those pin s The pin s are specified using a bit packed byte where each bit that is set identifies the pin to be accessed and where bit 0 of the byte represents GPIO port pin 0 bit 1 represents GPIO port pin 1 and so on Returns None 11 2 1 21 ROM GPIOPinTypel2C Configures pin s for use by the I2C peripheral Prototype void ROM_GPIOPinTypel2C unsigned long ulPort unsigned char ucPins ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM GPIOTABLE is an array of pointers located at ROM_APITABLE 4 ROM GPIOPinTypeI2C is a function pointer located at ROM GPIOTABLE 16 Para
132. ITABLE 13 ROM SysCtlUSBPLLEnable is a function pointer located at ROM SYSCTLTABLE 31 Description This function will enable the USB controllers PLL which is used by it s physical layer This call is necessary before connecting to any external devices Returns None January 26 2012 239 System Control 240 January 26 2012 20 20 1 20 2 20 2 1 20 2 1 1 System Tick SysTick System Tick SysTick il pers slo MER eT ee TOO a a OTT 241 E EME Spas dd dep ap RE SUCRE LC DM LL henge e A EE MEIN 241 Introduction SysTick is a simple timer that is part of the NVIC controller in the Cortex M3 microprocessor Its intended purpose is to provide a periodic interrupt for a RTOS but it can be used for other simple timing purposes The SysTick interrupt handler does not need to clear the SysTick interrupt source This will be done automatically by NVIC when the SysTick interrupt handler is called Functions Functions void ROM SysTickDisable void void ROM SysTickEnable void void ROM SysTicklIntDisable void void ROM SysTicklntEnable void unsigned long ROM SysTickPeriodGet void void ROM SysTickPeriodSet unsigned long ulPeriod unsigned long ROM SysTickValueGet void Function Documentation ROM SysTickDisable Disables the SysTick counter Prototype void ROM SysTickDisable void ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM SYSTICKTAB
133. LE 3 ROM I2CMasterIntDisable is a function pointer located at ROM I2CTABLE WO ream Parameters ulBase is the base address of the I2C Master module Description Disables the I2C Master interrupt source Returns None January 26 2012 Inter Integrated Circuit I2C 12 2 1 12 ROM l2CMasterlntEnable Enables the I2C Master interrupt Prototype void ROM I2CMasterIntEnable unsigned long ulBase ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM I2CTABLE is an array of pointers located at ROM_APITABLE 3 ROM I2CMasterIntEnable is a function pointer located at ROM_I2CTABLE 7 Parameters ulBase is the base address of the I2C Master module Description Enables the I2C Master interrupt source Returns None 12 2 1 13 ROM l2CMasterlntStatus Gets the current I2C Master interrupt status Prototype tBoolean ROM I2CMasterIntStatus unsigned long ulBase tBoolean bMasked ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM I2CTABLE is an array of pointers located at ROM_APITABLE 3 ROM I2CMasterIntStatus is a function pointer located at ROM I2CTABLE 11 Parameters ulBase is the base address of the I2C Master module bMasked is false if the raw interrupt status is requested and true if the masked interrupt status is requested Description This r
134. LE is an array of pointers located at ROM APITABLE 10 ROM SysTickDisable is a function pointer located at ROM SYSTICKTABLE 2 Description This will stop the SysTick counter If an interrupt handler has been registered it will no longer be called until SysTick is restarted January 26 2012 241 System Tick SysTick Returns None 20 2 1 2 ROM_SysTickEnable 20 2 1 3 242 Enables the SysTick counter Prototype void ROM_Sys ROM Location ick Enable void ROM API ABL E is an array of pointers located at 0x0100 0010 ROM SYS ICK ROM Sys Description ick TABLE is an array of pointers located at ROM APITABLE Enable is a function pointer located at ROM SYSTICKTABLE 10 This will start the SysTick counter If an interrupt handler has been registered it will be called when the SysTick counter rolls over Note Calling this function will cause the SysTick counter to re commence counting from its current value The counter is not automatically reloaded with the period as specified in a previous call to ROM SysTickPeriodSet If an immediate reload is required the NVIC ST CURRENT register must be written to force this Any write to this register clears the SysTick counter to 0 and will cause a reload with the supplied period on the next clock Returns None ROM SysTicklntDisable Disables the SysTick interrupt Prot
135. LM3S9B92 ROM USER S GUIDE TEXAS INSTRUMENTS ROM LM3S9B92 UG 466 Copyright 2008 2012 Texas Instruments Incorporated Copyright Copyright 2008 2012 Texas Instruments Incorporated All rights reserved Stellaris and StellarisWare are registered trademarks of Texas Instruments ARM and Thumb are registered trademarks and Cortex is a trademark of ARM Limited Other names and brands may be claimed as the property of others A Please be aware that an important notice concerning availability standard warranty and use in critical applications of Texas Instruments semicon ductor products and disclaimers thereto appears at the end of this document Texas Instruments 108 Wild Basin Suite 350 Austin TX 78746 IA TEXAS E INSTRUMENTS http www ti com stellaris an m E m EN ortex Intelligent Processors by ARM a lu oc Lu o a Revision Information This is version 466 of this document last updated on January 26 2012 2 January 26 2012 Table of Contents Copyright 22299 we we ee ee ee Revision Information 1 Introduction 2 Boot Loader 2 1 Introduction 2 2 Serial Interfaces 2 3 Ethernet Interface 3 AES Data Tables 3 1 Introduction 3 2 Data Structures 4 Analog Comparator 4 1 Introduction 42 FUNCIONS 24 264 24 Y G xt mx 5 Analog to Digital Converter ADC 5 1 Introduction Se Fuchs 22 9o om RF 6 Controller Area Network CAN 6 1 Introduction G
136. LTABLE 15 P January 26 2012 System Control Parameters ullnts is a bit mask of the interrupt sources to be cleared Must be a logical OR of SYSCTL INT PLL LOCK SYSCTL INT CUR LIMIT SYSCTL_INT_IOSC FAIL SYSCTL INT MOSC FAIL SYSCTL INT POR SYSCTL INT BOR and or SYSCTL INT PLL FAIL Description The specified system control interrupt sources are cleared so that they no longer assert This must be done in the interrupt handler to keep it from being called again immediately upon exit Note Because there is a write buffer in the Cortex M3 processor it may take several clock cycles before the interrupt source is actually cleared Therefore it is recommended that the interrupt source be cleared early in the interrupt handler as opposed to the very last action to avoid returning from the interrupt handler before the interrupt source is actually cleared Failure to do so may result in the interrupt handler being immediately reentered because the interrupt controller still sees the interrupt source asserted Returns None 19 2 1 12 ROM SysCtllntDisable Disables individual system control interrupt sources Prototype void ROM SysCtlIntDisable unsigned long ulInts ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM SYSCTLTABLE is an array of pointers located at ROM APITABLE 13 ROM SysCtlIntDisable is a function pointer located at ROM SYSCTLTABLE 14 Paramet
137. M APITABLE 13 ROM SysCtlReset is a function pointer located at ROM SYSCTLTABLE 19 Description This function will perform a software reset of the entire device The processor and all periph erals will be reset and all device registers will return to their default values with the exception of the reset cause register which will maintain its current value but have the software reset bit set as well Returns This function does not return January 26 2012 System Control 19 2 1 30 ROM SysCtlResetCauseClear 19 2 1 31 Clears reset reasons Prototype void ROM SysCtlResetCauseClear unsigned long ulCauses ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM SYSCTLTABLE is an array of pointers located at ROM APITABLE 13 ROM SysCtlResetCauseClear is a function pointer located at ROM SYSCTLTABLE 22 Parameters ulCauses are the reset causes to be cleared must be a logical OR of SYSCTL CAUSE LDO SYSCTL CAUSE SW SYSCTL CAUSE WDOG SYSCTL CAUSE BOR SYSCTL CAUSE POR and or SYSCTL CAUSE EXT Description This function clears the specified sticky reset reasons Once cleared another reset for the same reason can be detected and a reset for a different reason can be distinguished instead of having two reset causes set If the reset reason is used by an application all reset causes should be cleared after they are retrieved with ROM SysCtlResetCauseGet Re
138. M ETHERNETTABLE 14 Parameters ulBase is the base address of the controller ulin tFlags is the bit mask of the interrupt sources to be enabled Description Enables the indicated Ethernet interrupt sources Only the sources that are enabled can be reflected to the processor interrupt disabled sources have no effect on the processor The Returns Non January 26 2012 ullntFlags parameter is the logical OR of any of the following ETH_INT_PHY An interrupt from the PHY has occurred The integrated PHY sup ports a number of interrupt conditions The PHY register PHY_MR17 must be read to determine which PHY interrupt has occurred This register can be read using the ROM_EthernetPHYRead API function ETH INT MDIO This interrupt indicates that a transaction on the management interface has completed successfully ETH INT RXER This interrupt indicates that an error has occurred during reception of a frame This error can indicate a length mismatch a CRC failure or an error indication from the PHY ETH INT RXOF This interrupt indicates that a frame has been received that exceeds the available space in the RX FIFO ETH INT TX This interrupt indicates that the packet stored in the TX FIFO has been successfully transmitted ETH INT TXER This interrupt indicates that an error has occurred during the transmis sion of a packet This error can be either a retry failure during the back off process or an invalid length
139. M GPIOTABLE is an array of pointers located at ROM_APITABLE 4 ROM GPIODirModesSet is a function pointer located at ROM GPIOTABLE np rem Parameters ulPort is the base address of the GPIO port ucPins is the bit packed representation of the pin s ulPinlO is the pin direction and or mode Description This function will set the specified pin s on the selected GPIO port as either an input or output under software control or it will set the pin to be under hardware control The parameter u Pin O is an enumerated data type that can be one of the following values GPIO DIR MODE IN GPIO DIR MODE OUT GPIO DIR MODE HW where GPIO DIR MODE N specifies that the pin will be programmed as a software controlled input GPIO DIR MODE OUT specifies that the pin will be programmed as a software con trolled output and GPIO DIR MODE HW specifies that the pin will be placed under hardware control The pin s are specified using a bit packed byte where each bit that is set identifies the pin to be accessed and where bit 0 of the byte represents GPIO port pin 0 bit 1 represents GPIO port pin 1 and so on Note ROM GPlOPadConfigSet must also be used to configure the corresponding pad s in order for them to propagate the signal to from the GPIO January 26 2012 103 GPIO 11 2 1 3 11 2 1 4 104 Returns None ROM GPlOIntTypeGet Gets the interrupt type for a pin Prototype unsigned long R
140. MA controller supports several different transfer modes allowing for complex transfer schemes The following transfer modes are provided January 26 2012 Basic mode performs a simple transfer when request is asserted by a device This is ap propriate to use with peripherals where the peripheral asserts the request line whenever data should be transferred The transfer will stop if request is de asserted even if the transfer is not complete Auto request mode performs a simple transfer that is started by a request but will always complete the entire transfer even if request is de asserted This is appropriate to use with software initiated transfers Ping Pong mode is used to transfer data to or from two buffers switching from one buffer to the other as each buffer fills This mode is appropriate to use with peripherals as a way to ensure a continuous flow of data to or from the peripheral However it is more complex to set up and requires code to manage the ping pong buffers in the interrupt handler Memory scatter gather mode is a complex mode that provides a way to set up a list of trans fer tasks for the uDMA controller Blocks of data can be transferred to and from arbitrary locations in memory 277 uDMA Controller 278 m Peripheral scatter gather mode is similar to memory scatter gather mode except that it is controlled by a peripheral request Detailed explanation of the various transfer modes is beyond the scope o
141. MER_B or TIMER_BOTH Only TIMER_A should be used when the timer is configured for 32 bit operation ulValue is the load value Description This function sets the timer load value if the timer is running then the value will be immediately loaded into the timer Returns None 21 2 1 14 ROM TimerMatchGet Gets the timer match value Prototype unsigned long ROM TimerMatchGet unsigned long ulBase unsigned long ulTimer ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM TIMERTABLE is an array of pointers located at ROM APITABLE 11 ROM TimerMatchGet is a function pointer located at ROM_TIMERTABLE 18 Parameters ulBase is the base address of the timer module ulTimer specifies the timer must be one of TIMER A or TIMER B Only TIMER A should be used when the timer is configured for 32 bit operation Description This function gets the match value for the specified timer Returns Returns the match value for the timer 21 2 1 15 ROM TimerMatchSet Sets the timer match value Prototype void ROM TimerMatchSet unsigned long ulBase unsigned long ulTimer unsigned long ulValue 254 January 26 2012 Timer ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM TIMERTABLE is an array of pointers located at ROM APITABLE 11 ROM TimerMatchsSet is a function pointer located at ROM TIMERTABLE 17
142. MOutBits tBoolean bDriveHigh ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM PWMTABLE is an array of pointers located at ROM APITABLE 8 ROM PWMOutputFaultLevel is a function pointer located at ROM PWMTABLE 22 Parameters ulBase is the base address of the PWM module ulPWMOutBits are the PWM outputs to be modified Must be the logical OR of any of PWM OUT O0 BIT PWM OUT 1 BIT PWM OUT 2 BIT PWM OUT 3 BIT PWM OUT 4 BIT PWM OUT 5 BIT PWM OUT 6 BIT or PWM OUT 7 BIT bDriveHigh determines if the signal is driven high or low during an active fault condition Description This function determines whether a PWM output pin that is suppressed in response to a fault condition will be driven high or low The affected outputs are selected using the parameter ulPWMOutBits The parameter bDriveHigh determines the output level for the pins identified by ulPWMOutBits f bDriveHigh is true then the selected outputs will be driven high when a fault is detected If it is false the pins will be driven low In a fault condition pins which have not been configured to be suppressed via a call to ROM PWMoOutputFault are unaffected by this function Note This function is available only on devices which support extended PWM fault handling Returns None 16 2 1 24 ROM PWMoOUtputlnvert Selects the inversion mode for PWM outputs 192 January 26 2012 Pulse Width Modulator
143. N controller and the message objects in the controller are left as they were before this call was made Returns None January 26 2012 43 Controller Area Network CAN 6 2 1 5 ROM CANEnable Enables the CAN controller Prototype void ROM_CANEnable unsigned long ulBase ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM CANTABLE is an array of pointers located at ROM APITABLE 18 ROM CANEnable is a function pointer located at ROM CANTABLE 2 Parameters ulBase is the base address of the CAN controller to enable Description Enables the CAN controller for message processing Once enabled the controller will auto matically transmit any pending frames and process any received frames The controller can be stopped by calling ROM CANDisable Prior to calling ROM CANEnable ROM CANInit should have been called to initialize the controller and the CAN bus clock should be configured by calling ROM CANBitTimingSet Returns None 6 2 1 6 ROM CANErrCntrGet Reads the CAN controller error counter register Prototype tBoolean ROM CANErrCntrGet unsigned long ulBase unsigned long pulRxCount unsigned long pulTxCount ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM CANTABLE is an array of pointers located at ROM APITABLE 18 ROM CANErrCntrGet is a function pointer located at ROM CANTABLE 15
144. NNECT Device Connect Detected Host Only m USB INTCTRL SOF Start of Frame Detected m USB INTCTRL BABBLE USB controller detected a device signaling past the end of a frame Host Only m USB INTCTRL RESET Reset signaling detected by device Device Only m USB INTCTRL RESUME Resume signaling detected m USB INTCTRL SUSPEND Suspend signaling detected by device Device Only m USB INTCTRL MODE DETECT OTG cable mode detection has completed OTG Only m USB INTCTRL POWER FAULT Power Fault detected Host Only Note This call will clear the source of all of the control status interrupts Returns Returns the status of the control interrupts for a USB controller 24 3 1 52 ROM_USBIntStatusEndpoint Returns the endpoint interrupt status on a given USB controller Prototype unsigned long ROM USBIntStatusEndpoint unsigned long ulBase ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM USBTABLE is an array of pointers located at ROM APITABLE 16 ROM USBIntStatusEndpoint is a function pointer located at ROM USBTABLE 53 Parameters ulBase specifies the USB module base address Description This function will read endpoint interrupt status for a USB controller This call will return the current status for endpoint interrupts only the control interrupt status is retrieved by calling ROM UsSBintStatusControl The bit values returned should be compared a
145. NNEL ADC11 m UDMA SEC CHANNEL ADC12 m UDMA SEC CHANNEL ADC13 m UDMA SEC CHANNEL EPIORX m UDMA SEC CHANNEL EPIOTX UDMA CHANNEL ETHORX m UDMA CHANNEL ETHOTX m UDMA CHANNEL I2S0RX m UDMA CHANNEL l2SO0TX m UDMA CHANNEL SSIORX UDMA CHANNEL SSIOTX m UDMA CHANNEL SSHRX January 26 2012 uDMA Controller UDMA_CHANNEL_SSI1TX m UDMA_SEC_CHANNEL_SSI1RX m UDMA_SEC_CHANNEL_SSI1TX UDMA_CHANNEL_TMROA m UDMA_CHANNEL_TMROB m UDMA_CHANNEL_TMR1A UDMA_CHANNEL_TMR1B m UDMA SEC CHANNEL TMR1A m UDMA SEC CHANNEL TMR1B UDMA SEC CHANNEL TMR2A 4 m UDMA SEC CHANNEL TMR2B 5 m UDMA SEC CHANNEL TMR2A 6 m UDMA SEC CHANNEL TMR2B 7 m UDMA SEC CHANNEL TMR2A 14 m UDMA SEC CHANNEL TMR2B 15 m UDMA SEC CHANNEL TMR3A m UDMA SEC CHANNEL TMR3B UDMA CHANNEL UARTORX UDMA CHANNEL UARTOTX m UDMA CHANNEL UART1RX m UDMA CHANNEL UART1TX m UDMA SEC CHANNEL UART1RX m UDMA SEC CHANNEL UART1TX m UDMA SEC CHANNEL UART2RX 0 m UDMA SEC CHANNEL UART 2TX 1 m UDMA SEC CHANNEL UART2RX 12 UDMA SEC CHANNEL UART2TX 13 m UDMA CHANNEL USBEP1RX m UDMA CHANNEL USBEP1TX m UDMA CHANNEL USBEP2RX m UDMA CHANNEL USBEP2TX m UDMA CHANNEL USBEP3RX UDMA CHANNEL USBEPS3TX UDMA CHANNEL SW UDMA SEC CHANNEL SW The ulAttr parameter is the logical OR of any of the following m UDMA ATTR USEBURST is used to restrict transfers to use only a burst mode m UDMA ATTR ALTSELECT is used to select the alternate control structure for this chan nel
146. NNEL ETHOTX m UDMA CHANNEL I2S0RX m UDMA CHANNEL l2SO0TX m UDMA CHANNEL SSIORX UDMA CHANNEL SSIOTX UDMA CHANNEL SSHRX UDMA CHANNEL SSHTX m UDMA SEC CHANNEL SSHRX m UDMA SEC CHANNEL SSHTX m UDMA CHANNEL TMROA m UDMA CHANNEL TMROB m UDMA CHANNEL TMR1A m UDMA CHANNEL TMR1B m UDMA SEC CHANNEL TMR1A m UDMA SEC CHANNEL TMR1B m UDMA SEC CHANNEL TMR2A 4 m UDMA SEC CHANNEL TMR2B 5 m UDMA SEC CHANNEL TMR2A 6 m UDMA SEC CHANNEL TMR2B 7 m UDMA SEC CHANNEL TMR2A 14 m UDMA SEC CHANNEL TMR2B 15 m UDMA SEC CHANNEL TMR3A UDMA SEC CHANNEL TMR3B UDMA CHANNEL UARTORX UDMA CHANNEL UARTOTX UDMA CHANNEL UART1RX m UDMA CHANNEL UART1TX m UDMA SEC CHANNEL UART1RX m UDMA SEC CHANNEL UART1TX m UDMA SEC CHANNEL UART2RX 0 m UDMA SEC CHANNEL UART 2TX 1 m UDMA SEC CHANNEL UART2RX 12 m UDMA SEC CHANNEL UART2TX 13 287 uDMA Controller 23 2 1 6 288 UDMA_CHANNEL_USBEP1RX m UDMA_CHANNEL_USBEP1TX m UDMA CHANNEL USBEP2RX m UDMA CHANNEL USBEP2TX m UDMA CHANNEL USBEP3RX m UDMA CHANNEL USBEPS3TX UDMA CHANNEL SW m UDMA SEC CHANNEL SW Returns None ROM uDMAChannelEnable Enables a uDMA channel for operation Prototype void ROM uDMAChannelEnable unsigned long ulChannelNum ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM UDMATABLE is an array of pointers located at ROM APITABLI E 17 ROM uDMAChannelEnable is a function pointer located at ROM U
147. NNEL UART1TX UDMA SEC CHANNEL UART1RX UDMA SEC CHANNEL UART1TX m UDMA SEC CHANNEL UART2RX 0 m UDMA SEC CHANNEL UART 2TX 1 m UDMA SEC CHANNEL UART2RX 12 m UDMA SEC CHANNEL UART2TX 13 m UDMA CHANNEL USBEP1RX m UDMA CHANNEL USBEP1TX UDMA CHANNEL USBEP2RX UDMA CHANNEL USBEP2TX UDMA CHANNEL USBEP3RX m UDMA CHANNEL USBEPS3TX m UDMA CHANNEL SW m UDMA SEC CHANNEL SW Returns None January 26 2012 289 uDMA Controller 23 2 1 7 ROM uDMAChannellsEnabled 290 Checks if a uDMA channel is enabled for operation Prototype tBoolean ROM uDMAChannellsEnabled unsigned long ulChannelNum ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM UDMATABLE is an array of pointers located at ROM APITABLE 17 ROM uDMAChannelIsEnabledis a function pointer located at ROM UDMATABLE Parameters ulChannelNum is the channel number to check Description This function checks to see if a specific uDMA channel is enabled This can be used to check the status of a transfer since the channel will be automatically disabled at the end of a transfer The ulChannelNum parameter must be only one of the following values m UDMA CHANNEL ADCO m UDMA CHANNEL ADC1 m UDMA CHANNEL ADC2 UDMA CHANNEL ADC3 m UDMA SEC CHANNEL ADC10 m UDMA SEC CHANNEL ADC11 m UDMA SEC CHANNEL ADC12 m UDMA SEC CHANNEL ADC13 m UDMA SEC CHANNEL EPIORX m UDMA SEC CHANNEL EPIOTX m UDMA CHANNEL ETH
148. NT START Start condition detected interrupt January 26 2012 137 Inter Integrated Circuit I2C m l2C SLAVE INT DATA Data interrupt Returns None 12 2 1 26 ROM_l2CSlavelntStatus Gets the current I2C Slave interrupt status Prototype tBoolean ROM I2CSlaveIntStatus unsigned long ulBase tBoolean bMasked ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM I2CTABLE is an array of pointers located at ROM_APITABLE 3 ROM I2CSlaveIntStatus is a function pointer located at ROM I2CTABLE 12 Parameters ulBase is the base address of the I2C Slave module bMasked is false if the raw interrupt status is requested and true if the masked interrupt status is requested Description This returns the interrupt status for the I2C Slave module Either the raw interrupt status or the status of interrupts that are allowed to reflect to the processor can be returned Returns The current interrupt status returned as true if active or false if not active 12 2 1 27 ROM_l2CSlavelntStatusEx Gets the current I2C Slave interrupt status Prototype unsigned long ROM I2CSlaveIntStatusEx unsigned long ulBase tBoolean bMasked ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM I2CTABLE is an array of pointers located at ROM_APITABLE 3 ROM I2CSlaveIntStatusEx Is a function pointer located at ROM I2CTABLE 27
149. O transmit FIFO is below the trigger level m EPI INT RXREOQ read FIFO is above the trigger level m EPI INT ERR an error condition occurred Returns Returns None January 26 2012 External Peripheral Interface EPI 9 2 1 10 ROM EPlIntErrorClear 9 2 1 11 Clears pending EPI error sources Prototype void ROM EPIIntErrorClear unsigned long ulBase unsigned long ulErrFlags ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM EPITABLE is an array of pointers located at ROM_APITABLE 23 ROM EPIIntErrorClear is a function pointer located at ROM EPITABLE 21 Parameters ulBase is the EPI module base address ulErrFlags is a bit mask of the error sources to be cleared Description This function clears the specified pending EPI errors The ulErrFlags parameter can be the logical OR of any of the following values EPI INT ERR WTFULL EPI INT ERR RSTALL or EPI INT ERR TIMEOUT Returns Returns None ROM EPlIntErrorStatus Gets the EPI error interrupt status Prototype unsigned long ROM EPIIntErrorStatus unsigned long ulBase ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM EPITABLE is an array of pointers located at ROM APITABLE 23 ROM EPIIntErrorStatus is a function pointer located at ROM EPITABLE 20 Parameter
150. O 2 50V SYSCTL LDO 2 55V SYSCTL LDO 2 60V SYSCTL LDO 2 65V SYSCTL LDO 2 70V Or SYSCTL LDO 2 75V 19 2 1 16 ROM SysCtlLDOSet Sets the output voltage of the LDO Prototype void ROM SysCtlLDOSet unsigned long ulVoltage ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM SYSCTLTABLE is an array of pointers located at ROM APITABLE 13 ROM SysCtlLDOSet is a function pointer located at ROM SYSCTLTABLE 17 Parameters ulVoltage is the required output voltage from the LDO Must be one of SYSCTL LDO 2 25V SYSCTL LDO 2 30V SYSCTL LDO 2 35V SYSCTL LDO 2 40V SYSCTL LDO 2 45V SYSCTL LDO 2 50V SYSCTL LDO 2 55V SYSCTL LDO 2 60V SYSCTL LDO 2 65V SYSCTL LDO 2 70V or SYSCTL LDO 2 75V Description This function sets the output voltage of the LDO The default voltage is 2 5 V it can be adjusted 10 Returns None 19 2 1 17 ROM SysCtlPeripheralClockGating Controls peripheral clock gating in sleep and deep sleep mode January 26 2012 227 System Control Prototype void ROM Location ROM ROM SysCtlPeripheralClockGating tBoolean bEnable APITABLE is an array of pointers located at 0x0100 0010 ROM SYSC TABL E is an array of pointers located at RO ROM SysCtlPeri function pheralClockGating is a ROM SYSC Parameters iTABL E 12 APITABLE 13 pointer located at bEnable is
151. OM GPIOIntTypeGet unsigned long ulPort unsigned char ucPin ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM GPIOTABLE is an array of pointers located at ROM_APITABLE 4 ROM GPIOIntTypeGet is a function pointer located at ROM_GPIOTABLE 4 Parameters ulPort is the base address of the GPIO port ucPin is the pin number Description This function gets the interrupt type for a specified pin on the selected GPIO port The pin can be configured as a falling edge rising edge or both edge detected interrupt or it can be configured as a low level or high level detected interrupt The type of interrupt detection mechanism is returned as an enumerated data type Returns Returns one of the enumerated data types described for ROM GPlOIntTypeSet ROM GPlOIntTypeSet Sets the interrupt type for the specified pin s Prototype void ROM GPIOIntTypeSet unsigned long ulPort unsigned char ucPins unsigned long ulIntType ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM GPIOTABLE is an array of pointers located at ROM_APITABLE 4 ROM GPIOIntTypeSet is a function pointer located at ROM GPIOTABLE Ww Parameters ulPort is the base address of the GPIO port ucPins is the bit packed representation of the pin s ullntType specifies the type of interrupt trigger mechanism January 26 2012 11 2 1 5 GPIO Description This funct
152. OM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM ETHERNETTABLE is an array of pointers located at ROM APITABLE 15 ROM EthernetDisable is a function pointer located at ROM ETHERNETTABLE l ca Parameters ulBase is the base address of the controller Description When terminating operations on the Ethernet interface this function should be called This function will disable the transmitter and receiver and will clear out the receive FIFO Returns None ROM EthernetEnable Enables the Ethernet controller for normal operation Prototype void ROM EthernetEnable unsigned long ulBase ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM ETHERNETTABLE is an array of pointers located at ROM APITABLE 15 ROM EthernetEnable is a function pointer located at ROM ETHERNETTABLE 6 Parameters ulBase is the base address of the controller January 26 2012 8 2 1 5 8 2 1 6 January 26 2012 Ethernet Controller Description Once the Ethernet controller has been configured using the ROM_EthernetConfigSet function and the MAC address has been programmed using the ROM EthernetMACAdadrSet function this API function can be called to enable the controller for normal operation This function will enable the controllers transmitter and receiver and will reset the
153. OM PWMTABLE 4 Parameters ulBase is the base address of the PWM module January 26 2012 181 Pulse Width Modulator PWM 16 2 1 8 16 2 1 9 182 ulGen is the PWM generator to be enabled Must be one of PWM_GEN_0 PWM_GEN_1 PWM GEN 2 or PWM GEN 3 Description This function allows the PWM clock to drive the timer counter for the specified generator block Returns None ROM PWMGenFaultClear Clears one or more latched fault triggers for a given PWM generator Prototype void ROM PWMGenFaultClear unsigned long ulBase unsigned long ulGen unsigned long ulGroup unsigned long ulFaultTriggers ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM PWMTABLE is an array of pointers located at ROM APITABLE 8 ROM PWMGenFaultClear is a function pointer located at ROM PWMTABLE 28 Parameters ulBase is the base address of the PWM module ulGen is the PWM generator whose fault trigger states are being queried Must be one of PWM GEN 0 PWM GEN 1 PWM GEN 2 or PWM GEN 3 ulGroup indicates the subset of faults that are being queried This must be PWM FAULT GROUP 0 or PWM FAULT GROUP 1 ulFaultTriggers is the set of fault triggers which are to be cleared Description This function allows an application to clear the fault triggers for a given PWM genera tor This is only required if ROM PWMdGenConfigure has previously
154. ORX m UDMA CHANNEL ETHOTX UDMA CHANNEL I2S0RX m UDMA CHANNEL lI2SO0TX m UDMA CHANNEL SSIORX m UDMA CHANNEL SSIOTX UDMA CHANNEL SSHRX m UDMA CHANNEL SSHTX m UDMA SEC CHANNEL SSHRX m UDMA SEC CHANNEL SSHTX UDMA CHANNEL TMROA UDMA CHANNEL TMROB m UDMA CHANNEL TMR1A m UDMA CHANNEL TMR1B m UDMA SEC CHANNEL TMR1A UDMA SEC CHANNEL TMR1B m UDMA SEC CHANNEL TMR2A 4 m UDMA SEC CHANNEL TMR2B 5 January 26 2012 23 2 1 8 uDMA Controller UDMA_SEC_CHANNEL_TMR2A_6 UDMA_SEC_CHANNEL_TMR2B_7 m UDMA_SEC_CHANNEL_TMR2A_14 m UDMA_SEC_CHANNEL_TMR2B_15 m UDMA SEC CHANNEL TMR3A m UDMA SEC CHANNEL TMR3B m UDMA CHANNEL UARTORX UDMA CHANNEL UARTOTX m UDMA CHANNEL UART1RX UDMA CHANNEL UART1TX UDMA SEC CHANNEL UART1RX m UDMA SEC CHANNEL UART1TX m UDMA SEC CHANNEL UART2RX 0 m UDMA SEC CHANNEL UART 2TX 1 m UDMA SEC CHANNEL UART2RX 12 m UDMA SEC CHANNEL UART2TX 13 UDMA CHANNEL USBEP1RX m UDMA CHANNEL USBEP1TX UDMA CHANNEL USBEP2RX UDMA CHANNEL USBEP2TX m UDMA CHANNEL USBEP3RX m UDMA CHANNEL USBEPS3TX m UDMA CHANNEL SW m UDMA SEC CHANNEL SW Returns Returns true if the channel is enabled false if disabled ROM uDMAChannelModeGet Gets the transfer mode for a uDMA channel control structure Prototype unsigned long ROM uDMAChannelModeGet unsigned long ulChannelStruct Index ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM UDMATABLE is an array of pointers
155. OST OUT USB EP HOST IN USB EP DEV OUT or USB EP DEV IN Returns None 24 3 1 16 ROM USBEndpointDMAChannel Sets the DMA channel to use for a given endpoint Prototype void ROM USBEndpointDMAChannel unsigned long ulBase unsigned long ulEndpoint unsigned long ulChannel ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM USBTABLE is an array of pointers located at ROM APITABLE 16 ROM USBEndpointDMAChannel is a function pointer located at ROM USBTABLE 47 Parameters ulBase specifies the USB module base address ulEndpoint specifies which endpoints FIFO address to return ulChannel specifies which DMA channel to use for which endpoint Description This function is used to configure which DMA channel to use with a given endpoint Receive DMA channels can only be used with receive endpoints and transmit DMA channels can only be used with transmit endpoints This allows the 3 receive and 3 transmit DMA channels to be mapped to any endpoint other than 0 The values that should be passed into the u Channel value are the UDMA CHANNEL USBEP values defined in udma h Note This function only has an effect on microcontrollers that have the ability to change the DMA channel for an endpoint Calling this function on other devices will have no effect Returns None January 26 2012 319 USB Controller 24 3 1 17 ROM_USBEndpointDMADisable Disab
156. PERIPH CAN2 SYSCTL PERIPH COMPO SYSCTL PERIPH COMP 1 SYSCTL PERIPH COMP2 SYSCTL PERIPH EPIO SYSCTL PERIPH ETH SYSCTL PERIPH GPIOA SYSCTL PERIPH GPIOB SYSCTL PERIPH GPIOC SYSCTL PERIPH GPIOD SYSCTL PERIPH GPIOE SYSCTL PERIPH GPIOF SYSCTL PERIPH GPIOG SYSCTL PERIPH GPIOH SYSCTL PERIPH GPIOJ SYSCTL_PERIPH_I2Co SYSCTL PERIPH I2C1 SYSCTL PERIPH 12S0 SYSCTL PERIPH PWM SYSCTL PERIPH QEIO SYSCTL PERIPH QEI1 SYSCTL PERIPH SSIO SYSCTL PERIPH SSI1 SYSCTL PERIPH TIMERO SYSCTL PERIPH TIMER1 SYSCTL PERIPH TIMER2 SYSCTL PERIPH TIMERS3 SYSCTL PERIPH UARTO SYSCTL PERIPH UART 1 SYSCTL PERIPH UART2 SYSCTL PERIPH UDMA SYSCTL PERIPH USBO SYSCTL PERIPH WDOGOQ or SYSCTL_PERIPH_WDOG1 Note It takes five clock cycles after the write to enable a peripheral before the the peripheral is actually enabled During this time attempts to access the peripheral will result in a bus fault Care should be taken to ensure that the peripheral is not accessed during this brief time period Returns None 19 2 1 22 ROM SysCtlPeripheralPresent Determines if a peripheral is present Prototype tBoolean ROM SysCtlPeripheralPresent unsigned long ulPeripheral ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM SYSCTLTABLE is an array of pointers located at ROM APITABLE 13 ROM SysCtlPeripheralPresent is a function pointer located at ROM SYSCTLTABLE A par Parameters
157. PITABLE 16 ROM USBHostHubAddrSet is a function pointer located at ROM USBTABLE m 27 Parameters ulBase specifies the USB module base address ulEndpoint is the endpoint to access ulAddr is the hub address for the device using this endpoint ulFlags determines if this is an IN or an OUT endpoint Description This function will set the hub address for a device that is using this endpoint for communication The ulFlags parameter determines if the device address for the IN or the OUT endpoint is set by this call Note This function should only be called in host mode Returns None 24 3 1 32 ROM USBHostMode Change the mode of the USB controller to host Prototype void ROM USBHostMode unsigned long ulBase January 26 2012 329 USB Controller ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM USBTABLE is an array of pointers located at ROM APITABLE 16 ROM USBHostMode is a function pointer located at ROM USBTABLE 54 Parameters ulBase specifies the USB module base address Description This function changes the mode of the USB controller to host mode Returns None 24 3 1 33 ROM USBHostPwrConfig Sets the configuration for USB power fault Prototype void ROM USBHostPwrConfig unsigned long ulBase unsigned long ulFlags ROM Location ROM APITABLE is an array of pointers located at 0x0100 001
158. PITABLE is an array of pointers located at 0x0100 0010 ROM SYSCTLTABLE is an array of pointers located at ROM APITABLE 13 ROM SysCtlI2SMClksSet is a function pointer located at ROM SYSCTLTABLE 33 Parameters ullnputClock is the input clock to the MCLK divider If this is zero the value is computed from the current PLL configuration ulMCIk is the desired MCLK frequency If this is zero MCLK output is disabled Description This function sets the dividers to provide MCLK to the 12S module A MCLK divider will be cho sen that produces the MCLK frequency that is the closest possible to the requested frequency which may be above or below the requested frequency The actual MCLK frequency will be returned It is the responsibility of the application to de termine if the selected MCLK is acceptable in general the human ear can not discern the frequency difference if it is within 0 396 of the desired frequency though there is a very small percentage of the population that can discern lower frequency deviati Returns Returns the actual MCLK frequency 19 2 1 11 ROM SysCtllntClear Clears system control interrupt sources Prototype void ROM SysCtlIntClear unsigned long ulInts ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM SYSCTLTABLE is an array of pointers located at ROM APITABLI 224 ons E 13 ROM SysCtlIntClear is a function pointer located at ROM SYSCT
159. PWM Prototype void ROM PWMOutputInvert unsigned long ulBase unsigned long ulPWMOutBits tBoolean bInvert ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM PWMTABLE is an array of pointers located at ROM APITABLE 8 ROM PWMOutputInvert is a function pointer located at ROM PWMTABLE 12 Parameters ulBase is the base address of the PWM module ulPWMOutBits are the PWM outputs to be modified Must be the logical OR of any of PWM OUT O0 BIT PWM OUT 1 BIT PWM OUT 2 BIT PWM OUT 3 BIT PWM OUT 4 BIT PWM OUT 5 BIT PWM OUT 6 BIT or PWM OUT 7 BIT binvert determines if the signal is inverted or passed through Description This function is used to select the inversion mode for the selected PWM outputs The outputs are selected using the parameter u PWMOutBits The parameter b nvert determines the in version mode for the selected outputs If b nvert is true this function will cause the specified PWM output signals to be inverted or made active low If b nvert is false the specified output will be passed through as is or be made active high Returns None 16 2 1 25 ROM PWMoOWUIputState Enables or disables PWM outputs Prototype void ROM PWMOutputState unsigned long ulBase unsigned long ulPWMOutBits tBoolean bEnable ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM PWMTABLE is an array of pointers located at
160. PWM GEN 1 PWM GEN 2 or PWM GEN 3 ulGroup indicates the subset of faults that are being queried This must be PWM FAULT GROUP 0 or PWM FAULT GROUP 1 Description This function allows an application to query the current set of inputs that contribute towards the generation of a fault condition to a given PWM generator 184 January 26 2012 Pulse Width Modulator PWM Note This function is only available on devices supporting extended PWM fault handling Returns Returns the current fault triggers configured for the fault group provided For PWM FAULT GROUP OQ the returned value will be a logical OR of PWM FAULT FAULTO PWM FAULT FAULT1 PWM FAULT FAULT2 or PWM FAULT FAULTS For PWM FAULT GROUP 1 the return value will be the logical OR of PWM FAULT DCMPO PWM FAULT DCMP1 PWM FAULT DCMP2 PWM FAULT DCMP3 PWM FAULT DCMPA PWM FAULT DCMPS5 PWM FAULT DCMP6 or PWM_FAULT_DCMP7 16 2 1 12 ROM_PWMGenFaultTriggerSet Configures the set of fault triggers for a given PWM generator Prototype void ROM_PWMGenFaultTriggerSet unsigned long ulBase unsigned long ulGen unsigned long ulGroup unsigned long ulFaultTriggers ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM PWMTABLE is an array of pointers located at ROM_APITABLE 8 ROM PWMGenFaultTriggersSet is a function pointer located at ROM PWMTABLE mi 25 Parameters ulBase is the base address of the
161. PWM INT FAULT2 or PWM INT FAULTS3 Description Unmasks the specified interrupt s by setting the specified bits of the interrupt enable register for the selected PWM module Returns None ROM PWMIntStatus Gets the interrupt status for a PWM module January 26 2012 Pulse Width Modulator PWM Prototype unsigned long ROM_PWMIntStatus unsigned long ulBase tBoolean bMasked ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM PWMTABLE is an array of pointers located at ROM APITABLE 8 ROM_PWMInt Status is a function pointer located at ROM PWMTABLE 21 Parameters ulBase is the base address of the PWM module bMasked specifies whether masked or raw interrupt status is returned Description If bMasked is set as true then the masked interrupt status is returned otherwise the raw interrupt status will be returned Returns The current interrupt status enumerated as a bit field of PWM INT GEN O PWM INT GEN 1 PWM INT GEN 2 PWM INT GEN 3 PWM INT FAULTO PWM INT FAULT1 PWM INT FAULT2 and PWM INT FAULTS 16 2 1 22 ROM PWMoOUtputFault Specifies the state of PWM outputs in response to a fault condition Prototype void ROM PWMOutputFault unsigned long ulBase unsigned long ulPWMOutBits tBoolean bFaultSuppress ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM PWMTABLE is an array of pointers located at ROM
162. PWM module ulGen is the PWM generator to modify Must be one of PWM GEN 0 PWM GEN 1 PWM GEN 2 or PWM GEN 3 Description This function disables the dead band mode for the specified PWM generator Doing so decou ples the OutA and OutB signals Returns None ROM PWMDeadBandEnable Enables the PWM dead band output and sets the dead band delays Prototype void ROM PWMDeadBandEnable unsigned long ulBase unsigned long ulGen unsigned short usRise unsigned short usFall ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM PWMTABLE is an array of pointers located at ROM APITABLE 8 ROM PWMDeadBandEnable is a function pointer located at ROM PWMTABLE ca Parameters ulBase is the base address of the PWM module ulGen is the PWM generator to modify Must be one of PWM GEN 0 PWM GEN 1 PWM GEN 2 or PWM GEN 3 usRise specifies the width of delay from the rising edge usFall specifies the width of delay from the falling edge January 26 2012 177 Pulse Width Modulator PWM 16 2 1 3 16 2 1 4 178 Description This function sets the dead bands for the specified PWM generator where the dead bands are defined as the number of PWM clock ticks from the rising or falling edge of the generator s OutA signal Note that this function causes the coupling of OutB to OutA Returns None ROM_PWMFaultintClear Clears the fault interrupt
163. PeripheralReset unsigned long ulPeripheral ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM SYSCTLTABLE is an array of pointers located at ROM APITABLE 13 ROM SysCtlPeripheralReset is a function pointer located at ROM_SYSCTLTABLE 5 Parameters ulPeripheral is the peripheral to reset Description 232 This function performs a software reset of the specified peripheral An individual peripheral reset signal is asserted for a brief period and then deasserted returning the internal state of the peripheral to its reset condition The ulPeripheral parameter must be only one of the following values SYSCTL PERIPH ADCO SYSCTL PERIPH ADC1 SYSCTL PERIPH CANO SYSCTL PERIPH CANT SYSCTL PERIPH CAN2 SYSCTL PERIPH COMPO SYSCTL PERIPH COMP 1 SYSCTL PERIPH COMP2 SYSCTL PERIPH EPIO SYSCTL PERIPH ETH SYSCTL PERIPH GPIOA SYSCTL PERIPH GPIOB SYSCTL PERIPH GPIOC SYSCTL PERIPH GPIOD SYSCTL PERIPH GPIOE SYSCTL PERIPH GPIOF SYSCTL PERIPH GPIOG SYSCTL PERIPH GPIOH SYSCTL PERIPH GPIOJ SYSCTL PERIPH I2CO SYSCTL PERIPH I2C1 January 26 2012 System Control SYSCTL_PERIPH_I2S0 SYSCTL_PERIPH_PWM SYSCTL PERIPH QEIO SYSCTL PERIPH QEI1 SYSCTL PERIPH SSIO SYSCTL PERIPH SSI1 SYSCTL PERIPH TIMERO SYSCTL PERIPH TIMER1 SYSCTL PERIPH TIMER2 SYSCTL PERIPH TIMERS3 SYSCTL PERIPH UARTO SYSCTL PERIPH UART 1 SYSCTL PERIPH UART2 SYSCTL PERIPH UDMA SYSCTL PERIPH USBO SYSCTL
164. PinType void ROM GPlIOPinConfigure unsigned long ulPinConfig void ROM GPlIOPinIntClear unsigned long ulPort unsigned char ucPins void ROM GPlIOPinIntDisable unsigned long ulPort unsigned char ucPins void ROM GPlIOPinIntEnable unsigned long ulPort unsigned char ucPins long ROM GPlOPinlntStatus unsigned long ulPort tBoolean bMasked long ROM GPlIOPinRead unsigned long ulPort unsigned char ucPins void ROM GPIOPinTypeADC unsigned long ulPort unsigned char ucPins void ROM GPIOPinTypeCAN unsigned long ulPort unsigned char ucPins void ROM GPIOPinTypeComparator unsigned long ulPort unsigned char ucPins void ROM GPIOPinTypeEPI unsigned long ulPort unsigned char ucPins void ROM GPIOPinTypeEthernetLED unsigned long ulPort unsigned char ucPins void ROM GPIOPinTypeGPlOInput unsigned long ulPort unsigned char ucPins void ROM GPIOPinTypeGPlOOutput unsigned long ulPort unsigned char ucPins void ROM GPIOPinTypeGPlIOOutputOD unsigned long ulPort unsigned char ucPins void ROM GPIOPinTypel2C unsigned long ulPort unsigned char ucPins void ROM GPIOPinTypel2S unsigned long ulPort unsigned char ucPins void ROM GPIOPinTypePWM unsigned long ulPort unsigned char ucPins void ROM GPIOPinTypeQEI unsigned long ulPort unsigned char ucPins void ROM GPIOPinTypeSSI unsigned long ulPort unsigned char ucPins void ROM GPlIOPinTypeTimer unsigned long ulPort unsigned char ucPins void ROM GPIOPinTypeUART unsigned long u
165. ROM APITABLE is an array of pointers located at 0x0100 0010 ROM USBTABLE is an array of pointers located at ROM APITABLE 16 ROM USBIntDisable is a function pointer located at ROM USBTABLE 39 Parameters ulBase specifies the USB module base address ulFlags specifies which interrupts to disable Description This function will disable the USB controller from generating the interrupts indicated by the ulFlags parameter There are three groups of interrupt sources IN Endpoints OUT End points and general status changes specified by USB INT HOST IN USB INT HOST OUT USB INT DEV IN USB INT DEV OUT and USB INT STATUS If USB INT ALL is spec ified then all interrupts will be disabled 336 January 26 2012 USB Controller Note WARNING This API cannot be used on endpoint numbers greater than endpoint 3 so ROM_USBintDisableControl or ROM_USBIntDisableEndpoint should be used instead Returns None 24 3 1 45 ROM_USBIntDisableControl Disables control interrupts on a given USB controller Prototype void ROM_USBIntDisableControl unsigned long ulBase unsigned long ulFlags ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM USBTABLE is an array of pointers located at ROM APITABLE 16 ROM USBIntDisableControl is a function pointer located at ROM USBTABLE 48 Parameters ulBase specifies the USB module base address ulFlags
166. ROM_MPURegionGet Gets the current settings for a specific region Prototype void ROM_MPURegionGet unsigned long ulRegion unsigned long pulAddr unsigned long pulFlags ROM Location ROM_APITABLE is an array of pointers located at 0x0100 0010 ROM MPUTABLE is an array of pointers located at ROM_APITABLE 20 ROM MPURegionGet is a function pointer located at ROM MPUTABLE 6 Parameters ulRegion is the region number to get pulAddr points to storage for the base address of the region pulFlags points to the attribute flags for the region Description This function retrieves the configuration of a specific region The meanings and format of the parameters is the same as that of the ROM MPURegionSet function This function can be used to save the configuration of a region for later use with the ROM MPURegionSet function The region s enable state will be preserved in the attributes that are saved Returns None ROM MPURegionSet Sets up the access rules for a specific region Prototype void ROM MPURegionSet unsigned long ulRegion unsigned long ulAddr unsigned long ulFlags ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM MPUTABLE is an array of pointers located at ROM APITABLE 20 ROM MPURegionSet is a function pointer located at ROM MPUTABLE 5 Parameters ulRegion is the region number to set up
167. RxEnable unsigned long ulBase ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM_I2STABLE is an array of pointers located at ROM_APITABLE 22 ROM I2STxRxEnable is a function pointer located at ROM_I2STABLE 17 156 January 26 2012 Inter IC Sound 12S Parameters ulBase is the I2S module base address Description This function simultaneously enables the transmit and receive modules for operation providing a synchronized SCLK and LRCLK The module should be enabled after configuration When the module is disabled no data or clocks will be generated on the 12S signals Returns None January 26 2012 157 Inter IC Sound 12S 158 January 26 2012 14 14 1 14 2 Interrupt Controller NVIC Interrupt Controller NVIC at ers rele MER eee ee ee erat mcr er TESTES ret ee eee rere eee ee reer 159 IOBGIIGS cond d dU EEN ce daio ete etiahas E I auth eagles Mes nda nae nes 159 Introduction The interrupt controller API provides a set of functions for dealing with the Nested Vectored Inter rupt Controller NVIC Functions are provided to enable and disable interrupts register interrupt handlers and set the priority of interrupts The NVIC provides global interrupt masking prioritization and handler dispatching This version of the Stellaris family supports thirty two interrupt sources and eight priority levels Individual inter rupt sources can be
168. SB OTG MODE BSIDE DEV indicates that the controller is in device mode on the B side of the cable If and OTG session request is started with no cable in place this is the default mode for the controller USB OTG MODE NONE indicates that the controller is not attempting to determine its role in the system For Dual Mode controllers The function will return on of the following values USB DUAL MODE HOST USB DUAL MODE DEVICE or USB DUAL MODE NONE USB DUAL MODE HOST indicates that the controller is acting as a host USB DUAL MODE DEVICE indicates that the controller acting as a device USB DUAL MODE NONE indicates that the controller is not active as either a host or device January 26 2012 USB Controller Returns Returns USB OTG MODE ASIDE HOST USB OTG MODE ASIDE DEV USB OTG MODE BSIDE HOST USB OTG MODE BSIDE DEV USB OTG MODE NONE USB DUAL MODE HOST USB DUAL MODE DEVICE or USB DUAL MODE NONE 24 3 1 54 ROM USBOTGHostRequest This function will enable host negotiation protocol when in device mode Prototype void ROM USBOTGHostRequest unsigned long ulBase tBoolean bStart ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM USBTABLE is an array of pointers located at ROM APITABLE 16 ROM USBOTGHostRequest is a function pointer located at ROM USBTABLE 45 Parameters ulBase specifies the USB module base address bStart specifies if this call s
169. SW Note If the channel is UDMA CHANNEL SW and interrupts are used then the completion will be signaled on the uDMA dedicated interrupt If a peripheral channel is used then the completion will be signaled on the peripheral s interrupt Returns None 23 2 1 10 ROM uDMAChannelScatterGatherSet Configures a uDMA channel for scatter gather mode January 26 2012 293 uDMA Controller 23 2 1 11 294 Prototype void ROM_uDMAChannelScatterGatherSet unsigned long ulChannelNum unsigned ulTaskCount void pvTaskList unsigned long ullIsPeriphSG ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM UDMATABLE is an array of pointers located at ROM APITABLE 17 ROM uDMAChannelScatterGatherSet is a function pointer located at ROM UDMATABLE 22 Parameters ulChannelNum is the uDMA channel number ulTaskCount is the number of scatter gather tasks to execute pvTaskList is a pointer to the beginning of the scatter gather task list ullsPeriphSG is a flag to indicate it is a peripheral scatter gather transfer else it will be mem ory scatter gather transfer Description This function is used to configure a channel for scatter gather mode The caller must have already set up a task list and pass a pointer to the start of the task list as the pvTaskList parameter The ulTaskCount parameter is the count of tasks in the task list not the size of the task list The fla
170. Set If the receive mode is I28 MODE DUAL STEREO then the returned value contains either the left or right sample The left and right sample alternate with each read from the FIFO left sample first If the receive mode is I26_ MODE COMPACT STEREO 16 or I28 MODE COMPACT STEREO 8 then the returned data contains both the left and right samples If the receive mode is Il28 MODE SINGLE MONO then the returned data contains the single channel sample January 26 2012 Inter IC Sound 12S For the compact modes both the left and right samples are read at the same time If 16 bit compact mode is used then the least significant 16 bits contain the left sample and the most significant 16 bits contain the right sample If 8 bit compact mode is used then the lower 8 bits contain the left sample and the next 8 bits contain the right sample with the upper 16 bits unused If there is no data in the receive FIFO then this function will wait in a polling loop until data is available Returns None 13 2 1 8 ROM l2SRxDataGetNonBlocking Reads data samples from the 12S receive FIFO without blocking Prototype long ROM I2SRxDataGetNonBlocking unsigned long ulBase unsigned long xpulData ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM I2STABLE is an array of pointers located at ROM APITABLE 22 ROM I2SRxDataGetNonBlocking is a function pointer located at ROM I2S8TABLE 12
171. Set GPIO PORTA BASE GPIO PIN 0 GPIO DIR MODE OUT January 26 2012 5 Introduction ee See the Using the ROM chapter of the Stellaris Peripheral Driver Library User s Guide for more details on calling the ROM functions and using driverlib rom h The API provided by the ROM can be utilized by any compiler so long as it complies with the Embedded Applications Binary Interface EABI which includes all recent compilers for the Stellaris microcontroller Documentation Overview The ROM based Stellaris Boot Loader is described in chapter 2 and the ROM based Stellaris Peripheral Driver Library is described in chapters 3 through 25 January 26 2012 2 2 1 2 2 2 2 1 Boot Loader Boot Loader NGOUCHOMN osito Ve erased aadbienagns E RIVERS NIRE ERE ER Lp A erra iid 7 Sis IEBILAGBIS iaia a aa aa Aa Ea r2 Ete THe Ine THEE eco eda hai dedere data Mea bab ee Shaman sab pta dra e rq et a ee a Ue pa NA EM E EU 12 Introduction The ROM based boot loader is executed each time the device is reset when the flash is empty The flash is assumed to be empty if the first two words are all ones since the second word is the reset vector address it must be programmed for an application in flash to execute When run it will allow the flash to be updated using one of the following interfaces m UARTO using a custom serial protocol m SSIO using a custom serial protocol m 2C0 using a custom serial protocol m Ethernet using stand
172. T IN USB EP DEV OUT or USB EP DEV IN January 26 2012 USB Controller Returns None 24 3 1 24 ROM_USBFrameNumberGet Get the current frame number Prototype unsigned long ROM_USBFrameNumberGet unsigned long ulBase ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM USBTABLE is an array of pointers located at ROM_APITABLE 16 ROM USBFrameNumberGet is a function pointer located at ROM USBTABLE m 19 Parameters ulBase specifies the USB module base address Description This function returns the last frame number received Returns The last frame number received 24 3 1 25 ROM USBHostAddrGet Gets the current functional device address for an endpoint Prototype unsigned long ROM USBHostAddrGet unsigned long ulBase unsigned long ulEndpoint unsigned long ulFlags ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM USBTABLE is an array of pointers located at ROM APITABLE 16 ROM USBHostAddrGet is a function pointer located at ROM USBTABLE 20 Parameters ulBase specifies the USB module base address ulEndpoint is the endpoint to access ulFlags determines if this is an IN or an OUT endpoint Description This function returns the current functional address that an endpoint is using to communicate with a device The ulFlags parameter determines if the IN or OUT endpoint
173. T and UDMA ALT SELECT flag along with the channel number and will set the scatter gather mode as appropriate for the primary or alternate control structure The channel must also be enabled using ROM uDMAChannelEnable after calling this func tion The transfer will not begin until the channel has been set up and enabled Note that the channel is automatically disabled after the transfer is completed meaning that ROM uDMAChannelEnable must be called again after setting up the next transfer Note Great care must be taken to not modify a channel control structure that is in use or else the results will be unpredictable including the possibility of undesired data transfers to or from memory or peripherals For BASIC and AUTO modes it is safe to make changes when the channel is disabled or the ROM uDMAChannelModeGet returns UDMA MODE STOP For PINGPONG or one of the SCATTER GATHER modes it is safe to modify the primary or alter nate control structure only when the other is being used The ROM uDMAChannelModeGet function will return UDMA MODE STOP when a channel control structure is inactive and safe to modify Returns None 23 2 1 15 ROM uDMAControlAlternateBaseGet Gets the base address for the channel control table alternate structures Prototype ROM Location void x ROM uDMAControlAlternateBaseGet void ROM APITABLE is an array of pointers located at 0x0100 0010 ROM UDMATABLE is an array of pointers located at ROM
174. TABLE 1 ROM UARTEnableSIR is a function pointer located at ROM UARTTABLE 9 Parameters ulBase is the base address of the UART port bLowPower indicates if SIR Low Power Mode is to be used Description Enables the SIREN control bit for IrDA mode on the UART If the bLowPower flag is set then SIRLP bit will also be set Returns None 22 2 1 16 ROM UARTFIFODisable Disables the transmit and receive FIFOs Prototype void ROM UARTFIFODisable unsigned long ulBase ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM UARTTABLE is an array of pointers located at ROM APITABLE 1 ROM UARTFIFODisable is a function pointer located at ROM UARTTABLE 25 Parameters ulBase is the base address of the UART port Description This functions disables the transmit and receive FIFOs in the UART Returns None 22 2 1 17 ROM UARTFIFOEnable Enables the transmit and receive FIFOs 268 January 26 2012 UART Prototype void ROM_UARTFIFOEnable unsigned long ulBase ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM UARTTABLE is an array of pointers located at ROM APITABLE 1 ROM UARTFIFOEnable is a function pointer located at ROM UARTTABLE 24 Parameters ulBase is the base address of the UART port Description This functions enables the transmit and receive FIFOs in
175. TI for that product or service voids all express and any implied warranties for the associated TI product or service and is an unfair and deceptive business practice TI is not responsible or liable for any such statements TI products are not authorized for use in safety critical applications such as life support where a failure of the TI product would reasonably be expected to cause severe personal injury or death unless officers of the parties have executed an agreement specifically governing such use Buyers represent that they have all necessary expertise in the safety and regulatory ramifications of their applications and acknowledge and agree that they are solely responsible for all legal regulatory and safety related requirements concerning their products and any use of TI products in such safety critical applications notwithstanding any applications related information or support that may be provided by TI Further Buyers must fully indemnify TI and its representatives against any damages arising out of the use of TI products in such safety critical applications TI products are neither designed nor intended for use in military aerospace applications or environments unless the TI products are specifi cally designated by TI as military grade or enhanced plastic Only products designated by TI as military grade meet military specifications Buyers acknowledge and agree that any such use of TI products which TI has not designated as militar
176. TIntEnable unsigned long ulBase unsigned long ulIntFlags ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM UARTTABLE is an array of pointers located at ROM APITABLE 1 ROM UARTIntEnable is a function pointer located at ROM UARTTABLE 17 Parameters ulBase is the base address of the UART port January 26 2012 271 UART ullntFlags is the bit mask of the interrupt sources to be enabled Description Enables the indicated UART interrupt sources Only the sources that are enabled can be reflected to the processor interrupt disabled sources have no effect on the processor The ullntFlags parameter is the logical OR of any of the following m UART INT OE Overrun Error interrupt m UART INT BE Break Error interrupt m UART INT PE Parity Error interrupt m UART INT FE Framing Error interrupt m UART INT RT Receive Timeout interrupt m UART INT TX Transmit interrupt m UART INT RX Receive interrupt m UART INT DSR DSR interrupt m UART INT DCD DCD interrupt m UART INT CTS CTS interrupt m UART INT RI RI interrupt Returns None 22 2 1 23 ROM UARTIntStatus Gets the current interrupt status Prototype unsigned long ROM UARTIntStatus unsigned long ulBase tBoolean bMasked ROM Location E 19 ROM APITABLE is an array of pointers located at 0x0100 0010 ROM UARTTABLE is an array of pointers located at
177. TL PERIPH ETH SYSCTL PERIPH GPIOA SYSCTL PERIPH GPIOB SYSCTL PERIPH GPIOC SYSCTL PERIPH GPIOD SYSCTL PERIPH GPIOE SYSCTL PERIPH GPIOF SYSCTL PERIPH GPIOG SYSCTL PERIPH GPIOH SYSCTL PERIPH GPIOJ SYSCTL_PERIPH_I2Co SYSCTL PERIPH I2C1 SYSCTL PERIPH 12S0 SYSCTL PERIPH PWM SYSCTL PERIPH QEIO SYSCTL PERIPH QEI1 SYSCTL PERIPH SSIO SYSCTL PERIPH SSI1 SYSCTL PERIPH TIMERO SYSCTL PERIPH TIMER1 SYSCTL PERIPH TIMER2 SYSCTL PERIPH TIMERS3 SYSCTL PERIPH UARTO SYSCTL PERIPH UART 1 SYSCTL PERIPH UART2 SYSCTL PERIPH UDMA SYSCTL PERIPH USBO SYSCTL PERIPH WDOGOQ or SYSCTL PERIPH WDOG1 233 System Control Returns None 19 2 1 25 ROM SysCtlPeripheralSleepEnable Enables a peripheral in sleep mode Prototype void ROM SysCtlPeripheralSleepEnable unsigned long ulPeripheral ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM SYSCTLTABLE is an array of pointers located at ROM APITABLE 13 ROM SysCtlPeripheralSleepEnable is a function pointer located at ROM SYSCTLTABLE S8 Parameters ulPeripheral is the peripheral to enable in sleep mode Description This function allows a peripheral to continue operating when the processor goes into sleep mode Since the clocking configuration of the device does not change any peripheral can safely continue operating while the processor is in sleep mode and can therefore wake the proc
178. There is a data packet ready in the OUT endpoint s FIFO m USB DEV IN NOT COMP A larger packet was split up more data to come m USB DEV IN SENT STALL A stall was sent on this IN endpoint m USB DEV IN UNDERRUN Data was requested on the IN endpoint and no data was ready m USB DEV IN FIFO NE The IN endpoint s FIFO is not empty m USB DEV IN PKTPEND The data transfer on this IN endpoint has not completed m USB DEV EPO SETUP END A control transaction ended before Data End condition was sent m USB DEV EPO SENT STALL A stall was sent on endpoint zero m USB DEV EPO IN PKTPEND The data transfer on endpoint zero has not completed m USB DEV EPO OUT PKTRDY There is a data packet ready in endpoint zero s OUT FIFO Returns The current status flags for the endpoint depending on mode 24 3 1 20 ROM USBFIFOAdarGet 322 Returns the absolute FIFO address for a given endpoint Prototype unsigned long ROM USBFIFOAddrGet unsigned long ulBase unsigned long ulEndpoint ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM USBTABLE is an array of pointers located at ROM_APITABLE 16 ROM USBFIFOAddrGet is a function pointer located at ROM USBTABLE 15 Parameters ulBase specifies the USB module base address ulEndpoint specifies which endpoints FIFO address to return Description This function returns the actual physical address of the FIFO This is
179. UART ROM UARTCharPutNonBlocking Sends a character to the specified port Prototype tBoolean ROM UARTCharPutNonBlocking unsigned long ulBase unsigned char ucData ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM UARTTABLE is an array of pointers located at ROM APITABLE 1 ROM UARTCharPutNonBlocking is a function pointer located at ROM UARTTABLE 15 Parameters ulBase is the base address of the UART port ucData is the character to be transmitted Description Writes the character ucData to the transmit FIFO for the specified port This function does not block so if there is no space available then a false is returned and the application must retry the function later Returns Returns true if the character was successfully placed in the transmit FIFO or false if there was no space available in the transmit FIFO ROM UARTCharsAvail Determines if there are any characters in the receive FIFO Prototype tBoolean ROM UARTCharsAvail unsigned long ulBase ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM UARTTABLE is an array of pointers located at ROM APITABLE 1 ROM UARTCharsAvail is a function pointer located at ROM UARTTABLE 11 Parameters ulBase is the base address of the UART port Description This function returns a flag indicating whether or not there is data available in the receive FI
180. USB EP DEV OUT or USB EP DEV IN Returns None 24 3 1 22 ROM USBFIFOConfigSet Sets the FIFO configuration for an endpoint Prototype void ROM USBFIFOConfigSet unsigned long ulBase unsigned long ulEndpoint unsigned long ulFIFOAddress unsigned long ulFIFOSize unsigned long ulFlags ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM USBTABLE is an array of pointers located at ROM APITABLE 16 ROM USBFIFOConfigSet is a function pointer located at ROM USBTABLE 17 January 26 2012 323 USB Controller Parameters ulBase specifies the USB module base address ulEndpoint is the endpoint to access ulFlFOAddress is the starting address for the FIFO ulFIFOSize is the size of the FIFO in bytes ulFlags specifies what information to set in the FIFO configuration Description This function will set the starting FIFO RAM address and size of the FIFO for a given end point Endpoint zero does not have a dynamically configurable FIFO so this function should not be called for endpoint zero The ulFIFOSize parameter should be one of the values in the USB FIFO SZ values If the endpoint is going to use double buffering it should use the values with the _DB at the end of the value For example use USB FIFO SZ 16 DB to con figure an endpoint to have a 16 byte double buffered FIFO If a double buffered FIFO is used then the actual size of the FIFO wil
181. _PERIPH_WDOGO or SYSCTL PERIPH WDOG1 Returns None 19 2 1 24 ROM SysCtlPeripheralSleepDisable Disables a peripheral in sleep mode Prototype void ROM SysCtlPeripheralSleepDisable unsigned long ulPeripheral ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM SYSCTLTABLE is an array of pointers located at ROM APITABLE 13 ROM SysCtlPeripheralSleepDisable is a function pointer located at ROM SYSCTLTABLE 9 Parameters ulPeripheral is the peripheral to disable in sleep mode Description January 26 2012 This function causes a peripheral to stop operating when the processor goes into sleep mode Disabling peripherals while in sleep mode helps to lower the current draw of the device If en abled via ROM SysCtlPeripheralEnable the peripheral will automatically resume operation when the processor leaves sleep mode maintaining its entire state from before sleep mode was entered Sleep mode clocking of peripherals must be enabled via ROM SysCtlPeripheralClockGating if disabled the peripheral sleep mode configuration is maintained but has no effect when sleep mode is entered The ulPeripheral parameter must be only one of the following values SYSCTL PERIPH ADCO SYSCTL PERIPH ADC1 SYSCTL PERIPH CANO SYSCTL PERIPH CANT SYSCTL PERIPH CAN2 SYSCTL PERIPH COMPO SYSCTL PERIPH COMP 1 SYSCTL PERIPH COMP2 SYSCTL PERIPH EPIO SYSC
182. a function pointer located at ROM SSITABLE 1 Parameters ulBase specifies the SSI module base address ulSSICIk is the rate of the clock supplied to the SSI module ulProtocol specifies the data transfer protocol January 26 2012 Synchronous Serial Interface SS ulMode specifies the mode of operation ulBitRate specifies the clock rate ulDataWidth specifies number of bits transferred per frame Description This function configures the synchronous serial interface It sets the SSI protocol mode of operation bit rate and data width The ulProtocol parameter defines the data frame format The ulProtocol parameter can be one of the following values SSI FRF MOTO MODE 0 SSI_FRF_MOTO_MODE_1 SSI FRF MOTO MODE 2 SSI FRF MOTO MODE 3 SSI FRF Tl or SSI FRF NMW The Motorola frame formats imply the following polarity and phase configurations Polarity Phase Mode 0 0 SSI FRF MOTO MODE O0 0 I SSI_FRF_MOTO_MODE_1 1 0 SSI_FRF_MOTO_MODE_2 1 1 SSI_FRF_MOTO_MODE_3 The u Mode parameter defines the operating mode of the SSI module The SSI module can operate as a master or slave if a slave the SSI can be configured to disable output on its serial output line The u Mode parameter can be one of the following values SSL MODE MASTER SSI MODE SLAVE or SSI MODE SLAVE OD The ulBitRate parameter defines the bit rate for the SSI This bit rate must satisfy the following clock r
183. a function pointer located at ROM SYSCTLTABLE 3 Parameters ulPin is the pin in question Description Determines if a particular pin is present in the device The PWM analog comparators ADC and timers have a varying number of pins across members of the Stellaris family this will determine which are present on this device The ulPin argument must be only one of the following values SYSCTL PIN PWMO SYSCTL PIN PWM1 SYSCTL PIN PWM2 SYSCTL PIN PWMS3 SYSCTL PIN PWMd SYSCTL PIN PWM5 SYSCTL PIN MC FAULTO SYSCTL PIN COMINUS SYSCTL PIN COPLUS SYSCTL PIN COO SYSCTL PIN C1MINUS SYSCTL PIN C1PLUS SYSCTL PIN C10 SYSCTL PIN C2MINUS SYSCTL PIN C2PLUS SYSCTL PIN C20 SYSCTL PIN ADCO SYSCTL PIN ADC1 SYSCTL PIN ADC2 SYSCTL PIN ADC3 SYSCTL PIN ADC4 SYSCTL PIN ADC5 SYSCTL PIN ADC6 SYSCTL PIN ADC7 SYSCTL PIN CCPO SYSCTL PIN CCP1 SYSCTL PIN CCP2 SYSCTL PIN CCP3 SYSCTL PIN CCPA4 SYSCTL PIN CCP5 SYSCTL PIN CCP6 SYSCTL PIN CCP7 or SYSCTL PIN 32KHZ Returns Returns true if the specified pin is present and false if it is not 19 2 1 27 ROM_SysCtIPWMClockGet Gets the current PWM clock configuration Prototype unsigned long ROM SysCtlPWMClockGet void ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM SYSCTLTABLE is an array of pointers located at ROM APITABLE 13 ROM SysCtlPWMClockGet is a function pointer located at ROM SYSCTLTABLE 26 Description Thi
184. able unsigned long ulPeripheral tBoolean ROM SysCtlPinPresent unsigned long ulPin unsigned long ROM SysCtlPWMClockGet void void ROM SysCtlPWMClockSet unsigned long ulConfig void ROM SysCtlReset void void ROM SysCtlResetCauseClear unsigned long ulCauses unsigned long ROM SysCtlResetCauseGet void void ROM SysCtlSleep void unsigned long ROM SysCtlSRAMSizeGet void void ROM SysCtlUSBPLLDisable void void ROM SysCtlUSBPLLEnable void January 26 2012 19 2 1 19 2 1 1 19 2 1 2 System Control Function Documentation ROM SysCtlADCSpeedGet Gets the sample rate of the ADC Prototype unsigned long ROM SysCtlADCSpeedGet void ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM SYSCTLTABLE is an array of pointers located at ROM APITABLE 13 ROM SysCtlADCSpeedGet is a function pointer located at ROM SYSCTLTABLE 28 Description This function gets the current sample rate of the ADC Returns Returns the current ADC sample rate will be one of SYSCTL ADCSPEED 1MSPS SYSCTL ADCSPEED 500KSPS SYSCTL ADCSPEED 250KSPS or SYSCTL_ADCSPEED_125KSPS ROM SysCtlADCSpeedSet Sets the sample rate of the ADC Prototype void ROM SysCtlADCSpeedSet unsigned long ulSpeed ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM SYSCTLTABLE is an array of pointers located at ROM APITABLE 13 ROM SysCtlADCSpeedSet is a function pointer loca
185. ags unsigned long ROM SSlIIntStatus unsigned long ulBase tBoolean bMasked January 26 2012 207 Synchronous Serial Interface SSI 18 2 1 18 2 1 1 18 2 1 2 208 m void ROM UpdateSSl void Function Documentation ROM SSIBusy Determines whether the SSI transmitter is busy or not Prototype tBoolean ROM_SSIBusy unsigned long ulBase ROM Location ROM_APITABLE is an array of pointers located at 0x0100 0010 ROM_SSITABLE is an array of pointers located at ROM APITABLE 2 ROM SSIBusy is a function pointer located at ROM SSITABLE 14 Parameters ulBase is the base address of the SSI port Description Allows the caller to determine whether all transmitted bytes have cleared the transmitter hard ware If false is returned then the transmit FIFO is empty and all bits of the last transmitted word have left the hardware shift register Returns Returns true if the SSI is transmitting or false if all transmissions are complete ROM SSIConfigSetExpCIk Configures the synchronous serial interface Prototype void ROM SSIConfigSetExpClk unsigned long ulBase unsigned long ulSSIClk unsigned long ulProtocol unsigned long ulMode unsigned long ulBitRate unsigned long ulDataWidth ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM SSITABLE is an array of pointers located at ROM APITABLE 2 ROM SSIConfigSetExpClk is
186. alled for each new trans fer Once everything is set up then channel is enabled by calling ROM uDMAChannelEnable which must be done before each new transfer The uDMA controller will automatically disable the channel at the completion of a transfer A channel can be manually disabled by using ROM uDMAChannelbDisable January 26 2012 uDMA Controller There are additional functions that can be used to query the status of a channel either from an interrupt handler or in polling fashion The function ROM_uDMAChannelSizeGet is used to find the amount of data remaining to transfer on a channel This will be zero when a transfer is complete The function ROM uDMAChannelModeGet can be used to find the transfer mode of a uDMA channel This is usually used to see if the mode indicates stopped which means that a transfer has completed on a channel that was previously running The function ROM uDMAChannellsEnabled can be used to determine if a particular channel is enabled The uDMA interrupt handler is only for software initiated transfers or errors uDMA interrupts for a peripheral occur on the peripheral s dedicated interrupt channel and should be handled by the peripheral interrupt handler It is not necessary to acknowledge or clear uDMA interrupt sources They are cleared automatically when they are serviced The uDMA interrupt handler should use the function ROM uDMAErrorStatusGet to test if a uDMA error occurred If so the interrupt
187. ally cleared Failure to do so may result in the interrupt handler being immediately reentered because the interrupt controller still sees the interrupt source asserted Returns None 16 2 1 14 ROM PWMdGenlntStatus Gets interrupt status for the specified PWM generator block Prototype unsigned long ROM PWMGenIntStatus unsigned long ulBase 186 January 26 2012 Pulse Width Modulator PWM unsigned long ulGen tBoolean bMasked ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM PWMTABLE is an array of pointers located at ROM_APITABLE 8 ROM PWMGenIntStatus is a function pointer located at ROM PWMTABLE 16 Parameters ulBase is the base address of the PWM module ulGen is the PWM generator to query Must be one of PWM GEN 0 PWM GEN 1 PWM GEN 2 or PWM GEN 3 bMasked specifies whether masked or raw interrupt status is returned Description If bMasked is set as true then the masked interrupt status is returned otherwise the raw interrupt status will be returned Returns Returns the contents of the interrupt status register or the contents of the raw interrupt status register for the specified PWM generator 16 2 1 15 ROM PWMGenlntTrigDisable Disables interrupts for the specified PWM generator block Prototype void ROM PWMGenIntTrigDisable unsigned long ulBase unsigned long ulGen unsigned long ullIntTrig ROM Location ROM APITABLE i
188. ame fields of the structure are populated in the same way as when the ROM CANMessageSet function is used with the following exceptions pMsgObject gt ulFlags MSG_OBJ_NEW_DATA indicates if this is new data since the last time it was read MSG_OBJ_DATA_LOST indicates that at least one message was received on this mes sage object and not read by the host before being overwritten Returns None ROM_CANMessageSet Configures a message object in the CAN controller Prototype void ROM_CANMessageSet unsigned long ulBase unsigned long ulObjID tCANMsgObject pMsgObject tMsgObjType eMsgType January 26 2012 49 Controller Area Network CAN ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM CANTABLE is an array of pointers located at ROM APITABLE 18 ROM CANMessageSet is a function pointer located at ROM CANTABLE 6 Parameters ulBase is the base address of the CAN controller ulObjID is the object number to configure 1 32 pMsgObject is a pointer to a structure containing message object settings eMsgType indicates the type of message for this object Description This function is used to configure any one of the 32 message objects in the CAN controller A message object can be configured as any type of CAN message object as well as several options for automatic transmission and reception This call also allows the message object to be configured t
189. an array of pointers located at 0x0100 0010 ROM QEITABLE is an array of pointers located at ROM_APITABLE 9 ROM QEIIntClear is a function pointer located at ROM OEITABLE 14 Parameters ulBase is the base address of the quadrature encoder module ullntFlags is a bit mask of the interrupt sources to be cleared Can be any of the QEI INTERROR QEI INTDIR QEI INTTIMER or QEI INTINDEX values Description The specified quadrature encoder interrupt sources are cleared so that they no longer assert This must be done in the interrupt handler to keep it from being called again immediately upon exit Note Because there is a write buffer in the Cortex M3 processor it may take several clock cycles before the interrupt source is actually cleared Therefore it is recommended that the interrupt source be cleared early in the interrupt handler as opposed to the very last action to avoid returning from the interrupt handler before the interrupt source is actually cleared Failure to do so may result in the interrupt handler being immediately reentered because the interrupt controller still sees the interrupt source asserted Returns None ROM QbllntDisable Disables individual quadrature encoder interrupt sources Prototype void ROM QEIIntDisable unsigned long ulBase unsigned long ulIntFlags ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM QEITABLE i
190. annel number with UDMA PRI SELECT or UDMA ALT SELECT ulControl is logical OR of several control values to set the control parameters for the channel January 26 2012 285 uDMA Controller 23 2 1 5 286 Description This function is used to set control parameters for a uDMA transfer These are typically param eters that are not changed often The ulChannelStructIndex parameter should be the logical OR of the channel number with one of UDMA PRI SELECT or UDMA ALT SELECT to choose whether the primary or alternate data structure is used The ulControl parameter is the logical OR of five values the data size the source address increment the destination address increment the arbitration size and the use burst flag The choices available for each of these values is described below Choose the data size from one of UDMA SIZE 8 UDMA SIZE 16 or UDMA SIZE 32 to select a data size of 8 16 or 32 bits Choose the source address increment from one of UDMA SRC INC 8 UDMA SRC INC 16 UDMA SRC INC 32 or UDMA SRC INC NONE to select an address increment of 8 bit bytes 16 bit halfwords 32 bit words or to select non incrementing Choose the destination address increment from one of UDMA DST INC 8 UDMA DST INC 16 UDMA DST INC 32 or UDMA DST INC NONE to select an address increment of 8 bit bytes 16 bit halfwords 32 bit words or to select non incrementing The arbitration size determines how many items are transferred before the uDM
191. applications assistance or customer product design Customers are responsible for their products and applications using TI components To minimize the risks associated with customer products and applications customers should provide adequate design and operating safeguards TI does not warrant or represent that any license either express or implied is granted under any TI patent right copyright mask work right or other TI intellectual property right relating to any combination machine or process in which TI products or services are used Information published by TI regarding third party products or services does not constitute a license from TI to use such products or services or a warranty or endorsement thereof Use of such information may require a license from a third party under the patents or other intellectual property of the third party or a license from TI under the patents or other intellectual property of TI Reproduction of TI information in TI data books or data sheets is permissible only if reproduction is without alteration and is accompanied by all associated warranties conditions limitations and notices Reproduction of this information with alteration is an unfair and deceptive business practice TI is not responsible or liable for such altered documentation Information of third parties may be subject to additional restrictions Resale of TI products or services with statements different from or beyond the parameters stated by
192. arameters ulBase specifies the USB module base address Description This function will power off the USB PHY reducing the current consuption of the device While in the powered off state the USB controller will be unable to operate Returns None 24 3 1 56 ROM USBPHYPowerOn Powers on the USB PHY Prototype void ROM USBPHYPowerOn unsigned long ulBase ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM USBTABLE is an array of pointers located at ROM APITABLE 16 ROM USBPHYPoweroOn is a function pointer located at ROM USBTABLE 57 Parameters ulBase specifies the USB module base address Description This function will power on the USB PHY enabling it return to normal operation By default the PHY is powered on so this function only needs to be called if ROM USBPHYPowerOff has previously been called Returns None 344 January 26 2012 25 25 1 25 2 Watchdog Timer Watchdog Timer IPR MEMORIES LT T EORR 345 FONE IONS Condo biu der nA RE x ud IMEEM Renee e ath on eee Mes Oat ee NE Ree 345 Introduction The watchdog timer API provides a set of functions for using the watchdog timer module Functions are provided to deal with the watchdog timer interrupts and to handle status and configuration of the watchdog timer The watchdog timer module s function is to prevent system hangs The watchdog timer module consists of a 32 bit down counte
193. ard network protocols Since the boot loader has no knowledge of the frequency of the attached crystal or in fact if one is even present it operates entirely from the internal oscillator This is a 16 MHz clock with an accuracy of 1 The LM Flash Programmer GUI can be used to download an application via the boot loader over the UART or Ethernet interface on a PC The LM Flash Programmer utility is available for download from www ti com stellaris Serial Interfaces The serial interfaces used to communicate with the boot loader share a common protocol and differ only in the physical connections and signaling used to transfer the bytes of the protocol UART Interface The UART pins UOTx and UORx are used to communicate with the boot loader The device commu nicating with the boot loader is responsible for driving the UORx pin on the Stellaris microcontroller while the Stellaris microcontroller drives the UOTx pin The serial data format is fixed at 8 data bits no parity and one stop bit An auto baud feature is used to determine the baud rate at which data is transmitted Since the system clock must be at least 32 times the baud rate the maximum baud rate that can be used is 500 Kbaud which is 16 MHz divided by 32 When an application calls back to the ROM based boot loader to start an update over the UART port the auto baud feature is bypassed along with UART configuration and pin configuration Therefore the UART must be conf
194. are 90 degrees out of phase the edge relationship is used to determine the direction of rotation In clock direction mode the encoder produces a clock signal to indicate steps and a direction signal to indicate the direction of rotation When in phase mode edges on the first channel or edges on both channels can be counted counting edges on both channels provides higher encoder resolution if required In either mode the input signals can be swapped before being processed this allows wiring mistakes on the circuit board to be corrected without modifying the board The index pulse can be used to reset the position counter this causes the position counter to maintain the absolute encoder position Otherwise the position counter maintains the relative position and is never reset The velocity capture has a timer to measure equal periods of time The number of encoder pulses over each time period is accumulated as a measure of the encoder velocity The running total for the current time period and the final count for the previous time period are available to be read The final count for the previous time period is usually used as the velocity measure The QEI module will generate interrupts when the index pulse is detected when the velocity timer expires when the encoder direction changes and when a phase signal error is detected These interrupt sources can be individually masked so that only the events of interest cause a processor interrupt
195. art parameter set to false Note This function should only be called in host mode Returns None January 26 2012 USB Controller 24 3 1 41 ROM USBHostResume Handles the USB bus resume condition Prototype void ROM USBHostResume unsigned long ulBase tBoolean bStart ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM USBTABLE is an array of pointers located at ROM APITABLE 16 ROM USBHostResume is a function pointer located at ROM USBTABLE 36 Parameters ulBase specifies the USB module base address bStart specifies if the USB controller is entering or leaving the resume signaling state Description When in device mode this function will bring the USB controller out of the suspend state This call should first be made with the bStart parameter set to true to start resume signaling The device application should then delay at least 10ms but not more than 15ms before calling this function with the bStart parameter set to false When in host mode this function will signal devices to leave the suspend state This call should first be made with the bStart parameter set to true to start resume signaling The host application should then delay at least 20ms before calling this function with the bStart parameter set to false This will cause the controller to complete the resume signaling on the USB bus Returns None 24 3 1 42 ROM USBHostSpeedGet Returns t
196. ary 26 2012 109 GPIO 11 2 1 12 ROM_GPIOPinRead Reads the values present of the specified pin s Prototype long ROM_GPIOPinRead unsigned long ulPort unsigned char ucPins ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM_GPIOTABLE is an array of pointers located at ROM_APITABLE 4 ROM_GPIOPinRead is a function pointer located at ROM_GPIOTABLE 11 Parameters ulPort is the base address of the GPIO port ucPins is the bit packed representation of the pin s Description The values at the specified pin s are read as specified by ucPins Values are returned for both input and output pin s and the value for pin s that are not specified by ucPins are set to 0 The pin s are specified using a bit packed byte where each bit that is set identifies the pin to be accessed and where bit 0 of the byte represents GPIO port pin 0 bit 1 represents GPIO port pin 1 and so on Returns Returns a bit packed byte providing the state of the specified pin where bit O of the byte represents GPIO port pin 0 bit 1 represents GPIO port pin 1 and so on Any bit that is not specified by ucPins is returned as a 0 Bits 31 8 should be ignored 11 2 1 13 ROM_GPIOPinTypeADC Configures pin s for use as analog to digital converter inputs Prototype void ROM_GPIOPinTypeADC unsigned long ulPort unsigned char ucPins ROM Location ROM APITABLE is an array of pointers located at
197. ase January 26 2012 153 Inter IC Sound 12S ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM I2STABLE is an array of pointers located at ROM APITABLE 22 ROM I2STxFIFOLevelGet is a function pointer located at ROM I2STABLE co Parameters ulBase is the I2S module base address Description This function is used to get the number of samples in the transmit FIFO For the purposes of measuring the FIFO level a left right sample pair counts as 2 whether the mode is dual or compact stereo When mono mode is used internally the mono sample is still treated as a sample pair so a single mono sample counts as 2 Since the FIFO always deals with sample pairs normally the level will be an even number from 0 to 16 If dual stereo mode is used and only the left sample has been written without the matching right sample then the FIFO level will be an odd value If the FIFO level is odd it indicates a left right sample mismatch Returns Returns the number of samples in the transmit FIFO which will normally be an even number 13 2 1 20 ROM_I2STxFIFOLimitGet Gets the current setting of the FIFO service request level Prototype unsigned long ROM I2STxFIFOLimitGet unsigned long ulBase ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM I2STABLE is an array of pointers located at ROM APITABLE 22 ROM I2STxFIFOLimitGet is a function pointer l
198. ate Returns The processor clock rate ROM SysCtlClockSet Sets the clocking of the device Prototype void ROM SysCtlClockSet unsigned long ulConfig ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM SYSCTLTABLE is an array of pointers located at ROM APITABLE 13 ROM SysCtlClocksSet is a function pointer located at ROM SYSCTLTABLE 23 Parameters ulConfig is the required configuration of the device clocking Description This function configures the clocking of the device The input crystal frequency oscillator to be used use of the PLL and the system clock divider are all configured with this function The ulConfig parameter is the logical OR of several different values many of which are grouped into sets where only one can be chosen The system clock divider is chosen with one of the following values SYSCTL SYSDIV 1 SYSCTL SYSDIV 2 SYSCTL SYSDIV 3 SYSCTL SYSDIV 64 The use of the PLL is chosen with either SYSCTL USE PLL or SYSCTL USE OSC January 26 2012 System Control The external crystal frequency is chosen with one of the following val ues SYSCTL XTAL 1MHZ SYSCTL XTAL 1 84MHZ SYSCTL XTAL 2MHZ SYSCTL XTAL 2 45MHZ SYSCTL XTAL 3 57MHZ SYSCTL XTAL 3 68MHZ SYSCTL XTAL 4MHZ SYSCTL XTAL 4 09MHZ SYSCTL XTAL 4 91MHZ SYSCTL XTAL 5MHZ SYSCTL XTAL 5 12MHZ SYSCTL XTAL 6MHZ SYSCTL XTAL 6 14MHZ SYSCTL XTAL 7 37MHZ SYSCTL XTAL 8MHZ SYSCTL XTAL 8 19MHZ
199. atio criteria m FSSI gt 2 x bit rate master mode m FSSI gt 12 x bit rate slave modes where FSSI is the frequency of the clock supplied to the SSI module The ulData Width parameter defines the width of the data transfers and can be a value between 4 and 16 inclusive The peripheral clock will be the same as the processor clock This will be the value returned by ROM SysCtlClockGet or it can be explicitly hard coded if it is constant and known to save the code execution overhead of a call to ROM SysCtlClockGet Returns None 18 2 1 8 ROM SSIDataGet Gets a data element from the SSI receive FIFO Prototype void ROM SSIDataGet unsigned long ulBase unsigned long pulData ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM SSITABLE is an array of pointers located at ROM APITABLE 2 ROM SSIDataGet is a function pointer located at ROM SSITABLE 9 January 26 2012 209 Synchronous Serial Interface SSI 18 2 1 4 18 2 1 5 210 Parameters ulBase specifies the SSI module base address pulDaita is a pointer to a storage location for data that was received over the SSI interface Description This function gets received data from the receive FIFO of the specified SSI module and places that data into the location specified by the pu Data parameter Note Only the lower N bits of the value written to pulData contain valid data where N is t
200. atus tBoolean bMasked ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM SYSCTLTABLE is an array of pointers located at ROM APITABLE 13 ROM SysCtlIntStatus is a function pointer located at ROM SYSCTLTABLE 16 Parameters bMasked is false if the raw interrupt status is required and true if the masked interrupt status is required Description This returns the interrupt status for the system controller Either the raw interrupt status or the status of interrupts that are allowed to reflect to the processor can be returned Returns The current interrupt status enumerated as a bit field of SYSCTL INT PLL LOCK SYSCTL INT CUR LIMIT SYSCTL INT IOSC FAIL SYSCTL INT MOSC FAIL SYSCTL INT POR SYSCTL INT BOR and SYSCTL INT PLL FAIL 19 2 1 15 ROM SysCtlLDOGet Gets the output voltage of the LDO 226 January 26 2012 System Control Prototype unsigned long ROM SysCtlLDOGet void ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM SYSCTLTABLE is an array of pointers located at ROM APITABLE 13 ROM SysCtlLDOGet is a function pointer located at ROM SYSCTLTABLE 18 Description This function determines the output voltage of the LDO as specified by the control register Returns Returns the current voltage of the LDO will be one of SYSCTL LDO 2 25V SYSCTL LDO 2 30V SYSCTL LDO 2 35V SYSCTL LDO 2 40V SYSCTL LDO 2 45V SYSCTL LD
201. ay of pointers located at ROM_APITABLE 23 ROM EPIConfigSDRAMSet is a function pointer located at ROM EPITABLE Ww 79 External Peripheral Interface EPI 9 2 1 6 80 Parameters ulBase is the EPI module base address ulConfig is the SDRAM interface configuration ulRefresh is the refresh count in core clocks 0 2047 Description This function is used to configure the SDRAM interface when the SDRAM mode is chosen with the function ROM EPIModeSet The parameter ulConfig is the logical OR of several sets of choices The processor core frequency must be specified with one of the following m EPI SDRAM CORE FREQ 90 15 core clock is 0 MHz lt clk lt 15 MHz m EPI SDRAM CORE FREQ 15 30 core clock is 15 MHz lt clk lt 30 MHz m EPI SDRAM CORE FREQ 30 50 core clock is 30 MHz lt clk lt 50 MHz m EPI SDRAM CORE FREQ 50 100 core clock is 50 MHz lt clk lt 100 MHz The low power mode is specified with one of the following m EPI SDRAM LOW POWER enter low power self refresh state m EPI SDRAM FULL POWER normal operating state The SDRAM device size is specified with one of the following m EPI SDRAM SIZE 64MBIT 64 Mbit device 8 MB m EPI SDRAM SIZE 128MBIT 128 Mbit device 16 MB m EPI SDRAM SIZE 256MBIT 256 Mbit device 32 MB m EPI SDRAM SIZE 512MBIT 512 Mbit device 64 MB The parameter u Refresh sets the refresh counter in units of core clock tick
202. base address of the quadrature encoder module Description This will disable operation of the velocity capture in the quadrature encoder module Returns None 17 2 1 14 ROM QkElVelocityEnable Enables the velocity capture Prototype void ROM QEIVelocityEnable unsigned long ulBase ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM QEITABLE is an array of pointers located at ROM_APITABLE 9 ROM QEIVelocityEnable is a function pointer located at ROM OEITABLE ca Parameters ulBase is the base address of the quadrature encoder module Description This will enable operation of the velocity capture in the quadrature encoder module It must be configured before it is enabled Velocity capture will not occur if the quadrature encoder is not enabled See also ROM QEIVelocityConfigure and ROM QEIEnable Returns None 17 2 1 15 ROM QbElVelocityGet Gets the current encoder speed Prototype unsigned long ROM OEIVelocityGet unsigned long ulBase ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM QEITABLE is an array of pointers located at ROM_APITABLE 9 ROM QEIVelocityGet is a function pointer located at ROM OEITABLE 10 Parameters ulBase is the base address of the quadrature encoder module January 26 2012 205 Quadrature Encoder QE
203. been called with flag PWM GEN MODE LATCH FAULT in parameter u Config Note This function is only available on devices supporting extended PWM fault handling Returns None ROM PWMGenFaultConfigure Configures the minimum fault period and fault pin senses for a given PWM generator January 26 2012 Pulse Width Modulator PWM Prototype void ROM_PWMGenFaultConfigure unsigned long ulBase unsigned long ulGen lMinFaultPeriod lFaultSenses unsigned long unsigned long ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM PWMTABLE is an array of pointers located at ROM APITABLE 8 ROM PWMGenFaultConfigure is a function pointer located at ROM_PWMTABLE 24 Parameters ulBase is the base address of the PWM module ulGen is the PWM generator whose fault configuration is being set Must be one of PWM GEN 0 PWM GEN 1 PWM GEN 2 or PWM GEN 3 ulMinFaultPeriod is the minimum fault active period expressed in PWM clock cycles ulFaultSenses indicates which sense of each FAULT input should be considered the as serted state Valid values are logical OR combinations of PWM FAULTn SENSE HIGH and PWM FAULTn SENSE LOW Description This function sets the minimum fault period for a given generator along with the sense of each of the 4 possible fault inputs The minimum fault period is expressed in PWM clock cycles and takes effect only if ROM PWMdGenConfigure
204. bit timing for the bit rate passed in the u BitRate parameter based on the ulSourceClock parameter Since the CAN clock is based off of the system clock the calling function should pass in the source clock rate either by retrieving it from ROM SysCtlClockGet or using a specific value in Hz The CAN bit timing is calculated as suming a minimal amount of propagation delay which will work for most cases where the January 26 2012 41 Controller Area Network CAN 6 2 1 2 6 2 1 3 42 network length is short If tighter timing requirements or longer network lengths are needed then the ROM_CANBitTimingSet function is available for full customization of all of the CAN bit timing values Since not all bit rates can be matched exactly the bit rate is set to the value closest to the desired bit rate without being higher than the u BitRate value Returns This function returns the bit rate that the CAN controller was configured to use or it returns 0 to indicate that the bit rate was not changed because the requested bit rate was not valid ROM_CANBitTimingGet Reads the current settings for the CAN controller bit timing Prototype void ROM_CANBitTimingGet unsigned long ulBase tCANBitClkParms xpClkParms ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM CANTABLE is an array of pointers located at ROM APITABLE 18 ROM CANBitTimingGet is a function pointer located at ROM_CANTABLE 5
205. c Punbelie 2222z2 mmu we RE em 7 GRGA uuum ee Rae ee eA ee 7 1 Introduction f FUNCIONS ce he Bee WM EES 8 Ethernet Controller 8 1 Introduction B PONCIBNS san a bok ee oa E ee eS 9 External Peripheral Interface EPI 9 1 Introduction B2 PFMMCHONS o i ed kde eS ee oe A 10 Plash u mE ME i wow ee 10 1 Introduction 10 2 Funcions o sa scada iaaa mox m moo 803 11 GPIO 2 2299 93 a palaa a 11 1 Introduction 11 2 F ncliBnB 4 2r ook 12 Inter Integrated Circuit 12C 12 1 Introduction 12 2 Funcions o 22x33 9 eee 13 Inter IC Sound I2S 13 1 Introduction 139 2 Functions 2c c EG 14 Interrupt Controller NVIC 14 1 Introduction 142 Funcions 222a e 9 3X 15 Memory Protection Unit MPU January 26 2012 Table of Contents Table of Contents Toc IOHROQUONGE oou RU re A Re aa eek Ghee ee eee GS Hare wed 167 15 2 FPURCHONS s a em acria m Ro ee a a a ew eee 168 16 Pulse Width Modulator PWM 2 02 ee e 175 16 1 Inioducll l s bc ee ee ee ee ee OR ee Rk ee eee dee eee es 175 TES PUNCTIONS e con ue A ee at a OD a te bg ea Sh te a ee 175 17 Quadrature Encoder GE llle 197 17 1 IMIEOOUOUGE 2 oe mom wem nme mnc COS e eee oe Edu Recon meme ubi A A 197 12 2 PUhGcHelS x zzv Se ee e em LL omoes x RUD ED RRR Re edm Gp E E Ro WE Ede de de ewe D eR 197 18 Synchronous Serial Interface SSI es 207 18 1 Introduction lt oo RR Rx ro
206. call can be used if processing is required between reading the data and acknowledging that the data has been read Note This function should only be called in device mode Returns None ROM USBDevEngpointStall Stalls the specified endpoint in device mode Prototype void ROM USBDevEndpointStall unsigned long ulBase unsigned long ulEndpoint unsigned long ulFlags ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM USBTABLE is an array of pointers located at ROM APITABLE 16 ROM USBDevEndpointStallis a function pointer located at ROM USBTABLE J ca Parameters ulBase specifies the USB module base address ulEndpoint specifies the endpoint to stall ulFlags specifies whether to stall the IN or OUT endpoint Description This function will cause to endpoint number passed in to go into a stall condition If the u Flags parameter is USB EP DEV IN then the stall will be issued on the IN portion of this endpoint If January 26 2012 USB Controller the ulFlags parameter is USB EP DEV OUT then the stall will be issued on the OUT portion of this endpoint Note This function should only be called in device mode Returns None 24 3 1 9 ROM USBDevEndpointStatusClear Clears the status bits in this endpoint in device mode Prototype void ROM USBDeviI ROM Location ROM API ROM USB EndpointStatusClear unsigned
207. can be transmitted and received using the ROM EthernetPacketPut and ROM EthernetPacketGet functions Care must be taken when using these functions as they are blocking functions and will not return until data is available for RX or buffer space is available for TX The ROM EthernetSpaceAvail and ROM EthernetPacketAvail functions can be called to determine if there is room for a TX packet or if there is an RX packet available prior to calling these blocking functions Alternatively the ROM EthernetPacketGetNonBlocking and ROM EthernetPacketPutNonBlocking functions will return immediately if a packet cannot be processed Otherwise the packet will be processed nor mally When developing a mapping layer for a TCP IP stack you may wish to use the interrupt capability of the Ethernet controller The ROM EthernetIntEnable and ROM EthernetlIntDisable functions are used to manipulate the individual interrupt sources available in the Ethernet controller for exam January 26 2012 57 Ethernet Controller 8 2 8 2 1 8 2 1 1 58 ple RX Error TX Complete The ROM EthernetIntStatus and ROM EthernetlntClear functions would be used to query the active interrupts to determine which process to service and to clear the indicated interrupts prior to returning from the registered ISR Functions Functions unsigned long ROM EthernetConfigGet unsigned long ulBase void ROM EthernetConfigSet unsigned long ulBase unsigned
208. cated at ROM UARTTABLE Ww Parameters ulBase is the base address of the UART port ulTxLevel is the transmit FIFO interrupt level specified as one of UART FIFO TX1 8 UART FIFO TX2 8 UART FIFO TX4 8 UART_FIFO_TX6_8 or UART FIFO TX7 8 ulRxLevel is the receive FIFO interrupt level specified as one of UART FIFO RX1 8 UART FIFO RX2 8 UART FIFO RX4 8 UART FIFO RX6 8 or UART FIFO RXT7 8 Description This function sets the FIFO level at which transmit and receive interrupts are generated Returns None 22 2 1 20 ROM UARTIntClear Clears UART interrupt sources Prototype void ROM UARTIntClear unsigned long ulBase unsigned long ulIntFlags ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM UARTTABLE is an array of pointers located at ROM APITABLE 1 ROM UARTIntClear is a function pointer located at ROM UARTTABLE 20 Parameters ulBase is the base address of the UART port ullntFlags is a bit mask of the interrupt sources to be cleared Description The specified UART interrupt sources are cleared so that they no longer assert This func tion must be called in the interrupt handler to keep the interrupt from being recognized again immediately upon exit The ullntFlags parameter has the same definition as the ullntFlags parameter to ROM UARTIntEnable Note Because there is a write buffer in the Cortex M3 processor it ma
209. cation ROM APITABLE is an array of pointers located at 0x0100 0010 ROM SSITABLE is an array of pointers located at ROM APITABLE 2 ROM SSIIntEnable is a function pointer located at ROM SSITABLE 4 Parameters ulBase specifies the SSI module base address ullntFlags is a bit mask of the interrupt sources to be enabled Description Enables the indicated SSI interrupt sources Only the sources that are enabled can be reflected to the processor interrupt disabled sources have no effect on the processor The ullntFlags parameter can be any of the SSI TXFF SSI RXFF SSI RXTO or SSI RXOR values Returns None 18 2 1 14 ROM SSIIntStatus Gets the current interrupt status Prototype unsigned long ROM SSIIntStatus unsigned long ulBase tBoolean bMasked ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM SSITABLE is an array of pointers located at ROM APITABLE 2 ROM SSIIntStatus is a function pointer located at ROM SSITABLE 6 Parameters ulBase specifies the SSI module base address bMasked is false if the raw interrupt status is required or true if the masked interrupt status is required January 26 2012 215 Synchronous Serial Interface SSI Description This function returns the interrupt status for the SSI module Either the raw interrupt status or the status of interrupts that are allowed to reflect to the processor ca
210. ce be cleared early in the interrupt handler as opposed to the very last action to avoid returning from the interrupt handler before the interrupt source is actually cleared Failure to do so may result in the interrupt handler being immediately reentered because the interrupt controller still sees the interrupt source asserted Returns None ROM GPlIOPinlIntDisable Disables interrupts for the specified pin s Prototype void ROM GPIOPinIntDisable unsigned long ulPort unsigned char ucPins ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM GPIOTABLE is an array of pointers located at ROM_APITABLE 4 ROM GPIOPinIntDisable is a function pointer located at ROM GPIOTABLE 8 Parameters ulPort is the base address of the GPIO port ucPins is the bit packed representation of the pin s Description Masks the interrupt for the specified pin s The pin s are specified using a bit packed byte where each bit that is set identifies the pin to be accessed and where bit 0 of the byte represents GPIO port pin 0 bit 1 represents GPIO port pin 1 and so on Returns None January 26 2012 GPIO 11 2 1 10 ROM GPlOPinlIntEnable Enables interrupts for the specified pin s Prototype void ROM GPIOPinIntEnable unsigned long ulPort unsigned char ucPins ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM GPIOTABLE is an array of poin
211. ceive FIFO If there are more bytes in the packet than will fit into pucBuf as specified by BufLen the function will return the negated length of the packet and the buffer will contain BufLen bytes of the packet Otherwise the function will return the length of the packet that was read and pucBuf will contain the entire packet excluding the frame check sequence bytes Note This function will return immediately if no packet is available Returns Returns 0 if no packet is available the negated packet length n if the packet is too large for pucBuf and the packet length n otherwise ROM EthernetPacketPut Waits to send a packet from the Ethernet controller Prototype long ROM EthernetPacketPut unsigned long ulBase unsigned char xpucBuf long lBufLen ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM ETHERNETTABLE is an array of pointers located at ROM APITABLE 15 ROM EthernetPacketPut is a function pointer located at ROM ETHERNETTABLE 13 January 26 2012 67 Ethernet Controller Parameters ulBase is the base address of the controller pucBuf is the pointer to the packet buffer IBufLen is number of bytes in the packet to be transmitted Description This function writes BufLen bytes of the packet contained in pucBuf into the transmit FIFO of the controller and then activates the transmitter for this packet This function will wait
212. ces Prototype void ROM_I2SIntDisable unsigned long ulBase unsigned long ulIntFlags ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM I2STABLE is an array of pointers located at ROM_APITABLE 22 ROM I2SIntDisable is a function pointer located at ROM I2STABLE 22 Parameters ulBase is the I2S module base address ullntFlags is a bit mask of the interrupt sources to be disabled Description This function disables the specified I2S sources for interrupt generation The ullntFlags param eter can be the logical OR of any of the following values I28 INT RXERR I28 INT RXREQ Il28 INT TXERR or Il2S8 INT TXREQ January 26 2012 143 Inter IC Sound 12S 13 2 1 3 13 2 1 4 144 Returns Returns None ROM_I2SIntEnable Enables 12S interrupt sources Prototype void ROM_I2SIntEnable unsigned long ulBase unsigned long ullIntFlags ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM I2STABLE is an array of pointers located at ROM_APITABLE 22 ROM I2SIntEnable is a function pointer located at ROM I2STABLE 21 Parameters ulBase is the I2S module base address ullntFlags is a bit mask of the interrupt sources to be enabled Description This function enables the specified 12S sources to generate interrupts The ulIntFlags param eter can be the logical OR of any of the foll
213. cified by BufLen the function will return the negated length of the packet and the buffer will contain BufLen bytes of the packet Otherwise the function will return the length of the packet that was read and pucBuf will contain the entire packet excluding the frame check sequence bytes Note This function is blocking and will not return until a packet arrives Returns Returns the negated packet length n if the packet is too large for pucBuf and returns the packet length n otherwise January 26 2012 8 2 1 14 8 2 1 15 Ethernet Controller ROM_EthernetPacketGetNonBlocking Receives a packet from the Ethernet controller Prototype long ROM_EthernetPacketGetNonBlocking unsigned long ulBase unsigned char xpucBuf long lBufLen ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM ETHERNETTABLE is an array of pointers located at ROM APITABLE 15 ROM EthernetPacketGetNonBlocking is a function pointer located at ROM ETHERNETTABLE 10 Parameters ulBase is the base address of the controller pucBuf is the pointer to the packet buffer IBufLen is the maximum number of bytes to be read into the buffer Description This function reads a packet from the receive FIFO of the controller and places it into pucBuf If no packet is available the function will return immediately Otherwise the function will read the entire packet from the re
214. cks which are read only can be made execute only Blocks which are execute only cannot have their protection modified Attempts to make the block protection less stringent that is read only to read write will result in a failure and be prevented by the hardware Changes to the flash protection are maintained only until the next reset This allows the ap plication to be executed in the desired flash protection environment to check for inappropri ate flash access via the flash interrupt To make the flash protection permanent use the ROM FlashProtectSave function Returns Returns 0 on success or 1 if an invalid address or an invalid protection was specified 10 2 1 10 ROM FlashUsecGet 96 Gets the number of processor clocks per micro second January 26 2012 10 2 1 11 Flash Prototype unsigned long ROM_FlashUsecGet void ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM_FLASHTABLE Is an array of pointers located at ROM_APITABLE 7 ROM FlashUsecGet is a function pointer located at ROM FLASHTABLE 1 Description This function returns the number of clocks per micro second as presently known by the flash controller Returns Returns the number of processor clocks per micro second ROM FlashUsecSet Sets the number of processor clocks per micro second Prototype void ROM FlashUsecSet unsigned long ulClocks ROM Location ROM APITABLE is an array of pointe
215. cted to the processor interrupt disabled sources have no effect on the processor Returns None ROM QblIlntStatus Gets the current interrupt status Prototype unsigned long ROM QEIIntStatus unsigned long ulBase tBoolean bMasked ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM QEITABLE is an array of pointers located at ROM_APITABLE 9 ROM QEIIntStatus is a function pointer located at ROM QOEITABLE 13 Parameters ulBase is the base address of the quadrature encoder module bMasked is false if the raw interrupt status is required and true if the masked interrupt status is required January 26 2012 Quadrature Encoder QE Description This returns the interrupt status for the quadrature encoder module Either the raw interrupt status or the status of interrupts that are allowed to reflect to the processor can be returned Returns Returns the current interrupt status enumerated as a bit field of QEI INTERROR QEI INTDIR QEI INTTIMER and QEI INTINDEX 17 2 1 10 ROM QbkElPositionGet Gets the current encoder position Prototype unsigned long ROM QEIPositionGet unsigned long ulBase ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM QEITABLE is an array of pointers located at ROM_APITABLE 9 ROM QEIPositionGet is a function pointer located at ROM_QEITABLE 0
216. ctual number present depend upon the GPIO port and part number Each pin has the following capabilities m Can be configured as an input or an output On reset they default to being an input m In input mode can generate interrupts on high level low level rising edge falling edge or both edges m In output mode can be configured for 2 mA 4 mA or 8 mA drive strength The 8 mA drive strength configuration has optional slew rate control to limit the rise and fall times of the signal On reset they default to 2 mA drive strength Optional weak pull up or pull down resistors On reset they default to no pull up or pull down resistors m Optional open drain operation On reset they default to standard push pull operation m Can be configured to be a GPIO or a peripheral pin On reset they default to being GPIOs Note that not all pins on all parts have peripheral functions in which case the pin is only useful as a GPIO that is when configured for peripheral function the pin will not do anything useful Most of the GPIO functions can operate on more than one GPIO pin within a single module at a time The ucPins parameter to these functions is used to specify the pins that are affected the GPIO pins whose corresponding bits in this parameter that are set will be affected where pin 0 is in bit O pin 1 in bit 1 and so on For example if ucPins is 0x09 then pins 0 and 3 will be affected by the function This is most useful f
217. d ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM COMPARATORTABLE is an array of pointers located at ROM APITABLE 6 ROM ComparatorIntStatus Is a function pointer located at ROM COMPARATORTABLE Ox Parameters ulBase is the base address of the comparator module ulComp is the index of the comparator bMasked is false if the raw interrupt status is required and true if the masked interrupt status is required Description This returns the interrupt status for the comparator Either the raw or the masked interrupt status can be returned Returns true if the interrupt is asserted and false if it is not asserted 18 January 26 2012 4 2 1 6 ROM Comparat Sets the internal ref Prototype void Analog Comparator orRefSet erence voltage ROM_ComparatorRefSet unsigned long ulBase ROM Location ROM APITABLI unsigned long ulRef E is an array of pointers located at 0x0100 0010 ROM COMPARATORTABLE is an array of pointers located at ROM APITABLE 6 ROM Compara Parameters ulBase is the base address of the comparator module ulRef is the de Description sired reference voltage torRefSet is a function pointer located at ROM COMPARATORTABLE This function sets the internal reference voltage value The voltage is specified as one of the following values COMP REF OFF to turn off the reference voltage COMP REF OV to set th
218. d 12S m 12S CONFIG MODE DUAL for dual channel stereo I28 CONFIG MODE COMPACT 16 for 16 bit compact stereo mode I28 CONFIG MODE COMPACT 8 for 8 bit compact stereo mode or I28 CONFIG MODE MONO for single channel mono format m 12S CONFIG CLK MASTER or I28 CONFIG CLK SLAVE to select whether the I2S transmitter is the clock master or slave m l28 CONFIG SAMPLE SIZE 32 24 20 16 or 8 to select the number of bits per sample m 12S CONFIG WIRE SIZE 32 24 20 16 0r 8to select the number of bits per word that are transferred on the data line m 12S CONFIG EMPTY ZERO or I28 CONFIG EMPTY REPEAT to select whether the module transmits zeroes or repeats the last sample when the FIFO is empty Returns None 13 2 1 23 ROM I2STxRxDisable Disables the 12S transmit and receive modules Prototype void ROM I2STxRxDisable unsigned long ulBase ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM I2STABLE is an array of pointers located at ROM APITABLE 22 ROM I2STxRxDisable is a function pointer located at ROM I2STABLE 18 Parameters ulBase is the I2S module base address Description This function simultaneously disables the transmit and receive modules When the module is disabled no data or clocks will be generated on the I2S signals Returns None 13 2 1 24 ROM I2STxRxEnable Enables the I2S transmit and receive modules for operation Prototype void ROM_I2STx
219. d byte where each bit that is set identifies the pin to be accessed and where bit 0 of the byte represents GPIO port pin 0 bit 1 represents GPIO port pin 1 and so on Note This cannot be used to turn any pin into a UART pin it only configures a UART pin for proper operation Returns January 26 2012 None 119 11 2 1 28 ROM_GPIOPinTypeUSBAnalog Configures pin s for use by the USB peripheral Prototype void ROM_GPIOPinTypeUSBAnalog unsigned long ulPort unsigned char ucPins ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM GPIOTABLE is an array of pointers located at ROM_APITABLE 4 ROM GPIOPinTypeUSBAnalog is a function pointer located at ROM GPIOTABLE 28 Parameters ulPort is the base address of the GPIO port ucPins is the bit packed representation of the pin s Description Some USB analog pins must be properly configured for the USB peripheral to function correctly This function provides the proper configuration for any USB pin s This can also be used to configure the EPEN and PFAULT pins so that they are no longer used by the USB controller The pin s are specified using a bit packed byte where each bit that is set identifies the pin to be accessed and where bit 0 of the byte represents GPIO port pin 0 bit 1 represents GPIO port pin 1 and so on Note This cannot be used to turn any pin into a USB pin it only configures a USB pin f
220. d long ROM I2SRxFIFOLevelGet unsigned long ulBase ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM I2STABLE is an array of pointers located at ROM APITABLE 22 ROM I2SRxFIFOLevelGet is a function pointer located at ROM I2STABLE 16 Parameters ulBase is the I2S module base address Description This function is used to get the number of samples in the receive FIFO For the purposes of measuring the FIFO level a left right sample pair counts as 2 whether the mode is dual or compact stereo When mono mode is used internally the mono sample is still treated as a sample pair so a single mono sample counts as 2 Since the FIFO always deals with sample pairs normally the level will be an even number from 0 to 16 If dual stereo mode is used and only the left sample has been read without reading the matching right sample then the FIFO level will be an odd value If the FIFO level is odd it indicates a left right sample mismatch Returns Returns the number of samples in the transmit FIFO which will normally be an even number 13 2 1 12 ROM I2SRxFIFOLimitGet Gets the current setting of the FIFO service request level Prototype unsigned long ROM I2SRxFIFOLimitGet unsigned long ulBase ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM I2STABLE is an array of pointers located at ROM_APITABLE 22 ROM I2SRxFIFOLimitGet is a funct
221. d of the peripheral associated with that channel The ulChannelNum parameter must be only one of the following values UDMA CHANNEL ADCO UDMA CHANNEL ADC1 m UDMA CHANNEL ADC2 m UDMA CHANNEL ADC3 m UDMA SEC CHANNEL ADC10 m UDMA SEC CHANNEL ADC11 m UDMA SEC CHANNEL ADC12 m UDMA SEC CHANNEL ADC13 m UDMA SEC CHANNEL EPIORX UDMA SEC CHANNEL EPIOTX UDMA CHANNEL ETHORX m UDMA CHANNEL ETHOTX m UDMA CHANNEL I2S0RX m UDMA CHANNEL I2S0TX UDMA CHANNEL SSIORX m UDMA CHANNEL SSIOTX m UDMA CHANNEL SSHRX UDMA CHANNEL SSHTX m UDMA SEC CHANNEL SSHRX UDMA SEC CHANNEL SSHTX January 26 2012 uDMA Controller UDMA_CHANNEL_TMROA m UDMA_CHANNEL_TMROB m UDMA CHANNEL TMR1A m UDMA CHANNEL TMR1B m UDMA SEC CHANNEL TMR1A m UDMA SEC CHANNEL TMR1B m UDMA SEC CHANNEL TMR2A 4 m UDMA SEC CHANNEL TMR2B 5 UDMA SEC CHANNEL TMR2A 6 UDMA SEC CHANNEL TMR2B 7 m UDMA SEC CHANNEL TMR2A 14 m UDMA SEC CHANNEL TMR2B 15 m UDMA SEC CHANNEL TMR3A m UDMA SEC CHANNEL TMR3B UDMA CHANNEL UARTORX UDMA CHANNEL UARTOTX UDMA CHANNEL UART1RX UDMA CHANNEL UART1TX UDMA SEC CHANNEL UART1RX m UDMA SEC CHANNEL UART1TX m UDMA SEC CHANNEL UART2RX 0 m UDMA SEC CHANNEL UART 2TX 1 m UDMA SEC CHANNEL UART2RX 12 m UDMA SEC CHANNEL UART2TX 13 m UDMA CHANNEL USBEP1RX UDMA CHANNEL USBEP1TX UDMA CHANNEL USBEP2RX m UDMA CHANNEL USBEP2TX m UDMA CHANNEL USBEP3RX m UDMA CHANNEL USBEPS3TX zm UDMA CHANNEL SW UDMA SEC CHANNEL
222. de execution overhead of a call to ROM SysCtlClockGet Returns None ROM UARTOConfigSetExpCIk Sets the configuration of a UART Prototype void ROM UARTConfigSetExpClk unsigned long ulBase unsigned long ulUARTClk unsigned long ulBaud unsigned long ulConfig ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM UARTTABLE is an array of pointers located at ROM APITABLE 1 ROM UARTConfigSetExpClk is a function pointer located at ROM UARTTABLE O1 Parameters ulBase is the base address of the UART port January 26 2012 UART ulUARTCIk is the rate of the clock supplied to the UART module ulBaud is the desired baud rate ulConfig is the data format for the port number of data bits number of stop bits and parity Description This function configures the UART for operation in the specified data format The baud rate is provided in the u Baud parameter and the data format in the u Config parameter The ulConfig parameter is the logical OR of three values the number of data bits the number of stop bits and the parity UART CONFIG WLEN 8 UART CONFIG WLEN 7 UART CONFIG WLEN 6 and UART CONFIG WLEN 5 select from eight to five data bits per byte respectively UART CONFIG STOP ONE and UART CONFIG STOP TWO select one or two stop bits respectively UART_CONFIG_PAR_NONE UART CONFIG PAR EVEN UART CONFIG PAR ODD UART_CONFIG_PAR_ONE and UART
223. e Disables the 12C Slave interrupt Prototype void ROM I2CSlaveIntDisable unsigned long ulBase ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM I2CTABLE is an array of pointers located at ROM_APITABLE 3 ROM I2CSlaveIntDisable is a function pointer located at ROM I2CTABLE 10 Parameters ulBase is the base address of the I2C Slave module Description Disables the 12C Slave interrupt source Returns None 12 2 1 23 ROM_l2CSlavelntDisableEx Disables individual I2C Slave interrupt sources Prototype void ROM_I2CSlaveIntDisableEx unsigned long ulBase unsigned long ulIntFlags ROM Location ROM_APITABLE is an array of pointers located at 0x0100 0010 ROM I2CTABLE is an array of pointers located at ROM_APITABLE 3 ROM I2CSlaveIntDisableEx is a function pointer located at ROM_I2CTABLE 26 Parameters ulBase is the base address of the I2C Slave module ullntFlags is the bit mask of the interrupt sources to be disabled Description Disables the indicated I2C Slave interrupt sources Only the sources that are enabled can be reflected to the processor interrupt disabled sources have no effect on the processor The ullntFlags parameter has the same definition as the ullntFlags parameter to ROM_Il2CSlavelntEnableEx January 26 2012 Returns None Inter Integrated Circuit I2C 12 2 1 24 ROM_l2CS
224. e unsigned long ulBase ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM WATCHDOGTABLE is an array of pointers located at ROM APITABLE 12 ROM WatchdogResetDisable is a function pointer located at ROM WATCHDOGTABLE A E Parameters ulBase is the base address of the watchdog timer module Description Disables the capability of the watchdog timer to issue a reset to the processor upon a second timeout condition Note This function will have no effect if the watchdog timer has been locked See also ROM_WatchdogLock ROM_WatchdogUnlock Returns None 25 2 1 10 ROM_WatchdogResetEnable 350 Enables the watchdog timer reset Prototype void ROM_WatchdogResetEnable unsigned long ulBase January 26 2012 25 2 1 11 Watchdog Timer ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM WATCHDOGTABLE is an array of pointers located at ROM APITABLE 12 ROM WatchdogResetEnable is a function pointer located at ROM WATCHDOGTABLE 3 Parameters ulBase is the base address of the watchdog timer module Description Enables the capability of the watchdog timer to issue a reset to the processor upon a second timeout condition Note This function will have no effect if the watchdog timer has been locked See also ROM WatchdogLock ROM WatchdogUnlock Returns None ROM WeatchdogRunning Determines if the
225. e 12S receive module for operation Prototype void ROM I2SRxDisable unsigned long ulBase ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM I2STABLE is an array of pointers located at ROM APITABLE 22 ROM I2SRxDisable is a function pointer located at ROM I2STABLE 10 Parameters ulBase is the I2S module base address Description This function disables the receive module for operation The module should be disabled before configuration When the module is disabled no data will be clocked in regardless of the signals on the 12S interface Returns None 13 2 1 10 ROM lI2SRxEnable Enables the I2S receive module for operation Prototype void ROM_I2SRxEnable unsigned long ulBase ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM I2STABLE is an array of pointers located at ROM APITABLE 22 ROM I2SRxEnable is a function pointer located at ROM I2STABLE 9 Parameters ulBase is the I2S module base address Description This function enables the receive module for operation The module should be enabled after configuration When the module is disabled no data will be clocked in regardless of the signals on the 12S interface Returns None 13 2 1 11 ROM I2SRxFIFOLevelGet Gets the number of samples in the receive FIFO 148 January 26 2012 Inter IC Sound 12S Prototype unsigne
226. e I2S peripheral automatically handles left and right channels in audio data The 12S peripheral contains two modules one for transmit and one for receive These two modules can be independently configured for clock time base and data format Some features of the I2S peripheral are m independently configurable transmit and receive modules 8 sample pair FIFOs adjustable FIFO service request levels interrupt on FIFO service request or error DMA interface m adjustable time base for clocking clock slave or master left justified right justified and 12S format modes adjustable sample data size m adjustable wire word size m single or dual channel stereo mono The I2S peripheral contains a transmit and receive module which are generally the same in terms of configuration Use ROM I2SRxConfigSet or ROM I2STxConfigSet to configure the receive or transmit module format and mode Once configured the transmit or receive module must be enabled using ROM I2STxEnable or ROM I2SRxEnable The module can be later disabled with ROM I2STxDisable or ROM_I2SRxDisable If you want to use interrupts or DMA to service the 12S FIFO then the FIFO trigger level must be set using ROM I2SRxFIFOLimitSet or ROM I2STxFIFOLimitSet Use the function ROM l2STxDataPut to write data to the I2S transmit FIFO This func tion will block until there is space in the FIFO To avoid blocking use the function ROM I2STxDataPutNonBlocking instead
227. e PHY register Prototype void ROM EthernetPHYWrite unsigned long ulBase unsigned char ucRegAddr unsigned long ulData ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM ETHERNETTABLE is an array of pointers located at ROM APITABLE 15 ROM EthernetPHYWrite is a function pointer located at ROM ETHERNETTABLE 17 Parameters ulBase is the base address of the controller ucRegAddr is the address of the PHY register to be accessed ulData is the data to be written to the PHY register Description This function will write the u Data to the PHY register specified by ucRegAdar Returns None January 26 2012 8 2 1 21 8 2 1 22 Ethernet Controller ROM_EthernetSpaceAvail Checks for packet space available in the Ethernet controller Prototype tBoolean ROM_EthernetSpaceAvail unsigned long ulBase ROM Location ROM_APITABLE is an array of pointers located at 0x0100 0010 ROM_ETHERNETTABLE is an array of pointers located at ROM APITABLE 15 ROM EthernetSpaceAvail is a function pointer located at ROM ETHERNETTABLE 9 Parameters ulBase is the base address of the controller Description The Ethernet controller s transmit FIFO is designed to support a single packet at a time After the packet has been written into the FIFO the transmit request bit must be set to enable t
228. e actions the application must first set up one of the 32 message objects using ROM CANMessageSet This function must be used to configure a message object to send data or to configure a message object to receive data Each message object can be configured to generate interrupts on transmission or reception of CAN messages When data is received from the CAN bus the application can use the ROM CANMessageGet function to read the received message This function can also be used to read a message object that is already configured in order to populate a message structure prior to making changes to the January 26 2012 39 Controller Area Network CAN 6 2 40 configuration of a message object Reading the message object using this function will also clear any pending interrupt on the message object Once a message object has been configured using ROM_CANMessageSei it has allocated the message object and will continue to perform its programmed function unless it is released with a call to ROM_CANMessageClear The application is not required to clear out a message object before setting it with a new configuration because each time ROM_CANMessageSet is called it will overwrite any previously programmed configuration The 32 message objects are identical except for priority The lowest numbered message objects have the highest priority Priority affects operation in two ways First if multiple actions are ready at the same time the
229. e address of 0x42 When an application calls back to the ROM based boot loader to start an update over the I2C port the I2C configuration and pin configuration is bypassed Therefore the I2C port must be configured the I2C slave address set and the I2C pins switched to their hardware function before calling the boot loader Additionally the I2C master must be enabled since it is used to detect start and stop conditions on the I2C bus Serial Protocol The boot loader uses well defined packets on the serial interfaces to ensure reliable communica tions with the update program The packets are always acknowledged or not acknowledged by the communicating devices The packets use the same format for receiving and sending packets This includes the method used to acknowledge successful or unsuccessful reception of a packet While the actual signaling on the serial ports is different the packet format remains independent of the method of transporting the data The following steps must be performed to successfully send a packet 1 Send the size of the packet that will be sent to the device The size is always the number of bytes of data 2 bytes 2 Send the checksum of the data buffer to help ensure proper transmission of the command The checksum is simply a sum of the data bytes 3 Send the actual data bytes 4 Wait for a single byte acknowledgment from the device that it either properly received the data or that it detected an error
230. e buffer in the Cortex M3 processor it may take several clock cycles before the interrupt source is actually cleared Therefore it is recommended that the interrupt source be cleared early in the interrupt handler as opposed to the very last action to avoid returning from the interrupt handler before the interrupt source is actually cleared Failure to do so may result in the interrupt handler being immediately reentered because the interrupt controller still sees the interrupt source asserted Returns None 18 2 1 12 ROM SSIIntDisable Disables individual SSI interrupt sources Prototype void ROM SSIIntDisable unsigned long ulBase unsigned long ulIntFlags ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM SSITABLE is an array of pointers located at ROM APITABLE 2 ROM SSIIntDisable is a function pointer located at ROM SSITABLE O1 Parameters ulBase specifies the SSI module base address ullntFlags is a bit mask of the interrupt sources to be disabled 214 January 26 2012 Synchronous Serial Interface SS Description Disables the indicated SSI interrupt sources The ullntFlags parameter can be any of the SSI TXFF SSI RXFF SSI RXTO or SSI RXOR values Returns None 18 2 1 13 ROM SSIIntEnable Enables individual SSI interrupt sources Prototype void ROM SSIIntEnable unsigned long ulBase unsigned long ulIntFlags ROM Lo
231. e bytes of data Also for OUT endpoints the USB EP AUTO CLEAR bit can be used to clear the data packet ready flag automatically once the data has been read from the FIFO If this is not used this flag must be manually cleared via a call to ROM USBDevEndpointStatusClear Both of these settings can be used to remove the need for extra calls when using the controller in DMA mode Note This function should only be called in device mode Returns None 24 3 1 7 ROM USBDevEnapointDataAck Acknowledge that data was read from the given endpoint s FIFO in device mode January 26 2012 313 USB Controller 24 3 1 8 314 Prototype void ROM_USBDevEndpointDataAck unsigned long ulBase unsigned long ulE Endpoint tBoolean bIsLastPacket ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM USBTABLE is an array of pointers located at ROM APITABLE 16 ROM USBDevEndpointDataAck is a function pointer located at ROM USBTABLE o Parameters ulBase specifies the USB module base address ulEndpoint is the endpoint to access blsLastPacket indicates if this is the last packet Description This function acknowledges that the data was read from the endpoints FIFO The b sLast Packet parameter is set to a true value if this is the last in a series of data packets on endpoint zero The blsLastPacket parameter is not used for endpoints other than endpoint zero This
232. e controller status registers Prototype unsigned long ROM_CANStatusGet unsigned long ulBase tCANStsReg eStatusReg ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM CANTABLE is an array of pointers located at ROM APITABLE 18 ROM CANStatusGet is a function pointer located at ROM CANTABLE 8 Parameters ulBase is the base address of the CAN controller eStatusHeg is the status register to read Description Reads a status register of the CAN controller and returns it to the caller The different status registers are m CAN STS CONTROL the main controller status m CAN STS TXREQUEST bit mask of objects pending transmission m CAN STS NEWDAT bit mask of objects with new data m CAN STS MSGVAL bit mask of objects with valid configuration When reading the main controller status register a pending status interrupt will be cleared This should be used in the interrupt handler for the CAN controller if the cause is a status interrupt The controller status register fields are as follows m CAN STATUS BUS OFF controller is in bus off condition m CAN STATUS EWARN an error counter has reached a limit of at least 96 m CAN STATUS EPASS CAN controller is in the error passive state m CAN STATUS RXOK a message was received successfully independent of any mes sage filtering 52 January 26 2012 Controller Area Network CAN CAN_STATUS_TXOK a message was
233. e for each region to be configured A region that is defined by ROM MPURegionSet can be initially enabled or disabled If the region is not initially enabled it can be enabled later by calling ROM MPURegionEnable An enabled region can be disabled by calling ROM MPURegionDisable When a region is disabled its con figuration is preserved as long as it is not overwritten In this case it can be enabled again with ROM MPURegionEnable without the need to reconfigure the region Care must be taken when setting up a protection region using ROM MPURegionSet The function will write to multiple registers and is not protected from interrupts Therefore it is possible that an interrupt which accesses a region may occur while that region is in the process of being changed The safest way to protect against this is to make sure that a region is always disabled before making any changes Otherwise it is up to the caller to ensure that ROM MPURegionSet is always called from within code that cannot be interrupted or from code that will not be affected if an interrupt occurs while the region attributes are being changed The attributes of a region that has already been programmed can be retrieved and saved using the ROM MPURegionGet function This function is intended to save the attributes in a format that can be used later to reload the region using the ROM MPURegionSet function Note that the enable state of the region is saved with the attribut
234. e reference voltage to 0 V m COMP REF 0 1375V to set the reference voltage to 0 1375 V COMP REF 0 275V to set the reference voltage to 0 275 V m COMP REF 0 4125V to set the reference voltage to 0 4125 V m COMP REF 0 55V to set the reference voltage to 0 55 V m COMP REF 0 6875V to set the reference voltage to 0 6875 V m COMP REF 0 825V to set the reference voltage to 0 825 V m COMP REF 0 928125V to set the reference voltage to 0 928125 V m COMP REF 0 9625V to set the reference voltage to 0 9625 V m COMP REF 1 03125V to set the reference voltage to 1 03125 V m COMP REF 1 134375V to set the reference voltage to 1 134375 V COMP REF 1 1V to set the reference voltage to 1 1 V m COMP REF 1 2375V to set the reference voltage to 1 2375 V m COMP REF 1 340625V to set the reference voltage to 1 340625 V m COMP REF 1 375V to set the reference voltage to 1 375 V m COMP REF 1 44375V to set the reference voltage to 1 44375 V m COMP REF 1 5125V to set the reference voltage to 1 5125 V m COMP REF 1 546875V to set the reference voltage to 1 546875 V COMP REF 1 65V to set the reference voltage to 1 65 V m COMP REF 1 753125V to set the reference voltage to 1 753125 V m COMP REF 1 7875V to set the reference voltage to 1 7875 V m COMP REF 1 85625V to set the reference voltage to 1 85625 V m COMP REF 1 925V to set the reference voltage to 1 925 V m COMP REF 1 959375V to set the reference voltage to 1 959375 V m COMP REF 2 0625V to set the reference vol
235. e to higher priority interrupts or the interrupt no having been enabled yet to be discarded Returns None ROM IntPendSet Pends an interrupt Prototype void ROM IntPendSet unsigned long ulInterrupt ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM INTERRUPTTABLE is an array of pointers located at ROM APITABLE 14 ROM IntPendsSet is a function pointer located at ROM INTERRUPTTABLE co Parameters ullnterrupt specifies the interrupt to be pended Description The specified interrupt is pended in the interrupt controller This will cause the interrupt con troller to execute the corresponding interrupt handler at the next available time based on the current interrupt state priorities For example if called by a higher priority interrupt handler the specified interrupt handler will not be called until after the current interrupt handler has completed execution The interrupt must have been enabled for it to be called Returns None ROM IntPriorityGet Gets the priority of an interrupt January 26 2012 14 2 1 8 14 2 1 9 Interrupt Controller NVIC Prototype long ROM IntPriorityGet unsigned long ulInterrupt ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM INTERRUPTTABLE is an array of pointers located at ROM APITABLE 14 ROM IntPriorityGet is a function pointer located at ROM INTERRUPTTABLE
236. ead the captured data register a sample sequence interrupt handler and handle interrupt masking clearing The ADC supports sixteen input channels plus an internal temperature sensor Four sampling sequences each with configurable trigger events can be captured The first sequence will capture up to eight samples the second and third sequences will capture up to four samples and the fourth sequence will capture a single sample Each sample can be the same channel different channels or any combination in any order The sample sequences have configurable priorities that determine the order in which they are cap tured when multiple triggers occur simultaneously The highest priority sequence that is currently triggered will be sampled Care must be taken with triggers that occur frequently such as the always trigger if their priority is too high it is possible to starve the lower priority sequences Hardware oversampling of the ADC data is available for improved accuracy An oversampling fac tor of 2x 4x 8x 16x 32x and 64x is supported but reduces the throughput of the ADC by a corresponding factor Hardware oversampling is applied uniformly across all sample sequences Functions Functions m void ROM ADCComparatorConfigure unsigned long ulBase unsigned long ulComp un signed long ulConfig void ROM ADCComparatorlntClear unsigned long ulBase unsigned long ulStatus void ROM ADCComparatorlntDisable unsigned long ulBase un
237. eady disabled when the function was called or false if they were initially enabled ROM IntMasterEnable Enables the processor interrupt Prototype tBoolean ROM_IntMasterEnable void ROM Location ROM_APITABLE is an array of pointers located at 0x0100 0010 ROM INTERRUPTTABLE is an array of pointers located at ROM_APITABLE 14 ROM IntMasterEnable is a function pointer located at ROM INTERRUPTTABLE 1 Description Allows the processor to respond to interrupts This does not affect the set of interrupts enabled in the interrupt controller it just gates the single interrupt from the controller to the processor Returns Returns true if interrupts were disabled when the function was called or false if they were initially enabled ROM JIntPendClear Unpends an interrupt January 26 2012 161 Interrupt Controller NVIC 14 2 1 6 14 2 1 7 162 Prototype void ROM_IntPendClear unsigned long ulInterrupt ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM INTERRUPTTABLE is an array of pointers located at ROM APITABLE 14 ROM IntPendClear is a function pointer located at ROM INTERRUPTTABLE 9 Parameters ullnterrupt specifies the interrupt to be unpended Description The specified interrupt is unpended in the interrupt controller This will cause any previously generated interrupts that have not been handled yet du
238. eared early in the interrupt handler as opposed to the very last action to avoid returning from the interrupt handler before the interrupt source is actually cleared Failure to do so may result in the interrupt handler being immediately reentered because the interrupt controller still sees the interrupt source asserted Returns None ROM PWMGenConfigure Configures a PWM generator Prototype void ROM PWMGenConfigure unsigned long ulBase unsigned long ulGen unsigned long ulConfig ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM PWMTABLE is an array of pointers located at ROM APITABLE 8 ROM PWMGenConfigure is a function pointer located at ROM PWMTABLE Ha i Parameters ulBase is the base address of the PWM module ulGen is the PWM generator to configure Must be one of PWM GEN 0 PWM GEN 1 PWM GEN 2 or PWM GEN 3 ulConfig is the configuration for the PWM generator 179 Pulse Width Modulator PWM 180 Description This function is used to set the mode of operation for a PWM generator The counting mode synchronization mode and debug behavior are all configured After configuration the genera tor is left in the disabled state A PWM generator can count in two different modes count down mode or count up down mode In count down mode it will count from a value down to zero and then reset to the preset value This will pr
239. ed read only for both privileged and user one sub region disabled and initially enabled the ulFlags parameter would have the following value MPU RG SIZE 32K MPU_RGN_PERM_EXEC MPU_RGN_PERM_PRV_RO_USR_RO MPU SUB RGN DISABLE 2 MPU_RGN_ENABLE Note This function will write to multiple registers and is not protected from interrupts It is possible that an interrupt which accesses a region may occur while that region is in the process of being changed The safest way to handle this is to disable a region before changing it Refer to the discussion of this in the API Detailed Description section Returns January 26 2012 None 173 Memory Protection Unit MPU 174 January 26 2012 Pulse Width Modulator PWM 16 Pulse Width Modulator PWM DEED SEDIT ss xatd EID DA a dabis ubtebaddodbudi aa a b nies adelante baa aa akon ae aaa 175 PUMA EE rores nO Erbe ne su ce pete UEM MU LEAL LL RAM EE D Ib c m MEC MS EMI UE 175 16 1 Introduction The PWM module provides up to four instances of a PWM generator block and an output control block Each generator block has two PWM output signals which can be operated independently or as a pair of signals with dead band delays inserted Each generator block also has an interrupt output and a trigger output The control block determines the polarity of the PWM signals and which signals are passed through to the pins Some of the features of the PWM
240. ed long ROM WatchdogValueGet unsigned long ulBase ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM WATCHDOGTABLE is an array of pointers located at ROM APITABLE 12 ROM WatchdogValueGet is a function pointer located at ROM WATCHDOGTABLE r 10 Parameters ulBase is the base address of the watchdog timer module Description This function reads the current value of the watchdog timer Returns Returns the current value of the watchdog timer January 26 2012 353 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries Tl reserve the right to make corrections modifications enhancements improvements and other changes to its products and services at any time and to discontinue any product or service without notice Customers should obtain the latest relevant information before placing orders and should verify that such information is current and complete All products are sold subject to Tl s terms and conditions of sale supplied at the time of order acknowledgment TI warrants performance of its hardware products to the specifications applicable at the time of sale in accordance with Tl s standard warranty Testing and other quality control techniques are used to the extent TI deems necessary to support this warranty Except where mandated by government requirements testing of all parameters of each product is not necessarily performed Tl assumes no liability for
241. eedGet unsigned long ulBase void ROM USBHostSuspend unsigned long ulBase void ROM USBlintDisable unsigned long ulBase unsigned long ulFlags void ROM USBlntDisableControl unsigned long ulBase unsigned long ulFlags void ROM_USBIntDisableEndpoint unsigned long ulBase unsigned long ulFlags void ROM USBintEnable unsigned long ulBase unsigned long ulFlags void ROM_USBIntEnableControl unsigned long ulBase unsigned long ulFlags void ROM_USBIntEnableEndpoint unsigned long ulBase unsigned long ulFlags unsigned long ROM USBintStatus unsigned long ulBase unsigned long ROM USBiIntStatusControl unsigned long ulBase unsigned long ROM USBiIntStatusEndpoint unsigned long ulBase unsigned long ROM USBModeGet unsigned long ulBase void ROM USBOTGHostRequest unsigned long ulBase tBoolean bStart void ROM USBPHYPowerOff unsigned long ulBase void ROM USBPHYPowerOn unsigned long ulBase 309 USB Controller 24 3 1 24 3 1 1 24 3 1 2 310 Function Documentation ROM USBDevAdarGet Returns the current device address in device mode Prototype unsigned long ROM USBDevAddrGet unsigned long ulBase ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM USBTABLE is an array of pointers located at ROM APITABLE 16 ROM USBDevAddrGet is a function pointer located at ROM USBTABLE 1 Parameters ulBase specifies the USB module base address Description T
242. el a left right sample pair counts as 2 whether the mode is dual or compact stereo When mono mode is used internally the mono sample is still treated as a sample pair so a single mono sample counts as 2 Since the FIFO always deals with sample pairs the level must be an even number from 0 to 16 The minimum value is 0 which will cause a service request when there is any data available in the FIFO The maximum value is 16 which disables the service request because there cannot be more than 16 items in the FIFO Returns None 13 2 1 14 ROM I2STxConfigSet Configures the I2S transmit module Prototype void ROM I2STxConfigSet unsigned long ulBase unsigned long ulConfig ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM I2STABLE is an array of pointers located at ROM APITABLE 22 ROM I2STxConfigSet is a function pointer located at ROM I2STABLE 5 Parameters ulBase is the I2S module base address ulConfig is the logical OR of the configuration options Description This function is used to configure the options for the 12S transmit channel The parameter ulConfig is the logical OR of the following options 150 January 26 2012 Inter IC Sound 12S I28 CONFIG_FORMAT_12S for standard I2S format I28 CONFIG FORMAT LEFT JUST for left justified format or I28 CONFIG FORMAT RIGHT JUST for right justified format I28 CONFIG SCLK INVERT to invert the polarity
243. en a trigger and the start of a sequence Prototype unsigned long ROM ADCPhaseDelayGet unsigned long ulBase ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM ADCTABLE is an array of pointers located at ROM APITABLE 5 ROM ADCPhaseDelayGet is a function pointer located at ROM ADCTABLE 25 Parameters ulBase is the base address of the ADC module Description This function gets the current phase delay between the detection of an ADC trigger event and the start of the sample sequence Returns Returns the phase delay specified as one of ADC PHASE 0 ADC PHASE 22 5 ADC PHASE 45 ADC PHASE 67 5 ADC PHASE 90 ADC PHASE 112 5 ADC PHASE 135 ADC PHASE 157 5 ADC PHASE 180 ADC PHASE 202 5 ADC PHASE 225 ADC PHASE 247 5 ADC PHASE 270 ADC PHASE 292 5 ADC PHASE 315 or ADC PHASE 337 5 ROM ADCPhaseDelaySet Sets the phase delay between a trigger and the start of a sequence Prototype void ROM ADCPhaseDelaySet unsigned long ulBase unsigned long ulPhase ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM ADCTABLE is an array of pointers located at ROM APITABLE 5 ROM ADCPhaseDelaySet is a function pointer located at ROM_ADCTABLE 24 Parameters ulBase is the base address of the ADC module ulPhase is the phase delay specified as one of ADC PHASE 0 ADC PHASE 22 5 ADC PHASE 45 ADC PHASE 67 5
244. en the temperature sensor is being sampled undefined results will be returned by the ADC It is the responsibility of the caller to ensure that a valid configuration is specified this function does not check the validity of the specified configuration Returns None 5 2 1 25 ROM ADCSequenceUnderflow Determines if a sample sequence underflow occurred Prototype long ROM ADCSequenceUnderflow unsigned long ulBase unsigned long ulSequenceNum ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM ADCTABLE is an array of pointers located at ROM_APITABLE 5 ROM ADCSequenceUnderflow is a function pointer located at ROM ADCTABLE 11 Parameters ulBase is the base address of the ADC module ulSequenceNum is the sample sequence number Description This determines if a sample sequence underflow has occurred This will happen if too many samples are read from the FIFO January 26 2012 37 Analog to Digital Converter ADC Returns Returns zero if there was not an underflow and non zero if there was 5 2 1 26 ROM ADCSequenceUnderflowClear Clears the underflow condition on a sample sequence Prototype void ROM ADCSequenceUnderflowClear unsigned long ulBase unsigned long ulSequenceNum ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM ADCTABLE is an array of pointers located at ROM APITABLE 5 ROM ADCSequenceUnderflowClear i
245. er located at ROM ADCTABLE 17 Parameters ulBase is the base address of the ADC module ulComp is the index of the comparator bTrigger is the flag to indicate reset of Trigger conditions binterrupt is the flag to indicate reset of Interrupt conditions January 26 2012 5 2 1 8 5 2 1 9 Analog to Digital Converter ADC Description Because the digital comparator uses current and previous ADC values this function is provide to allow the comparator to be reset to its initial value to prevent stale data from being used when a sequence is enabled Returns None ROM_ADCHardwareOversampleConfigure Configures the hardware oversampling factor of the ADC Prototype void ROM_ADCHardwareOversampleConfigure unsigned long ulBase unsigned long ulFactor ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM ADCTABLE is an array of pointers located at ROM_APITABLE 5 ROM ADCHardwareOversampleConfigure is a function pointer located at ROM ADCTABLE 14 Parameters ulBase is the base address of the ADC module ulFactor is the number of samples to be averaged Description This function configures the hardware oversampling for the ADC which can be used to provide better resolution on the sampled data Oversampling is accomplished by averaging multiple samples from the same analog input Six different oversampling rates are supported 2x 4
246. erating mode for the UART transmit interrupt Prototype void ROM UARTTxIntModeSet unsigned long ulBase unsigned long ulMode ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM UARTTABLE is an array of pointers located at ROM APITABLE 1 ROM UARTTxIntModeSet is a function pointer located at ROM UARTTABLE 21 Parameters ulBase is the base address of the UART port ulMode is the operating mode for the transmit interrupt It may be UART TXINT MODE EOT to trigger interrupts when the transmitter is idle or UART TXINT MODE FIFO to trigger based on the current transmit FIFO level Description This function allows the mode of the UART transmit interrupt to be set By default the transmit interrupt is asserted when the FIFO level falls past a threshold set via a call to ROM UARTFIFOLevelSet Alternatively if this function is called with u Mode set to UART TXINT MODE EOT the transmit interrupt will only be asserted once the transmitter is completely idle the transmit FIFO is empty and all bits including any stop bits have cleared the transmitter Returns None ROM UpdateUART Starts an update over the UARTO interface Prototype void ROM UpdateUART void ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM UARTTABLE is an array of pointers located at ROM APITABLE 1 ROM UpdateUART is a function pointer located a
247. ers ullnts is a bit mask of the interrupt sources to be disabled Must be a logical OR of SYSCTL INT PLL LOCK SYSCTL INT CUR LIMIT SYSCTL INT IOSC FAIL SYSCTL INT MOSC FAIL SYSCTL INT POR SYSCTL INT BOR and or SYSCTL INT PLL FAIL Description Disables the indicated system control interrupt sources Only the sources that are enabled can be reflected to the processor interrupt disabled sources have no effect on the processor Returns None 19 2 1 13 ROM SysCtllntEnable Enables individual system control interrupt sources January 26 2012 225 System Control Prototype void ROM_SysCtliIntEnable unsigned long ulInts ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM SYSCTLTABLE is an array of pointers located at ROM APITABLE 13 ROM SysCtlIntEnable is a function pointer located at ROM SYSCTLTABLE 13 Parameters ullnts is a bit mask of the interrupt sources to be enabled Must be a logical OR of SYSCTL INT PLL LOCK SYSCTL INT CUR LIMIT SYSCTL_INT_IOSC FAIL SYSCTL INT MOSC FAIL SYSCTL INT POR SYSCTL INT BOR and or SYSCTL INT PLL FAIL Description Enables the indicated system control interrupt sources Only the sources that are enabled can be reflected to the processor interrupt disabled sources have no effect on the processor Returns None 19 2 1 14 ROM SysCtllntStatus Gets the current interrupt status Prototype unsigned long ROM SysCtlIntSt
248. es 3 cycles loop Returns None ROM SysCtlFlashSizeGet Gets the size of the flash Prototype unsigned long ROM SysCtlFlashSizeGet void ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM SYSCTLTABLE is an array of pointers located at ROM APITABLE 13 ROM SysCtlFlashSizeGet is a function pointer located at ROM SYSCTLTABLE N Description This function determines the size of the flash on the Stellaris device Returns The total number of bytes of flash January 26 2012 19 2 1 8 19 2 1 9 System Control ROM SysCtIGPIOAHBDisable Disables a GPIO peripheral for access from the AHB Prototype void ROM SysCtlGPIOAHBDisable unsigned long ulGPIOPeripheral ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM SYSCTLTABLE is an array of pointers located at ROM APITABLE 13 ROM SysCtlGPIOAHBDisable is a function pointer located at ROM SYSCTLTABLE 30 Parameters ulGPlOPeripheral is the GPIO peripheral to disable Description This function disables the specified GPIO peripheral for access from the Advanced Host Bus AHB Once disabled the GPIO peripheral is accessed from the legacy Advanced Peripheral Bus AHB The ulGPlOPeripheral argument must be only one of the following values SYSCTL PERIPH GPIOA SYSCTL PERIPH GPIOB SYSCTL PERIPH GPIOC SYSCTL PERIPH GPIOD SYSCTL PERIPH GPIOE SYSCTL PERIPH GPIOF SYSCTL PERIPH
249. es and will take effect when the region is reloaded When one or more regions are defined the MPU can be enabled by calling ROM MPUEnable This turns on the MPU and also defines the behavior in privileged mode and in the Hard Fault and NMI fault handlers The MPU can be configured so that when in privileged mode and no regions are January 26 2012 167 Memory Protection Unit MPU 15 2 15 2 1 15 2 1 1 15 2 1 2 168 enabled a default memory map is applied If this feature is not enabled then a memory manage ment fault is generated if the MPU is enabled and no regions are configured and enabled The MPU can also be set to use a default memory map when in the Hard Fault or NMI handlers instead of using the configured regions All of these features are selected when calling ROM_MPUEnable When the MPU is enabled it can be disabled by calling ROM_MPUDisable Functions Functions void ROM_MPUDisable void void ROM MPUEnable unsigned long ulMPUConfig unsigned long ROM MPURegionCountGet void void ROM MPURegionDisable unsigned long ulRegion void ROM MPURegionEnable unsigned long ulRegion void ROM MPURegionGet unsigned long ulRegion unsigned long pulAddr unsigned long pulFlags m void ROM MPURegionSet unsigned long ulRegion unsigned long ulAddr unsigned long ulFlags Function Documentation ROM MPUDisable Disables the MPU for use Prototype void ROM MPUDisable void ROM Location ROM
250. ess of the I2C Master module Description This function returns an indication of whether or not the I2C Master is busy transmitting or receiving data Returns Returns true if the 12C Master is busy otherwise returns false ROM l2CMasterControl Controls the state of the 12C Master module Prototype void ROM I2CMasterControl unsigned long ulBase unsigned long ulCmd ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM I2CTABLE is an array of pointers located at ROM_APITABLE 3 ROM I2CMasterControl is a function pointer located at ROM I2CTABLE 18 Parameters ulBase is the base address of the I2C Master module ulCmd command to be issued to the I2C Master module Description This function is used to control the state of the Master module send and receive operations The ucCmd parameter can be one of the following values I2C MASTER CMD SINGLE SEND I2C MASTER CMD SINGLE RECEIVE I2C MASTER CMD BURST SEND START I2C MASTER CMD BURST SEND CONT I2C MASTER CMD BURST SEND FINISH I2C MASTER CMD BURST SEND ERROR STOP I2C MASTER CMD BURST RECEIVE START I2C MASTER CMD BURST RECEIVE CONT I2C MASTER CMD BURST RECEIVE FINISH I2C MASTER CMD BURST RECEIVE ERROR STOP Returns None January 26 2012 12 2 1 4 12 2 1 5 12 2 1 6 Inter Integrated Circuit I2C ROM l2CMasterDataGet Receives a byte that has been sent to the 12C Master Prototype
251. essor from sleep mode Sleep mode clocking of peripherals must be enabled via ROM SysCtlPeripheralClockGating if disabled the peripheral sleep mode configuration is maintained but has no effect when sleep mode is entered The ulPeripheral parameter must be only one of the following values SYSCTL PERIPH ADCO SYSCTL PERIPH ADC1 SYSCTL PERIPH CANO SYSCTL PERIPH CANT SYSCTL PERIPH CAN2 SYSCTL PERIPH COMPO SYSCTL PERIPH COMP 1 SYSCTL PERIPH COMP2 SYSCTL PERIPH EPIO SYSCTL PERIPH ETH SYSCTL PERIPH GPIOA SYSCTL PERIPH GPIOB SYSCTL PERIPH GPIOC SYSCTL PERIPH GPIOD SYSCTL PERIPH GPIOE SYSCTL PERIPH GPIOF SYSCTL PERIPH GPIOG SYSCTL PERIPH GPIOH SYSCTL PERIPH GPIOJ SYSCTL PERIPH I2CO SYSCTL PERIPH I2C1 SYSCTL PERIPH 12S0 SYSCTL PERIPH PWM SYSCTL_PERIPH_QEIO SYSCTL_PERIPH_QEI1 SYSCTL_PERIPH_SSIO SYSCTL_PERIPH_SSI1 SYSCTL PERIPH TIMERO SYSCTL PERIPH TIMER1 SYSCTL PERIPH TIMER2 SYSCTL PERIPH TIMERS3 SYSCTL PERIPH UARTO SYSCTL PERIPH UART 1 SYSCTL PERIPH UART2 SYSCTL PERIPH UDMA SYSCTL PERIPH USBO SYSCTL PERIPH WDOGOQ or SYSCTL PERIPH WDOG1 Returns None 19 2 1 26 ROM SysCtlPinPresent Determines if a pin is present 234 January 26 2012 System Control Prototype tBoolean ROM SysCtlPinPresent unsigned long ulPin ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM SYSCTLTABLE is an array of pointers located at ROM APITABLE 13 ROM SysCtlPinPresent is
252. et is a function pointer located at ROM ETHERNETTABLE 5 Parameters ulBase is the base address of the controller pucMACAddr is the pointer to the location in which to store the array of MAC 48 address octets Description This function will read the currently programmed MAC address into the pucMACAdar buffer See also Refer to ROM EthernetMACAddrSet API description for more details about the MAC address format January 26 2012 8 2 1 11 Ethernet Controller Returns None ROM_EthernetWACAddrSet Sets the MAC address of the Ethernet controller Prototype void ROM_EthernetMACAddrSet unsigned long ulBase unsigned char pucMACAddr ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM ETHERNETTABLE is an array of pointers located at ROM APITABLE 15 ROM EthernetMACAddrSet is a function pointer located at ROM_ETHERNETTABLE 4 Parameters ulBase is the base address of the controller pucMACAddr is the pointer to the array of MAC 48 address octets Description This function will program the IEEE defined MAC 48 address specified in pucMACAdar into the Ethernet controller This address is used by the Ethernet controller for hardware level filtering of incoming Ethernet packets when promiscuous mode is not enabled The MAC 48 address is defined as 6 octets illustrated by the fol
253. eturns the interrupt status for the I2C Master module Either the raw interrupt status or the status of interrupts that are allowed to reflect to the processor can be returned Returns The current interrupt status returned as true if active or false if not active January 26 2012 131 Inter Integrated Circuit I2C 12 2 1 14 ROM l2CMasterSlaveAddrSet Sets the address that the I2C Master will place on the bus Prototype void ROM I2CMasterSlaveAddrSet unsigned long ulBase unsigned char ucSlaveAddr tBoolean bReceive ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM I2CTABLE is an array of pointers located at ROM_APITABLE 3 ROM I2CMasterSlaveAddrSet is a function pointer located at ROM I2CTABLE 15 Parameters ulBase is the base address of the I2C Master module ucSlaveAddr 7 bit slave address bReceive flag indicating the type of communication with the slave Description This function will set the address that the I2C Master will place on the bus when initiating a transaction When the bReceive parameter is set to true the address will indicate that the I2C Master is initiating a read from the slave otherwise the address will indicate that the 12C Master is initiating a write to the slave Returns None 12 2 1 15 ROM_l2CSlaveDataGet 132 Receives a byte that has been sent to the I2C Slave Prototype unsigned long ROM I2CSlaveDataGet
254. f pointers located at ROM APITABLE 5 ROM ADCIntEnable is a function pointer located at ROM ADCTABLE 2 Parameters ulBase is the base address of the ADC module ulSequenceNum is the sample sequence number Description This function enables the requested sample sequence interrupt Any outstanding interrupts are cleared before enabling the sample sequence interrupt Returns None ROM ADOCIntStatus Gets the current interrupt status Prototype unsigned long ROM ADCIntStatus unsigned long ulBase unsigned long ulSequenceNum tBoolean bMasked ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM ADCTABLE is an array of pointers located at ROM APITABLE 5 ROM ADCIntStatus is a function pointer located at ROM ADCTABLE 3 Parameters ulBase is the base address of the ADC module ulSequenceNum is the sample sequence number bMasked is false if the raw interrupt status is required and true if the masked interrupt status is required Description This returns the interrupt status for the specified sample sequence Either the raw interrupt status or the status of interrupts that are allowed to reflect to the processor can be returned Returns The current raw or masked interrupt status January 26 2012 29 Analog to Digital Converter ADC 5 2 1 13 5 2 1 14 30 ROM ADCPhaseDelayGet Gets the phase delay betwe
255. f this document Please refer to the device data sheet for more information on the operation of the uDMA controller The naming convention for the microDMA controller is to use the Greek letter mu to represent micro For the purposes of this document and in the software library function names a lower case u will be used in place of mu when the controller is referred to as UDMA The general order of function calls to set up and perform a uDMA transfer is the following ROM uDMAEnable is called once to enable the controller ROM uDMAControlBaseSet is called once to set the channel control table ROM uDMAChannelAttributeEnable is called once or infrequently to configure the behavior of the channel m ROM uDMAChannelControlSet is used to set up characteristics of the data transfer It only needs to be called once if the nature of the data transfer does not change ROM uDMAChannelTransferSet is used to set the buffer pointers and size for a transfer It is called before each new transfer ROM uDMAChannelEnable enables a channel to perform data transfers m ROM uDMAChannelRequest is used to initiate a software based transfer This is normally not used for peripheral based transfers In order to use the uDMA controller you must first enable it by calling ROM uDMAEnable You can later disable it if no longer needed by calling ROM uDMADisable Once the uDMA controller is enabled you must tell it w
256. fied as only one of the GPIO P 7 val ues Description This function configures the pin mux that selects the peripheral function associated with a particular GPIO pin Only one peripheral function at a time can be associated with a GPIO pin and each peripheral function should only be associated with a single GPIO pin at a time despite the fact that many of them can be associated with more than one GPIO pin Returns None ROM GPlOPinlntClear Clears the interrupt for the specified pin s Prototype void ROM GPIOPinIntClear unsigned long ulPort unsigned char ucPins ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM GPIOTABLE is an array of pointers located at ROM_APITABLE 4 ROM GPIOPinIntClear is a function pointer located at ROM GPIOTABLE 10 January 26 2012 107 GPIO 11 2 1 9 108 Parameters ulPort is the base address of the GPIO port ucPins is the bit packed representation of the pin s Description Clears the interrupt for the specified pin s The pin s are specified using a bit packed byte where each bit that is set identifies the pin to be accessed and where bit 0 of the byte represents GPIO port pin 0 bit 1 represents GPIO port pin 1 and so on Note Because there is a write buffer in the Cortex M3 processor it may take several clock cycles before the interrupt source is actually cleared Therefore it is recommended that the interrupt sour
257. figuration ulMaxWait is the maximum number of external clocks to wait if a FIFO ready signal is holding off the transaction Description This function is used to configure the interface when used in Host bus 8 operation as chosen with the function ROM EPIModeSet The parameter u Config is the logical OR of any of the following January 26 2012 External Peripheral Interface EPI one of EPI HB8 MODE ADMUX EPI HB8 MODE ADDEMUX EPI HB8 MODE SRAM or EPI HB8 MODE FIFO to select the HB8 mode EPI HB8 USE TXEMPTY enable TXEMPTY signal with FIFO EPI HB8 USE RXFULL enable RXFULL signal with FIFO EPI HB8 WRHIGH use active high write strobe otherwise it is active low EPI HB8 RDHIGH use active high read strobe otherwise it is active low one of EPI HB8 WRWAIT 0 EPI HB8 WRWAIT 1 EPI HB8 WRWAIT 2 or EPI HB8 WRWAIT 3 to select the number of write wait states default is 0 wait states one of EPI HB8 RDWAIT 0 EPI HB8 RDWAIT 1 EPI HB8 RDWAIT 2 or EPI HB8 RDWAIT 3 to select the number of read wait states default is O wait states EPI HB8 WORD ACCESS use Word Access mode to route bytes to the correct byte lanes allowing data to be stored in bits 31 8 If absent all data transfers use bits 7 0 EPI HB8 CSBAUD DUAL use different baud rates when accessing devices on each CSn CSOn uses the baud rate specified by the lower 16 bits of the divider passed to ROM EPlDividerSet and CS1n uses the divider passed in the upper
258. following steps 1 Set eMsgType to MSG OBJ TYPE TX 2 Set pMsgObject ulMsgID to the message ID 3 Set pMsgObject gt ulFlags Make sure to set MSG OBJ TX INT ENABLE to allow an interrupt to be generated when the message is sent 4 Set pMsgObject gt ulMsgLen to the number of bytes in the data frame 5 Set pMsgObject gt pucMsgData to point to an array containing the bytes to send in the message 6 Call this function with u ObjID set to one of the 32 object buffers 50 January 26 2012 Controller Area Network CAN Example To receive a specific data frame take the following steps 1 Set eMsgObjType to MSG OBJ TYPE RX 2 Set pMsgObject gt ulMsgID to the full message ID or a partial mask to use partial ID match ing 3 Set pMsgObject ulMsgIDMask bits that should be used for masking during comparison 4 Set pMsgObject gt ulFlags as follows m Set MSG OBJ RX INT ENABLE flag to be interrupted when the data frame is re ceived m Set MSG OBJ USE ID FILTER flag to enable identifier based filtering 5 Set pMsgObject gt ulMsgLen to the number of bytes in the expected data frame 6 The buffer pointed to by pMsgObject pucMsgData is not used by this call as no data is present at the time of the call 7 Call this function with u ObjID set to one of the 32 object buffers If you specify a message object buffer that already contains a message definition it will be overwritten Returns None 6 2 1 15 ROM CANRet
259. g MPU CONFIG PRIV DEFAULT enables the default memory map when in privileged mode and when no other regions are defined If this option is not enabled then there must be at least one valid region already defined when the MPU is enabled m MPU CONFIG HARDFLT NMI enables the MPU while in a hard fault or NMI exception handler If this option is not enabled then the MPU is disabled while in one of these exception handlers and the default memory map is applied m MPU CONFIG NONE chooses none of the above options In this case no default mem ory map is provided in privileged mode and the MPU will not be enabled in the fault handlers Returns None 15 2 1 3 ROM MPURegionCountGet Gets the count of regions supported by the MPU Prototype unsigned long ROM MPURegionCountGet void ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM MPUTABLE is an array of pointers located at ROM APITABLE 20 ROM MPURegionCountGet is a function pointer located at ROM MPUTABLE m 2 Description This function is used to get the number of regions that are supported by the MPU This is the total number that are supported including regions that are already programmed January 26 2012 169 Memory Protection Unit MPU 15 2 1 4 15 2 1 5 170 Returns The number of memory protection regions that are available for programming using ROM MPURegionSet ROM MPURegionDisable Di
260. g the message object using ROM CANMessageGet Note Because there is a write buffer in the Cortex M3 processor it may take several clock cycles before the interrupt source is actually cleared Therefore it is recommended that the interrupt source be cleared early in the interrupt handler as opposed to the very last action to avoid returning from the interrupt handler before the interrupt source is actually cleared Failure to do so may result in the interrupt handler being immediately reentered because the interrupt controller still sees the interrupt source asserted Returns None ROM CANIntDisable Disables individual CAN controller interrupt sources Prototype void ROM CANIntDisable unsigned long ulBase unsigned long ulIntFlags ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM CANTABLE is an array of pointers located at ROM APITABLE 18 ROM CANIntDisable is a function pointer located at ROM CANTABLE 11 Parameters ulBase is the base address of the CAN controller ullntFlags is the bit mask of the interrupt sources to be disabled Description Disables the specified CAN controller interrupt sources Only enabled interrupt sources can cause a processor interrupt The ullntFlags parameter has the same definition as in the ROM CANIntEnable function Returns None ROM CANIntEnable Enables individual CAN controller interrupt sources Janua
261. g b sPeriphSG should be used to indicate if the scatter gather should be configured for a peripheral or memory scatter gather operation Returns None ROM uDMaAChannelSelectDefault Selects the default peripheral for a set of uDMA channels Prototype void ROM uDMAChannelSelectDefault unsigned long ulDefPeriphs ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM UDMATABLE is an array of pointers located at ROM APITABLE 17 ROM uDMAChannelSelectDefault is a function pointer located at ROM UDMATABLE 18 Parameters ulDefPeriphs is the logical or of the uDMA channels for which to use the default peripheral instead of the secondary peripheral Description This function is used to select the default peripheral assignment for a set of uDMA channels The parameter u DefPeriphs can be the logical OR of any of the following macros If one of the macros below is in the list passed to this function then the default peripheral marked as DEF will be selected January 26 2012 uDMA Controller UDMA_DEF_USBEP1RX_SEC_UART2RX UDMA_DEF_USBEP1TX_SEC_UART2TX UDMA_DEF_USBEP2RX_SEC_TMR3A UDMA DEF USBEP2TX SEC TMR3B UDMA DEF USBEP3RX SEC TMR2A UDMA DEF USBEP3TX SEC TMR2B UDMA DEF ETHORX SEC TMR2A UDMA DEF ETHOTX SEC TMR2B UDMA DEF UARTORX SEC UART1RX UDMA DEF UARTOTX SEC UART1TX UDMA DEF SSIORX SEC SSHRX UDMA DEF SSIOTX SEC SSHTX UDMA DEF ADCO0 SEC TMR2
262. g ulBase unsigned long ulTimer tBoolean bln vert m void ROM TimerControlStall unsigned long ulBase unsigned long ulTimer tBoolean bStall m void ROM TimerControlTrigger unsigned long ulBase unsigned long ulTimer tBoolean bEn able January 26 2012 245 Timer 21 2 1 21 2 1 1 246 void ROM TimerControlWaitOnTrigger unsigned long ulBase unsigned long ulTimer tBoolean bWait void ROM_TimerDisable unsigned long ulBase unsigned long ulTimer void ROM_TimerEnable unsigned long ulBase unsigned long ulTimer void ROM TimerlntClear unsigned long ulBase unsigned long ullntFlags void ROM TimerlntDisable unsigned long ulBase unsigned long ullntFlags void ROM TimerlntEnable unsigned long ulBase unsigned long ullntFlags unsigned long ROM TimerlntStatus unsigned long ulBase tBoolean bMasked unsigned long ROM TimerLoadGet unsigned long ulBase unsigned long ulTimer void ROM TimerLoadSet unsigned long ulBase unsigned long ulTimer unsigned long ul Value unsigned long ROM TimerMatchGet unsigned long ulBase unsigned long ulTimer void ROM TimerMatchSet unsigned long ulBase unsigned long ulTimer unsigned long ul Value unsigned long ROM TimerPrescaleGet unsigned long ulBase unsigned long ulTimer unsigned long ROM TimerPrescaleMatchGet unsigned long ulBase unsigned long ulTimer m void ROM TimerPrescaleMatchSet unsigned long ulBase unsigned long ulTimer unsigned long ulValue void ROM Ti
263. g with pC kParms gt uSJW are based in units of bit time quanta The actual quantum time is determined by the pC kParms gt uQuantumPrescaler value which specifies the divisor for the CAN module clock The total bit time in quanta will be the sum of the two Seg parameters as follows bit time q uSyncPropPhase1Seg uPhase2Seg 1 Note that the Sync Seg is always one quantum in duration and will be added to derive the correct duration of Prop Seg and Phase1 Seg The equation to determine the actual bit rate is as follows CAN Clock uSyncPropPhase1Seg uPhase2Seg 1 x uQuantumPrescaler This means that with uSyncPropPhase1 Seg 4 uPhase2Seg 1 uQuantumPrescaler 2 and an 8 MHz CAN clock that the bit rate will be 8 MHz 5 2 1 x 2 or 500 Kbit sec Returns None 6 2 1 4 ROM CANDisable Disables the CAN controller Prototype void ROM CANDisable unsigned long ulBase ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM CANTABLE is an array of pointers located at ROM APITABLE 18 ROM CANDisable is a function pointer located at ROM_CANTABLE 3 Parameters ulBase is the base address of the CAN controller to disable Description Disables the CAN controller for message processing When disabled the controller will no longer automatically process data on the CAN bus The controller can be restarted by calling ROM CANEnable The state of the CA
264. gReadGet32 unsigned long ulBase unsigned long ulCount unsigned long pulBuf ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM EPITABLE is an array of pointers located at ROM_APITABLE 23 ROM EPINonBlockingReadGet32 is a function pointer located at ROM EPITABLE 13 Parameters ulBase is the EPI module base address ulCount is the maximum count of items to read pulBuf is the caller supplied buffer where the read data should be stored Description This function reads 32 bit data items from the read FIFO and stores the values in a caller supplied buffer The function will read and store data from the FIFO until there is no more January 26 2012 87 External Peripheral Interface EPI 9 2 1 19 9 2 1 20 88 data in the FIFO or the maximum count is reached as specified in the parameter ulCount The actual count of items will be returned Returns The number of items read from the FIFO ROM_EPINonBlockingReadGet8 Read available data from the read FIFO as 8 bit data items Prototype unsigned long ROM_EPINonBlockingReadGet8 unsigned long ulBase unsigned long ulCount unsigned char pucBuf ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM EPITABLE is an array of pointers located at ROM_APITABLE 23 ROM EPINonBlockingReadGet8 is a function pointer located at ROM EPITABLE 15
265. gainst the USB INTEP values These are grouped into classes for USB INTEP HOST and USB INTEP DEV values to handle both host and device modes with all endpoints Note This call will clear the source of all of the endpoint interrupts January 26 2012 341 USB Controller Returns Returns the status of the endpoint interrupts for a USB controller 24 3 1 53 ROM USBModeGet Returns the current operating mode of the controller Prototype unsigned long ROM USBModeGet unsigned long ulBase ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM USBTABLE is an array of pointers located at ROM APITABLE 16 ROM USBModeGet is a function pointer located at ROM_USBTABLE 46 Parameters ulBase specifies the USB module base address Description 342 This function returns the current operating mode on USB controllers with OTG or Dual mode functionality For OTG controllers The function will return on of the following values on OTG con trollers USB_OTG_MODE_ASIDE_HOST USB_OTG_MODE_ASIDE_DEV USB_OTG_MODE_BSIDE_HOST USB OTG MODE BSIDE DEV USB OTG MODE NONE USB OTG MODE ASIDE HOST indicates that the controller is in host mode on the A side of the cable USB OTG MODE ASIDE DEV indicates that the controller is in device mode on the A side of the cable USB OTG MODE BSIDE HOST indicates that the controller is in host mode on the B side of the cable U
266. ges as a result of entering deep sleep mode If enabled via ROM SysCtlPeripheralEnable the peripheral will automatically resume operation when the processor leaves deep sleep mode maintaining its entire state from before deep sleep mode was entered Deep sleep mode ROM SysCtlPeripheralClockGating clocking of peripherals must if disabled the peripheral be enabled via deep sleep mode con figuration is maintained but has no effect when deep sleep mode is entered 228 January 26 2012 System Control The ulPeripheral parameter must be only one of the following values SYSCTL_PERIPH_ADCO SYSCTL_PERIPH_ADC1 SYSCTL_PERIPH_CANO SYSCTL_PERIPH_CAN1 SYSCTL PERIPH CAN2 SYSCTL PERIPH COMPO SYSCTL PERIPH COMP 1 SYSCTL PERIPH COMP2 SYSCTL PERIPH EPIO SYSCTL PERIPH ETH SYSCTL PERIPH GPIOA SYSCTL PERIPH GPIOB SYSCTL PERIPH GPIOC SYSCTL PERIPH GPIOD SYSCTL PERIPH GPIOE SYSCTL PERIPH GPIOF SYSCTL PERIPH GPIOG SYSCTL PERIPH GPIOH SYSCTL PERIPH GPIOJ SYSCTL_PERIPH_I2Co SYSCTL_PERIPH_I2C1 SYSCTL_PERIPH_I2S0 SYSCTL_PERIPH_PWM SYSCTL_PERIPH_QEIO SYSCTL_PERIPH_QEI1 SYSCTL_PERIPH_SSIO SYSCTL_PERIPH_SSI1 SYSCTL PERIPH TIMERO SYSCTL_PERIPH_TIMER1 SYSCTL PERIPH TIMER2 SYSCTL PERIPH TIMERS3 SYSCTL PERIPH UARTO SYSCTL PERIPH UART 1 SYSCTL PERIPH UART2 SYSCTL PERIPH UDMA SYSCTL PERIPH USBO SYSCTL PERIPH WDOGOQ or SYSCTL PERIPH WDOG1 Returns None 19 2 1 19 ROM SysCtlPeripheralDeepSleepE
267. gned long ROM UARTParityModeGet unsigned long ulBase void ROM UARTParityModeSet unsigned long ulBase unsigned long ulParity void ROM UARTRxErrorClear unsigned long ulBase unsigned long ROM UARTRxErrorGet unsigned long ulBase tBoolean ROM UARTSpaceAvail unsigned long ulBase unsigned long ROM UARTTxIntModeGet unsigned long ulBase void ROM UARTTxIntModeSet unsigned long ulBase unsigned long ulMode void ROM UpdateUART void Function Documentation ROM UARTBreakCtl Causes a BREAK to be sent Prototype void ROM UARTBreakCtl unsigned long ulBase tBoolean bBreakState ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM UARTTABLE is an array of pointers located at ROM APITABLE 1 ROM UARTBreakCtl is a function pointer located at ROM UARTTABLE 16 Parameters ulBase is the base address of the UART port bBreakState controls the output level Description Calling this function with bBreakState set to true asserts a break condition on the UART Calling this function with bBreakState set to false removes the break condition For proper transmis sion of a break command the break must be asserted for at least two complete frames January 26 2012 22 2 1 2 22 2 1 3 UART Returns None ROM UARTBusy Determines whether the UART transmitter is busy or not Prototype tBoolean ROM_UARTBusy unsigned long ulBase ROM Location ROM_APITABLE i
268. gned long ulBase unsigned long ulFaultInts January 26 2012 16 2 1 5 January 26 2012 Pulse Width Modulator PWM ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM PWMTABLE is an array of pointers located at ROM_APITABLE 8 ROM PWMFaultIntClearExt is a function pointer located at ROM_PWMTABLE 23 Parameters ulBase is the base address of the PWM module ulFaultints specifies the fault interrupts to clear Description Clears one or more fault interrupts by writing to the appropriate bit of the PWM interrupt status register The parameter ulFaultlnts must be the logical OR of any of PWM INT FAULTO PWM INT FAULT1 PWM INT FAULT2 or PWM INT FAULTS When running on a device supporting extended PWM fault handling the fault interrupts are derived by performing a logical OR of each of the configured fault trigger signals for a given generator Therefore these interrupts are not directly related to the four possible FAULTn inputs to the device but indicate that a fault has been signaled to one of the four possible PWM generators On a device without extended PWM fault handling the interrupt is directly related to the state of the single FAULT pin Note Because there is a write buffer in the Cortex M3 processor it may take several clock cycles before the interrupt source is actually cleared Therefore it is recommended that the interrupt source be cl
269. hat is in use Any API that uses the IN OUT terminology will comply with the standard USB interpretation of these terms For example an OUT endpoint on a microcontroller that has only a device interface will actually receive data on this endpoint while a microcontroller that has a host interface will actually transmit data on an OUT endpoint Another important fact to understand is that all endpoints in the USB controller whether host or device have two sides to them This allows each endpoint to both transmit and receive data An application can use a single endpoint for both and IN and OUT transactions For example In device mode endpoint 1 could be configured to have BULK IN and BULK OUT handled by endpoint 1 It is important to note that the endpoint number used is the endpoint number reported to the host For microcontrollers with host controllers the application can use an endpoint communicate with both IN and OUT endpoints of different types as well For example Endpoint 2 could be used to communicate with one device s interrupt IN endpoint and another device s bulk OUT endpoint at the same time This effectively gives the application one dedicated control endpoint for IN or OUT control transactions on endpoint 0 and three IN endpoints and three OUT endpoints The USB controller has a configurable FIFOs in devices that have a USB device controller as well as those that have a host controller The overall size of the FIFO RAM is 4096 bytes
270. he transmission of the packet Only after the packet has been transmitted can a new packet be written into the FIFO This function will simply check to see if a packet is in progress If so there is no space available in the transmit FIFO Returns Returns true if a space is available in the transmit FIFO and false otherwise ROM UpdateEthernet Starts an update over the Ethernet interface Prototype void ROM UpdateEthernet void ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM ETHERNETTABLE is an array of pointers located at ROM APITABLE 15 ROM UpdateEthernet is a function pointer located at ROM ETHERNETTABLE 19 Description Calling this function commences an update of the firmware via the Ethernet interface This function assumes that the Ethernet interface has already been configured had its MAC ad dress programmed and is currently operational The BOOTP requests that are generated will have the server name field set to stellaris Returns Never returns January 26 2012 71 Ethernet Controller 72 January 26 2012 9 9 1 External Peripheral Interface EPI External Peripheral Interface EPI INP UEIR M RTT T TETE TTE T CTS i aA 73 A EME T I E E E E EE da T EE MC aU ME E E A EE 74 Introduction The EPI API provides functions to use the EPI module available in the Stellaris microcontroller The EPI module provides a physical
271. he current speed of the USB device connected Prototype unsigned long ROM USBHostSpeedGet unsigned long ulBase ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM USBTABLE is an array of pointers located at ROM APITABLE 16 ROM USBHostSpeedGet is a function pointer located at ROM USBTABLE 37 Parameters ulBase specifies the USB module base address Description This function will return the current speed of the USB bus Note This function should only be called in host mode January 26 2012 335 USB Controller Returns Returns either USB LOW SPEED USB FULL SPEED or USB UNDEF SPEED 24 3 1 43 ROM USBHostSuspend Puts the USB bus in a suspended state Prototype void ROM USBHostSuspend unsigned long ulBase ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM USBTABLE is an array of pointers located at ROM APITABLE 16 ROM_USBHost Suspend is a function pointer located at ROM USBTABLE 38 Parameters ulBase specifies the USB module base address Description When used in host mode this function will put the USB bus in the suspended state Note This function should only be called in host mode Returns None 24 3 1 44 ROM USBlntDisable Disables the sources for USB interrupts Prototype void ROM USBIntDisable unsigned long ulBase unsigned long ulFlags ROM Location
272. he data width as configured by ROM SSlIConfigSetExpCIk For example if the interface is configured for 8 bit data width only the lower 8 bits of the value written to pulData contain valid data Returns None ROM SSIDataGetNonBlocking Gets a data element from the SSI receive FIFO Prototype long ROM SSIDataGetNonBlocking unsigned long ulBase unsigned long pulData ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM SSITABLE is an array of pointers located at ROM APITABLE 2 ROM SSIDataGetNonBlocking is a function pointer located at ROM SSITABLE m 10 Parameters ulBase specifies the SSI module base address pulData is a pointer to a storage location for data that was received over the SSI interface Description This function gets received data from the receive FIFO of the specified SSI module and places that data into the location specified by the u Data parameter If there is no data in the FIFO then this function returns a zero Note Only the lower N bits of the value written to pulData contain valid data where N is the data width as configured by ROM SSIConfigSetExpCIk For example if the interface is configured for 8 bit data width only the lower 8 bits of the value written to pu Data contain valid data Returns Returns the number of elements read from the SSI receive FIFO ROM SSIDataPut Puts a data element into the SSI transmit FIFO Ja
273. he function will return immediately If space is available the function will return once BufLen bytes of the packet have been placed into the FIFO and the transmitter has been started The function will not wait for the transmission to complete The function will return the negated BufLen if the length is larger than the space available in the transmit FIFO Note This function does not block and will return immediately if no space is available for the transmit packet 68 January 26 2012 8 2 1 17 8 2 1 18 Ethernet Controller Returns Returns 0 if no space is available in the transmit FIFO the negated packet length IBufLen if the packet is too large for FIFO and the packet length IBufLen otherwise ROM EthernetPHY PowerOff Powers off the Ethernet PHY Prototype void ROM EthernetPHYPowerOff unsigned long ulBase ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM ETHERNETTABLE is an array of pointers located at ROM APITABLE 15 ROM EthernetPHYPowerOftf is a function pointer located at ROM ETHERNETTABLE 21 Parameters ulBase is the base address of the controller Description This function will power off the Ethernet PHY reducing the current consuption of the device While in the powered off state the Ethernet controller will be unable to connect to the Ethernet Returns None ROM EthernetPHYPowerOn Powers on the Ethernet PHY
274. he interrupt to ensure that later errors of the same type trigger another interrupt Returns None 22 2 1 27 ROM_UARTRxErrorGet Gets current receiver errors Prototype unsigned long ROM_UARTRxErrorGet unsigned long ulBase ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM UARTTABLE is an array of pointers located at ROM_APITABLE 1 ROM UARTRxErrorGet is a function pointer located at ROM UARTTABLE 29 Parameters ulBase is the base address of the UART port Description This function returns the current state of each of the 4 receiver error sources The returned er rors are equivalent to the four error bits returned via the previous call to ROM UARTCharGet or ROM UARTCharGetNonBlocking with the exception that the overrun error is set immedi ately the overrun occurs rather than when a character is next read Returns Returns a logical OR combination of the receiver error flags UART RXERROR FRAMING UART RXERROR PARITY UART RXERROR BREAK and UART RXERROR OVERRUN 274 January 26 2012 UART 22 2 1 28 ROM_UARTSpaceAvail Determines if there is any space in the transmit FIFO Prototype tBoolean ROM_UARTSpaceAvail unsigned long ulBase ROM Location ROM_APITABLE is an array of pointers located at 0x0100 0010 ROM UARTTABLE is an array of pointers located at ROM_APITABLE 1 ROM UARTSpaceAvail is a function pointer located at ROM_UARTTA
275. he lower interrupt number will be processed first NVIC keeps track of the nesting of interrupt handlers allowing the processor to return from interrupt context only once all nested and pending interrupts have been handled Functions Functions m void ROM IntDisable unsigned long ullnterrupt m void ROM IntEnable unsigned long ullnterrupt m tBoolean ROM IntMasterDisable void m tBoolean ROM IntMasterEnable void m void ROM IntPendClear unsigned long ullnterrupt m void ROM IntPendSet unsigned long ullnterrupt January 26 2012 159 Interrupt Controller NVIC 14 2 1 14 2 1 1 14 2 1 2 160 long ROM_IntPriorityGet unsigned long ullnterrupt unsigned long ROM IntPriorityGroupingGet void void ROM_IntPriorityGroupingSet unsigned long ulBits unsigned long ROM IntPriorityMaskGet void void ROM IntPriorityMaskSet unsigned long ulPriorityMask void ROM JIntPrioritySet unsigned long ullnterrupt unsigned char ucPriority Function Documentation ROM IntDisable Disables an interrupt Prototype void ROM IntDisable unsigned long ulInterrupt ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM INTERRUPTTABLE is an array of pointers located at ROM APITABLE 14 ROM IntDisable is a function pointer located at ROM INTERRUPTTABLE Ww Parameters ullnterrupt specifies the interrupt to be disabled Description The specified interrupt is disabled in
276. he parameter u Strength can be one of the following values m GPIO STRENGTH 2MA m GPIO STRENGTH 4MA m GPIO STRENGTH 8MA m GPIO STRENGTH 8MA SC where GPIO STRENGTH xMA specifies either 2 4 or 8 mA output drive strength and GPIO OUT STRENGTH 8MA SC specifies 8 mA output drive with slew control The parameter ulPinType can be one of the following values GPIO PIN TYPE STD GPIO PIN TYPE STD WPU GPIO PIN TYPE STD WPD GPIO PIN TYPE OD GPIO PIN TYPE OD WPU GPIO PIN TYPE OD WPD GPIO PIN TYPE ANALOG January 26 2012 11 2 1 7 11 2 1 8 GPIO where GPIO PIN TYPE STD specifies a push pull pin GPIO PIN TYPE OD specifies an open drain pin WPU specifies a weak pull up WPD specifies a weak pull down and GPIO PIN TYPE ANALOG specifies an analog input The pin s are specified using a bit packed byte where each bit that is set identifies the pin to be accessed and where bit 0 of the byte represents GPIO port pin 0 bit 1 represents GPIO port pin 1 and so on Returns None ROM GPlOPinConfigure Configures the alternate function of a GPIO pin Prototype void ROM GPIOPinConfigure unsigned long ulPinConfig ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM GPIOTABLE is an array of pointers located at ROM_APITABLE 4 ROM GPIOPinConfigure is a function pointer located at ROM GPIOTABLE 26 Parameters ulPinConfig is the pin configuration value speci
277. he slave address and have enabled the I2C Slave block The parameter ucSlaveAdar is the value that will be compared against the slave address sent by an I2C master Returns None 12 2 1 20 ROM 2CSlavelntClear Clears I2C Slave interrupt sources Prototype void ROM I2CSlaveIntClear unsigned long ulBase 134 January 26 2012 Inter Integrated Circuit I2C ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM I2CTABLE is an array of pointers located at ROM_APITABLE 3 ROM I2CSlaveIntClear is a function pointer located at ROM I2CTABLE 14 Parameters ulBase is the base address of the I2C Slave module Description The I2C Slave interrupt source is cleared so that it no longer asserts This must be done in the interrupt handler to keep it from being called again immediately upon exit Note Because there is a write buffer in the Cortex M3 processor it may take several clock cycles before the interrupt source is actually cleared Therefore it is recommended that the interrupt source be cleared early in the interrupt handler as opposed to the very last action to avoid returning from the interrupt handler before the interrupt source is actually cleared Failure to do so may result in the interrupt handler being immediately reentered because the interrupt controller still sees the interrupt source asserted Returns None 12 2 1 21 ROM_l2CSlavelntClearEx Clears
278. hen using uDMA to prevent the need for application code to start the actual transfer of data January 26 2012 USB Controller Example Endpoint configuration for a device IN endpoint Lf Endpoint 1 is a device mode BULK IN endpoint using uDMA ROM_USBDevEndpointConfigSet USBO_BASE USB EP 1 64 USB_EP_MODE_BULK USB_EP_DEV_IN USB EP DMA MODE O0 USB EP AUTO SET The application must provide the configuration of the actual uDMA controller First to clear out any previous settings the application should call ROM uDMAChannelAttributeDisable Then the ap plication should call ROM uDMAChannelAttributeEnable for the uDMA channel that corresponds to the endpoint and specify the UDMA ATTR USEBURST flag Note All uDMA transfers used by the USB controller must enable burst mode The application needs to indicate the size of each uDMA transactions combined with the source and destination increments and the arbitration level for the uDMA controller Example Configure endpoint 1 transmit channel Set up the DMA for USB transmit Vu ROM uDMAChannelAttributeDisable UDMA CHANNEL USBEPI1TX UDMA ATTR ALL Enable uDMA burst mode ROM_uDMAChannelAttributeEnable UDMA_CHANNEL_USBEP1TX UDMA_ATTR_USEBURST Data size is 8 bits and the source has a one byte increment Destination has no increment as it is a FIFO 4 ROM uDMAChannelControlSet UDMA CHANNEL USBEPITX UDMA SIZE 8
279. here to find the channel control structures in system memory This is done by using the function ROM uDMAControlBaseSet and passing a pointer to the base of the channel control structure The control structure must be allocated by the application One way to do this is to declare an array of data type char or unsigned char In order to support all channels and transfer modes the control table array should be 1024 bytes but it can be fewer depending on transfer modes used and number of channels actually used Note The control table must be aligned on a 1024 byte boundary The uDMA controller supports multiple channels Each channel has a set of attribute flags to con trol certain uDMA features and channel behavior The attribute flags are set with the function ROM uDMAChannelAttributeEnable and cleared with ROM uDMAChannelAttributeDisable The setting of the channel attribute flags can be queried by using the function ROM uDMAChannelAttributeGet Next the control parameters of the DMA transfer must be set These parameters con trol the size and address increment of the data items to be transferred The function ROM uDMAChannelControlSet is used to set up these control parameters All of the functions mentioned so far are used only once or infrequently to set up the uDMA chan nel and transfer In order to set the transfer addresses transfer size and transfer mode use the function ROM uDMAChannelTransferSet This function must be c
280. his function will return the current device address This address was set by a call to ROM USBDevAddrSet Note This function should only be called in device mode Returns The current device address ROM USBDevAdadrSet Sets the address in device mode Prototype void ROM USBDevAddrSet unsigned long ulBase unsigned long ulAddress ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM USBTABLE is an array of pointers located at ROM APITABLE 16 ROM USBDevAddrsSet is a function pointer located at ROM USBTABLE Zl Parameters ulBase specifies the USB module base address ulAddress is the address to use for a device Description This function will set the device address on the USB bus This address was likely received via a SET ADDRESS command from the host controller Note This function should only be called in device mode January 26 2012 24 3 1 3 24 3 1 4 USB Controller Returns None ROM USBDevConnect Connects the USB controller to the bus in device mode Prototype void ROM USBDevConnect unsigned long ulBase ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM USBTABLE is an array of pointers located at ROM APITABLE 16 ROM USBDevConnect is a function pointer located at ROM USBTABLE 3 Parameters ulBase specifies the USB module base address Description This fu
281. his table contains the forward polynomial table as used by the XySSL AES implementation ucReverseSBox This table contains the reverse S Box as defined by the AES standard This is simply the reverse of ucForwardSBox ulReverseTable This table contains the reverse polynomial table as used by the XySSL AES implementation 14 January 26 2012 4 1 4 2 4 2 1 4 2 1 1 Analog Comparator Analog Comparator INPROOUCHON asena darem d Eua actua Exo a theca eens atu RE bla dba pid d 15 IOBEIIGHS 3202 a vip n ved E MI Ex Ed En da EPUM IC aU ME Un ME 15 Introduction The comparator API provides a set of functions for dealing with the analog comparators A com parator can compare a test voltage against individual external reference voltage a shared single external reference voltage or a shared internal reference voltage It can provide its output to a device pin acting as a replacement for an analog comparator on the board or it can be used to signal the application via interrupts or triggers to the ADC to cause it to start capturing a sample sequence The interrupt generation and ADC triggering logic is separate so that an interrupt can be generated on a rising edge and the ADC triggered on a falling edge for example Functions Functions m void ROM ComparatorConfigure unsigned long ulBase unsigned long ulComp unsigned long ulConfig m void ROM ComparatorlntClear unsigned long ulBase unsigned long ulComp m void ROM Co
282. id ROM USBHostEndpointDataAck unsigned long ulBase unsigned long ulEndpoint ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM USBTABLE is an array of pointers located at ROM APITABLE 16 ROM USBHostEndpointDataAck is a function pointer located at ROM USBTABLE 23 326 January 26 2012 USB Controller Parameters ulBase specifies the USB module base address ulEndpoint is the endpoint to access Description This function acknowledges that the data was read from the endpoint s FIFO This call is used if processing is required between reading the data and acknowledging that the data has been read Note This function should only be called in host mode Returns None 24 3 1 28 ROM_USBHostEndpointDataToggle Sets the value data toggle on an endpoint in host mode Prototype void ROM_USBHostEndpointDataToggle unsigned long ulBase unsigned long ulEndpoint tBoolean bDataToggle unsigned long ulFlags ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM USBTABLE is an array of pointers located at ROM APITABLE 16 ROM USBHostEndpointDataToggle is a function pointer located at ROM USBTABLE 24 Parameters ulBase specifies the USB module base address ulEndpoint specifies the endpoint to reset the data toggle bDataToggle specifies whether to set the state to DATAO or DATA1 ulFlags s
283. ied timer Returns Returns the current value of the timer January 26 2012 22 22 1 UART UART Modun ausencia debi eEeE ER E E REG ERRUERRE REN IGIG RE ERN OAE Deseatan nie eeonidddaiereesaaesenans 259 al e on ERU aaea aaa a A aa a 259 Introduction The Universal Asynchronous Receiver Transmitter UART API provides a set of functions for using the Stellaris UART modules Functions are provided to configure and control the UART modules to send and receive data and to manage interrupts for the UART modules The Stellaris UART performs the functions of parallel to serial and serial to parallel conversions It is very similar in functionality to a 160550 UART but is not register compatible Some of the features of the Stellaris UART are m A 16x12 bit receive FIFO and a 16x8 bit transmit FIFO m Programmable baud rate generator m Automatic generation and stripping of start stop and parity bits m Line break generation and detection Programmable serial interface 5 6 7 or 8 data bits even odd stick or no parity bit generation and detection 10r2 stop bit generation baud rate generation from DC to processor clock 16 IrDA serial IR SIR encoder decoder DMA interface 22 2 Functions Functions void ROM UARTBreakCtl unsigned long ulBase tBoolean bBreakState tBoolean ROM UARTBusy unsigned long ulBase long ROM UARTCharGet unsigned long ulBase long ROM UARTCharGetNonBlocking unsigned long ulBa
284. igned long ulRefresh void ROM EPlbDividerSet unsigned long ulBase unsigned long ulDivider void ROM EPIFIFOConfig unsigned long ulBase unsigned long ulConfig void ROM EPlIIntDisable unsigned long ulBase unsigned long ullntFlags void ROM EPlIntEnable unsigned long ulBase unsigned long ullntFlags void ROM EPlIIntErrorClear unsigned long ulBase unsigned long ulErrFlags unsigned long ROM EPlIIntErrorStatus unsigned long ulBase unsigned long ROM EPlIIntStatus unsigned long ulBase tBoolean bMasked void ROM EPIModeSet unsigned long ulBase unsigned long ulMode unsigned long ROM EPINonBlockingReadAvail unsigned long ulBase void ROM EPINonBlockingReadConfigure unsigned long ulBase unsigned long ulChannel unsigned long ulDataSize unsigned long ulAddress m unsigned long ROM EPINonBlockingReadCount unsigned long ulBase unsigned long ulChannel m unsigned long ROM EPINonBlockingReadGet16 unsigned long ulBase unsigned long ul Count unsigned short pusBuf m unsigned long ROM EPINonBlockingReadGet32 unsigned long ulBase unsigned long ul Count unsigned long pulBuf January 26 2012 External Peripheral Interface EPI m unsigned long ROM_EPINonBlockingReadGet8 unsigned long ulBase unsigned long ul Count unsigned char pucBuf m void ROM EPINonBlockingReadStart unsigned long ulBase unsigned long ulChannel un signed long ulCount m void ROM EPINonBlockingReadStop unsigned long ulBase unsigned lo
285. iguration for the controller Description After the ROM EthernetlnitExpCIk function has been called this API function can be used to configure the various features of the Ethernet controller The Ethernet controller provides three control registers that are used to configure the con troller s operation The transmit control register provides settings to enable full duplex opera tion to auto generate the frame check sequence and to pad the transmit packets to the min imum length as required by the IEEE standard The receive control register provides settings to enable reception of packets with bad frame check sequence values and to enable multi cast or promiscuous modes The ulConfig parameter is the logical OR of the following values m ETH CFG RX BADCRCDIS Disable reception of packets with a bad CRC m ETH CFG RX PRMSEN Enable promiscuous mode reception all packets m ETH CFG RX AMULEN Enable reception of multicast packets January 26 2012 59 Ethernet Controller 8 2 1 3 8 2 1 4 60 m ETH CFG TX DPLXEN Enable full duplex transmit mode m ETH CFG TX CRCEN Enable transmit with auto CRC generation m ETH CFG TX PADEN Enable padding of transmit data to minimum size These bit mapped values are programmed into the transmit receive and or timestamp control register Returns None ROM EthernetDisable Disables the Ethernet controller Prototype void ROM EthernetDisable unsigned long ulBase R
286. igured and the UART pins switched to their hardware function before calling the boot loader January 26 2012 7 Boot Loader 2 2 2 2 2 3 2 2 4 SSI Interface The SSI pins SSIFss SSICIk SSITx and SSIRx are used to communicate with the boot loader The device communicating with the boot loader is responsible for driving the SSIRx SSICIk and SSIFss pins while the Stellaris microcontroller drives the SSITx pin The serial data format is fixed to the Motorola format with SPH set to 1 and SPO set to 1 see the applicable Stellaris family data sheet for more information on this format Since the system clock must be at least 12 times the serial clock rate the maximum serial clock rate that can be used is 1 3 MHz which is 16 MHz divided by 12 When an application calls back to the ROM based boot loader to start an update over the SSI port the SSI configuration and pin configuration is bypassed Therefore the SSI port must be configured and the SSI pins switched to their hardware function before calling the boot loader I2C Interface The I2C pins I2CSCL and I2CSDA are used to communicate with the boot loader The device communicating with the boot loader must operate as the I2C master and provide the I2CSCL signal The I2CSDA pin is open drain and can be driven by either the master or the slave 12C device The 12C interface can run at up to 400 KHz the maximum rate supported by the I2C protocol The boot loader uses an I2C slav
287. ill begin reading data from the external device into the read FIFO The EPI will stop reading when the FIFO fills up and resume reading when the application drains the FIFO until the total specified count of data items has been read Once a read transaction is completed and the FIFO drained another transaction can be started from the next address by calling this function again Returns None ROM EPINonBlockingReadStop Stops a non blocking read transaction Prototype void ROM EPINonBlockingReadStop unsigned long ulBase unsigned long ulChannel ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM EPITABLE is an array of pointers located at ROM_APITABLE 23 ROM EPINonBlockingReadStop is a function pointer located at ROM EPITABLE 10 Parameters ulBase is the EPI module base address ulChannel is the read channel 0 or 1 Description This function cancels a non blocking read transaction that is already in progress Returns None ROM EPIWriteFlFOCountGet Reads the number of empty slots in the write transaction FIFO Prototype unsigned long ROM EPIWriteFIFOCountGet unsigned long ulBase January 26 2012 89 External Peripheral Interface EPI ROM Location ROM API ROM ROM AB EPI Parameters ulBase is the EPI module base address Description This function returns the number of slots available
288. ill enable DMA on a given endpoint and set the mode according to the val ues in the u Flags parameter The ulFlags parameter should have USB EP DEV IN or USB EP DEV OUT set 320 January 26 2012 USB Controller Returns None 24 3 1 19 ROM_USBEndpointStatus Returns the current status of an endpoint Prototype unsigned long ROM_USBEndpointStatus unsigned long ulBase unsigned long ulEndpoint ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM USBTABLE is an array of pointers located at ROM APITABLE 16 ROM USBEndpointStatus is a function pointer located at ROM USBTABLE 14 Parameters ulBase specifies the USB module base address ulEndpoint is the endpoint to access Description This function will return the status of a given endpoint If any of these status January 26 2012 bits need to be cleared then these these values must be cleared by calling the ROM_USBDevEndpointStatusClear or ROM USBHostEndpointStatusClear functions The following are the status flags for host mode m USB HOST IN PID ERROR PID error on the given endpoint m USB HOST IN NOT COMP The device failed to respond to an IN request m USB HOST IN STALL A stall was received on an IN endpoint m USB HOST IN DATA ERROR There was a CRC or bit stuff error on an IN endpoint in Isochronous mode m USB HOST IN NAK TO NAKs received on this IN endpoint for m
289. in s are specified using a bit packed byte where each bit that is set identifies the pin to be accessed and where bit 0 of the byte represents GPIO port pin 0 bit 1 represents GPIO port pin 1 and so on Note This cannot be used to turn any pin into a I2S pin it only configures a I2S pin for proper operation Returns None 11 2 1 23 ROM GPIOPinTypePWM Configures pin s for use by the PWM peripheral Prototype void ROM GPIOPinTypePWM unsigned long ulPort unsigned char ucPins ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM GPIOTABLE is an array of pointers located at ROM_APITABLE 4 ROM GPIOPinTypePWM is a function pointer located at ROM GPIOTABLE 17 116 January 26 2012 GPIO Parameters ulPort is the base address of the GPIO port ucPins is the bit packed representation of the pin s Description The PWM pins must be properly configured for the PWM peripheral to function correctly This function provides a typical configuration for those pin s other configurations may work as well depending upon the board setup for example using the on chip pull ups The pin s are specified using a bit packed byte where each bit that is set identifies the pin to be accessed and where bit 0 of the byte represents GPIO port pin 0 bit 1 represents GPIO port pin 1 and so on Note This cannot be used to turn any pin into a PWM pin it only configures a PWM pin for pro
290. in the transaction FIFO It can be used in a polling method to avoid attempting a write that would stall Returns AB EPIWri E is an array of pointers located at ROM APITABLI E is an array of pointers located at 0x0100 0010 The number of empty slots in the transaction FIFO 90 E 23 teFIFOCountGet is a function pointer located at ROM EPITABLE 17 January 26 2012 10 10 1 10 2 Flash Flash IMPGOMGHON usns tbe E Re EEPEIMRPOO RERATIPEDRPURUNER Lp PP RR RPAd pope eR REN dpd REP RE 91 lale on MR RE ETT T UT UTE a EA 91 Introduction The flash API provides a set of functions for dealing with the on chip flash Functions are provided to program and erase the flash configure the flash protection and handle the flash interrupt The flash is organized as a set of 1 kB blocks that can be individually erased Erasing a block causes the entire contents of the block to be reset to all ones These blocks are paired into a set of 2 kB blocks that can be individually protected The blocks can be marked as read only or execute only providing differing levels of code protection Read only blocks cannot be erased or programmed protecting the contents of those blocks from being modified Execute only blocks can not be erased or programmed and can only be read by the processor instruction fetch mechanism protecting the contents of those blocks from being read by either the processor or by debugge
291. in the transmission The following steps must be performed to successfully receive a packet January 26 2012 Boot Loader Wait for non zero data to be returned from the device This is important as the device may send zero bytes between a sent and received data packet The first non zero byte received will be the size of the packet that is being received Read the next byte which will be the checksum for the packet Read the data bytes from the device There will be packet size 2 bytes of data sent during the data phase For example if the packet size was 3 then there is only 1 byte of data to be received Calculate the checksum of the data bytes and ensure that it matches the checksum received in the packet Send an acknowledge ACK or not acknowledge NAK to the device to indicate the success ful or unsuccessful reception of the packet An acknowledge packet is sent whenever a packet is successfully received and verified by the boot loader A not acknowledge packet is sent whenever a sent packet is detected to have an error usually as a result of a checksum error or just malformed data in the packet This allows the sender to re transmit the previous packet The following commands are used by the custom protocol COMMAND_PING This command is used to receive an acknowledge from the boot 0x20 loader indicating that communication has been established This command is a single byte The format of the com
292. ing number of pins This information can be used to write adaptive software that will run on more than one member of the Stellaris family The device can be clocked from one of five sources an external oscillator the main oscillator the internal oscillator the internal oscillator divided by four or the PLL The PLL can use any of the four oscillators as its input When using the PLL the input clock frequency is constrained to specific frequencies between 3 579545 MHz and 16 384 MHz that is the standard crystal frequencies in that range When direct clocking with an external oscillator or the main oscillator the frequency is constrained to between 0 Hz and 100 MHz depending on the device The internal oscillator is 16 MHz 1 its frequency will vary by device with voltage and with temperature Three modes of operation are supported by the Stellaris family run mode sleep mode and deep sleep mode In run mode the processor is actively executing code In sleep mode the clocking of the device is unchanged but the processor no longer executes code and is no longer clocked In deep sleep mode the clocking of the device may change depending upon the run mode clock configuration and the processor no longer executes code and is no longer clocked An interrupt will return the device to run mode from one of the sleep modes the sleep modes are entered upon request from the code There are several system events that when detected wi
293. ion Allows the specified sample sequence to be captured when its trigger is detected A sample sequence must be configured before it is enabled Returns None ROM_ADCSequenceOverflow Determines if a sample sequence overflow occurred Prototype long ROM_ADCSequenceOverflow unsigned long ulBase unsigned long ulSequenceNum ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM ADCTABLE is an array of pointers located at ROM_APITABLE 5 ROM_ADCSequenceOver flow is a function pointer located at ROM ADCTABLE WO ca Parameters ulBase is the base address of the ADC module ulSequenceNum is the sample sequence number Description This determines if a sample sequence overflow has occurred This will happen if the captured samples are not read from the FIFO before the next trigger occurs Returns Returns zero if there was not an overflow and non zero if there was January 26 2012 35 Analog to Digital Converter ADC 5 2 1 23 5 2 1 24 36 ROM ADCSequenceOverflowClear Clears the overflow condition on a sample sequence Prototype void ROM ADCSequenceOverflowClear unsigned long ulBase unsigned long ulSequenceNum ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM ADCTABLE is an array of pointers located at ROM APITABLE 5 ROM ADCSequenceOverflowClear is a function pointer located at ROM ADCTABLE 10
294. ion ROM APITABLE is an array of pointers located at 0x0100 0010 ROM WATCHDOGTABLE is an array of pointers located at ROM APITABLE 12 ROM WatchdogStallEnable is a function pointer located at ROM WATCHDOGTABLE 13 Parameters ulBase is the base address of the watchdog timer module Description This function allows the watchdog timer to stop counting when the processor is stopped by the debugger By doing so the watchdog is prevented from expiring typically almost immediately from a human time perspective and resetting the system if reset is enabled The watchdog will instead expired after the appropriate number of processor cycles have been executed while debugging or at the appropriate time after the processor has been restarted Returns None 25 2 1 14 ROM WatchdogUnlock Disables the watchdog timer lock mechanism Prototype void ROM WatchdogUnlock unsigned long ulBase 352 January 26 2012 Watchdog Timer ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM WATCHDOGTABLE is an array of pointers located at ROM_APITABLE 12 ROM WatchdogUnlock is a function pointer located at ROM WATCHDOGTABLE 6 Parameters ulBase is the base address of the watchdog timer module Description Enables write access to the watchdog timer configuration registers Returns None 25 2 1 15 ROM WatchdogValueGet Gets the current watchdog timer value Prototype unsign
295. ion pointer located at ROM I2STABLE 15 Parameters ulBase is the I2S module base address Description This function is used to get the value of the receive FIFO service request level This value is set using the ROM I2SRxFIFOLimitSet function Returns Returns the current value of the FIFO service request limit 13 2 1 13 ROM I2SRxFIFOLimitSet Sets the FIFO level at which a service request is generated January 26 2012 149 Inter IC Sound 12S Prototype void ROM I2SRxFIFOLimitSet unsigned long ulBase unsigned long ulLevel ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM I2STABLE is an array of pointers located at ROM APITABLE 22 ROM I2SRxFIFOLimitSet is a function pointer located at ROM I2STABLE np A Parameters ulBase is the 12S module base address ulLevel is the FIFO service request limit Description This function is used to set the receive FIFO fullness level at which a service request will occur The service request is used to generate an interrupt or a DMA transfer request The receive FIFO will generate a service request when the number of items in the FIFO is greater than the level specified in the ulLevel parameter For example if ulLevel is 4 then a service request will be generated when there are more than 4 samples available in the receive FIFO For the purposes of counting the FIFO lev
296. ion sets up the various interrupt trigger mechanisms for the specified pin s on the selected GPIO port The parameter ulIntType is an enumerated data type that can be one of the following values GPIO FALLING EDGE GPIO RISING EDGE GPIO BOTH EDGES GPIO LOW LEVEL GPIO HIGH LEVEL where the different values describe the interrupt detection mechanism edge or level and the particular triggering event falling rising or both edges for edge detect low or high for level detect The pin s are specified using a bit packed byte where each bit that is set identifies the pin to be accessed and where bit 0 of the byte represents GPIO port pin 0 bit 1 represents GPIO port pin 1 and so on Note In order to avoid any spurious interrupts the user must ensure that the GPIO inputs remain stable for the duration of this function Returns None ROM_GPIOPadConfigGet Gets the pad configuration for a pin Prototype void ROM GPIOPadConfigGet unsigned long ulPort unsigned char ucPin unsigned long xpulStrength unsigned long xpulPinType ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM GPIOTABLE is an array of pointers located at ROM_APITABLE 4 ROM GPIOPadConfigGet is a function pointer located at ROM GPIOTABLE Ox Parameters ulPort is the base address of the GPIO port ucPin is the pin number pulStrength is a pointer to storage for the output drive strength
297. is an array of pointers located at 0x0100 0010 ROM COMPARATORTABLE is an array of pointers located at ROM APITABLE 6 ROM ComparatorIntDisable is a function pointer located at ROM COMPARATORTABLE O1 Parameters ulBase is the base address of the comparator module ulComp is the index of the comparator Description This function disables generation of an interrupt from the specified comparator Only compara tors whose interrupts are enabled can be reflected to the processor Returns None January 26 2012 17 Analog Comparator 4 2 1 4 ROM ComparatorlntEnable Enables the comparator interrupt Prototype void ROM ComparatorIntEnable unsigned long ulBase unsigned long ulComp ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM COMPARATORTABLE is an array of pointers located at ROM APITABLE 6 ROM ComparatorIntEnable is a function pointer located at ROM COMPARATORTABLE B m Parameters ulBase is the base address of the comparator module ulComp is the index of the comparator Description This function enables generation of an interrupt from the specified comparator Only compara tors whose interrupts are enabled can be reflected to the processor Returns None 4 2 1 5 ROM ComparatorlntStatus Gets the current interrupt status Prototype tBoolean ROM ComparatorIntStatus unsigned long ulBase unsigned long ulComp tBoolean bMaske
298. it mask of the interrupt sources to be enabled Description Enables the indicated timer interrupt sources Only the sources that are enabled can be re flected to the processor interrupt disabled sources have no effect on the processor The ullntFlags parameter must be the logical OR of any combination of the following TIMER CAPB EVENT Capture B event interrupt TIMER CAPB MATCH Capture B match interrupt m TIMER TIMB TIMEOUT Timer B timeout interrupt m TIMER RTC MATCH RTC interrupt mask m TIMER CAPA EVENT Capture A event interrupt TIMER CAPA MATCH Capture A match interrupt TIMER TIMA TIMEOUT Timer A timeout interrupt Returns None ROM TimerlntStatus Gets the current interrupt status Prototype unsigned long ROM TimerIntStatus unsigned long ulBase tBoolean bMasked ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM TIMERTABLE is an array of pointers located at ROM APITABLE 11 ROM TimerIntStatus is a function pointer located at ROM TIMERTABLE 21 Parameters ulBase is the base address of the timer module January 26 2012 Timer bMasked is false if the raw interrupt status is required and true if the masked interrupt status is required Description This returns the interrupt status for the timer module Either the raw interrupt status or the status of interrupts that are allowed to reflect to the processor can be returned Re
299. it module for operation January 26 2012 Inter IC Sound 12S Prototype void ROM_I2STxDisable unsigned long ulBase ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM I2STABLE is an array of pointers located at ROM APITABLE 22 ROM I2STxDisable is a function pointer located at ROM I2STABLE 2 Parameters ulBase is the I2S module base address Description This function disables the transmit module for operation The module should be disabled before configuration When the module is disabled no data or clocks will be generated on the 12S signals Returns None 13 2 1 18 ROM_l2STxEnable Enables the I2S transmit module for operation Prototype void ROM I2STxEnable unsigned long ulBase ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM I2STABLE is an array of pointers located at ROM APITABLE 22 ROM I2STxEnable is a function pointer located at ROM I2STABLE 1 Parameters ulBase is the I2S module base address Description This function enables the transmit module for operation The module should be enabled after configuration When the module is disabled no data or clocks will be generated on the 12S signals Returns None 13 2 1 19 ROM I2STxFIFOLevelGet Gets the number of samples in the transmit FIFO Prototype unsigned long ROM I2STxFIFOLevelGet unsigned long ulB
300. it will keep counting as if nothing had happened The ulConfig parameter contains the desired configuration It is the logical OR of the following PWM GEN MODE DOWN or PWM GEN MODE UP DOWN to specify the counting mode PWM GEN MODE SYNC or PWM GEN MODE NO SYNC to specify the counter load and comparator update synchronization mode PWM GEN MODE DBG RUN or PWM GEN MODE DBG STOP to specify the debug behavior PWM GEN MODE GEN NO SYNC PWM GEN MODE GEN SYNC LOCAL or PWM GEN MODE GEN SYNC GLOBAL to specify the update synchronization mode for generator counting mode changes PWM GEN MODE DB NO SYNC PWM GEN MODE DB SYNC LOCAL or PWM GEN MODE DB SYNC GLOBAL to specify the deadband parameter syn chronization mode m PWM GEN MODE FAULT LATCHED or PWM GEN MODE FAULT UNLATCHED to specify whether fault conditions are latched or not m PWM GEN MODE FAULT MINPER or PWM GEN MODE FAULT NO MINPER to specify whether minimum fault period support is required m PWM GEN MODE FAULT EXT or PWM GEN MODE FAULT LEGACY to specify whether extended fault source selection support is enabled or not Setting PWM GEN MODE FAULT MINPER allows an application to set the minimum dura tion of a PWM fault signal Fault will be signaled for at least this time even if the external fault pin deasserts earlier Care should be taken when using this mode since during the fault signal period the fault interrupt from the PWM generator will remain asserted The fault interrupt
301. ith the same ID The message identifier filters provide masking that can be programmed to match any or all of the message ID bits and frame types The CAN module is disabled by default so the the ROM CANInit function must be called before any other CAN functions are called This call initializes the message objects to a safe state prior to enabling the controller on the CAN bus Also the bit timing values must be programmed prior to enabling the CAN controller The ROM CANBitTimingSet function should be called with the ap propriate bit timing values for the CAN bus Once these two functions have been called a CAN con troller can be enabled using the ROM CANEnable and later disabled using ROM CANDisable if needed Calling ROM CANDisable does not reinitialize a CAN controller so it can be used to temporarily remove a CAN controller from the bus The CAN controller is highly configurable and contains 32 message objects that can be pro grammed to automatically transmit and receive CAN messages under certain conditions Message objects allow the application to perform some actions automatically without interaction from the microcontroller Some examples of these actions are the following m Send a data frame immediately m Send a data frame when a matching remote frame is seen on the CAN bus m Receive a specific data frame m Receive data frames that match a certain identifier pattern To configure message objects to perform any of thes
302. l 0 or 1 Description This function gets the remaining count of items for a non blocking read transaction Returns The number of items remaining in the non blocking read transaction January 26 2012 9 2 1 17 9 2 1 18 External Peripheral Interface EPI ROM_EPINonBlockingReadGet16 Read available data from the read FIFO as 16 bit data items Prototype unsigned long ROM EPINonBlockingReadGeti6 unsigned long ulBase unsigned long ulCount unsigned short xpusBuf ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM EPITABLE is an array of pointers located at ROM_APITABLE 23 ROM_EPINonBlockingReadGet 16 is a function pointer located at ROM EPITABLE 14 Parameters ulBase is the EPI module base address ulCount is the maximum count of items to read pusBuf is the caller supplied buffer where the read data should be stored Description This function reads 16 bit data items from the read FIFO and stores the values in a caller supplied buffer The function will read and store data from the FIFO until there is no more data in the FIFO or the maximum count is reached as specified in the parameter u Count The actual count of items will be returned Returns The number of items read from the FIFO ROM EPINonBlockingReadGet32 Read available data from the read FIFO as 32 bit data items Prototype unsigned long ROM EPINonBlockin
303. l be twice the size indicated by the u Fi FOSize parameter This means that the USB FIFO SZ 16 DB value will use 32 bytes of the USB controller s FIFO memory The ulFIFOAdaress value should be a multiple of 8 bytes and directly indicates the start ing address in the USB controllers FIFO RAM For example a value of 64 indicates that the FIFO should start 64 bytes into the USB controllers FIFO memory The ulFlags value specifies whether the endpoints OUT or IN FIFO should be configured If in host mode use USB EP HOST OUT or USB EP HOST IN and if in device mode use USB EP DEV OUT or USB EP DEV IN Returns None 24 3 1 23 ROM_USBFIFOFlush Forces a flush of an endpoint s FIFO Prototype void ROM_USBFIFOFlush unsigned long ulBase unsigned long ulEndpoint unsigned long ulFlags ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM USBTABLE is an array of pointers located at ROM APITABLE 16 ROM USBFIFOFIlush is a function pointer located at ROM USBTABLE 18 Parameters ulBase specifies the USB module base address ulEndpoint is the endpoint to access ulFlags specifies if the IN or OUT endpoint should be accessed Description 324 This function will force the controller to flush out the data in the FIFO The function can be called with either host or device controllers and requires the ulFlags parameter be one of USB EP HOST OUT USB EP HOS
304. lBase ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM USBTABLE is an array of pointers located at ROM APITABLE 16 ROM USBHostPwrEnable is a function pointer located at ROM USBTABLE 29 Parameters ulBase specifies the USB module base address Description This function enables the USBEPEN signal to enable an external power supply in host mode operation Note This function should only be called in host mode Returns None 24 3 1 36 ROM USBHostPwrFaultDisable Disables power fault detection Prototype void ROM USBHostPwrFaultDisable unsigned long ulBase ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM USBTABLE is an array of pointers located at ROM APITABLE 16 ROM USBHostPwrFaultDisable is a function pointer located at ROM_USBTABLE 31 Parameters ulBase specifies the USB module base address Description This function disables power fault detection in the USB controller Note This function should only be called in host mode Returns None 24 3 1 37 ROM USBHostPwrFaultEnable Enables power fault detection 332 January 26 2012 USB Controller Prototype void ROM_USBHostPwrFaultEnable unsigned long ulBase ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM USBTABLE is an array of pointers located at ROM APITABLE 16 ROM USBHostP
305. lPort unsigned char ucPins void ROM GPIOPinTypeUSBAnalog unsigned long ulPort unsigned char ucPins void ROM GPIOPinTypeUSBDigital unsigned long ulPort unsigned char ucPins void ROM GPIOPinWrite unsigned long ulPort unsigned char ucPins unsigned char ucVal Function Documentation ROM GPlODirModeGet Gets the direction and mode of a pin Prototype unsigned long ROM GPIODirModeGet unsigned long ulPort unsigned char ucPin ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM GPIOTABLE is an array of pointers located at ROM_APITABLE 4 ROM GPIODirModeGet is a function pointer located at ROM GPIOTABLE 2 January 26 2012 11 2 1 2 GPIO Parameters ulPort is the base address of the GPIO port ucPin is the pin number Description This function gets the direction and control mode for a specified pin on the selected GPIO port The pin can be configured as either an input or output under software control or it can be under hardware control The type of control and direction are returned as an enumerated data type Returns Returns one of the enumerated data types described for ROM GPIODirModeSet ROM GPlODirModeSet Sets the direction and mode of the specified pin s Prototype void ROM GPIODirModeSet unsigned long ulPort unsigned char ucPins unsigned long ulPinIO ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 RO
306. laces the supplied data into the transmit FIFO of the specified SSI module If there is no space in the FIFO then this function returns a zero Note The upper 32 N bits of the u Data are discarded by the hardware where N is the data width as configured by ROM SSIConfigSetExpCIk For example if the interface is configured for 8 bit data width the upper 24 bits of u Data are discarded Returns Returns the number of elements written to the SSI transmit FIFO January 26 2012 211 Synchronous Serial Interface SSI 18 2 1 7 18 2 1 8 212 ROM SSIDisable Disables the synchronous serial interface Prototype void ROM SSIDisable unsigned long ulBase ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM SSITABLE is an array of pointers located at ROM APITABLE 2 ROM SSIDisable is a function pointer located at ROM SSITABLE 3 Parameters ulBase specifies the SSI module base address Description This function disables operation of the synchronous serial interface Returns None ROM SSIDMADisable Disable SSI DMA operation Prototype void ROM SSIDMADisable unsigned long ulBase unsigned long ulDMAFlags ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM SSITABLE is an array of pointers located at ROM APITABLE 2 ROM SSIDMADisable is a function pointer located at ROM SSITABLE 13
307. lavelntEnable Enables the I2C Slave interrupt Prototype void ROM Location ROM I2CSlaveIntEnable unsigned long ulBase ROM APITABLE is an array of pointers located at 0x0100 0010 ROM I2CTABLE is an array of pointers located at ROM_APITABLE 3 ROM I2CSlaveIntEnable is a function pointer located at ROM I2CTABLE Parameters co ulBase is the base address of the I2C Slave module Description Enables the I2C Slave interrupt source Returns None 12 2 1 25 ROM_l2CSlavelntEnableEx Enables individual I2C Slave interrupt sources Prototype void ROM I2CSlaveInt EnableEx unsigned long ulBase ROM Location unsigned long ulIntFlags ROM APITABLE is an array of pointers located at 0x0100 0010 ROM I2CTABLE is an array of pointers located at ROM_APITABLE 3 ROM I2CSlaveIntE inableEx is a function pointer located at ROM I2CTABLE 25 Parameters ulBase is the base address of the I2C Slave module ullntFlags is the bit Description mask of the interrupt sources to be enabled Enables the indicated I2C Slave interrupt sources Only the sources that are enabled can be reflected to the processor interrupt disabled sources have no effect on the processor The ullntFlags parameter is the logical OR of any of the following m I2C SLAVE INT STOP Stop condition detected interrupt m Il2C SLAVE I
308. le DMA on a given endpoint Prototype void ROM_USBEndpointDMADisable unsigned long ulBase unsigned long ulEndpoint unsigned long ulFlags ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM USBTABLE is an array of pointers located at ROM APITABLE 16 ROM USBEndpointDMADisable is a function pointer located at ROM USBTABLE 43 Parameters ulBase specifies the USB module base address ulEndpoint is the endpoint to access ulFlags specifies which direction to disable Description This function will disable DMA on a given end point to allow non DMA USB transactions to gen erate interrupts normally The ulFlags should be USB EP DEV IN or USB EP DEV OUT all other bits are ignored Returns None 24 3 1 18 ROM USBEndpointDMAEnable Enable DMA on a given endpoint Prototype void ROM USBEndpointDMAEnable unsigned long ulBase unsigned long ulEndpoint unsigned long ulFlags ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM USBTABLE is an array of pointers located at ROM APITABLE 16 ROM USBEndpointDMAEnable is a function pointer located at ROM USBTABLE 42 Parameters ulBase specifies the USB module base address ulEndpoint is the endpoint to access ulFlags specifies which direction and what mode to use when enabling DMA Description This function w
309. lears the watchdog timer interrupt Prototype void ROM WatchdogIntClear unsigned long ulBase ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM WATCHDOGTABLE is an array of pointers located at ROM APITABLE 12 ROM WatchdogIntClear is a function pointer located at ROM WATCHDOGTABLE Ce Parameters ulBase is the base address of the watchdog timer module Description The watchdog timer interrupt source is cleared so that it no longer asserts January 26 2012 25 2 1 3 29 2 1 4 Watchdog Timer Note Because there is a write buffer in the Cortex M3 processor it may take several clock cycles before the interrupt source is actually cleared Therefore it is recommended that the interrupt source be cleared early in the interrupt handler as opposed to the very last action to avoid returning from the interrupt handler before the interrupt source is actually cleared Failure to do so may result in the interrupt handler being immediately reentered because the interrupt controller still sees the interrupt source asserted Returns None ROM WatchdoglIntEnable Enables the watchdog timer interrupt Prototype void ROM WatchdogIntEnable unsigned long ulBase ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM WATCHDOGTABLE is an array of pointers located at ROM APITABLE 12 ROM WatchdogIntEnable is a function pointer located at ROM WATCHDOGTABLE 11
310. ler match value When in a 16 bit mode that uses the counter match and the prescaler the prescale match effectively extends the range of the counter to 24 bits Returns None January 26 2012 Timer 21 2 1 19 ROM_TimerPrescaleSet Set the timer prescale value Prototype void ROM_TimerPrescaleSet unsigned long ulBase unsigned long ulTimer unsigned long ulValue ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM TIMERTABLE is an array of pointers located at ROM APITABLE 11 ROM TimerPrescaleSet is a function pointer located at ROM TIMERTABLE 10 Parameters ulBase is the base address of the timer module ulTimer specifies the timer s to adjust must be one of TIMER A TIMER B or TIMER BOTH ulValue is the timer prescale value must be between 0 and 255 inclusive Description This function sets the value of the input clock prescaler The prescaler is only operational when in 16 bit mode and is used to extend the range of the 16 bit timer modes Returns None 21 2 1 20 ROM TimerRTCDisable Disable RTC counting Prototype void ROM TimerRTCDisable unsigned long ulBase ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM TIMERTABLE is an array of pointers located at ROM APITABLE 11 ROM TimerRTCDisable is a function pointer located at ROM TIMERTABLE No Parameters
311. les in a graphical form that helps to illustrate the arrangement of the tables ROM_APITABLE at 0x0100 0010 0 ROM_VERSION 1 pointer to ROM_UARTTABLE pointer to ROM_SSITABLE 3 pointer to ROM_I2CTABLE 4 pointer to ROM_GPIOTABLE ROM GPIOTABLE 0 pointer to ROM GPIOPinWrite 1 pointer to ROM GPIODirModeSet 5 pointer to ROM ADCTABLE 6 pointer to ROM COMPARATORTABLE i 7 pointer to ROM_FLASHTABLE 2 pointer to ROM_GPIODirModeGet pe aie o From this the address of the ROM_GPIOTABLE table is located in the memory location at 0x0100 0020 The address of the ROM_GPIODirModeSet function is contained at offset 0x4 from that table In the function documentation this is represented as ROM APITABLE is an array of pointers located at 0x0100 0010 ROM GPIOTABLE is an array of pointers located at ROM APITABLE 4 ROM GPIODirModesSet is a function pointer located at ROM GPIOTABLE m 1 The Stellaris Peripheral Driver Library contains a file called driverlib rom h that assists with calling the peripheral driver library functions in the ROM The naming conventions for the tables and APIs that are used in this document match those used in that file The following is an example of calling the ROM GPIODirModeSet function define TARGET IS TEMPEST RC5 include inc hw memmap h include inc hw types h include driverlib gpio h include driverlib rom h ROM GPIODirMode
312. ll cause system control to reset the device These events are the input voltage dropping too low the LDO voltage dropping too low an external reset a software reset request and a watchdog timeout The properties of some of these events can be configured and the reason for a reset can be determined from system control Each peripheral in the device can be individually enabled disabled or reset Additionally the set of peripherals that remain enabled during sleep mode and deep sleep mode can be configured allowing custom sleep and deep sleep modes to be defined Care must be taken with deep sleep mode though since in this mode the PLL is no longer used and the system is clocked by the input crystal Peripherals that depend upon a particular input clock rate such as a timer will not operate as expected in deep sleep mode due to the clock rate change these peripherals must either be reconfigured upon entry to and exit from deep sleep mode or simply not enabled in deep sleep mode There are various system events that when detected will cause system control to generate a processor interrupt These events are the PLL achieving lock the internal LDO current limit being exceeded the internal oscillator failing the main oscillator failing the input voltage dropping too low the internal LDO voltage dropping too low and the PLL failing Each of these interrupts can be individually enabled or disabled and the sources must be cleared by the inter
313. lntClr void ROM CANIntDisable unsigned long ulBase unsigned long ullntFlags void ROM CANIntEnable unsigned long ulBase unsigned long ullntFlags unsigned long ROM CANIntStatus unsigned long ulBase tCANIntStsReg elntStsReg void ROM CANMessageClear unsigned long ulBase unsigned long ulObjlD void ROM CANMessageGet unsigned long ulBase unsigned long ulObjID tCANMsgObject xpMsgObject tBoolean bCIrPendinglnt m void ROM CANMessageSet unsigned long ulBase unsigned long ulObjID tCANMsgObject pMsgObject tMsgObjType eMsgType tBoolean ROM CANRetryGet unsigned long ulBase void ROM CANRetrySet unsigned long ulBase tBoolean bAutoRetry unsigned long ROM CANStatusGet unsigned long ulBase tCANStsReg eStatusReg Function Documentation ROM CANBitRateSet This function is used to set the CAN bit timing values to a nominal setting based on a desired bit rate Prototype unsigned long ROM CANBitRateSet unsigned long ulBase unsigned long ulSourceClock unsigned long ulBitRate ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM CANTABLE is an array of pointers located at ROM APITABLE 18 ROM CANBitRateSet is a function pointer located at ROM CANTABLE 16 Parameters ulBase is the base address of the CAN controller ulSourceClock is the system clock for the device in Hz ulBitRate is the desired bit rate Description This function will set the CAN
314. lntFlags void ROM lI2SIntEnable unsigned long ulBase unsigned long ullntFlags unsigned long ROM l2SIntStatus unsigned long ulBase tBoolean bMasked void ROM l2SMasterClockSelect unsigned long ulBase unsigned long ulMClock void ROM I2SRxConfigSet unsigned long ulBase unsigned long ulConfig void ROM I2SRxDataGet unsigned long ulBase unsigned long pulData long ROM l2SRxDataGetNonBlocking unsigned long ulBase unsigned long pulData void ROM I2SRxDisable unsigned long ulBase void ROM I2SRxEnable unsigned long ulBase unsigned long ROM I2SRxFIFOLevelGet unsigned long ulBase unsigned long ROM I2SRxFIFOLimitGet unsigned long ulBase void ROM I2SRxFIFOLimitSet unsigned long ulBase unsigned long ulLevel void ROM I2STxConfigSet unsigned long ulBase unsigned long ulConfig void ROM I2STxDataPut unsigned long ulBase unsigned long ulData long ROM l2STxDataPutNonBlocking unsigned long ulBase unsigned long ulData void ROM I2STxbDisable unsigned long ulBase void ROM I2STxEnable unsigned long ulBase unsigned long ROM I2STxFIFOLevelGet unsigned long ulBase unsigned long ROM I2STxFIFOLimitGet unsigned long ulBase void ROM I2STxFlIFOLimitSet unsigned long ulBase unsigned long ulLevel void ROM I2STxRxConfigSet unsigned long ulBase unsigned long ulConfig void ROM I2STxRxbDisable unsigned long ulBase void ROM I2STxRxEnable unsigned long ulBase Function Documentation ROM I2SIntClear Clears pending I
315. located at ROM APITABLE 17 ROM uDMAChannelModeGet is a function pointer located at ROM UDMATABLE 16 Parameters ulChannelStructindex is the logical OR of the uDMA channel number with either UDMA PRI SELECT or UDMA ALT SELECT Description This function is used to get the transfer mode for the uDMA channel It can be used to query the status of a transfer on a channel When the transfer is complete the mode will be UDMA MODE STOP January 26 2012 291 uDMA Controller Returns Returns the transfer mode of the specified channel and control structure which will be one of the following values UDMA MODE STOP UDMA MODE BASIC UDMA MODE AUTO UDMA MODE PINGPONG UDMA MODE MEM SCATTER GATHER or UDMA_MODE_PER_SCATTER_GATHER 23 2 1 9 ROM uDMAChannelRequest 292 Requests a uDMA channel to start a transfer Prototype void ROM uDMAChannelRequest unsigned long ulChannelNum ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM UDMATABLE is an array of pointers located at ROM APITABLE 17 ROM uDMAChannelRequest is a function pointer located at ROM UDMATABLE 10 Parameters ulChannelNum is the channel number on which to request a uDMA transfer Description This function allows software to request a uDMA channel to begin a transfer This could be used for performing a memory to memory transfer or if for some reason a transfer needs to be initiated by software instea
316. long ROM l2CMasterDataGet unsigned long ulBase void ROM l2CMasterDataPut unsigned long ulBase unsigned char ucData void ROM l2CMasterDisable unsigned long ulBase void ROM l2CMasterEnable unsigned long ulBase unsigned long ROM l2CMasterErr unsigned long ulBase void ROM I2CMasterlnitExpCIk unsigned long ulBase unsigned long ull2CCIk tBoolean bFast void ROM I2CMasterlntClear unsigned long ulBase void ROM l2CMasterlntDisable unsigned long ulBase void ROM l2CMasterlntEnable unsigned long ulBase tBoolean ROM l2CMasterlntStatus unsigned long ulBase tBoolean bMasked void ROM l2CMasterSlaveAddrSet unsigned long ulBase unsigned char ucSlaveAddr tBoolean bReceive unsigned long ROM l2CSlaveDataGet unsigned long ulBase void ROM I2CSlaveDataPut unsigned long ulBase unsigned char ucData January 26 2012 Inter Integrated Circuit I2C void ROM I2CSlaveDisable unsigned long ulBase void ROM I2CSlaveEnable unsigned long ulBase void ROM I2CSlavelnit unsigned long ulBase unsigned char ucSlaveAddr void ROM I2CSlavelntClear unsigned long ulBase void ROM I2CSlavelntClearEx unsigned long ulBase unsigned long ullntFlags void ROM I2CSlavelntDisable unsigned long ulBase void ROM I2CSlavelntDisableEx unsigned long ulBase unsigned long ullntFlags void ROM I2CSlavelntEnable unsigned long ulBase void ROM l2CSlavelntEnableEx unsigned long ulBase unsigned long ullntFlags tBoolean ROM l2CSlavelntStatus u
317. long ulBase unsigned long ulParity ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM UARTTABLE is an array of pointers located at ROM APITABLE 1 ROM UARTParityModeSet is a function pointer located at ROM UARTTABLE 1 Parameters ulBase is the base address of the UART port ulParity specifies the type of parity to use Description Sets the type of parity to use for transmitting and expect when receiving The ulPar ity parameter must be one of UART CONFIG PAR NONE UART CONFIG PAR EVEN UART CONFIG PAR ODD UART CONFIG PAR ONE or UART CONFIG PAR ZERO The last two allow direct control of the parity bit it is always either one or zero based on the mode Returns None January 26 2012 273 UART 22 2 1 26 ROM UARTRxErrorClear Clears all reported receiver errors Prototype void ROM UARTRxErrorClear unsigned long ulBase ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM UARTTABLE is an array of pointers located at ROM APITABLE 1 ROM UARTRxErrorClear is a function pointer located at ROM UARTTABLE Ww Ce Parameters ulBase is the base address of the UART port Description This function is used to clear all receiver error conditions reported via ROM_UARTRxErrorGet If using the overrun framing error parity error or break inter rupts this function must be called after clearing t
318. long ulComp January 26 2012 Analog Comparator ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM_COMPARATORTABLE is an array of pointers located at ROM_APITABLE 6 ROM ComparatorIntClear is a function pointer located at ROM_COMPARATORTABLE Parameters ulBase is the base address of the comparator module ulComp is the index of the comparator Description The comparator interrupt is cleared so that it no longer asserts This function must be called in the interrupt handler to keep the handler from being called again immediately upon exit Note that for a level triggered interrupt the interrupt cannot be cleared until it stops asserting Note Because there is a write buffer in the Cortex M3 processor it may take several clock cycles before the interrupt source is actually cleared Therefore it is recommended that the interrupt source be cleared early in the interrupt handler as opposed to the very last action to avoid returning from the interrupt handler before the interrupt source is actually cleared Failure to do so may result in the interrupt handler being immediately reentered because the interrupt controller still sees the interrupt source asserted Returns None 4 2 4 8 ROM ComparatorlntDisable Disables the comparator interrupt Prototype void ROM ComparatorIntDisable unsigned long ulBase unsigned long ulComp ROM Location ROM APITABLE
319. lowing example address The numbers are shown in hexadecimal format AC DE 48 00 00 80 In this representation the first three octets AC DE 48 are the Organizationally Unique Iden tifier OUI This is a number assigned by the IEEE to an organization that requests a block of MAC addresses The last three octets 00 00 80 are a 24 bit number managed by the OUI owner to uniquely identify a piece of hardware within that organization that is to be connected to the Ethernet In this representation the octets are transmitted from left to right with the AC octet being transmitted first and the 80 octet being transmitted last Within an octet the bits are transmit ted LSB to MSB For this address the first bit to be transmitted would be 0 the LSB of AC and the last bit to be transmitted would be 1 the MSB of 80 Returns None 8 2 1 12 ROM EthernetPacketAvail January 26 2012 Check for packet available from the Ethernet controller Prototype tBoolean ROM EthernetPacketAvail unsigned long ulBase 65 Ethernet Controller 8 2 1 13 66 ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM ETHERNETTABLE is an array of pointers located at ROM APITABLE 15 ROM EthernetPacketAvail is afunction pointer located at ROM ETHERNETTABLE 8 Parameters ulBase is the base address of the controller Description The Ethernet
320. lues and must be cleared prior to enabling the CAN controller the first time This prevents unwanted transmission or reception of data before the message objects are configured This function must be called before enabling the controller the first time Returns None ROM CANIntClear Clears a CAN interrupt source Prototype void ROM CANIntClear unsigned long ulBase unsigned long ulIntClr ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM CANTABLE is an array of pointers located at ROM APITABLE 18 ROM CANIntClear is a function pointer located at ROM_CANTABLE 0 Parameters ulBase is the base address of the CAN controller ullntCir is a value indicating which interrupt source to clear Description This function can be used to clear a specific interrupt source The ullntClr parameter should be one of the following values January 26 2012 45 Controller Area Network CAN 6 2 1 9 6 2 1 10 46 CAN_INT_INTID_STATUS Clears a status interrupt m 1 32 Clears the specified message object interrupt It is not necessary to use this function to clear an interrupt This should only be used if the application wants to clear an interrupt source without taking the normal interrupt action Normally the status interrupt is cleared by reading the controller status using ROM CANStatusGet A specific message object interrupt is normally cleared by readin
321. m EPI ADDR RAM BASE NONE EPI ADDR RAM BASE 6 or EPI ADDR RAM BASE 8 to choose the base address of the RAM space as none 0x60000000 or 0x80000000 Returns None January 26 2012 75 External Peripheral Interface EP 9 2 1 2 ROM_EPIConfigGPModeSet Configures the interface for general purpose mode operation Prototype void ROM EPIConfigGPModeSet unsigned long ulBase unsigned long ulConfig u u unsigned long ulFrameCount unsigned long ulMaxWait ROM Location ROM_APITABLE is an array of pointers located at 0x0100 0010 ROM ROM Paramet EPITABLE is an array of pointers located at ROM APITABLE 23 EPIConfigGPModeSet is a function pointer located at ROM EPITABLE 4 ers ulBase is the EPI module base address ulConfig is the interface configuration ulFrameCount is the frame size in clocks if the frame signal is used 0 15 ulMaxWait is the maximum number of external clocks to wait when the external clock enable is holding off the transaction 0 255 Description This function is used to configure the interface when used in general purpose operation as chosen with the function ROM EPIModeSet The parameter u Config is the logical OR of any The of the following EPI GPMODE CLKPIN interface clock is output on a pin EPI GPMODE CLKGATE clock is stopped when there is no transaction otherwise it is free running
322. mand is as follows unsigned char ucCommand 1 ucCommand 0 COMMAND_PING COMMAND_DOWNLOAD This command is sent to the boot loader to indicate where 0x21 to store data and how many bytes will be sent by the January 26 2012 COMMAND_SEND_DATA commands that follow The command consists of two 32 bit values that are both transferred MSB first The first 32 bit value is the address to start programming data into while the second is the 32 bit size of the data that will be sent This command also triggers a mass erase of the flash which causes the command to take longer to send the ACK NAK in response to the command This command should be followed by a COMMAND_GET_STATUS to ensure that the program ad dress and program size were valid for the microcontroller running the boot loader The format of the command is as follows unsigned char ucCommand 9 ucCommand 0 COMMAND DOWNLOAD ucCommand 1 Program Address 31 24 ucCommand 2 Program Address 23 16 ucCommand 3 Program Address 15 8 ucCommand 4 Program Address 7 0 ucCommand 5 Program Size 31 24 ucCommand 6 Program Size 23 16 ucCommand 7 Program Size 15 8 ucCommand 8 Program Size 7 0 Boot Loader COMMAND RUN 0x22 COMMAND GET STATUS 0x23 10 This command is sent to the boot loader to transfer execution control to the specified address The command is followed by a 32 bit value transferred MSB first tha
323. med one time between an erase of that page programming a word multiple times will result in an unpredictable value in that word of flash Since the flash is programmed one word at a time the starting address and byte count must both be multiples of four It is up to the caller to verify the programmed contents if such verification is required This function will not return until the data has been programmed Returns Returns 0 on success or 1 if a programming error is encountered 10 2 1 7 ROM FlashProtectGet Gets the protection setting for a block of flash Prototype tFlashProtection ROM FlashProtectGet unsigned long ulAddress ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM FLASHTABLE is an array of pointers located at ROM APITABLE 7 ROM FlashProtectGet is a function pointer located at ROM FLASHTABLE ad i Parameters ulAddress is the start address of the flash block to be queried Description This function will get the current protection for the specified 2 kB block of flash Each block can be read write read only or execute only Read write blocks can be read executed erased and programmed Read only blocks can be read and executed Execute only blocks can only be executed processor and debugger data reads are not allowed Returns Returns the protection setting for this block See ROM FlashProtectSet for possible values 10 2 1 8 ROM FlashProtectSave
324. merPrescaleSet unsigned long ulBase unsigned long ulTimer unsigned long ulValue void ROM TimerRTCDisable unsigned long ulBase void ROM TimerRTCEnable unsigned long ulBase unsigned long ROM TimerValueGet unsigned long ulBase unsigned long ulTimer Function Documentation ROM TimerConfigure Configures the timer s Prototype void ROM TimerConfigure unsigned long ulBase unsigned long ulConfig ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM TIMERTABLE is an array of pointers located at ROM APITABLE 11 ROM TimerConfigure is a function pointer located at ROM TIMERTABLE 3 Parameters ulBase is the base address of the timer module ulConfig is the configuration for the timer Description This function configures the operating mode of the timer s The timer module is disabled before being configured and is left in the disabled state The configuration is specified in ulConfig as one of the following values January 26 2012 21 2 1 2 January 26 2012 Timer TIMER CFG 32 BIT OS 32 bit one shot timer m TIMER CFG 32 BIT OS UP 32 bit one shot timer that counts up instead of down m TIMER CFG 32 BIT PER 32 bit periodic timer m TIMER CFG 32 BIT PER UP 32 bit periodic timer that counts up instead of down m TIMER CFG 32 RTC 32 bit real time clock timer m TIMER CFG 16 BIT PAIR Two 16 bit timers When configured for a pair of
325. meters ulBase is the base address of the UART port ulDMAFlags is a bit mask of the DMA features to enable Description The specified UART DMA features are enabled The UART can be configured to use DMA for transmit or receive and to disable receive if an error occurs The u IDMAFlags parameter is the logical OR of any of the following values m UART DMA RX enable DMA for receive m UART DMA TX enable DMA for transmit m UART DMA ERR RXSTOP disable DMA receive on UART error Note The uDMA controller must also be set up before DMA can be used with the UART Returns None 22 2 1 14 ROM UARTEnable Enables transmitting and receiving Prototype void ROM UAR Enable unsigned long ulBase ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM UARTTABLE is an array of pointers located at ROM APITABLE 1 ROM UARTEnable is a function pointer located at ROM UARTTABLE Parameters ulBase is the base address of the UART port Description Sets the UARTEN TXE and RXE bits and enables the transmit and receive FIFOs Returns None January 26 2012 267 UART 22 2 1 15 ROM_UARTEnableSIR Enables SIR IrDA mode on the specified UART Prototype void ROM_UARTEnableSIR unsigned long ulBase tBoolean bLowPower ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM UARTTABLE is an array of pointers located at ROM API
326. meters ulPort is the base address of the GPIO port ucPins is the bit packed representation of the pin s Description The I2C pins must be properly configured for the 12C peripheral to function correctly This function provides the proper configuration for those pin s The pin s are specified using a bit packed byte where each bit that is set identifies the pin to be accessed and where bit 0 of the byte represents GPIO port pin 0 bit 1 represents GPIO port pin 1 and so on Note This cannot be used to turn any pin into an I2C pin it only configures an I2C pin for proper operation January 26 2012 115 GPIO Returns None 11 2 1 22 ROM GPIOPinTypel2S Configures pin s for use by the I2S peripheral Prototype void ROM GPIOPinTypeIl2S unsigned long ulPort unsigned char ucPins ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM GPIOTABLE is an array of pointers located at ROM_APITABLE 4 ROM GPIOPinTypeI28S is a function pointer located at ROM GPIOTABLE 25 Parameters ulPort is the base address of the GPIO port ucPins is the bit packed representation of the pin s Description Some 12S pins must be properly configured for the I2S peripheral to function correctly This function provides a typical configuration for the digital 12S pin s other configurations may work as well depending upon the board setup for example using the on chip pull ups The p
327. modules The I2C master and slave modules provide the ability to communicate to other IC devices over an I2C bus The I2C bus is specified to support devices that can both transmit and receive write and read data Also devices on the I2C bus can be designated as either a master or a slave The Stellaris I2C modules support both sending and receiving data as either a master or a slave and also support the simultaneous operation as both a master and a slave Finally the Stellaris 12C modules can operate at two speeds Standard 100 kb s and Fast 400 kb s Both the master and slave I2C modules can generate interrupts The I2C master module will generate interrupts when a transmit or receive operation is completed or aborted due to an error The 12C slave module will generate interrupts when data has been sent or requested by a master 12 1 1 Master Operations When using this API to drive the I2C master module the user must first initialize the I2C master module with a call to ROM l2CMasterlnitExpCIk That function will set the bus speed and enable the master module The user may transmit or receive data after the successful initialization of the 12C master module Data is transferred by first setting the slave address using ROM l2CMasterSlaveAddrSet That function is also used to define whether the transfer is a send a write to the slave from the master or a receive a read from the slave by the master Then if connected to an I2C bu
328. mparatorlntDisable unsigned long ulBase unsigned long ulComp m void ROM ComparatorlntEnable unsigned long ulBase unsigned long ulComp m tBoolean ROM ComparatorIntStatus unsigned long ulBase unsigned long ulComp tBoolean bMasked m void ROM ComparatorRefSet unsigned long ulBase unsigned long ulRef m tBoolean ROM ComparatorValueGet unsigned long ulBase unsigned long ulComp Function Documentation ROM ComparatorConfigure Configures a comparator Prototype void ROM ComparatorConfigure unsigned long ulBase unsigned long ulComp unsigned long ulConfig ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM COMPARATORTABLE is an array of pointers located at ROM APITABLE 6 ROM ComparatorConfigure is a function pointer located at ROM_COMPARATORTABLE 1 January 26 2012 15 Analog Comparator 4 2 1 2 16 Parameters ulBase is the base address of the comparator module ulComp is the index of the comparator to configure ulConfig is the configuration of the comparator Description This function configures a comparator The u Config parameter is the result of a logical OR operation between the COMP TRIG xxx COMP INT xxx COMP ASRCP xxx and COMP OUTPUT xxx values The COMP TRIG xxx term can take on the following values m COMP TRIG NONE to have no trigger to the ADC COMP TRIG HIGH to trigger the ADC when the comparator output is high COMP TRIG LOW to
329. must be cleared by calling ROM uDMAErrorStatusClear Note Many of the API functions take a channel parameter that includes the logical OR of one of the values UDMA PRI SELECT or UDMA ALT SELECT to choose the primary or alternate control structure For Basic and Auto transfer modes only the primary control structure is needed The alternate control structure is only needed for complex transfer modes of Ping pong or Scatter gather Refer to the device data sheet for detailed information about transfer modes 23 2 Functions Functions m void ROM uDMAChannelAttributeDisable unsigned long ulChannelNum unsigned long ulAttr m void ROM_uDMAChannelAttributeEnable unsigned long ulChannelNum unsigned long ulAttr unsigned long ROM uDMAChannelAttributeGet unsigned long ulChannelNum void ROM uDMAChannelControlSet unsigned long ulChannelStructIndex unsigned long ul Control void ROM uDMAChannelDisable unsigned long ulChannelNum void ROM uDMAChannelEnable unsigned long ulChannelNum tBoolean ROM uDMAChannellsEnabled unsigned long ulChannelNum unsigned long ROM uDMAChannelModeGet unsigned long ulChannelStructIndex void ROM uDMAChannelRequest unsigned long ulChannelNum void ROM uDMAChannelScatterGatherSet unsigned long ulChannelNum unsigned ul TaskCount void pvTaskList unsigned long ullsPeriphSG void ROM uDMAChannelSelectDefault unsigned long ulDefPeriphs void ROM uDMAChannelSelectSecondary unsigned long ulSecPeriph
330. n the ROM EthernetlnitExpCIk function must be called first to prepare the Ethernet controller for operation This function will configure the Ethernet controller options that are based on system parameters such as the system clock speed Once initialized access to the PHY is available via the ROM EthernetPHYRead and ROM EthernetPHYWrite functions By default the PHY will auto negotiate the line speed and duplex modes For most applications this will be sufficient If a special configuration is required the PHY read and write functions can be used to reconfigure the PHY to the desired mode of operation The MAC must also be configured using the ROM EthernetConfigSet function The parameters for this function will allow the configuration of options such as Promiscuous Mode Multicast Re ception Transmit Data Length Padding and so on The ROM EthernetConfigGet function can be used to query the current configuration of the Ethernet MAC The MAC address used for incoming packet filtering must also be programmed using the ROM EthernetMACAddrSet function The current value can be queried using the ROM EthernetMACAdarGet function When configuration has been completed the Ethernet controller can be enabled using the ROM EthernetEnable function When getting ready to terminate operations on the Ethernet con troller the ROM EthernetDisable function may be called After the Ethernet controller has been enabled Ethernet frames
331. n be returned Returns The current interrupt status enumerated as a bit field of SSI TXFF SSI RXFF SSI RXTO and SSI RXOR 18 2 1 15 ROM UpdateSSI Starts an update over the SSIO interface Prototype void ROM UpdatesSSI void ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM SSITABLE is an array of pointers located at ROM APITABLE 2 ROM UpdateSSI is a function pointer located at ROM SSITABLE 11 Description Calling this function commences an update of the firmware via the SSIO interface This function assumes that the SSIO interface has already been configured and is currently oprational Returns Never returns 216 January 26 2012 System Control 19 System Control MRCS ic wile xod E REO dd icon dabas untebad d dca to UR aca Mined eed do rie Ua duo uid Ganesan aS antra 217 PIA EE Eo S OPE db metu EE Rat oum ds MeL CLA EM ies bed cru M ieee VINE IE 218 19 1 Introduction System control determines the overall operation of the device It controls the clocking of the device the set of peripherals that are enabled configuration of the device and its resets and provides information about the device The members of the Stellaris family have a varying peripheral set and memory sizes The device has a set of read only registers that indicate the size of the memories the peripherals that are present and the pins that are present for peripherals that have a vary
332. nable Enables a peripheral in deep sleep mode Prototype void ROM SysCtlPeripheralDeepSleepEnable unsigned long ulPeripheral ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM SYSCTLTABLE is an array of pointers located at ROM APITABLE 13 ROM SysCtlPeripheralDeepSleepEnable is a function pointer located at ROM SYSCTLTABLE 10 Parameters ulPeripheral is the peripheral to enable in deep sleep mode Description January 26 2012 This function allows a peripheral to continue operating when the processor goes into deep sleep mode Since the clocking configuration of the device may change not all peripherals can safely continue operating while the processor is in sleep mode Those that must run at a particular frequency such as a timer will not work as expected if the clock changes It is the responsibility of the caller to make sensible choices Deep sleep mode clocking of peripherals must be enabled via ROM SysCtlPeripheralClockGating if disabled the peripheral deep sleep mode con figuration is maintained but has no effect when deep sleep mode is entered The ulPeripheral parameter must be only one of the following values SYSCTL PERIPH ADCO SYSCTL PERIPH ADC1 SYSCTL PERIPH CANO SYSCTL PERIPH CANT SYSCTL PERIPH CAN2 SYSCTL PERIPH COMPO SYSCTL PERIPH COMP 1 SYSCTL PERIPH COMP2 SYSCTL PERIPH EPIO SYSCTL PERIPH ETH SYS
333. nabled the previous timer in the trigger chain must count to its timeout in order for this timer to start counting Refer to the data sheet for a description of the trigger chain Returns None ROM TimerDisable Disables the timer s Prototype void ROM TimerDisable unsigned long ulBase unsigned long ulTimer January 26 2012 249 Timer 22 7 21 2 1 8 250 ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM TIMERTABLE is an array of pointers located at ROM APITABLE 11 ROM TimerDisable is a function pointer located at ROM TIMERTABLE 2 Parameters ulBase is the base address of the timer module ulTimer specifies the timer s to disable must be one of TIMER A TIMER B or TIMER BOTH Description This will disable operation of the timer module Returns None ROM TimerEnable Enables the timer s Prototype void ROM TimerEnable unsigned long ulBase unsigned long ulTimer ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM TIMERTABLE is an array of pointers located at ROM APITABLE 11 ROM TimerEnable is a function pointer located at ROM TIMERTABLE 1 Parameters ulBase is the base address of the timer module ulTimer specifies the timer s to enable must be one of TIMER A TIMER B or TIMER BOTH Description This will enable operation
334. nabled with ROM SysCtlPeripheralClockGating otherwise all peripherals continue to operate Returns None 19 2 1 33 ROM SysCtlSRAMSizeGet Gets the size of the SRAM Prototype unsigned long ROM SysCtlSRAMSizeGet void ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM SYSCTLTABLE is an array of pointers located at ROM APITABLE 13 ROM SysCtlSRAMSizeGet is a function pointer located at ROM SYSCTLTABLE mn c Description This function determines the size of the SRAM on the Stellaris device Returns The total number of bytes of SRAM 19 2 1 34 ROM SysCIlUSBPLLDisable Powers down the USB PLL Prototype void ROM SysCtlUSBPLLDisable void 238 January 26 2012 System Control ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM SYSCTLTABLE is an array of pointers located at ROM APITABLE 13 ROM SysCtlUSBPLLDisable is a function pointer located at ROM SYSCTLTABLE 32 Description This function will disable the USB controllers PLL which is used by it s physical layer The USB registers are still accessible but the physical layer will no longer function Returns None 19 2 1 35 ROM SysCtlUSBPLLEnable Powers up the USB PLL Prototype void ROM SysCtlUSBPLLEnable void ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM SYSCTLTABLE is an array of pointers located at ROM AP
335. nction will cause the soft connect feature of the USB controller to be enabled Call ROM USBDevDisconnect to remove the USB device from the bus Note This function should only be called in device mode Returns None ROM USBDewvDisconnect Removes the USB controller from the bus in device mode Prototype void ROM USBDevDisconnect unsigned long ulBase ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM USBTABLE is an array of pointers located at ROM APITABLE 16 ROM USBDevDisconnect is a function pointer located at ROM USBTABLE Ps ii Parameters ulBase specifies the USB module base address Description This function will cause the soft connect feature of the USB controller to remove the device from the USB bus A call to ROM USBDevConnect is needed to reconnect to the bus Note This function should only be called in device mode January 26 2012 311 USB Controller 24 3 1 5 24 3 1 6 312 Returns None ROM_USBDevEndpointConfigGet Gets the current configuration for an endpoint Prototype void ROM_USBDevEndpointConfigGet unsigned long ulBase unsigned long ulEndpoint unsigned long xpulMaxPacketSize unsigned long pulFlags ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM USBTABLE is an array of pointers located at ROM APITABLE 16 ROM USBDevEndpointConfigGet is a function pointer
336. needed when the USB is going to be used with the uDMA controller and the source or destination address needs to be set to the physical FIFO address for a given endpoint Returns None January 26 2012 USB Controller 24 3 1 21 ROM_USBFIFOConfigGet Returns the FIFO configuration for an endpoint Prototype void ROM_USBFIFOConfigGet unsigned long ulBase unsigned long ulEndpoint unsigned long xpulFIFOAddress unsigned long xpulFIFOSize unsigned long ulFlags ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM USBTABLE is an array of pointers located at ROM APITABLE 16 ROM USBFIFOConfigGet is a function pointer located at ROM USBTABLE 16 Parameters ulBase specifies the USB module base address ulEndpoint is the endpoint to access pulFIFOAddress is the starting address for the FIFO pulFIFOSize is the size of the FIFO in bytes ulFlags specifies what information to retrieve from the FIFO configuration Description This function will return the starting address and size of the FIFO for a given endpoint End point zero does not have a dynamically configurable FIFO so this function should not be called for endpoint zero The ulFlags parameter specifies whether the endpoint s OUT or IN FIFO should be read If in host mode the u Flags parameter should be USB EP HOST OUT or USB EP HOST IN and if in device mode the ulFlags parameter should be either
337. ng ulChannel m unsigned long ROM EPIWriteFIFOCountGet unsigned long ulBase 9 2 1 Function Documentation 9 2 1 1 ROM EPlIAddressMapSet Configures the address map for the external interface Prototype void ROM EPIAddressMapSet unsigned long ulBase unsigned long ulMap ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM EPITABLE is an array of pointers located at ROM APITABLE 23 ROM EPIAddressMapSet is a function pointer located at ROM EPITABLE i a Parameters ulBase is the EPI module base address ulMap is the address mapping configuration Description This function is used to configure the address mapping for the external interface This de termines the base address of the external memory or device within the processor peripheral and or memory space The parameter u Map is the logical OR of the following m EPI ADDR PER SIZE 256B EPI ADDR PER SIZE 64KB EPI ADDR PER SIZE 16MB or EPI ADDR PER SIZE 512MB to choose a pe ripheral address space of 256 bytes 64 Kbytes 16 Mbytes or 512 Mbytes m EPI ADDR PER BASE NONE EPI ADDR PER BASE A or EPI ADDR PER BASE C to choose the base address of the peripheral space as none 0xA0000000 or 0xC0000000 m EPI ADDR RAM SIZE 256B EPI ADDR RAM SIZE 64KB EPI ADDR RAM SIZE 16MB or EPI ADDR RAM SIZE 512MB to choose a RAM address space of 256 bytes 64 Kbytes 16 Mbytes or 512 Mbytes
338. ng ulSequenceNum unsigned long pulBuffer void ROM ADCSequenceDisable unsigned long ulBase unsigned long ulSequenceNum void ROM ADCSequenceEnable unsigned long ulBase unsigned long ulSequenceNum long ROM ADCSequenceOverflow unsigned long ulBase unsigned long ulSequenceNum void ROM ADCSequenceOverflowClear unsigned long ulBase unsigned long ulSequen ceNum void ROM ADCSequenceStepConfigure unsigned long ulBase unsigned long ulSequen ceNum unsigned long ulStep unsigned long ulConfig long ROM ADCSequenceUnderflow unsigned long ulBase unsigned long ulSequenceNum void ROM ADCSequenceUnderflowClear unsigned long ulBase unsigned long ulSequen ceNum Function Documentation ROM ADCComparatorConfigure Configures an ADC digital comparator Prototype void ROM ADCComparatorConfigure unsigned long ulBase unsigned long ulComp unsigned long ulConfig ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM ADCTABLE is an array of pointers located at ROM_APITABLE 5 ROM ADCComparatorConfigure is a function pointer located at ROM ADCTABLE 15 Parameters ulBase is the base address of the ADC module ulComp is the index of the comparator to configure ulConfig is the configuration of the comparator Description This function will configure a comparator The u Config parameter is the result of a logical OR operation between the ADC COMP
339. nnelStructindex parameter should be the logical OR of the channel number with one of UDMA PRI SELECT or UDMA ALT SELECT to choose whether the primary or alternate data structure is used The ulMode parameter should be one of the following values m UDMA MODE STOP stops the uDMA transfer The controller sets the mode to this value at the end of a transfer m UDMA MODE BASIC to perform a basic transfer based on request January 26 2012 297 uDMA Controller UDMA_MODE_AUTO to perform a transfer that will always complete once started even if request is removed m UDMA MODE PINGPONG io set up a transfer that switches between the primary and alternate control structures for the channel This allows use of ping pong buffering for uDMA transfers UDMA MODE MEM SCATTER GATHER to set up a memory scatter gather transfer UDMA MODE PER SCATTER GATHER to set up a peripheral scatter gather transfer The pvSrcAdar and pvDstAddr parameters are pointers to the first location of the data to be transferred These addresses should be aligned according to the item size The compiler will take care of this if the pointers are pointing to storage of the appropriate data type The ulTransferSize parameter is the number of data items not the number of bytes The two scatter gather modes memory and peripheral are actually different depending on whether the primary or alternate control structure is selected This function will look for the UDMA PRI SELEC
340. nsigned long ulBase tBoolean bMasked unsigned long ROM l2CSlavelntStatusEx unsigned long ulBase tBoolean bMasked unsigned long ROM l2CSlaveStatus unsigned long ulBase void ROM Updatel2C void 12 2 4 Function Documentation 12 2 1 1 ROM l2CMasterBusBusy Indicates whether or not the I2C bus is busy Prototype tBoolean ROM_I2CMasterBusBusy unsigned long ulBase ROM Location ROM_APITABLE is an array of pointers located at 0x0100 0010 ROM_I2CTABLE is an array of pointers located at ROM APITABLE 3 ROM I2CMasterBusBusy is a function pointer located at ROM I2CTABLE 17 Parameters ulBase is the base address of the I2C Master module Description This function returns an indication of whether or not the I2C bus is busy This function can be used in a multi master environment to determine if another master is currently using the bus Returns Returns true if the I2C bus is busy otherwise returns false 12 2 1 2 ROM l2CMasterBusy Indicates whether or not the I2C Master is busy Prototype tBoolean ROM I2CMasterBusy unsigned long ulBase January 26 2012 125 Inter Integrated Circuit I2C 12 2 1 3 ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM I2CTABLE is an array of pointers located at ROM_APITABLE 3 ROM I2CMasterBusy is a function pointer located at ROM I2CTABLE 16 Parameters ulBase is the base addr
341. ntDisable unsigned long ulBase unsigned long ulGenFault January 26 2012 189 Pulse Width Modulator PWM ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM PWMTABLE is an array of pointers located at ROM_APITABLE 8 ROM PWMIntDisable is a function pointer located at ROM PWMTABLE 19 Parameters ulBase is the base address of the PWM module ulGenFault contains the interrupts to be disabled Must be a logical OR of any of PWM INT GEN 0 PWM INT GEN 1 PWM INT GEN 2 PWM INT GEN 3 PWM INT FAULTO PWM INT FAULT1 PWM INT FAULT2 or PWM INT FAULTS Description Masks the specified interrupt s by clearing the specified bits of the interrupt enable register for the selected PWM module Returns None 16 2 1 20 ROM PWMIntEnable 16 2 1 21 190 Enables generator and fault interrupts for a PWM module Prototype void ROM PWMIntEnable unsigned long ulBase unsigned long ulGenFault ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM PWMTABLE is an array of pointers located at ROM APITABLE 8 ROM PWMIntEnable is a function pointer located at ROM PWMTABLE 18 Parameters ulBase is the base address of the PWM module ulGenFault contains the interrupts to be enabled Must be a logical OR of any of PWM INT GEN 0 PWM INT GEN 1 PWM INT GEN 2 PWM INT GEN 3 PWM INT FAULTO PWM INT FAULT1
342. nter to the data area used to return the data from the FIFO pulSize is initially the size of the buffer passed into this call via the pucData parameter It will be set to the amount of data returned in the buffer Description This function will return the data from the FIFO for the given endpoint The pulSize parameter should indicate the size of the buffer passed in the pu Data parameter The data in the pulSize parameter will be changed to match the amount of data returned in the pucData parameter If a zero byte packet was received this call will not return a error but will instead just return a zero in the pulSize parameter The only error case occurs when there is no data packet available Returns This call will return O or 1 if no packet was received 24 3 1 13 ROM USBEndpointDataPut Puts data into the given endpoint s FIFO Prototype long ROM USBEndpointDataPut unsigned long ulBase unsigned long ulEndpoint unsigned char xpucData unsigned long ulSize ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM USBTABLE is an array of pointers located at ROM APITABLE 16 ROM USBEndpointDataPut is a function pointer located at ROM USBTABLE 11 Parameters ulBase specifies the USB module base address ulEndpoint is the endpoint to access pucDa a is a pointer to the data area used as the source for the data to put into the FIFO ulSize is the amoun
343. nterface Prototype void ROM SSIEnable unsigned long ulBase ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM SSITABLE is an array of pointers located at ROM APITABLE 2 ROM SSIEnable is a function pointer located at ROM SSITABLE 2 Parameters ulBase specifies the SSI module base address Description This function enables operation of the synchronous serial interface The synchronous serial interface must be configured before it is enabled Returns None January 26 2012 213 Synchronous Serial Interface SSI 18 2 1 11 ROM SSIIntClear Clears SSI interrupt sources Prototype void ROM SSIIntClear unsigned long ulBase unsigned long ullIntFlags ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM SSITABLE is an array of pointers located at ROM APITABLE 2 ROM SSIIntClear is a function pointer located at ROM SSITABLE 7 Parameters ulBase specifies the SSI module base address ullntFlags is a bit mask of the interrupt sources to be cleared Description The specified SSI interrupt sources are cleared so that they no longer assert This function must be called in the interrupt handler to keep the interrupts from being recognized again immediately upon exit The ullntFlags parameter can consist of either or both the SSI RXTO and SSI RXOR values Note Because there is a writ
344. nterrupt status on a given USB controller Prototype unsigned long ROM USBIntStatusControl unsigned long ulBase ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM USBTABLE is an array of pointers located at ROM APITABLE 16 ROM USBIntStatusControl is afunction pointer located at ROM USBTABLE 50 Parameters ulBase specifies the USB module base address Description This function will read control interrupt status for a USB controller This call will return the current status for control interrupts only the endpoint interrupt status is retrieved by call ing ROM_USBIntStatusEndpoint The bit values returned should be compared against the USB INTCTRL values 340 January 26 2012 USB Controller The following are the meanings of all USB_INCTRL_ flags and the modes for which they are valid These values apply to any calls to ROM USBintStatusControl ROM UsSBintEnableControl and ROM USBintDisableControl Some of these flags are only valid in the following modes as indicated in the parenthesis Host Device and OTG m USB INTCTRL ALL A full mask of all control interrupt sources m USB INTCTRL VBUS ERR A VBUS error has occurred Host Only m USB INTCTRL SESSION Session Start Detected on A side of cable OTG Only m USB INTCTRL SESSION END Session End Detected Device Only m USB INTCTRL DISCONNECT Device Disconnect Detected Host Only m USB INTCTRL CO
345. ntly available which may not be the entire sample sequence if it is in the process of being executed Returns Returns the number of samples copied to the buffer ROM ADCSequenceDisable Disables a sample sequence Prototype void ROM ADCSequenceDisable unsigned long ulBase unsigned long ulSequenceNum ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM ADCTABLE is an array of pointers located at ROM APITABLE 5 ROM ADCSequenceDisable is a function pointer located at ROM ADCTABLE Ox Parameters ulBase is the base address of the ADC module ulSequenceNum is the sample sequence number Description Prevents the specified sample sequence from being captured when its trigger is detected A sample sequence should be disabled before it is configured January 26 2012 5 2 1 21 5 2 1 22 Analog to Digital Converter ADC Returns None ROM ADCSequenceEnable Enables a sample sequence Prototype void ROM ADCSequenceEnable unsigned long ulBase unsigned long ulSequenceNum ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM ADCTABLE is an array of pointers located at ROM APITABLE 5 ROM ADCSequenceEnable is a function pointer located at ROM ADCTABLE ol Parameters ulBase is the base address of the ADC module ulSequenceNum is the sample sequence number Descript
346. ntroller still sees the interrupt source asserted Returns None ROM EthernetlntDisable Disables individual Ethernet interrupt sources Prototype void ROM EthernetIntDisable unsigned long ulBase unsigned long ulIntFlags ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM ETHERNETTABLE is an array of pointers located at ROM APITABLE 15 ROM EthernetIntDisable is a function pointer located at ROM ETHERNETTABLE 15 Parameters ulBase is the base address of the controller ullntFlags is the bit mask of the interrupt sources to be disabled Description Disables the indicated Ethernet interrupt sources Only the sources that are enabled can be reflected to the processor interrupt disabled sources have no effect on the processor January 26 2012 Ethernet Controller The ullntFlags parameter has the same definition as the ullntFlags parameter to ROM_EthernetIntEnable Returns None 8 2 1 8 ROM EthernetlntEnable Enables individual Ethernet interrupt sources Prototype voi ROM d EthernetIntEnable unsigned long ulBase unsigned long ulIntFlags ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM ETHERNETTABLE is an array of pointers located at ROM APITABLE 15 ROM EthernetIntEnable is a function pointer located at RO
347. nuary 26 2012 18 2 1 6 Synchronous Serial Interface SS Prototype void ROM_SSIDataPut unsigned long ulBase unsigned long ulData ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM SSITABLE is an array of pointers located at ROM_APITABLE 2 ROM SSIDataPut is a function pointer located at ROM SSITABLE 0 Parameters ulBase specifies the SSI module base address ulData is the data to be transmitted over the SSI interface Description This function places the supplied data into the transmit FIFO of the specified SSI module Note The upper 32 N bits of the u Data are discarded by the hardware where N is the data width as configured by ROM SSIConfigSetExpCIk For example if the interface is configured for 8 bit data width the upper 24 bits of u Data are discarded Returns None ROM SSIDataPutNonBlocking Puts a data element into the SSI transmit FIFO Prototype long ROM SSIDataPutNonBlocking unsigned long ulBase unsigned long ulData ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM SSITABLE is an array of pointers located at ROM APITABLE 2 ROM SSIDataPutNonBlocking is a function pointer located at ROM SSITABLE co Parameters ulBase specifies the SSI module base address ulData is the data to be transmitted over the SSI interface Description This function p
348. o generate interrupts on completion of message receipt or transmission The message object can also be configured with a filter mask so that actions are only taken when a message that meets certain parameters is seen on the CAN bus The eMsgType parameter must be one of the following values MSG OBJ TYPE TX CAN transmit message object MSG OBJ TYPE TX REMOTE CAN transmit remote request message object MSG OBJ TYPE RX CAN receive message object MSG OBJ TYPE RX REMOTE CAN receive remote request message object MSG OBJ TYPE RXTX REMOTE CAN remote frame receive remote then transmit message object The message object pointed to by pMsgObject must be populated by the caller as follows m ulMsglD contains the message ID either 11 or 29 bits um ulMsglDMask mask of bits from u Msg D that must match if identifier filtering is enabled m ulFlags Set MSG OBJ TX INT ENABLE flag to enable interrupt on transmission Set MSG OBJ RX INT ENABLE flag to enable interrupt on receipt Set MSG OBJ USE ID FILTER flag to enable filtering based on the identifier mask specified by ulMsgIDMask um ulMsgLen the number of bytes in the message data This should be non zero even for a remote frame it should match the expected bytes of the data responding data frame m pucMsgData points to a buffer containing up to 8 bytes of data for a data frame Example To send a data frame or remote frame in response to a remote request take the
349. ocated at ROM I2STABLE ca Parameters ulBase is the I2S module base address Description This function is used to get the value of the transmit FIFO service request level This value is set using the ROM I2STxFIFOLimitSet function Returns Returns the current value of the FIFO service request limit 13 2 1 21 ROM I2STxFIFOLimitSet Sets the FIFO level at which a service request is generated Prototype void ROM I2STxFIFOLimitSet unsigned long ulBase unsigned long ulLevel 154 January 26 2012 Inter IC Sound 12S ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM_I2STABLE is an array of pointers located at ROM_APITABLE 22 ROM_I2STxFIFOLimitSet is a function pointer located at ROM_I2STABLE Oy Parameters ulBase is the 2S module base address ulLevel is the FIFO service request limit Description This function is used to set the transmit FIFO fullness level at which a service request will occur The service request is used to generate an interrupt or a DMA transfer request The transmit FIFO will generate a service request when the number of items in the FIFO is less than the level specified in the u Level parameter For example if ulLevel is 8 then a service request will be generated when there are less than 8 samples remaining in the transmit FIFO For the purposes of counting the FIFO level a left righ
350. oduce left aligned PWM signals that is the rising edge of the two PWM signals produced by the generator will occur at the same time In count up down mode it will count up from zero to the preset value count back down to zero and then repeat the process This will produce center aligned PWM signals that is the middle of the high low period of the PWM signals produced by the generator will occur at the same time When the PWM generator parameters period and pulse width are modified their affect on the output PWM signals can be delayed In synchronous mode the parameter updates are not applied until a synchronization event occurs This allows multiple parameters to be modified and take affect simultaneously instead of one at a time Additionally parameters to multiple PWM generators in synchronous mode can be updated simultaneously allowing them to be treated as if they were a unified generator In non synchronous mode the parameter updates are not delayed until a synchronization event In either mode the parameter updates only occur when the counter is at zero to help prevent oddly formed PWM signals during the update that is a PWM pulse that is too short or too long The PWM generator can either pause or continue running when the processor is stopped via the debugger If configured to pause it will continue to count until it reaches zero at which point it will pause until the processor is restarted If configured to continue running
351. on ROM APITABLE is an array of pointers located at 0x0100 0010 ROM USBTABLE is an array of pointers located at ROM APITABLE 16 ROM USBHostRequestStatus is a function pointer located at ROM USBTABLE 34 Parameters ulBase specifies the USB module base address Description This function is used to cause a request for an status IN transaction from a device on endpoint zero This function can only be used with endpoint zero as that is the only control endpoint that supports this ability This is used to complete the last phase of a control transaction to a device and an interrupt will be signaled when the status packet has been received Returns None 24 3 1 40 ROM USBhHostReset 334 Handles the USB bus reset condition Prototype void ROM USBHostReset unsigned long ulBase tBoolean bStart ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM USBTABLE is an array of pointers located at ROM APITABLE 16 ROM USBHostReset is a function pointer located at ROM USBTABLE 35 Parameters ulBase specifies the USB module base address bStart specifies whether to start or stop signaling reset on the USB bus Description When this function is called with the bStart parameter set to true this function will cause the start of a reset condition on the USB bus The caller should then delay at least 20ms before calling this function again with the bSt
352. on provides a typical configuration for those pin s other configurations may work as well depending upon the board setup for example using the on chip pull ups The pin s are specified using a bit packed byte where each bit that is set identifies the pin to be accessed and where bit 0 of the byte represents GPIO port pin 0 bit 1 represents GPIO port pin 1 and so on Note This cannot be used to turn any pin into a CAN pin it only configures a CAN pin for proper operation Returns None 11 2 1 15 ROM GPIOPinTypeComparator Configures pin s for use as an analog comparator input January 26 2012 111 GPIO Prototype void ROM_GPIOPinTypeComparator unsigned long ulPort unsigned char ucPins ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM GPIOTABLE is an array of pointers located at ROM_APITABLE 4 ROM GPIOPinTypeComparator is a function pointer located at ROM GPIOTABLE 13 Parameters ulPort is the base address of the GPIO port ucPins is the bit packed representation of the pin s Description The analog comparator input pins must be properly configured for the analog comparator to function correctly This function provides the proper configuration for those pin s The pin s are specified using a bit packed byte where each bit that is set identifies the pin to be accessed and where bit 0 of the byte represents GPIO port pin 0 bit 1 represents GPIO port
353. ondary peripheral marked as SEC will be selected UDMA DEF USBEP1RX SEC UART2RX UDMA DEF USBEP1TX SEC UART2TX UDMA DEF USBEP2RX SEC TMR3A UDMA DEF USBEP2TX SEC TMR3B UDMA DEF USBEP3RX SEC TMR2A UDMA DEF USBEP3TX SEC TMR2B UDMA DEF ETHORX SEC TMR2A UDMA DEF ETHOTX SEC TMR2B UDMA DEF UARTORX SEC UART1RX UDMA DEF UARTOTX SEC UART1TX UDMA DEF SSIORX SEC SSHRX UDMA DEF SSIOTX SEC SSITX UDMA DEF RESERVED SEC UART2RX UDMA DEF RESERVED SEC UART2TX UDMA DEF ADCOO0 SEC TMR2A UDMA DEF ADCOi SEC TMR2B UDMA DEF TMROA SEC TMR1A UDMA DEF TMROB SEC TMR1B UDMA DEF TMR1A SEC EPIORX UDMA DEF TMR1B SEC EPIOTX UDMA DEF SSHRX SEC ADC10 UDMA DEF SSHTX SEC ADC11 UDMA DEF RESERVED SEC ADC12 UDMA DEF RESERVED SEC ADC13 Returns None 23 2 1 13 ROM uDMAChannelSizeGet Gets the current transfer size for a uDMA channel control structure Prototype unsigned long ROM uDMAChannelSizeGet unsigned long ulChannelStructIndex ROM Location 296 ROM APITABLE is an array of pointers located at 0x0100 0010 ROM UDMATABLE is an array of pointers located at ROM APITABLE 17 ROM uDMAChannelSizeGet is a function pointer located at ROM UDMATABLE 15 January 26 2012 uDMA Controller Parameters ulChannelStructindex is the logical OR of the uDMA channel number with either UDMA_PRI_SELECT or UDMA_ALT_SELECT Description This function is used to get the uDMA t
354. one with the highest priority message object will occur first And second when multiple message objects have interrupts pending the highest priority will be presented first when reading the interrupt status It is up to the application to manage the 32 message objects as a resource and determine the best method for allocating and releasing them The CAN controller can generate interrupts on several conditions m When any message object transmits a message m When any message object receives a message m On warning conditions such as an error counter reaching a limit or occurrence of various bus errors m On controller error conditions such as entering the bus off state Once CAN interrupts are enabled the handler will be invoked whenever a CAN interrupt is triggered The handler can determine which condition caused the interrupt by using the ROM CANIntStatus function Multiple conditions can be pending when an interrupt occurs so the handler must be designed to process all pending interrupt conditions before exiting Each interrupt condition must be cleared before exiting the handler There are two ways to do this The ROM CANIntClear function will clear a specific interrupt condition without further action required by the handler However the handler can also clear the condition by performing certain actions If the interrupt is a status interrupt the interrupt can be cleared by reading the status register with ROM CANStatusGet If the in
355. ong ROM FlashlntStatus tBoolean bMasked long ROM FlashProgram unsigned long pulData unsigned long ulAddress unsigned long ulCount tFlashProtection ROM FlashProtectGet unsigned long ulAddress long ROM FlashProtectSave void January 26 2012 91 Flash 10 2 1 10 2 1 1 10 2 1 2 92 long ROM_FlashProtectSet unsigned long ulAddress tFlashProtection eProtect unsigned long ROM_FlashUsecGet void void ROM_FlashUsecSet unsigned long ulClocks long ROM FlashUserGet unsigned long pulUser0 unsigned long pulUser1 long ROM_FlashUserSave void long ROM_FlashUserSet unsigned long ulUserO unsigned long ulUser1 Function Documentation ROM FlashErase Erases a block of flash Prototype long ROM FlashErase unsigned long ulAddress ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM FLASHTABLE is an array of pointers located at ROM APITABLE 7 ROM FlashErase is a function pointer located at ROM FLASHTABLE 3 Parameters ulAddress is the start address of the flash block to be erased Description This function will erase a 1 kB block of the on chip flash After erasing the block will be filled with OxFF bytes Read only and execute only blocks cannot be erased This function will not return until the block has been erased Returns Returns 0 on success or 1 if an invalid block address was specified or the block is write protected ROM Flashln
356. ong ulBase unsigned long ulFlags ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM USBTABLE is an array of pointers located at ROM APITABLE 16 ROM USBIntEnable is a function pointer located at ROM USBTABLE 40 Parameters ulBase specifies the USB module base address ulFlags specifies which interrupts to enable Description This function will enable the USB controller s ability to generate the interrupts indicated by the ulFlags parameter There are three groups of interrupt sources IN Endpoints OUT End points and general status changes specified by USB INT HOST IN USB INT HOST OUT USB INT DEV IN USB INT DEV OUT and USB STATUS If USB INT ALL is specified then all interrupts will be enabled Note A call must be made to enable the interrupt in the main interrupt controller to receive interrupts The USBIntRegister API performs this controller level interrupt enable However if static interrupt handlers are used then then a call to ROM IntEnable must be made in order to allow any USB interrupts to occur WARNING This API cannot be used on endpoint numbers greater than endpoint 3 so ROM UsSBintEnableControl or ROM USBIntEnableEndpoint should be used instead Returns None 24 3 1 48 ROM USBlIntEnableControl Enables control interrupts on a given USB controller 338 January 26 2012 USB Controller Prototype void ROM_USBIntEnable
357. ong ulBase unsigned long ulFaultlnts void ROM PWMdGenConfigure unsigned long ulBase unsigned long ulGen unsigned long ulConfig void ROM PWMcGenbDisable unsigned long ulBase unsigned long ulGen void ROM PWMdGenEnable unsigned long ulBase unsigned long ulGen void ROM PWMGenFaultClear unsigned long ulBase unsigned long ulGen unsigned long ulGroup unsigned long ulFaultTriggers void ROM PWMGenFaultConfigure unsigned long ulBase unsigned long ulGen unsigned long ulMinFaultPeriod unsigned long ulFaultSenses unsigned long ROM PWMGenFaultStatus unsigned long ulBase unsigned long ulGen un signed long ulGroup unsigned long ROM PWMGenFaultTriggerGet unsigned long ulBase unsigned long ulGen unsigned long ulGroup void ROM PWMGenFaultTriggerSet unsigned long ulBase unsigned long ulGen unsigned long ulGroup unsigned long ulFaultTriggers void ROM PWMcGenlntClear unsigned long ulBase unsigned long ulGen unsigned long ullnts unsigned long ROM PWMGenlntStatus unsigned long ulBase unsigned long ulGen tBoolean bMasked void ROM PWMGenintTrigDisable unsigned long ulBase unsigned long ulGen unsigned long ullntTrig void ROM PWMGenlntTrigEnable unsigned long ulBase unsigned long ulGen unsigned long ullntTrig unsigned long ROM PWMGenPeriodGet unsigned long ulBase unsigned long ulGen void ROM PWMGenPeriodSet unsigned long ulBase unsigned long ulGen unsigned long ulPeriod void ROM PWMIntDisable
358. ontroller Area Network CAN 54 January 26 2012 7 1 7 2 7 2 1 7 2 1 1 CRC 16 CRC 16 INPRO RM RETE tr TELE TET TEES EEUU 55 A EME s Oro E aded MN xcd EE d T EE MC EUM MM AR E 55 Introduction CRC Cyclic Redundancy Check is a technique to validate a span of data has the same contents as when previously checked This technique can be used to validate correct receipt of messages nothing lost or modified in transit to validate data after decompression to validate that Flash memory contents have not been changed and for other cases where the data needs to be validated A CRC is preferred over a simple checksum for example XOR all bits because it catches changes more readily There are a two CRC calculation routines available Both implement the standard CRC 16 also known as CRC 16 IBM polynomial g19 E319 g 1 The first function ROM Crc16Array performs a CRC 16 calculation across all the bytes in the input data array The other function ROM Crc16Array3 performs three separate CRC 16 calcu lations one across all bytes in the input data array one across the even bytes and one across the odd bytes The ability of a CRC to detect errors decreases as the size of the data array increases The triple CRC 16 function tries to slow this decrease in error detection rate since it is more difficult for a data error or errors to result in all three CRC 16 calculations being correct Functions Functions m
359. onverter ADC 5 2 1 7 26 Prototype void ROM ADCComparatorRegionSet unsigned long ulBase unsigned long ulComp unsigned long ulLowRef unsigned long ulHighRef ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM ADCTABLE is an array of pointers located at ROM APITABLE 5 ROM ADCComparatorRegionSet is a function pointer located at ROM ADCTABLE 16 Parameters ulBase is the base address of the ADC module ulComp is the index of the comparator to configure ulLowRef is the reference point for the low mid band threshold ulHighRef is the reference point for the mid high band threshold Description The ADC digital comparator operation is based on three ADC value regions low band is defined as any ADC value less than or equal to the u LowHef value m mid band is defined as any ADC value greater than the ulLowHef value but less than or equal to the ulHighRef value m high band is defined as any ADC value greater than the u HighRef value Returns None ROM ADCComparatorReset Resets the current ADC digital comparator conditions Prototype void ROM ADCComparatorReset unsigned long ulBase unsigned long ulComp tBoolean bTrigger tBoolean bInterrupt ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM ADCTABLE is an array of pointers located at ROM_APITABLE 5 ROM ADCComparatorReset is a function point
360. or a sample sequence Valid sample sequences range from zero to three sequence zero will capture up to eight samples sequences one and two will capture up to four samples and sequence three will capture a single sample The trigger condition and priority with respect to other sample sequence execution is set The ulTrigger parameter can take on the following values m ADC TRIGGER PROCESSOR A trigger generated by the processor via the ROM ADCProcessorTrigger function ADC TRIGGER COMPO A trigger generated by the first analog comparator configured with ROM ComparatorConfigure ADC TRIGGER COMP1 A trigger generated by the second analog comparator config ured with ROM ComparatorConfigure ADC TRIGGER COMP2 A trigger generated by the third analog comparator configured with ROM ComparatorConfigure ADC TRIGGER EXTERNAL A trigger generated by an input from the Port B4 pin ADC TRIGGER TIMER A trigger generated by a timer configured with ROM TimerControlTrigger ADC TRIGGER PWMO A trigger generated by the first PWM generator configured with ROM PWNGenlntTrigEnable ADC TRIGGER PWM A trigger generated by the second PWM generator configured with ROM PWMGenlntTrigEnable ADC TRIGGER PWN A trigger generated by the third PWM generator configured with ROM PWNGenlntTrigEnable ADC TRIGGER PWW3 A trigger generated by the fourth PWM generator configured with ROM PWMGenlntTrigEnable m ADC TR
361. or proper operation Returns None 11 2 1 29 ROM GPIOPinTypeUSBDigital Configures pin s for use by the USB peripheral Prototype void ROM GPIOPinTypeUSBDigital unsigned long ulPort unsigned char ucPins ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM GPIOTABLE is an array of pointers located at ROM_APITABLE 4 ROM GPIOPinTypeUSBDigital is a function pointer located at ROM_GPIOTABLE 24 Parameters ulPort is the base address of the GPIO port ucPins is the bit packed representation of the pin s January 26 2012 GPIO Description Some USB digital pins must be properly configured for the USB peripheral to function correctly This function provides a typical configuration for the digital USB pin s other configurations may work as well depending upon the board setup for example using the on chip pull ups This function should only be used with EPEN and PFAULT pins as all other USB pins are analog in nature or are not used in devices without OTG functionality The pin s are specified using a bit packed byte where each bit that is set identifies the pin to be accessed and where bit 0 of the byte represents GPIO port pin 0 bit 1 represents GPIO port pin 1 and so on Note This cannot be used to turn any pin into a USB pin it only configures a USB pin for proper operation Returns None 11 2 1 30 ROM_GPIOPinWrite Writes a value to the specified pin
362. or the ROM GPIOPinRead and ROM GPIOPinWrite functions a read will return only the value of the requested pins with the other pin values masked out and a write will affect the requested pins simultaneously that is the state of multiple GPIO pins can be changed at the same time This data masking for the GPIO pin state occurs in the hardware a single read or write is issued to the hardware which interprets some of the address bits as an indication of the GPIO pins to operate upon and therefore the ones to not affect See the part data sheet for details of the GPIO data register address based bit masking For functions that have a ucPin singular parameter only a single pin is affected by the function In this case this value specifies the pin number that is 0 through 7 Functions Functions m unsigned long ROM GPIODirModeGet unsigned long ulPort unsigned char ucPin m void ROM GPIODirModeSet unsigned long ulPort unsigned char ucPins unsigned long ulPinlO January 26 2012 101 GPIO 11 2 1 11 2 1 1 102 unsigned long ROM GPlIOIntTypeGet unsigned long ulPort unsigned char ucPin void ROM GPlOIntTypeSet unsigned long ulPort unsigned char ucPins unsigned long ullnt Type void ROM GPlOPadConfigGet unsigned long ulPort unsigned char ucPin unsigned long xpulStrength unsigned long pulPinType void ROM GPlIOPadConfigSet unsigned long ulPort unsigned char ucPins unsigned long ulStrength unsigned long ul
363. ore than the specified timeout period m USB HOST IN ERROR Failed to communicate with a device using this IN endpoint m USB HOST IN FIFO FULL This IN endpoint s FIFO is full m USB HOST IN PKTRDY Data packet ready on this IN endpoint m USB HOST OUT NAK TO NAKs received on this OUT endpoint for more than the specified timeout period USB HOST OUT NOT COMP The device failed to respond to an OUT request m USB HOST OUT STALL A stall was received on this OUT endpoint m USB HOST OUT ERROR Failed to communicate with a device using this OUT end point m USB HOST OUT FIFO NE This endpoint s OUT FIFO is not empty m USB HOST OUT PKTPEND The data transfer on this OUT endpoint has not com pleted m USB HOST EPO NAK TO NAKs received on endpoint zero for more than the specified timeout period m USB HOST EPO ERROR The device failed to respond to a request on endpoint zero 321 USB Controller m USB HOST EPO IN STALL A stall was received on endpoint zero for an IN transaction m USB HOST EPO0 IN PKTRDY Data packet ready on endpoint zero for an IN transaction The following are the status flags for device mode m USB DEV OUT SENT STALL A stall was sent on this OUT endpoint m USB DEV OUT DATA ERROR There was a CRC or bit stuff error on an OUT endpoint m USB DEV OUT OVERRUN An OUT packet was not loaded due to a full FIFO m USB DEV OUT FIFO FULL The OUT endpoint s FIFO is full m USB DEV OUT PKTRDY
364. ototype unsigned long ROM SysTickValueGet void ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM SYSTICKTABLE is an array of pointers located at ROM APITABLE 10 ROM SysTickValueGet is a function pointer located at ROM SYSTICKTABLE 0 Description This function returns the current value of the SysTick counter this will be a value between the period 1 and zero inclusive Returns Returns the current value of the SysTick counter January 26 2012 21 21 1 21 2 Timer Timer IRC MR EET TO TESTER 245 IPOBGIIGS codd d dU dep nA RE ZEN Rd IEEE EDI Ld nd EM ME EE 245 Introduction The timer API provides a set of functions for dealing with the timer module Functions are pro vided to configure and control the timer along with functions to modify timer counter values and to manage interrupt handling for the timer The timer module provides two 16 bit timer counters that can be configured to operate indepen dently as timers or event counters or they can be configured to operate as one 32 bit timer or one 32 bit Real Time Clock RTC For the purpose of this API the two timers provided by the timer are referred to as TimerA and TimerB When configured as either a 32 bit or 16 bit timer a timer can be set up to run as a one shot timer or a continuous timer If configured as a one shot timer when it reaches zero the timer will cease counting If configured as a continuou
365. otype void ROM SysTickIntDisable void ROM Location ROM API ABL E is an array of pointers located at 0x0100 0010 ROM SYS ROM SysTickIntDisable is a function pointer located at ROM SYSTICKTABLE Description ICK TABLE is an array of pointers located at ROM APITABLE 10 m 4 py This function will disable the SysTick interrupt preventing it from being reflected to the proces sor Returns None January 26 2012 20 2 1 4 20 2 1 5 20 2 1 6 System Tick SysTick ROM SysTicklntEnable Enables the SysTick interrupt Prototype void ROM SysTickIntEnable void ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM SYSTICKTABLE is an array of pointers located at ROM APITABLE 10 ROM SysTickIntEnable is a function pointer located at ROM SYSTICKTABLE 3T Description This function will enable the SysTick interrupt allowing it to be reflected to the processor Note The SysTick interrupt handler does not need to clear the SysTick interrupt source as this is done automatically by NVIC when the interrupt handler is called Returns None ROM SysTickPeriodGet Gets the period of the SysTick counter Prototype unsigned long ROM SysTickPeriodGet void ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM SYSTICKTABLE is an array of pointers located at ROM APITABLE 10
366. owing values m 12S_INT_RXERR for receive errors m Il28 INT RXREQ for receive FIFO service requests m 12S_INT_TXERR for transmit errors m 12S_INT_TXREQ for transmit FIFO service requests Returns Returns None ROM I2SIntStatus Gets the 12S interrupt status Prototype unsigned long ROM I2SIntStatus unsigned long ulBase tBoolean bMasked ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM I2STABLE is an array of pointers located at ROM APITABLE 22 ROM I2SIntStatus is a function pointer located at ROM I2STABLE 0 Parameters ulBase is the I2S module base address bMasked is set true to get the masked interrupt status or false to get the raw interrupt status January 26 2012 13 2 1 5 13 2 1 6 Inter IC Sound 12S Description This function returns the I2S interrupt status It can return either the raw or masked interrupt status Returns Returns the masked or raw 2S interrupt status as a bit field of any of the following values Il28 INT RXERR I28 INT RXREQ I28 INT TXERR or l28 INT TXREQ ROM l2SMasterClockSelect Selects the source of the master clock internal or external Prototype void ROM I2SMasterClockSelect unsigned long ulBase unsigned long ulMClock ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM I2STABLE is an array of pointers located at ROM_APITABLE 22 ROM I2SMasterClockSelect is
367. pecifies whether to set the IN or OUT endpoint Description This function is used to force the state of the data toggle in host mode If the value passed in the bDataToggle parameter is false then the data toggle will be set to the DATAO state and if it is true it will be set to the DATA1 state The u Flags parameter can be USB EP HOST INor USB EP HOST OUT to access the desired portion of this endpoint The u Flags parameter is ignored for endpoint zero Note This function should only be called in host mode Returns None January 26 2012 327 USB Controller 24 3 1 29 ROM_USBHostEndpointStatusClear Clears the status bits in this endpoint in host mode Prototype void ROM_USBHostEndpointStatusClear unsigned long ulBase unsigned long ulEndpoint unsigned long ulFlags ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM USBTABLE is an array of pointers located at ROM APITABLE 16 ROM USBHostEndpointStatusClear is a function pointer located at ROM USBTABLE mi 25 Parameters ulBase specifies the USB module base address ulEndpoint is the endpoint to access ulFlags are the status bits that will be cleared Description This function will clear the status of any bits that are passed in the u Flags parameter The ulFlags parameter can take the value returned from the ROM_USBEndpointStatus call Note This function should only be called
368. pecifies which endpoint interrupts to enable The flags passed in the u Flags parameters should be the definitions that start with USB INTEP and not any other USB INT flags Returns None January 26 2012 339 USB Controller 24 3 1 50 ROM UsSBintStatus Returns the status of the USB interrupts Prototype unsigned long ROM USBIntStatus unsigned long ulBase ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM USBTABLE is an array of pointers located at ROM APITABLE 16 ROM USBIntStatus is a function pointer located at ROM USBTABLE 0 Parameters ulBase specifies the USB module base address Description This function will read the source of the interrupt for the USB controller There are three groups of interrupt sources IN Endpoints OUT Endpoints and general status changes This call will return the current status for all of these interrupts The bit values returned should be compared against the USB HOST IN USB HOST OUT USB HOST EPO USB DEV IN USB DEV OUT and USB DEV EPO values Note This call will clear the source of all of the general status interrupts WARNING This API cannot be used on endpoint numbers greater than endpoint 3 so ROM UsSBintStatusControl or ROM_USBIntStatusEndpoint should be used instead Returns Returns the status of the sources for the USB controller s interrupt 24 3 1 51 ROM USBintStatusControl Returns the control i
369. per operation Returns None 11 2 1 24 ROM_GPIOPinTypeQE Configures pin s for use by the QEI peripheral Prototype void ROM GPIOPinTypeQEI unsigned long ulPort unsigned char ucPins ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM GPIOTABLE is an array of pointers located at ROM_APITABLE 4 ROM GPIOPinTypeQEI is a function pointer located at ROM GPIOTABLE 18 Parameters ulPort is the base address of the GPIO port ucPins is the bit packed representation of the pin s Description The QEI pins must be properly configured for the QEI peripheral to function correctly This function provides a typical configuration for those pin s other configurations may work as well depending upon the board setup for example not using the on chip pull ups The pin s are specified using a bit packed byte where each bit that is set identifies the pin to be accessed and where bit 0 of the byte represents GPIO port pin 0 bit 1 represents GPIO port pin 1 and so on Note This cannot be used to turn any pin into a QEI pin it only configures a QEI pin for proper operation Returns None January 26 2012 117 GPIO 11 2 1 25 ROM GPIOPinTypeSSI Configures pin s for use by the SSI peripheral Prototype void ROM GPIOPinTypeSSI unsigned long ulPort unsigned char ucPins ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM
370. pheral address space that was programmed with ROM EPlIAddressMapSet There are more sophisticated ways to use the read write interface When an application is writing to the mapped memory or peripheral space the writes will stall the processor until the write to the external interface is completed However the EPI contains an internal transaction FIFO and can buffer up to 4 pending writes without stalling the processor Prior to writing the application can test to see if the EPI can take more write operations without stalling the processor by using the function ROM EPIWriteFIFOCountGet which will return the number of non blocking writes that can be made For efficient reads from the external device the EPI contains a programmable read FIFO This can be used to set a starting address and a count and the FIFO will perform sequen tial reads from the device and store the values in the FIFO The application can then period ically drain the FIFO either by polling or by interrupts or by using the uDMA controller A January 26 2012 73 External Peripheral Interface EPI 9 2 74 non blocking read is configured by using the function ROM EPINonBlockingReadConfigure The read operation is started with ROM EPINonBlockingReadStart and can be stopped by calling ROM EPINonBlockingReadStop The function ROM EPINonBlockingReadCount can be used to determine the number of items remaining to be read while the function ROM EPINonBlockingRead
371. pin 1 and so on Note This cannot be used to turn any pin into an analog comparator input it only configures an analog comparator pin for proper operation Returns None 11 2 1 16 ROM GPIOPinTypeEPI 112 Configures pin s for use by the external peripheral interface Prototype void ROM GPIOPinTypeEPI unsigned long ulPort unsigned char ucPins ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM GPIOTABLE is an array of pointers located at ROM_APITABLE 4 ROM GPIOPinTypeEPI is a function pointer located at ROM GPIOTABLE 29 Parameters ulPort is the base address of the GPIO port ucPins is the bit packed representation of the pin s Description The external peripheral interface pins must be properly configured for the external peripheral interface to function correctly This function provides a typica configuration for those pin s other configurations may work as well depending upon the board setup for exampe using the on chip pull ups January 26 2012 GPIO The pin s are specified using a bit packed byte where each bit that is set identifies the pin to be accessed and where bit 0 of the byte represents GPIO port pin 0 bit 1 represents GPIO port pin 1 and so on Note This cannot be used to turn any pin into an external peripheral interface pin it only configures an external peripheral interface pin for proper operation Returns None
372. priority Description This function specifies the split between preemptable priority levels and subpriority levels in the interrupt priority specification The range of the grouping values are dependent upon the hardware implementation on the Stellaris family three bits are available for hardware interrupt prioritization and therefore priority grouping values of three through seven have the same effect Returns None 14 2 1 10 ROM_IntPriorityMaskGet Gets the priority masking level Prototype unsigned long ROM_IntPriorityMaskGet void ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM INTERRUPTTABLE is an array of pointers located at ROM APITABLE 14 ROM IntPriorityMaskGet is a function pointer located at ROM INTERRUPTTABLE 11 Description This function gets the current setting of the interrupt priority masking level The value returned is the priority level such that all interrupts of that and lesser priority are masked A value of 0 means that priority masking is disabled Smaller numbers correspond to higher interrupt priorities So for example a priority level mask of 4 will allow interrupts of priority level 0 3 and interrupts with a numerical priority of 4 and greater will be blocked The hardware priority mechanism will only look at the upper N bits of the priority level where N is 3 for the Stellaris family so any prioritization must be performed in those bits
373. r a programmable load register interrupt generation logic and a locking register Once the watchdog timer has been configured the lock register can be written to prevent the timer configuration from being inadvertently altered The watchdog timer can be configured to generate an interrupt to the processor upon its first time out and to generate a reset signal upon its second timeout The watchdog timer module generates the first timeout signal when the 32 bit counter reaches the zero state after being enabled en abling the counter also enables the watchdog timer interrupt After the first timeout event the 32 bit counter is reloaded with the value of the watchdog timer load register and the timer resumes count ing down from that value If the timer counts down to its zero state again before the first timeout interrupt is cleared and the reset signal has been enabled the watchdog timer asserts its reset signal to the system If the interrupt is cleared before the 32 bit counter reaches its second timeout the 32 bit counter is loaded with the value in the load register and counting resumes from that value If the load register is written with a new value while the watchdog timer counter is counting then the counter is loaded with the new value and continues counting Functions Functions void ROM WatchdogEnable unsigned long ulBase void ROM WatchdoglntClear unsigned long ulBase void ROM WatchdoglntEnable unsigned long ulBase un
374. r of the highest priority message object that has an interrupt pending The message object interrupt can be cleared by using the ROM CANIntClear function or by reading the message using ROM CANMessageGet in the case of a received message The interrupt handler can read the interrupt status again to make sure all pending interrupts are cleared before returning from the interrupt CAN INT STS OBJECT returns a bit mask indicating which message objects have pending interrupts This can be used to discover all of the pending interrupts at once as opposed to repeatedly reading the interrupt register by using CAN INT STS CAUSE Returns Returns the value of one of the interrupt status registers ROM CANMessageClear Clears a message object so that it is no longer used Prototype void ROM CANMessageClear unsigned long ulBase unsigned long ulObjID ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM CANTABLE is an array of pointers located at ROM APITABLE 18 ROM CANMessageClear is a function pointer located at ROM CANTABLE oO Parameters ulBase is the base address of the CAN controller ulObjID is the message object number to disable 1 32 Description This function frees the specified message object from use Once a message object has been cleared it will no longer automatically send or receive messages or generate interrupts Returns None ROM_CANMe
375. ransfer size for a channel The transfer size is the number of items to transfer where the size of an item might be 8 16 or 32 bits If a partial transfer has already occurred then the number of remaining items will be returned If the transfer is complete then 0 will be returned Returns Returns the number of items remaining to transfer 23 2 1 14 ROM_uDMAChannelTransferSet Sets the transfer parameters for a UDMA channel control structure Prototype void ROM_uDMAChannelTransferSet unsigned long ulChannelStructIndex unsigned long ulMode void xpvSrcAddr void xpvDstAddr unsigned long ulTransferSize ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM UDMATABLE is an array of pointers located at ROM_APITABLE 17 ROM uDMAChannelTransferSet is a function pointer located at ROM_UDMATABLE 0 Parameters ulChannelStructindex is the logical OR of the uDMA channel number with either UDMA PRI SELECT or UDMA ALT SELECT ulMode is the type of uDMA transfer pvSrcAddr is the source address for the transfer pvDstAddar is the destination address for the transfer ulTransferSize is the number of data items to transfer Description This function is used to set the parameters for a uDMA transfer These are typically parameters that are changed often The function ROM uDMAChannelControlSet MUST be called at least once for this channel prior to calling this function The u Cha
376. read Description This function is used to configure a non blocking read channel for a transaction Two chan nels are available which can be used in a ping pong method for continuous reading It is not necessary to use both channels to perform a non blocking read The parameter ulDataSize is one of EPI NBCONFIG SIZE 8 EPI NBCONFIG SIZE 16 or EPI NBCONFIG SIZE 32 for 8 bit 16 bit or 32 bit sized data transfers The parameter ulAddress is the starting address for the read relative to the external device The start of the device is address 0 Once configured the non blocking read is started by calling ROM EPINonBlockingReadStart If the addresses to be read from the device are in a sequence it is not necessary to call this function multiple times Until it is changed the EPI module will remember the last address that was used for a non blocking read per channel Returns None ROM EPINonBlockingReadCount Get the count remaining for a non blocking transaction Prototype unsigned long ROM EPINonBlockingReadCount unsigned long ulBase unsigned long ulChannel ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM EPITABLE is an array of pointers located at ROM_APITABLE 23 ROM EPINonBlockingReadCount is a function pointer located at ROM EPITABLE 11 Parameters ulBase is the EPI module base address ulChannel is the read channe
377. receive FIFO Returns None ROM EthernetlnitExpCIk Initializes the Ethernet controller for operation Prototype void ROM EthernetInitExpClk unsigned long ulBase unsigned long ulEthClk ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM ETHERNETTABLE is an array of pointers located at ROM APITABLE 15 ROM EthernetInitExpClk is a function pointer located at ROM ETHERNETTABLE 1 Parameters ulBase is the base address of the controller ulEthClk is the rate of the clock supplied to the Ethernet module Description This function will prepare the Ethernet controller for first time use in a given hardware software configuration This function should be called before any other Ethernet API functions are called The peripheral clock will be the same as the processor clock This will be the value returned by ROM SysCtlClockGet or it can be explicitly hard coded if it is constant and known to save the code execution overhead of a call to ROM SysCtlClockGet Note If the device configuration is changed for example the system clock is reprogrammed to a different speed then the Ethernet controller must be disabled by calling the ROM EthernetDisable function and the controller must be reinitialized by calling the ROM EthernetlnitExpCIk function again After the controller has been reinitialized the con troller should be
378. reconfigured using the appropriate Ethernet API calls Returns None ROM EthernetlntClear Clears Ethernet interrupt sources 61 Ethernet Controller 8 2 1 7 62 Prototype void ROM_EthernetIntClear unsigned long ulBase unsigned long ulIntFlags ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM ETHERNETTABLE is an array of pointers located at ROM APITABLE 15 ROM EthernetIntClear is a function pointer located at ROM ETHERNETTABLE Ce Parameters ulBase is the base address of the controller ullntFlags is a bit mask of the interrupt sources to be cleared Description The specified Ethernet interrupt sources are cleared so that they no longer assert This must be done in the interrupt handler to keep it from being called again immediately upon exit The ullntFlags parameter has the same definition as the ullntFlags parameter to ROM EthernetlIntEnable Note Because there is a write buffer in the Cortex M3 processor it may take several clock cycles before the interrupt source is actually cleared Therefore it is recommended that the interrupt source be cleared early in the interrupt handler as opposed to the very last action to avoid returning from the interrupt handler before the interrupt source is actually cleared Failure to do so may result in the interrupt handler being immediately reentered because the interrupt co
379. requested The ulTransType parameter should be one of the following m USB TRANS OUT for OUT transaction on any endpoint in host mode m USB TRANS IN for IN transaction on any endpoint in device mode m USB TRANS IN LAST for the last IN transactions on endpoint zero in a sequence of IN transactions m USB TRANS SETUP for setup transactions on endpoint zero m USB TRANS STATUS for status results on endpoint zero Returns This call will return O on success or 1 if a transmission is already in progress 24 3 1 15 ROM USBEndgdpointDataToggleClear Sets the Data toggle on an endpoint to zero Prototype void ROM USBEndpointDataToggleClear unsigned long ulBase unsigned long ulEndpoint unsigned long ulFlags ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM USBTABLE is an array of pointers located at ROM APITABLE 16 ROM USBEndpointDataToggleClear is a function pointer located at ROM USBTABLE mi L3 318 January 26 2012 USB Controller Parameters ulBase specifies the USB module base address ulEndpoint specifies the endpoint to reset the data toggle ulFlags specifies whether to access the IN or OUT endpoint Description This function will cause the controller to clear the data toggle for an endpoint This call is not valid for endpoint zero and can be made with host or device controllers The ulFlags parameter should be one of USB EP H
380. rs The flash can be programmed on a word by word basis Programming causes 1 bits to become 0 bits where appropriate because of this a word can be repeatedly programmed so long as each programming operation only requires changing 1 bits to O bits The timing for the flash is automatically handled by the flash controller In order to do this the flash controller must know the clock rate of the system in order to be able to time the number of micro seconds certain signals are asserted The number of clock cycles per micro second must be provided to the flash controller for it to accomplish this timing The flash controller has the ability to generate an interrupt when an invalid access is attempted such as reading from execute only flash This can be used to validate the operation of a program the interrupt will keep invalid accesses from being silently ignored hiding potential bugs The flash protection can be applied without being permanently enabled this along with the interrupt allows the program to be debugged before the flash protection is permanently applied to the device which is a non reversible operation An interrupt can also be generated when an erase or programming operation has completed Functions Functions long ROM FlashErase unsigned long ulAddress void ROM FlashlntClear unsigned long ullntFlags void ROM FlashlntDisable unsigned long ullntFlags void ROM FlashlIntEnable unsigned long ullntFlags unsigned l
381. rs located at 0x0100 0010 ROM FLASHTABLE is an array of pointers located at ROM APITABLE 7 ROM FlashUsecSet is a function pointer located at ROM FLASHTABLE 2 Parameters ulClocks is the number of processor clocks per micro second Description This function is used to tell the flash controller the number of processor clocks per micro second This value must be programmed correctly or the flash most likely will not program correctly it has no affect on reading flash Returns None 10 2 1 12 ROM FlashUserGet Gets the user registers Prototype long ROM FlashUserGet unsigned long xpulUserO0 unsigned long pulUserl1 ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM FLASHTABLE is an array of pointers located at ROM APITABLE 7 ROM FlashUserGet is a function pointer located at ROM FLASHTABLE 7 January 26 2012 97 Flash Parameters pulUserO0 is a pointer to the location to store USER Register 0 pulUser1 is a pointer to the location to store USER Register 1 Description This function will read the contents of user registers 0 and 1 and store them in the specified locations Returns Returns 0 on success or 1 if a hardware error is encountered 10 2 1 13 ROM FlashUserSave Saves the user registers Prototype long ROM FlashUserSave void ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM FLASHTABLE is an
382. rupt handler when January 26 2012 217 System Control they occur 19 2 Functions 218 Functions unsigned long ROM SysCtlADCSpeedGet void void ROM SysCtlADCSpeedSet unsigned long ulSpeed unsigned long ROM SysCtlClockGet void void ROM SysCtlClockSet unsigned long ulConfig void ROM SysCtlDeepSleep void void ROM SysCtlDelay unsigned long ulCount unsigned long ROM SysCtlFlashSizeGet void void ROM SysCtIGPIOAHBDisable unsigned long uIGPlOPeripheral void ROM SysCtIGPIOAHBEnable unsigned long ulGPIOPeripheral unsigned long ROM_SysCtll2SMClkSet unsigned long ullnputClock unsigned long uIMCIk void ROM SysCtllntClear unsigned long ullnts void ROM SysCtllntDisable unsigned long ullnts void ROM SysCtllntEnable unsigned long ullnts unsigned long ROM SysCtllntStatus tBoolean bMasked unsigned long ROM SysCtlL DOGet void void ROM SysCtILDOSet unsigned long ulVoltage void ROM SysCtlPeripheralClockGating tBoolean bEnable void ROM SysCtlPeripheralDeepSleepDisable unsigned long ulPeripheral void ROM SysCtlPeripheralDeepSleepEnable unsigned long ulPeripheral void ROM SysCtlPeripheralDisable unsigned long ulPeripheral void ROM SysCtlPeripheralEnable unsigned long ulPeripheral tBoolean ROM SysCtlPeripheralPresent unsigned long ulPeripheral void ROM SysCtlPeripheralReset unsigned long ulPeripheral void ROM SysCtlPeripheralSleepDisable unsigned long ulPeripheral void ROM SysCtlPeripheralSleepEn
383. ry 26 2012 6 2 1 11 Controller Area Network CAN Prototype void ROM_CANIntEnable unsigned long ulBase unsigned long ulIntFlags ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM CANTABLE is an array of pointers located at ROM APITABLE 18 ROM CANIntEnable is a function pointer located at ROM CANTABLE 10 Parameters ulBase is the base address of the CAN controller ullntFlags is the bit mask of the interrupt sources to be enabled Description Enables specific interrupt sources of the CAN controller Only enabled sources will cause a processor interrupt The ullntFlags parameter is the logical OR of any of the following m CAN INT ERROR acontroller error condition has occurred m CAN INT STATUS a message transfer has completed or a bus error has been detected m CAN INT MASTER allow CAN controller to generate interrupts In order to generate any interrupts CAN INT MASTER must be enabled Further for any particular transaction from a message object to generate an interrupt that message object must have interrupts enabled see ROM CANMessageSet CAN INT ERROR will generate an interrupt if the controller enters the bus off condition or if the error counters reach a limit CAN INT STATUS will generate an interrupt under quite a few status conditions and may provide more interrupts than the application needs to handle When an interrupt occurs u
384. ryGet Returns the current setting for automatic retransmission Prototype tBoolean ROM CANRetryGet unsigned long ulBase ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM CANTABLE is an array of pointers located at ROM APITABLE 18 ROM CANRetryGet is a function pointer located at ROM CANTABLE 13 Parameters ulBase is the base address of the CAN controller Description Reads the current setting for the automatic retransmission in the CAN controller and returns it to the caller Returns Returns true if automatic retransmission is enabled false otherwise 6 2 1 16 ROM CANRetrySet Sets the CAN controller automatic retransmission behavior Prototype void ROM CANRetrySet unsigned long ulBase tBoolean bAutoRetry January 26 2012 51 Controller Area Network CAN ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM CANTABLE is an array of pointers located at ROM APITABLE 18 ROM CANRetrySet is a function pointer located at ROM_CANTABLE 14 Parameters ulBase is the base address of the CAN controller bAutoRetry enables automatic retransmission Description Enables or disables automatic retransmission of messages with detected errors If bAutoRetry is true then automatic retransmission is enabled otherwise it is disabled Returns None 6 2 1 17 ROM _CANStatusGet Reads one of th
385. s Prototype void ROM_GPIOPinWrite unsigned long ulPort unsigned char ucPins unsigned char ucVal ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM GPIOTABLE is an array of pointers located at ROM_APITABLE 4 ROM GPIOPinWrite is a function pointer located at ROM GPIOTABLE 0 Parameters ulPort is the base address of the GPIO port ucPins is the bit packed representation of the pin s ucVal is the value to write to the pin s Description Writes the corresponding bit values to the output pin s specified by ucPins Writing to a pin configured as an input pin has no effect The pin s are specified using a bit packed byte where each bit that is set identifies the pin to be accessed and where bit 0 of the byte represents GPIO port pin 0 bit 1 represents GPIO port pin 1 and so on Returns None January 26 2012 121 GPIO 122 January 26 2012 Inter Integrated Circuit I2C 12 Inter Integrated Circuit I2C SUS 1c xo ndo PR EOD DR a dabis uptebad dodo dot UR ofa ORC edd CO ani P Ra dfe dcdo qe o da dtp dad 123 PIE MNS Eo S COE dott eo dae E petal haa puis M SCALE RA LM ee bL c ORR Terns 124 12 1 Introduction The Inter Integrated Circuit I2C API provides a set of functions for using the Stellaris I2C master and slave modules Functions are provided to initialize the I2C modules to send and receive data obtain status and to manage interrupts for the 12C
386. s unsigned long ROM uDMAChannelSizeGet unsigned long ulChannelStructlndex void ROM uDMAChannelTransferSet unsigned long ulChannelStructIndex unsigned long ulMode void pvSrcAddr void pvDstAddr unsigned long ulTransferSize void x ROM uDMAControlAlternateBaseGet void void x ROM uDMAControlBaseGet void January 26 2012 279 uDMA Controller 23 2 1 23 2 1 1 280 m void ROM uDMAQControlBaseSet void pControlTable m void ROM uDMADisable void m void ROM uDMAEnable void m void ROM uDMAErrorStatusClear void m unsigned long ROM uDMAErrorStatusGet void Function Documentation ROM uDMaAChannelAttributeDisable Disables attributes of a uDMA channel Prototype void ROM uDMAChannelAttributeDisable unsigned long ul unsigned long ul ROM Location ChannelNum Attr ROM APITABLE is an array of pointers located at 0x0100 0010 ROM UDMATABLE is an array of pointers located at ROM APITABLE 17 function pointer located at ROM uDMAChannelAttributeDisable is a ROM UDMATABLE 12 Parameters ulChannelNum is the channel to configure ulAtir is a combination of attributes for the channel Description This function is used to disable attributes of a uDMA channel The ulChannelNum parameter must be only one of the following values UDMA CHANNEL ADCO UDMA CHANNEL ADC1 m UDMA CHANNEL ADC2 m UDMA CHANNEL ADC3 m UDMA SEC CHANNEL ADC10 m UDMA SEC CHA
387. s Returns the error status as one of I2C MASTER ERR NONE I2C MASTER ERR ADDR ACK I2C MASTER ERR DATA ACK or I2C MASTER ERR ARB LOST ROM l2CMasterlnitExpCIk Initializes the I2C Master block Prototype void ROM I2CMasterInitExpClk unsigned long ulBase unsigned long ulI2CClk tBoolean bFast ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM I2CTABLE is an array of pointers located at ROM_APITABLE 3 ROM I2CMasterInitExpClk is a function pointer located at ROM I2CTABLE 1 Parameters ulBase is the base address of the I2C Master module ull2CCIk is the rate of the clock supplied to the 12C module bFast set up for fast data transfers Description This function initializes operation of the I2C Master block Upon successful initialization of the I2C block this function will have set the bus speed for the master and will have enabled the I2C Master block If the parameter bFast is true then the master block will be set up to transfer data at 400 kbps otherwise it will be set up to transfer data at 100 kbps The peripheral clock will be the same as the processor clock This will be the value returned by ROM SysCtlClockGet or it can be explicitly hard coded if it is constant and known to save the code execution overhead of a call to ROM SysCtlClockGet Returns None 12 2 1 10 ROM l2CMasterlntClear Clears I2C Master interrupt sources
388. s ulBase is the EPI module base address Description This function returns the error status of the EPI If the return value of the function ROM EPlIntStatus has the flag EPI INT ERR set then this function can be used to de termine the cause of the error This function returns a bit mask of error flags which can be the logical OR of any of the following m EPI INT ERR WTFULL occurs when a write stalled when the transaction FIFO was full m EPI INT ERR RSTALL occurs when a read stalled January 26 2012 83 External Peripheral Interface EPI 9 2 1 12 9 2 1 13 84 m EPI INT ERR TIMEOUT occurs when the external clock enable held off a transaction longer than the configured maximum wait time Returns Returns the interrupt error flags as the logical OR of any of the following EPI INT ERR WTFULL EPI INT ERR RSTALL or EPI INT ERR TIMEOUT ROM EPlIntStatus Gets the EPI interrupt status Prototype unsigned long ROM EPIIntStatus unsigned long ulBase tBoolean bMasked ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM EPITABLE is an array of pointers located at ROM_APITABLE 23 ROM EPIIntStatus is a function pointer located at ROM EPITABLE 0 Parameters ulBase is the EPI module base address bMasked is set true to get the masked interrupt status or false to get the raw interrupt status Description This function returns the EP
389. s It is an 11 bit value with a range of 0 2047 counts Returns None ROM EPibDividerSet Sets the clock divider for the EPI module Prototype void ROM EPIDividerSet unsigned long ulBase unsigned long ulDivider ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM EPITABLE is an array of pointers located at ROM_APITABLE 23 ROM EPIDividerSet is a function pointer located at ROM EPITABLE 2 Parameters ulBase is the EPI module base address ulDivider is the value of the clock divider to be applied to the external interface 0 65535 January 26 2012 9 2 1 7 January 26 2012 External Peripheral Interface EPI Description This functions sets the clock divider s that will be used to determine the clock rate of the external interface The ulDivider value is used to derive the EPI clock rate from the system clock based upon the following formula EPIClock Divider 0 SysClk SysClk Divider 2 1 2 For example a divider value of 1 results in an EPI clock rate of half the system clock value of 2 or 3 yield one quarter of the system clock and a value of 4 results in one sixth of the system clock rate In cases where a dual chip select mode is in use and different clock rates are required for each chip select the u Divider parameter must contain two dividers The lower 16 bits define the divider to be u
390. s a function pointer located at ROM ADCTABLE 12 Parameters ulBase is the base address of the ADC module ulSequenceNum is the sample sequence number Description This will clear an underflow condition on one of the sample sequences The underflow condition must be cleared in order to detect a subsequent underflow condition it otherwise causes no harm Returns None 38 January 26 2012 6 1 Controller Area Network CAN Controller Area Network CAN Labliej URP M RET AT TET DTE TO SEU A AA 39 OA EME Oo E n vwd Mix d EE da meade M MC aU MM A M Ed 40 Introduction The Controller Area Network CAN APIs provide a set of functions for accessing the Stellaris CAN modules Functions are provided to configure the CAN controllers configure message objects and manage CAN interrupts The Stellaris CAN module provides hardware processing of the CAN data link layer It can be configured with message filters and preloaded message data so that it can autonomously send and receive messages on the bus and notify the application accordingly It automatically handles generation and checking of CRCs error processing and retransmission of CAN messages The message objects are stored in the CAN controller and provide the main interface for the CAN module on the CAN bus There are 32 message objects that can each be programmed to handle a separate message ID or can be chained together for a sequence of frames w
391. s an array of pointers located at 0x0100 0010 ROM UARTTABLE is an array of pointers located at ROM_APITABLE 1 ROM_UARTBusy is a function pointer located at ROM_UARTTABLE 26 Parameters ulBase is the base address of the UART port Description Allows the caller to determine whether all transmitted bytes have cleared the transmitter hard ware If false is returned the transmit FIFO is empty and all bits of the last transmitted char acter including all stop bits have left the hardware shift register Returns Returns true if the UART is transmitting or false if all transmissions are complete ROM UARTCharGet Waits for a character from the specified port Prototype long ROM UARTCharGet unsigned long ulBase ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM UARTTABLE is an array of pointers located at ROM APITABLE 1 ROM UARTCharGet is a function pointer located at ROM UARTTABLE 14 Parameters ulBase is the base address of the UART port Description Gets a character from the receive FIFO for the specified port If there are no characters avail able this function waits until a character is received before returning Returns Returns the character read from the specified port cast as a long January 26 2012 261 UART 22 2 1 4 22 2 1 5 262 ROM_UARTCharGetNonBlocking Receives a character from the specified port
392. s an array of pointers located at 0x0100 0010 ROM PWMTABLE is an array of pointers located at ROM APITABLE 8 ROM PWMGenIntTrigDisable is a function pointer located at ROM PWMTABLE 15 Parameters ulBase is the base address of the PWM module ulGen is the PWM generator to have interrupts and triggers disabled Must be one of PWM GEN 0 PWM GEN 1 PWM GEN 2 or PWM GEN 3 ullntTrig specifies the interrupts and triggers to be disabled Description Masks the specified interrupt s and trigger s by clearing the specified bits of the in terrupt trigger enable register for the specified PWM generator The ullntTrig parameter is the logical OR of PWM INT CNT ZERO PWM INT CNT LOAD PWM INT CNT AU PWM INT CNT AD PWM INT CNT BU PWM INT CNT BD PWM TR CNT ZERO PWM TR CNT LOAD PWM TR CNT AU PWM TR CNT AD PWM TR CNT BU or PWM TR CNT BD Returns None January 26 2012 187 Pulse Width Modulator PWM 16 2 1 16 ROM PWMGenlntTrigEnable Enables interrupts and triggers for the specified PWM generator block Prototype void ROM PWMGenIntTrigEnable unsigned long ulBase unsigned long ulGen unsigned long ullIntTrig ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM PWMTABLE is an array of pointers located at ROM APITABLE 8 ROM PWMGenIntTrigEnable is a function pointer located at ROM_PWMTABLE 14 Parameters ulBase is the base address
393. s an array of pointers located at ROM_APITABLE 9 ROM QEIIntDisable is a function pointer located at ROM_QEITABLE 12 Parameters ulBase is the base address of the quadrature encoder module ullntFlags is a bit mask of the interrupt sources to be disabled Can be any of the QEI INTERROR QEI INTDIR QEI INTTIMER or QEI INTINDEX values January 26 2012 201 Quadrature Encoder QE 17 2 1 8 17 2 1 9 202 Description Disables the indicated quadrature encoder interrupt sources Only the sources that are enabled can be reflected to the processor interrupt disabled sources have no effect on the processor Returns None ROM QbkllntEnable Enables individual quadrature encoder interrupt sources Prototype void ROM QEIIntEnable unsigned long ulBase unsigned long ulIntFlags ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM QEITABLE is an array of pointers located at ROM_APITABLE 9 ROM QEIIntEnable is a function pointer located at ROM QOEITABLE 11 Parameters ulBase is the base address of the quadrature encoder module ullntFlags is a bit mask of the interrupt sources to be enabled Can be any of the QEI INTERROR QEI INTDIR QEI INTTIMER or QEI INTINDEX values Description Enables the indicated quadrature encoder interrupt sources Only the sources that are enabled can be refle
394. s function returns the current PWM clock configuration Returns Returns the current PWM clock configuration will be one of SYSCTL PWMDIV 1 SYSCTL PWMDIV 2 SYSCTL PWMDIV 4 SYSCTL PWMDIV 8 SYSCTL PWMDIV 16 SYSCTL PWMDIV 32 or SYSCTL PWNMDIV 64 January 26 2012 235 System Control 19 2 1 28 ROM_SysCtIPWMClockSet Sets the PWM clock configuration Prototype void ROM SysCtlPWMClockSet unsigned long ulConfig ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM SYSCTLTABLE is an array of pointers located at ROM APITABLE 13 ROM SysCtlPWMClocksSet is a function pointer located at ROM_SYSCTLTABLE 25 Parameters ulConfig is the configuration for the PWM clock it must be one of SYSCTL PWMDIV 1 SYSCTL PWMDIV 2 SYSCTL PWMDIV 4 SYSCTL PWNMDIV 8 SYSCTL PWMDIV 16 SYSCTL PWNMDIV 32 or SYSCTL PWMDIV 64 Description This function sets the rate of the clock provided to the PWM module as a ratio of the processor clock This clock is used by the PWM module to generate PWM signals its rate forms the basis for all PWM signals Note The clocking of the PWM is dependent upon the system clock rate as configured by ROM SysCtlClockSet Returns None 19 2 1 29 ROM SysCtlReset 236 Resets the device Prototype void ROM SysCtlReset void ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM SYSCTLTABLE is an array of pointers located at RO
395. s of the UART port Description Clears the SIREN IrDA and SIRLP Low Power bits Returns None 22 2 1 12 ROM UARTDMADisable Disable UART DMA operation Prototype void ROM UARTDMADisable unsigned long ulBase unsigned long ulDMAFlags ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM UARTTABLE is an array of pointers located at ROM APITABLE 1 ROM UARTDMADisable is a function pointer located at ROM UARTTABLE 23 Parameters ulBase is the base address of the UART port ulDMAFlags is a bit mask of the DMA features to disable Description This function is used to disable UART DMA features that were enabled by ROM UARTDMAEnable The specified UART DMA features are disabled The uIDMAFlags parameter is the logical OR of any of the following values m UART DMA RX disable DMA for receive m UART DMA TX disable DMA for transmit m UART DMA ERR RXSTOP do not disable DMA receive on UART error Returns None 22 2 1 13 ROM UARTDMAEnable 266 Enable UART DMA operation January 26 2012 UART Prototype void ROM UARTDMAI Enable unsigned 1 ong ulBase unsigned long ulDMAFlags ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM UARTTABLE is an array of pointers located at ROM_APITABLE 1 ROM UARTDMAEnable is a function pointer located at ROM UARTTABLE 22 Para
396. s that has multiple masters the Stellaris I2C master must first call ROM l2CMasterBusBusy before attempting to initiate the desired transaction After determining that the bus is not busy if trying to send data the user must call the ROM l2CMasterDataPut function The transaction can then be initiated on the bus by calling the ROM l2CMasterControl function with any of the following commands I2C MASTER CMD SINGLE SEND I2C MASTER CMD SINGLE RECEIVE I2C MASTER CMD BURST SEND START I2C MASTER CMD BURST RECEIVE START Any of those commands will result in the master arbitrating for the bus driving the start sequence onto the bus and sending the slave address and direction bit across the bus The remainder of the transaction can then be driven using either a polling or interrupt driven method For the single send and receive cases the polling method will involve looping on the re turn from ROM l2CMasterBusy Once that function indicates that the I2C master is no longer busy the bus transaction has been completed and can be checked for errors January 26 2012 123 Inter Integrated Circuit I2C 12 1 2 12 2 124 using ROM l2CMasterErr If there are no errors then the data has been sent or is ready to be read using ROM lI2CMasterDataGet For the burst send and receive cases the polling method also involves calling the ROM l2CMasterControl function for each byte transmitted or received using either the I2C MASTER
397. s timer when it reaches zero the timer will continue counting from a reloaded value When configured as a 32 bit timer the timer can also be configured to operate as an RTC In that case the timer expects to be driven by a 32 KHz external clock which is divided down to produce 1 second clock ticks When in 16 bit mode the timer can also be configured for event capture or as a Pulse Width Modulation PWM generator When configured for event capture the timer acts as a counter It can be configured to either count the time between events or it can count the events themselves The type of event being counted can be configured as a positive edge a negative edge or both edges When a timer is configured as a PWM generator the input line used to capture events becomes an output line and the timer is used to drive an edge aligned pulse onto that line The timer module also provides the ability to control other functional parameters such as output inversion output triggers and timer behavior during stalls Control is also provided over interrupt sources and events Interrupts can be generated to indicate that an event has been captured or that a certain number of events have been captured Interrupts can also be generated when the timer has counted down to zero or when the RTC matches a certain value Functions Functions m void ROM TimerConfigure unsigned long ulBase unsigned long ulConfig m void ROM TimerControlLevel unsigned lon
398. sables a specific region Prototype void ROM MPURegionDisable unsigned long ulRegion ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM MPUTABLE is an array of pointers located at ROM APITABLE 20 ROM MPURegionDisable is a function pointer located at ROM MPUTABLE A La Parameters ulRegion is the region number to disable Description This function is used to disable a previously enabled memory protection region The region will remain configured if it is not overwritten with another call to ROM_MPURegionSet and can be enabled again by calling ROM MPURegionEnable Returns None ROM MPUhRegionEnable Enables a specific region Prototype void ROM MPURegionEnable unsigned long ulRegion ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM MPUTABLE is an array of pointers located at ROM APITABLE 20 ROM MPURegionEnable is a function pointer located at ROM_MPUTABLE 3 Parameters ulRegion is the region number to enable Description This function is used to enable a memory protection region The region should already be set up with the ROM MPURegionSet function Once enabled the memory protection rules of the region will be applied and access violations will cause a memory management fault Returns None January 26 2012 15 2 1 6 15 2 1 7 Memory Protection Unit MPU
399. se void ROM UARTCRharPut unsigned long ulBase unsigned char ucData tBoolean ROM UARTCharPutNonBlocking unsigned long ulBase unsigned char ucData tBoolean ROM UARTCharsAvail unsigned long ulBase void ROM UARTConfigGetExpCIk unsigned long ulBase unsigned long ulUARTCIk un signed long pulBaud unsigned long pulConfig m void ROM UARTConfigSetExpCIk unsigned long ulBase unsigned long ulUARTCIk un signed long ulBaud unsigned long ulConfig void ROM UARTDisable unsigned long ulBase January 26 2012 259 UART 22 2 1 22 2 1 1 260 void ROM_UARTDisableSIR unsigned long ulBase void ROM_UARTDMADisable unsigned long ulBase unsigned long ulDMAFlags void ROM_UARTDMAEnable unsigned long ulBase unsigned long uIDMAFlags void ROM_UARTEnable unsigned long ulBase void ROM_UARTEnableSIR unsigned long ulBase tBoolean bLowPower void ROM UARTFIFODisable unsigned long ulBase void ROM UARTFIFOEnable unsigned long ulBase void ROM UARTFIFOLevelGet unsigned long ulBase unsigned long pulTxLevel unsigned long pulRxLevel void ROM UARTFIFOLevelSet unsigned long ulBase unsigned long ulTxLevel unsigned long ulRxLevel void ROM UARTIntClear unsigned long ulBase unsigned long ullntFlags void ROM UARTIntDisable unsigned long ulBase unsigned long ullntFlags void ROM UARTIntEnable unsigned long ulBase unsigned long ullntFlags unsigned long ROM UARTIntStatus unsigned long ulBase tBoolean bMasked unsi
400. se ROM CANIntStatus to determine the cause Returns None ROM CANIntStatus Returns the current CAN controller interrupt status Prototype unsigned long ROM CANIntStatus unsigned long ulBase tCANIntStsReg eIntStsReg ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM CANTABLE is an array of pointers located at ROM APITABLE 18 ROM CANIntStatus is a function pointer located at ROM CANTABLE 12 Parameters ulBase is the base address of the CAN controller eintStsHeg indicates which interrupt status register to read January 26 2012 47 Controller Area Network CAN 6 2 1 12 6 2 1 13 48 Description Returns the value of one of two interrupt status registers The interrupt status register read is determined by the e ntStsReg parameter which can have one of the following values m CAN INT STS CAUSE indicates the cause of the interrupt m CAN INT STS OBJECT indicates pending interrupts of all message objects CAN INT STS CAUSE returns the value of the controller interrupt register and indicates the cause of the interrupt It will be a value of CAN INT INTID STATUS if the cause is a status in terrupt In this case the status register should be read with the ROM CANStatusGet function Calling this function to read the status will also clear the status interrupt If the value of the inter rupt register is in the range 1 32 then this indicates the numbe
401. sed with CSOn and the upper 16 bits define the divider for CS1n Returns None ROM EPIFIFOContfig Configures the read FIFO Prototype void ROM EPIFIFOConfig unsigned long ulBase unsigned long ulConfig ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM EPITABLE is an array of pointers located at ROM_APITABLE 23 ROM EPIFIFOConfig is a function pointer located at ROM_EPITABLE 16 Parameters ulBase is the EPI module base address ulConfig is the FIFO configuration Description This function configures the FIFO trigger levels and error generation The parameter u Config is the logical OR of the following m EPI FIFO CONFIG WTFULLERR enables an error interrupt when a write is attempted and the write FIFO is full m EPI FIFO CONFIG RSTALLERR enables an error interrupt when a read is stalled due to an interleaved write or other reason m EPI FIFO CONFIG TX EMPTY EPI FIFO CONFIG TX 1 4 EPI FIFO CONFIG TX 1 2 or EPI FIFO CONFIG TX 3 4 to set the TX FIFO trigger level to empty 1 4 1 2 or 3 4 level m EPI FIFO CONFIG RX 1 8 EPI FIFO CONFIG RX 1 4 EPI FIFO CONFIG RX 1 2 EPI FIFO CONFIG RX 3 4 EPI FIFO CONFIG RX 7 8 or EPI FIFO CONFIG RX FULL to set the RX FIFO trigger level to 1 8 1 4 1 2 3 4 7 8 or full level Returns None 81 External Peripheral Interface EPI 9 2 1 8 9 2 1 9 82 ROM_EPIIntDisable
402. signed long ROM uDMAChannelAttributeGet unsigned long ulChannelNum January 26 2012 283 uDMA Controller ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM UDMATABLE is an array of pointers located at ROM_APITABLE 17 ROM uDMAChannelAttributeGet is a function pointer located at ROM_UDMATABLE 13 Parameters ulChannelNum is the channel to configure Description This function returns a combination of flags representing the attributes of the uDMA channel The ulChannelNum parameter must be only one of the following values m UDMA CHANNEL ADCO m UDMA CHANNEL ADC1 m UDMA CHANNEL ADC2 m UDMA CHANNEL ADC3 m UDMA SEC CHANNEL ADC10 m UDMA SEC CHANNEL ADC11 m UDMA SEC CHANNEL ADC12 m UDMA SEC CHANNEL ADC13 m UDMA SEC CHANNEL EPIORX m UDMA SEC CHANNEL EPIOTX m UDMA CHANNEL ETHORX UDMA CHANNEL ETHOTX m UDMA CHANNEL I2S0RX m UDMA CHANNEL lI2SO0TX UDMA CHANNEL SSIORX UDMA CHANNEL SSIOTX m UDMA CHANNEL SSHRX m UDMA CHANNEL SSHTX m UDMA SEC CHANNEL SSHRX m UDMA SEC CHANNEL SSHTX UDMA CHANNEL TMROA UDMA CHANNEL TMROB UDMA CHANNEL TMR1A UDMA CHANNEL TMR1B UDMA SEC CHANNEL TMR1A m UDMA SEC CHANNEL TMR1B m UDMA SEC CHANNEL TMR2A 4 m UDMA SEC CHANNEL TMR2B 5 m UDMA SEC CHANNEL TMR2A 6 m UDMA SEC CHANNEL TMR2B 7 m UDMA SEC CHANNEL TMR2A 14 UDMA SEC CHANNEL TMR2B 15 UDMA SEC CHANNEL TMR3A UDMA SEC CHANNEL TMR3B m UDMA CHANNEL UARTORX 284
403. signed long ROM WatchdoglntStatus unsigned long ulBase tBoolean bMasked void ROM WatchdogLock unsigned long ulBase tBoolean ROM WatchdogLockState unsigned long ulBase unsigned long ROM_WatchdogReloadGet unsigned long ulBase void ROM WatchdogReloadSet unsigned long ulBase unsigned long ulLoadVal void ROM WatchdogResetDisable unsigned long ulBase void ROM WatchdogResetEnable unsigned long ulBase tBoolean ROM WatchdogRunning unsigned long ulBase void ROM WatchdogStallDisable unsigned long ulBase void ROM WatchdogStallEnable unsigned long ulBase void ROM WatchdogUnlock unsigned long ulBase January 26 2012 345 Watchdog Timer 25 2 1 25 2 1 1 25 2 1 2 m unsigned long ROM WatchdogValueGet unsigned long ulBase Function Documentation ROM WatchdogEnable Enables the watchdog timer Prototype void ROM WatchdogEnable unsigned long ulBase ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM WATCHDOGTABLE is an array of pointers located at ROM APITABLE 12 ROM WatchdogEnable is a function pointer located at ROM WATCHDOGTABLE 2 Parameters ulBase is the base address of the watchdog timer module Description This will enable the watchdog timer counter and interrupt Note This function will have no effect if the watchdog timer has been locked See also ROM WatchdogLock ROM WatchdogUnlock Returns None ROM WatchdoglIntClear C
404. signed long ulSequen ceNum void ROM ADCComparatorlntEnable unsigned long ulBase unsigned long ulSequenceNum unsigned long ROM ADCComparatorlntStatus unsigned long ulBase void ROM ADCComparatorRegionSet unsigned long ulBase unsigned long ulComp un signed long ulLowRef unsigned long ulHighRef void ROM ADCComparatorReset unsigned long ulBase unsigned long ulComp tBoolean bTrigger tBoolean blnterrupt m void ROM ADCHardwareOversampleConfigure unsigned long ulBase unsigned long ulFac tor m void ROM ADCIntClear unsigned long ulBase unsigned long ulSequenceNum m void ROM ADOCIntDisable unsigned long ulBase unsigned long ulSequenceNum m void ROM ADCIntEnable unsigned long ulBase unsigned long ulSequenceNum January 26 2012 21 Analog to Digital Converter ADC 5 2 1 5 2 1 1 22 unsigned long ROM_ADCIntStatus unsigned long ulBase unsigned long ulSequenceNum tBoolean bMasked unsigned long ROM_ADCPhaseDelayGet unsigned long ulBase void ROM_ADCPhaseDelaySet unsigned long ulBase unsigned long ulPhase void ROM ADCProcessorTrigger unsigned long ulBase unsigned long ulSequenceNum unsigned long ROM ADCReferenceGet unsigned long ulBase void ROM ADCReferenceSet unsigned long ulBase unsigned long ulRef void ROM ADCSequenceConfigure unsigned long ulBase unsigned long ulSequenceNum unsigned long ulTrigger unsigned long ulPriority long ROM ADCSequenceDataGet unsigned long ulBase unsigned lo
405. ssageGet Reads a CAN message from one of the message object buffers January 26 2012 6 2 1 14 Controller Area Network CAN Prototype void ROM_CANMessageGet unsigned long ulBase unsigned long ulObjID tCANMsgObject pMsgObject tBoolean bClrPendingInt ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM CANTABLE is an array of pointers located at ROM APITABLE 18 ROM CANMessageGet is a function pointer located at ROM CANTABLE 7 Parameters ulBase is the base address of the CAN controller ulObjID is the object number to read 1 32 pMsgObject points to a structure containing message object fields bCirPendingInt indicates whether an associated interrupt should be cleared Description This function is used to read the contents of one of the 32 message objects in the CAN con troller and return it to the caller The data returned is stored in the fields of the caller supplied structure pointed to by pMsgObject The data consists of all of the parts of a CAN message plus some control and status information Normally this is used to read a message object that has received and stored a CAN message with a certain identifier However this could also be used to read the contents of a message object in order to load the fields of the structure in case only part of the structure needs to be changed from a previous setting When using CANMessageGet all of the s
406. stified format or 128 CONFIG FORMAT RIGHT JUST for right justified format I28 CONFIG SCLK INVERT to invert the polarity of the serial bit clock m 12S CONFIG MODE DUAL for dual channel stereo I28 CONFIG MODE COMPACT 16 for 16 bit compact stereo mode I28 CONFIG MODE COMPACT 8 for 8 bit compact stereo mode or I28 CONFIG MODE MONO for single channel mono format 12S CONFIG CLK MASTER or Il28 CONFIG CLK SLAVE to select whether the I2S receiver is the clock master or slave I28 CONFIG SAMPLE SIZE 32 24 20 16 or 8 to select the number of bits per sample m l28 CONFIG WIRE SIZE 32 24 20 16 0r 8to select the number of bits per word that are transferred on the data line Returns None 13 2 1 7 ROM lI2SRxDataGet Reads data samples from the I2S receive FIFO with blocking Prototype void ROM I2SRxDataGet unsigned long ulBase unsigned long xpulData ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM I2STABLE is an array of pointers located at ROM_APITABLE 22 ROM I2SRxDataGet is a function pointer located at ROM I2STABLE 11 Parameters ulBase is the I2S module base address pulData points to storage for the returned I2S sample data Description This function reads a single channel sample or combined left right samples from the I2S re ceive FIFO The format of the sample is determined by the configuration that was used with the function ROM I2SRxConfig
407. stored in the TX FIFO ETH INT RX This interrupt indicates that one or more packets are available in the RX FIFO for processing e 63 Ethernet Controller 8 2 1 9 8 2 1 10 64 ROM EthernetlntStatus Gets the current Ethernet interrupt status Prototype unsigned long ROM EthernetIntStatus unsigned long ulBase tBoolean bMasked ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM ETHERNETTABLE is an array of pointers located at ROM APITABLE 15 ROM EthernetIntStatus is a function pointer located at ROM ETHERNETTABLE 16 Parameters ulBase is the base address of the controller bMasked is false if the raw interrupt status is required and true if the masked interrupt status is required Description This returns the interrupt status for the Ethernet controller Either the raw interrupt status or the status of interrupts that are allowed to reflect to the processor can be returned Returns Returns the current interrupt status enumerated as a bit field of values described in ROM EthernetIntEnable ROM EthernetMACAddrGet Gets the MAC address of the Ethernet controller Prototype void ROM EthernetMACAddrGet unsigned long ulBase unsigned char pucMACAddr ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM ETHERNETTABLE is an array of pointers located at ROM APITABLE 15 ROM EthernetMACAddrG
408. t ROM_UARTTABLE 21 Description Calling this function commences an update of the firmware via the UARTO interface This function assumes that the UARTO interface has already been configured and is currently oper ational Returns Never returns January 26 2012 uDMA Controller 23 uDMA Controller DSM S ONT cnaiaiantacsingka tnd a ad kcein dabas uniebd d dcdit ana OR Kb eid GI h aa aden ite qe A da didt b Nani d d 277 PPOO Foren rbd tte mesxu E Pax UEM MU Mr EL LL ELM Ib c M ee VAUEN E 279 23 1 Introduction The microDMA uDMA API provides functions to configure the Stellaris uDMA Direct Memory Access controller The uDMA controller is designed to work with the the ARM Cortex M3 processor and provides an efficient and low overhead means of transferring blocks of data in the system The uDMA controller has the following features The dedicated channels for supported peripherals one channel each for receive and transmit for devices with receive and transmit paths dedicated channel for software initiated data transfers channels can be independently configured and operated an arbitration scheme that is configurable per channel two levels of priority subordinate to Cortex M3 processor bus usage data sizes of 8 16 or 32 bits address increment of byte half word word or none maskable device requests optional software initiated transfers on any channel interrupt on transfer completion uD
409. t be the logical OR of any of PWM GEN 0 BIT PWM GEN 1 BIT PWM GEN 2 BIT or PWM GEN 3 BIT Description For the selected PWM generators this function causes all queued updates to the period or pulse width to be applied the next time the corresponding counter becomes zero Returns None 196 January 26 2012 Quadrature Encoder QE 17 Quadrature Encoder QEI INTREST esi aa did LR EOD D akon dabas untebad bh dab anton Rafa Minted dees data Ua aden eet Wane dade d does 197 PIA EE Eo SCOPE debt metu E aat hae pi df Mr EL LL A ae brad cs ou M Ep eee 197 17 1 Introduction The quadrature encoder API provides a set of functions for dealing with the Quadrature Encoder with Index QEI Functions are provided to configure and read the position and velocity captures register a QEI interrupt handler and handle QEI interrupt masking clearing The quadrature encoder module provides hardware encoding of the two channels and the index signal from a quadrature encoder device into an absolute or relative position There is additional hardware for capturing a measure of the encoder velocity which is simply a count of encoder pulses during a fixed time period the number of pulses is directly proportional to the encoder speed Note that the velocity capture can only operate when the position capture is enabled The QEI module supports two modes of operation phase mode and clock direction mode In phase mode the encoder produces two clocks that
410. t is the address to which execution control is transferred The format of the command is as follows unsigned char ucCommand 5 ucCommand 0 COMMAND RUN ucCommand 1 Run Address 31 24 ucCommand 2 Run Address 23 16 ucCommand 3 Run Address 15 8 ucCommand 4 Run Address 7 0 This command returns the status of the last command that was issued Typically this command should be received after every command is sent to ensure that the previous command was suc cessful or if unsuccessful to properly respond to a failure The command requires one byte in the data of the packet and the boot loader should respond by sending a packet with one byte of data that contains the current status code The format of the command is as follows unsigned char ucCommand 1 ucCommand 0 COMMAND GET STATUS The following are the definitions for the possible status values that can be returned from the boot loader when COMMAND GET STATUS is sent to the the microcontroller COMMAND RET SUCCESS COMMAND RET UNKNOWN CMD COMMAND RET INVALID CMD COMMAND RET INVALID ADD COMMAND RET FLASH FAIL January 26 2012 Boot Loader COMMAND_SEND_DATA This command should only follow a COMMAND DOWNLOAD com 0x24 mand or another COMMAND SEND DATA command if more data is needed Consecutive send data commands automatically in crement the address and continue programming from the previ ous location The transfer size is limited by
411. t of data to put into the FIFO Description This function will put the data from the pucData parameter into the FIFO for this endpoint If a packet is already pending for transmission then this call will not put any of the data into the FIFO and will return 1 Care should be taken to not write more data than can fit into the FIFO allocated by the call to ROM USBFIFOConfigSet Returns This call will return O on success or 1 to indicate that the FIFO is in use and cannot be written January 26 2012 317 USB Controller 24 3 1 14 ROM_USBEndpointDataSend Starts the transfer of data from an endpoint s FIFO Prototype long ROM USBEndpointDataSend unsigned long ulBase unsigned long ulEndpoint unsigned long ulTransType ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM USBTABLE is an array of pointers located at ROM APITABLE 16 ROM USBEndpointDataSendis a function pointer located at ROM_USBTABLE 12 Parameters ulBase specifies the USB module base address ulEndpoint is the endpoint to access ulTransType is set to indicate what type of data is being sent Description This function will start the transfer of data from the FIFO for a given endpoint This is necessary if the USB EP AUTO SET bit was not enabled for the endpoint Setting the u TransType parameter will allow the appropriate signaling on the USB bus for the type of transaction being
412. t sample pair counts as 2 whether the mode is dual or compact stereo When mono mode is used internally the mono sample is still treated as a sample pair so a single mono sample counts as 2 Since the FIFO always deals with sample pairs the level must be an even number from 0 to 16 The maximum value is 16 which will cause a service request when there is any room in the FIFO The minimum value is 0 which disables the service request Returns None 13 2 1 22 ROM I2STxRxConfigSet Configures the I2S transmit and receive modules Prototype void ROM I2STxRxConfigSet unsigned long ulBase unsigned long ulConfig ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM I2STABLE is an array of pointers located at ROM APITABLE 22 ROM I2STxRxConfigSet is a function pointer located at ROM I2STABLE 19 Parameters ulBase is the I2S module base address ulConfig is the logical OR of the configuration options Description This function is used to configure the options for the I2S transmit and receive channels with identical parameters The parameter ulConfig is the logical OR of the following options m 12S CONFIG FORMAT 12S for standard 12S format I28 CONFIG FORMAT LEFT JUST for left justified format or I28 CONFIG FORMAT RIGHT JUST for right justified format m l28 CONFIG SCLK INVERT to invert the polarity of the serial bit clock January 26 2012 155 Inter IC Soun
413. t to access ulMaxPacketSize is the maximum packet size for this endpoint ulFlags are used to configure other endpoint settings Description This function will set the basic configuration for an endpoint in device mode Endpoint zero does not have a dynamic configuration so this function should not be called for endpoint zero The ulFlags parameter determines some of the configuration while the other parameters provide the rest The USB EP MODE flags define what the type is for the given endpoint m USB EP MODE CTRL is a control endpoint m USB EP MODE ISOC is an isochronous endpoint m USB EP MODE BULK is a bulk endpoint m USB EP MODE INT is an interrupt endpoint The USB EP DMA MODE flags determines the type of DMA access to the endpoint data Fl FOs The choice of the DMA mode depends on how the DMA controller is configured and how itis being used See the Using USB with the uDMA Controller section for more information on DMA configuration When configuring an IN endpoint the USB EP AUTO SET bit can be specified to cause the automatic transmission of data on the USB bus as soon as ulMaxPacketSize bytes of data are written into the FIFO for this endpoint This is commonly used with DMA as no interaction is required to start the transmission of data When configuring an OUT endpoint the USB EP AUTO REQUEST bit is specified to trig ger the request for more data once the FIFO has been drained enough to receive u Max PacketSize mor
414. tClear Clears flash controller interrupt sources Prototype void ROM FlashIntClear unsigned long ulIntFlags ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM FLASHTABLE is an array of pointers located at ROM APITABLE 7 ROM FlashIntClear is a function pointer located at ROM FLASHTABLE 13 Parameters ullntFlags is the bit mask of the interrupt sources to be cleared Can be any of the FLASH INT PROGRAM or FLASH INT AMISC values January 26 2012 10 2 1 3 10 2 1 4 Flash Description The specified flash controller interrupt sources are cleared so that they no longer assert This must be done in the interrupt handler to keep it from being called again immediately upon exit Note Because there is a write buffer in the Cortex M3 processor it may take several clock cycles before the interrupt source is actually cleared Therefore it is recommended that the interrupt source be cleared early in the interrupt handler as opposed to the very last action to avoid returning from the interrupt handler before the interrupt source is actually cleared Failure to do so may result in the interrupt handler being immediately reentered because the interrupt controller still sees the interrupt source asserted Returns None ROM FlashlntDisable Disables individual flash controller interrupt sources Prototype void ROM FlashIntDisable unsigned long ulIntFlags ROM Location ROM
415. tage to 2 0625 V m COMP REF 2 165625V to set the reference voltage to 2 165625 V January 26 2012 Analog Comparator COMP REF 2 26875V to set the reference voltage to 2 26875 V m COMP REF 2 371875V to set the reference voltage to 2 371875 V Returns None 4 2 4 7 ROM ComparatorValueGet Gets the current comparator output value Prototype tBoolean ROM ComparatorValueGet unsigned unsigned long ulBase long ulComp ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM COMPARATORTABLE is an array of pointers located at ROM APITABLE 6 ROM ComparatorValueGet is a function pointer located at ROM COMPARATORTABLE Parameters Ww ulBase is the base address of the comparator module ulComp is the index of the comparator Description This function retrieves the current value of the comparator output Returns Returns true if the comparator output is high and false if the comparator output is low 20 January 26 2012 5 1 5 2 Analog to Digital Converter ADC Analog to Digital Converter ADC INPRO uc nado nrididor dub S4 BR Fav di aded darem d Eua actua Edicto ba xU Medal b AR RAMS E atu LEE diua dud 21 PURNCIONS cers csc cnt n vei Mix Ed ale aiid aie head a ME C aU dE EM CUM EE 21 Introduction The analog to digital converter ADC API provides a set of functions for dealing with the ADC Functions are provided to configure the sample sequencers r
416. tarts or ends a session Description This function is used in OTG mode when the USB controller is on the B Side of the cable and it needs to become the host during a session If the DHNP parameter is set to true then this will enable the USB controller to initiate the Host Negotiation Protocol HNP and if it is set to false it will disable HNP Enabling the HNP sequence will allow the HNP protocol to start the next time the USB controller sees a suspend condition on the bus If the sequence is successful the USB controller will generate a USB INTCTRL CONNECT interrupt The USB controller will also automatically generate a reset condition on the bus Note The application code should wait at least 20ms after receiving the USB INTCTRL CONNECT interrupt before clearing the reset condition with a call to ROM USBHostReset In order to leave host mode due to a successful HNP sequence the USB controller must put the bus into suspend via a call to ROM USBHostSuspend This signals the A Side of the cable to resume host operation Returns None 24 3 1 55 ROM USBPHYPowerOff Powers off the USB PHY Prototype void ROM USBPHYPowerOff unsigned long ulBase January 26 2012 343 USB Controller ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM USBTABLE is an array of pointers located at ROM APITABLE 16 ROM USBPHYPowerOff is a function pointer located at ROM USBTABLE 56 P
417. te the application must remember if a uDMA transaction was in progress Example Interrupt handling with uDMA Get the current interrupt status ulStatus ROM_USBIntStatus USBO_BASE if ulStatus amp USB_INT_DEV_OUT_EP1 January 26 2012 307 USB Controller Handle a short packet else if g_ulFlags amp EP1_DMA_OUT_PEND amp amp ROM_uDMAChannelModeGet UDMA_CHANNEL_USBEP1RX UDMA_MODE_STOP Handle the uDMA complete case Restart receive uDMA if desired 24 3 Functions 308 Functions unsigned long ROM_USBDevAddrGet unsigned long ulBase void ROM_USBDevAddrSet unsigned long ulBase unsigned long ulAddress void ROM USBDevConnect unsigned long ulBase void ROM USBDevDisconnect unsigned long ulBase void ROM USBDevEndpointConfigGet unsigned long ulBase unsigned long ulEndpoint un signed long pulMaxPacketSize unsigned long pulFlags void ROM USBDevEndpointConfigSet unsigned long ulBase unsigned long ulEndpoint un signed long ulMaxPacketSize unsigned long ulFlags void ROM USBDevEndpointDataAck unsigned long ulBase unsigned long ulEndpoint tBoolean blsLastPacket void ROM USBDevEndpointStall unsigned long ulBase unsigned long ulEndpoint unsigned long ulFlags void ROM USBDevEndpointStatusClear unsigned long ulBase unsigned long ulEndpoint unsigned long ulFlags void ROM USBDevMode unsigned long ulBase unsigned long ROM
418. ted at ROM SYSCTLTABLE 27 Parameters ulSpeed is the desired sample rate of the ADC must be one of SYSCTL ADCSPEED 1MSPS SYSCTL ADCSPEED 500KSPS SYSCTL ADCSPEED 250KSPS or SYSCTL ADCSPEED 125KSPS Description This function sets the rate at which the ADC samples are captured by the ADC block The sampling speed may be limited by the hardware so the sample rate may end up being slower than requested ROM SysCtlADCSpeedGet will return the actual speed in use Returns None January 26 2012 219 System Control 19 2 1 3 19 2 1 4 220 ROM SysCtlClockGet Gets the processor clock rate Prototype unsigned long ROM SysCtlClockGet void ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM SYSCTLTABLE is an array of pointers located at ROM APITABLE 13 ROM SysCtlClockGet is a function pointer located at ROM SYSCTLTABLE 24 Description This function determines the clock rate of the processor clock This is also the clock rate of all the peripheral modules with the exception of PWM which has its own clock divider Note This will not return accurate results if ROM SysCtlClockSet has not been called to configure the clocking of the device or if the device is directly clocked from a crystal or a clock source that is not one of the supported crystal frequencies In the later case this function should be modified to directly return the correct system clock r
419. terrupt is caused by one of the message objects then it can be cleared by reading the message object using ROM CANMessageGet There are several status registers that can be used to help the application manage the controller The status registers are read using the ROM CANStatusGet function There is a controller status register that provides general status information such as error or warning conditions There are also several status registers that provide information about all of the message objects at once using a 32 bit bit map of the status with one bit representing each message object These status registers can be used to determine m Which message objects have unprocessed received data m Which message objects have pending transmission requests m Which message objects are allocated for use Functions Functions m unsigned long ROM CANBitRateSet unsigned long ulBase unsigned long ulSourceClock unsigned long ulBitRate January 26 2012 6 2 1 6 2 1 1 Controller Area Network CAN void ROM CANBitTimingGet unsigned long ulBase tCANBitClkParms pClkParms void ROM CANBitTimingSet unsigned long ulBase tCANBitClkParms xpClkParms void ROM CANDisable unsigned long ulBase void ROM CANEnable unsigned long ulBase tBoolean ROM CANErrCntrGet unsigned long ulBase unsigned long pulRxCount unsigned long pulTxCount void ROM CANInit unsigned long ulBase void ROM CANIntClear unsigned long ulBase unsigned long ul
420. ters located at ROM_APITABLE 4 ROM GPIOPinIntEnable is a function pointer located at ROM GPIOTABLE iu Parameters ulPort is the base address of the GPIO port ucPins is the bit packed representation of the pin s Description Unmasks the interrupt for the specified pin s The pin s are specified using a bit packed byte where each bit that is set identifies the pin to be accessed and where bit 0 of the byte represents GPIO port pin 0 bit 1 represents GPIO port pin 1 and so on Returns None 11 2 1 11 ROM GPlOPinlIntStatus Gets interrupt status for the specified GPIO port Prototype long ROM GPIOPinIntStatus unsigned long ulPort tBoolean bMasked ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM GPIOTABLE is an array of pointers located at ROM_APITABLE 4 ROM GPIOPinIntStatus s a function pointer located at ROM GPIOTABLE No Parameters ulPort is the base address of the GPIO port bMasked specifies whether masked or raw interrupt status is returned Description If bMasked is set as true then the masked interrupt status is returned otherwise the raw interrupt status will be returned Returns Returns a bit packed byte where each bit that is set identifies an active masked or raw inter rupt and where bit 0 of the byte represents GPIO port pin 0 bit 1 represents GPIO port pin 1 and so on Bits 31 8 should be ignored Janu
421. the external clock enable is turned on with the EPI GPMODE CLKENA option is used In the case that external clock enable is used this parameter determines the maximum number of clocks to wait when the external clock enable sign al is holding off a transaction A value of 0 means to wait forever If a non zero value is used and exceeded an interrupt will occur and the transaction aborted Returns Non e 9 2 1 3 ROM EPIConfigHB16Set Configures the interface for Host bus 16 operation Prototype void ROM EPIConfigHBl 6Set unsigned long ulBase unsigned long ulConfig unsigned long ulMaxWait ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM EPITABLE is an array of pointers located at ROM_APITABLE 23 ROM EPIConfigHBl16Set is a function pointer located at ROM EPITABLE 6 Parameters ulBase is the EPI module base address ulConfig is the interface configuration ulMaxWait is the maximum number of external clocks to wait if a FIFO ready signal is holding off the transaction Description This function is used to configure the interface when used in Host bus 16 operation as chosen with the function ROM EPIModeSet The parameter u Config is the logical OR of any of the following January 26 2012 one of EPI HB16 MODE ADMUX EPI HB16 MODE ADDEMUX EPI HB16 MODE SRAM or EPI HB16 MODE FIFO to select the HB16 mode EPI HB
422. the interrupt controller Other enables for the interrupt such as at the peripheral level are unaffected by this function Returns None ROM IntEnable Enables an interrupt Prototype void ROM IntEnable unsigned long ulInterrupt ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM INTERRUPTTABLE is an array of pointers located at ROM APITABLE 14 ROM IntEnable is a function pointer located at ROM INTERRUPTTABLE 0 Parameters ullnterrupt specifies the interrupt to be enabled Description The specified interrupt is enabled in the interrupt controller Other enables for the interrupt such as at the peripheral level are unaffected by this function January 26 2012 14 2 1 3 14 2 1 4 14 2 1 5 Interrupt Controller NVIC Returns None ROM IntMasterDisable Disables the processor interrupt Prototype tBoolean ROM_IntMasterDisable void ROM Location ROM_APITABLE is an array of pointers located at 0x0100 0010 ROM INTERRUPTTABLE is an array of pointers located at ROM_APITABLE 14 ROM IntMasterDisable is a function pointer located at ROM INTERRUPTTABLE 2 Description Prevents the processor from receiving interrupts This does not affect the set of interrupts enabled in the interrupt controller it just gates the single interrupt from the controller to the processor Returns Returns true if interrupts were alr
423. ther endpoints are capable of using the uDMA controller The uDMA channel numbers for USB are defined by the following values m UDMA CHANNEL USBEP1RX m UDMA CHANNEL USBEP1TX m UDMA CHANNEL USBEP2RX UDMA CHANNEL USBEP2TX UDMA CHANNEL USBEP3RX m UDMA CHANNEL USBEPS3TX Since the uDMA controller views transfers as either transmit or receive and the USB controller operates on IN OUT transactions some care must be taken to use the correct uDMA channel with the correct endpoint USB host IN and USB device OUT endpoints both use receive uDMA channels while USB host OUT and USB device IN endpoints will use transmit uDMA channels When configuring the endpoint there are additional DMA settings needed When call ing ROM USBDevEndgpointConfigSet for an endpoint that will use uDMA extra flags need to be added to the u Flags parameter These flags are one of USB EP DMA MODE O0 or USB EP DMA MODE 1 to control the mode of the DMA transaction and likely USB EP AUTO SET to allow the data to be transmitted automatically once a packet is ready USB EP DMA MODE 90 will generate an interrupt whenever there is more space available in the FIFO This allows the application code to perform operations between each packet USB EP DMA MODE 1 will only interrupt when the DMA transfer complete or there is some type of error condition This can be used for larger transmissions that require no interaction be tween packets USB EP AUTO SET should normally be specified w
424. tion ROM_APITABLE is an array of pointers located at 0x0100 0010 ROM_WATCHDOGTABLE is an array of pointers located at ROM_APITABLE 12 ROM_WatchdogLock is a function pointer located at ROM_WATCHDOGTABLE 5 Parameters ulBase is the base address of the watchdog timer module Description Locks out write access to the watchdog timer configuration registers Returns None ROM_WatchdogLockState Gets the state of the watchdog timer lock mechanism Prototype tBoolean ROM_WatchdogLockState unsigned long ulBase ROM Location ROM_APITABLE is an array of pointers located at 0x0100 0010 ROM_WATCHDOGTABLE is an array of pointers located at ROM_APITABLE 12 ROM_WatchdogLockState is a function pointer located at ROM WATCHDOGTABLE 7 Parameters ulBase is the base address of the watchdog timer module January 26 2012 25 2 1 7 25 2 1 8 Watchdog Timer Description Returns the lock state of the watchdog timer registers Returns Returns true if the watchdog timer registers are locked and false if they are not locked ROM_WatchdogReloadGet Gets the watchdog timer reload value Prototype unsigned long ROM_WatchdogReloadGet unsigned long ulBase ROM Location ROM_APITABLE is an array of pointers located at 0x0100 0010 ROM WATCHDOGTABLE is an array of pointers located at ROM_APITABLE 12 ROM WatchdogReloadGet is a function pointer located at ROM WATCHDOGTABLE 9
425. tion the ADC_CTL_D bit selects differential operation when set the channel to be sampled can be chosen the ADC_CTL_CHO through ADC_CTL_CH15 values and the internal temperature sensor can be selected the ADC_CTL_TS bit Additionally this step can be defined as the last in the sequence the ADC_CTL_END bit and it can be configured to cause an interrupt when the step is complete the ADC_CTL_IE bit If the digital comparators are present on the device this step may also be configured to send the ADC sample to the selected comparator using ADC CTL CMPO through ADC_CTL_CMP7 The configuration is used by the ADC at the appropriate time when the trigger for this sequence occurs Note If the Digitial Comparator is present and enabled using the ADC CTL CMPO through ADC CTL CMPT7 selects the ADC sample will NOT be written into the ADC sequence data FIFO The ulStep parameter determines the order in which the samples are captured by the ADC when the trigger occurs It can range from zero to seven for the first sample sequence from zero to three for the second and third sample sequence and can only be zero for the fourth sample sequence Differential mode only works with adjacent channel pairs for example O and 1 The channel select must be the number of the channel pair to sample for example ADC CTL CHO for 0 and 1 or ADC CTL CH1 for 2 and 3 or undefined results will be returned by the ADC Additionally if differential mode is selected wh
426. tion of rotation Prototype long ROM QEIDirectionGet unsigned long ulBase ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM QEITABLE is an array of pointers located at ROM_APITABLE 9 ROM QEIDirectionGet is a function pointer located at ROM OEITABLE 5 Parameters ulBase is the base address of the quadrature encoder module Description This returns the current direction of rotation In this case current means the most recently detected direction of the encoder it may not be presently moving but this is the direction it last moved before it stopped Returns Returns 1 if moving in the forward direction or 1 if moving in the reverse direction ROM QkEIDisable Disables the quadrature encoder Prototype void ROM OEIDisable unsigned long ulBase ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM QEITABLE is an array of pointers located at ROM_APITABLE 9 ROM QEIDisable is a function pointer located at ROM OEITABLE 2 Parameters ulBase is the base address of the quadrature encoder module Description This will disable operation of the quadrature encoder module January 26 2012 199 Quadrature Encoder QE 17 2 1 4 17 2 1 5 200 Returns None ROM_QElEnable Enables the quadrature encoder Prototype void ROM_OFTEnable unsigned long ulBase
427. tion once when ADC output transitions into high band only if ADC output has been in the low band since the last trigger output The ADC COMP INT xxx term can take on the following values m ADC COMP INT NONE to never generate ADC interrupt m ADC COMP INT LOW ALWAYS to always generate ADC interrupt when ADC output is in the low band ADC COMP INT LOW ONCE to generate ADC interrupt once when ADC output transi tions into the low band ADC COMP NT LOW HALWAYS to always generate ADC interrupt when ADC output is in the low band only if ADC output has been in the high band since the last trigger output m ADC COMP INT LOW HONCE to generate ADC interrupt once when ADC output tran sitions into low band only if ADC output has been in the high band since the last trigger output m ADC COMP INT MID ALWAYS to always generate ADC interrupt when ADC output is in the mid band ADC COMP INT MID ONCE to generate ADC interrupt once when ADC output transi tions into the mid band m ADC COMP INT HIGH ALWAYS to always generate ADC interrupt when ADC output is in the high band ADC COMP INT HIGH ONCE to generate ADC interrupt once when ADC output transi tions into the high band ADC COMP INT HIGH HALWAYS to always generate ADC interrupt when ADC output is in the high band only if ADC output has been in the low band since the last trigger output ADC COMP INT HIGH HONCE to generate ADC interrupt once when ADC output tran sitions into high band
428. tlDeepSleep Puts the processor into deep sleep mode Prototype void ROM SysCtlDeepSleep void ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM SYSCTLTABLE is an array of pointers located at ROM APITABLE 13 ROM SysCtlDeepSleep is a function pointer located at ROM SYSCTLTABLE 20 Description January 26 2012 This function places the processor into deep sleep mode it will not return un til the processor returns to run mode The peripherals that are enabled via ROM SysCtlPeripheralDeepSleepEnable continue to operate and can wake up the proces sor if automatic clock gating is enabled with ROM SysCtlPeripheralClockGating otherwise all peripherals continue to operate 221 System Control 19 2 1 6 19 2 1 7 222 Returns None ROM SysCtlDelay Provides a small delay Prototype void ROM SysCtlDelay unsigned long ulCount ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM SYSCTLTABLE is an array of pointers located at ROM APITABLE 13 ROM SysCtlDelay is a function pointer located at ROM SYSCTLTABLE 34 Parameters ulCount is the number of delay loop iterations to perform Description This function provides a means of generating a constant length delay It is written in assembly to keep the delay consistent across tool chains avoiding the need to tune the delay based on the tool chain in use The loop tak
429. turns None ROM SysCtlResetCauseGet Gets the reason for a reset Prototype unsigned long ROM SysCtlResetCauseGet void ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM SYSCTLTABLE is an array of pointers located at ROM APITABLE 13 ROM SysCtlResetCauseGet is a function pointer located at ROM SYSCTLTABLE 21 Description This function will return the reason s for a reset Since the reset reasons are sticky until either cleared by software or an external reset multiple reset reasons may be returned if multiple resets have occurred The reset reason will be a logical OR of SYSCTL CAUSE LDO SYSCTL CAUSE SW SYSCTL CAUSE WDOG SYSCTL CAUSE BOR SYSCTL CAUSE POR and or SYSCTL CAUSE EXT Returns Returns the reason s for a reset January 26 2012 237 System Control 19 2 1 32 ROM_SysCtlSleep Puts the processor into sleep mode Prototype void ROM SysCtlSleep void ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM SYSCTLTABLE is an array of pointers located at ROM APITABLE 13 ROM SysCtlSleepis a function pointer located at ROM_SYSCTLTABLE 0 Description This function places the processor into sleep mode it will not return until the processor re turns to run mode The peripherals that are enabled via ROM SysCtlPeripheralSleepEnable continue to operate and can wake up the processor if automatic clock gating is e
430. turns The current interrupt status enumerated as a bit field of values described in ROM TimerlntEnable 21 2 1 12 ROM TimerLoadGet Gets the timer load value Prototype unsigned long ROM TimerLoadGet unsigned long ulBase unsigned long ulTimer ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM TIMERTABLE is an array of pointers located at ROM APITABLE 11 ROM TimerLoadGet is a function pointer located at ROM TIMERTABLE 15 Parameters ulBase is the base address of the timer module ulTimer specifies the timer must be one of TIMER A or TIMER B Only TIMER A should be used when the timer is configured for 32 bit operation Description This function gets the currently programmed interval load value for the specified timer Returns Returns the load value for the timer 21 2 1 13 ROM TimerLoadSet Sets the timer load value Prototype void ROM TimerLoadSet unsigned long ulBase unsigned long ulTimer unsigned long ulValue ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM TIMERTABLE is an array of pointers located at ROM APITABLE 11 ROM TimerLoadsSet is a function pointer located at ROM TIMERTABLE 14 January 26 2012 253 Timer Parameters ulBase is the base address of the timer module ulTimer specifies the timer s to adjust must be one of TIMER_A TI
431. uDMAEnable is a function pointer located at ROM UDMATABLE 1 Description This function enables the uDMA controller The uDMA controller must be enabled before it can be configured and used Returns None 23 2 1 20 ROM uDMAErrorStatusClear 300 Clears the uDMA error interrupt Prototype void ROM uDMAErrorStatusClear void ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM UDMATABLE is an array of pointers located at ROM APITABLE 17 ROM uDMAErrorStatusClear is a function pointer located at ROM UDMATABLE m 4 January 26 2012 23 2 1 21 uDMA Controller Description This function clears a pending uDMA error interrupt It should be called from within the UDMA error interrupt handler to clear the interrupt Returns None ROM_uDMAErrorStatusGet Gets the uDMA error status Prototype unsigned long ROM_uDMAErrorStatusGet void ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM UDMATABLE is an array of pointers located at ROM_APITABLE 17 ROM uDMAErrorStatusGet is a function pointer located at ROM_UDMATABLE 3 Description This function returns the uDMA error status It should be called from within the uDMA error interrupt handler to determine if a uDMA error occurred Returns Returns non zero if a uDMA error is pending January 26 2012 301 uDMA Controller 302 Januar
432. uffer in the Cortex M3 processor it may take several clock cycles before the interrupt source is actually cleared Therefore it is recommended that the interrupt source be cleared early in the interrupt handler as opposed to the very last action to avoid returning from the interrupt handler before the interrupt source is actually cleared Failure to do so may result in the interrupt handler being immediately reentered because the interrupt controller still sees the interrupt source asserted Returns None ROM ADCIntDisable Disables a sample sequence interrupt Prototype void ROM ADCIntDisable unsigned long ulBase unsigned long ulSequenceNum ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM ADCTABLE is an array of pointers located at ROM APITABLE 5 ROM ADCIntDisable is a function pointer located at ROM ADCTABLE np a Parameters ulBase is the base address of the ADC module ulSequenceNum is the sample sequence number Description This function disables the requested sample sequence interrupt Returns None January 26 2012 5 2 1 11 5 2 1 12 Analog to Digital Converter ADC ROM ADOCIntEnable Enables a sample sequence interrupt Prototype void ROM ADCIntEnable unsigned long ulBase unsigned long ulSequenceNum ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM ADCTABLE is an array o
433. ulBase unsigned long ulTimer ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM_TIMERTABLE Is an array of pointers located at ROM_APITABLE 11 ROM_TimerPrescaleMatchGet is a function pointer located at ROM_TIMERTABLE 13 Parameters ulBase is the base address of the timer module ulTimer specifies the timer must be one of TIMER A or TIMER B Description This function gets the value of the input clock prescaler match value When in a 16 bit mode that uses the counter match and prescaler the prescale match effectively extends the range of the counter to 24 bits Returns The value of the timer prescale match 21 2 1 18 ROM TimerPrescaleMatchSet 256 Set the timer prescale match value Prototype void ROM TimerPrescaleMatchSet unsigned long ulBase unsigned long ulTimer unsigned long ulValue ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM TIMERTABLE is an array of pointers located at ROM APITABLE 11 ROM TimerPrescaleMatchSet is a function pointer located at ROM_TIMERTABLE 12 Parameters ulBase is the base address of the timer module ulTimer specifies the timer s to adjust must be one of TIMER A TIMER B or TIMER BOTH ulValue is the timer prescale match value must be between 0 and 255 inclusive Description This function sets the value of the input clock presca
434. unsigned long ROM USBFrameNumberGet unsigned long ulBase unsigned long ROM USBHostAddrGet unsigned long ulBase unsigned long ulEndpoint un signed long ulFlags void ROM USBHostAddrSet unsigned long ulBase unsigned long ulEndpoint unsigned long ulAddr unsigned long ulFlags void ROM USBHostEndpointDataAck unsigned long ulBase unsigned long ulEndpoint m void ROM USBHostEndpointDataToggle unsigned long ulBase unsigned long ulEndpoint January 26 2012 tBoolean bDataToggle unsigned long ulFlags void ROM USBHostEndpointStatusClear unsigned long ulBase unsigned long ulEndpoint unsigned long ulFlags unsigned long ROM USBHostHubAddrGet unsigned long ulBase unsigned long ulEndpoint unsigned long ulFlags void ROM USBHostHubAddrSet unsigned long ulBase unsigned long ulEndpoint unsigned long ulAddr unsigned long ulFlags void ROM USBHostMode unsigned long ulBase void ROM USBHostPwrConfig unsigned long ulBase unsigned long ulFlags void ROM USBHostPwrDisable unsigned long ulBase void ROM USBHostPwrEnable unsigned long ulBase void ROM USBHostPwrFaultDisable unsigned long ulBase void ROM USBHostPwrFaultEnable unsigned long ulBase void ROM USBHostRequestlN unsigned long ulBase unsigned long ulEndpoint void ROM USBHostRequestStatus unsigned long ulBase void ROM USBHostReset unsigned long ulBase tBoolean bStart void ROM USBHostResume unsigned long ulBase tBoolean bStart unsigned long ROM USBHostSp
435. unsigned long ulBase unsigned long ulGenFault void ROM PWMIntEnable unsigned long ulBase unsigned long ulGenFault unsigned long ROM PWMIntStatus unsigned long ulBase tBoolean bMasked void ROM_PWMOutputFault unsigned long ulBase unsigned long ulPWMOutBits tBoolean bFaultSuppress void ROM PWMoOutputFaultLevel unsigned long ulBase unsigned long ulPWMOutBits tBoolean bDriveHigh void ROM PWMoOuUtputlnvert unsigned long ulBase unsigned long ulPWMOutBits tBoolean bInvert void ROM_PWMOuiputState unsigned long ulBase unsigned long ulPWMOutBits tBoolean bEnable unsigned long ROM PWMPulseWidthGet unsigned long ulBase unsigned long ulPWMOut void ROM PWMPulseWidthSet unsigned long ulBase unsigned long ulPWMOut unsigned long ulWidth void ROM PWMSyncTimeBase unsigned long ulBase unsigned long ulGenBits void ROM PWMSyncUpdate unsigned long ulBase unsigned long ulGenBits January 26 2012 16 2 1 16 2 1 1 16 2 1 2 Pulse Width Modulator PWM Function Documentation ROM_PWMDeadBandDisable Disables the PWM dead band output Prototype void ROM_PWMDeadBandDisable unsigned long ulBase unsigned long ulGen ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM PWMTABLE is an array of pointers located at ROM APITABLE 8 ROM PWMDeadBandDisable is a function pointer located at ROM PWMTABLE 8 Parameters ulBase is the base address of the
436. unsigned short ROM_Crc16Array unsigned long ulWordLen unsigned long xpulData m void ROM Crc16Array3 unsigned long ulWordLen unsigned long pulData unsigned short xpusCrc3 Function Documentation ROM Crc16Array Calculates the CRC 16 of an array of words Prototype unsigned short ROM Crcl 6Array unsigned long ulWordLen unsigned long pulData January 26 2012 55 CRC 16 7 2 1 2 56 ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM SOFTWARETABLE is an array of pointers located at ROM_APITABLE 21 ROM Crcl6Array is a function pointer located at ROM SOFTWARETABLE 1 Parameters ulWordLen is the length of the array in words pulData is a pointer to the array of words Description This function is used to calculate a standard CRC 16 cyclical redundancy check on the data passed to it The length of the data only matters in terms of the strength of the CRC likelihood of catching errors The longer the data the more likely it will not catch some errors Returns Returns the calculated CRC 16 ROM Crc16Array3 Calculates three CRC 16s of an array of words Prototype void ROM Crcl6Array3 unsigned long ulWordLen unsigned long xpulData unsigned short x pusCrc3 ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM SOFTWARETABLE is an array of pointers located at ROM_APITABLE 21 ROM Crcl6Array3 is a function
437. until the transmit FIFO is empty Once space is available the function will return once BufLen bytes of the packet have been placed into the FIFO and the transmitter has been started The function will not wait for the transmission to complete The function will return the negated BufLen if the length is larger than the space available in the transmit FIFO Note This function blocks and will wait until space is available for the transmit packet before returning Returns Returns the negated packet length IBufLen if the packet is too large for FIFO and the packet length IBufLen otherwise 8 2 1 16 ROM EthernetPacketPutNonBlocking Sends a packet to the Ethernet controller Prototype long ROM EthernetPacketPutNonBlocking unsigned long ulBase unsigned char xpucBuf long lBufLen ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM ETHERNETTABLE is an array of pointers located at ROM APITABLE 15 ROM EthernetPacketPutNonBlocking is a function pointer located at ROM ETHERNETTABLE 12 Parameters ulBase is the base address of the controller pucBuf is the pointer to the packet buffer IBufLen is number of bytes in the packet to be transmitted Description This function writes BufLen bytes of the packet contained in pucBuf into the transmit FIFO of the controller and then activates the transmitter for this packet If no space is available in the FIFO t
438. upt source asserted Returns None ROM TimerlntDisable Disables individual timer interrupt sources Prototype void ROM TimerIntDisable unsigned long ulBase unsigned long ulIntFlags ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM TIMERTABLE is an array of pointers located at ROM APITABLE 11 ROM TimerIntDisable is a function pointer located at ROM TIMERTABLE 20 Parameters ulBase is the base address of the timer module ullntFlags is the bit mask of the interrupt sources to be disabled Description Disables the indicated timer interrupt sources Only the sources that are enabled can be re flected to the processor interrupt disabled sources have no effect on the processor The ullntFlags parameter has the same definition as the ullntFlags parameter to ROM TimerlntEnable Returns None January 26 2012 251 Timer 21 2 1 10 ROM TimerlntEnable 21 2 1 11 252 Enables individual timer interrupt sources Prototype void ROM TimerIntEnable unsigned long ulBase unsigned long ulIntFlags ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM TIMERTABLE is an array of pointers located at ROM APITABLE 11 ROM TimerIntEnable is a function pointer located at ROM TIMERTABLE 19 Parameters ulBase is the base address of the timer module ullntFlags is the b
439. ure is a function pointer located at ROM OEITABLE 3 Parameters ulBase is the base address of the quadrature encoder module ulConfig is the configuration for the quadrature encoder See below for a description of this parameter ulMaxPosition specifies the maximum position value Description This will configure the operation of the quadrature encoder The ulConfig parameter provides the configuration of the encoder and is the logical OR of several values m QEI CONFIG CAPTURE A or QEI CONFIG CAPTURE A B to specify if edges on channel A or on both channels A and B should be counted by the position integrator and velocity accumulator m QEI CONFIG NO RESET or QEI CONFIG RESET IDX to specify if the position inte grator should be reset when the index pulse is detected m QEI CONFIG QUADRATURE or QEI CONFIG CLOCK DIR to specify if quadrature sig nals are being provided on ChA and ChB or if a direction signal and a clock are being provided instead 198 January 26 2012 17 2 1 2 17 2 1 3 Quadrature Encoder QE QEI CONFIG NO SWAP or QEI CONFIG SWAP to specify if the signals provided on ChA and ChB should be swapped before being processed ulMaxPosition is the maximum value of the position integrator and is the value used to reset the position capture when in index reset mode and moving in the reverse negative direction Returns None ROM QbklbDirectionGet Gets the current direc
440. ver and the boot loader also acts as the client in this protocol As each data block is received it is programmed into flash Once all data blocks are received and programmed the device is reset causing it to start running the new firmware image The Ethernet controller will be configured to use the MAC address stored in the USERO UART1 data registers or if one is not programmed in USERO USERT1 it will use the default MAC address of 00 1a b6 00 64 00 When there is data in USERO USERt it will be interpreted as a MAC address of U0B0 U0B1 U0B2 U1B0 U1B1 U1B2 where UOBO is USERO bits 7 0 or byte 0 UOB1 is USERO bits 15 8 or byte 1 and so on Note When using the Ethernet update the boot loader can only program images to the beginning of memory since there is no mechanism in BOOTP to specify the address to program the image The following IETF specifications define the protocols used by the Ethernet update mechanism m RFC951 http tools ietf org html rfc951 html defines the bootstrap protocol m RFC1350 nttp tools ietf org html rfc1350 html defines the trivial file trans fer protocol January 26 2012 3 2 3 2 1 3 2 1 1 AES Data Tables AES Data Tables Kodu Akerurn addi 04 R13 Xv dai oodd aiam d iuga actua Ex tte a iid do dace bans S x atui EE aes Sap REGE 13 FONE IONS 42225 m vp n vd a cd IE a dS IC audi m dde n E 13 Introduction The Advanced Encryption Standard AES is a publicly defined encryption standard
441. vious values to be overwritten Returns None 16 2 1 28 ROM PWMsSyncTimeBase Synchronizes the counters in one or multiple PWM generator blocks Prototype void ROM PWMSyncTimeBase unsigned long ulBase unsigned long ulGenBits ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM PWMTABLE is an array of pointers located at ROM APITABLE 8 ROM PWMSyncTimeBase is a function pointer located at ROM PWMTABLE 10 Parameters ulBase is the base address of the PWM module ulGenBits are the PWM generator blocks to be synchronized Must be the logical OR of any of PWM GEN 0 BIT PWM GEN 1 BIT PWM GEN 2 BIT or PWM GEN 3 BIT Description For the selected PWM module this function synchronizes the time base of the generator blocks by causing the specified generator counters to be reset to zero Returns None January 26 2012 195 Pulse Width Modulator PWM 16 2 1 29 ROM_PWMSyncUpdate Synchronizes all pending updates Prototype void ROM_PWMSyncUpdate unsigned long ulBase unsigned long ulGenBits ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM PWMTABLE is an array of pointers located at ROM APITABLE 8 ROM PWMSyncUpdate is a function pointer located at ROM PWMTABLE o mun Parameters ulBase is the base address of the PWM module ulGenBits are the PWM generator blocks to be updated Mus
442. wrFaultEnable is a function pointer located at ROM USBTABLE m 32 Parameters ulBase specifies the USB module base address Description This function enables power fault detection in the USB controller If the USBPFLT pin is not in use this function should not be used Note This function should only be called in host mode Returns None 24 3 1 38 ROM_USBHostRequestIN Schedules a request for an IN transaction on an endpoint in host mode Prototype void ROM_USBHostRequestIN unsigned long ulBase unsigned long ulEndpoint ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM USBTABLE is an array of pointers located at ROM APITABLE 16 ROM USBHostRequestIN is a function pointer located at ROM USBTABLE 33 Parameters ulBase specifies the USB module base address ulEndpoint is the endpoint to access Description This function will schedule a request for an IN transaction When the USB de vice being communicated with responds the data the data can be retrieved by calling ROM USBEndpointDataGet or via a DMA transfer Note This function should only be called in host mode Returns None January 26 2012 333 USB Controller 24 3 1 39 ROM_USBHostRequestStatus Issues a request for a status IN transaction on endpoint zero Prototype void ROM_USBHostRequestStatus unsigned long ulBase ROM Locati
443. x 8x 16x 32x and 64x Specifying an oversampling factor of zero will disable hardware oversampling Hardware oversampling applies uniformly to all sample sequencers It does not reduce the depth of the sample sequencers like the software oversampling APIs each sample written into the sample sequence FIFO is a fully oversampled analog input reading Enabling hardware averaging increases the precision of the ADC at the cost of throughput For example enabling 4x oversampling reduces the throughput of a 250 Ksps ADC to 62 5 Ksps Note Hardware oversampling is available beginning with Rev CO of the Stellaris microcontroller Returns None ROM ADOCIntClear Clears sample sequence interrupt source January 26 2012 27 Analog to Digital Converter ADC 5 2 1 10 28 Prototype void ROM_ADCIntClear unsigned long ulBase unsigned long ulSequenceNum ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM ADCTABLE is an array of pointers located at ROM_APITABLE 5 ROM ADCIntClear is a function pointer located at ROM ADCTABLE 4 Parameters ulBase is the base address of the ADC module ulSequenceNum is the sample sequence number Description The specified sample sequence interrupt is cleared so that it no longer asserts This must be done in the interrupt handler to keep it from being called again immediately upon exit Note Because there is a write b
444. x Xm ko fomck ox ee ee 308 29 Watchdog Tief osasco kem a ee ee RE ee RR A RR ee eee 345 25 1 troduction c ss ee ee eka omo RE E Aw ae ee RRR we we eee 345 2 FUNCIONS unos amp de Re ee the Rm ee hk eene ol uibem e lel Ro Rb wu Reden diea a 345 IMPORTANT NOTICE oceanan zo oco REX a a a Eom 8 Wok C woxo 0 E mox 354 4 January 26 2012 Introduction 1 Introduction The LM3S9B92 ROM contains the Stellaris Peripheral Driver Library and the Stellaris Boot Loader The peripheral driver library can be utilized by applications to reduce their flash footprint allowing the flash to be used for other purposes such as additional features in the application The boot loader is used as an initial program loader when the flash is empty as well as an application initiated firmware upgrade mechanism by calling back to the boot loader There is a table at the beginning of the ROM that points to the entry points for the APIs that are provided in the ROM Accessing the API through these tables provides scalability while the API locations may change in future versions of the ROM the API tables will not The tables are split into two levels the main table contains one pointer per peripheral which points to a secondary table that contains one pointer per API that is associated with that peripheral The main table is located at 0x0100 0010 right after the Cortex M3 vector table in the ROM The following table shows a small portion of the API tab
445. y 26 2012 24 24 1 USB Controller USB Controller DESDE ENT sranna a datus bed dx OUR n ROT bi ee dana a gota E d Godd 303 sing MOVE WIS eoi Deb EE Squier R IDEE TE D nd NEP qa bod quatur qe peripre t E Sad d Pia 304 SIRO T E NEC ENECEERINET RHE 308 Introduction The USB APIs provide a set of functions that are used to access the Stellaris USB device or host controllers The APIs are split into groups according to the functionality provided by the USB controller present in the microcontroller Because of this the driver has to handle microcontrollers that have only a USB device interface a host and or device interface or microcontrollers that have an OTG interface The groups are the following USBDev USBHost USBOTG USBEndpoint and USBFIFO The APIs in the USBDev group are only used with microcontrollers that have a USB device controller The APIs in the USBHost group can only be used with microcontrollers that have a USB host controller The USBOTG APIs are used by microcontrollers with an OTG interface With USB OTG controllers once the mode of the USB controller is configured the device or host APIs should be used The remainder of the APIs are used for both USB host and USB device controllers The USBEndpoint APIs are used to configure and access the endpoints while the USBFIFO APIs are used to configure the size and location of the FIFOs The USB APIs abstract the IN OUT nature of endpoints based on the type of USB controller t
446. y grade is solely at the Buyer s risk and that they are solely responsible for compliance with all legal and regulatory requirements in connection with such use TI products are neither designed nor intended for use in automotive applications or environments unless the specific TI products are designated by TI as compliant with ISO TS 16949 requirements Buyers acknowledge and agree that if they use any non designated products in automotive applications TI will not be responsible for any failure to meet such requirements Following are URLs where you can obtain information on other Texas Instruments products and application solutions Products Applications Audio www ti com audio Automotive and Transportation www ti com automotive Amplifiers amplifier ti com Communications and Telecom www ti com communications Data Converters dataconverter ti com Computers and Peripherals www ti com computers DLP Products www dlp com Consumer Electronics www ti com consumer apps DSP dsp ti com Energy and Lighting www ti com energy Clocks and Timers www ti com clocks Industrial www ti com industrial Interface interface ti com Medical www ti com medical Logic logic ti com Security www ti com security Power Mgmt power ti com Space Avionics and Defense www ti com space avionics defense Microcontrollers microcontroller ti com Video and Imaging www ti com video RFID www ti rfid com OMAP Mobile Processors www ti com omap Wireless Connectivity
447. y take several clock cycles before the interrupt source is actually cleared Therefore it is recommended that the interrupt 270 January 26 2012 22 2 1 21 UART source be cleared early in the interrupt handler as opposed to the very last action to avoid returning from the interrupt handler before the interrupt source is actually cleared Failure to do so may result in the interrupt handler being immediately reentered because the interrupt controller still sees the interrupt source asserted Returns None ROM UARTIntDisable Disables individual UART interrupt sources Prototype void ROM UARTIntDisable unsigned long ulBase unsigned long ulIntFlags ROM Location ROM APITABLE is an array of pointers located at 0x0100 0010 ROM UARTTABLE is an array of pointers located at ROM APITABLE 1 ROM UARTIntDisable is a function pointer located at ROM UARTTABLE 18 Parameters ulBase is the base address of the UART port ullntFlags is the bit mask of the interrupt sources to be disabled Description Disables the indicated UART interrupt sources Only the sources that are enabled can be reflected to the processor interrupt disabled sources have no effect on the processor The ullntFlags parameter has the same definition as the ullntFlags parameter to ROM UARTIntEnable Returns None 22 2 1 22 ROM UARTIntEnable Enables individual UART interrupt sources Prototype void ROM UAR

LM3S9B92 ROM User's Guide

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