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1.                                        4 12     28  GNO UCC           21   T           Ge  opt lEu    TEXAS INSTRUMENTS    Project  MSP43 F112 Flash Emulation Kit Hardware  Blocks   Size  File  TI F112 Flash Emu Kit Rev  11            Date  10 04 2001 12 06  30 Sheet  1 1                         Hardware    Figure B 1  MSP FET430X110  Schematic    C 2    Hardware    LPT P  RT    MSP FET430x11x    ET  en   en        External power connector  Open to disconnect LED  Orient Pin 1 of MSP430    LED connected to P1 0  device    Connector J4  Jumper J5    Ensure value is 82 ohms  Open to measure current    Jumper Jl    R6    T    FALL                                    E    D ou          a                              NIN        A    J3      2 4  P23       Figure B 2  MSP FET430X110     PCB Pictorials    C 3    Hardware                                        TPS77 41      ENS FB  co                169  TLU2731                                          ME    n  a     338k                                 ea          00 len                UR  Au   eu  x                Aw                     28  om          ul       TON                                         IE R  BnF    TLCS55CO          not ass     R33                                                                   74AHC 248          74RHC244               SP                                                                     b                                                     R35       5               0                           
2.             al not assembled                               y     CI    Le    Gl        o          Leb eye bebe yee      g      a 5     eal        ej el     so       on H   IE          S gp Wo of Lo         LO  Lo Loft  Ly         Le pF  D  12     a      2  E  zii  EN   gt  U wea   55 LY 23 x  2  gt            8 Ji  E    2 72 42 mp     amp   not assembled   3    46 sli    12pF Y 45     d ee 5 34     amp  3     T i MSP64PM   2  1         1  6122711 4 XOUT 0 53  NN JP1Q              4    Socket  E xo    not assembled        12     a 5608 To 3 Yamsichi 36 eerie For BSL usage add        4 IC51 0644 807  5 zl          als a Open se  425 E     5  175344 sls If external supply voltage   GND IRRE    aes remove R11 and add R18  B Ohm        6 1 1 2555 R6     Me 1214  MSP43BF14x   a    open open  MSP43QF 41x   open open a a      2  2          32    rola a el eo ala   Ps  co  co  al        A            OV  CON                 CONT        021                 MSP T5430PM64 Target Socket     64  for F14x and F4ix    Hardware          TITLE  MSP TS430PM64    Document Number        Date  09  03  2001 11 35 08    Sheet  1 1    Note  Connections between the JTAG header and pins XOUT and XIN are no longer required  and    should not be made   Figure B 7  MSP TS430PM64 Target Socket module  Schematic  Rev  1 0    C 8    Hardware       00000090   000000902           114    nonna 47K     gn               RE         if       connected    nor                                     lt          AJ       1
3.           000000                 U2             Hardware    Connector J5  External power connection  Remove R  and jumper R9    Figure B 10  MSP TS430PM64 Target Socket module  PCB Pictorials  Rev  1 1    Hardware    B 1 History of changes to MSP TS430PM64 Target Socket module  Li Changes from Rev  0 1 to 1 0     Connector J5 for external power was added   Connectors FETJ2 and FETJ3 were removed   C8 was changed from 100nF to 10nF   R5 was changed from 100k to 47k   R13 and R14 were added to support BSL usage on F413  They  are not assembled   R4 was removed    Li Changes from Rev  1 0 to 1 1     B Connection JTAG 6  lt   gt  J1 9  R4 00hm was inserted  RA is not  assembled  This isolates XOUT from the JTAG connector     Li On Rev  0 1  power can be found or should be supplied on the target  pins  J1 1 DVcc   J4 16 AVcc   J4 15 DVss  and J4 14 AVss   Vcc can  also be applied to FETJ2 2 and Vss can also be applied to FETJ2 4     C 12    Hardware    If external supply voltage   remove RB and add R8  8 Ohm JTAG    not assembled    12pF                         XTCLKI  an                      ET    QAR             RR       13    nat assembled  LFXTCLK      Open J   if LCD  15 connected    co       FEX d  4                  ENSE  XE                   Fee                14 14    15 im  H   is   ie FR  18 18      4     8    12  13  15  16  18    19 15    LO QD WI OS O           Ul    QF PSUPN    Socket   Yamaichi      281 8884 814    CH                1  Loa          FLA  gt   Lat   
4.       Pulldown not required on all devices   Check device datasheet pin description     Note  Connection to XOUT is not required    No Jtag connection is required to the XOUT pin of the MSP430 as    shown on some schematics        Figure 3 1  Signal connections for MSP FET430X1 10     3 5    Design Considerations for In Circuit Programming    3 5 Signal Connections for In System Programming and Debugging  MSP     3 6    FET430Pxx0  P120     P140     P410     P430       440     With the proper connections  you can use the C SPY debugger and the MSP   FET430Pxx0  P120     P140     P410     P430   P440  to program and debug code  on your own target board  In addition  the connections will support the  GANG430 or PRGS  thus providing an easy way to program prototype boards   if desired     Figure 3 2 below shows the connections between the FET Interface module  and the target device required to support in system programming and  debugging using C SPY  The figure shows a 14 pin connected to the MSP430   With this header mounted on your target board  the FET Interface module can  be plugged directly into your target  Then simply use C SPY as you would  normally to program and debug     The connections for the FET Interface module and the GANG430 or PRGS are  identical  Both the FET Interface module and GANG430 can supply Vcc to your  target board  via pin 2   In addition  the FET Interface module and GANG430  have a Vcc sense feature that  if used  requires an alternate connection 
5.     TEXAS INSTRUMENTS       Project    MSP FETP43 IF Flash    Emulation    Kit    Interface         File  MSP FETP43BIF          C    i    MSP FET430IF FET Interface module  Schemat    Figure B 3     C 4    M25HP284                           E                     BB  62        A A            2 12   N     y P3770817  z E    R6    do          Jl       LU     0   m CO            8    gel Dee   Teuot1                                  Bee  Bee  Peel       74AHC244       e     Sz  A  Ly       Co       CO     3     9       oo  Rio  Meee w    Coy  to  Sl       o          Sa      E A  J     1          Ensure value is  82 ohms            lo 21151 1    PO       po  Na COT pall cop  My Z IGIN         R e  tal 3 8  B AJ B         E 5      LD    a LJ  w    c4      m       6   5  zm        2    C111                     p  R R 5  R         E         Figure B 4  MSP FET430 F FET Interface module  PCB Pictorial    Hardware          C 5    Hardware    OOO  E Ext  PR       J                                              R3  RS                JPIQ       aan       SOCK28DL                       1 0   1       Es                                                                   Ox ICT IAS Ga  ra    3        uu      gt   En           4     D OO ON OL 4S                                                                                                                                                        MSP TS43 DW28 Target Socket DW28                      TITLE  MSP TS430DA28                Document Nu
6.    2   Pd        OO       tn ta   i i    2  EA ahs          OO TIT F 2                   E                        P           F 3  Figures   Figure 3 1  Signal connections for MSP FET430X110                                                   3 5  Figure 3 2  Signal connections for                    0                                                         3 7    viii    Figure A 1  Modification to FET Interface module                                                        A 7    Figure A 2  Modification to MSP TS430PM64 Target Socket module                         A 8  Figure B 1  MSP FET430X110                                                 B 2  Figure B 2  MSP FET430X110  PCB Pictorials                                              eere B 3  Figure B 3  MSP FET430IF FET Interface module  Schematic                                     B 4  Figure B 4  MSP FET430IF FET Interface module  PCB                                                  B 5  Figure B 5  MSP TS430DW28 Target Socket module  Schematic                               B 6  Figure B 6  MSP TS430DW23 Target Socket module  PCB Pictorials                        B 7  Figure B 7  MSP TS430PM64 Target Socket module  Schematic  Rev  1 0                B 8  Figure B 8  MSP TS430PM64 Target Socket module  PCB Pictorials  Rev  1 0         B 9  Figure B 9  MSP TS430PM64 Target Socket module  Schematic  Rev  1 1              B 10  Figure B 10  MSP TS430PM64 Target Socket module  PCB Pictorials  Rev  1 1     B 11  Figure B 11  M
7.    TEXAS   INSTRUMENTS   MSP FET430 FLASH Emulation Tool  FET    For use with IAR Workbench Version 2 x     User s Guide       2003 Mixed Signal Products    IMPORTANT NOTICE    Texas Instruments and its subsidiaries  Tl  reserve the right to make changes to their products or to discontinue any  product or service without notice  and advise customers to obtain the latest version of relevant information to verify  before  placing orders  that information being relied on is current and complete  All products are sold subject to the terms and  conditions of sale supplied at the time of order acknowledgment  including those pertaining to warranty  patent  infringement  and limitation of liability     TI warrants performance of its products to the specifications applicable at the time of sale in accordance with Tl s  standard warranty  Testing and other quality control techniques are utilized to the extent Tl deems necessary to support  this warranty  Specific testing of all parameters of each device is not necessarily performed  except those mandated by  government requirements     Customers are responsible for their applications using      components     In order to minimize risks associated with the customer   s applications  adequate design and operating safeguards must  be provided by the customer to minimize inherent or procedural hazards     Tl assumes no liability for applications assistance or customer product design  TI does not warrant or represent that any  license  eit
8.   51 0644 807  900000  90000  90000      1BuF  6  3U  n3       f  FE16 1 1    1    LFXTELK  AF  90090    90000  9000090  Clamshell        T  no       00000090   0000090902                Jos ach  LCD connected       IC51 80644 807  900000  90000  90000    900000  Clamshell                               0000901  9000902         D      3  o         3  un      5            5 2             S g        m     T     Li      a   609000  E  0000902 ind  D  nm      BOOTST     Rig R11    R13 E  gt      N  R14 uem           e  Q        2    O    LED connected to pin 12    Orient Pin 1 of MSP430 device          00000090   0000090902           2  Ju        LCD connected    IC51 0644 807       9000090  Clamshell          000001  0000902          nu mn BOOTST         R11    R13 ucc      2  R14       Connector J5    External power connector    Remove R  and jumper R9    Rev  1 0    7    TS430PM64 Target Socket module  PCB Pictorials    Figure B 8  MSP     C 9    l8nF                                                              H NI  OOO  0  JTAG     lo g  14 13          12 11 li  remove R8 and add R9  0 Ohm 18       If external supply voltage 8  zr K  6 5    4 3    FERES       GND  AS    a not assembled           x  e E 2  Uae in  750 u  5359 E t  2  ils  nat assembled z  18  8  IS    4               2  MSP64PM  ML18  Socket     not assembled  Yamaichi      1051 0644 807 For BSL usage add        4 Open 76 if LCD                  is connected MSP430F14x   0 a open open  MSP430F 41x   open open 
9.   Connector J5        External power connection  Remove R8 and jumper R9    J5                Figure B 12  MSP TSPN80 Target Socket module  PCB Pictorials    Hardware                                                                                                                                         If external supply voltage      remove R8 and add RS   8 Ohm  JTAG mE EU       14 13     2  12 11 RSTZNMI  LA 8  8 7 nat assembled e      Y  6 AAA SE    3 A  4          pe E mE IN iF      2 1 Too    55   N 12pF    AUSS Or  ML14           g     j              a                al Lodge ebb edd by yyeveyeyy Jo uum NE   an       LO  SE            COP NL  NO  FT MN  ODM SO NI i5  GND   20 ana 00  09  cn       co   CD  C0 co   CD  CO Aa A INT N          LJ  L   GND  L  gt  am               cs     a Zr d    BOOTST      M          E el 5 YTS 9 18  5 5 S     25 18 J3 a 8            ll 25 NET  gt  A    z AE Fer ze ee i ral E  55  gas   23                  ssi Ds  TN        EE MLLO            Suum Emu ia  138         ESE     3  Ber 7 If BSL is used   s                     Ut            t   If external supplu voltage   C2 67  Bar          remove        and add         0 Ohm   Sem      QFPIBBPZ    E 12   ee   1200             Siar  MIROR        eam                        14    _   62   4 6l  p51 iz i 59    CAES Socket      58  ms   Yamaichi   AA  e JP10 28       201 1004 008    la     gt  2               1551  5605 22o 6      Oo 16 PEE 5  5  oye         e   25  gt          GND Open J   if LC
10.   device   Send user defined warning messages to  wmsg 2    the output device   Define a load address label label 3    Directive produced by absolute lister  setsect ASEG 4   Directive produced by absolute lister    setsym EQU or  4   Program end    end END    13  The syntax of the  message directive is   message     lt string gt      This causes     message  lt string gt     to be output to the project build window during assemble compile time    14  Warning messages cannot be user defined   message may be used  but the warning counter will not be  incremented    15  The concept of load time addresses is not supported  Run time and load time addresses are assumed to  be the same  To achieve the same effect  labels can be given absolute  run time  addresses by the EQU    directives      Asm430 code   A430 code  label     load start load start    Run start    code      code   load end    Run end  run starrtEQU 240H    label   load end run end  EQU        start load end load start  16  Although not produced by the absolute lister ASEG defines absolute segments and EQU can be used to  define absolute symbols     MYFLAG EQU 2        ASEG  240H  MAIN  MOV  23CH  SP      MYFLAG is located at 23bE    Absolute segment at 240    MAIN is located at 240    Additional A430 Directives  IAR  A430 Directive  IAR     Set the default base of constants  Enable case sensitivity  Disable case sensitivity    E 2 11 Preprocessor Directives    RADIX  CASEON  CASEOFF    The A430 assembler includes a
11.   i e      Demo  Tutor  etc   are not correct  The programs will work only in the  simulator  However  the programs will not function correctly on an  actual device because the Watchdog mechanism is active  The  programs need to be modified to disable the Watchdog mechanism   Disable the Watchdog mechanism with the C statement     WDTCTL    WDTPW   WDTHOLD      or  mov  5a80h  amp WDTCTL    in assembler     12  Access to MPY using an 8 bit operation is flagged as an error     Within the  h files  16 bit registers are defined in such a way that 8 bit  operations upon them are flagged as an error  This  feature  is  normally a good thing and can catch register access violations   However  in the case of MPY  it is also valid to access this register  using 8 bit operators  If 8 bit operators are used to access MPY  the  access violation check mechanism can be defeated by using  MPY    to reference the register  Similarly  16 bit operations on 8 bit registers  are flagged as access violations     13  Constant definitions   define  used within the  h files are    effectively  reserved   and include  for example  C  Z  N  and V  Do  not create program variables with these names     14  The CSTARTUP that is implicitly linked with all C applications    does not disable the Watchdog timer  Use WDT   WDTPW    WDTHOLD  to explicitly disable the Watchdog  This statement is best  placed in the low level init   function  before main        If the Watchdog is not disabled and the Watchdog t
12.   ing the LED    This section demonstrates on the FET the equivalent of the C language    Hello   world     introductory program  an application that flashes the LED is developed  and downloaded to the FET  and then run     1     2     3     4     5     6   7     8     Start the Workbench  START  gt PROGRAMS  gt IAR SYSTEMS  gt IAR  EMBEDDED WORKBENCH KICKSTART FOR MSP430 V2  gt KICKSTART  IAR EMBEDDED WORKBENCH      Use FILE  gt OPEN WORKSPACE to open the file at   lt Installation  root gt  Embedded Workbench x x 430 FET_ examples fet_projects eww  The  workspace window will open     Click on the tab at the bottom of the workspace window that corresponds to  your tool  FETxxx  and desired language  assembler  asm  or C      Use PROJECT  gt REBUILD ALL to build and link the source code  You can  view the source code by double clicking on the project  and then double   clicking on the displayed source file     Use PROJECT  gt DEBUG to start the C SPY debugger  C SPY will erase the  device Flash  and then download the application object file to the device  Flash     Refer to FAQ  Debugging  1  if C SPY is unable to communicate with the  device     Use DEBUG  gt GO to start the application  The LED should flash     Use DEBUG  gt STOP DEBUGGING to stop debugging  to exit C SPY  and to  return to the Workbench     Use FILE  gt EXIT to exit the Workbench     Congratulations  you ve just built and tested your first MSP430 application     Get Started Now     1 7 Important MSP430 Docu
13.   to this  breakpoint     2   The transfer of data by the Data Transfer Controller  DTC  may not  stop precisely when the DTC is stopped in response to a single  step or a breakpoint  When the        is enabled and a single step is  performed  one or more bytes of data can be transferred  When the  DTC is enabled and configured for two block transfer mode  the DTC  may not stop precisely on a block boundary when stopped in response  to a single step or a breakpoint     28  The C SPY Register window now supports an instruction cycle  length counter  The cycle counter is only active while single stepping   The count is reset when the device is reset  or the device is run  GO    The count can be edited  normally set to zero  at any time     29  It   s possible to use C SPY to get control of a running device  whose state is unknown  Simply use C SPY to program a dummy  device  and then start the application with RELEASE JTAG ON GO  selected  Remove the JTAG connector from the dummy device and  connect to the unknown device  Select    DEBUG  gt BREAK   or the     stop    hand  to stop the unknown device  The state of the device can  then be interrogated     30  RESET ing a program temporarily requires a breakpoint if PROJECT    gt OPTIONS  gt C SPY  gt SETUP  gt RUN TO is enabled  If N or more  breakpoints are set  RESET will set a virtual breakpoint and will run to  the RUN TO function  Consequently  it may require a significant  amount of time before the program  resets   i e   
14.  8    2     3     4     5     6     7     8     9     Frequently Asked Questions    C SPY can download data into RAM  INFORMATION  and Flash  MAIN memories  A warning message is output if an attempt is made  to download data outside of the device memory spaces     C SPY can debug applications that utilize interrupts and low  power modes  Refer to FAQ  Debugging  24      C SPY cannot access the device registers and memory while the  device is running  C SPY will display     to indicate that a  register memory field is invalid  The user must stop the device in order  to access device registers and memory  Any displayed    register memory fields will then be updated     When C SPY is started  the Flash memory is erased and the  opened file is programmed in accordance with the download options  as set in PROJECT  gt OPTIONS  gt C SPY  gt FLASH EMULATION  TOOL  gt DOWNLOAD CONTROL  This initial erase and program  operations can be disabled selecting PROJECT  gt OPTIONS  gt C SPY    gt FLASH EMULATION TOOL  gt DOWNLOAD CONTROL  gt SUPPRESS  DOWNLOAD  Programming of the Flash can be initiated manually with  EMULATOR  gt  INIT NEW DEVICE     The parallel port designators  LPTx  have the following physical  addresses  LPT1  378h  LPT2  278h  LPT3  3BCh  The configuration  of the parallel port  ECP  Compatible  Bidirectional  Normal  is not  significant  ECP seems to work well  Refer FAQ  Debugging  1  for  additional hints on solving communication problems between C SPY  and the devic
15.  Constant Initialization Directives    Asm430 Directive  TI    byte or  string     double    field  float       space     string  word    1  The 48 bit MSP430 format is not supported  2  Initialization of bit field constants   field  is not supported  Constants must be combined into complete    words using DW         Asm430 code  field 5 3    field 12 4     gt   field 30 8          A430 code    A430 Directive  IAR   DB    DS  DB  DW    DW  30 lt  lt  4 3    12 lt  lt 3  5   equals 3941    3  The 32 bit IEEE floating point format  used by the C Compiler  is supported in the A430 assembler     Additional A430 Directives  IAR   Initialize one or more 32 bit integers    E 2 5    Description   Allow false conditional code block listing  Inhibit false conditional code block listing  Set the page length of the source listing  Set the page width of the source listing  Restart the source listing   Stop the source listing   Allow macro listings and loop blocks    Inhibit macro listings and loop blocks    Select output listing options   Eject a page in the source listing   Allow expanded substitution symbol listing  Inhibit expanded substitution symbol  listing   Print a title in the listing page header    Listing Control Directives    Asm430 Directive  TI   fclist   fenolist      length      width   list      nolist    mlist     mnolist       option   page   sslist   ssnolist    title  4  No A430 directive directly corresponds to  option  The individual listing control directives  abov
16.  Emulation Module  EEM    Completely updated documentation     Immediate release of JTAG signals with assembler projects  when RELEASE JTAG ON GO is enabled     Li The TI Simulator and TI LCD display and editor are no longer  supported     G 3    
17.  none present   Memory should only be used in the address ranges as specified by the  device data sheet     17  C SPY utilizes the system clock to control the device during  debugging  Therefore  device counters  etc   that are clocked by the  Main System Clock  MCLK  will be effected when C SPY has  control of the device  Special precautions are taken to minimize the  effect upon the Watchdog Timer  The CPU core registers are  preserved  All other clock sources  SMCLK  ACLK  and peripherals  continue to operate normally during emulation  In other words  the  Flash Emulation Tool is a partially intrusive tool     Devices which support Clock Control  EMULATOR  gt ADVANCED    gt GENERAL CLOCK CONTROL  can further minimize these effects by  selecting to stop the clock s  during debugging     Refer to FAQ  Debugging  22      18  There is a time after C SPY performs a reset of the device  when  the C SPY session is first started  when the Flash is reprogrammed   via INITNEW DEVICE   when JTAG is resynchronized   RESYNCHRONIZE JTAG   and before C SPY has regained control of    A 10    Frequently Asked Questions    the device that the device will execute normally  This behavior may  have side effects  Once C SPY has regained control of the device  it  will perform a reset of the device and retain control     19  When programming the Flash  do not set a breakpoint on the  instruction immediately following the write to Flash operation  A  simple work around to this limitation is to fo
18.  pin 4  instead of pin 2   The Vcc sense feature senses the local Vcc  present on the  target board  i e   a battery or other    local    power supply  and adjusts the output  signals accordingly  If the target board is to be powered by a local Vcc  then the  connection to pin 4 on the JTAG should be made  and not the connection to pin  2  This utilizes the Vcc sense feature and prevents any contention that might  occur if the local on board Vcc were connected to the Vcc supplied from the  FET Interface module or the GANG430  If the Vcc sense feature is not  necessary  i e   the target board is to be powered from the FET Interface  module or the GANG430  the Vcc connection is made to pin 2 on the JTAG  header and no connection is made to pin 4  Figure 3 2 shows a jumper block in  use  The jumper block supports both scenarios of supplying Vcc to the target  board  If this flexibility is not required  the desired Vcc connections may be hard   wired eliminating the jumper block     Connect if target has it s own V    Design Considerations for In Circuit Programming             PARRAS              Connect to power target from  FET or GANG430 if not using a  local power source    Vec FromTool    CC Local Sense        Test    MSP430        14 pos  header   3M p n 2514 6002    Digi Key p n MHB14K ND                          Not present on all devices           Pins vary by device       Pulldown not required on all devices     Check device datasheet pin description     Note  Connecti
19.  preprocessor similar to that used in C  programming  The following preprocessor directives can be used in include  files which are shared by assembly and C programs     Additional A430 Directives  IAR     A430 Directive  IAR     F 7    TI to IAR 2 0 Assembler Migration    Assign a value to a preprocessor symbol    Undefine a preprocessor symbol  Conditional assembly    Assemble if a preprocessor symbol is defined  not defined     End a  if   ifdef or  ifndef block  Includes a file  Generate an error     define   undef    if             elif   ifdef   ifndef   endif   include   error    E 2 12 Alphabetical Listing and Cross Reference of Asm430 Directives    Asm430 directive    A430 directive    align   asg  break   bss     byte or  string   copy or  include    See Section control directives   SET or VAR or ASSIGN   See Conditional Assembly Directives  See Symbol Control Directives   DB    include or      data RSEG   def PUBLIC or EXPORT   double Not supported      else ELSE    elseif ELSEIF    emsg  error    end END   endif ENDIF    endloop ENDR    endm ENDM    endstruct See Symbol Control Directives   equ or  set EQU or      eval SET or VAR or ASSIGN   even EVEN   fclist LSTCND    fenolist LSTCND    field See Constant Initialization Directives  float See Constant Initialization Directives   global See File Referencing Directives  if IF   label See Miscellaneous Directives  length PAGSIZ   list LSTOUT    E 2 13 Additional A430 Directives  IAR     Conditional Assembly Directiv
20.  program temporarily requires a breakpoint if PROJECT      gt OPTIONS  gt C SPY  gt SETUP  gt RUN TO is enabled  Refer to FAQ  Debugging   30      2 9    Development Flow    The RUN TO CURSOR operation temporarily requires a breakpoint   Consequently  only N 1 breakpoints can be active when RUN TO CURSOR is  used if virtual breakpoints are disabled  Refer to FAQ  Debugging  31      If  while processing a breakpoint  an interrupt becomes active  C SPY will stop  at the first instruction of the interrupt service routine  Refer to FAQ  Debugging   24      2 3 3 Using Single Step    2 10    When debugging an assembler file  STEP OVER  STEP OUT  and NEXT  STATEMENT operate like STEP INTO  the current instruction is executed at full  speed     When debugging an assembler file  a step operation of a CALL instruction  stops at the first instruction of the CALL   ed function     When debugging an assembler file  a  true  STEP OVER a CALL instruction  that executes the CALL   ed function at full device speed can be synthesized by  placing a breakpoint after the CALL and GO ing  to the breakpoint  in Realtime  mode       When debugging a C file  a single step  STEP  operation executes the next C  statement  Thus  it is possible to step over a function reference  If possible  a  hardware breakpoint will be placed after the function reference and a GO will be  implicitly executed  This will cause the function to be executed at full speed  If  no hardware breakpoints are available  the fun
21.  stale  JA      A    gt       kr  M in eu eo        a  cr    da      co             not assembled  If BSL is used     lf external supply voltage   remove R11 and add R18 ca Ohm       5  430  Target Socket MSP TS430PN80  tor F43x    TITLE  MSP TS438PN8B    Document Number     Date  18 04 2003 10  46  28 Sheet  1 1       TSPN80 Target Socket module  Schematic    Figure B 11  MSP     Hardware    LED connected to pin 12        Jumper J6    Open to disconnect LED           Orient Pin 1 of MSP430 device              e       es        E 560R    JP1Q  e    000000  0000000  0000000 y  e 159 o o  dL                   FE o 820 208  x 2                      2 9889 990  E oo        o20  12pF 12     o                o     ooooooo  0000000  000000  1 uF  6 3U  a Dar 12     JO 000  1QuF  6 3V     12     E  188nF        R       4  0000000    E     00000002  ML          14 OO    mino     47K JP1Q      Har    68    GND                                                           VCC  00000000000000000000 M  55      45 41          Jumper J7    Open to measure current                          ia    00000001     E 00000   0606000002 000002             3     e           Or  eS n     Open J6 if  LED connected    E    XTCLK               m      Ww             JTAG  96   J            R5H Rio 8 8   11    UCC  00000000000000000000 voc He  0 55 58      45 41    GND    000000  0000000  0000000 O    ul         oooooo  0000000  0000000  0000000  0000000  000000       00000090  0000000  000000          BOOTST  
22.  systems are upgraded  say  from Kickstart  or Baseline  to Full         2 2 2 Creating a Project from Scratch    The following section presents step by step instructions to create an assembler  or C project from scratch  and to download and run the application on the  MSP430  Refer to Project Settings above  Also  the MSP430 IAR Embedded  Workbench IDE User Guide presents a more comprehensive overview of the  process     1  Start the Workbench  START  gt PROGRAMS  gt IAR SYSTEMS  gt IAR  EMBEDDED WORKBENCH KICKSTART FOR MSP430 V2  gt KICKSTART  IAR EMBEDDED WORKBENCH      2  Create a new text file  FILE  gt NEW  gt SOURCE TEXT      3  Enter the program text into the file     Note  Use  h files to simplify your code development    Kickstart is supplied with files for each device that define the device  registers and the bit names  and these files can greatly simplify the task  of developing your program  The files are located in  lt Installation  root gt  Embedded Workbench x x 430 inc  Simply include the  h file  corresponding to your target device in your text file   include   lt msp430xyyy h gt    Additionally  files io430xxxx h are provided  and are  optimized to be included by C source files        4  Save the text file  FILE  gt SAVE      It is recommended that assembler text file be saved with a file type suffix of      543     and that C text files be saved with a file type suffix of   c        5  Create a new workspace  FILE  gt NEW  gt WORKSPACE   Specify a  workspa
23.  the FET     One small box containing two MSP430F 1121AIDW devices     1 2 Kit Contents  MSP FET430Pxx0     P120     P140     P410     P430       440     n  n  E    One READ ME FIRST document   One MSP430 CD ROM     One MSP FETP430IF FET Interface module  This is the unit that has a 25   pin male D Sub connector on one end of the case  and a 2x7 pin male  connector on the other end of the case     MSP FET430P120  One MSP TS430DW28 Target Socket module  This is  the PCB on which is mounted a 28        ZIF socket for the MSP430F12xIDW  or MSP43012x21DW device  A 2x7 pin male connector is also present on the  PCB     MSP FET430P140  One MSP TS430PM64 Target Socket module  This is  the PCB on which is mounted a 64 pin clam shell style socket for the  MSP430F13xIPM  MSP430F 14xIPM  MSPA30F 15xIPM  MSP430F16xIPM   or MSP430F161xIPM device  A 2x7 pin male connector is also present on  the PCB     MSP FET430P410  One MSP TS430PM64 Target Socket module  This is  the PCB on which is mounted a 64 pin clam shell style socket for the  MSP430F41xIPM device  A 2x7 pin male connector is also present on the  PCB     MSP FET430P430  One MSP TS430PN80 Target Socket module  This is  the PCB on which is mounted an 80 pin ZIF socket for the MSP430F43xIPN  device  A 2x7 pin male connector is also present on the PCB     MSP FET430P440  One MSP TS430PZ100 Target Socket module  This is  the PCB on which is mounted a 100 pin ZIF socket for the MSP430F43xIPZ  or MSP430F44xIPZ device  A 2x7 pin male conn
24. 00000000  00000000  00000000  00000000  00000000  000000000           00000000  00000000  noooooooo    Orient Pin 1 of MSP430 device    o000000000000000000000020    xD  CN    188                                                     95    5 ig Jl 15 20  S  000000000000000000000000            Appendix C    FET Specific Menus       This appendix describes the C SPY menus that are specific to the FET     Topic Page  C 1 EMULATOR  C 1 1 EMULATOR  gt RELEASE JTAG ON GO  C 1 2 EMULATOR  gt RESYNCHRONIZE JTAG  C 1 3 EMULATOR  INIT NEW DEVICE  C 1 4 EMULATOR  gt SHOW USED BREAKPOINTS  C 1 5 EMULATOR  gt ADVANCED  gt GENERAL CLOCK CONTROL  C 1 6 EMULATOR  gt ADVANCED  gt EMULATION MODE  C 1 7 EMULATOR  gt ADVANCED  gt MEMORY DUMP  C 1 8 EMULATOR  gt ADVANCED  gt BREAKPOINT COMBINER  C 1 9 EMULATOR  gt STATE STORAGE     1 10 EMULATOR  gt STATE STORAGE WINDOW    C 1 11 EMULATOR  gt SEQUENCER          1 12 EMULATOR  gt     POWER ON    RESET    D 1    FET Specific Menus    C 1 EMULATOR    C 1 1    C 1 2    C 1 3    C 1 4    C 1 5    C 1 6    D 2    The current device type is displayed     EMULATOR  gt RELEASE JTAG ON GO    C SPY uses the device JTAG signals to debug the device  On some MSP430  devices  these JTAG signals are shared with the device port pins  Normally  C   SPY maintains the pins in JTAG mode so that the device can be debugged   During this time the port functionality of the shared pins is not available     However  when RELEASE JTAG ON GO is selected  the JTAG drivers are se
25. 4  3 5 Signal Connections for In System Programming        Debugging  MSP   FET430Pxx0     P120     P140   P410     P430    440                                              3 6   Frequently Asked Questions                                   1          ma      55               een    2    vii    A 2 Program Development  Assembler  C                                                               A 3       A3 Debugadlhg  C SP Y   ascendat er       En A 5  url ie PE O aa B 1  B 1 History of changes to MSP TS430PM64 Target Socket module                     B 12   FET ldem                                               ep C  1  CA ZEIGT C 2  C 1 1 EMULATOR  gt RELEASE JTAG ON                    C 2   C 1 2 EMULATOR  gt RESYNCHRONIZE              2           C 2   C 1 3  EMULATOR  gt INIT NEW                               C 2   C 1 4 EMULATOR  gt SHOW USED BREAKPOINTS                           C 2   C 1 5 EMULATOR  gt ADVANCED  gt GENERAL CLOCK CONTROL                            C 2   C 1 6 EMULATOR  gt ADVANCED  gt EMULATION MODE                                            C 2   C 1 7 EMULATOR  gt ADVANCED  gt MEMORY DUMP                                                 C 3   C 1 8 EMULATOR  gt ADVANCED  gt BREAKPOINT COMBINER                                 C 3   6 1 9 EMULATOR STATE STORAGE ren C 3   C 1 10 EMULATOR  gt STATE STORAGE WINDOW    eee C 3   C111    EMULATOR  SEOQUEN GER    are ee ei C 3   C 1 12 EMULATOR  gt  POWER ON  RESET    nennen C 3   80 pin MSP430F44x and MSP430F43
26. 50 bytes  i e   the stack extends downwards through  RAM for 50 bytes      Other statements in the  xcl file define other relocatable regions that are  allocated from the first location of RAM to the bottom of the stack  It is critical to  note that     1  The supplied  xcl files reserve 50 bytes of RAM for the stack   regardless if this amount of stack is actually required  or if it is  sufficient      2  There is no runtime checking of the stack  The stack can overflow  the 50 reserved bytes and possible overwrite the other segments   No error will be output     The supplied  xcl files can be easily modified to tune the size of the stack to the  needs of the application  simply edit  D_ STACK_SIZE xx to allocate xx bytes  for the stack  Note that the  xcl file will reserve 50 byes for the heap if required   say  by malloc        2 2 5 How to Generate Texas Instrument  TXT  and other format  Files    The Kickstart linker can be configured to output objects in Tl   TXT format for  use with the GANG430 and PRGS programmers  Select  PROJECT    gt OPTIONS  gt XLINK  gt OUTPUT  gt FORMAT  gt OTHER  gt MSP430 TXT  Intel and  Motorola formats can also be selected     Refer to FAQ  Program Development  6      2 2 6 Overview of Example Programs    Example programs for MSP430 devices are provided in  lt Installation  root gt  Embedded Workbench x x 430 FET examples  Each tool folder contains  folders that contain the assembler and C sources      lt Installation root gt  Embedded   Wor
27. 9  Debug the application using C SPY  PROJECT  gt DEBUG   This will start C   SPY  and C SPY will get control of the target  erase the target memory   program the target memory with the application  and reset the target     Refer to FAQ  Debugging  1  if C SPY is unable to communicate with the  device     10  Use DEBUG  gt GO to start the application     11  Use DEBUG  gt STOP DEBUGGING to stop the application  to exit C SPY   and to return to the Workbench     12  Use FILE  gt EXIT to exit the Workbench     2 2 3 Using an Existing IAR 1 x Project    It is possible to use an existing project from an IAR 1 x system within the new  IAR 2 x system  refer to the IAR document Migration guide for EW430 2 20A   This document can be located in    Installation root gt  Embedded Workbench  x x 430 doc migration htm    2 2 4 Stack Management within the  xcl Files    2 6    The  xcl files are input to the linker  and contain statements that control the  allocation of device memory  RAM  Flash   Refer to the IAR XLINK  documentation for a complete description of these files  The  xcl files provided  with the FET   lt Installation root gt  Embedded Workbench  x x 430 config Ink430xxxx xcl  define a relocatable segment  RSEG  called  CSTACK  CSTACK is used to define the region of RAM that is used for the  system stack within C programs  CSTACK can also be used in assembler  programs  MOV  SFE CSTACK   SP   CSTACK is defined to extend from the    Development Flow    last location of RAM for 
28. 9 0    If external supply voltage   remove R11 and add R18  A Ohm         16 1 1        MSP TS430PM64 Target Socket     64  for   1 4   and 41x    TITLE  MSP TS430PM64    Document Number     Hardware    Date  11  07  2001 16 41 20 Sheet  1 1    Note  Connections between the JTAG header and pins XOUT and XIN are no longer required  and    should not be made     Figure B 9  MSP TS430PMO4 Target Socket module  Schematic  Rev  1 1    C 10    LED connected to pin 12    Jumper J7  Open to measure current    Jumper J6  Open to disconnect LED    Orient Pin 1 of MSP430 device          60090000   00000002    LED ML14             d       es    J6 if             9219  co         ae 47K    c    a        Vom AR                   12pF  12pF  Klar       XTCLK          16 4       0000000000000000  49     6  54    IEI     0644 807     gt             s  L   J      ci    000000                00000  00000    00000    000000       00000    000000  Clamshell    MSP64PM  3          NS   gt  14       8808006   00000002    x           m5  E u       FE16 1 3                       T  000001     2990002         COONS     c4        B6 ucc  O        H  R14     GND  975                 GND       IC51 80644 88 7  ae 000000    00000  00000          00000       000000  00000  00000    00000  00000    000000  Clamshell    0000000000004    le                 J2 32  0000000000000000    01 H3 H  E C8 C3  c el  95 RI m       229  9          J6 if XTCLK                       cn connected Je      2 m 0000  CZ     cs
29. AQ   Debugging  6  later in this document  For users of IBM Thinkpads   please try port specifications LPT2 and LPT3 despite the fact that  the operating system reports the parallel port is located at LPT1        Ensure that no other software application has reserved taken  control of the parallel port  say  printer drivers  ZIP drive drivers   etc    Such software can prevent the C SPY FET driver from  accessing the parallel port  and  hence  communicating with the  device        It may be necessary to reboot the computer to complete the  installation of the required parallel port drivers     A 5    Frequently Asked Questions    Li Revisions 1 0  1 1  and 1 2 of the FET Interface module require     hardware modification  a 0 1uF capacitor needs to be installed  between U1 pin 1  signal                and ground  A convenient   electrically equivalent  installation point for this capacitor is  between pins 4 and 5 of U1  Refer to Figure A 1  Modification to  FET Interface module     Note  The hardware may already be modified    The hardware modification may have already been performed during    manufacturing  or your tool may contain an updated version of the FET  Interface module        Li Revisions 0 1 and 1 0 of the MSP TS430PM64 Target Socket  module require a hardware modification  the PCB trace connecting  pin 6 of the JTAG connector to pin 9 of the MSP430  signal XOUT   needs to be severed  Refer to Figure A 2  Modification to MSP   TS430PM64 Target Socket module     N
30. D  is connected J1 FE25 1A3       o  MSP430  Target Socket   5   15430  2100  TANT NTN  e  e e       e e  eo  aaa Se  ele EP  Ee  ra fay F43x 512 Baas    LO       L  N  LL 3    TITLE  MSP TS430PZ100    Document Numbers    Date  25 10 2001 12 09  44 Sheet  1 1       C 15    Note  Connections between the JTAG header and pins XOUT and XIN are no longer required  and    should not be made   Figure B 13  MSP TSPZ100 Target Socket module  Schematic    Hardware       Se           00000001  060000002    ML14  FE25 1A3  O0000000000000000000000       78 55 60 55 51    5                I         76    E i See Cp T We eR e tx rer      TE            188    am     m    80    000000000  00000000  00000000       m     m m    Y  _1             02  n    85          000000000  00000000  00000000  00000000  00000000  000000000    0FP188P2    3B       00000000  00000000  000000000    1B8nF           m m am        35         8 nooo  Hg     ur    12pF    12  18uF 6 3U    mi     1 uF  6 3U    m am  m    000000000000000000000000       0000000000000000000000000    FE25 1A2    9 18  5 20 25  Q0000000000000000000000020      25 181    AR             Jumper J6 Jumper J7  Open to disconnect LED Open to measure current             LED connected to pin 12 BOOTST    Open J   if LCD connected    0000000000000000000000000  75 70 55 I3 66 55 5i       Connector J5  External power connection  Remove R8 and jumper R9            C        000000000  00000000  00000000       a E        N XICLK      85    Ut          0
31. ILL UNUSED  CODE MEMORY mechanism  No special steps are required to use  XLINK  gt PROCESSING  gt FILL UNUSED CODE MEMORY with C  projects     19  Numerous C and C   libraries are provided with the Workbench   cl430d  C  64 bit doubles  cl430dp  C  64 bit doubles  position independent  cl430f  C  32 bit doubles  cl430fp  C  32 bit doubles  position independent  dl430d  C    64 bit doubles  dl430dp  C    64 bit doubles  position independent  dl430f  C    32 bit doubles  dl430fp  C    32 bit doubles  position independent    A 3 Debugging  C SPY     1  C SPY reports that it cannot communicate with the device   Possible solutions to this problem include        Ensure that      on the MSP FET430X110 and the FET Interface  module has a value of 82 ohms  Early units were built using a 330  ohm resistor for R6  Refer to the schematics and pictorials of the  MSP FET430X110 and the FET Interface module presented in  Appendix B to locate R6  The FET Interface module can be  opened by inserting a thin blade between the case halves  and  then carefully twisting the blade so as to pry the case halves apart     Li Ensure that the correct parallel port  LPT1  2  or     is being  specified in the C SPY configuration  use PROJECT  gt OPTIONS    gt C SPY  gt FLASH EMULATION TOOL  gt PARALLEL PORT  gt LPT1   default  or LPT2 or LPT3  Check the PC BIOS for the parallel port  address  0x378  0x278  Ox3bc   and the parallel port configuration   ECP  Compatible  Bidirectional  or Normal   Refer to F
32. IMO0 S30  P3 0 STE0 S31  COMO  P5 2 COM1  P5 3 COM2  P5 4 COM3   RO3   P5 5 R13  P5 6 R23    F4xx 80 pin Pin  Number                                 MSP430   TS430PZ100 Pin  Number                                      Connection  required  between  indicated pins of  MSP430   TS430PZ100  socket    36 64  37 65  38 66  39 67  40 68  41 69  42 70  43 71    80 pin MSP430F44x and MSP430F43x Device Emulation    P5 7 R33 51 59  DVcc2 52 60  DVss2 53 61  P2 5 URXDO 54 TAT  P2 4 UTXDO 55 75  P2 3 TB2 56 76  P2 2 TB1 57 77  P2 1 TBO 58 78  P2 0 TA2 59 79  P1 7 CA1 60 80    1 6        61 81  P1 5 TACLK ACLK 62 82  P1 4 TBCLK SMCLK 63 83  P1 3 TBOUTH SVSOUT 64 84  P1 2 TA1 65 85  P1 1 TAO MCLK 66 86  P1 0 TAO 67 87  XT2OUT 68 88  XT2IN 69 89  TDO TDI 70 90  TDI 71 91  TMS T2 92  TCK 73 93  RST NMI 74 94  P6 0 A0 75 95  P6 1 A1 76 96  P6 2 A2 77 97  Avss 78 98  DVss1 79 99  Avcc 80 100    Note discontinuity of pin numbering sequence    E 3    Appendix E    TI to IAR 2 0 Assembler Migration          Texas Instruments made a suite of development tools for the MSP430   including a comprehensive assembler and device simulator  The source of  the Tl assembler and the source of the Kickstart assembler are not 100   compatible  the instruction mnemonics are identical  while the assembler  directives are somewhat different  The following section documents the  differences between the Tl assembler directives and the Kickstart 2 0  assembler directives     Topic Page  E 1 Segment Control  E 2 Tran
33. Instruments suggests that customers of the MSP430F device design  their circuits with the BSL in mind  i e   we suggest that the customer provide  easy access to these needed signals  say  via a header    Refer to Device  Signals below     Refer to FAQ  Hardware  8  for a second alternative to sharing the JTAG and  port pins     3 2 External Power    3 2    The PC parallel port can source a limited amount of current  Owing to the  ultralow power requirement of the MSP430  a stand alone FET does not  exceed the available current  However  if additional circuitry is added to the  tool  this current limit could be exceeded  In this case  external power can be  supplied to the tool via connections provided on the              430  110 and the  Target Socket modules  Refer to the schematics and pictorials of the MSP   FET430X110 and the Target Socket modules presented in Appendix B to locate  the external power connectors     When an MSP FET430X110 is powered from an external supply  an on board  device regulates the external voltage to the level required by the MSP430     When a Target Socket module is powered from an external supply  the external  supply powers the device on the Target Socket module and any user circuitry  connected to the Target Socket module  and the FET Interface module  continues to be powered from the PC via the parallel port  If the externally  supplied voltage differs from that of the FET Interface module  the Target  Socket module must be modified so tha
34. ON MODE    Specify the device to be emulated  The device must be reset  or reinitialized   INIT NEW DEVICE   following a change to the emulation mode     FET Specific Menus    Refer to Appendix D     C 1 7 EMULATOR  gt ADVANCED  gt MEMORY DUMP    Write the specified device memory contents to a specified file  A conventional  dialog is displayed that permits the user to specify a file name  a memory  starting address  and a length  The addressed memory is then written in a text  format to the named file  Options permit the user to select word or byte text  format  and address information and register contents can also be appended to  the file     C 1 8 EMULATOR  gt ADVANCED  gt BREAKPOINT COMBINER  Open the Breakpoint Combiner dialog box  The Breakpoint Combiner dialog    box permits one to specify breakpoint dependencies  A breakpoint will be  triggered when the breakpoints are encountered in the specified order     C 1 9 EMULATOR  gt STATE STORAGE    Open the State Storage dialog box  The State Storage dialog box permits one  to use the state storage module  The state storage module is present only in  those devices that contain the EEM     Refer to Part 7  IAR C SPY FET Debugger in the MSP430 IAR Embedded  Workbench IDE User Guide   C 1 10 EMULATOR  gt STATE STORAGE WINDOW    Open the State Storage window  and display the stored state information as  configured by the State Storage dialog     Refer to Part 7  IAR C SPY FET Debugger in the MSP430 IAR Embedded  Workbench IDE 
35. RAMS  gt IAR SYSTEMS  gt IAR EMBEDDED WORKBENCH  KICKSTART FOR MSP430 V2    Tool      UsersGuide                 Most Up To Date Information    Workbench C SPY    EW430_UsersGuide pdf readme htm  ew430 htm   cs430 htm  cs430f htm   larldePm3 htm   larldePm3_new htm    EW430 AssemblerReference    a430 htm  a430_msg htm  pdf    Compiler    EW430 CompilerReference p   icc430 htm  icc430_msg htm  df    C library       Linker and Librarian xlink  pdf xlink htm  xman pdf  xar htm    2 2 Using Kickstart    2 2       The Kickstart development environment is function limited  The following  restrictions are in place        The C compiler will not generate assembly code output        The    library supports only basic floating point operations  addition   subtraction  multiplication  and division         The linker will link a maximum of 4K bytes of code originating from C  source  but an unlimited amount of code originating from assembler  source      Li    5     does not support code profiling     Development Flow       The simulator will input a maximum of AK bytes of code     A  Full   i e   unrestricted  version of the software tools can be purchased from  IAR  A mid featured tool set     called  Baseline   with an 8K byte C code size  limitation and basic floating point operations     is also available from IAR   Consult the IAR web site  www iar se  for more information     2 2 1 Project Settings    The settings required to configure the Workbench and C SPY are numerous  and det
36. SP TSPN80 Target Socket module  Schematic                                  B 13  Figure B 12  MSP TSPN80 Target Socket module  PCB Pictorials                           B 14  Figure B 13  MSP TSPZ100 Target Socket module  Schematic                                B 15  Figure B 14  MSP TSPZ100 Target Socket module  PCB Pictorials                         B 16    Tables       Table 2 1  Number of Device Breakpoints  and other emulation features                   2 9    Table 0 1  F4xx 80 pin Signal Mapping                                                        nennen D 2    Chapter 1    Get Started Now           This chapter will enable you to inventory your FET  and then it will instruct you to  install the software and hardware  and then run the demonstration programs     Topic Page  1 1 Kit Contents  MSP FET430X110    1 2 Kit Contents  MSP FET430Pxx0     P120     P140     P410     P430      P440     1 3 Software Installation    1 4 Hardware Installation  MSP FET430X110    1 5 Hardware Installation  MSP FET430Pxx0     P120     P140     P410      P430     P440     1 6  Flash ing the LED       1 7 Important MSP430 Documents on the CD ROM and WEB    1 1    Get Started Now     1 1 Kit Contents  MSP FET430X110    n     n         One READ ME FIRST document   One MSP430 CD ROM     One MSP FET430X110 Flash Emulation Tool  This is the PCB on which is  mounted a 20        ZIF socket for      MSP430F 11xlDW   MSP430F11x1AIDW  or MSP430F11x2IDW device  A 25 conductor cable  originates from
37. User Guide     C 1 11 EMULATOR  gt SEQUENCER    Open the Sequencer dialog box  The Sequencer dialog box permits one to  configure the sequencer state machine     Refer to Part 7  IAR C SPY FET Debugger in the MSP430 IAR Embedded  Workbench IDE User Guide        1 12 EMULATOR  gt    POWER ON  RESET    Cycle power to the device to effect a reset     Note  Availability of EMULATOR  gt ADVANCED menus    Not all EMULATOR  gt ADVANCED menus are supported by all MSP430  devices  These menus will be grayed out        D 3    Appendix D    80 pin MSP430F44x and MSP430F43x  Device Emulation       80 pin MSP430F44x and MSP430F43x devices can be emulated by the  100 pin MSP430F449 device  Table D 1  F4xx 80 pin Signal Mapping lists  where the pin signals of an 80 pin device appear on the pins of an MSP   TS430PZ100 Target Socket module  Note  The MSP TS430PZ100 must  be modified as indicated  Refer to Appendix C 1 6 EMULATOR    gt ADVANCED  gt EMULATION MODE to enable the emulation mode     Topic Page    E 1    80 pin MSP430F44x and MSP430F43x Device Emulation    Table D 1  F4xx 80 pin Signal Mapping    E 2    F4xx 80 pin Signal    DVcc1  P6 3 A3  P6 4 A4  P6 5 A5  P6 6 A6  P6 7 A7  VREF   XIN  XOUT  VeREF   VREF  VeREF   P5 1 S0  P5 0 S1  P4 7 S2  P4 6 S3  P4 5 S4  P4 4 S5  P4 3 S6  P4 2 S7  P4 1 S8  P4 0 S9   10   11   12   13   14   15   16   17    P2 7 ADC12CLK S18    P2 6 CAOUT S19   20    21    22    23   P3 7 S24  P3 6 S25  P3 5 524  P3 4 527  P3 3 UCLKO S28  P3 2 SOMI0 S29  P3 1 S
38. ad This First       About This Manual    This manual documents the Texas Instruments MSP FET430 Flash  Emulation Tool  FET   The FET is the program development tool for the  MSP430 ultralow power microcontroller     How to Use This Manual    Read and follow the Get Started Now  chapter which follows  This chapter  will enable you to inventory your FET  and then it will instruct you to install  the software and hardware  and then run the demonstration programs   Once you ve demonstrated how quick and easy it is to use the FET  we  suggest that you complete the reading of this manual     This manual describes the set up and operation of the FET  but does not  fully teach the MSP430 or the software systems  the workbench  the  assembler  the C compiler  the linker  and the debugger  which are  collectively referred to as    Kickstart     from IAR     For details of these  items  refer to the appropriate      and IAR documents listed in Chapter 1 7  Important MSP430 Documents on the CD ROM and WEB     This manual is applicable to the following tools  and devices      Di MSP FET430X110  for the MSP430F11xIDW  MSP430F11x1AIDW   and MSP430F11x2IDW devices     Li MSP FET430P120  for the MSP430F12xIDW and MSP430F 12x2IDW  devices      1 MSP FET430P140  for the MSP430F13xIPM  MSP430F14xIPM   MSP430F 15xIPM  MSPA30F16xl PM  and MSP430F161xIPM devices     MSP FET430P410  for the MSP430F41xIPM devices    1 MSP FET430P430  for the MSP430F43xIPN devices     MSP FET430P440  for the MSP430F43
39. ailed  Please read and thoroughly understand the documentation  supplied by IAR when dealing with project settings  Please review the project  settings of the supplied assembler and C examples  the project settings are  accessed using  PROJECT  gt OPTIONS with the project name selected  Use  these project settings as templates when developing your own projects  Note  that if the project name is not selected when the setting are made  the settings  will be applied to the selected file  and not to the project      The following project settings are recommended required   1  Specify the target device  SENERAL  gt TARGET  gt DEVICE     2  Enable an assembler project or a C assembler project  GENERAL    gt TARGET  gt ASSEMBLER ONLY PROJECT     3  Enable the generation of an executable output file  GENERAL  gt OUTPUT    gt OUTPUT FILE  gt EXECUTABLE     4  In order to most easily debug a C project  disable optimization  ICC430    gt CODE  gt OPTIMIZATIONS  gt SIZE  gt NONE  BEST DEBUG SUPPORT      5  Enable the generation of debug information in the compiler output  ICC430    gt OUTPUT  gt GENERATE DEBUG INFO     6  Specify the search path for the C preprocessor  ICC430    gt PREPROCESSOR  gt INCLUDE PATHS     7  Enable the generation of debug information in the assembler output  A430    gt DEBUG  gt GENERATE DEBUG INFO     8  Specify the search path for the assembler preprocessor  A430  gt INCLUDE    gt INCLUDE PATHS     9  In order to debug the project using C SPY  specify a comp
40. appear that only the interrupt service routine  ISR  is active  i e    the non ISR code never appears to execute  and the single step  operation always stops on the first line of the ISR   However  this  behavior is correct because the device will always process an active  and enabled interrupt before processing non ISR  i e   mainline  code   A work around for this behavior is  while within the ISR  to disable the  GIE bit on the stack so that interrupts will be disabled after exiting the  ISR  This will permit the non ISR code to be debugged  but without  interrupts   Interrupts can later be re enabled by setting GIE in the  status register in the Register window     On devices with Clock Control  it may be possible to suspend a clock  between single steps and delay an interrupt request     25  The base  decimal  hexadecimal  etc   property of Watch Window  variables is not preserved between C SPY sessions  the base  reverts to Default Format     26  On devices equipped with a Data Transfer Controller  DTC   the  completion of a data transfer cycle will preempt a single step of a  low power mode instruction  The device will advance beyond the low    A 11    Frequently Asked Questions    A 12    power mode instruction only after an interrupt is processed  Until an  interrupt is processed  it will appear that the single step has no effect   A work around to this situation is to set a breakpoint on the instruction  following the low power more instruction  and then execute  GO
41. atible format   XLINK  gt OUTPUT  gt FORMAT  gt DEBUG INFO  WITH TERMINAL IO      10  Specify the search path for any used libraries  XLINK  gt INCLUDE    gt INCLUDE PATHS     11  For Assembler Only Project  ignore the C STARTUP in the libraries   XLINK  gt INCLUDE  gt LIBRARY  gt IGNORE C STARTUP IN LIBRARY     12  Specify the C SPY driver  Select C SPY  gt SETUP  gt DRIVER  gt FLASH  EMULATION TOOL to debug on the FET  i e   MSP430 device   Select C   SPY  gt SETUP  gt DRIVER  gt SIMULATOR to debug on the simulator    13  Enable the Device Description file  This file makes C SPY  aware  of the  specifics of the device it is debugging  This file will correspond to the    2 3    Development Flow    specified target device  C SPY  gt SETUP  gt DEVICE DESCRIPTION  gt USE  DESCRIPTION FILE     14  Enable the erasure of the Main and Information memories before object  code download  C SPY  gt FLASH EMULATION TOOL  gt DOWNLOAD  CONTROL  gt ERASE MAIN AND INFORMATION MEMORY     15  Specify the active parallel port used to interface to the FET  C SPY    gt FLASH EMULATION TOOL  gt PARALLEL PORT     16  In order to maximize system performance during debug  disable Virtual  Breakpoints  C SPY  gt FLASH EMULATION TOOL  gt USE VIRTUAL  BREAKPOINTS   and disable all System Breakpoints  C SPY  gt FLASH  EMULATION TOOL  gt SYSTEM BREAKPOINTS ON     Note  Use of Factory Settings to quickly configure a project    It is possible to use the Factory Settings button to quickly configure a  proje
42. blank when the device is delivered from TI     The device current increases by approximately 10uA when a  device in low power mode is stopped  using ESC   and then the  low power mode is restored  using GO   This behavior appears to  happen on all devices except the MSP430F 12x     Frequently Asked Questions    11  The following ZIF sockets are used in the FET tools and Target    Socket modules     20 pin device  28 pin device    DW package   Wells CTI 652 0020   DW package   Wells CTI 652 0028  64 pin device  PM package   Yamaichi     51 0644 807  80 pin device  PN package   Yamaichi IC201 0804 014  100 pin device  PZ package   Yamaichi IC201 1004 008    LL D L D    Wells CTI  http   www wellscti com     Yamaichi  http   www yamaichi us     A 2 Program Development  Assembler  C  Linker     1     The files supplied in the 430 tutor folder work only with the  simulator  Do not use the files with the FET  Refer to FAQ  Program  Development  11     A common MSP430  mistake  is to fail to disable the Watchdog  mechanism  the Watchdog is enabled by default  and it will reset the  device if not disabled or properly handled by your application  Refer to  FAQ  Program Development  14      When adding source files to a project  do not add files that are   include   ed by source files that have already been added to the  project  say  an  h file within a  c or  s43 file   These files will be added  to the project file hierarchy automatically     In assembler  enclosing a string in doub
43. ce name and press SAVE     6  Create a new project  PROJECT  gt CREATE NEW PROJECT   Specify a  project name and press CREATE    7  Add the text file to the project  PROJECT  gt ADD FILES   Select the text file  and press OPEN  Alternatively  double click on the text file to add it to the  project     Note  How to add assembler source files to your project    The default file type presented in the Add Files window is    C C   Files    In order to view assembler files   s43   select  Assembler Files  in the       2 5    Development Flow       Files of type    drop down menu     8  Configure the project options  PROJECT  gt OPTIONS   For each of the  listed subcategories  GENERAL  ICC430  A430  XLINK  C SPY   accept  the default Factory Settings with the following exceptions     a  Specify the target device  GENERAL  gt TARGET  gt DEVICE     b  Enable an assembler project or a C assembler project  GENERAL    gt TARGET  gt ASSEMBLER ONLY PROJECT     c  Enable the generation of an executable output file  GENERAL    gt OUTPUT  gt OUTPUT FILE  gt EXECUTABLE     d  For Assembler Only Project  ignore the C STARTUP in the libraries   XLINK  gt INCLUDE  gt LIBRARY  gt IGNORE C STARTUP IN LIBRARY     e  Todebug on the FET  i e   the MSP430   select C SPY  gt SETUP    gt DRIVER  gt FLASH EMULATION TOOL    f  Specify the active parallel port used to interface to the FET if not LPT      C SPY  gt FLASH EMULATION TOOL  gt PARALLEL PORT     8  Build the project  PROJECT  gt REBUILD ALL      
44. ct to a usable state     The following steps can be used to quickly configure a project   Note  The GENERAL tab does not have a FACTORY SETTINGS button  1  Specify the target device  GENERAL  gt TARGET  gt DEVICE     2  Enable an assembler project or a C assembler project  GENERAL    gt TARGET  gt ASSEMBLER ONLY PROJECT     3  Enable the generation of an executable output file  GENERAL    gt OUTPUT  gt OUTPUT FILE  gt EXECUTABLE     4  Accept the factory settings for the compiler  ICC430  gt FACTORY  SETTINGS     5  Accept the factory settings for the assembler  A430  gt FACTORY  SETTINGS     6  Accept the factory settings for the linker  XLINK  gt FACTORY  SETTINGS     7  For Assembler Only Project  ignore the C STARTUP in the libraries   XLINK  gt INCLUDE  gt LIBRARY  gt IGNORE C STARTUP IN  LIBRARY     8  Accept the factory settings for C SPY  C SPY  gt FACTORY  SETTINGS     9  To debug on the FET  i e   the MSP430   select C SPY  gt SETUP    gt DRIVER  gt FLASH EMULATION TOOL    10  Specify the active parallel port used to interface to the FET if not  LPT1  C SPY  gt FLASH EMULATION TOOL  gt PARALLEL PORT        2 4    Development Flow    Note  Avoid the use of absolute pathnames when referencing files     Instead  use the relative pathhame keywords  TOOLKIT_DIR  and     PROJ_DIR   Refer to the IAR documentation for a description of these  keywords  The use of relative pathnames will permit projects to be  moved easily  and projects will not require modification when IAR 
45. ction will be executed in Non   Realtime mode  STEP INTO is supported  STEP OUT is supported     Within Disassembly mode  VIEW  gt DISASSEMBLY   a step operation of a non   CALL instruction executes the instruction at full device speed     Within Disassembly mode  VIEW  gt DISASSEMBLY   a step operation of a  CALL instruction will place     if possible   a hardware breakpoint after the CALL  instruction  and then execute GO  The CALL   ed function will execute at full  device speed  If no hardware breakpoint is available prior to the GO  the  CALL   ed function will be executed in Non Realtime mode  In either case   execution will stop at the instruction following the CALL     It is only possible to single step when source statements are present   Breakpoints must be used when running code for which there is no source code   i e   place the breakpoint after the CALL to the function for which there is no  source  and then GO to the breakpoint  in Realtime mode       If  during a single step operation  an interrupt becomes active  the current  instruction is completed and C SPY will stop at the first instruction of the  interrupt service routine  Refer to FAQ  Debugging  24      Development Flow    2 3 4 Using Watch Windows    The C SPY Watch Window mechanism permits C variables to be monitored  during the debugging session  Although not originally designed to do so  the  Watch Window mechanism can be extended to monitor assembler variables     Assume that the variables to watc
46. e     C SPY asserts RST NMI to reset the device when C SPY is started  and when the device is programmed  The device is also reset by the C   SPY RESET button  and when the device is manually reprogrammed   EMULATOR  gt INIT NEW DEVICE   and when the JTAG is  resynchronized  EMULATOR  gt RESYNCHRONIZE JTAG   When  RST NMI is not asserted  low   C SPY sets the logic driving RST NMI  to high impedance  and RST NMI is pulled high via a resistor on the  PCB     RST NMI is asserted and negated after power is applied when C SPY  is started  RST NMI is then asserted and negated a second time after  device initialization is complete     Within C SPY  EMULATOR  gt  POWER ON    RESET will cycle the  power to the target to effect a reset     C SPY can debug a device whose program reconfigures the  function of the RST NMI pin to NMI     The level of the XOUT TCLK pin is undefined when C SPY resets  the device  The logic driving XOUT TCLK is set to high impedance at  all other times     10  When making current measurements of the device  ensure that    the JTAG control signals are released  EMULATOR  gt RELEASE  JTAG ON GO   otherwise the device will be powered by the signals on  the JTAG pins and the measurements will be erroneous  Refer to FAQ     A 9    Frequently Asked Questions    Debugging  12  and  Error  Reference source not found   and  Hardware  10      11  Most C SPY settings  breakpoints  etc   are now preserved between  sessions     12  When C SPY has control of the device  t
47. e  or the    A430 Directive  IAR   DL    A430 Directive  IAR   LSTCND    LSTCND    PAGSIZ   COL   LSTOUT    LSTOUT    LSTEXP   macro   LSTREP   loop blocks   LSTEXP   macro   LSTREP   loop blocks   1    PAGE   2    2     3     command line option  c  with suboptions  should be used to replace the  option directive   5  There is no directive that directly corresponds to  sslist  ssnolist   6  The title in the listing page header is the source file name     Additional A430 Directives  IAR   Allow inhibit listing of macro definitions  Allow inhibit multi line code listing  Allow inhibit partitioning of listing into pages  Generate cross reference table    F 4    A430 Directive  IAR   LSTMAC        LSTCOD        LSTPAG        LSTXREF          E 2 6    Description    Include source statements from another    file    File Reference Directives    Asm430 Directive  TI    copy or  include    Identify one or more symbols that are  def  defined in the current module and used in    other modules    Identify one or more global  external   global  symbols   Define a macro library  mlib  Identify one or more symbols that are    ref    used in the current module but defined in    another module    TI to IAR 2 0 Assembler Migration    A430 Directive  IAR    include or      PUBLIC or EXPORT    1     2   EXTERN or IMPORT    7         directive  global functions as either  def if the symbol is defined in the current module        ref  otherwise  PUBLIC or EXTERN must be used as applicable with t
48. e accessed using   START  gt PROGRAMS  gt IAR SYSTEMS  gt IAR EMBEDDED WORKBENCH  KICKSTART FOR MSP430 V2    Refer to Appendix F for a list of significant changes made to the current version  of Kickstart     Kickstart is compatible with WINDOWS  95   98  2000  ME  NT4 0  and XP     1 4 Hardware Installation  MSP FET430X110    1  Connect the 25 conductor cable originating from the FET to the parallel port  of your PC     2  Ensure that the MSP430F1121AIDW is securely seated in the socket  and  that its pin 1  indicated with a circular indentation on the top surface  aligns  with the    1    mark on the PCB     3  Ensure that jumpers J1  near the non socketed IC on the FET  and J5  near  the LED  are in place  Pictorials of the FET and its parts are presented in  Appendix B     Get Started Now     1 5 Hardware Installation  MSP FET430Pxx0     P120     P140     P410     P430       440     1 6    1     2     3     4     Use the 25 conductor cable to connect the FET Interface module to the  parallel port of your PC     Use the 14 conductor cable to connect the FET Interface module to the  Target Socket module     Ensure that the MSP430 device is securely seated in the socket  and that its  pin 1  indicated with a circular indentation on the top surface  aligns with the     1    mark on the PCB     Ensure that the two jumpers  LED and Vcc  near the 2x7 pin male connector  are in place  Pictorials of the Target Socket module and its parts are  presented in Appendix B        Flash  
49. ective  IAR   Reserve size bytes in the  bss  bss 1    uninitialized data  section   Assemble into the  data  initialized data   data RSEG const  section   Assemble into a named  initialized   sect RSEG  section   Assemble into the  text  executable code    text RSEG code  section   Reserve space in a named  uninitialized   usect 1    section   Alignment on byte boundary align 2   Alignment on word boundary  even EVEN    1  Space is reserved in an uninitialized segment by first switching to that segment  then defining the  appropriate memory block  and then switching back to the original segment  For example     RSEG         16 2    LABEL  DS 16  RSEG CODE  2  Initialization of bit field constants   field  is not supported  therefore  the section counter is always byte   aligned   Additional A430 Directives  IAR  A430 Directive  IAR   Switch to an absolute segment ASEG  Switch to a relocatable segment RSEG  Switch to a common segment COMMON  Switch to a stack segment  high to low allocation  STACK  Alignment on specified address boundary  power of two  ALIGN  Set the location counter ORG    F 3    TI to IAR 2 0 Assembler Migration    E 2 4    Description   Initialize one or more successive bytes or  text strings   Initialize a 48 bit MSP430 floating point  constant   Initialize a variable length field   Initialize a 32 bit MSP430 floating point  constant   Reserve size bytes in the current section  Initialize one or more text strings  Initialize one or more 16 bit integers   
50. ector is also present on the  PCB     One 25 conductor cable   One 14 conductor cable     MSP FET430P120  Four PCB 1x14 pin headers  Two male and two female    MSP FET430P140  Eight PCB 1x16 pin headers  Four male and four  female     MSP FET430P410  Eight PCB 1x16 pin headers  Four male and four    Get Started Now     female    MSP FET430P430  Eight PCB 1x20 pin headers  Four male and four  female    MSP FET430P440  Eight PCB 1x25 pin headers  Four male and four  female         One small box containing two or four devices   MSP FET430P120  MSP430F123IDW and or MSP430F1232IDW  MSP FET430P140  MSP430F149IPM and or MSP430F169IPM  MSP FET430P410  MSP430F413IPM  MSP FET430P430  MSP430F437IPN  MSP FET430P440  MSP430F449IPZ  Consult the data sheet for device specifications  A list of device errata can    be found at http   www ti com sc cgi bin buglist cgi    1 3 Software Installation    Follow the instructions on the supplied READ ME FIRST document to install the  IAR Workbench  assembler and limited C project development environment  and  C SPY debugger  for assembler and C    Read the file   Installation  root gt  Embedded Workbench x x 430 doc readme htm from IAR for the latest  information about the Workbench  The term Kickstart is used to refer to the  function limited Workbench  including C SPY debugger   Kickstart is supplied on  the CD ROM included with each FET  and the latest version is available from the  MSP430 web site     The above documents  and this document  can b
51. embler uses different  syntax for character strings  A430 uses C syntax for character strings  A  quote is represented using the backslash character as an escape character  together with quote  V  and the backslash itself is represented by two    F 2    TI to IAR 2 0 Assembler Migration    consecutive backslashes       In Asm430 syntax  a quote is represented by  two consecutive quotes      See examples below     Character String Asm430 Syntax  TI  A430 Syntax  IAR   PLAN             PLAN  C      PLAN VOV    dos command com     dos command com         dos  command com     Concatenated string  i e  Error 41       Error     41    E 2 3 Section Control Directives    Asm430 has three predefined sections into which various parts of a  program are assembled  Uninitialized data is assembled into the  bss  section  initialized data into the  data section and executable code into the  text section     A430 also uses sections or segments  but there are no predefined segment  names  Often  it is convenient to adhere to the names used by the C  compiler  DATA16 Z for uninitialized data  CONST for constant  initialized   data and CODE for executable code  The table below uses these names     A pair of segments can be used to make initialized  modifiable data PROM   able  The ROM segment would contain the initializers and would be copied  to RAM segment by a start up routine  In this case  the segments must be  exactly the same size and layout     Description Asm430 Directive  TI  A430 Dir
52. er conditionals if repeatable block assembly is used in a macro  as shown     SEQ MACRO FROM TO   Initialize a sequence of byte constants  LOCAL X  X SET FROM  REPT TO FROM 1     Repeat from FROM to TO  IF X gt 255   Break if X exceeds 255  EXITM  ENDIF  DB X     Initialize bytes to FROM   TO  X SET X 1   Increment counter    F 5    TI to IAR 2 0 Assembler Migration    ENDR   ENDM  Additional A430 Directives  IAR  A430 Directive  IAR   Repeatable block assembly  Formal argument is substituted by each REPTC    character of a string    Repeatable block assembly  formal argument is substituted by each string REPTI  of a list of actual arguments    See also Preprocessor Directives    E 2 8 Symbol Control Directives    The scope of assembly time symbols differs in the two assemblers  In  Asm430  definitions are global to a file  but can be undefined with the   newblock directive  In A430  symbols are either local to a macro  LOCAL    local to a module  EQU  or global to a file  DEFINE   In addition  the  preprocessor directive Zdefine can also be used to define local symbols     Description Asm430 Directive  TI  A430 Directive  IAR   Assign a character string to a substitution  asg SET or VAR or ASSIGN  symbol   Undefine local symbols  newblock 1    Equate a value with a symbol  equ or  set EQU or     Perform arithmetic on numeric substitution      eval SET or VAR or ASSIGN  symbols   End structure definition  endstruct 2    Begin a structure definition    struct 2    Assign struc
53. es    REPTC  REPTI    File Referencing Directives  NAME or PROGRAM  MODULE or LIBRARY    ENDMOD    Listing Control Directives  LSTMAC         LSTCOD         LSTPAG         LSTXREF          F 8    DL    RADIX  CASEON  CASEOFF    define   undef                  elif   ifdef   ifndef   endif    Miscellaneous Directives    Preprocessor Directives    Asm430 directive       loop   macro   mexit   mlib   mlist     mmsg   mnolist       newblock   nolist   option   page     ref  sect   setsect   setsym     space     sslist   ssnolist   string     struct  tag  text  title   usect   width   wmsg   word    Constant Initialization Directives    A430 directive   REPT   MACRO   EXITM   See File Referencing Directives  LSTEXP   macro    LSTREP   loop blocks    message  XXXXXX   LSTEXP   macro    LSTREP   loop blocks    See Symbol Control Directives  LSTOUT    See Listing Control Directives  PAGE   EXTERN or IMPORT   RSEG   See Miscellaneous Directives  See Miscellaneous Directives  DS   Not supported   Not supported   DB   See Symbol Control Directives  See Symbol Control Directives  RSEG   See Listing Control Directives  See Symbol Control Directives  COL   See Miscellaneous Directives  DW    Macro Directives  LOCAL    Symbol Control Directives  DEFINE   SFRB   SFRW    Symbol Control Directives  ASEG   RSEG   COMMON   STACK   ALIGN    TI to IAR 2 0 Assembler Migration     include ORG   error    F 9    Appendix F    Significant Changes to Kickstart       This appendix lists the significant c
54. ging using C   SPY  If your target board has it s own    local    power supply  such as a battery  do  not connect Vcc to pin 2 of the JTAG header  Otherwise  contention may occur  between the FET and your local power supply     The figure shows a 14 pin header being used for the connections on your target  board  It is recommended that you build a wiring harness from the FET with a  connector which mates to the 14 pin header  and mount the 14 pin header on  your target board  This will allow you to unplug your target board from the FET  as well as use the GANG430 or PRGS to program prototype boards  if desired     The signals required are routed on the FET to header locations for easy  access  Refer to the device datasheet  for pin numbers  and the schematic and  PCB information in Appendix B to locate the signals     After you make the connections from the FET to your target board  remove the  MSP430 device from the socket on the FET so that it does not conflict with the  MSP430 device in your target board  Now simply use C SPY as you would  normally to program and debug     Design Considerations for In Circuit Programming    Disconnect if target has it s own V     local    power source      pomme         Voc                                       TDO TDI TDO TDI             TDI     TMS  me o      TCK    MSP430    RST NMI        14 pos  header   3M p n 2514 6002    Digi Key p n MHB14K ND         20K     Vsg AVag Vas       Not present on all devices     Pins vary by device   
55. gradually  This behavior is to be expected  The progress bar updates  whenever a    chunk    of memory is written to Flash  The development  tools attempt to minimize the number of program chunks in order to  maximize programming efficiency  Consequently  it s possible for  say   a 60K byte program to be reduced to a single chunk  and the progress  bar will not be updated until the entire write operation is complete     B 13    Appendix B    Hardware          This appendix contains information relating to the FET hardware  including  schematics and PCB pictorials     Topic Page  Figure B 1  MSP FET430X110  Schematic  Figure B 2  MSP FET430X110  PCB Pictorials  Figure B 3  MSP FET430IF FET Interface module  Schematic  Figure B 4  MSP FET430IF FET Interface module  PCB Pictorial  Figure B 5  MSP TS430DW28 Target Socket module  Schematic  Figure B 6  MSP TS430DW28 Target Socket module  PCB Pictorials    Figure B 7  MSP TS430PM64 Target Socket module  Schematic  Rev   1 0    Figure B 8  MSP TS430PM64 Target Socket module  PCB Pictorials   Rev  1 0    Figure B 9  MSP TS430PM64 Target Socket module  Schematic  Rev   1 1    Figure B 10  MSP TS430PM64 Target Socket module  PCB Pictorials   Rev  1 1    B 1 History of changes to MSP TS430PM64 Target Socket  module    Figure B 11  MSP TSPN80 Target Socket module  Schematic  Figure B 12  MSP TSPN80 Target Socket module  PCB Pictorials  Figure B 13  MSP TSPZ100 Target Socket module  Schematic       Figure B 14  MSP TSPZ100 Target Socket m
56. h are defined in RAM  say     RSEG         16 I  varword ds 2   two bytes per word  varchar ds 1   one byte per character    In C SPY   1  Open the Watch Window  WINDOW  gt WATCH  2  Use CONTROL  gt QUICK WATCH    3  To watch varword  enter in the Expression box    __data16 unsigned int     varword    4  To watch varchar  enter in the Expression box    __data16 unsigned char     varchar    5  Press the Add Watch button  6  Close the Quick Watch window    7  Forthe created entry in the Watch Window  click on the   symbol  This will  display the contents  or value  of the watched variable     To change the format of the displayed variable  default  binary  octal  decimal   hex  char   select the type  click the right mouse button  and then select the  desired format  The value of the displayed variable can be changed by  selecting it  and then entering the new value     In C  variables can be watched by selecting them and then dragging n dropping  then into the Watch Window     Since the MSP430 peripherals are memory mapped  it is possible to extend the  concept of watching variables to watching peripherals  Be aware that there may  be side effects when peripherals are read and written by C SPY  Refer to FAQ   Debugging  22      CPU core registers can be specified for watching by preceding their name with     1       PC   SR   SP   R5  etc       Variables watched within the Watch Window are only updated when C SPY  gets control of the device  say  following a breakpoint hit  a 
57. hanges made to the current version of  Kickstart  Additional changes may have been implemented by IAR  Refer  to the documentation provided by IAR for a description of these changes     Note that Tl and IAR maintain different version numbers for their releases  of Kickstart     Topic Page  F 1 Version 3 02  F 2 Version 3 03  F 3 Version 3 04  F 4 Version 3 05  F 5 Version 3 06    F 6 Version 4 12       Significant Changes to Kickstart    F 1 Version 3 02    F 2 Version 3 03    F 3 Version 3 04    F 4 Version 3 05    F 5 Version 3 06    G 2    Several errors in the C SPY FET driver have been corrected     The RST NMI pin is now asserted and negated after power is applied  during device initialization  The device is then reset normally  via  software  PUC   or RST NMI  again   or by cycling power      C SPY can be configured so that the RST NMI pin is asserted and  negated during a    RESET    operation  rather than a just a software  reset   To enable this behavior  the  ini file variable HardReset must be  set to 1  HardReset 1   The default value of HardReset is 0  i e   only  software reset is used      The MSP430F43x  MSP430F44x  MSP430F11x2  and MSP430F12x2  devices are supported     The default settings of the MSP430F41x 43x 44x Clock Control dialog  have been changed for consistency     Existing projects built with Kickstart and Baseline software tools  from  IAR  must be rebuilt  PROJECT  gt BUILD ALL  prior to use with the C   SPY debugger included with this software 
58. he A430 assembler to replace the     global directive     8  The concept of macro libraries is not supported  Include files with macro definitions must be used for this    functionality     Modules may be used with the Asm430 assembler to create individually  linkable routines  A file may contain multiple modules or routines  All  symbols except those created by DEFINE   define  IAR preprocessor  directive  or MACRO are  undefined  at module end  Library modules are   furthermore  linked conditionally  This means that a library module is only  included in the linked executable if a public symbol in the module is  referenced externally  The following directives are used to mark the  beginning and end of modules in the A430 assembler     Additional A430 Directives  IAR     Start a program module  Start a library module    Terminate the current program or library module    E 2 7    Description    Optional repeatable block assembly    Begin conditional assembly  Optional conditional assembly  Optional conditional assembly  End conditional assembly   End repeatable block assembly  Begin repeatable block assembly    Conditional Assembly Directives    Asm430 Directive  TI   break   if      else    elseif   endif    endloop      loop    A430 Directive  IAR   NAME or PROGRAM  MODULE or LIBRARY  ENDMOD    A430 Directive  IAR   1    IF   ELSE   ELSEIF   ENDIF   ENDR   REPT    9  There is no directive that directly corresponds to  break  However  the EXITM directive can be used with  oth
59. he CPU is ON  i e   it is not  in low power mode  regardless of the settings of the low power mode  bits in the status register  Any low power mode conditions will be  restored prior to STEP or GO  Consequently  do not measure the  power consumed by the device while C SPY has control of the device   Instead  run your application using GO with JTAG released  Refer to  FAQ  Debugging  10  and Hardware  10      13  The MEMORY  gt MEMORY FILL dialog of C SPY requires  hexadecimal values for Starting Address  Length  and Value to be  prefaced with    0       Otherwise the values are interpreted as decimal     14  The MEMORY utility of C SPY can be used to view the RAM  the  INFORMATION memory  and the Flash MAIN memory  The MEMORY  utility of C SPY can be used to modify the RAM  the INFORMATION  memory and Flash MAIN memory cannot be modified using the  MEMORY utility  The INFORMATION memory and Flash MAIN  memory can only be programmed when a project is opened and the  data is downloaded to the device  or when EMULATOR  gt INIT NEW  DEVICE is selected     15  C SPY does not permit the individual segments of the  INFORMATION memory and the Flash MAIN memory to be  manipulated separately  consider the INFORMATION memory to be  one contiguous memory  and the Flash MAIN memory to be a second  contiguous memory     16  The MEMORY window correctly displays the contents of memory  where it is present  However  the MEMORY window incorrectly  displays the contents of memory where there is
60. her express or implied  is granted under any patent right  copyright  mask work right  or other intellectual  property right of Tl covering or relating to any combination  machine  or process in which such products or services might  be or are used  Tl s publication of information regarding any third party s products or services does not constitute Tl s  approval  license  warranty or endorsement thereof     Reproduction of information in Tl data books or data sheets is permissible only if reproduction is without alteration and is  accompanied by all associated warranties  conditions  limitations and notices  Representation or reproduction of this  information with alteration voids all warranties provided for an associated TI product or service  is an unfair and deceptive  business practice  and      is not responsible nor liable for any such use     Resale of Tl s products or services with statements different from or beyond the parameters stated by      for that product  or service voids all express and any implied warranties for the associated      product or service  is an unfair and deceptive  business practice  and      is not responsible nor liable for any such use     Also see  Standard Terms and Conditions of Sale for Semiconductor Products  www ti com sc docs stdterms htm  Mailing Address     Texas Instruments  Post Office Box 655303  Dallas  Texas 75265    Copyright O 2001  Texas Instruments Incorporated       wis TEXAS  INSTRUMENTS    October 2003    Preface    Re
61. is enabled  C SPY  gt FLASH EMULATION TOOL  gt USE VIRTUAL  BREAKPOINTS   the application runs under the control of the host PC  the  system operates at a much slower speed  but offers unlimited software  breakpoint  or  Non Realtime    During Non Realtime mode  the PC effectively  repeatedly single steps the device and interrogates the device after each  operation to determine if a breakpoint has been hit     Both  code  address and data  value  breakpoints are supported  Data  breakpoints and range breakpoints each require two address breakpoints     Table 2 1  Number of Device Breakpoints  and other emulation features     Device Breakpoints Range Clock State Trace   N  Breakpoints Control Sequencer Buffer  MSP430F11x1  MSP430F1 1  2  MSP430F12x  MSP430F12x2  MSP430F 13x  MSP430F 14x  MSP430F 15x  MSP430F 16x  MSP430F41x  MSP430F43x  MSP430F44x  MSP430FE42x  MSP430FG43x  MSP430FW42x                     09        0 Qo        NO NJ ND       KKK X                          X KKK KKK       2 3 2 Using Breakpoints    If C SPY is started with greater than N breakpoints set and virtual breakpoints  are disabled  a message will be output that informs the user that only N   Realtime  breakpoints are enabled  and one or more breakpoints are  disabled   Note that the workbench permits any number of breakpoints to be  set  regardless of the USE VIRTUAL BREAKPOINTS setting of C SPY  If virtual  breakpoints are disabled  a maximum of N breakpoints can be set within C   SPY     RESET ing a
62. kbench x x 430 FET examples fet_projects eww conveniently organizes  the FET 1 demonstration code into a workspace  The workspace contains  assembler and C projects of the code for each of the FET tools  Debug and  Release versions are provided for each of the projects       Installation root gt  Embedded Workbench   X XM30V ET examples code_examples eww conveniently organizes the code  examples into a workspace  The workspace contains assembler and C projects  of the code for each of the FET tools  Debug and Release versions are  provided for each of the projects       Installation root gt  Embedded Workbench x XM30V ET examples contents htm  conveniently organizes and documents the examples     Additional examples can be located at   www msp430 com in sections Design  Resources and Technical Documents     Note  Example programs may require a 32KHz crystal on LFXT1    Some example programs require a 32KHz crystal on LFXT1  and not all       2 7    Development Flow    2 8    FETs are supplied with a 32KHz crystal     Development Flow    2 3 Using C SPY  Refer to Appendix C for a description of FET specific menus within C SPY     2 3 1 Breakpoint Types    The C SPY breakpoint mechanism makes use of a limited number of on chip  debugging resources  specifically  N breakpoint registers  Refer to Table 2 1  below    When N or fewer breakpoints are set  the application runs at full device  speed  or  Realtime    When greater than N breakpoints are set and Use Virtual  Breakpoints 
63. le quotes     string      automatically prepends a zero byte to the string  as an    End Of  String    marker   Enclosing a string in single quotes     string     does not     When using the compiler or the assembler  if the last character of a  source line is backslash  V   the subsequent carriage return line  feed is ignored  i e   it is as if the current line and the next line are a  single line   When used in this way  the backslash character is a  Line  Continuation  character     The linker output format must be  Debug info  or  Debug info  with terminal I O      d43  for use with C SPY  C SPY will not start  otherwise  and a error message will be output  C SPY cannot input a  TXT file     Position Independent code can be generated  using PROJECT    gt OPTIONS  gt GENERAL  gt TARGET  gt POSITION INDEPENDENT  CODE      Within the C libraries  GIE  Global Interrupt Enable  is disabled  before  and restored after  the hardware multiplier is used  Contact  TI if you wish the source code for these libraries so that this behavior  can be disabled     It is possible to mix assembler and C programs within the  Workbench  Refer to the Assembler Language Interface chapter of the  C EC   Compiler Reference Guide from IAR     A 3    Frequently Asked Questions    A 4    10  The Workbench can produce an object file in Texas Instruments  TXT    format  C SPY cannot input an object file in Texas Instruments   TXT format     11  The example programs giving in the Kickstart documentation
64. llow the write to Flash  operation with a NOP  and set a breakpoint on the instruction following  the NOP  Refer to FAQ  Debugging  21      20  The Dump Memory length specifier is restricted to four  hexadecimal digits  0 ffff   This limits the number of bytes that can be  written from 0 to 65535  Consequently  it is not possible to write  memory from O to Oxffff inclusive as this would require a length  specifier of 65536  or 10000h      21  Multiple internal machine cycles are required to clear and program the  Flash memory  When single stepping over instructions that  manipulate the Flash  control is given back to C SPY before these  operations are complete  Consequently  C SPY will update its  memory window with erroneous information  A work around to this  behavior is to follow the Flash access instruction with a NOP  and then  step past the NOP before reviewing the effects of the Flash access  instruction  Refer to FAQ  Debugging  19      22  Bits that are cleared when read during normal program execution   i e   Interrupt Flags  will be cleared when read while being  debugged  i e   memory dump  peripheral registers      Within MSP430F43x 44x devices  bits do not behave this way  i e   the  bits are not cleared by C SPY read operations      23  C SPY cannot be used to debug programs that execute in the  RAM of F12x and F41x devices  A work around to this limitation is to  debug programs in Flash     24  While single stepping with active and enabled interrupts  it can  
65. mber     Date  271472001 12 31 24p Sheet  171                        OR NG E GO No 2 010              Note  Connections between the JTAG header and pins XOUT and XIN are no longer required  and    should not be made   Figure B 5  MSP TS430DW28 Target Socket module  Schematic    C 6    Hardware               a rai            ig  VCC  GND   ra X  GND             DODODODODODODO                7200000090  1060000090  7200000090  100000090                                     72000090  1000090          72000090  1000090                LED connected to P1 0    Jumper J4 Jumper J5  Open to disconnect LED Open to measure current    S                  Connector J3 ve E TI LZ Qe  External power connector                2  GND IY een   gt  22         gt     Remove R8 and jumper R9    90000000000000       cs Ki    7200000090  100000090          Orient Pin 1 of MSP430    device   i          z 00080  1000090             Figure B 6  MSP TS430DW28 Target Socket module  PCB Pictorials    C 7                                                                                                                                                                                                                                                                                                                                              qu  E oO  pum   A RSTZNPI  I ho    is cr ua sg  13 5 a  11  If external supplu voltage  I 4 UCC    remove R8 and add R9  A Ohm           5  MS  3 1  1 i  GND  al coL joe         
66. ments on the CD ROM and WEB    The primary sources of MSP430 information are the device specific data sheet  and User s Guide  The most up to date versions of these documents available at  the time of production have been provided on the CD ROM included with this  tool  The MSP430 web site  www ti com sc msp430  will contain the latest  version of these documents     From the MSP430 main page on the CD ROM  navigate to  Literature   MS P430  Literature  gt Data Sheets  to access the MSP430 device data sheets     From the MSP430 main page on the CD ROM  navigate to  Literature   MS P430  Literature  gt User s Guides  to access the User s Guides of our MSP430 devices  and tools     Documents describing the IAR tools  Workbench C SPY  the assembler  the C  compiler  the linker  and the librarian  are located in common doc and 430 doc   The documents are in  pdf format  Supplements to the documents  i e   the latest  information  are available in  htm format within the same directories   430 doc readme_start htm provides a convenient starting point for navigating the  IAR documentation     Chapter 2    Development Flow          This chapter discusses how to use Kickstart to develop your application  software  and how to use C SPY to debug it     Topic Page  Overview  Using Kickstart  Project Settings  Creating a Project from Scratch  Using an Existing IAR 1 x Project  Stack Management within the  xcl Files    How to Generate Texas Instrument  TXT  and other format   Files    Over
67. nches  20 centimeters  in  length     To utilize the on chip ADC voltage references        10uF  6 3V  low  leakage  must be installed on the Target Socket module     Crystals resonators Q1 and Q2  if applicable  are not provided on  the Target Socket module  For MSP430 devices which contain user  selectable loading capacitors  the effective capacitance is the selected  capacitance plus 3pF  pad capacitance  divided by two     Crystals resonators have no effect upon the operation of the tool  and C SPY  as any required clocking timing is derived from the internal  DCO FLL      On 20 pin and 28 pin devices with multiplexed port JTAG pins  P1 4   P1 7   itis required that    RELEASE JTAG ON GO    be selected in  order to use these pins in their port capacity  Refer to C 1 1  EMULATOR  gt RELEASE JTAG ON GO for additional information  regarding this mechanism     As an alternative to sharing the JTAG and port pins  on 20 and 28  pin devices   consider using an MSP430 device that is a    superset     of the smaller device  A very powerful feature of the MSP430 is that  the family members are code and architecturally compatible  so code  developed on one device  say  without shared JTAG and port pins  will  port effortlessly to another  assuming an equivalent set of peripherals      Information Memory may not be blank  erased to Oxff  when the  device is delivered from       Customers should erase the Information  Memory before its first usage  Main Memory of packaged devices is  
68. nstallalon                     nie 1 3  1 4 Hardware Installation                 430  110                        1 3  1 5 Hardware Installation  MSP FET430Pxx0     P120     P140     P410     P430   P440  1 4  136     Flash NO NE ED TR 1 4  1 7 Important MSP430 Documents on the CD ROM and WEB                                1 5   Development      2 1  Doja  OVES Wd docs arc          MM ECT E De toh            2 2  2 2  ISI CICK SUAVE                 te o ciue             age ORAS                 2 2   2 2 1 Project  SELINOS                                                2 3  2 2 2  Creating a Project from  SCraten         eines a ada 2 5  22029     USING      Existing AR T25   PEOIGOLa ceo pesci etc        a a a roo E RE c Ra io pd ai 2 6  2 2 4 Stack Management within the  xcl Files                        2 6  2 2 5 Howto Generate Texas Instrument  TXT  and other format  Files                     2 7  2 2 6 Overview of Example Programs                         2    2 3 USOS arena 2 9  2 3 1  Breakpoint TV DCS ve sec nennen 2 9  2 9 2  VUSINE BICAKDOINS nern tat a tr i a i ea a da tat 2 9  2 0 9    Using Single  SIBD sodes    cs 2 10  2 9 4     USING Watch WVINGOWE o iti z              aa ad 2 11   Design Considerations for In Circuit Programming                                              eee 3 1  9p ABOOL OAD Lodi aaa 3 2  3 2  EXE PONE ae 3 2  3 9  DEVICE ION al re a ee 3 3  3 4 Signal Connections for In System Programming and Debugging  MSP    FET e                      3 
69. odule  PCB Pictorials    C 1    Ext_PHR TPS77001    J4                                                                                                                                                                      D3  P 5        1183 2 c  GND D2 pl  8 ls            ala      SE  11103 ae aula     01 4      I                er                emir         e E  ojja ele GND          GND D     0 tio 021    PINHD 2X13 Do pH  gt             oun GND    45 D Opt 9      cma Nells Socket 682 SOP ZIF  5    MSP43eF112  DS CICH  nsel  olnt 01 CTM  na CIDI in                      nfi nStrohe                         ID          LPT PORT EN ITAR                         Ton             CICI                                                                          GND                          pr  li alia      AQ OP  cop pa  La La        124  402            682921        lar               H  ID p  z           32kHz  CS  AF    51             HHHH       Ese                              75  ld tu PINHD 1X2        m R30                                                                                                                                CRST  EN TCI I  33            244       R15 TI GND GND                   BESSA PINHD 2X5 PINHD 2X5  33k RX              3 5 E 3  a  E       d 4l 4      b            On       ELIO c  aJ Io al Jou cul f   Cell           Ce               30  Q                R26  a  placed close 2   not assembled  to Socket layout prepared  GND                   190       M
70. on to XOUT is not required    No Jtag connection is required to the XOUT pin of the MSP430 as    shown on some schematics        Figure 3 2  Signal connections for MSP FETPxxO    3 7    Appendix A    Frequently Asked Questions       This appendix presents the solution to frequently asked questions  regarding hardware  and program development and debugging tools     Topic Page    A 1 Hardware    A 2 Program Development  Assembler  C  Linker        A 3 Debugging  C SPY     Frequently Asked Questions    A 1 Hardware    1     2     3     4     5     6     T     8     9     10     A 2    The state of the device  CPU registers  RAM memory  etc   is  undefined following a reset  Exceptions to the above statement are  that the PC is loaded with the word at Oxfffe  i e   the reset vector   the  status register is cleared  and the peripheral registers  SFRs  are  initialized as documented in the device User s Guides  C SPY resets  the device after programming it     When the MSP FET430X110 is used as an interface to an MSP430 on  the user s circuit  i e   there is no MSP430 device in the FET socket    the XOUT and XIN signals from the FET should not be connected  to the corresponding pins of the in circuit MSP430  Similarly  when  using the Interface module  do not connect the XOUT and XIN signals  from the Interface module to the corresponding pins of the in circuit  MSP430     The 14 conductor cable connecting the FET Interface module and the  Target Socket module must not exceed 8 i
71. otes  The hardware may already be modified    1  The hardware modification may have already been performed during  manufacturing  or your tool may contain an updated version of the  Target Socket module     If the modified Target Socket module is used with the PRGS   Version 1 10 or greater of the PRGS software is required           Ensure that the MSP430 device is securely seated in the socket   so that the  fingers  of the socket completely engage the pins of  the device   and that its pin 1  indicated with a circular indentation  on the top surface  aligns with the    1    mark on the PCB     CAUTION  Possible Damage To Device    Handle devices with fine pitch pins  64 80 100 pins  using  only a vacuum pick up tool  do not use your fingers as they  can easily bend the device pins and render the device  useless        A 6    Frequently Asked Questions    For revisions 1 0  1 1  and 1 2 of the FET Interface module  install    0 1uF capacitor between the  indicated points  pins 4 and 5 of U1         Figure A 1  Modification to FET Interface module    A 7    Frequently Asked Questions    For revisions 0 1 and 1 0 of the MSP TS430PM64 Target Socket module  severe the trace at the  indicated point     Note  Locating the trace to severe    Figure A 2  Modification to MSP TS430PM64 Target Socket module  depicts the back side of the PCB when viewed from the component  side of the PCB     0191010    Figure    2  Modification      MSP TS430PM64 Target Socket module    POS  PA       A
72. release     Several errors in the C SPY FET driver relating to the Data Transfer  Controller  DTC  of the MSP430F12x2 have been corrected     Within Realtime mode  single step of machine instructions  i e    assembler  is supported     The C SPY FET driver was rewritten to work with a new low level  JTAG driver  The new system is somewhat faster than past systems   and it is more reliable     The MSP430F 15x 16x devices are supported  with eight hardware  breakpoints      The number of available hardware breakpoints in the  MSP430F43x 44x devices has been increased to eight  Refer to Table  2 1  Number of Device Breakpoints  and other emulation features     An instruction cycle length counter has been added to the register  window  The counter is valid only during single step operations  Refer  to FAQ  Debugging  28     Corrected a bug in the software that corrupted the device RAM  contents during programming     F 6 Version 4 12    Significant Changes to Kickstart       The Workbench is a completely new product  IAR Version 2 x   Refer  to  lt Installation root gt  Embedded Workbench  x x common doc larldePm3_new htm for a description of the changes     Significant changes to the Version 2 x product include     Seamless integration of the C SPY debugger into the  Workbench     Introduction of the concept of a project workspace     Automatic selection of the device support files  linker   debugger  etc   to correspond with the target device     Support for the MSP430 Enhanced
73. riggers and resets  the device during CSTARTUP  the source screen will go blank as C   SPY is not able to locate the source code for CSTARTUP  Be aware  that CSTARTUP can take a significant amount of time to execute if a  large number of initialized global variables are used   int _ low_level_init  void            Insert your low level initializations here       WDTCTL   WDTPW   WDTHOLD     Stop Watchdog timer    V                Choose 1f Segment initialization  7                   be donc  or         m       Returns           omit Seg            7       1 to run seg init                      De                       M   I          15  Compiler optimization can remove unused variables and or    statements that have no effect  and can effect debugging   Optimization  NONE is supported within PROJECT  gt OPTIONS    gt ICC430  gt CODE  gt OPTIMIZATIONS  Alternatively  variables can be  declared volatile     Frequently Asked Questions    16  The IAR Tutorial assumes a Full or Baseline version of the  Workbench  Within a Kickstart system  it is not possible to configure  the C compiler to output assembler mnemonics     17  Existing projects from an IAR 1 x system can be used within the  new IAR 2 x system  refer to the IAR document Migration guide for  EW430 x x  This document can be located in    Installation  root gt  Embedded Workbench x x 430 doc migration htm    18  Assembler projects must reference the code segment  RSEG  CODE  in order to use the XLINK  gt PROCESSING  gt F
74. single step  or a  STOP escape      Although registers can be monitored in the Watch Window  VIEW  gt REGISTER  is a superior method     2 11    Chapter 3    Design Considerations for In Circuit  Programming       This chapter presents signal requirements for in circuit programming of the  MSP430     Topic Page  3 1 Boot Strap Loader  3 2 External Power  3 3 Device Signals    3 4 Signal Connections for In System Programming and Debugging  3 4  MSP FET430X110    3 5 Signal Connections for In System Programming and Debugging  3 6  MSP FET430Pxx0     P120     P140     P410     P430     P440        3 1    Design Considerations for In Circuit Programming    3 1 Boot Strap Loader    The JTAG pins provide access to the Flash memory of the MSP430F device   On some devices  these pins must be  shared  with the device port pins  and  this sharing of pins can complicate a design  or it may simply not be possible to  do so   As an alternative to using the JTAG pins  MSP430F devices contain a  program  a  Boot Strap Loader   that permits the Flash memory to be erased  and programmed simply  using a reduced set of signals  Application Notes  SLAA089 and SLAAO96 fully describe this interface       does not produce    BSL  tool  However  customers can easily develop their own BSL tools using the  information in the Application Notes  or BSL tools can be purchased from 3   parties  Refer to the MSP430 web site for the Application Notes and a list of  MSP430 3  party tool developers     Texas 
75. slating Asm430 Assembler Directives to A430 Directives  E 2 1 Introduction  E 2 2 Character strings  E 2 3 Section Control Directives  E 2 4 Constant Initialization Directives  E 2 5 Listing Control Directives  E 2 6 File Reference Directives    E 2 7 Conditional Assembly Directives    E 2 8 Symbol Control Directives    E 2 9 Macro Directives  E 2 10 Miscellaneous Directives  E 2 11 Preprocessor Directives    E 2 12 Alphabetical Listing and Cross Reference of Asm430  Directives       E 2 13 Additional A430 Directives  IAR     F 1    TI to IAR 2 0 Assembler Migration    E 1 Segment Control    RSEG defines a Relocatable SEGment  A relocatable segment means that  the code that follows the RSEG statement will be place    somewhere    in the  region defined for that segment  in the  xcl file   In other words  the code  can be  relocated   and you don t know  or care  where it s put  In the  xcl  files provided with the FET  multiple segments are defined in the same  memory regions  ASEG defines an Absolute SEGment  An absolute  segment means that the code that follows the ASEG statement will be  placed in the order it is encountered in the region defined for the segment   in the  xcl file   In other words  the placement of the code is fixed in  memory  One significant difference between the new IAR assembler and  the old Tl assembler is the meaning of the ORG statement  In the old TI  assembler  ORG would set the assembler code pointer to the specified  absolute address  However  
76. stops at the RUN  TO function   During this time the C SPY will indicate that the program  is running  and C SPY windows may be blank  or may not be correctly  updated      31  RUN TO CURSOR temporarily requires a breakpoint  If N breakpoints  are set and virtual breakpoints are disabled  RUN TO CURSOR will  incorrectly use a virtual breakpoint  This results in very slow  program execution     32  The simulator is a CPU core simulator  peripherals are not  simulated  and interrupts are statistical events     33  On devices without data breakpoint capabilities  it s possible to  associate with an instruction breakpoint an  arbitrarily complex   expression that C SPY evaluates when the breakpoint is hit  This  mechanism can be used to synthesize a data breakpoint  Refer to  the C SPY documentation for a description of this complex breakpoint  mechanism     34  The ROM Monitor referenced by the C SPY documentation applies  only to older MSP430E  EPROM  devices  it can be ignored when  using the FET and the FLASH based MSP430F device     35  Special Function Registers  SFRs      or the peripheral registers     are  now displayed in VIEW  gt REGISTER  there is no longer an SFR  Window     Frequently Asked Questions    36  The putchar   getchar   breakpoints are set only if these functions  are present  and the mechanism is enabled   Note that  putchar   getchar   could be indirectly referenced by a library function      37  The Flash program download progress bar does not update  
77. t  to tri state and the device is released from JTAG control  TEST pin is set to  GND  when GO is activated  Any active on chip breakpoints are retained and  the shared JTAG port pins revert to their port functions     At this time  C SPY has no access to the device and cannot determine if an  active breakpoint  if any  has been reached  C SPY must be manually  commanded to stop the device  at which time the state of the device will be  determined  i e   Was a breakpoint reached         Refer to FAQ  Debugging  10      EMULATOR  gt RESYNCHRONIZE JTAG  Regain control of the device     It is not possible to RESYNCHRONIZE JTAG while the device is operating     EMULATOR  gt INIT NEW DEVICE    Initialize the device according to the settings in the DOWNLOAD OPTIONS   Basically  the current program file is downloaded to the device memory  The  device is then reset  This option can be used to program multiple devices with  the same program from within the same C SPY session     It is not possible to INIT NEW DEVICE while the device is operating     EMULATOR  gt SHOW USED BREAKPOINTS  List all used hardware and virtual breakpoints  as well as all currently defined  EEM breakpoints    EMULATOR  gt ADVANCED  gt GENERAL CLOCK CONTROL    Disable the specified system clock while C SPY has control of the device   following a STOP or breakpoint   All system clocks are enabled following a GO  or a single step  STEP STEP INTO   Refer to FAQ  Debugging  17      EMULATOR  gt ADVANCED  gt EMULATI
78. t request support for Kickstart from    IAR  Please consult the extensive documentation provided with Kickstart  before requesting assistance        This equipment is intended for use in a laboratory test environment only  It  generates  uses  and can radiate radio frequency energy and has not been  tested for compliance with the limits of computing devices pursuant to  subpart J of part 15 of FCC rules  which are designed to provide  reasonable protection against radio frequency interference  Operation of  this equipment in other environments may cause interference with radio  communications  in which case the user at his own expense will be  required to take whatever measures may be required to correct this  interference     vi    Contents       Read TAIS First    iia iii  ADout This Manual            m tus sa ita iii  HOWO  USE          MP iii  Information About Cautions and Warnings                                                          IV  Related Documentation From Texas                                                                              IV  i You Need ASSISTANC E uias cadit E rana a da         a alla V  CVV AMIN rc PILLE IMEEM V                      et vii   UCU ES mE ii Vill   A                                        RIN Ix   Sef Started NOW io pistes      1 1  1 1  Kit Contents                                  ii i                            1 2  1 2 Kit Contents  MSP FET430Pxx0  P120     P140     P410     P430       440                1 2  13  Software IN
79. t the externally supplied voltage is  routed to the FET Interface module  so that it may adjust its output voltage  levels accordingly   Again  refer to the Target Socket module schematic in  Appendix B     Design Considerations for In Circuit Programming    3 3 Device Signals    The following device signals should be brought out  i e   made accessible  so  that the FET  GANG430  and PRGS tools can be utilized     RST NMI                                       Notes  Design considerations to support the FET  GANG430  and  PRGS    1  Connections to XIN and XOUT are not required  and should not be  made     2  PRGS software Version 1 10 or greater must be used        The BSL tool requires the following device signals     RST NMI    P1 1  P2 2 or   1 0    TESTT    O O O O O          lt   Q           If present on device   i    1     devices use pins P1 1 and P2 2 for the BSL   4xx devices use pins P1 0 and P1 1 for the  BSL     3 3    Design Considerations for In Circuit Programming    3 4 Signal Connections for In System Programming and Debugging  MSP     3 4          430  110    With the proper connections  you can use the C SPY debugger and the          FET430X110 to program and debug code on your own target board  In addition   the connections will support the GANG430 and PRGS  thus providing an easy  way to program prototype boards  if desired     Figure 3 1 below shows the connections between the FET and the target  device required to support in system programming and debug
80. the IAR assembler uses ORG to set an offset  from the current RSEG  Fortunately  if you don t use RSEG explicitly  it will  default to O  zero  and your program will link as you expect  with your code  at ORG   Be careful if you mix RSEG and ORG as ORG then becomes a  relative offset  Use ASEG if you want the  absolute  behavior of the old TI  ORG statement     E 2  Translating Asm430 Assembler Directives to A430 Directives    E 2 1 Introduction    The following sections describe  in general  how to convert assembler  directives for Texas Instruments  Asm430 assembler  Asm430  to  assembler directives for IAR   s A430 assembler  A430   These sections are  only intended to act as a guide for translation  For detailed descriptions of  each directive  refer to either the MSP430 Assembly Language Tools  User s Guide  SLAUE12  from Texas Instruments  or the MSP430  Assembler User s Guide from IAR     Note  Only the assembler directives require conversion    Only the assembler directives require conversion   not the assembler  instructions  Both assemblers use the same instruction mnemonics   operands  operators  and special symbols such as the section program  counter      and the comment delimiter            The A430 assembler is not case sensitive by default  These sections show  the A430 directives written in uppercase to distinguish them from the  Asm430 directives  which are shown in lower case     E 2 2 Character strings    In addition to using different directives  each ass
81. ture attributes to a label    tag 2     10  No A430 directive directly corresponds to  newblock  However   undef may be used to reset a symbol  that was defined with the  define directive  Also  macros or modules may be used to achieve the   hewblock functionality because local symbols are implicitly undefined at the end of a macro or module    11  Definition of structure types is not supported  Similar functionality is achieved by using macros to allocate  aggregate data and base address plus symbolic offset  as shown below     MYSTRUCT MACRO    DS 4  ENDM  LO DEFINE 0  HI DEFINE 2  RSEG         16 2  X MYSTRUCT  RSEG CODE    MOV X LO R4    Additional A430 Directives  IAR  A430 Directive  IAR   Define a file wide symbol DEFINE   Definition of special function registers  byte size  SFRB   Definition of special function registers  word size  SFRW   E 2 9 Macro Directives   Description Asm430 Directive  TI  A430 Directive  IAR     F 6    TI to IAR 2 0 Assembler Migration    Define a macro  macro MACRO  Exit prematurely from a macro  mexit EXITM  End macro definition                         Additional A430 Directives  IAR     Create symbol  local to a macro    A430 Directive  IAR   LOCAL 1     12  In Asm430 local symbols are suffixed by a question mark         E 2 10 Miscellaneous Directives    Description Asm430 Directive  TI  A430 Directive  IAR   Send user defined error messages to the  emsg  error  output device    Send user defined messages to the output  mmsg  message 1   
82. view of Example Programs    Using C SPY  Breakpoint Types  Using Breakpoints    Using Single Step       Using Watch Windows    2 1    Development Flow    2 1 Overview    Applications are developed in assembler and or C using the Workbench  and  they are debugged using C SPY  C SPY is seamlessly integrated into the  Workbench  However  it is more convenient to make the distinction between the  code development environment  Workbench  and the debugger  C SPY   C   SPY can be configured to operate with the FET  i e   an actual MSP430  device   or with a software simulation of the device  Kickstart is used to refer to  the Workbench and C SPY collectively  The Kickstart software tools are a  product of IAR     Documentation for the MSP430 family and Kickstart is extensive  The CD ROM  supplied with this tool contains a large amount of documentation describing the  MSP430  The MSP430 home page on the world wide web   www ti com sc msp430  is another source of MSP430 information  The  components of Kickstart  workbench debugger  assembler  compiler  linker  are  fully documented in   Installation root gt  Embedded Workbench x x common doc  and   Installation root gt  Embedded Workbench M30doc   htm files located  throughout the Kickstart directory tree contain the most up to date information  and supplement the  pdf files  In addition  Kickstart documentation is available  on line via HELP     Read Me Firsts from IAR and TI  and this document  can be accessed using   START  gt PROG
83. x Device Emulation                                            D 1  TI to IAR 2 0 Assembler Migration                                                       E 1  E  Segment                                               petes lao a      aaa    2   E 2 Translating Asm430 Assembler Directives to A430 Directives                           E 2            INIOQUCHON       LI        m E 2   E 22   Charaeler Stii NS ceea pasii ae ai aura    ia i aa a E 2   E 2 3   section Control  DIrectlV6es   s iioc aa oa    al ia E 3   E 2 4 Constant Initialization Directives                            E 4   E 2 5   Listing Control  DISCOS              ea E 4   E26  File Reference DITeClVes 5        ara Du M pa oda          redi E 5   E 2 7  Conditional Assembly Directives                         E 5   E 2 9  Symbol Gontrol DIrecllV6s  eiua uus e deme                   E 6   E29  Macro DIFGe ll VBS anne        teen er daa uadit ovi    a          olin E 6   E 2 10 Miscellaneous Directives                                  717   Preprocessor Direelives su eiua io atraga                                  n              E 7   E 2 12 Alphabetical Listing and Cross Reference of Asm430 Directives                       E 8   E 2 13 Additional A430 Directives  1                           E 8  Significant Changes to                                                                           F 1                                                             F 2           TEES    2   Prd  Version DA an c  ra tate eine 
84. xIPZ and MSP430F44xIPZ  devices     This tool contains the most up to date materials available at the time of  packaging  For the latest materials  data sheets  User   s Guides  software   applications  etc    visit the TI MSP430 web site at www ti com sc msp430   or contact your local TI sales office     Information About Cautions and Warnings    This book may contain cautions and warnings   This is an example of a caution statement     A caution statement describes a situation that could potentially  damage your software or equipment        This is an example of a warning statement     A warning statement describes a situation that could potentially  cause harm to you     The information in a caution or a warning is provided for your protection   Read each caution and warning carefully     Related Documentation From Texas Instruments    MSP430xxxx data sheets   MSP430x1xx User s Guide  SLAUO49  MSP430x3xx User s Guide  SLAUO12  MSP430x4xx User s Guide  SLAUO56                 If You Need Assistance    FCC Warning    Support for the MSP430 device and the FET is provided by the Texas  Instruments Product Information Center  PIC   Contact information for the  PIC can be found on the TI web site at www ti com  Additional device   specific information can be found on the MSP430 web site at    www ti com sc msp430     Note  Kickstart is supported by Texas Instruments    Although Kickstart is a product of IAR  Texas Instruments provides the  support for it  Therefore  please do no
    
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