TOPSwitch Tips, Techniques, and Troubleshooting Guide
Contents
1. Isocom Motorola Siemens Toshiba Quality Technologies Isocom Siemens Isocom Siemens Isocom Sharp Sharp Sharp Sharp Sharp Temic Temic Motorola Isocom Motorola Isocom Motorola Isocom Siemens Quality Technologies Isocom Siemens Quality Technologies Isocom Temic Temic Sharp Sharp Temic Temic Sharp Sharp Siemens Siemens NEC 17 Input Undervoltage Lockout Circuitry 17 1 Optocoupler Feedback Control Figure 16 shows a circuit for implementing input undervoltage lockout with optocoupler feedback control This circuit holds the Control pin voltage V low through D5 and Q1 until the voltage at the base of transistor Q1 set by the R6 R7 voltage divider exceeds approximately 4 4 Volts This circuit prevents TOPSwitch from starting until the DC input voltage V e across Cl is high enough for regulation When V is low base current through R7 biases PNP transistor Q1 on and holds the TOPSwitch Control voltage below the internal UV lockout threshold voltage typically 4 7 Volts As V rises the Q1 base voltage will rise high enough to cut off Q1 and allow the power supply to start For example for R6 of 1 MQ transistor base emitter voltage V and diode voltage V of 0 65 V and V of 100 V R7 is found to be 46 4 kO During steady state operation diode D5 is reverse biased and Q1 may be on with current limited by R8 To minimize power dissipation bias voltage V can be set to as low as 122. and audio amplifiers Heat sinking and component temperature rise determines the length of time that TOPSwitch can deliver peak power P rag DRAIN CURRENT WAVEFORM SHAPES IR Knp 0 4 1 l Ip l l I Ip l IR Continuous Mode a Kpp 1 0 A Aj Discontinuous Mode b PI 1903 061296 Figure 6 Current Waveform Shapes 5 2 Transformer Turns Ratio Curves The transformer turns ratio is determined from the low line minimum DC input voltage Vm output voltage V and reflected output voltage Vog Vum depends on the energy storage input capacitance A general rule is to use 3 uF watt of output power for universal input or 100 115 VAC applications and 1 uF watt of output power for 230 V AC input applications Applications using doublers to get the higher effective DC voltage from a 100 115 VAC input should use two series capacitors each with a value of 2 uF watt of output power These capacitor guidelines result in a minimum Vym of approximately 90 VDC for universal input or 100 115 VAC applications and 240 VDC for 230 VAC or doubler applications Applications using the TOP2XX series devices and operating from universal input voltage 230 V AC or using a doubler from 100 115 VAC should have a transformer designed for areflected voltage V of 135 V or less to limit peak Drain voltage stress Applications using the TOP1 XX series devices operating from 100 115 VAC should design for a reflec
3. e B 6 96 16 Optocoupler Recommendations Optocouplers graded for minimum current transfer ratio CTR variation with minimum CTR above 50 and maximum CTR below 200 are recommended CTR below 50 will require excessive photodiode currents to properly control TOPSwitch duty cycle CTR above 200 could trigger the TOPSwitch shutdown latch during start up or load transients The 5 rule for R1 selection Section 12 1 will compensate for nominal CTR value Table 3 lists many suitable optocouplers from various manufacturers Isocom requires an X suffix for safety agency approved versions Generic 4NXX series optocouplers including 4N25 4N26 etc are not recommended because CTR is uncontrolled 6 Pin Dip CNY17 2 CNY17 3 SFH600 1 SFH600 2 PC702V2 PC702V3 PC714V1 PC110L1 PC112L2 CNY 17G 2 CNY17G 3 63 125 100 200 63 125 100 200 63 125 100 200 80 160 6 Pin Dip 8 mm Spacing 50 125 80 200 63 125 100 200 6 pin DIP No Base Connection 8mm Spacing MOC8101 MOC8 102 MOC8103 CNY 17F 2 CNY17F 3 CNY75A CNY75B 50 80 73 117 108 173 63 125 100 200 63 125 100 200 6 pin DIP No Base Connection PCIIILI PC113L2 CNY75GA CNY75GB PC816A PC817A SFH 610A 2 SFH 610A 3 PS2501 H Table 3 Suggested Optocouplers with CTR Between 50 and 200 50 125 80 200 63 125 100 200 4 pin DIP 80 160 80 160 63 125 100 200 80 160 Motorola Siemens Toshiba Quality Technologies
4. Please Contact Customer Service Phone 408 523 9265 Fax 408 523 9365 EUROPE amp AFRICA Power Integrations Europe Ltd Mountbatten House Fairacres Windsor SL4 4LE United Kingdom Phone 44 0 1753 622 208 Fax 44 0 1753 622 209 APPLICATIONS HOTLINE World Wide 408 523 9260 APPLICATIONS FAX Americas 408 523 9361 Europe Africa 44 0 1753 622 209 Japan 81 0 45 471 3717 Asia Oceania 4089 523 0364 e bas TOPSwitch TOPFAX Americas Japan Asia Oceania 408 523 9361 Fax TO Europe Atrica 44 0 1753 622 209 81 0 45 471 3717 408 523 9364 INTEGRATIONS INC To dramatically reduce TOPSwitch design breadboarding and debugging time we strongly recommend procuring a reference design evaluation board Which reference design evaluation board are you using now For technical questions not answered by TOPSwitch reference design evaluation boards documentation and literature please fill out this TOPFAX form and FAX with complete schematic and transformer or inductor documentation to Power Integrations Inc For best technical support schematics must have component values Transformer or inductor documentation must have core part number inductance number of turns for each winding and construction information NAME COMPANY ADDRESS TELEPHONE FAX APPLICATION TOPSWITCH PART NUMBER QUANTITY PER MONTH Please indicate wh
5. T1 The other side of the transformer primary is driven by the integrated high voltage MOSFET within the TOP202 D1 and VRI U1 TOP202YAI Figure 2 Schematic Diagram of the ST202A Power Supply clamp the leading edge voltage spike caused by transformer leakage inductance to a safe value and reduce ringing The power secondary winding is rectified and filtered by D2 C2 L1 and C3 to create the 7 5 V output voltage R2 and VR2 provide a slight pre load on the 7 5 V output to improve load regulation at light loads The bias winding is rectified and filtered by D3 and C4 to create a bias voltage to the TOP202 L2 and Y 1 safety capacitor C7 attenuate common mode emission currents caused by high voltage switching waveforms on the Drain side of the primary winding and the primary to secondary capacitance L2 and C6 attenuate differential mode emission currents caused by the fundamental and harmonics of the trapezoidal or triangular primary current waveform C5 filters internal MOSFET gate drive charge current spikes on the Control pin determines the auto restart frequency and together with R1 compensates the control loop 1N5995B A D3 1N4148 CIRCUIT PERFORMANCE Line Regulation 0 5 85 265 VAC Load Regulation 1 10 100 Ripple Voltage 50 mV Meets VDE Class B PI 1699 112995 B 6 96 2 3 ST204A General Circuit Description The ST204A uses the TOP204YAI integrated circuit to implement an isolated Buck Bo
6. Watt of output power Because of capacitor DC leakage current balance resistors may be necessary to keep the voltage across each capacitor equal and within rating For 100 110V only operation D D R and R can be removed to reduce cost HIGH o VOLTAGE RETURN PI 1281 010395 Figure 18 Voltage Doubler B 6 96 19 Power Factor Correction PFC Nominal output power ranges for PFC applications are given in Table 4 for each TOPSwitch Refer to DN 7 for recommended inductance and precompensation resistance values 19 1 Reverse Drain Voltage Do not allow the Drain voltage to ring below the Source Add a fast recovery high voltage 200 to 400 V diode D2 in Figure 19 in series with the Drain when using TOPSwitch in a PFC circuit Negative voltages on the Drain will forward bias the output MOSFET body diode and trigger the internal shutdown latch Recycling input power or shorting the Control pin to the Source pin will be necessary to restart TOPSwitch 19 2 Auto Restart In PFC applications precompensation resistor R1 Figure 19 drives sufficient current into the Control pin to overcome the discharge current and effectively stalls auto restart If the PFC circuit does not start the first time an overload condition exists or a short input power interruption occurs TOPSwitch will enter and stallin auto restart Adding a parallel resistor between typically 2 7 kQ and 6 8 kO across C3 provides an additional 19
7. of at least 85 VDC During AC input voltagetransients or dropout conditions input storage capacitor C1 can discharge below 40 V which reduces TOPSwitch 9 Output Overvoltage Protection Figure 8 shows a discrete SCR circuit which turns TOPSwitch off when an overvoltage condition is sensed on the primary bias winding This circuit latches externally and holds the Control pin low Overvoltage latching occurs when the bias voltage exceeds the sum of the Zener diode voltage and the NPN transistor base emitter voltage drop 0 7 V Figure9 shows a DIAC orsilicon bi directional switch circuit cathode lead which should be the shorter lead when vertically mounted Dissipation in clamp Zener diode VR1 can also be minimized by reducing transformer leakage inductance U1 in most applications For example the 15 Watt ST202A power supply using the TOP202YAI Figure 2 has no TOPSwitch heat sink but has a small 0 8 inch x 0 8 inch 40 mil thick stamped copper plate style heat sink attached to the output rectifier The 30 Watt ST204A power supply using the TOP204 Figure 3 has a TOPSwitch heat sink 1 0 inch x 1 0 inch 40 mils thick and a larger heat sink 1 4 inch x 1 0 inch 40 mils thick on output rectifier D2 Control Pin Charging Current I increases charging time for auto restart capacitor C5 and decreases the auto restart frequency Short interruptions of AC power will cause TOPSwitchto enter the 8 countauto restart cycle before sta
8. rises the voltage at the cathode of D4 will rise high enough to cut off Q1 and allow the power supply to start Use the equation from section 17 1 For example for R6 of 1MQ transistor base emitter voltage V and diode voltage V of 0 65 V and V E eS a oN eay U1 TOPSwitch of 100 V R7 is found to be 46 4 kO Q1 is cut off during steady state operation and D4 prevents excessive reverse base emitter voltage When AC input voltage is removed V decreases as Cl discharges until output voltage V falls out of regulation and allows C5 to discharge The discharge current through Q1 is set by R8 to a value larger than the internal Control Pin Charging Current T to ensure that the Control pin voltage will be pulled below the internal UV Lockout Threshold Voltage to turn TOPSwitch off Q1 continues to hold the Control pin voltage low until AC input voltage is applied and V e becomes high enough for the power supply to regulate again PI 1327 010595 Figure 17 Input Under Voltage Lockout Circuitry for Bias Winding Feedback Control 18 Doubler Input for Increased Output Power Figure 18 shows a voltage doubler circuit for generating a nominal 300 Volt DC bus from 110 VAC input Removing jumper J1 allows the circuit to operate as a full wave bridge rectifier from 230 V AC input Both capacitors are rated for 200 to 250 Volts DC with approximately 2 uF for each
9. start capacitor C increases TOPSwitch U1 PWR TOP200YAI control pin current during turn on to limit the duty cycle and slow down the rising output voltage Resistor R discharges C when the power supply is turned off PI 1290 121994 Figure 14 Implementing Soft Start with Bias Winding Feedback 15 Bench Testing Figure 15 shows aTOPSwitch general test circuit for measuring most data sheet parameters This test circuit is not applicable for current limit or output characteristic measurements Under some conditions externally provided bias or supply current driven into the Control pin from a low impedance source lt 1 kQ can stall TOPSwitch in an auto restart cycle indefinitely and prevent starting Shorting the Control pin to the Source pin will reset the shutdown latch within TOPSwitch which will then begin a normal start up cycle To avoid this problem when TOPSwitch doing bench evaluation it is recommended that power should be applied to the Control pin before the Drain voltage is applied Do not plug the TOPSwitch device into a hot IC socket during test Capacitors mounted on the PC board may be charged and deliver a surge current into the low impedance Control pin This surge current may be sufficient to trigger the TOPSwitch shutdown latch NOTE This test circuit is not applicable for current limit or output characteristic measurements Figure 15 TOPSwitch General Test Circuit PI 1126 041994
10. the Latched Shutdown Trigger Current I threshold at which point TOPSwitch shuts down 11 Minimum Duty Cycle Operation TOPSwitch internal supply current remains constant and does not vary with duty cycle because of the minimum Duty Cycle DC In some cases a small pre load may be necessary to keep a lightly loaded or unloaded output voltage within the desired range due to DC w Shunt resistance or a Zener diode with the proper power rating can simply be added across the output voltage to provide preload current Figure 2 shows how R2 and VR2 provide minimum loading for the ST202A without adding a large power component R2 is a small 1 8 Watt resistor which passes minimum load current through the existing 500 mW Zener diode VR2 Figure 3 shows a variable minimum loading approach used onthe ST204A R2 dissipates the most power when the power supply output is lightly loaded and the TL431 U3 output is saturated low to decrease TOPSwitch duty cycle During normal operation when wider duty cycles are necessary TOPSwitch Control pin current is lower TL431 output voltage is higher R2 power dissipation is lower and overall efficiency is improved 12 Control Loop 12 1 Basic Techniques The TOPSwitch control function has two poles and a zero One pole is due to an internal RC filter with a typical corner frequency of 7 kHz This RC network filters switching noise but contributes little phase shift at normal crossover frequencies o
11. 3 Example Power Factor Correction Circuit The circuit shown in Figure 19 operates from 230 VAC input with typically 0 985 power factor and 8 Total Harmonic Distortion THD while providing 65 Watts of output power at TYPICAL PERFORMANCE Power Factor 0 985 THD 8 U1 TOP202YAI DRAIN Mii SOURCE nR CONTROL ME PFC Output Power nae 8 PFC Output Power omne mavit Table 4 Recommended PFC Output Power Ranges discharge path allowing the auto restart circuit to function properly C3 may have to be adjusted for proper auto restart timing 410 VDC Bridge Rectifier BR1 full wave rectifies the AC input voltage L1 D1 C4 and TOPSwitch make up the boost power stage D2 prevents reverse current through the TOPSwitch T1220 D1 MUR460 VR1 1N5386B Bleeder Resistor O RTN PI 1423 040495 Figure 19 Schematic Diagram of a 65W 230 VAC Input Boost Power Factor Correction Circuit Utilizing the TOP202 e B 6 96 19 3 Example Power Factor Correction Circuit continued body diode Rl generates a precompensation current proportional to the instantaneous rectified AC input voltage which directly varies the duty cycle C2 filters high frequency switching currents while having no filtering effect on the line frequency precompensation current from the large filter capacitor C3 to prevent an averaging effect which would increase total harmonic distortion
12. 4 012695 Figure 5 Ideal Placement for Critical Components e B 6 96 4 3 PC Layout Checklist 1 TOPSwitch U1 C1 and Transformer T1 primary pins should be very close together to minimize PC trace length and loop area The traces connecting these components have fast switching currents which cause common mode EMIemissions Note TOPSwitch alignment and right angle heat sink 2 D1 VR1 and Transformer T1 primary pins should be very close together to minimize PC trace length and loop area Traces connecting these components have fast switching currents which cause common mode EMI emissions 3 wm TOPSwitch Drain connection to T1 primary pins and clamp diode D1 must be very short because in addition to fast switching currents this trace also has high switching voltage which causes additional common mode EMI emissions 4 TOPSwitch Source pin should connect directly to C1 with no other traces connected to this trace segment 5 Y1 capacitor C7 should connect directly to the transformer T1 primary bias winding return and secondary output winding return pins with short wide traces 6 Transformer T1 primary bias winding return should be connected directly to TOPSwitch Source pin No other components should be connected to this trace segment because lightning surge test voltages induce noise voltage drops 7 Bias diode D3 should be as close as possible to transformer T1 bias winding pins This placeme
13. 431 Control Using the TOP204 sess 9 3 Drain SIENTE 10 4 PC Layout 4 1 Single Point Grounding 2 Er I ches EE be bobs bao deh op EUR ERR ERE iste ERRORIS EE ENE EK EE RUE beg 11 4 2 Ide l Component Placement er eee ERE ether eiie tte reitera dote aul e ts 11 4 3 PC Layout Checklists siiente sessies ete e Here d D ie ERE ORE UE ED EPOD TI Re HEISE 12 5 Flyback Power Supply Transformer 5 I Powerand Inductance Ranges ertet tct tete e ELO RU ee tette eto etti eei 13 5 2 Transformer Turns Ratio Curves enn eene n tee EO RU ORC E ER ER Ee ERU TER ER re Ie er 14 6 Optimizing Power Supply Efficiency eese essen entente tente netten VE EEEE enne nne testen tentent teet EEEE EENES 15 T Thermal DeSIgn 3 der aree oer deer Ue weiss bet itidem tote tei E E E ere iet etie ue 15 8 Auto Restart one eee tree re e DEG m te E pe ter te Oe RE e ER eie rh e regn rre dre 16 9 Qutput Overvoltage Protection e t tere EU th Heston oth REFER ERRARE CHEER RISE Er E EE 16 TO Current to Duty Cycle Conversion teet RU UU EH Rte et Labeo idee ette tentes tete ce deve 17 11 Minimum Duty Cycle Operation tet eignet E Ge OR C E Re EH EE LR teg ER EROS REC ree i teh s 17 12 Control Loop 12 1 B sc Techni Ques sac creer tem e ertet eteo ice e tete ude cad ete eie beret eee eiie ne obere biet 17 12 2 Enhanced Bandwidth 5 5 treten oe te e TE SERE REGERE REN Re pedet tgp 18 13 EMI IS TOBSW ch Adv
14. C1 filters high frequency noise currents which could cause errors in the precompensation current When the Output voltage becomes regulated series connected Zener diodes VR1 and VR2 drive current into the TOPSwitch control pin and directly control the duty cycle C3 together with R3 perform low pass filtering on the feedback signal to prevent output line frequency ripple voltage from varying the duty cycle B 6 96 Power Integrations reserves the right to make changes to its products at any time to improve reliability or manufacturability Power Integrations does not assume any liability arising from the use of any device or circuit described herein nor does it convey any license under its patent rights or the rights of others PI Logo and TOPSwitch are registered trademarks of Power Integrations Inc Copyright 1994 Power Integrations Inc 477 N Mathilda Avenue Sunnyvale CA 94086 WORLD HEADQUARTERS Power Integrations Inc 477 N Mathilda Avenue Sunnyvale CA 94086 USA Main 408 523 9200 Customer Service Phone 4089 523 9265 Fax 408 523 9365 JAPAN Power Integrations K K Keihin Tatemono 1st Bldg 12 20 Shin Yokohoma 2 Chome Kohoku ku Yokohama shi Kanagawa 222 Japan Phone 81 0 45 471 1021 Fax 81 0 45 471 3717 AMERICAS For Your Nearest Sales Rep Office Please Contact Customer Service Phone 408 523 9265 Fax 408 523 9365 ASIA amp OCEANIA For Your Nearest Sales Rep Office
15. ET solutions require extra components to properly tailor the turn on fall time Drain trace length should be kept as short as possible to minimize radiated EMI and 3 show a single reinforced insulation Y 1 safety capacitor C7 Murata DE1110E102M ACT4K KD Roederstein WKP102MCPE OK or Rifa part number PME294RB4100M rated for direct connection between primary and secondary When using standard Y2 capacitors two larger capacitors typically 2200 pF must be used in series to meet safety requirements Refer to AN 15 for more information e B 6 96 14 Soft Start 14 1 Optocoupler Feedback Soft Start can be added to eliminate turn on overshoot in optocoupler feedback applications with a 4 7 UF to 47 uF aluminum electrolytic capacitor C placed across the shunt element as shown in Figure 13 Soft start capacitor C NEC2501 H 1N5995B A a Detail from ST202A Figure 13 Implementing Soft Start with Optocoupler Feedback increases optocoupler current during turn on to limit the duty cycle and slow down the rising output voltage C has minimal effect on the control loop during normal operation R2 discharges soft start capacitor C when input power is removed D2 L1 MUR610CT 3 3 uH b Detail from ST204A PI 1278 010494 B 6 96 14 2 Bias Winding Feedback Soft Start can be implemented to eliminate turn on overshoot in primary regulated feedback applications with the circuit shown in Figure 14 Soft
16. Piom P e P nik TOP200 0 6 12 TOP201 10 16 22 27 TOP202 15 23 30 40 TOP203 20 28 35 48 TOP214 25 34 61 TOP204 30 40 5 73 230 VAC INPUT V 7135 V K 0 6 Pus Prom Pax TOP200 0 1 TOP201 20 29 37 TOP202 30 43 55 TOP203 40 54 67 TOP214 50 68 84 TOP204 60 80 P rag iS the minimum available peak power at 90 of the minimum specified TOPSwitch current limit I and low line AC input voltage LIMIT Table 2 Recommended Flyback Power Supply Primary Inductance and Output Power Ranges For applications requiring high efficiency and low power loss start with appropriate P column to select the proper TOPSwitch Then pick the transformer primary inductance from the L column For example for a universal input and 22 Watt output start with the Universal Input table and P column The TOP201 will be the first choice Primary inductance is read from the L column and found to be 1703 uH e B 6 96 Applications requiring a small size transformer should start with the appropriate P n column to select the proper TOPSwitch Then pick the transformer primary inductance from the Lyin column Forexample fora 115 VAC input and 20 Watt output start with the 100 115 VAC Input table and P y column The TOP102 is the first choice Primary inductance is read from the Lyn column and found to be 268 uH P 18 critical for power supply applications with large peak loads such as disk drives printers
17. TOPSwitch Tips Techniques and Troubleshooting Guide Application Note AN 14 INTEGRATIONS INC Answers to All Common TOPSwitch Technical Questions can be found in this application note the TOPSwitch Data Sheets the TOPSwitch Design Notes and the TOPSwitch reference design evaluation board documentation The fastest path to TOPSwitch success is to read the TOPSwitch data sheets AN 16 and this document carefully and completely before beginning the design Detailed information on specific application circuits can be found in the Application Notes Design Notes and Reference Design Evaluation Board documentation listed below Purchasing a Reference Design Other Design Application Notes AN 15 TOPSwitch Power Supply Design Techniques for EMI and Safety AN 16 TOPSwitch Flyback Design Methodology AN 17 Flyback Transformer Design for TOPSwitch Power Supplies AN 18 TOPSwitchFlyback Transformer Construction Guide AN 19 TOPSwitch Flyback Power Supply Efficiency AN 20 Transient Suppression Techniques for TOPSwitch Power Supplies Evaluation Board is strongly recommended and will dramatically reduce design breadboarding and debugging time For information on specific subjects including PC design Drain Voltage Clamping and Recommended Transformer Inductance find the appropriate section in the table of contents on the next page For problems encountered in working power supplies refer directly to the Troubleshoot
18. V or an optional resistor can be inserted between the emitter of Q1 and V pias TOPSwitch When AC input voltage is removed V decreases as Cl discharges until output voltage V falls out of regulation and allows C5 to discharge The discharge current through Q1 and D5 is set by R8 to a value larger than the internal Control Pin Charging Current I to ensure that the Control pin voltage will be pulled below the internal UV Lockout Threshold Voltage to turn TOPSwitch off Q1 continues to hold the Control pin voltage low until AC input voltage is applied and Vo becomes high enough for the power supply to regulate again Vo Vgg Vi Rj R4X C BE D Voc Vc Ver Vp IAMx 4 4 100 4 4 46 4 KQ PI 1328 010495 Figure 16 Input Under Voltage Lockout Circuitry for Optocoupler Feedback Control B 6 96 17 2 Bias Winding Feedback Control Figure 17 shows a circuit for implementing input undervoltage lockout with Bias Winding Feedback Control This circuit holds the Control pin voltage V low through Q1 until the voltage at the cathode of D4 set by the R6 R7 voltage divider exceeds approximately 4 4 Volts This circuit prevents TOPSwitch from starting until the DC input voltage V e across Cl is high enough for regulation When Veis low base current through D4 and R7 biases PNP transistor Q1 on and holds the TOPSwitch Control voltage below the internal UV lockout threshold voltage typically 4 7 Volts As Vj
19. ansformer construction guidelines Values in the table are based on the following assumptions Minimum Available Peak Power P is based on the trapezoidal continuous mode Drain current waveform shown in Figure 6a and maximum primary inductance L for each TOPSwitch shown in Table 2 Ripple current to peak current ratio K is typically 0 4 for 100 115 VAC or universal input and K is 0 6 for 230 VAC input P is the minimum peak power available at 90 of the minimum specified TOPSwitch Current Limit I and low line AC input voltage Continuous output power will approach P eak with infinite heat sinking P is based on empirical data with moderate heat sinking in continuous mode operation with L for each TOPSwitch shown in Table 2 P n 15 based on empirical data with moderate heat sinking in discontinuous mode operation with the triangular Drain current waveform shown in Figure 6b and L for each TOPSwitch shown in Table 2 Input storage capacitor values 3 WF per Watt of output power for 100 115 or universal mains voltage 85 VAC minimum 1 uF per Watt of output power for 230 VAC mains voltage 195 VAC minimum 100 115 VAC INPUT V 60 V K 0 4 Suggested Suggested Primary Inductance Output uH Power W Ly Lax Piin Prom P TOP100 504 1128 TOP101 357 649 15 24 33 TOP102 268 446 20 33 45 TOP103 214 340 25 40 55 TOP104 179 293 30 45 60 UNIVERSAL INPUT V 135 V K 0 4 P MIN
20. antages tecti te Ae eU Eee E eU et biete ine decretos 19 13 2 EMI Filter TopoloBy n reget e DE E OR RR REDE EE SHE IEo sesusdvenassesbesssssuedensesstes 19 14 Soft Start 14 1 Optocoupler Feedback 3 8 o oe roe ar tet oie e pelos ti aere eee us 20 14 2 Bias Windmg Feedback eec e orent ERU ER GR RERO ERIT UR PRO ETASAN EEE 21 I5 Bench Testing cete Ire or ERR IRR e Ra EIU S E EUER RR atu ted 21 16 Optocoupler Recommendations te nete qe iie tee ette ER UU NU Ei Ute ethic 22 17 Input Undervoltage Lockout Circuitry 17 1 Optocoupler Feedback Conttol 2 i P rte e EET Re ERES I EE ee SUE FRU EeE D ORC RE Le EET 23 17 2 Bias Winding Feedback Controlin eate eee UR Re teet dete etie los 24 18 Doubler Input for Increased Output Power eene nennen nee nenenneenne terere etre ESOS trennen tr ete entree e trennen 24 I9 Power Pactor Correction BEC tena ERR A I er e IU 25 TOPSwich TOPFAX Form ctio tote ettam DR es reet ette uite iere tentatio sty 27 e 6 96 1 Troubleshooting Guide GENERAL Power supply does not start TOPSwitch blows up at turn on or overload Low Efficiency Switching currents shutdown latch trigger Transformer primary Zenerclamp voltage too low Secondary winding connected backwards Failed output rectifier or clamp circuit High optocoupler current during start up triggers shutdown latch R3 exceeds 15 Figure 3 Insufficient clamping or high leakage inductance
21. ation Mad f so bias winding completely covers width of bobbin Discontinuous mode operation e Redesign transformer for continuous mode operation POWER FACTOR CORRECTION CIRCUITS PFC stage does not start Total Harmonic Distortion THD is greater than 10 PFC stage turns off with short interruption in AC power Drain voltage rings below Source potential Precompensation resistor value is not correct Precompensation current waveform is being filtered Output voltage ripple modulates duty cycle Inductor value is too large and enters continuous mode at peak of rectified AC input voltage Inductor value is too small and TOPSwitch current limit reduces duty cycle Precompensation resistor current disables auto restart Add fast recovery blocking diode in series with Drain Section 19 1 Adjust precompensation resistor until optimum THD has been obtained See DN 7 Reduce bypass capacitance on Control pin to less than 4 7 UF Add resistor 75 to 200 2 between Control pin bypass capacitor and auto restart compensation capacitor R2 in Figure 19 ncrease auto restart compensation capacitor to reject output voltage ripple Decrease inductor value See DN 7 Increase inductor value See DN 7 Use TOPSwitch with higher current limit Add 2 7 kQ to 6 8 kQ resistor across C3 Figure 19 to shunt precompensation current from control pin See DN 7 B 6 96 2 Example Power Suppl
22. causes excessive Drain Source voltage Transformer primary clamp Zener voltage too low causing high loss in clamp Zener Clamp circuit blocking diode is too slow or has low breakdown voltage rating Outputrectifierrecovery too slow Output rectifier breakdown voltage too low Transformer primary inductance too low causing high RMS currents TOPSwitch current or power rating too low Use Kelvin single point ground connection for all capacitors connected to Source pin Section 4 1 Minimize length of Source Pin Improve PC layout Section 4 2 4 3 Electrically isolate heat sink from circuit to 1 5 times Increase clamp Zener voltage rating reflected output voltage Vor Reverseconnection on winding to match schematic dot polarity Replace output rectifier clamp Zener or clamp diode Increase value of optical coupler LED series resistor Use optical coupler with CTR between 5096 and 20096 e Addresistor 270 Q to 620 Q inseries with optocoupler emitter e Add 0 1uF bypass capacitor across Control and Source pin Section 12 1 Use Zener diode blocking diode clamp circuit across transformer primary Section 3 Make sure Zener voltage clamps Drain voltage below breakdown Section 3 e Reduce transformer leakage inductance or V ncreaseclamp Zener voltage rating to 1 5 timesreflected output voltage Vor Use ultra fast recovery rectifier with at least 400 Volt breakdown for TOP100 series a
23. ch power supplies using a TL431 shunt regulator and optocoupler for control loop feedback Figure 12 shows how the control circuitry of a typical TOPSwitch power supply such as the ST204A Reference Design using the TOP204Y AT can be DRAIN SOURCE CONTRO E DRAIN Mii SOURCE Mu CONTROL HE b 150 C5 to 47uF 1000 PI 1277 011895 Figure 11 Control Pin Compensation optocoupler circuits to the rectifier side of L1 The ST204A power supply Figure 3 shows the proper connection for accurate optocoupler circuits The optocoupler is connected to the rectifier side of L1 but the resistor divider senses the voltage directly atthe power supply output which makes load regulation independent of the DC resistance of L1 In this method DC feedback comes directly from the output while AC feedback comes from before the postfilter to avoid additional phase shift easily modified to increase control loop gain and bandwidth which reduces output voltage line frequency ripple while also improving transient response Reducing capacitance C9 down to 0 01 uF improves TL431 frequency response Increasing R3 to 13 Q improves loop phase margin Adding 100 KQ resistor R6 as shown increases overall gain and also increases phase margin B 6 96 VR1 P6KE200 D1 BYV26C CIRCUIT PERFORMANCE Line Regulation 0 2 85 265 VAC Load Regulation 0 2 10 100 Ri
24. currents High voltage return to input capacitor C1 must be connected directly to the Source pad with a separate trace and must not share the Bias Winding Return Bypass Capacitor High Voltage Return P To C1 rb Bias Feedback Input TOP VIEW Figure 4 Recommended TOPSwitch Layout 4 2 Ideal Component Placement Figure 5 shows ideal component placement and single sided PC trace connections for all critical power and EMI components with the ST204A schematic Figure 3 used for reference PC Board 1 C5 trace Bias feedback return should also be connected directly to the Source pad with a separate trace as shown The Source pin must be kept as short as possible Do not bend or extend the Source pin Insert TOPSwitch fully into the PC board as shown Extend and bend the Drain pin if additional creepage distance on the PC board is necessary Kelvin connected bypass capacitor and or compensation network D Do not bend SOURCE pin Keep it short Ne Insert fully into PC board High voltage Return Bend DRAIN pin forward if needed for creepage Bias Feedback Input Bias Feedback Return PI 1697 120195 A checklist is provided on the next page which is useful for uncovering potential PC layout related problems in any TOPSwitch power supply a Jumper D2 Kc a Output aL Connector Loop Length Not Critical PI 133
25. d pads and that no additional PC traces have been placed in series with C3 Note also that PC traces in series with L1 and the PC trace connecting C2 and C3 can be narrower and longer because current flow is essentially DC 13 Heat sinks should be either connected only to TOPSwitch tab or completely isolated from both TOPSwitch tab and circuit If the heat sink is connected elsewhere in circuit but isolated from TOPSwitch tab capacitance between TOPSwitch tab and heat sink can resonate with circuit inductance causing high frequency ringing currents which may trigger TOPSwitch shutdown latch B 6 96 5 Flyback Power Supply Transformer 5 1 Power and Inductance Ranges Nominal output power and primary inductance ranges are given in Table 2 for each TOPSwitch under the following AC input voltage conditions and transformer reflected output voltage Mos North America Japan and Taiwan 85 132 VAC 50 60 Hz V 60 V e Universal Input 85 265 VAC 50 60 Hz V 2135 V e Europe and Asia 195 265 VAC 50 60 Hz V 135 V These output power ranges are rough guidelines intended only for initial TOPSwitch selection and as a starting point for design Output power levels outside the given ranges can be used with proper attention to transformer design heat sinking and mechanical packaging For more information refer to AN 16 for flyback power supply design guidelines Refer to AN 17 for transformer design and AN 18 for tr
26. f 1 to 2 kHz Auto restart capacitor C5 typically 47 WF together with the Control pin dynamic impedance typically 15Q contributes the second pole of approximately 226 Hz C5 as shown in Figure 1 1a has equivalent series resistance typically 2Q which creates a zero at approximately 1 7 kHz This compensation method is used for power supplies operating in discontinuous mode or lightly continuous mode at duty cycles of 50 or less such as the ST202A in Figure 2 Additional series resistance R3 between 2 Q and 15 can be added as shown in Figure Ibto move the zero lower in frequency This compensation method is used for power supplies operating in continuous mode such as the ST204A in Figure 3 FROM SECONDARY BIAS WINDING FROM SECONDARY BIAS WINDING PI 1141A 081294 Figure 9 Latching Overvoltage Using a Diac FROM SECONDARY BIAS WINDING PI 1140A 081294 Figure 10 Bias Winding Regulator to Limit Output Voltage e bus 12 Control Loop continued R3 can be increased beyond 15Q up to a maximum value of 100Q to eliminate the effect of auto restart capacitor C5 from the control loop but bypass capacitor C10 must then be added as shown in Figure 11c This compensation method is good for powersupplies with sophisticated secondary side compensation schemes that do not require the dominant pole caused by auto restart capacitor C5 R3 values beyond 100Q are not recommended because auto restart
27. ich of the following information is included with this TOPFAX Schematic with Component Values Transformer Documentation Inductor Documentation Oscilloscope Waveforms Other Please fill in Application Parameters AC Input Voltage io Output Steady State Peak Voltage Output Current Output Current DC Input Voltage to Output Power Steady State 1 to Output Power Peak 2 to EMISpecification 3 to Safety Specification 4 to El E 6 96 TOPFAX PAGE of
28. imary to secondary capacitance L2 and C6 attenuate differential mode emission currents caused by the fundamental and harmonics of the trapezoidal primary current waveform C5 filters internal MOSFET gate drive charge current spikes on the Control pin determines the auto restart frequency and together with R1 compensates the control loop The TL431 shunt regulator U3 integrates an accurate 2 5 V bandgapreference op amp and driver into a single device used as a secondary referenced error amplifier Output voltage is sensed divided by R4 and R5 and compared with the internal reference C9 and R4 determine error amplifier frequency response R1 limits LED current and sets overall control loop DC gain D2 PI 1700 112995 e 3 Drain Clamping Transformer leakage inductance causes voltage spikes when the TOPSwitch output MOSFET turns off These voltage spikes must be clamped to keep the TOPSwitch Drain voltage below the BV rating The recommended clamp circuits shown in Figures 2 and 3 consist of blocking diode D1 and Zener diode VR1 Voltage spikes are effectively clamped below the TOPSwitch Drain voltage rating RCD clamp circuits are not recommended because clamping voltage varies with load current RCD clamp circuits may allow the drain voltage to exceed the data sheet breakdown rating of TOPSwitch during overload operation or during turn on with high line AC input voltage D1 should be an ultra fast recovery high
29. ing Guide For technical questions not covered by any TOPSwitch literature fill out a copy of the TOPFAX form given at the end of this application note and FAX to Power Integrations Inc DN 7 Power Factor Correction Using TOPSwitch DN 8 Simple Bias Supplies Using the TOP200 DN 11 A Low Cost Low Part Count TOPSwitch Supply DN 12 Non isolated Flyback Supplies Using TOPSwitch DN 14 Constant Current Constant Power Regulation Circuits for TOPSwitch DN 15 TOPSwitch Power Supply for Echelon PLT 21 Power Line Transceiver DN 16 DC to DC Converters Using TOPSwitch for Telecom and Cablecom Applications Reference Design Evaluation Board Documentation ST200 TOP200 Reference Design Board 95 to 370 Volt DC Input 5V 5W Output Replaced by RD1 ST202A TOP202 Reference Design Board Universal AC Input 7 5V 15W Output ST204A TOP204 Reference Design Board Universal AC Input 15V 30W Output RD 1 TOP210 Reference Design Board 104 to 370 VDC Input 4W Output RD 2 TOP210 Reference Design Board 85 to 132 VAC or 170 to 265 VAC input 8W Output June 1996 Table of Contents 1 Troubleshooting Guide eed aep t P ei Ere e Pr ee Ses e e eri Eier eR 3 2 Example Power Supply Circuits 2 1 DC Input 5V 5W Bias Winding Control Using the TOP200Q sese enne nennen 7 2 2 Universal Input 7 5 V 15W Optocoupler Zener Control Using the TOP202 seen 8 2 3 Universal Input 15V 30W Optocoupler TL
30. le from Motorola Table 1 shows recommended blocking diodes D1 and clamp Zener diodes VR1 for each TOPSwitch Also shown are other Zener diode families that can be used for clamp Zener diode VR1 Refer to AN 16 for more information on reflected output voltage and clamping CLAMP ZENER DIODES Doubled 115 or 230 VAC Input Universal Input Input V x 60V V lt 135V V lt 135V OR OR OR PEE EE EN REREREEEEN MEREEEEEEENE Pes 1 E 1N5956 1N59536 ss PeKE200 P6KE200 ToP202 BYV26C MURIEO P KE200 PekE20 Froeme Byveec_ monro Pezo _Pexez00 orea Bw di SSS Peo peeo Torzo eww _ LL Feo Feee Other clamp Zener diode series that can be used include 1 0 Watt 1N476X Motorola 1 5 Watt BZY97 Philips Thomson Fagor 1 0 Watt VRD Z2XXU Ishizuka 2 Watt BZ V47C Thomson 1 3 Watt BZX85C Thomson 2 5 Watt BZD23 Philips 3 25 Watt BZT03 Philips Temic 5 Watt 1N53XX Motorola Thomson 6 Watt BZWO3 D Temic Table 1 Recommended Blocking Diodes D1 and Recommended Clamp Zener Diodes VR1 B 6 96 4 PC Layout 4 1 Single Point Ground Kelvin Source Pin Connections Figure 4 shows how auto restart compensation capacitor C5 must be connected to the Source pin using a single point ground or Kelvin connection Proper layout prevents shutdown at turn on or instability due to high Source pin switching
31. nd 600 Voltbreakdown for TOP200 series section 3 Use ultra fast recovery output rectifier ncrease breakdown voltage of output rectifier ncrease the transformer primary inductance Increase the transformer turns ratio and primary inductance for higher duty cycle and lower peak current Use higher power TOPSwitch e Add or increase TOPSwitch heatsink GENERAL TOPSwitch appears to operate at 50 KHz or lower subharmonic of 100 KHz switching frequency Drain clamp Zener diode is too hot TOPSwitch too hot Power supply output voltage increases athighinput voltage and light load Turn on Drain current spike duration exceeds leading edge blanking due to Excessive clamp circuit capacitance Excessive RC damper capacitance Slow recovery rectifiers on output windings Excessive transformer primary capacitance Reflected output voltage exceeds Zener diode voltage rating Poor heat transfer Slow recovery rectifiers on output windings Clamp dissipation exceeds Zener diode power rating High switching loss due to slow recovery clamp diode High switching loss due to slow recovery output rectifier Transformer primary inductance toolow causing high RMS currents Poor heat transfer Current or power rating too low Minimum duty cycle delivers more energy than light load can consume Use Zener clamp circuit across transformer primary Section 3 Remove or reduce RC damping
32. nt minimizes anode trace length which has high switching voltages and maximizes length of the relatively quiet cathode trace 8 Cathode of D3 should connect directly to C4 No other components should be connected to this trace segment because lightning surge voltages and rectification current will induce noise voltage drops C4 should then be connected through a PC trace and top side wire jumper to optocoupler U2 9 Capacitor C4 should be connected directly to TOPSwitch Source pin with no other traces connected to this trace segment No other components should be connected to this trace segment because lightning surge test voltages will induce noise voltage drops 10 Capacitor C5 should be connected directly to TOPSwitch Source pin with no other traces connected to this trace segment No other components should be connected to this trace segment because lightning surge test voltages will induce noise voltage drops 11 Outputrectifier D2 C2 and Transformer secondary pins should be very close togetherto minimize PC trace length andloop area Traces connecting these components have fast switching currents which cause common mode EMI emissions PC traces should be wide because peak currents are much higher than DC load current 12 C3 should be close to the output connector and directly across the traces connecting to the output connector to minimize output switching noise Note that the PC traces run right through the capacitor lea
33. on primary or secondaries Use ultra fast recovery output rectifiers Add heat sink to output rectifier Rewind transformer primary adding additional insulation between layers of primary winding to reduce capacitance See AN 18 Reduce number of turns on primary e Increase clamp Zener voltage rating to 1 5 times reflected output voltage V or Reduce Zener diode lead length ncrease PC trace width Use ultra fast recovery output rectifiers Use higher power rating Zener e Place a 0 01 uF 200V capacitor in parallel with Zener diode Rewind transformer for lower leakage inductance Use ultra fast recovery rectifier with at least 400 Volt breakdown for TOP100 series and 600 Voltbreakdown for TOP200 series Section 3 Use ultra fast recovery output rectifier ncrease the transformer primary inductance ncrease the transformer turns ratio and primary inductance for higher duty cycle and lower peak current Add or increase size of heat sink Use TOPSwitch with higher current or output power ncrease primary bias voltage up to 30 Volts Add minimum load resistor Section 11 POWER SUPPLIES REGULATED WITH OPTICAL COUPLED FEEDBACK Insufficient gain phase margin due to e Output has m filter filter e Connect optical coupler to the rectifier side of t section adding additional phase shift Section 12 1 to control loop Power Supply Oscillates Improper compensation ncrease resisto
34. ost or flyback switching power supply Figure 3 shows a power supply circuit delivering 30 W at 15 VDC fromauniversal AC input voltage of 85 to 265 V AC Output voltage is directly sensed and accurately regulated by a secondary referenced error amplifier The error amplifier drives a current error signal through an optocoupler into the TOPSwitch Control pin to directly control TOPSwitch duty cycle Output voltage can be fine tuned by adjusting divider resistors R4 and R5 AC input voltage is rectified by BR1 and filtered by C1 to create a high voltage DC bus ranging from 100 to 375 VDC D1 and VRI clamp leading edge voltage spikes and reduce ringing on the Drain voltage waveform caused by leakage inductance The T1 power secondary is rectified by D2 and filtered by C2 to generate DC output voltage L1 and C3 provide additional filtering to reduce high frequency ripple voltage R2 improves load regulation at light loads by pre loading the output voltage VRI P6KE200 CIRCUIT PERFORMANCE Line Regulation 0 2 85 265 VAC Load Regulation 0 2 10 100 Ripple Voltage 150 mV Meets CISPR 22 Class B TOP204YAI Figure 3 Schematic Diagram of the ST204A Power Supply The T1 bias winding is rectified by D3 and filtered by C4 to create the TOPSwitch bias voltage L2 and Yl safety capacitor C7 attenuate common mode emission currents caused by high voltage switching waveforms on the Drain side of the primary winding and the pr
35. ple the Motorola 5 Watt 1N5333B 1N5388B Zener diode series has a primary thermal conduction path through the 7 2 Thermally Protecting Entire Power Supply TOPSwitch on chip overtemperature protection will protect the entire power supply during overload conditions that are not severe enough to trigger auto restart Clamp Zener diode VR1 and output rectifier D2 must be selected and mounted to withstand overload conditions at high line input long enough for the TOPSwitch junction temperature to reach the Thermal Shutdown Temperature threshold The output rectifier should have slightly better heat sinking compared with TOPSwitch 8 Auto Restart Aluminumelectrolytic auto restart capacitor C5 determines the amountoftime allowed for power supply start up When power is first applied C5 charges to 5 7 Volts before the TOPSwitch MOSFET is enabled and the power supply starts The output voltage must become regulated before C5 discharges from 5 7 V to approximately 4 7 V or TOPSwitch will disable the MOSFET and enter the auto restart mode During auto restart C5 goes through8 charge discharge cycles before the TOPSwitch MOSFET is enabled again for another try C5 may have a series resistor up to 100 Q which has little effect on auto restart Low DC input voltage below 40 V will cause the auto restart timeintervals to increase and auto restart frequency to decrease AC mains voltage is rectified and filtered resulting ina minimum high voltage DC bus
36. pple Voltage 50 mV Meets CISPR 22 Class B DRAIN Mi CONTROL ME SOURCE IN U1 TOP204YAI 2 D2 L1 MUR610CT 19 19 MUR610C 3 3 uH NEC2501 U2 PI 1567 092795 Figure 12 Schematic Diagram of the ST204A Power Supply with Enhanced Bandwidth and Lower Line Frequency Ripple Voltage 13 EMI 13 1 TOPSwitch Advantages Common mode EMI is lower with TOPSwitch because of the Source connected TAB and controlled turn on The TOPSwitch thermal tab is connected to the quiet Source of the output MOSFET The tab of discrete power MOSFET transistors act as antennae broadcasting common mode emissions because the tab is connected to the Drain which is switching at high frequency The discrete MOSFET common 13 2 EMI Filter Topology General EMI filter topology is shown in both the ST202A Figure 2 and ST204A Figure 3 schematics Common mode emission currents are attenuated by common mode choke L2 and Y1 capacitor C7 L2 and C6 attenuate difference mode emission currents due to the fundamental and harmonics of the trapezoidal or triangular current waveform flowing in the transformer primary TOPSwitch MOSFET and C1 Figures 2 mode emissions are even higher when a heat sink is added The TOPSwitch internal MOSFET has a controlled turn on characteristic which determines falling edge dv dt typically 50 ns and further decreases common mode emissions Discrete controller MOSF
37. r in series with optocoupler LED Section 12 1 ncrease size of auto restart compensation capacitor across Control and Source pins ncrease or add resistor in series with auto restart compensation capacitor Section 12 1 Optocoupler current transfer Use optical coupler with CTR between 50 and 200 ratio CTR too high Section 16 ncrease control loop bandwidth Output voltage turns on too Control loop is too slow Add soft start capacitor between 4 7 uF and 47 uF fast or overshoots across error amplifier output or Zener diode Section 14 Control loop bandwidth too low ncrease control loop bandwidth Output voltage line frequency ripple too large Input capacitor too small Increase input capacitor POWER SUPPLIES REGULATED WITH BIAS WINDING FEEDBACK Insufficient gain phase margins ncrease output capacitance Power Supply Oscillates ncrease size of auto restart compensation capacitor Add or increase resistor R3 in series with auto restart compensation capacitor Section 12 1 Output voltage turns on too Control loo p is too slow ncrease control loop bandwidth fast or overshoots Add RC soft start network Section 14 Leakage inductance spike on bias Addresistor in series with bias winding to filterleakage winding inductance spike See DN 8 Change transformer winding order so that primary is first and bias winding is last e On bias winding use parallel oversized diameter wire Poor load regul
38. rimary ringing so that a damping circuit is not necessary Remove secondary RC damping network Proper attention to PC board layout and selection of EMI filter components may eliminate the need for the secondary RC damping network Choose higher current bridge rectifier diodes and common mode choke to reduce power losses due to input current Remove minimum load circuit if application allows Use higher power TOPSwitch with lower R DS ON Add heat sinks to TOPSwitch and output rectifier D2 Refer to AN 19 for more information heat sink located in the moving air path Applications with metal chassis or cold plates require safety insulation beneath the TOPSwitch tab Axial output rectifiers and Zener diodes conduct heat through the mounting leads Thermal impedance can be reduced and power handling improved by mounting axial rectifiers with short leads to wide copper traces on the PC board Thermal impedance through each lead can be different if the die is bonded directly to one lead and connected to the other lead through a bonding wire With vertical mounting the lead with the lowest thermal impedance should be kept very short to minimize device junction temperature A larger T0 220 style diode can also be used with the various heat sinks described above B 6 96 7 1 Heat Sinking continued The clamp Zener diode must also be mounted with very short leads and wide coppertraces for lowest thermal impedance For exam
39. rting again if input energy storage capacitor C1 is not completely discharged and auto restart capacitor C5 is not discharged below the Control pin internal Power Up Reset Voltage Threshold A short delay due to auto restart will be observed when starting after a short interruption in input power The Control pin voltage also has the 8 count hysteretic auto restart waveform whenever the output MOSFET is disabled This includes latching shutdown where the output MOSFET has been latched off When the internal shutdown latch is set the hysteretic waveform on the Control pin will continue until TOPSwitch is reset by removing input power or shorting the Control pin to the Source pin which triggers the internal shutdown latch and turns TOPSwitch off when an overvoltage condition causes the primary bias winding to exceed the DIAC trigger voltage A Zener diode can be used to limit the output voltage as shown in Figure 10 If the optocoupler or secondary reference fails regulation will default to the primary connected Zener for output voltage control B 6 96 10 Current to Duty Cycle Conversion TOPSwitchis a voltage mode device that produces a duty cycle inversely proportional to Control pin current TOPSwitch is not a current mode device Increasing Control pin current will linearly decrease the duty cycle down to the minimum duty cycle value Further increases in Control pin current will have no effect on the duty cycle until reaching
40. ted output voltage V og of 60 V or less Some applications can benefit by designing for slightly lower reflected output voltage V pg to reduce voltage stress when operating at high line The transformer turns ratio is given below where N is the primary number of turns N is the secondary number of turns Voris the reflected output voltage V is the output voltage and Vpis the diode forward voltage Ng 2s Non Ne Va EV Turns ratio curves derived from the above equation are shown in Figure 7 for reflected output voltages of 60 V and 135 V V is assumed to be 0 7 V DIODE 40 PI 1904 061296 20 Turns Ratio 0 5 10 15 20 25 30 Output Voltage V Figure 7 Transformer Turns Ratio for Various Minimum DC Input Voltages and Duty Cycles B 6 96 6 Optimizing Power Supply Efficiency Efficiency is typically greater than 8096 for most TOPSwitch power supplies above 10 Watts Efficiency can be enhanced to as high as 9096 with the following changes Design for higher output voltage up to 30 Volts For example if a choiceis available between output voltages of 12 and 15 Volts the 15 Volt design will have better efficiency Use Schottky output rectifiers Universal input voltage operation will require a transformer designed for 135 V reflected output voltage V to keep secondary voltage stress below Schottky rectifier breakdown rating Increase transformer primary inductance for continuo
41. the voltage spike caused by transformer leakage inductance to a safe value and reduce ringing at the Drain of U1 The power secondary winding is rectified and filtered by D2 C2 L1 and C3 to create the 5V output voltage The bias winding is rectified and filtered by D3 R1 and C5 to create a bias voltage to the TOP200 C5 also filters internal MOSFET gate drive charge current spikes on the Control pin determines the auto restart frequency and together with R1 compensates the control loop CIRCUIT PERFORMANCE Load Regulation 4 0 10 to 100 Line Regulation 1 2 95 to 370 V DC Ripple Voltage 25 mV PI 1267 010595 Figure 1 Schematic Diagram of the ST200 Minimum Parts Count 5V 5W Bias Supply e B 6 96 2 2 ST202A General Circuit Description The ST202A is a low cost isolated Buck Boost or flyback switching power supply using the TOP202 integrated circuit The circuit shown in Figure 2 produces a 7 5 V 15 W power supply that operates from 85 to 265 VAC input voltage The 7 5 V output is directly sensed by optocoupler U2 and Zener diode VR2 The output voltage is determined by the Zener diode VR2 voltage andthe voltage drops across the optocoupler U2 photodiode and resistor R1 Other output voltages are also possible by adjusting the transformer turns ratios and value of Zener diode VR2 AC power is rectified and filtered by BR1 and C1 to create the high voltage DC bus applied to the primary winding of
42. timing intervals will decrease and auto restart frequency will increase significantly In optocoupler feedback such as the ST204A in Figure 3 and the ST202A in Figure 2 series resistor R1 determines loop gain Theinitial value of R1is selectedusing the following 596 Rule with the power supply operating at nominal line and full load conditions the average voltage across R1 should be approximately 5 of the output voltage To help compensate the control loop R1 can be increased above the 5 value to reduce loop gain In optocoupler circuits which use a Zener diode such as the ST202A circuit in Figure 2 reducing R1 below the 5 value will improve load regulation but will also increase loop gain Stability can be examined with a step load change applied to the power supply output A current step from 75 to 100 of rated output current is normally used The voltage response is observed for settling time and damping In primary bias power supplies the bias voltage should be tested separately with a step load change of 25 typically 1 mA AnLC postfilter effectively reduces output switching frequency ripple voltage and high frequency noise but can cause circuit instability due to additional phase shift The ST202A power supply Figure 2 shows the proper connection for simple 12 2 TOPSwitch Circuit with Enhanced Bandwidth Simple circuit improvements reduce output voltage line frequency ripple and improve transient response in TOPSwit
43. us mode operation to reduce TOPSwitch RMS current and conduction powerloss Figure 6a shows the trapezoidal continuous mode Drain current waveform The ripple current to peak current ratio K has a practical lower limit of 0 4 0 6 for 230 VAC input To maintain control loop stability when operating in the continuous mode output capacitor size or compensation circuitry may need to change 7 Thermal Design 7 1 Heat Sinking TOPSwitch clamp Zener diode VR1 and output rectifier D2 are thecritical power bearing components Temperature data should be taken on each of these three components at rated load current and input voltage in the mechanical package used for the actual application Excessive component temperature can be reduced by selecting components with higher rating using mounting techniques with better heat transfer or adding heat sinks Heat sinking TOPSwitch is very simple The TO220 tab is simply attached directly to the heat sink using a screw bolt or clip Power supplies in plastic enclosures usually require a simple non safety isolated sheet metal stamped heat sink mounted along the edge of the PC board to transfer heat to the inside wall of the enclosure In forced air applications TOPSwitch is also directly attached to a non safety isolated free standing Reduce transformer leakage inductance with split primary winding Remove primary RC damping networks A properly designed primary clamp circuit will reduce p
44. voltage rectifier with areverse recovery timet of less than 75 nS and breakdown voltage rating of 400V for TOPIXX series and 600V for TOP2XX series Zener diode VR1 must have sufficient power handling capability in both transient and steady state operation VR1 should be selected such that clamp voltage is approximately 1 5 times higher than reflected output BLOCKING DIODES General Motorola Instrument TOP100 BYV26B MUR140 UF4004 TOP101 BYV26B MUR140 TOP102 BYV26B MUR140 Tos ewes Oooo Toms wat TOP200 BYV26C MUR160 UF4005 TOP201 BYV26C MUR160 UF4005 115 VAC voltage Vor Vor should be 60 V or less for TOP1XX devices and 135 V or less for TOP2XX devices For all TOPSwitch power and peak current levels the low cost 5 Watt POKE91 P6KE200 Zener diode transient voltage suppressor series can be used and is available from Motorola and SGS Thomson Transient voltage suppressor Zener diode thermal impedance and steady state power dissipation capability depend heavily on lead diameter which should be between 0 037 and 0 043 inch Other manufacturers including General Instrument and Fagor make parts with identical part numbers but due to smaller lead diameter have lower effective thermal impedance and less steady state power dissipation capability The 1 5 Watt 1N5956 200 V Zener diode is sufficient for lower power and lower peak drain current levels below 600 mA and are availab
45. y Circuits The following three isolated power supplies will be used as examples in the text that follows The ST200 Figure 1 is a simple absolute minimum part count 5V 5W isolated bias supply using the TOP200 that operates from a high voltage DC bus The ST202A Figure 2 is a universal AC input 7 5V 15 2 1 ST200 General Circuit Description The ST200 is a low cost DC input isolated Buck Boost or flyback switching power supply using the TOP200 integrated circuit The circuit shown in Figure 1 produces a5 V 5 W power supply that operates from 95 to 370 VDC input voltage The 5 V output is indirectly sensed by the primary bias winding The output voltage is determined by the TOPSwitch control pin voltage typically 5 7V the voltage drops of rectifiers D2 and D3 and the turns ratio between the bias winding and output winding of T1 Other output voltages are also possible by adjusting the transformer turns ratios The high voltage DC bus is applied to the primary winding of VR1 MV 1N4764 D1 UF4005 U1 TOP200YAI Watt power supply using the TOP202 and demonstrates low cost optically coupled feedback control The ST204A Figure 3 isauniversal AC input 15V 30 Watt power supply using the TOP204 and features improved output voltage accuracy and regulation with optically coupled feedback control T1 The other side of the transformer primary is driven by the integrated high voltage MOSFET within the TOP200 D1 and VRI clamp
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