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X64 Xcelera-LVDS PX4 User's Manual

1. Camera Camera bit 0 gt bito bit 0 gt bito bit 1 gt bit1 bit 1 gt bit 1 bit 2 gt bit 2 bit 2 bit2 J12 Tap 1 bit 3 bit3 J12 Tap 3 bit 3 gt bit3 bit4 gt bit4 Connector 1 tap 1 bit 4 bit4 Connector 2 tap 3 bit 5 gt bit5 bit 5 bit5 bit 6 gt bit 6 bit 6 gt bit 6 bit 7 H bit 7 bit 7 H bit 7 X64 Xcelera LVDS PX4 X64 Xcelera LVDS PX4 bit 0 gt bito bto bit 0 bit 1 gt bit 1 bt bit 1 bit 2 gt bit2 J12 bi bit2 J12 Tap2 bit3 gt bit 3 bits bit 4 gt pita Connector 1 tap 2 bit4 4 9 pita connector 2 tap 4 bit 5 gt bit5 bit5 bit5 bit 6 gt bit6 bit 6 bit 7 gt bit 7 bit 1 bit7 Programmable Control Signals If the camera has four channels or taps that output 8 bits per pixel Connect the camera channel tap 1 to the 8 bit data port Tap 1 on input connector 1 Connect the camera channel tap 2 to the 8 bit data port Tap 2 on input connector 1 Connect the camera channel tap 3 to the 8 bit data port Tap 3 on input connector 2 Connect the camera channel tap 4 to the 8 bit data port Tap 4 on input connector 2 X64 Xcelera LVDS PX4 User s Manual Installing X64 Xcelera LVDS PX4 23 One Camera
2. X64 Xcelera LVDS PX4 PCle 4X Connector Switch Jumper Description List The following table lists components on the X64 Xcelera LVDS PX4 board Detailed information follows for connectors or switches the end user may have need of Location Description Location Description J2 LVDS connector 3 and 4 Jil X I O Module Interface J12 LVDS connector 1 and 2 J13 PC power to camera interface J3 External Signals connector J6 Reserved J10 J2000 J14 Multi Board Sync SW4 SW5 SW3 Configuration micro switches 84 e Technical Specifications X64 Xcelera LVDS PX4 User s Manual Connector and Switch Specifications The following section provides the technical reference for user set configuration switches and camera connection details Configuration Micro switches Three sets of 4 switches are used for user configurations not controlled by software The following figure is a typical view of each switch set shown with the individual switch set in the OFF position Following the figure each of the three switch sets is described Refer to the board component layout for their positions ON OFF 1 2 3 4 SWI SW2 SW3 Component View SW General Inputs Signal Logic Threshold Level For each general input select the threshold voltage detected as a logic high signal See Note 1 General Inputs Specifications
3. asas 42 Symptoms Card grabs block 43 Symptoms Card acquisition bandwidth is less than expected 43 CAMEXPERT QUICK START 45 INTERFACING CAMERAS WITH CAMENXPERT eene eene 45 CamExpert Example with a Monochrome Camera see 45 CamExpert Demonstration and Test Tools 47 Camera Files Distributed with Sapera seen 48 Overview of Sapera Acquisition Parameter Files ccf or cca cvi 48 Camera Interfacing Check Lier 50 USING THE FLAT FIELD CORRECTION TOOL n eee 50 X64 Xcelera LVDS PX4 Flat Field Support 50 Set up Dark and Bright Acquisitions with the Histogram Tool sss 51 Flat Field Correction Calibration Procedure sse 53 Using Flat Field Correction sse eene 54 SAPERA DEMO APPLICATIONS 55 GRAB DEMO 55 USING tlie Grab Demetr ea treten indeed eats 55 FLAT FIELD DEMO OVERVIEW as etstceboietectss etre Ut quitte 57 ii e Contents X64 Xcelera LVDS PX User s Manual Using the Flat Field Demo 27 X64 XCELERA LVDS PX4 REFERENCE 59 FULL BLOCK DIAGRAM issccsccsssscesscsucececsucsessucecsccussvsusacaveucussususacasusarsusucavsscavatsnsaseveusavanees 59 ACQUISITION TIMO 60 LINE TRIGGER SOURCE SELECTION FOR LINE SCAN APPLICATIONS 61
4. 118 Opto coupled Input Electrical Details 119 T TLInputElectrical Details ga ite e ed wa quqa dau 119 X I O MODULE SAPERA INTERFACE ceres o ee ent enne enne nenne nnn nnn ern senes nnns 120 Configuring User Defined Power up I O States 120 Using Sapera LT General I O Demo 121 Sapera LT General I O Demo Code 5 123 CONTACT INFORMATION 127 tee 127 TECHNICAL 128 GLOSSARY TERMS 129 INDEX 133 iv e Contents X64 Xcelera LVDS PX4 User s Manual X64 Xcelera LVDS PX4 Overview Product Part Numbers X64 Xcelera LVDS PX4 Board Item Product Number X64 Xcelera LVDS PX4 with 128 MB of memory OR X4L0 XPX00 X I O Module optional provides an additional 8 input amp 8 output general I Os 001 5 00 see Appendix X I O Module Option page 113 For OEM clients this manual in printed form is available on request OC X4LM USERO X64 Xcelera LVDS PX4 Software Item Product Number Sapera LT version 6 10 or later required but sold separately OC SL00 0000000 1 Sapera LT Provides everything you will need to build your imaging application 2 Current Sapera compliant board hardware drivers 3 Board and Sapera documentation compiled HTML help and Adobe Acrobat PDF formats optional Contact Sales at Sapera Processing Imaging Development Librar
5. PRM EXT LINE TRIGGER SOURCE Parameter Values Specific to the X64 CL series sse eene 61 SHAFT ENCODER INTERFACE TIMING 63 VIRTUAL FRAME RESET FOR LINE SCAN CAMERAN 64 ACQUISITION METHODS piper terere nn 66 SUPPORTED EVENTS a dio notato 66 LUT AVAILABILITY irri 68 X64 XCELERA LVDS 4 SUPPORTED PARAMETERS Y 69 Camera Related EE 69 Camera Related Parameters a 70 VIC Related Parameters emer rere reet eret eret eter eter erue 74 ACO Related Parameters iai se etre dee Ri ed C RR BONES 77 MEMORY ERROR WITH AREA SCAN FRAME BUFFER ALLOCATION eee 78 SAPERA SERVERS amp RESOURCES 79 SERVERS AND RESOURCES Za RE 79 TRANSFER RESOURCE 79 TECHNICAL SPECIFICATIONS 81 X64 XCELERA LVDS PX4 BOARD SPECHIPICATIONS 40 4 0 01 01 04 00 021 81 HOST SYSTEM REQUIREMENTS EE 82 PRT 83 CONNECTOR AND SWITCH LOCATIONS eee ee e een en een en nennen 84 X64 Xcelera LVDS PX4 Board Layout Drawing esse 84 Connector Switch Jumper Description List 84 CONNECTOR AND SWITCH ener 85 Configuration Micro switches
6. SSTr g D cQcSoS S NIPRL J2 connectors 3 amp 4 connector 4 tap 7 amp 8 X64 Xcelera LVDS PX4 connector 1 tap 1 amp 2 uU 1 J J12 connectors 1 amp 2 connector 2 tap 3 amp 4 Camera Camera 0 gt bito _ gt bitO bit bit 1 bit 1 gt sti bt2 bit 2 bit2 bit2 bit 3 bi J12 bit 3 bit 3 J12 bt4 4 9 pita connector 1 tap 1 bt4 gt pita connector 2 tap 3 ke bitS5 bit 5 N bitS5 bit5 bte pit6 bite pit6 2 bit bit7 bit bit 7 64 Xcelera LVDS PX4 X64 Xcelera LVDS PX4 bit 8 gt bito bit 8 gt bn 2 bito gt bii 2 bito gt piti E J12 d J12 connector 1 tap 2 connector 2 tap 4 Programmable Control Signals Camera Camera 0 bit D bit 0 DI bit 1 DI bit 1 bit2 bt2 J2 bit 2 bt2 J2 tech bit3 1 bita connector tap 5 bt4 gt 4 Connector 4 tap 7 eo bit5 bit5 i bt5 bit 5 bit 6 bit 6 bit bit7 bit bit7 5 64 Xcelera LVDS PX4 5 X64 Xcelera LVDS PX4 x bit 8 m bito RG bit 8 gt bit 0 2 bit 9 bit 4 E bit 9 bit 1 J2 J2 connector 3 tap 6 con
7. Snap ka Ha J E k Display Position x 470 y 281 Value 0000 Frame sec Resolution 1024 Pixels x 480 Lines Monochrome 8 bit lt m Output Messages x 14 42 53 Xcelera LVDS PX4 1 Digital Mono 1 14 51 49 Xcelera LVDS_PX4_1 Image Width in Pixels value was changed from 640 to 1024 14 51 49 Xcelera LVDS_PX4_1 Camera file C DALSA Sapera camfiles D_SP 1x1k40 cca loaded Output Messages Video status Pixel Clock Not Present Line Valid Not Present 46 e CamExpert Quick Start X64 Xcelera LVDS PX4 User s Manual The CamExpert sections are Device Select which acquisition device to control and configure a camera file Required in cases where there are multiple boards in a system and when one board supports multiple acquisition types Note in this example the X64 Xcelera LVDS 4 has firmware for monochrome or RGB cameras e Camera Select the timing for a specific camera model included with the Sapera installation unless a new camera type is used The User s subsection is where created camera files are stored e Timing amp Control Parameters The central section of CamExpert provides access to the various Sapera parameters supported by X64 Xcelera LVDS PX4 There are four or five tabs dependent on the acquisition board as described below Basic Timing Parameters Basic parameters used to define the timing of the camera This inc
8. 38 39 40 108 e Technical Specifications X64 Xcelera LVDS PX4 User s Manual External Signals Connector Bracket Assembly Type 2 The External Signals bracket OR X4CC 0TIO2 provides a simple way to bring out the signals from the External Signals Connector J3 to a bracket mounted DB25 Connect external cables designed for the DALSA X64 CL iPro directly Install the bracket assembly into an adjacent PC expansion slot and connect the free cable end to the board s J3 header When connecting to J3 make sure that the cable pin 1 goes to J3 1 see the layout drawing X64 Xcelera LVDS PX4 Board Layout Drawing on page 84 Note For additional independent I O signals use the optional X I O module See Appendix X I O Module Option on page 113 External Signals Connector Bracket Assembly Type 2 Drawing Pin 1 Se DB25 Femal Header 40 Pin mounted Female bracket Flat cable 12 Connector is notched for one way insertion External Signals Connector Bracket Assembly Type 2 Pinout The following table defines the signal pinout on the DB25 connector Refer to the table J3 External Signals Connector on page 101 for signal descriptions X64 Xcelera LVDS PX4 User s Manual Technical Specifications 109 DB25 Pin Number Signal J3 Connector Pin Number 6 External Trigger Input 0 19 19 External Trigger
9. Important In this example the average pixel value for the frame is bright gray Also note that sensors may show a much higher maximum or a much lower minimum pixel value due to one or more hot or dead pixels The sensor specification accounts for a small number of hot stuck or dead pixels pixels that do not react to light over the full dynamic range specified for that sensor Once the bright gray acquisition setup is done note the camera position and lens iris position to be able to repeat it during the calibration procedure 52 CamExpert Quick Start X64 Xcelera LVDS PX4 User s Manual Flat Field Correction Calibration Procedure Calibration is the process of taking two reference images one of a black field one of a light gray field not saturated to generate correction data for images captured by the sensor Each captured pixel data is modified by the correction factor generated by the calibration process so that each pixel now has an identical response to the same illumination Start the Flat Field calibration tool via the CamExpert menu bar Pre Processing Flat Field Correction Calibration Flat Field Calibration Window The Flat Field calibration window provides a three step process to acquire two reference images and then save the flat field correction data for the camera used To aid in determining if the reference images are valid use the histogram tool to review the images used for the correction data
10. PCI Express 4X Controller X64 Xcelera LVDS PX4 Full Simplified Block Diagram Host PCI Express 4X or greater Slot X64 Xcelera LVDS PX4 User s Manual X64 Xcelera LVDS PX4 Reference e 59 Acquisition Timing DATA X first last Ga P DATA LVALIFVAL setup time Minimum 1015 eee EE sync gt FVAL SS ee B act 7 setup times for DATA LVAL and FVAL the same signals must be high and stable before the rising edge of the Pixel Clock Sampling can also be done on the falling edge of the Pixel Clock when selecting the appropriate firmware Pixel Clock must always be present Data is sampled on rising edge default firmware or on falling edge optional firmware LVAL must be active high to acquire camera data Minimum of 1 Horizontal Blanking Vertical Blanking Minimum 4 clock cycles Minimum 1 line Maximum no limits Maximum no limits First Active Pixel unless otherwise specified in the CCA file Horizontal Back invalid x where x defines the number of pixels to be skipped Last Active Pixel defined in the CCA file under Horizontal active y where is the total number of active pixels per tap Maximum Valid Data 8 bits pixel x 256K Pixels line LVAL 16 bits pixel x 128K Pixels line LVAL 32 bits pixel x 64K Pixels line LVAL 64 bits pixel x 32K Pixels l
11. eese 85 X64 Xcelera LVDS PX4 End Bracket ien 87 J12 Dual 68 Pin VHDCI Connectors esses 88 J12 Connector 1 Monochrome 1 amp 2 Pinot 88 J12 Connector 2 Monochrome Tap 3 amp 4 Pinot 90 J12 Connector 1 RGB 24 amp RGB 30 Pinot 93 J12 Connector 2 RGB 24 amp RGB 30 Pinot 95 J2 Dual 68 Pin VHDCI Connectors essere 96 J2 Connector 3 Monochrome 5 amp 6 Pinot 96 J2 Connector 4 Monochrome Tap 7 amp 8 Pinon 98 J3 External Signals Connector eese eene 101 External Signals Connector Bracket Assembly Type 1 sese 107 External Signals Connector Bracket Assembly Type 2 aaa 109 J14 Board MT 111 X64 Xcelera LVDS PX4 User s Manual Contents iii APPENDIX X I O MODULE OPTION 113 X I O MODULE OVERVIEW i cscesccesscesceisacsaceccnesadecdesnaseecoeneseddeucasedcoudadeadsceadeeceevadaddndeases 113 X I O Module Connector List amp Locations 114 X I O MODULE INSTALLATION 4 2 eintritt retreat 114 Board Installation esed tates iei v or e PEU 115 X64 Xcelera LVDS PX4 and X I O Driver Update 115 X I O MODULE EXTERNAL CONNECTIONS TO THE D I 115 DB37 Pinout Description is on rodeo bte ged 116 Outputs in NPN Mode Electrical Details see 117 Outputs in PNP Mode Electrical
12. Flat Field Correction No Image to display a histogram from 1000 800 600 400 200 04 T T T T T T T 1 0 32 64 128 160 192 224 255 Histogram Selector image available xl Generation of Calibration files Step 1 Acquire a black image We recommend an average gray level pixel value below 64 Step 2 Acquire a white image We recommend an average gray level pixel value above 64 Waring Pixels in image must not be staturated Step 3 Save Calibration offset and gain files Optional Advanced calibration settings Optional Advanced Settings Ready for calibration Close e Setup the camera to capture a uniform black image Black paper with no illumination and the camera lens iris closed to minimum can provide such a black image X64 Xcelera LVDS PX4 User s Manual CamExpert Quick Start 53 e Click on Acquire Black Image The flat field demo will grab a video frame analyze the pixel gray level spread and present the statistics The desired black reference image should have pixel values less then 20 If acceptable select the image as the black reference e Setup the camera to acquire a uniform white image but not saturated white Use even illumination on white paper or a diffused light aimed at the camera to acquire an image with a gray level of 128 minimum It is preferable to prepare for the white level calibration before the c
13. Latency oxo0 ia gus add 0 Sbit 1 00 04252071 EC Device ID 02520 Intine 0 10 Grant 0 00 C 16 bit 004 0400100006 a 0x08 gt 0 05800001 SubVendlD 050004 IntPin 0501 Max Lat 000 c emi Ox0C 0500000010 E SubsystlD 9 0001 Line size 0 10 Class Code f0x058000 Edi Command Header type 00006 SERR Wait PE veaj Mw SpC BM Mem 10 Det Status BIST 090010 SE saj fat B28 use 66 2 BIST capable Base address registers Expansion ROM e es Enabled 0 000000 to OxFOSFFFFF Mem Pre 64 bit View 1 Pre 64 bit View bridge Diagnostic 2 1 0 Primary Bus 1 Save 3 0 Second Bus See DRESA a Subord Help 5 F c 120 Pe Bridge 2 Clicking on Diagnostic button opens new window with the diagnostic report From PCI Bus Number drop menu select the bus number associated with the X64 Xcelera LVDS PX4 in this example the slot is bus 2 The window now shows the I O and memory ranges used by each device on the selected PCI bus The information display box will detail any PCI conflicts If there is a problem click on the Save button A file named pcidiag txt is created in the Sapera bin directory with a dump of the PCI configuration registers Email this file when requested by the DALSA Technical Support grou
14. bit2 J2 bit2 bit2 J2 bits bits bits bit 3 bit gt pita Connector tap 5 bit4 pita connector 4 tap 7 1 bpit5 5 bit 5 bt6 bit 6 bp bit 6 bt7 bit7 bit7 bit 7 X64 Xcelera LVDS PX4 X64 Xcelera LVDS PX4 bit 0 bit 0 bt0 L h bit 0 bit 1 gt bit 1 bit 1 1 bit 1 bit 2 H bit2 bit2 bit2 Tap2 bit3 gt bit3 2 bits bit3 ue bit 4 gt pita Connector tap 6 4 pita connector 4 tap 8 bit 5 gt bit5 bb bit5 bit 6 gt bit6 bp bit6 bit 7 H bit7 bt7 bit 7 24 e Installing X64 Xcelera LVDS PX4 X64 Xcelera LVDS PX4 User s Manual If the camera has eight channels or taps that output 8 bits per pixel Connect the camera channel tap 1 to the 8 bit data port Tap 1 on input connector 1 Connect the camera channel tap 2 to the 8 bit data port Tap 2 on input connector 1 Connect the camera channel tap 3 to the 8 bit data port Tap 3 on input connector 2 Connect the camera channel tap 4 to the 8 bit data port Tap 4 on input connector 2 Connect the camera channel tap 5 to the 8 bit data port Tap 5 on input connector 3 Connect the camera channel tap 6 to the 8 bit data port Tap 6 on input connector 3
15. CORACQ VAL ACTIVE LOW 0x1 CORACQ VAL ACTIVE HIGH 0x2 CORACQ PRM CAM TRIGGER DURATION 1 us 65535000 us step 1 us CORACQ PRM CAM RESET METHOD CORACQ VAL CAM RESET METHOD 1 0 1 CORACQ PRM CAM RESET POLARITY CORACQ VAL ACTIVE LOW 0x1 CORACQ VAL ACTIVE HIGH 0x2 CORACQ PRM CAM RESET DURATION min 1 us max 65535000 us step us CORACQ PRM CAM NAME Default Area Scan CORACQ PRM LINE INTEGRATE METHOD CORACQ PRM LINE TRIGGER METHOD CORACQ VAL LINE INTEGRATE METHOD 1 0x1 CORACQ VAL LINE INTEGRATE METHOD 2 0x2 CORACQ VAL LINE INTEGRATE METHOD 3 0x4 CORACQ VAL LINE INTEGRATE METHOD 4 0x8 CORACQ VAL LINE INTEGRATE METHOD 7 0x40 CORACQ VAL LINE TRIGGER METHOD 1 0x1 CORACQ PRM LINE TRIGGER POLARITY CORACQ PRM LINE TRIGGER DELAY CORACQ VAL ACTIVE LOW 0x1 CORACQ VAL ACTIVE HIGH 0x2 min 0 us 65535 us step 1 us CORACQ PRM LINE TRIGGER DURATION min 0 us 65535 us step us monochrome color RGB CORACQ PRM TAPS min 1 max 16 tap step 1 tap min tap max 4 tap step tap CORACQ PRM TAP OUTPUT CORACQ VAL TAP OUTPUT ALTERNATE 0x1 CORACQ VAL TAP OUTPUT SEGMENTED 0x2 CORACQ VAL TAP OUTPUT PARALLEL 0x4 CORACQ PRM TAP 1 DIRECTION CORACQ VAL TAP DIRI ECTION LR 0x1 CORACQ VAL TAP DIRECTION RL 0x2 CORACQ VAL TAP DIR CORACQ VAL TAP DIR CORACQ VAL TAP DIR
16. CORACQ VAL TAP DIR CORACQ VAL TAP DIR ECTION UD 0x4 ECTION DU 0x8 ECTION FROM TOP 0x10 ECTION FROM MID 0x20 ECTION FROM BOT 0x40 CORACQ PRM TAP 2 DIRECTION CORACQ VAL TAP DIRI ECTION LR 0x1 CORACQ VAL TAP DIRECTION RL 0x2 CORACQ VAL TAP DIR CORACQ VAL TAP DIR CORACQ VAL TAP DIR CORACQ VAL TAP DIR CORACQ VAL TAP DIR ECTION UD 0x4 ECTION DU 0x8 ECTION FROM TOP 0x10 ECTION FROM MID 0x20 ECTION FROM BOT 0x40 CORACQ PRM TAP 3 DIRECTION CORACQ VAL TAP DIRI ECTION LR 0x1 CORACQ VAL TAP DIRECTION RL 0x2 CORACQ VAL TAP DIR CORACQ VAL TAP DIR CORACQ VAL TAP DIR CORACQ VAL TAP DIR CORACQ VAL TAP DIR ECTION UD 0x4 ECTION DU 0x8 ECTION FROM TOP 0x10 ECTION FROM MID 0x20 ECTION FROM BOT 0x40 X64 Xcelera LVDS PX User s Manual X64 Xcelera LVDS PX4 Reference e 71 PRM 4 DIRECTION CORACQ VAL TAP DIRECTION LR 0x1 CORACQ VAL TAP DIRECTION RL 0x2 CORACQ VAL TAP DIR CORACQ VAL TAP DIR CORACQ VAL TAP DIR CORACQ VAL TAP DIR CORACQ VAL TAP DIR ECTION UD 0x4 ECTION DU 0x8 ECTION FROM TOP 0x10 ECTION FROM MID 0x20 ECTION FROM BOT 0x40 CORACQ PRM TAP 5 DIRECTION monochrome only CORACQ VAL TAP DIRECTION LR 0x1 CORACQ VAL TAP DIRECTION RL 0x2 CORACQ VAL TAP DIR CORACQ VAL TAP DIR CORACQ VAL TAP DIR CORACQ VAL TAP DIR CORACQ VAL TAP DIR ECTION UD 0x4 ECTION DU 0x8 ECTION FR
17. Connect the camera channel tap 7 to the 8 bit data port Tap 7 on input connector 4 Connect the camera channel tap 8 to the 8 bit data port Tap 8 on input connector 4 One Camera 24 bit RGB connector 1 2 Blue amp Green data plus controls J2 connectors 3 amp 4 M connector 2 N X64 Xcelera LVDS PX4 Red data J12 connectors 1 amp 2 Camera Camera bit 0 bit O bit 0 gt bit 1 gt bit 1 bit 1 gt DI bit 2 gt bit 2 bit 2 gt bit 2 BLUE des J12 connector 1 RED pits J12 connector 2 channel pit 4 gt pita Blue data 8 bit channel pit4 gt pita Red data 8 bit bit 5 bit5 bit 5 gt bit5 bit 6 gt bite bit 6 gt bit6 bit 7 gt bit 7 bit 7 H bit 7 X64 Xcelera LVDS PX4 X64 Xcelera LVDS PX4 bit 0 gt bit 0 bit 1 gt bit 1 bit 2 gt bit 2 GREEN pita gt 012 J12 connector 1 channel pit 4 gt pita Green data 8 bit bit 5 gt bit 5 bit 6 gt bit 6 bit 7 gt bit 7 44 Programmable Control Signals X64 Xcelera LVDS PX4 User s Manual Installing X64 Xcelera LVDS PX4 e 25 If the camera outputs RGB 24 bit data Connect the camera Blue data to input connector 1 Connect the camera Green data to input connector 1 Connect the camera Red d
18. Eight 8 bit Channels or Taps UR connector 3 tap 5 amp 6 B gt J2 connectors 3 amp 4 connector 4 tap 7 amp 8 X64 Xcelera LVDS PX4 connector 1 tap 1 amp 2 J12 connectors 1 amp 2 connector 2 tap 3 amp 4 Camera Camera b gt 0 bt bit 1 bt bit 1 bt2 bit 2 bit2 bit 2 Tap1 bits j gt bit J12 bits bit3 ove bit4 j gt pita connector 1 tap 1 gt pita connector 2 tap bits gt bit5 bit5 r bit 5 bt6 1 4 bit6 bp bit 6 bit 7 bit7 bit7 bit 7 X64 Xcelera LVDS PX4 X64 Xcelera LVDS PX4 bitO bit 0 bit 0 gt bit 0 bit gt bit1 bit 1 gt bit 1 bt2 bit2 gt bit 2 Tap2 bits bit3 pia Tap4 bit3 gt bit3 Jie bt4 pita Connector 1 tap 2 bit 4 gt Connector 2 tap 4 bit 5 bpit5 bit 5 gt bit5 bit 6 bit 6 bit 6 gt bit 6 7 bit7 bit 7 gt bit7 Programmable Control Signals Camera Camera bit 0 bito bit0 bit 0 bit 1 c bit 1 bti gt bit 1 bit2
19. Synchronization Minimums Base Board Memory Scanning Max Data Rate Pixel Format Basic Post processing Controls Connectors X64 Xcelera LVDS PX4 User s Manual Half length PCIe x4 card compliant with PCIe Rev 1 1 Interfaces to LVDS EIA 644 type cameras Up to 8 tap support Area scan and Line scan Pixel clock rate from 1 Hz up to 85 MHz Compliant with DALSA Trigger to Image Reliability framework Horizontal size 8 bytes to 256 Kbytes Vertical size 1 line to infinite for Line Scan 1 line to 16 million lines in area scan Support variable frame length up to 16 million lines Horizontal Sync minimum Vertical Sync minimum 128 MB 4 pixels 1 line Integrated advanced tap reversal engine allows independent tap formatting Progressive multi tap multi channel tap reversal 640 MB sec 12 14 16 bit 4 taps 85MHz any tap configuration 8 bit 8 taps at 85 MHz at any tap configuration Support LVDS tap configuration for 8 10 12 14 and 16 bit mono 24 30 36 42 48 bit RGB LUT available see LUT Availability for details 1 x 8 10 12 bit in 8 10 12 bit out monochrome 3 x 8 10 12 bit in 8 10 12 bit out for RGB Real time Flat field flat line shading correction supported in hardware Compensates for sensor defects such as FPN PRNU defective pixels and variations between pixels due to the light refraction through a lens Shading effect Comprehensive event notification Timing control l
20. 2 is for camera Taps 3 and 4 e Connector 3 is for camera Taps 5 and 6 e Connector 4 is for camera Taps 7 and 8 Status LEDs Functional Description Status LED 1 Red No camera connected or camera has no power Green Camera connected and is ON Camera clock detected No line valid detected Slow flashing green 2 Hz Camera Line Valid signal detected Fast flashing green 16 Hz Acquisition in progress Status LED 2 Off Board initialization good Red Board initialization error on computer boot up X64 Xcelera LVDS PX4 User s Manual Technical Specifications 87 J12 Dual 68 Pin VHDCI Connectors Camera interface J12 consists of two VHDCI connectors refer to the connector bracket view X64 Xcelera LVDS PX4 End Bracket View on page 87 Connector 1 is for camera taps 1 and 2 while connector 2 is for camera taps 3 and 4 J12 Connector 2 camera tap 3 amp 4 70 J12 Connector 1 camera tap 1 amp 2 All signals support RS 644 LVDS High voltage Low voltage minimum differential threshold 100mV Maximum common mode voltage 5 V Maximum Input Current 10mA Typical connector part number Honda HDRA E68W1LFDT1EC SL J12 Connector 1 Monochrome Tap 1 amp 2 Pinout Camera taps 1 and 2 12 Connector 1 Name Description VHDCI Pin Number 1 DINa_0 Input BitO Tap 1 35 DINa 0 Input BitO Tap 1 2 DINa 1 Input Bitl Tap 1 36 DINa_
21. CORACQ PRM TAP 15 DIRECTION monochrome only CORACQ VAL TAP DIRECTION LR 0x1 CORACQ VAL TAP DIRECTION RL 0x2 CORACQ VAL TAP DIR CORACQ VAL TAP DIR CORACQ VAL TAP DIR CORACQ VAL TAP DIR CORACQ VAL TAP DIR ECTION UD 0x4 ECTION DU 0x8 ECTION FROM TOP 0x10 ECTION FROM MID 0x20 ECTION FROM BOT 0x40 CORACQ PRM TAP 16 DIRECTION monochrome only CORACQ VAL TAP DIRECTION LR 0x1 CORACQ VAL TAP DIRECTION RL 0x2 CORACQ VAL TAP DIR CORACQ VAL TAP DIR CORACQ VAL TAP DIR CORACQ VAL TAP DIR CORACQ VAL TAP DIR ECTION UD 0x4 ECTION DU 0x8 ECTION FROM TOP 0x10 ECTION FROM MID 0x20 ECTION FROM BOT 0x40 CORACQ PRM TIMESLOT CORACQ VAL TIMESLOT 1 0x1 CORACQ VAL TIMESLOT 2 0x2 CORACQ PRM CAM CONTROL DURING READOUT TRUE FALSE CORACQ PRM CAMERA POWER CORACQ VAL CAMERA POWER EXTERNAL 0x1 VIC Related Parameters Parameter Values CORACQ PRM CAMSEL CAMSEL MONO from 0 to 0 CAMSEL COLOR not available CAMSEL YC not available CAMSEL RGB from 0 to 0 CORACQ PRM DC REST MODE CORACQ VAL DC REST MODE AUTO 0x1 CORACQ PRM CROP LEFT min 0 pixel max 16777215 pixel step 16 pixel CORACQ PRM CROP TOP min 0 line max 16777215 line step 1 line CORACQ PRM CROP WIDTH min 16 pixel max 16777215 pixel step 16 pixel CORACQ PRM CROP HEIGHT min 1 line max 16777215 line step 1 line CO
22. Card grabs black on page 43 Symptoms Card acquisition bandwidth is less than expected on page 43 36 Troubleshooting Installation Problems X64 Xcelera LVDS PX4 User s Manual Troubleshooting Procedures The following sections provide information and solutions to possible X64 Xcelera LVDS PX4 installation and functional problems A summary of these topics is in the previous section of this manual Checking for PCI Bus Conflicts One of the first items to check when there is a problem with any PCI board is to examine the system PCI configuration and ensure that there are no conflicts with other PCI or system devices The PCI Diagnostic program epcidiag exe allows examination of the PCI configuration registers and can save this information to a text file Run the program via the Windows Start Menu shortcut Start Programs DALSA Sapera LT Tools PCI Diagnostics As shown in the following screen image use the first drop menu to select the PCI device to examine Select the device from DALSA Note the bus and slot number of the installed board this will be unique for each system unless systems are setup identically Click on the Diagnostic button to view an analysis of the system PCI configuration space 3 s 55 PCI Diagnostic 2 1 PCI device X64 Xcelera LVDS 4 from DALSA bus 2 slot 0 function 0 Device enabled Rescan devices Refresh Hex di Vendor ID ss Rev ID
23. Gin noise filter nGin threshold select SW1 3 Input Details For single ended TTL signals the Gin pin is connected to ground The threshold point is 10V by default for 24V systems and can be change to 2V for TTL or low voltage differential with SW1 e Each input has a ferrite bead plus 650 ohm series resistor on the opto coupler anode e Each input provides some high frequency noise filtering e Maximum input signal frequency is 25 KHz Note 2 General Outputs Specifications Each of the four General Outputs are opto coupled Each output is an isolated open collector NPN transistor switch The following figure is typical for each General Output Gout Gout reverse voltage protection amp filter Gout Output Details output has ferrite beads plus 680 ohm series resistor on the cathode connection e Maximum output device differential voltage is 25V e Maximum output device sink current is 35mA with 25V output differential e Maximum reverse voltage is 25V e Maximum output switching frequency is limited by driver and register access on the PCIe bus 102 e Technical Specifications X64 Xcelera LVDS PX User s Manual Note 3 External Trigger Input Specifications The two Trigger Inputs are opto coupled and compatible to differential signals RS422 or single ended TTL source signals The following figure is typical for each External Trigger Input
24. In GREEN_8 In 105 RED 2 In GREEN_8 In 72 RED 3 In GREEN_9 In 106 RED 3 In GREEN 9 In 73 RED 4 In RED_0 LSB In 107 RED 4 In RED_0 LSB In 74 RED 5 In RED 1 In 108 RED 5 In RED 1 In 75 RED 6 In RED 2 In 109 RED 6 In RED 2 In 76 RED 7 MSB In RED 3 In 110 RED 7 MSB In RED 3 In 77 111 GND GND 78 reserved RED 4 In 112 reserved RED 4 In 79 reserved RED 5 In 113 reserved RED 5 In 80 reserved RED 6 In 114 reserved RED 6 In 81 reserved RED 7 In 115 reserved RED 7 In 82 reserved RED 8 In 116 reserved RED 8 In 83 reserved RED_9 MSB In 117 reserved RED_9 MSB In 86 120 GND GND 95 129 GND GND All remaining pins are Reserved All remaining pins are Reserved X64 Xcelera LVDS PX4 User s Manual Technical Specifications 95 J2 Dual 68 Pin VHDCI Connectors Camera interface J2 consists of two VHDCI connectors refer to the X64 LVDS connector bracket view X64 Xcelera LVDS PX4 End Bracket View on page 87 Connector 3 is for camera taps 5 and 6 while connector 4 is for camera taps 7 and 8 J2 Connector 4 camera tap 7 amp 8 J2 Connector 3 camera tap 5 amp 6 All signals support RS 644 LVDS High voltage Low voltage minimum differential threshold 100mV Maximum common mode voltage 5 V Maximum Input Current 10mA Typical connector part number Honda HDRA E68W1LFDT1EC SL J2 Connector 3 Monochrome 5 amp 6 Pinout Camera t
25. tap 1 bit 5 gt bit 5 bit 6 gt bit6 bit 7 gt bit7 c X64 Xcelera LVDS PX4 bit 8 gt bit 0 2 bito gt mi bit 10 gt bit 2 bit 11 gt bit 3 I J12 connector 1 tap 2 Programmable Control Signals If the camera has one channel that outputs 12 bits per pixel Connect the camera data bits 0 7 to the 8 bit data port Tap 1 on input connector 1 Connect the camera data bits 8 11 to the first four bits on data port Tap 2 on input connector 1 30 e Installing X64 Xcelera LVDS PX4 X64 Xcelera LVDS PX4 User s Manual One Camera Two 12 bit Channels Camera connector 1 tap 1 amp 2 connector 2 tap 3 amp 4 bk i J2 connectors 3 amp 4 X64 Xcelera LVDS PX4 J12 connectors 1 amp 2 bit 0 bit 1 bit 2 bit 3 bit 4 bit 5 bit 6 bit 7 bit 8 bit 9 bit 10 bit 11 12 bit Channel 1 4 bit 0 bit 1 bit 2 J12 bit 3 pita connector 1 tap 1 bit 5 bit 6 bit 7 X64 Xcelera LVDS PX4 bit 0 bit 1 bit 2 J12 bit 3 connector 1 tap 2 Programmable Control Signals Camera bit 0 bit 1 bit 2 bit 3 bit 4 bit 5 bit 6 bit 7 bit 8 bit 9 bit 10 bit 11 12 bit Channel 2 x x gt bit 0 CH bit 1
26. Component Version Optional ECO Sub T emplate Version Board Model Output X64 Xcelera LVDS PX4 User s Manual Installing X64 Xcelera LVDS PX e 19 LVDS Camera Connections amp Status LEDs X64 Xcelera LVDS PX4 End Bracket View E LED 2 4 Connector 4 Connector 2 t e c ejfe 3 9 X V N LED 1 Connector 3 Connector 1 e Connector 1 is for camera taps 1 and 2 while connector 2 is for camera taps 3 and 4 e Connector 3 is for camera taps 5 and 6 while connector 4 is for camera taps 7 and 8 Complete the hardware installation process with the connection of a supported camera to the X64 Xcelera LVDS PX4 board using appropriate VHDCI cables The camera and board cable connectors are labeled when a cable is purchased from DALSA Connect the cable as indicated If however you fabricate the cable yourself contact the DALSA Montreal Camera Application group for information and cable diagrams applicable to your camera Note Refer to External Signals Connector Bracket Assembly on page 107 for power connections when the X64 Xcelera LVDS PX4 supplies camera power Status LEDs Description Status LED 1 Red No camera connected or camera has no power Green Camera connected and ON Camera clock detected No line valid detected Slow flashing green 2 Hz Camera Line Valid signal detected Fast flashing green
27. CorXferConnect lt Xfer module No memory may occur when loading a Sapera camera file or when the application configures a frame buffer for area scan cameras The problem is that the X64 Xcelera LVDS PX4 does not have enough onboard memory for two frame buffers The X64 Xcelera LVDS 4 when used with area scan cameras allocates two internal frame buffers in onboard memory each equal in size to the acquisition frame buffer This allocation is automatic at the driver level The X64 Xcelera LVDS PX4 driver allocates two buffers to ensure that the acquired video frame is complete and not corrupted in cases where the transfer to host system memory may be interrupted by other host system processes The total size of the two internal frame buffers must be somewhat smaller than the total onboard memory due to memory overhead required for image transfer management Note that the X64 Xcelera LVDS PX4 board when configured for two Base inputs equally divides the onboard memory between the two acquisition modules reducing the available memory for the two buffers by half Overview of Sapera Acquisition Parameter Files ccf or cca cvi Concepts and Differences between the Parameter Files There are two components to the legacy Sapera acquisition parameter file set CCA files also called cam files and CVI files also called VIC files 1 e video input conditioning The files store video signal parameters CCA and video conditioning para
28. FROM MID 0x20 ECTION FROM BOT 0x40 CORACQ PRM TAP 11 DIRECTION monochrome only CORACQ VAL TAP DIRECTION LR 0x1 CORACQ VAL TAP DIRECTION RL 0x2 CORACQ VAL TAP DIR CORACQ VAL TAP DIR CORACQ VAL TAP DIR CORACQ VAL TAP DIR CORACQ VAL TAP DIR ECTION UD 0x4 ECTION DU 0x8 ECTION FROM TOP 0x10 ECTION FROM MID 0x20 ECTION FROM BOT 0x40 CORACQ PRM TAP 12 DIRECTION monochrome only CORACQ VAL TAP DIRECTION LR 0x1 CORACQ VAL TAP DIRECTION RL 0x2 CORACQ VAL TAP DIR CORACQ VAL TAP DIR CORACQ VAL TAP DIR CORACQ VAL TAP DIR CORACQ VAL TAP DIR ECTION UD 0x4 ECTION DU 0x8 ECTION FROM TOP 0x10 ECTION FROM MID 0x20 ECTION FROM BOT 0x40 X64 Xcelera LVDS PX User s Manual X64 Xcelera LVDS PX4 Reference e 73 PRM 13 DIRECTION monochrome only CORACQ VAL TAP DIRECTION LR 0x1 CORACQ VAL TAP DIRECTION RL 0x2 CORACQ VAL TAP DIR CORACQ VAL TAP DIR CORACQ VAL TAP DIR CORACQ VAL TAP DIR CORACQ VAL TAP DIR ECTION UD 0x4 ECTION DU 0x8 ECTION FROM TOP 0x10 ECTION FROM MID 0x20 ECTION FROM BOT 0x40 CORACQ PRM TAP 14 DIRECTION monochrome only CORACQ VAL TAP DIRECTION LR 0x1 CORACQ VAL TAP DIRECTION RL 0x2 CORACQ VAL TAP DIR CORACQ VAL TAP DIR CORACQ VAL TAP DIR CORACQ VAL TAP DIR CORACQ VAL TAP DIR ECTION UD 0x4 ECTION DU 0x8 ECTION FROM TOP 0x10 ECTION FROM MID 0x20 ECTION FROM BOT 0x40
29. Input 0 20 7 External Trigger Input 1 21 20 External Trigger Input 1 22 8 Shaft Encoder Phase A 23 21 Shaft Encoder Phase A 24 9 Shaft Encoder Phase B 25 22 Shaft Encoder Phase 26 11 Strobe Output 0 28 24 Ground 29 10 Strobe Output 1 30 14 Ground 31 15 Ground 38 16 Ground 39 25 Ground 40 110 Technical Specifications X64 Xcelera LVDS PX4 User s Manual J14 Board Sync Board Sync interconnects multiple X64 Xcelera boards to synchronize acquisitions to one trigger or event The trigger source can be either an external signal or internal software trigger The board receiving the trigger is the Master board while the boards receiving the control signal from the Master board are Slaves Hardware Connection Interconnect two three or four X64 Xcelera boards via their J14 connector The 4 pin cable is wired one to one i e no crossed wires The cable must be as short as possible and the boards must be in the same system Master Board Software Setup Choose one X64 Xcelera as master The Sapera parameter CORACQ PRM EXT TRIGGER SOURCE is set to either Mode 1 to Board Sync or Mode 2 Control pulse to Board Sync See Sapera documentation for more details Slave Board Software Setup The Sapera parameter CORACQ EXT TRIGGER SOURCE is set to From Board Sync Test Setup The control application starts the acquisition on all slave boards The acquisition process is now waiting for the contro
30. Manual Appendix X I O Module Option e 119 X I O Module Sapera Interface Sapera version 5 30 or later provides support for the X I O module via an I O class and demonstration program Users can use the demonstration program as is or use the demo program source code to implement X I O controls within the custom imaging application This section describes configuring the X I O module power up state using the X I O demo program and describes the Sapera Class to program and read the X I O module along with sample code Configuring User Defined Power up I O States The X I O module power up state is stored onboard in flash memory Use the Device Manager program to configuration the initial state Run the program via the windows start menu Start Programs DALSA X64 Xcelera LVDS PX4 Device Driver Device Manager The Device Manager provides information on the installed X64 Xcelera LVDS PX4 board and its firmware With an X I O module installed click on XIO Board Information as shown in the following figure meDALSA Coreco Device Manager Bei x File Help Information Firmware Manager Program Refresh Reset Device Information Field Device 0 NPN Pin Device 0 PNP Pin Device 0 Tristate Pin OxOOFF 0 Board Device 0 Default Output Type Information Device 0 Default Output Pin State 0 000 a Firmware Device 1 Optocoupled Pin 0x0003 Device 1 Input Pin Ox
31. PCI Express PCI 32 or PCI 64 boards and check acquisition bandwidth again Engineering has seen this case where other PCI boards in some systems cause limitations in transfers Each system with its combination of system motherboard and PCI boards will be unique and will need to be tested for bandwidth limitations affecting the imaging application Is the X64 Xcelera LVDS PX4 installed in a PCI Express x16 slot Note that some computer s x16 slot may only support non x16 boards at x1 speed or not at all Check the computer documentation or test an X64 Xcelera LVDS PX4 installation Note that the X64 Xcelera LVDS PX4 board does not function at x1 speeds X64 Xcelera LVDS PX4 User s Manual Troubleshooting Installation Problems e 43 44 e Troubleshooting Installation Problems X64 Xcelera LVDS PX4 User s Manual CamExpert Quick Start Interfacing Cameras with CamExpert CamExpert is the camera interfacing tool for frame grabber boards supported by the Sapera library CamExpert generates the Sapera camera configuration file yourcamera ccf based on timing and control parameters entered For backward compatibility with previous versions of Sapera CamExpert also reads and writes the cca and cvi camera parameter files Every Sapera demo program starts by a dialog window to select a camera configuration file Even when using the X64 Xcelera LVDS PX4 with common video signals a camera file is required Therefore CamExpert is typically the firs
32. TYPE PIXEL CLK Frame Lost The Frame Lost event indicates that an acquired image transfer to on board memory failed An example of this case would be if there are no free on board buffers available for the new image This may be the case if the image transfer from onboard buffers to host PC memory is not sustainable due to bus bandwidth issues The Sapera event value is CORACQ VAL EVENT TYPE FRAME LOST Vertical Timeout This event indicates a timeout situation where a camera fails to output a video frame after a trigger The Sapera event value is CORACQ VAL EVENT VERTICAL TIMEOUT Transfer Events Transfer events are the ones related to the transfer module Transfer events provide feedback on image transfer from onboard memory frame buffers to PC memory frame buffers Start of Frame The Start of Frame event is generated when the first image pixel is transferred from onboard memory into PC memory The Sapera event value is CORXFER VAL EVENT TYPE START OF FRAME End of Frame The End of Frame event is generated when the last image pixel is transferred from onboard memory into PC memory The Sapera event value is CORXFER VAL EVENT TYPE END OF FRAME End of Line The End of Line event is generated after a video line is transferred to a PC buffer The Sapera event value is CORXFER VAL EVENT TYPE END OF LINE End of N Lines The End of N Lines event is generated after a set number of video lines are transferred to a PC buf
33. Technical Specifications X64 Xcelera LVDS PX4 User s Manual 76 10 77 111 78 112 79 113 80 114 81 115 82 116 83 117 84 118 85 119 86 120 87 121 88 122 89 123 90 124 91 125 92 126 93 127 94 128 95 129 X64 Xcelera LVDS PX4 User s Manual DINg 7 DINg 7 GND DINh_0 DINh 0 DINh 1 DINh 1 DINh 24 DINh 2 DINh 3 DINh 3 DINh 4 DINh 4 DINh 54 DINh 5 DINh 64 DINh 6 DINh 7 DINh 7 GND GND Input Input Input Input Input Input Input Input Input Input Input Input Input Input Input Input Input Input Bit 7 Bit 7 Ground Bit 0 Bit 0 Bit 1 Bit 1 Bit 2 Bit 2 Bit 3 Bit 3 Bit 4 Bit 4 Bit 5 Bit 5 Bit 6 Bit 6 Bit 7 Bit 7 Ground Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Ground Tap 7 Tap 7 Tap 8 Tap 8 Tap 8 Tap 8 Tap 8 Tap 8 Tap 8 Tap 8 Tap 8 Tap 8 Tap 8 Tap 8 Tap 8 Tap 8 Tap 8 Tap 8 Technical Specifications 99 96 Reserved 130 Reserved 97 Reserved 131 Reserved 98 Reserved 132 Reserved 99 Reserved 133 Reserved 100 Reserved 134 Reserved 101 Reserved 135 Reserved 102 Reserved 136 Reserved 100 e Technical Specifications X64 Xcelera LVDS PX4 User s Manual J3 External Signals Connector J3 Pin Header Numbering Det
34. Teledyne DALSA Montreal office 7075 Place Robert Joncas Suite 142 St Laurent Quebec Canada HAM 272 Tel 514 333 1301 Fax 514 333 1388 Asia Sales Teledyne DALSA Asia Pacific Ikebukuro East 13F 3 4 3 Higashi Ikebukuro Toshima ku Tokyo Japan Tel 81 3 5960 6353 Fax 81 3 5960 6354 X64 Xcelera LVDS PX4 User s Manual www teledynedalsa com mv mailto info teledynedalsa com USA Sales Teledyne DALSA Billerica office 700 Technology Park Drive Billerica Ma 01821 Tel 978 670 2000 Fax 978 670 2010 European Sales Teledyne DALSA Europe Breslauer Str 34 D 82194 Gr benzell Munich Germany Tel 49 8142 46770 Fax 49 8142 467746 Contact Information e 127 Technical Support Submit any support question or request via our web site Technical support form via our web page Support requests for imaging product installations Support requests for imaging applications http www teledynedalsa com mv support Camera support information Product literature and driver updates 128 e Contact Information X64 Xcelera LVDS PX4 User s Manual Glossary of Terms Bandwidth Describes the measure of data transfer capacity PCI devices must share the maximum PCI bus bandwidth when transferring data to and from system memory or other devices CAM Sapera camera file that uses the file extension CCA by default Files using the CCA extension also called CAM files
35. X64 Xcelera LVDS PX4 User s Manual GEN2 PCI Slot Computer Issue At boot time the PX4 status LED 2 keeps on flashing red If you run the PCI Diagnostics tool the PX4 is not in the PCI device list If the board is installed in a computer which supports PCIe GEN2 expansion slots see section SW3 2 GEN2 Slot Workaround Details on page 86 Sapera and Hardware Windows Drivers The next step is to make certain the appropriate DALSA drivers have started successfully during the boot sequence Example click on the Start Programs Accessories System Tools System Information Software Environment Click on System Drivers Make certain the following drivers have started for the X64 Xcelera LVDS PX4 Device Description Type Started Corx64xcelerapx4lvds X64 Xcelera LVDS PX4 messaging Kernel Driver Yes CorLog Sapera Log viewer Kernel Driver Yes CorMem Sapera Memory manager Kernel Driver Yes CorPci Sapera PCI configuration Kernel Driver Yes CorSerial Sapera Serial Port manager Kernel Driver Yes DALSA Technical Support may request that you check the status of these drivers as part of the troubleshooting process Recovering from a Firmware Update Error This procedure is required if any failure occurred while updating the X64 Xcelera LVDS PXA firmware on installation or during a manual firmware upgrade On the chance the board has corrupted firmware any Sapera application such as CamExpert or the grab demo program will not fi
36. Y J12 connector 1 Blue data X64 Xcelera LVDS PX4 J12 connector 1 Green data Programmable Control Signals Camera X64 Xcelera LVDS PX4 bit 6 bit 7 Green bit 8 vv vv channel bit 9 bit 0 bit 1 bit 2 Red bit 3 channel bit 4 bit 5 6 bit7 bit8 3j bit9 412 2 Green data X64 Xcelera LVDS PX4 J12 connector 2 Red data X64 Xcelera LVDS PX4 User s Manual Installing X64 Xcelera LVDS PX4 29 If the camera outputs RGB 30 bit data Connect the camera Blue data to input connector 1 Connect the camera Green data bits 0 5 to input connector 1 Connect the camera Green data bits 6 9 to input connector 2 Connect the camera Red data to input connector 2 See J12 Connector 1 RGB 24 amp RGB 30 Pinout on page 93 and 712 Connector 2 RGB 24 amp RGB 30 Pinout on page 95 for details One Camera One 12 bit Channel connector 1 tap 1 amp 2 J2 connectors 3 amp 4 X64 Xcelera LVDS PX4 J12 connectors 1 amp 2 Camera bit 0 gt bit 0 bit 1 gt bit 1 bit 2 gt bit 2 bit 3 gt bit 3 GC J12 connector 1
37. a second Sapera parameter defines the number of triggers to skip between valid acquisition triggers The figure below depicts a system where a valid camera trigger is any pulse edge from either shaft encoder signal After a trigger the two following triggers are ignored as defined by the Sapera pulse drop parameter K Keep D Drop or Skip x lt lt x lt lt lt x lt lt o lt lt Shaft Encoder phase A Shaft Encoder phase B Line acquired Note in this example Number of trigger to drop 2 Note that camera file parameters are best modified by using the Sapera CamExpert program X64 Xcelera LVDS PX4 User s Manual X64 Xcelera LVDS PX4 Reference e 63 CVI CCF File Parameters Used Shaft Encoder Enable X where If X 1 Shaft Encoder is enabled If X 0 Shaft Encoder is disabled Shaft Encoder Pulse Drop X where X number of trigger pulses ignored between valid triggers For information on camera configuration files see the Sapera Acquisition Parameters Reference Manual OC SAPM APR00 Virtual Frame Reset for Line Scan Cameras When using Line Scan cameras a frame buffer is allocated in host system memory to store captured video lines To control when a video line is stored as the first line in this virt
38. installed frame grabber Host buffer Refers to a frame buffer allocated in the physical memory of the host computer system LSB Least Significant Bit in a binary data word MSB Most Significant Bit in a binary data word PCI 32 Peripheral Component Interconnect The PCI local bus is a 32 bit high performance expansion bus intended for interconnecting add in boards controllers and processor memory systems PCI 64 A superset of the PCI specification providing a 64 bit data path and a 66 MHz clock PCI Express PCI Express is the serial bus addition to the PCI series of specifications However PCI Express is not compatible with PCI products or expansion slots PCI Express products or expansion slots are designated as 1x 4x 8x or 16x which defines the total data bandwidth and the physical size of the bus connector Pixel Picture Element The number of pixels describes the number of digital samples taken of the analog video signal The number of pixels per video line by the number of active video lines describes the acquisition image resolution The binary size of each pixel 1 8 bits 15 bits 24 bits defines the number of gray levels or colors possible for each pixel PRNU Photo Response Non Uniformity PRNU is the variation in response between sensor pixels RAW A Sapera data file format where there is no header information and that supports any Sapera buffer type Refer to the Sapera Basic Modules Reference Manual B
39. resources do not forget the Windows operating system memory needs As an example Window XP should always have a minimum of 128 MB for itself A Sapera application using scatter gather buffers could consume most of the remaining system memory When using frame buffers allocated as a single contiguous memory block typical limitations are one third of the total system memory with a maximum limit of approximately 100 MB See the Buffer menu of the Sapera Grab demo program for information on selecting the type of host buffer memory allocation Contiguous Memory for Sapera Messaging The current value for Sapera messaging determines the total amount of contiguous memory reserved at boot time for messages allocation which is used to store arguments when a Sapera functions are called Increase this value if you are using functions with large arguments such as arrays and experience any memory errors 34 e Installing X64 Xcelera LVDS PX4 X64 Xcelera LVDS PX4 User s Manual Troubleshooting Installation Problems Overview DALSA has tested the X64 Xcelera LVDS PX4 and the X64 family of products in a variety of computers Although unlikely installation problems may occur due to the constant changing nature of computer equipment and operating systems This section describes what the user can verify to determine the problem or the checks to make before contacting DALSA Technical Support If you require help and need to contact DALSA Technical Suppo
40. signals The following figure is typical for each input V SE noise filter SE e For single ended TTL signals the SE pin is connected to ground The threshold point is 2V e Each input has a ferrite bead plus a 220 ohm series resistor on the opto coupler anode e Maximum input signal frequency is 200 KHz e Opto coupler response time is 0 25us for a rising signal e Opto coupler response time is 2 8us for a falling signal e See Line Trigger Source Selection for Line Scan Applications on page 61 for more information e Refer to Sapera parameters CORACQ PRM SHAFT ENCODER ENABLE CORACQ PRM SHAFT ENCODER DROP or refer to CORACQ PRM EXT LINE TRIGGER ENABLE CORACQ PRM EXT LINE TRIGGER DETECTION CORACQ PRM EXT LINE TRIGGER LEVEL fixed at RS 422 CORACQ PRM EXT LINE TRIGGER SOURCE e See also file entries Shaft Encoder Enable Shaft Encoder Pulse Drop or see External Line Trigger Enable External Line Trigger Detection External Line Trigger Level External Line Trigger Source X64 Xcelera LVDS PX User s Manual Technical Specifications 105 Note 5 Strobe Output Specifications Dual TTL Strobe outputs are provided The following figure is typical for each strobe out Strobe EN Strobe Strobe Each strobe output is a tri state driver enabled by software Each strobe output is 5V TTL level Each output has a ferrite bead Maximum source current is 32mA typical Maximum sink curren
41. the program via the Windows Start Menu shortcut Start Programs DALSA Sapera LT Tools Log Viewer The Log Viewer lists information about the installed DALSA drivers Click on File Save and at the prompt enter a text file name to save the Log Viewer contents Email this text file to DALSA Technical Support when requested or as part of your initial contact email Memory Requirements with Area Scan Acquisitions The X64 Xcelera L VDS PXA allocates two frame buffers in onboard memory each equal in size to the acquisition frame buffer This double buffering memory allocation is automatic at the driver level The X64 Xcelera LVDS PXA driver uses two buffers to ensure that the acquired video frame is complete and not corrupted in cases where the image transfer to host system memory may be interrupted and delayed by other host system processes That is the image acquisition to one frame buffer is not interrupted by any delays in transfer of the other frame buffer which contains the previously acquired video frame to system memory X64 Xcelera LVDS PX4 User s Manual Troubleshooting Installation Problems e 41 The total size of the two internal frame buffers must be somewhat smaller than the total onboard memory due to memory overhead required for image transfer management When the X64 Xcelera LVDS PX4 does not have enough onboard memory for two frame buffers the memory error message Error CorXferConnect lt Xfer module gt No
42. 07 DINc 4 Input Bit4 Tap3 74 DINc 5 Input 5 Tap3 90 Technical Specifications X64 Xcelera LVDS PX4 User s Manual 108 DINc_5 75 DINc_6 109 DINc 6 76 DINc 7 110 DINc 7 77 111 GND 78 DINd_0 112 DINd 0 79 DINd 1 113 DINd 1 80 DINd_2 114 DINd_2 81 DINd_3 115 DINd 3 82 DINd 4 116 DINd 4 83 DINd 54 117 DINd 5 84 DINd_6 118 DINd 6 85 DINd_7 119 DINd_7 86 120 GND 87 121 88 122 89 123 90 124 91 125 92 126 93 127 X64 Xcelera LVDS PX4 User s Manual Input Input Input Input Input Input Input Input Input Input Input Input Input Input Input Input Input Input Input Input Input Bit 5 Bit 6 Bit 6 Bit 7 Bit 7 Ground Bit 0 Bit 0 Bit 1 Bit 1 Bit 2 Bit 2 Bit 3 Bit 3 Bit 4 Bit 4 Bit 5 Bit 5 Bit 6 Bit 6 Bit 7 Bit 7 Ground Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Tap 3 Tap 3 Tap 3 Tap 3 Tap 3 Tap 4 Tap 4 Tap 4 Tap 4 Tap 4 Tap 4 Tap 4 Tap 4 Tap 4 Tap 4 Tap 4 Tap 4 Tap 4 Tap 4 Tap 4 Tap 4 Technical Specifications 91 94 Reserved 128 Reserved 95 129 GND Ground 96 Reserved 130 Reserved 97 Reserved 131 Reserved 98 Reserved 132 Reserved 99 Reserved 133 Reserved 100 Rese
43. 1 Input Bitl Tap 1 3 DINa_2 Input Bit2 Tap 1 37 DINa 2 Input Bit2 Tap 1 4 DINa_3 Input Bit3 Tap 1 38 DINa 3 Input Bit3 Tap 1 5 DINa_4 Input Bit4 Tap 1 39 DINa 4 Input Bit4 Tap 1 6 DINa_5 Input Bit5 Tap 1 40 DINa 5 Input Bit5 Tap 1 4 DINa_6 Input Bit6 Tap 1 88 Technical Specifications X64 Xcelera LVDS PX4 User s Manual 41 42 9 43 10 44 11 45 12 46 13 47 14 48 15 49 16 50 17 51 18 52 19 53 20 54 21 55 22 56 23 57 24 58 25 X64 Xcelera LVDS PX4 User s Manual PHA PHA PHB PHB Trigl Trigl Outl2V Outl2V cam CC2 cam CC2 cam 1 cam cam CC3 Input Input Input Input Input Input Input Input Input Input Input Input Input Input Input Input Input Input Input Input Input Input Input Input Input Output Output Output default PRIN Output Output default EXSYNC Output Output default Forward Bit6 Tap 1 Bit7 1 Bit7 1 Ground BitO Tap 2 BitO Tap 2 Bit1 Tap 2 Bitl Tap 2 Bit2 Tap 2 Bit2 Tap 2 Bit3 Tap 2 Bit3 Tap 2 Bit4 Tap 2 Bit4 2 Bit5 Tap 2 Bit5 Tap 2 Bit6 Tap 2 Bit6 Tap 2 Bit7 Tap 2 Bit7 Tap 2 Ground Shaft Encoder Phase A Shaft Encoder Phase A Shaft Encoder Phase B Shaft Encoder Phase B External Trigger 1 External Trigger 1 12 Vol
44. 16 Hz Acquisition in progress Status LED 2 Off Board initialization good Red Board initialization error on computer boot up Contact DALSA or browse our web site www dalsa com mv support for the latest information on X64 Xcelera LVDS PX4 supported cameras 20 Installing X64 Xcelera LVDS PX4 X64 Xcelera LVDS PX4 User s Manual Camera Connection Examples The following diagrams are examples of camera connections for the X64 Xcelera LVDS PX4 The information presented is generic and does not detail specifics as to camera brand and its signal specifications or camera cabling requirements The various data input configurations are automatically programmed by the parameters defined in the Sapera camera file loaded for the camera in use Use the Sapera CamExpert tool to configure camera files One Camera One 8 bit Channel or Tap Camera connector 1 tap 1 J2 connectors 3 amp 4 X64 Xcelera LVDS PX4 J12 connectors 1 amp 2 bit 0 bit 1 bit 2 bit3 bit 4 bit 5 bit 6 bit 7 YYY VV vvv bit 0 bit 1 X64 Xcelera LVDS PX4 bit 2 bit3 J2 connector bit 4 bit 5 bit 6 bit 7 Programmable Control Signals 1 tap 1 If the camera has one channel or tap that outputs 8 bits per pixel Connect the c
45. 65535000 us step us CORACQ PRM INTEGRATE PULSEO POLARITY CORACQ VAL ACTIVE LOW 0x1 CORACQ VAL ACTIVE HIGH 0x2 CORACQ LINE INTEGRATE PULSEO DELAY min 0 us 65535 us step us CORACQ LINE INTEGRATE PULSEO DURATION min 1 us max 65535000 us step us CORACQ PRM VIDEO LEVEL MIN Default 0 pV CORACQ PRM VIDEO LEVEL MAX Default 0 pV CORACQ PRM CONNECTOR LINE TRIGGER INPUT Default 0 CORACQ PRM CONNECTOR LINE INTEGRATE INPUT Connector 1 type 2 pin 1 CORACQ PRM CONNECTOR LINESCAN DIRECTION INPUT CORACQ PRM DATA VALID ENABLE Default 0 TRUE FALSE CORACQ PRM DATA VALID POLARITY CORACQ VAL ACTIVE HIGH 0x2 CORACQ PRM CONNECTOR PIXEL CLK OUTPUT Default 0 CORACQ PRM CONNECTOR WEN OUTPUT Default 0 CORACQ PRM 9 DIRECTION monochrome only CORACQ VAL TAP DIRECTION LR 0x1 CORACQ VAL TAP DIRECTION RL 0x2 CORACQ VAL TAP DIR CORACQ VAL TAP DIR CORACQ VAL TAP DIR CORACQ VAL TAP DIR CORACQ VAL TAP DIR ECTION UD 0x4 ECTION DU 0x8 ECTION FROM TOP 0x10 ECTION FROM MID 0x20 ECTION FROM BOT 0x40 CORACQ PRM TAP 10 DIRECTION monochrome only CORACQ VAL TAP DIRECTION LR 0x1 CORACQ VAL TAP DIRECTION RL 0x2 CORACQ VAL TAP DIR CORACQ VAL TAP DIR CORACQ VAL TAP DIR CORACQ VAL TAP DIR CORACQ VAL TAP DIR ECTION UD 0x4 ECTION DU 0x8 ECTION FROM TOP 0x10 ECTION
46. 8 CORACQ PRM PIXEL DEPTH digital monochrome mode digital color RGB mode 8 bits LUT 1 LUT format CORDATA FORMAT MONOS8 0 bits LUT 1 LUT format CORDATA FORMAT 10 0 bits LUT 1 LUT format CORDATA FORMAT MONO8 2 bits LUT 1 LUT format CORDATA_FORMAT_MONO12 2 bits LUT 1 LUT format CORDATA_FORMAT_MONO8 4 bits LUT 0 LUT format CORDATA_FORMAT_MONO14 6 bits LUT 0 LUT format CORDATA_FORMAT_MONO16 8 bits LUT 1 LUT format CORDATA FORMAT COLORNI8 0 bits LUT 1 LUT format CORDATA_FORMAT_COLORNI10 2 bits LUT 1 LUT format CORDATA FORMAT COLORNIIO CORACQ PRM VIDEO STD CORACQ VAL VIDEO STD NON STD 0x1 CORACQ PRM FIELD ORDER CORACQ VAL FIELD ORDER NEXT FIELD 0x4 CORACQ PRM HACTIVE min 1 pixel max 16777215 pixel step 1 pixel CORACQ PRM HSYNC min 4 pixel max 4294967295 pixel step 1 pixel CORACQ PRM min 1 line max 16777215 line step 1 line CORACQ PRM VSYNC min 0 line max 4294967295 line step 1 line CORACQ PRM HFRONT PORCH min 0 pixel max 0 pixel step 1 pixel CORACQ PRM HBACK PORCH min 0 pixel max 0 pixel step 1 pixel CORACQ PRM VFRONT PORCH min 0 line max 0 line step 1 line CORACQ PRM VBACK PORCH min 0 line max 0 line step 1 line CORACQ PRM HFRONT INVALID min 0 pixel max 16777215 pixel ste
47. A standby 0 81A during acquisition 82 e Technical Specifications X64 Xcelera LVDS PX4 User s Manual EMI Certifications Class B both FCC and CE LO EC amp FCC DECLARATION OF CONFORMITY We DALSA Montreal Inc 7075 Place Robert Joncas Suite 142 St Laurent Quebec Canada 222 Declare under sole legal responsibility that the following products conform to the protection requirements of council directive 89 336 EEC on the approximation of the laws of member states relating to electromagnetic compatibility as amended by directive 93 68 EEC FRAME GRABBER BOARD Xcelera LVDS PX4 The products to which this declaration relates are in conformity with the following relevant harmonized standards the reference numbers of which have been published in the Official Journal of the European Communities 55022 1998 Residential Commercial and Light Industry ENV50204 1995 EN61000 3 amp 4 1994 1995 1996 1998 2000 2001 EN60255 22 4 2002 Further declare under our sole legal responsibility that the product listed conforms to the code of federal regulations CFR 47 part 15 for a class B product St Laurent Canada 2008 10 03 Location Date Research amp Development X64 Xcelera LVDS PX4 User s Manual Technical Specifications e 83 Connector and Switch Locations Refer to the board layout to locate connectors or configuration switches X64 Xcelera LVDS PX4 Board Layout Drawing
48. ACQ VAL RISING EDGE 0x4 CORACQ VAL FALLING EDGE 0x8 CORACQ PRM DC REST START min 0 pixel max 0 pixel step 1 pixel CORACQ PRM DC REST WIDTH min 0 pixel max 0 pixel step 1 pixel CORACQ PRM LUT FORMAT monochrome mode color RGB mode Default CORACQ VAL OUTPUT FORMAT MONO8 Default CORACQ VAL OUTPUT FORMAT RGBP16 CORACQ PRM VSYNC REF CORACQ VAL SYNC REF END 0x2 CORACQ PRM HSYNC REF CORACQ VAL SYNC REF END 0x2 CORACQ PRM LINE INTEGRATE ENABLE TRUE FALSE CORACQ PRM LINE INTEGRATE DURATION min 1 pixel max 16777215 pixel step 1 pixel CORACQ PRM LINE TRIGGER ENABLE TRUE FALSE CORACQ PRM EXT FRAME TRIGGER ENABLE TRUE FALSE CORACQ PRM EXT FRAME TRIGGER DETECTION CORACQ VAL ACTIVE LOW 0x1 CORACQ VAL ACTIVE HIGH 0x2 CORACQ VAL RISING EDGE 0x4 CORACQ VAL FALLING EDGE 0x8 CORACQ VAL DOUBLE PULSE RISING EDGE 0x20 CORACQ VAL DOUBLE PULSE FALLING EDGE 0x40 CORACQ PRM EXT LINE TRIGGER ENABLE TRUE FALSE X64 Xcelera LVDS PX User s Manual X64 Xcelera LVDS PX4 Reference e 75 CORACQ PRM EXT LINE TRIGGER DETECTION CORACQ VAL RISING EDGE 0x4 CORACQ PRM SNAP COUNT Default 1 frame CORACQ PRM INT LINE TRIGGER ENABLE TRUE FALSE CORACQ PRM INT LINE TRIGGER FREQ Default 5000 Hz CORACQ PRM LINESCAN DIRECTION OUTPUT CORACQ VAL LINESCAN DIRECTION FORWARD 0x1 CORACQ PRM BIT O
49. CAMERA files contain all parameters which describe the camera video signal characteristics and operation modes 1 what the camera outputs Channel Camera data path that includes all parts of a video line Checksum A value used to ensure data is stored without error It is created by calculating the binary values in a block of data using some algorithm and storing the results with the data CMI Client Modification Instruction A client requested engineering change applied to a DALSA board product to support either a non standard function or custom camera Contiguous memory A block of physical memory occupying consecutive addresses CRC Proprietary Sapera raw image data file format that supports any Sapera buffer type and utilizes an informative file header Refer to the Sapera Basic Modules Reference Manual Buffer File Formats section Firmware Software such as a board driver that is stored in nonvolatile memory mounted on that board FPN Fixed Pattern Noise FPN is the unwanted static variations in response for all pixels in the image Frame buffer An area of memory used to hold a frame of image data A frame buffer may exist on the acquisition hardware or be allocated by the acquisition hardware device driver in host system memory X64 Xcelera LVDS PX4 User s Manual Glossary of Terms 129 Grab Acquiring an image frame by means of a frame grabber Host Refers to the computer system that supports the
50. Camera Four 10 bit ener enne 28 X64 Xcelera LVDS PX4 User s Manual Contents e i One Camera EN ces tices ruses ia TED E EI sasa 29 One Camera One 12 bit Channel 30 One Camera Two 12 bit Choangele eese eee 31 One Camera Four 12 bit Channels seen 32 CONFIGURING SAPERA enne 33 Viewing Installed Sapera Servers u esses eene 33 Increasing Contiguous Memory for Sapera Resource 35 Contiguous Memory for Sapera Messoging 34 TROUBLESHOOTING INSTALLATION PROBLEMS 35 OVERVIEW oe ee 35 PROBLEM SUMMARY vessssesscesssncscssvecassntssnsassseeebiestsensdepsdanigenthinssedebenasnedsaeag ENEE 35 First Step Check the Status LED 35 Possible Installation Probleme 36 Possible Functional Probleme 36 eer 37 Checking for PCI Bus Conflicts esee eene 37 Windows Device Manager esee eene eene ener enne enne 38 GEN2 PCT Slot Computer Issue oic ced cise scena 39 Sapera and Hardware Windows Driver 39 Recovering from a Firmware Update Error 39 Driver Information via the Device Manager 40 Log Viewer centeno a pde afi c 41 Memory Requirements with Area Scan Acquisitions esses 41 Symptoms CamExpert Detects no Boards 42 Symptoms X64 Xcelera LVDS PX4 Does Not Grab
51. Connector 220 ohm 5 typical a Seeks Output 1 Simplified 22 gt Device Input Output Driver GND 3 23 24 Ver j gt Device Input GND typical 8 places 46 29 30 rs GND 29 Ne Output 2 e 4 E EE Output 3 Gey OMS NU Ge Output 4 E LN Output 5 io e Output 6 Ol ees n Output 7 2 Output 8 4g y LE X I O Module e Each output can sink 700 mA e Over current thermal protection will automatically shut down the output device X64 Xcelera LVDS PX4 User s Manual Appendix X I O Module Option e 117 Outputs in PNP Mode Electrical Details When the outputs are configured for PNP mode source driver an external power supply is required to provide the buffer output supply voltage USER_PWR A simplified schematic and important output specification follow PNP Source Driver Output Mode DB37 Connector Simplified USER_PWR 85 ES 5 gt Device Power Supply Driver Output 1 2 Device Input typical 8 places 3 23 24 GND M gt Device Input GND 16 29 30 GND 4 Output 2 s Output 3 Output 4 Ka es Output 5 E Output 6 18 22 Output 7 KZ Output 8 197 EE Module ES e User provi
52. DALSA Technical Support see Contact Information on page 127 To upgrade the board driver only e Logon the computer as an administrator or with an account that has administrator privileges e In Windows XP from the start menu select Start Settings Control Panel Add or Remove Programs Select the DALSA Xcelera board driver and click Remove When the driver un install is complete reboot the computer and logon the computer as an administrator again e In Windows Vista 7 from the start menu select Start Settings e Control Panel Programs and Features Double click the DALSA Xcelera board driver and click Remove e Install the new board driver Run Setup exe if installing manually from a downloaded driver file e Ifthe new driver is on a Sapera CD ROM follow the installation procedure described in Installing X64 Xcelera LVDS PX4 Hardware and Driver on page 12 e Note that you cannot install DALSA board driver without Sapera LT installed on the computer Sapera and Board Driver Upgrades To upgrade both Sapera and the acquisition board driver follow the procedure described below e Logon the computer as an administrator or with an account that has administrator privileges e In Windows from the start menu select Start Settings Control Panel Add or Remove Programs Select the DALSA Xcelera board driver and click Remove Follow by also removing the older version of Sapera LT e In Windows Vista 7 from th
53. Device reset complete 16 42 41 XceleraLVDS_PX4_1 Verifying Firmware State 16 42 45 Xcelera LVDS_PX4 Device s firmware has been updated successfully Executing the Firmware Loader from the Start Menu If required run the Firmware Loader program via the Windows Start Menu shortcut Start Programs DALSA X64 Xcelera LVDS PX4 Driver Firmware Update A firmware change after installation would be required to select a different configuration mode if available See User Programmable Configurations on page 8 Upgrading Sapera or any Board Driver When installing a new version of Sapera or a DALSA acquisition board driver in a computer with a previous installation the current version must be un installed first Upgrade the board driver and if required upgrade Sapera as described below 14 e Installing X64 Xcelera LVDS PX4 X64 Xcelera LVDS PX4 User s Manual Board Driver Upgrade Only Download upgrades to acquisition board drivers from the DALSA web site www dalsa com mv support Board driver revisions are also available on the next release of the Sapera CD ROM Often minor board driver upgrades do not require a new revision of Sapera To confirm that the current Sapera version will work with the new board driver e Check the new board driver ReadMe txt file before installing for information on the minimum Sapera version required Ifthe ReadMe txt file does not specify the Sapera version contact
54. ELAY min 0 us max 65535000 us step 1 us CORACQ PRM SHAFT ENCODER LEVEL CORACQ VAL LEVEL 422 0x2 CORACQ PRM LUT NENTRIES 256 entries CORACQ PRM EXT FRAME TRIGGER SOURCE min 0 5 step 1 CORACQ PRM EXT LINE TRIGGER SOURCE min 0 7 step 1 CORACQ PRM EXT TRIGGER SOURCE min 0 max 5 step 1 CORACQ PRM SHAFT ENCODER MULTIPLY min 1 32 step 2 N CORACQ PRM CAM TRIGGER DELAY min 0 max 65535 step 1 CORACQ PRM EXT TRIGGER DELAY TIME BASE CORACQ VAL TIME BASE LINE 0x4 CORACQ PRM EXT TRIGGER IGNORE DELAY min 0 max 65535000 step 1 76 X64 Xcelera LVDS PX4 Reference X64 Xcelera LVDS PX4 User s Manual CORACQ PRM EXT TRIGGER SOURCE STR 0 Automatic 1 From Trigg in 1 2 From Trigg in 2 From Board Sync To Board Sync Pulse to Board Sync CORACQ PRM EXT LINE TRIGGER SOURCE STR Automatic From Shaft Encoder Phase A From Shaft Encoder Phase B From Shaft Encoder Phase amp B From Board Sync To Board Sync Pulse to Board Sync To Board Sync When Grabbing b OO O L P L CORACQ PRM VERTICAL TIMEOUT DELAY min 0 max 16383000 step 1 ACQ Related Parameters Parameter Value CORACQ PRM LABEL Digital Mono 1 Digital Color RGB 1 CORACQ PRM EVENT CORACQ VA CO
55. ESCAN DIRECTION POLARITY CORACQ VAL ACTIVE LOW 0x1 CORACQ VAL ACTIVE HIGH 0x2 CORACQ PRM LINE TRIGGER FREQ MIN 1 Hz CORACQ PRM CAM LINE TRIGGER FREQ MAX 16777215 Hz CORACQ PRM CAM TIME INTEGRATE DURATION MIN 1 us CORACQ PRM CAM TIME INTEGRATE DURATION MAX 65535000 us CORACQ PRM CONNECTOR HD INPUT Default 0 CORACQ PRM CONNECTOR VD INPUT Default 0 CORACQ PRM CONNECTOR RESET TRIGGER INPUT Default 0 CORACQ TIME INTEGRATE PULSEl POLARITY CORACQ VAL ACTIVE LOW 0x1 CORACQ VAL ACTIVE HIGH 0x2 CORACQ TIME INTEGRATE PULSEI DELAY min 0 us max 65535000 us step 1 us CORACQ TIME INTEGRATE PULSEl DURATION min 0 us 65535000 us step 1 us 72 X64 Xcelera LVDS PX4 Reference X64 Xcelera LVDS PX4 User s Manual CORACQ PRM CONNECTOR EXPOSURE INPUT Default 0 CORACQ PRM TIME INTEGRATE PULSEO POLARITY CORACQ VAL ACTIVE LOW 0x1 CORACQ VAL ACTIVE HIGH 0x2 CORACQ TIME INTEGRATE PULSEO DELAY min 0 us max 65535000 us step us CORACQ TIME INTEGRATE PULSE0 DURATION 1 us 65535000 us step 1 us CORACQ INTEGRATE PULSE POLARITY CORACQ LINE INTEGRATE PULSE DELAY CORACQ VAL ACTIVE LOW 0x1 CORACQ VAL ACTIVE HIGH 0x2 min 0 us max 65535000 us step us CORACQ PRM LINE INTEGRATE PULSE DURATION min 1 us max
56. I conflict after some other device was installed Information Window The following figure shows the Device Manager Information screen Click to highlight one of the board components and the right hand windowpane displays information for that item as described below 40 e Troubleshooting Installation Problems X64 Xcelera LVDS PX4 User s Manual 1 D xw File Help Device Info Manager Program Refresh Reset Device Information E XeeleraLVDS_PX4_1 Field Value Information Ej Firmware D ACU DTE PCle x4 Interface Revision 1 Vendor ID Ox11EC Last ECO 4252 CMI 0x0000 Extension 0 Serial Number 54401043 Component Version 0 Optional ECO 0 0 Sub Template Version 4 Board Model celera LYDS_PX4 Single a Issue Device Info Fimware Update Output e Select Information to display identification and information stored in the X64 Xcelera LVDS PX4 firmware Select Firmware to display version information for the firmware components e Select one of the firmware components to load custom firmware when supplied by DALSA engineering for a future feature Click on File Save Device Info to save all information to a text file Email this file when requested by Technical Support DALSA Log Viewer An additional step in the verification process is to save in a text file the information collected by the Log Viewer program Run
57. MAN TELEDYNE DALSA Teledyne DALSA e 7075 Place Robert Joncas Suite 142 St Laurent Quebec H4M 272 Canada www teledynedalsa com X64 Xcelera LVDS PX4 User s Manual Edition 1 05 Part number OC X4LM PUSRO NOTICE 2011 TELEDYNE DALSA Corp All rights reserved This document may not be reproduced nor transmitted in any form or by any means either electronic or mechanical without the express written permission of TELEDYNE DALSA Corp Every effort is made to ensure the information in this manual is accurate and reliable Use of the products described herein is understood to be at the user s risk TELEDYNE DALSA Corp assumes no liability whatsoever for the use of the products detailed in this document and reserves the right to make changes in specifications at any time and without notice Microsoft is a registered trademark Windows Windows 2000 Windows XP Windows Vista are trademarks of Microsoft Corporation All other trademarks or intellectual property mentioned herein belong to their respective owners Edition 1 05 November 11 2011 Document Number OC X4LM PUSRO Printed in Canada Contents X64 XCELERA LVDS PX4 OVERVIEW 5 PRODUCT PART EE 5 ABOUT THE X64 XCELERA LVDS PX4 FRAME 22 7 ACU Plus X64 LVDS Acquisition Control 7 DTE Intelligent Data Transfer 7 User Programmable Configurations eese eene 8 Advanced Controls
58. Manual X64 Xcelera LVDS PX4 Overview e 9 Development Software Overview Saperat LT Library Sapera LT is a powerful development library for image acquisition and control Sapera LT provides a single API across all current and future DALSA hardware LT delivers a comprehensive feature set including program portability versatile camera controls flexible display functionality and management plus easy to use application development wizards Sapera LT comes bundled with CamExpert an easy to use camera configuration utility to create new or modify existing camera configuration files Sapera Processing Library Sapera Processing is a comprehensive set of C classes for image processing and analysis Sapera Processing offers highly optimized tools for image processing blob analysis search pattern recognition OCR and barcode decoding 10 e X64 Xcelera LVDS PX4 Overview X64 Xcelera LVDS PX4 User s Manual Installing X64 Xcelera LVDS PX4 Warning Grounding Instructions Static electricity can damage electronic components Please discharge any static electrical charge by touching a grounded surface such as the metal computer chassis before performing any hardware installation If you do not feel comfortable performing the installation please consult a qualified computer technician Important Never remove or install any hardware component with the computer power on Disconnect the power cord from the computer
59. N output mode 121 Index e 133 VO output modes 113 T O PNP output mode 121 power up state 120 I O sample code 120 I O source code 123 LO Tristate output mode 121 image processing 5 Imaging drivers 39 Industrial level mode 119 input logic level 121 input pin status 122 input pull up resistor 117 L launch exe 11 Line Scan 63 Log Viewer program 41 LUT availability 68 M Maximum common mode voltage 88 96 Maximum Input Current 88 96 memory error 48 78 minimum differential threshold 88 96 multi board syne 111 N NPN mode 117 O onboard memory 48 78 opto coupled input specs 119 out of memory error 33 output sink current 117 output source current 118 P PCI Bus Number 37 PCI configuration registers 37 PCI configuration space 37 40 43 PCI conflict 40 Phase A 63 Phase B 63 physical dimensions 82 PNP mode 118 programming I O flash 121 134 e Index Q Quadrature Shaft Encoder 9 R RS 644 88 96 S Sapera Acquisition Devices 121 Sapera buffers allocation 33 Sapera CamExpert 42 Sapera CD ROM 11 15 Sapera configuration program 16 17 33 Sapera LT Development Library 11 Sapera LT User s manual 11 Sapera messaging 33 scatter gather buffers 34 Scatter Gather 7 serial communication port 16 shaft encoder 9 63 software trigger 42 104 source destination pairs 79 Static electricity 11 114 Status LEDs 20 87 system COM port 16 T technical support 15 19 39 42 tran
60. NT TYPE EXTERNAL TRIGGER IGNORED An external trigger event will be ignored if the rate at which the events are received are higher than the possible frame rate of the camera Start of Frame Event generated during acquisition when the connected sensor video frame start is detected by the board acquisition hardware The Sapera event value is CORACQ VAL EVENT TYPE START OF FRAME End of Frame Event generated during acquisition when the connected sensor video frame end is detected by the board acquisition hardware The Sapera event value is CORACQ VAL EVENT TYPE END OF FRAME Data Overflow The Data Overflow event indicates that there is not enough bandwidth for the acquired data to be transferred without loss This is usually caused by limitations of the acquisition module and should never occur The Sapera event value is VAL EVENT TYPE DATA OVERFLOW 66 X64 Xcelera LVDS PX4 Reference X64 Xcelera LVDS PX4 User s Manual Frame Valid Event generated when the connected sensor video frame start is detected by the board acquisition hardware Acquisition does not need to be started therefore this event can verify a valid signal is connected The Sapera event value is CORACQ VAL EVENT VERTICAL SYNC Pixel Clock Present Absent Event generated on the transition from detecting or not detecting a pixel clock signal The Sapera event values are CORACQ VAL EVENT TYPE NO PIXEL CLK and CORACQ VAL EVENT
61. OM TOP 0x10 ECTION FROM MID 0x20 ECTION FROM BOT 0x40 CORACQ PRM TAP 6 DIRECTION monochrome only CORACQ VAL TAP DIRECTION LR 0x1 CORACQ VAL TAP DIRECTION RL 0x2 CORACQ VAL TAP DIR CORACQ VAL TAP DIR CORACQ VAL TAP DIR CORACQ VAL TAP DIR CORACQ VAL TAP DIR ECTION UD 0x4 ECTION DU 0x8 ECTION FROM TOP 0x10 ECTION FROM MID 0x20 ECTION FROM BOT 0x40 CORACQ PRM TAP 7 DIRECTION monochrome only CORACQ VAL TAP DIRECTION LR 0x1 CORACQ VAL TAP DIRECTION RL 0x2 CORACQ VAL TAP DIR CORACQ VAL TAP DIR CORACQ VAL TAP DIR CORACQ VAL TAP DIR CORACQ VAL TAP DIR ECTION UD 0x4 ECTION DU 0x8 ECTION FROM TOP 0x10 ECTION FROM MID 0x20 ECTION FROM BOT 0x40 CORACQ PRM TAP 8 DIRECTION monochrome only CORACQ PRM PIXEL CLK DETECTION CORACQ VAL TAP DIRECTION LR 0x1 CORACQ VAL TAP DIRECTION RL 0x2 CORACQ VAL TAP DIR CORACQ VAL TAP DIR CORACQ VAL TAP DIR CORACQ VAL TAP DIR CORACQ VAL TAP DIR ECTION UD 0x4 ECTION DU 0x8 ECTION FROM TOP 0x10 ECTION FROM MID 0x20 ECTION FROM BOT 0x40 CORACQ VAL RISING EDGE 0x4 CORACQ VAL FALLING EDGE 0x8 Value set has no effect on the board Selection of the pixel clock detection is done by using the appropriate firmware configuration CORACQ PRM CHANNELS ORDER CORACQ VAL CHANNELS ORDER NORMAL 0x1 CORACQ VAL CHANNELS ORDER REVERSE 0x2 CORACQ PRM LINESCAN DIRECTION Default 1 CORACQ PRM LIN
62. OOFF Device 1 TTL 5 Volts Pin OxOOFF Device 1 TTL 24 Volts Pin 0 00 Device 1 Default Input Level TTL 5 Volts Device 1 Default Connector DB37 Information Firmware Update Firmware Output The XIO information screen shows the status of Device 0 the output device and Device 1 the input device A few items are user configurable for X I O board power up state Click on the item to display a drop list of available capabilities as described below 120 Appendix X I O Module Option X64 Xcelera LVDS PX4 User s Manual Device 0 Default Output Type choose Tristate mode i e output disconnected or PNP mode or NPN mode Device 0 Default Output Pin State A window displays to select a logic low or high state for each output pin Click on each pin that should be logic high by default Device 1 Default Input Level Select the input logic level as TTL 5 Volts or 24 Volts dependent on the signal type input to the X I O module Device 1 Default Connector DB37 is the supported output connector as described in this section Programming the User Configuration After changing any user configurable X I O mode from the factory default state click on the Program button located on the upper left to write the new default state to flash memory The Device Manager Output message window will display Successfully updated EEProm The program can now be closed Using
63. Overview 9 ABOUT THE OPTIONAL Mot 9 DEVELOPMENT SOFTWARE OVERVIEW 0 10 Saperad ALT Tibr rysu e e eege EEN cs 10 Saperda Processing DIbraryiie ERR ONERE 10 INSTALLING X64 XCELERA LVDS PX4 11 WARNING GROUNDING INSTRUCTIONS n enne 11 SAPERA LT LIBRARY INSTALLATION Tl INSTALLING X64 XCELERA LVDS PX4 HARDWARE AND DRIVER 12 In a Windows XP Vista 7 System esee eene eere 12 X64 Xcelera LVDS PX4 Firmware Loge 13 UPGRADING SAPERA OR ANY BOARD DRmwER eese eene 14 Board Driver Upgrade Ob sse 15 Sapera and Board Driver Upgrades 15 ENABLING THE SERIAL CONTROL PORT 16 COM Port 20 2000000000000 16 Setup Example with Windows HyperTerminal seen 17 DISPLAYING X64 XCELERA LVDS PX4 BOARD INFORMATION eene ee 19 Device Manager Board Fiewer 19 LVDS CAMERA CONNECTIONS amp STATUS LEI 20 Camera Connection Examples eese eren 21 One Camera One 8 bit Channel or Ton 21 One Camera Two 8 bit Channels or Tops 22 One Camera Four 8 bit Channels or Jones 23 One Camera Eight 8 bit Channels or Tops 24 One Camera 24 bit RGB iu sesso tnis pat ibo art of call 25 One Camera One 10 bit Channel esset eene eere enitn 26 One Camera Two 10 bit Channels 000010001 27 One
64. PX4 driver allocates two buffers to ensure that the acquired video frame is complete and not corrupted in cases where the transfer to host system memory may be interrupted by other host system processes The total size of the two internal frame buffers must be somewhat smaller than the total onboard memory due to memory overhead required for image transfer management Also note that the X64 Xcelera LVDS PX4 dual configuration equally divides the onboard memory between the two acquisition modules reducing the available memory for the two buffers by half 78 X64 Xcelera LVDS PX4 Reference X64 Xcelera LVDS PX4 User s Manual Sapera Servers amp Resources Servers and Resources The following table describes the X64 Xcelera LVDS PX4 Full board Servers Resources Name Type Name Xcelera LVDS PX4 1 Acquisition Digital Monochrome 1 default firmware Acquisition Digital Color RGB 1 Transfer Resource Locations The following table illustrates all possible source destination pairs in a transfer Source Transfer passing through Destination X64 Xcelera LVDS PX4 Acquisition 1 to 2 internal buffers amp 1 to 2 Host Buffers the X64 internal processor X64 Xcelera LVDS PX4 User s Manual Sapera Servers amp Resources e 79 80 e Sapera Servers amp Resources X64 Xcelera LVDS PX4 User s Manual Technical Specifications X64 Xcelera LVDS PX4 Board Specifications Card Acquisition Feature Resolution
65. RACQ PRM DECIMATE METHOD CORACQ VAL DECIMATE DISABLE 0x1 CORACQ PRM DECIMATE COUNT Default 0 CORACQ PRM LUT ENABLE TRUE FALSE CORACQ PRM LUT NUMBER Default 0 74 X64 Xcelera LVDS PX4 Reference X64 Xcelera LVDS PX4 User s Manual CORACQ PRM STROBE ENABLE TRUE FALSE CORACQ PRM STROBE METHOD CORACQ VAL STROBE METHOD 1 0 1 CORACQ VAL STROBE METHOD 2 0x2 CORACQ VAL STROBE METHOD 3 0x4 CORACQ VAL STROBE METHOD 4 0x8 CORACQ PRM STROBE POLARITY CORACQ VAL ACTIVE LOW 0x1 CORACQ VAL ACTIVE HIGH 0x2 CORACQ PRM STROBE DURATION min 0 us max 65535000 us step us CORACQ PRM STROBE DELAY min 0 us 65535000 us step 1 us CORACQ PRM TIME INTEGRATE ENABLE TRUE FALSE CORACQ PRM TIME INTEGRATE DURATION min 1 us max 65535000 us step us CORACQ PRM CAM TRIGGER ENABLE TRUE FALSE CORACQ PRM CAM RESET ENABLE TRUE FALSE CORACQ PRM OUTPUT FORMAT monochrome mode color RGB mode CORACQ VAL OUTPUT FORMAT MONOS CORACQ VAL OUTPUT FORMAT 16 CORACQ VAL OUTPUT FORMAT 8888 CORACQ VAL OUTPUT FORMAT RGBP8 CORACQ VAL OUTPUT FORMAT RGBP16 CORACQ PRM EXT TRIGGER ENABLE CORACQ VAL EXT TRIGGER OFF 0x1 CORACQ VAL EXT TRIGGER ON 0x8 CORACQ PRM VIC NAME Default Area Scan CORACQ PRM LUT MAX 1 CORACQ PRM EXT TRIGGER DETECTION CORACQ VAL ACTIVE LOW 0x1 CORACQ VAL ACTIVE HIGH 0x2 COR
66. RACQ VA CORACQ VA CORACQ VA CORACQ VA CORACQ VA CORACQ VA CORACQ VA CORACQ VA CORACQ VA CORACQ VA L EVENT TYPE START OF FRAME 0x80000 L EVENT TYPE END OF FRAME 0x800000 L EVENT TYPE EXTERNAL TRIGGER 0x1000000 L EVENT TYPE EXTERNAL TRIGGER 0x80 L EVENT TYPE VERTICAL SYNC 0x2000000 L EVENT TYPE NO PIXEL CLK 0x40000000 L EVENT TYPE PIXEL CLK 0x80000000 L EVENT TYPE FRAME LOST 0x8000 L EVENT TYPE DATA OVERFLOW 0x4000 L EVENT TYPE EXTERNAL TRIGGER IGNORED 0x2000 L EVENT TYPE VERTICAL TIMEOUT 0x40 CORACQ PRM SIGNAL STATUS CORACQ VAL SIGNAL HSYNC PRESENT 0x1 CORACQ VAL SIGNAL VSYNC PRESENT 0x2 CORACQ VAL SIGNAL PIXEL PRESENT 0 4 CORACQ PRM FLAT FIELD ENABLE TRUE FALSE CORACQ CAP SERIAL PORT INDEX Supported X64 Xcelera LVDS PX User s Manual X64 Xcelera LVDS PX4 Reference e 77 Memory Error with Area Scan Frame Buffer Allocation The memory error message Error CorXferConnect Xfer module No memory may occur when loading a Sapera camera file or when the application configures a frame buffer for area scan cameras The problem is that the X64 Xcelera LVDS PX4 does not have enough onboard memory for two frame buffers The X64 Xcelera LVDS PX4 when used with area scan cameras allocates two internal frame buffers in onboard memory each equal in size to the acquisition frame buffer This allocation is automatic at the driver level The X64 Xcelera LVDS
67. RDERING CORACQ VAL BIT ORDERING STD 0x1 CORACQ PRM EXT TRIGGER LEVEL CORACQ VAL LEVEL TTL 0x1 CORACQ VAL LEVEL 422 0x2 CORACQ PRM STROBE LEVEL CORACQ VAL LEVEL TTL 0x1 CORACQ PRM EXT FRAME TRIGGER LEVEL CORACQ VAL LEVEL TTL 0x1 CORACQ VAL LEVEL 422 0x2 CORACQ PRM EXT LINE TRIGGER LEVEL CORACQ PRM INT LINE TRIGGER FREQ MIN CORACQ VAL LEVEL 422 0x2 245 Hz CORACQ PRM INT LINE TRIGGER FREQ MAX 500000 Hz CORACQ PRM MASTER MODE HSYNC POLARITY CORACQ VAL ACTIVE LOW 0x1 CORACQ PRM MASTER MODE VSYNC POLARITY CORACQ VAL ACTIVE LOW 0x1 CORACQ PRM SHAFT ENCODER DROP min 0 tick max 255 tick step 1 tick CORACQ PRM SHAFT ENCODER ENABLE TRUE FALSE CORACQ PRM EXT TRIGGER FRAME COUNT Default 1 frame CORACQ PRM INT FRAME TRIGGER ENABLE TRUE FALSE CORACQ PRM INT FRAME TRIGGER FREQ min 1 milli Hz max 1073741823 milli Hz step 1 milli Hz CORACQ PRM STROBE DELAY 2 min 0 us max 65535000 us step us CORACQ PRM FRAME LENGTH CORACQ VAL FRAME LENGTH FIX 0x1 CORACQ VAL FRAME LENGTH VARIABLE 0x2 CORACQ PRM SHARPNESS 0 0 step 1 CORACQ PRM EXT TRIGGER DURATION min 0 us 65535 ys step us CORACQ PRM TIME INTEGRATE DELAY min 0 us max 65535000 us step us CORACQ PRM CAM RESET DELAY min 0 us max 0 us step 1 us CORACQ PRM CAM TRIGGER D
68. SapDemos dsw Description This program demonstrates Flat Field or Flat Line processing either performed by supporting DALSA hardware or performed on the host system via the Sapera library The program allows you to acquire a flat field or flat line reference image and then do real time correction either in continuous or single acquisition mode The program code may be extracted for use within your own application Remarks This demo is built using Visual C 6 0 and is based on Sapera C classes See the Sapera User s and Reference manuals for more information Using the Flat Field Demo Refer to the Sapera LT User s Manual OC SAPM USER in section Using the Flat Field Demo for more information X64 Xcelera LVDS PX4 User s Manual Sapera Demo Applications 57 58 e Sapera Demo Applications X64 Xcelera LVDS PX4 User s Manual X64 Xcelera LVDS PX4 Reference Full Block Diagram Data Taps 0 to 3 PRIN _ i lt 2x68 pin VHDCI EXSYNC Frame Buffer Memory 128 MB VHDCI 2x 68 pin Data Taps 4 to7 ACU Plus Status Indicator 1 I Status Indicator 2 DTE Destination Data Transfer Engine Buffer Table Dual Strobe Dual Shaft Encoder Opto coupled Dual Trigger In Opto coupled Quad general Inputs Opto coupled Quad general Outputs Opto coupled Control ontrol Aux Slot 10 Controller 1 5A reset
69. Sapera LT General I O Demo The Sapera General I O demo program controls the I O capabilities of the X I O module on the Sapera board product The demo will present to the user only the controls pertaining to the selected hardware in the case of multiple installed boards Run the demo via the windows start menu Start Programs DALSA Sapera LT Demos General I O Demo The first menu presents a drop list of all installed Sapera Acquisition Devices with I O capabilities Select the X64 Xcelera LVDS PX4 board is selected and click OK to continue General I O Module Control Panel The I O module control demo presents the I O capabilities of the installed hardware The following figure shows the X I O module connected to the X64 Xcelera LVDS PX4 board Output Pins The first column displays the current state of the eight output pins I O Device 0 e startup default state is user configured using the Device Manager program e state of each output is changed by clicking on its status button e Use the Signal Output drop menu to select the output mode Tristate PNP NPN X64 Xcelera LVDS PX User s Manual Appendix X I O Module Option 121 Input Pins The second section provides input pin status I O device 1 Note that this program is a demo therefore no action takes place on an input event first column reads the logic level present on each input The Input Level drop menu changes the logic level from 5
70. Shaft Encoder Phase A amp B 1 Shaft Encoder Phase A Shaft Encoder Phase A 2 Shaft Encoder Phase B Shaft Encoder Phase B 3 n a n a use parameter value 0 See J3 External Signals Connector on page 101 for shaft encoder input connector details CVI CCF File Parameters Used External Line Trigger Source prm value External Line Trigger Enable true false Shaft Encoder Enable true false 62 X64 Xcelera LVDS PX4 Reference X64 Xcelera LVDS PX4 User s Manual Shaft Encoder Interface Timing Connector J3 Dual Balanced Shaft Encoder Inputs e Input 1 Pin 23 Phase A amp Pin 24 Phase A see J3 External Signals Connector on page 101 for complete connector signal details e Input2 Pin 25 Phase B amp Pin 26 Phase B e See External Signals Connector Bracket Assembly on page 107 for pinout information about the DB37 used for external connections Web inspection systems with variable web speeds typically provide one or two synchronization signals from a web mounted encoder to coordinate trigger signals These trigger signals are used by the acquisition Line Scan camera The X64 Xcelera LVDS PX4 supports single or dual shaft encoder signals Dual encoder signals are typically 90 degrees out of phase relative to each other and provide greater web motion resolution When enabled the camera is triggered and acquires one scan line for each shaft encoder pulse edge To optimize the web application
71. V Trig In noise filter amp nTrig threshold select SW2 Trig In e For single ended TTL signals the TrigIn pin is connected to ground The threshold point is 10V by default for 24V systems and can be changed to 2V for TTL or low voltage differential with SW2 incoming trigger pulse is software debounced to ensure that no voltage glitch is detected as valid trigger pulse This debounce circuit time constant can be programmed from Ops to 255 8 Any pulse smaller than the programmed value is blocked and therefore not seen by the acquisition circuitry If no debouncing value is specified value of Ous the minimum value of 1us will be used e Fach input has a ferrite bead plus a 650 ohm series resistor on the opto coupler anode e Maximum input signal frequency is 100 KHz e Refer to Sapera parameters CORACQ PRM EXT TRIGGER SOURCE CORACQ PRM EXT TRIGGER ENABLE CORACQ PRM EXT TRIGGER LEVEL CORACQ PRM EXT FRAME TRIGGER LEVEL CORACQ PRM EXT TRIGGER DETECTION EXT TRIGGER DURATION e See also file entries External Trigger Level External Frame Trigger Level External Trigger Enable External Trigger Detection e External Trigger Input 2 used for two pulse external trigger with variable frame length Line Scan acquisition X64 Xcelera LVDS PX4 User s Manual Technical Specifications 103 t I Tri i i External Trigger Opto Coupler Debouncer Validated Tri
72. V TTL to 24V logic Use the Device Manager program to select the default logic level type e second column demonstrates activating interrupts on individual inputs In this demo program use the Enable box to activate the interrupt on an input The Count box will tally detected input events Use the Signal Event drop menu to select which input signal edge to detect The Reset button clears all event counts General 1 0 module Bik General 1 0 0 output 1 General 1 0 1 input r Input Interrupt Output Status Input Status Enable Count 1 HIGH 1 HIGH 2 HIGH 2 HIGH m p 3 3 HIGH i 4 4 HIGH m p 5 Low 5 HIGH a p B LOW 6 HIGH p 7 7 HIGH p 8 8 HIGH p Pa ml E Em 10 10 ses 11 ES 11 rj eal 12 ES 12 Signal Output Reset Tristate z Input Level Signal E vent Power Status 5 Volts Single Ended FalingEde gt Exit 122 Appendix X I O Module Option X64 Xcelera LVDS PX4 User s Manual Sapera LT General I O Demo Code Samples The following source code was extracted from the General I O demo program The comments highlight the areas that an application developer needs for embedding X I O module controls within the imaging application Main I O Demo code BOOL CGioMainDlg OnInitDialog Kess A some declarations UINT32 m gioCount int m ServerIndex int m ResourceIndex Show the S
73. a clean evenly lit white wall or non glossy paper Note the lens iris position for a white but not saturated image This white image is required for the calibration process 50 e CamExpert Quick Start X64 Xcelera LVDS PX4 User s Manual Set up Dark and Bright Acquisitions with the Histogram Tool Before performing calibration verify the acquisition with a live grab Also at this time make preparations to grab a flat light gray level image required for the calibration such as a clean evenly lighted white wall or non glossy paper with the lens slightly out of focus Ideally aim a controlled diffused light source directly at the lens Note the lens iris position for a bright but not saturated image Additionally check that the lens iris closes well or have a lens cover to grab the dark calibration image Verify a Dark Acquisition Close the camera lens iris and cover the lens with a lens cap Using CamExpert click on the grab button and then the histogram button The following figure shows a typical histogram for a very dark image Statistics Histogram 1102026 881621 661216 440810 220405 32 54 35 128 160 152 24 25 Selected view Histogram v Number of bins Color selector Coordinate Statistics Line Line Column Buffer Minimum value 5 Indicates one or more Column Maximum value 191 Tt hot pixels Max Min 186 Average lt T Average dark pixel value Standard deviati
74. ail 2 4 38 40 1 3 m 37 39 J3 Signal Descriptions Description Pin Pin Description Ground 1 2 Ground General Input 0 3 4 General Input 0 see note 1 General Input 1 S 6 General Input 1 General Input 2 7 8 General Input 2 General Input 3 9 10 General Input 3 General Output 0 11 12 General Output 0 see note 2 General Output 1 13 14 General Output 1 General Output 2 15 16 General Output 2 General Output 3 17 18 General Output 3 External Trigger Input 0 19 20 External Trigger Input 0 see note 3 External Trigger Input 1 21 22 External Trigger Input 1 Shaft Encoder Phase A 23 24 Shaft Encoder Phase A see note 4 Shaft Encoder Phase B 25 26 Shaft Encoder Phase B Ground 27 28 Strobe Output 0 see note 5 Ground 29 30 Strobe Output 1 Ground 31 32 Ground Power Output 5 Volts 1 54 max 33 34 Power Output 5 Volts 1 5 max see note 6 Power Output 12 Volts 1 5A max 35 36 Power Output 12 Volts 1 5A max Ground 37 38 Ground Ground 39 40 Ground X64 Xcelera LVDS PX4 User s Manual Technical Specifications 101 Note 1 General Inputs Specifications Each of the four General Inputs are opto coupled and able to connect to differential signals RS422 or single ended TTL source signals These inputs generate individual interrupts and are read by the Sapera application The following figure is typical for each Genera Input FB 650
75. al OC SAPM X64 Xcelera LVDS PX4 User s Manual X64 Xcelera LVDS PX4 Reference 65 Acquisition Methods Sapera acquisition methods define the control and timing of the camera and frame grabber board Various methods are available grouped as Camera Trigger Methods method 1 and 2 supported Camera Reset Methods method 1 supported Line Integration Methods method 1 through 4 supported Time Integration Methods method 1 through 8 supported Strobe Methods method 1 through 4 supported Refer to the Sapera LT Acquisition Parameters Reference manual for detailed information concerning camera and acquisition control methods Supported Events The following acquisition and transfer events are supported Event monitoring is a major component to the Trigger to Image Reliability framework Acquisition Events Acquisition events are related to the acquisition module They provide feedback on the image capture phase External Trigger Used Ignored Generated when the external trigger pin is asserted usually indicating the start of the acquisition process There are 2 types of external trigger events Used or Ignored Following an external trigger if the event generates a captured image an External Trigger Used event will be generated CORACQ VAL EVENT TYPE EXTERNAL TRIGGER If there is no captured image an External Trigger Ignored event will be generated VAL EVE
76. al X I O Module Option X64 Xcelera LVDS PX4 User s Manual X64 Xcelera LVDS PX4 Overview e 7 Important e Older computers may not support the maximum data transfer bandwidth defined for PCI Express x4 e The X64 Xcelera LVDS PX4 board can also be used in a PCI Express x8 slot typically without issue e Refer to the computer documentation if there is only a PCI Express x16 slot Such slots may not support PCI Express x4 products Many computer motherboards only support x16 products in x16 slots x16 slots are used with graphic video boards User Programmable Configurations Use the X64 Xcelera LVDS PX4 firmware loader function in the DALSA Device manager utility to select firmware for one of the supported modes Firmware selection is made either during driver installation or manually later on see Firmware Update Manual Mode on page 13 For the X64 Xcelera LVDS PX4 board the firmware choices are e One LVDS Camera Input Data Sampling on the Rising Edge of the Pixel Clock installation default selection Support for 1 LVDS camera with 1 8 taps Data sampling with this firmware is compatible with the X64 LVDS board e One LVDS Camera Input Data Sampling on the Falling Edge of the Pixel Clock Support for 1 LVDS camera with 1 8 taps Data sampling with this firmware is compatible with driver version 1 00 of the board 8 e X64 Xcelera LVDS PX4 Overview X64 Xcelera LVDS PX4 User s Manual Advanced Controls Overview Visual Indicator
77. alibration procedure as described in this manual e Click on Acquire White Image The flat field demo will grab a video frame analyze the pixel gray level spread and present the statistics The captured gray level for all pixels should be greater than 128 If acceptable select the image as the white reference e Click on Save The flat field correction data is saved as a TIF image file with the name of your choice such as camera name and serial number Using Flat Field Correction From the CamExpert menu bar enable Flat Field correction Tools e Flat Field Correction Enable Now when doing a live grab or snap the incoming image is corrected by the current flat field calibration data for each pixel Use the menu function Tools Flat Field Correction Load to load in a flat field correction image from a previous saved calibration data CamExpert allows saving and loading calibration data for all cameras used with the imaging system 54 e CamExpert Quick Start X64 Xcelera LVDS PX4 User s Manual Sapera Demo Applications Grab Demo Overview Program Program file Workspace NET Solution Description Remarks StartsProgramseDALSAe Sapera LT Demos Frame GrabberseGrab Demo DALSA Sapera Demos Classes vc GrabDemo Release GrabDemo exe DALSA Sapera Demos Classes vc SapDemos dsw DALSA Sapera Demos Classes vc SapDemos_2003 sIn DALSA Sapera Demos Classes vc SapDemos_2005 sIn DALSA Sapera Demos Classes vc SapDemos_2008
78. amera to the 8 bit data port Tap 1 on input connector 1 X64 Xcelera LVDS PX4 User s Manual Installing X64 Xcelera LVDS PX4 e 21 One Camera Two 8 bit Channels or Taps connector 1 tap 1 amp 2 Tap 1 Tap 2 Camera bit 0 bit 1 bit 2 bit 3 bit 4 bit 5 bit 6 bit 7 e J2 connectors 3 amp 4 X64 Xcelera LVDS PX4 J12 connectors 1 amp 2 VVVVVVVV bit 0 bit 1 bit 2 bit 3 bit 4 bit 5 bit 6 bit 7 bit 0 bit 1 bit 2 1 J12 connector bit 5 bit 6 bit 7 bit 0 bit 1 bit 2 bit 3 w pita J12 connector bit 5 bit 6 bit 7 Programmable Control Signals X64 Xcelera LVDS PX4 1 tap 1 1 2 If the camera has two channels or taps that output 8 bits per pixel Connect the camera channel tap 1 to the 8 bit data port Tap 1 on input connector 1 Connect the camera channel tap 2 to the 8 bit data port Tap 2 on input connector 1 22 Installing X64 Xcelera LVDS PX4 X64 Xcelera LVDS PX4 User s Manual One Camera Four 8 bit Channels or Taps E connector 1 tap 1 amp 2 J2 connectors 3 amp 4 l connector 2 tap 3 amp 4 NN X64 Xcelera LVDS PX4 J12 connectors 1 amp 2
79. annel 1 vv lt bit 0 bit 1 bit 2 bit 3 bit 4 bit 5 bit 6 bit 7 X64 Xcelera LVDS PX4 J12 connector 1 tap 1 bit 0 bit 1 J12 connector 1 tap 2 Programmable Control Signals 10 bit Channel 2 Camera bit 0 bit 1 bit 2 bit 3 bit 4 bit 5 bit 6 vvvvvvvv bit 7 bit 8 bit 9 X64 Xcelera LVDS PX4 bit 0 bit 1 bit 2 bit 3 bit 4 bit 5 bit 6 bit 7 X64 Xcelera LVDS PX4 J12 connector 2 tap 3 bit 0 bit 1 J12 connector 2 tap 4 If the camera has two channels that output 10 bits per pixel Connect the camera channel 1 data bits 0 7 to the 8 bit data port Tap 1 on input connector 1 Connect the camera channel 1 data bits 8 9 to the first two bits on data port Tap 2 on input connector 1 Connect the camera channel 2 data bits 0 7 to the 8 bit data port Tap 3 on input connector 2 Connect the camera channel 2 data bits 8 9 to the first two bits on data port Tap 4 on input connector 2 X64 Xcelera LVDS PX4 User s Manual Installing X64 Xcelera LVDS PX4 27 One Camera Four 10 bit Channels connector 3 tap 5 amp 6 B E F n lt
80. aps 5 and 6 J2 Connector 3 Name Type Description VHDCI Pin Number 1 DINe_0 Input BitO Tap 5 35 DINe_0 Input BitO Tap 5 2 DINe_1 Input Bit1 Tap 5 36 DINe_1 Input Bitl 5 3 DINe_2 Input Bit2 Tap 5 37 DINe 2 Input Bit2 5 4 DINe 3 Input Bit3 Tap 5 38 DINe 3 Input Bit3 Tap 5 5 DINe_4 Input Bit4 Tap 5 39 DINe 4 Input Bit4 Tap 5 6 DINe_5 Input BitS Tap 5 40 DINe_5 Input Bit5 5 96 Technical Specifications X64 Xcelera LVDS PX4 User s Manual 9 43 10 44 11 45 12 46 13 47 14 48 15 49 16 50 17 51 18 52 19 53 20 54 21 55 22 56 23 57 24 58 25 59 26 X64 Xcelera LVDS PX4 User s Manual DINe_6 DINe 6 DINe 7 DINe 7 GND DINf 0 DINf 0 DINf 1 DINf 1 DINf 2 DINf 2 DINf 3 DINf 3 DINf 4 DINf 4 DINf 5 DINf 5 DINf 6 DINf 6 DINf 7 DINf 7 GND Reserved Reserved Out12V Out12V STROBEI Input Input Input Input Input Input Input Input Input Input Input Input Input Input Input Input Input Input Input Input Input Input Input Input Input Input Output Output Output Output Output Output Output Output Output Bit6 Tap 5 Bit6 Tap 5 Bit7 Tap 5 Bit7 5 Ground BitO BitO Bitl Bitl Bit2 Tap 6 Bit2 Tap 6 Bit3 Tap 6 B
81. assignment CVI File Details Legacy files using the CVI extension contain all operating parameters related to the frame grabber board what the frame grabber can actually do with camera controls or incoming video The Sapera parameter groups within the file are e Activate and set any supported camera control mode or control variable e Define the integration mode and duration e Define the strobe output control e Allocate the frame grabber transfer ROI the host video buffer size and buffer type RGB888 RGB101010 MONO8 and MONO16 e Configuration of line frame trigger parameters such as source internal via the frame grabber external via some outside event electrical format TTL RS 422 OPTO isolated and signal active edge or level characterization X64 Xcelera LVDS PX4 User s Manual CamExpert Quick Start 49 Camera Interfacing Check List Before interfacing a camera from scratch with CamExpert e Confirm that DALSA has not already published an application note with camera files www dalsa com mv support e Confirm that the correct version or board revision of X64 Xcelera LVDS PXA is used e Confirm that Sapera does not already have a cca file for your camera installed on your hard disk If there 1s a cca file supplied with Sapera then use CamExpert to automatically generate the ccf file with default parameter values matching the frame grabber capabilities e Check if the Sapera installation has a similar
82. ata to input connector 2 See 712 Connector 1 RGB 24 amp RGB 30 Pinout on page 93 and 712 Connector 2 RGB 24 amp RGB 30 Pinout on page 95 for details One Camera One 10 bit Channel connector 1 tap 1 amp 2 J2 connectors 3 amp 4 ERN X64 Xcelera LVDS PX4 J12 connectors 1 amp 2 Camera bit 0 gt bg bit 1 gt bit1 bit 2 H bit2 bit 3 gt bit 3 a n J12 connector 1 tap 1 c bit 5 gt bit5 bite gt bit 6 5 bit 7 H bit 7 ZS X64 Xcelera LVDS PX4 ke bit 8 gt bit 0 bit 9 gt bit 1 J12 connector 1 tap 2 Programmable Control Signals If the camera has one channel that outputs 10 bits per pixel Connect the camera data bits 0 7 to the 8 bit data port Tap 1 on input connector 1 Connect the camera data bits 8 9 to the first two bits on data port Tap 2 on input connector 1 26 e Installing X64 Xcelera LVDS PX4 X64 Xcelera LVDS PX4 User s Manual One Camera Two 10 bit Channels Camera bit 0 bit 1 bit 2 bit 3 bit 4 bit 5 bit 6 bit 7 connector 1 tap 1 amp 2 connector 2 tap 3 amp 4 N J2 connectors 3 amp 4 J12 connectors 1 amp 2 YYY vv vvv bit 8 bit 9 10 bit Ch
83. bit2 J12 bit 3 pita connector 2 tap Pl bits rh bit6 C bit7 X64 Xcelera LVDS PX4 bit 0 CH bit 1 bi Lal 912 connector 2 tap 4 If the camera has two channels that output 12 bits per pixel Connect the camera channel 1 data bits 0 7 to the 8 bit data port Tap 1 on input connector 1 Connect the camera channel 1 data bits 8 11 to the first four bits on data port 2 on input connector 1 Connect the camera channel 2 data bits 0 7 to the 8 bit data port Tap 3 on input connector 2 Connect the camera channel 2 data bits 8 11 to the first four bits on data port Tap 4 on input connector 2 X64 Xcelera LVDS PX4 User s Manual Installing X64 Xcelera LVDS PX4 e 31 One Camera Four 12 bit Channels lll connector 3 tap 5 amp 6 S B i S 7N 2 384 connector 4 tap 7 amp 8 X64 Xcelera LVDS PX4 connector 1 tap 1 amp 2 F i 1 J J12 connectors 1 amp 2 connector 2 tap 3 amp 4 Camera Camera 0 gt bito _ gt bitO bit bit 1 bit 1 gt sti 2 12 4222 bit4 4 9 pita connector 1 tap 1 bit gt pita connector 2 tap 3 gt bitS5 bit 5 N bitS5 r bi
84. connected e Make certain that the camera is configured properly for the required operation This must match the camera configuration file Refer to your camera datasheet e Try to snap one frame instead of continuous grab e Perform all installation checks described in this section before contacting Technical Support 42 Troubleshooting Installation Problems X64 Xcelera LVDS PX4 User s Manual Symptoms Card grabs black You are able to use Sapera CamExpert the displayed frame rate is as expected but the display is always black Set your camera to manual exposure mode set the exposure to a longer period and open the lens iris Try to snap one frame instead of continuous grab Make certain that the input LUT is not programmed to output all 07 A PCle transfer issue sometimes causes this problem No PCle transfer takes place so the frame rate is above 0 but nevertheless no image is displayed CamExpert Make certain that BUS MASTER bit in the PCIe configuration space is activated Look in PCI Diagnostics for the BM button under Command group Make certain that the BM button is activated Perform all installation checks described in this section before contacting Technical Support Symptoms Card acquisition bandwidth is less than expected The X64 Xcelera LVDS PX4 acquisition bandwidth is less than expected Review the system for problems or conflicts with other expansion boards or drivers Remove other
85. des the output power supply voltage 7 volts to 35 volts e Maximum source driver output current is 350 mA e Source driver with over current protection all outputs will shut down simultaneously The over current fault circuit will protect the device from short circuits to ground with supply voltages of up to 35V 118 e Appendix X I O Module Option X64 Xcelera LVDS PX4 User s Manual Opto coupled Input Electrical Details Use the two opto coupled inputs with either TTL or RS422 sources A simplified input schematic and important electrical specification follows Opto Coupled Input DB37 Connector n_Opto_1 N sO n_Opto_1 l5 Input n_Opto_2 m DA Simplified GND n Opto 2 Opto coupled e m N Input E typical 2 places Module Input reverse breakdown voltage 5 volts minimum Maximum average forward input current 25 mA Maximum input frequency 200 kHz Maximum Sapera call back rate System processing dependent TTL Input Electrical Details The six TTL inputs are software configurable see Configuring User Defined Power up I O States on page 120 for standard TTL logic levels or industrial logic systems typically 24 volts The design switch points are as follows TTL level mode trip point at 2V 5 e Industrial level mode trip point at 16V 5 X64 Xcelera LVDS PX4 User s
86. e for the connected camera Sapera camera files contain timing parameters and video conditioning parameters The default folder for camera configuration files is the same used by the CamExpert utility to save user generated or modified camera files Use the Sapera CamExpert utility program to generate the camera configuration file based on timing and control parameters entered The CamExpert live acquisition window allows immediate verification of those parameters CamExpert reads both Sapera cca and cvi for backward compatibility with the original Sapera camera files Grab Demo Main Window The Grab Demo program provides basic acquisition control for the selected frame grabber The loaded camera file ccf defines the frame buffer parameters 56 Sapera Demo Applications X64 Xcelera LVDS PX4 User s Manual 2 Sapera Grab Demo Acquisition Control Snap Grab Exit File Control New Load Save Acquisition Options Load Config General Area Scan General Options Buffer 4 gt Refer to the Sapera LT User s Manual OC SAPM USER in section Demos and Examples Acquiring with Grab Demo for more information on the Grab Demo Flat Field Demo Overview Program StarteProgramssDALSA Sapera LT Demos Frame Grabbers Flat Field Demo Program file DALSA Sapera Demos Classes vc FlatFieldDemo Release FlatfieldDemo exe Workspace DALSA Sapera Demos Classes vc
87. e host system power supply Onboard flash memory to store user defined power up I O states X64 Xcelera LVDS PX4 User s Manual Appendix X I O Module Option e 113 X I O Module Connector List amp Locations J24 X I O revision A2 2 M e m a J20 DB37 female external signals connector 123 16 pin header connector interconnect to the X64 Xcelera LVDS via supplied ribbon cable J21 J22 J24 J28 Reserved J26 Connect PC power via floppy drive power cable X I O Module Installation Grounding Instructions Static electricity can damage electronic components Please discharge any static electrical charge by touching a grounded surface such as the metal computer chassis before performing any hardware installation If you do not feel comfortable performing the installation please consult a qualified computer technician Never remove or install any hardware component with the computer power on 114 e Appendix X I O Module Option X64 Xcelera LVDS PX4 User s Manual Board Installation Installing an X I O Module to an existing X64 Xcelera LVDS PX4 installation takes only a few minutes Install the X I O board into the host system as follows Power off the computer system that has the installed X64 Xcelera LVDS PX4 board Insert the X I O module into any free PCI slot no PCI electrical connections are used securing the bracket Connect the supplied X I O module 16 pin ribbon cable from J23
88. e of 10 Lines The following timing diagram shows the relationship between external Frame_Reset input external Shaft Encoder input one phase used with the second terminated and EXSYNC out to the camera FRAME RESET Shaft Encoder n xev a MONN nin wa Ven Lime n Note In this example 10 lines are acquired The Maximum frame rate Max Line Rate nb lines Hz In Out signal reference is relative to frame grabber CVI File VIC Parameters Used The VIC parameters listed below provide the control functionality for virtual frame reset Applications either load pre configured cvi files or change VIC parameters directly during runtime Note that camera file parameters are best modified by using the Sapera CamExpert program External Frame Trigger Enable X where WVirtual Frame Reset enabled If X 1 External Frame Trigger is enabled If X 0 External Frame Trigger is disabled External Frame Trigger Detection Y where Frame_Reset edge select e If Y 4 External Frame Trigger is active on rising edge If Y 8 External Frame Trigger is active on falling edge External Frame Trigger Level Z where WFrame Reset signal type If Z 2 External Frame Trigger is a RS 422 signal For information on camera files see the Sapera Acquisition Parameters Reference Manu
89. e start menu select Start Settings e Control Panel Programs and Features Double click the DALSA Xcelera board driver and click Remove Follow by also removing the older version of Sapera LT e Reboot the computer and logon the computer as an administrator again e Install the new versions of Sapera and the board driver as if this was a first time installation See Sapera LT Library Installation on page 11 and Installing X64 Xcelera LVDS PX4 Hardware and Driver on page 12 for installation procedures X64 Xcelera LVDS PX User s Manual Installing X64 Xcelera LVDS PX4 e 15 Enabling the Serial Control Port The X64 Xcelera LVDS PX4 includes a serial communication port for direct camera control by the frame grabber The port is available on the VHDCI J12 Connector 1 where pin 32 is serial out and pin 34 is serial in see J12 Dual 68 Pin VHDCI Connectors on page 88 The X64 LVDS driver supports this serial communication port either directly or by mapping it to a host computer COM port Any serial port communication program such as Windows HyperTerminal can connect to the camera in use and modify its function modes via its serial port controls at speeds up to 115 kbps Note if the serial communication program can directly select the X64 Xcelera LVDS 4 serial port then mapping to a system COM port is not necessary Map the X64 Xcelera LVDS 4 serial port to an available COM port by using the Sapera Configuration tool Run the pr
90. erver Dialog to select the acquisition device CGioServer dlg this if dlg DoModal IDOK m ServerIndex dlg GetServerIndex m ServerName dlg GetServerName if m ServerIndex 1 Get the number of resources from SapManager for ResourceGio type by using the server index chosen in the dialog box the resource type to enquire for Gio m gioCount SapManager GetResourceCount m ServerIndex SapManager ResourceGio Create all objects see the function following if CreateObjects EndDialog TRUE return FALSE E ze meu Loop for all resources for UINT32 iDevice 0 iDevice lt MAX GIO DEVICE amp amp iDevice lt m gioCount Legpa direct read access to low level Sapera C library capability to check I O Output module if m_pGio iDevice gt IsCapabilityValid CORGIO CAP DIR OUTPUT status m pGio iDevice GetCapability CORGIO CAP DIR OUTPUT amp capOutput direct read access to low level Sapera C library capability to check I O Input module if m pGio iDevice IsCapabilityValid CORGIO CAP DIR INPUT X64 Xcelera LVDS PX4 User s Manual Appendix X I O Module Option 123 status m pGio iDevice GetCapability CORGIO CAP DIR INPUT amp capInput e ss J Constructor used for I O Output module dialog if capOutput m pDlgOutput iDevice new CGioOutputDlg this iDevice m_pGio iDevice Constructor used f
91. estore Defaults 18 e Installing X64 Xcelera LVDS PX4 X64 Xcelera LVDS PX4 User s Manual Displaying X64 Xcelera LVDS PX4 Board Information The Device Manager program also displays information about the X64 Xcelera LVDS 4 boards installed in the system To view board information run the program via the Windows Start Menu shortcut Start Programs DALSA X64 Xcelera LVDS PX4 Device Driver Device Manager Device Manager Board Viewer The following screen image shows the Device Manager program with the Information Firmware tab active The left window displays all X64 Xcelera LVDS PX4 boards in the system and their individual device components The right window displays the information stored in the selected board device The following screen shows the X64 Xcelera LVDS PXA information pane Generate the X64 Xcelera LVDS PX4 device manager report file BoardInfo txt by clicking File Save Device Info DALSA Technical Support may request this to aid in troubleshooting installation or operational problems F DALSA Device Manager v 3 18 Le s File Device Info Manager Program fn Help E B Device XceleraLVDS_PX4_1 Information Firmware fa ACU DTE PCle x4 Interface Device Info Firmware Update Information Field Issue Revision Vendor ID Last ECO CMI Extension Serial Number 54401043
92. fer The Sapera event value is CORXFER VAL EVENT TYPE END OF NLINES End of Transfer The End of Transfer event is generated at the completion of the last image being transferred from onboard memory into PC memory To complete a transfer a stop must be issued to the transfer module 1f transfers are already in progress If a transfer of a fixed number of frames was requested the transfer module will stop transfers automatically The Sapera event value is CORXFER VAL EVENT TYPE END OF TRANSFER X64 Xcelera LVDS PX User s Manual X64 Xcelera LVDS PX4 Reference e 67 LUT Availability The following table defines the X64 Xcelera LVDS PX4 Output LUT availability Input Pixel Format Bits per Pixel LUT Supported Maximum TAPS Bits frame buffer format Available with LUT 8 8 mono 8 Y 8 10 10 mono 16 Y 4 10 8 mono 8 Y 4 12 12 mono 16 Y 4 12 8 mono 8 Y 4 14 14 mono 16 N 16 16 mono 16 N RGB 8 8 RGB 8888 Y 1 RGB 10 10 RGB 101010 Y 1 RGB 10 8 RGB 8888 Y 1 RGB 12 12 RGB 16161616 Y 1 68 X64 Xcelera LVDS PX4 Reference X64 Xcelera LVDS PX4 User s Manual X64 Xcelera LVDS PX4 Supported Parameters The tables below describe the Sapera capabilities supported by the X64 Xcelera LVDS PX4 i e default firmware is loaded where acquisition device 0 is the monochrome and acquisition device 1 is the color RGB The information here is subject to change Capabilities should be verified b
93. gger m 1 255 8 gt t et t vt Figure 1 External Trigger Input Validation amp Delay Let t et time of external trigger in us time of validated trigger in us t oc time opto coupler takes to change state debouncing duration from 1 to 255us trigger high For an active high external trigger 0 5us t vt 0 5us trigger low For an active low external trigger 4 2 t vt t et 4 2us t d Note DALSA recommends using an active high external trigger which minimizes the time it takes the opto coupler to change state Specifically the opto coupler response time is 0 5us for active high compared to 4 2us for active low If the duration of the external trigger is gt t oc t d then a valid acquisition trigger is detected Therefore the external pulse with active high polarity must be at least 1 5us if debounce time is set to 1 in order to be acknowledged Any pulse larger than 3 2us is considered valid It is possible to emulate an external trigger using the software trigger generated by a function call from an application 104 Technical Specifications X64 Xcelera LVDS PX4 User s Manual Note 4 Shaft Encoder Input Specifications Dual Quadrature Shaft Encoder Inputs phase A and phase B are opto coupled and able to connect to differential signals RS422 or single ended TTL source
94. ine LVAL 16 000 000 lines FVAL 60 X64 Xcelera LVDS PX4 Reference X64 Xcelera LVDS PX4 User s Manual Line Trigger Source Selection for Line Scan Applications Line Scan imaging applications require some form of external event trigger to synchronize Line Scan camera exposures to the moving object This synchronization signal is either an external trigger source one exposure per trigger event or a shaft encoder source composed of a single or dual phase quadrature signal The X64 Xcelera LVDS 4 shaft encoder inputs provide additional functionality with pulse drop or pulse multiply support The following table describes the line trigger source types supported by the X64 Xcelera LVDS PX4 Full Refer to the Sapera Acquisition Parameters Reference Manual for descriptions of the Sapera parameters CORACQ_PRM_EXT_LINE_TRIGGER_SOURCE Parameter Values Specific to the X64 CL series IPRM Value Active Shaft Encoder Input 0 Default 1 Use phase 2 Use phase B 3 Use phase A amp B X64 Xcelera LVDS PX4 User s Manual X64 Xcelera LVDS PX4 Reference e 61 CORACQ_PRM_EXT_LINE_TRIGGER_SOURCE full description relative to trigger type and X64 Xcelera LVDS PX4 configuration used PRM External Line Trigger External Shaft Encoder Value Signal used Signal used if if CORACQ PRM EXT LINE CORACQ SHAFT TRIGGER_ENABLE true ENCODER ENABLE 0 Shaft Encoder Phase A
95. it3 Bit4 Tap 6 Bit4 Tap 6 Bit5 Tap 6 Bit5 Bit6 Tap 6 Bit6 Bit7 Tap 6 Bit7 Ground Shaft Encoder Phase A Shaft Encoder Phase A Shaft Encoder Phase B Shaft Encoder Phase B Reserved Reserved 12 Volt Source fused power off reset 12 Volt Source fused power off reset Reserved Reserved Reserved Reserved Reserved Reserved Strobe control 1 Technical Specifications 97 60 27 61 GND 28 62 29 63 30 64 31 65 32 66 33 67 34 68 Output Output Output Input Input Input Input Input Input Input Input Reserved Ground Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved J2 Connector 4 Monochrome 7 amp 8 Pinout Camera taps 7 and 8 J2 Connector 4 Name Type Description VHDCI Pin Number 69 DINg 0 Input BitO Tap 7 103 DINg 0 Input BitO Tap 7 70 DINg 1 Input Bitl Tap 7 104 DINg 1 Input Bitl 7 71 DINg 2 Input Bit2 Tap 7 105 DINg 2 Input Bit2 7 72 DINg 3 Input Bit3 Tap 7 106 DINg 3 Input Bit3 Tap 7 73 DINg 4 Input Bit4 Tap 7 107 DINg 4 Input Bit4 7 74 DINg 5 Input 5 7 108 DINg 5 Input Bit5 Tap 7 75 DINg 6 Input Bit6 Tap 7 109 DINg 6 Input Bit6 Tap 7 98 e
96. l signal from the master board The master board acquisition is triggered and the acquisition start signal is sent to each slave board with 0 8us delay max Contact Technical Support for additional information X64 Xcelera LVDS PX User s Manual Technical Specifications 111 112 e Technical Specifications X64 Xcelera LVDS PX4 User s Manual Appendix X I O Module Option X I O Module Overview The X I O module requires X64 Xcelera LVDS PX4 board driver version 1 00 or later and Sapera LT version 5 30 or later Occupies an adjacent slot to the X64 Xcelera LVDS PX4 Full Slot can be either PCI 32 or PCI 64 no PCI signals or power are used Connects to the X64 Xcelera LVDS via 16 pin flat ribbon cable J23 on X I O to J11 on X64 Xcelera LVDS PX4 The X I O signals supplement the external signal I O available on the main board The two sets of I O are independent of each other X I O provides 8 outputs software selectable as NPN current sink or PNP source driver type drivers See Outputs in NPN Mode Electrical Details on page 117 and Outputs in PNP Mode Electrical Details on page 118 X I O provides 2 opto coupled inputs See Opto coupled Input Electrical Details on page 119 X I O provides 6 TTL level inputs with software selectable transition point See TTL Input Electrical Details on page 119 X I O provides both 5 volt and 12 volt power output pins on the DB37 where power comes directly from th
97. lation via the Driver Information via the Device Manager Program on page 40 2 slot errors There is a PCI bus error message from the computer bios Follow the instructions SW3 2 2 Slot Workaround Details on page 86 Verify Sapera and Board drivers If there are errors when running applications confirm that all Sapera and board drivers are running See and Hardware Windows Drivers on page 39 for details In addition DALSA technical support will ask for the log file of messages by DALSA drivers Follow the instructions describe in DALSA Log Viewer on page 41 Firmware update error There was an error during the board update procedure The user usually easily corrects this by following the instructions Recovering from a Firmware Update Error on page 39 Installation went well but the board does not work or stopped working Review these steps described in Symptoms CamExpert Detects no Boards on page 42 Possible Functional Problems Driver Information Use the DALSA device manager program to view information about the installed X64 Xcelera LVDS PX4 board and driver See Driver Information via the Device Manager Program on page 40 Sometimes the problem symptoms are not the result of an installation issue but due to other system issues Review the sections described below for solutions to various X64 Xcelera LVDS PXA functional problems Symptoms X64 Xcelera LVDS PX4 Does Not Grab on page 42 Symptoms
98. ludes the vertical horizontal and pixel clock frequency This tab is sufficient to configure a free running camera Advanced Control Parameters Advanced parameters used to configure camera control mode and strobe output Also provides analog signal conditioning brightness contrast DC restoration etc for analog boards External Trigger Parameters Parameters to configure the external trigger characteristics Image Buffer and AOI Parameters Control of the host buffer dimension and format Multi Camera Control Parameters Dependent on the frame acquisition board provides camera selection and color planar transfer selection e Display An important component of CamExpert is its live acquisition display which allows immediate verification of timing or control parameters without the need to run a separate acquisition program Grab starts continuous acquisition button then toggles to Freeze to stop Snap is a single frame grab Trigger is a software trigger to emulate an external source Output Messages and Bottom Status Bar Window displays event and error messages Displays camera connection status where green indicates signal present popup shows a short description of the configuration parameter Click on the button to open the help file for more descriptive information on CamExpert For context sensitive help click on the button then click on a camera configuration parameter A CamExpert Demonstrati
99. memory occurs when loading a Sapera camera file or when the application configures a frame buffer Symptoms CamExpert Detects no Boards If using Sapera version 6 10 or later When starting CamExpert if there are no DALSA board detected CamExpert will start in offline mode There is no error message and CamExpert is functional for creating or modifying a camera configuration file If CamExpert should have detected the installed board troubleshoot the installation problem as described below Troubleshooting Procedure When CamExpert detects no installed DALSA board there could be a hardware problem a PnP problem a PCI problem a kernel driver problem or a software installation problem Make certain the card is properly inserted in PCIe slot e Perform all installation checks described in this section before contacting Technical Support Try the board in a different PCIe slot if available Symptoms X64 Xcelera LVDS PX4 Does Not Grab You are able to start Sapera CamExpert but you do not see an image and the frame rate displayed is 0 e Verify the camera is powered on e Verify the camera and timing parameters with the camera in free run mode e Verify you can grab with the camera in free run mode e Make certain that you provide an external trigger if the camera configuration requires one Use the software trigger feature of CamExpert if you do not have a trigger source e Make certain that the camera cable is properly
100. meters CVI which in turn simplifies programming the frame grabber acquisition hardware for the camera in use Sapera LT 5 0 introduces a new camera configuration file CCF that combines the CCA and CVI files into one file Typically a camera application will use a CCF file per camera operating mode or one CCA file in conjunction with several CVI files where each CVI file defines a specific camera operating mode An 48 e CamExpert Quick Start X64 Xcelera LVDS PX4 User s Manual application can also have multiple CCA CCF files to support different image format modes supported by the camera or sensor such as image binning or variable ROI CCF File Details Files using the CCF extension Camera Configuration files combine the camera CCA and frame grabber CVI parameters into one file for easier configuration file management This is the default Camera Configuration file used with Sapera LT 5 0 and the CamExpert utility CCA File Details DALSA distributes camera files using the CCA extension CAMERA files which contain all parameters describing the camera video signal characteristics and operation modes what the camera outputs The Sapera parameter groups within the file are e Video format and pixel definition e Video resolution pixel rate pixels per line lines per frame e Synchronization source and timing e Channels Taps configuration e Supported camera modes and related parameters e External signal
101. mware The figure below shows the Device Manager manual firmware screen which displays information on all installed X64 Xcelera LVDS PX4 boards their serial numbers and their firmware components X64 Xcelera LVDS PX4 User s Manual Installing X64 Xcelera LVDS PX 13 Perform a manual firmware update as follows e Select the X64 Xcelera LVDS PX4 to update via the board selection box if there are multiple boards in the system e From the Configuration field drop menu select the firmware version required e Click on the Start Update button e Observe the firmware update progress in the message output window e Close the Device manager program when the device reset is complete F DALSA Device Manager v 3 18 ES File Help Firmware Update Manager Start Update Save Config Load Config File K Device Field Value Xcelera LVDS_PX4_1 Serial Number 54401043 Update Firmware Device Version A1 ACU DTE PCle x4 Interface 1 10 01 0214 Configuration Standard Information Support for de camera with 1 to 8 taps Firmware State Update Not Required Device Info Firmware Update ES 16 42 36 Xcelera LVDS_PX4_1 Update of ACU DTE PCle x4 Interface in progress 16 42 38 lt celera LVDS_PX4_1 Successfully updated ACU DTE PCIe x4 Interface 16 42 38 Xcelera LVDS 1 1 4 1 Reset in progress 1 1 1 16 42 41 Xcelera VDS PX4 1
102. n every subsequent reboot of the computer It will determine if the X64 Xcelera LVDS PX4 requires a firmware update If firmware is required a dialog displays which also allows the user to load firmware for alternate operational modes of the X64 Xcelera LVDS PX4 Important the rare case of firmware loader errors please see Recovering from a Firmware Update Error on page 39 Firmware Update Automatic Mode Click Update All to update the X64 Xcelera LVDS PX4 firmware The X64 Xcelera LVDS PX4 currently supports one standard firmware configuration for one LVDS camera If multiple X64 Xcelera LVDS PX4 boards are in the system new firmware will update each board If any installed X64 Xcelera LVDS PXA board installed in a system already has the correct firmware version an update is not required In the following screen shot a single installed X64 Xcelera LVDS PX4 board requires new firmware DALSA Device Manager ex DALSA Device Manager Version 3 18 Select Automatic to update with the Default Configuration Select Manual to update with a Specific Configuration Device Serial Number Configuration Status Xcelera LVDS PX4 1 54401043 Standard Update Required Automatic Manual Cancel Firmware Update Manual Mode Select Edit Configurations mode to load firmware other then the default version or when in the case of multiple X64 Xcelera LVDS PXA boards in the same system each requires different fir
103. nd an installed board to control Possible reasons for firmware loading errors or corruption are e Computer system mains power failure or deep brownout e System PCI bus or checksum errors e PCI bus timeout conditions due to other devices e Users forcing an upload using an invalid firmware source file When the X64 Xcelera LVDS PXA firmware is corrupted executing a manual firmware upload will not work because the firmware loader cannot communicate with the board In an extreme case corrupted firmware may even prevent Windows from booting Solution The user manually forces the board to initialize from write protected firmware designed only to allow driver firmware uploads When the firmware upload is complete reboot the board to initialize in its normal operational mode X64 Xcelera LVDS PX User s Manual Troubleshooting Installation Problems e 39 e Note that this procedure may require removing the X64 Xcelera LVDS PX4 board several times from the computer e Important Referring to the board s user manual in the connectors and jumpers reference section identify the configuration switch location The Boot Recovery Mode switch for the X64 Xcelera LVDS PX4 is SW3 1 see SW3 on page 86 e Shut down Windows and power OFF the computer e Move the switch SW3 1 to ON for the boot recovery mode position The default position is SW3 1 to OFF for normal operation e Power on the computer Windows will boot normally e When Wi
104. ndows has started do a manual firmware update procedure to update the firmware again see Executing the Firmware Loader from the Start Menu on page 14 e When the update is complete shut down Windows and power off the computer e Setthe SW3 1 switch back to the OFF position i e default position and power on the computer once again e Verify that the frame grabber is functioning by running a Sapera application such as CamExpert The Sapera application will now be able to communicate with the X64 Xcelera LVDS PX4 board Driver Information via the Device Manager Program The Device Manager program provides a convenient method of collecting information about the installed X64 Xcelera LVDS PX4 Full System information such as operating system computer CPU system memory PCI configuration space plus X64 Xcelera LVDS 4 firmware information is displayed or written to a text file default file name BoardInfo txt Note that this tool is also used to upload firmware to the X64 Xcelera LVDS PXA Full Execute the program via the Windows Start Menu shortcut Start Programs DALSA X64 Xcelera LVDS PXA Device Driver Device Manager If the Device Manager program does not run it will exit with a message that the board was not found Since the X64 Xcelera LVDS PXA board must have been in the system to install the board driver possible reasons for an error are e Board was removed e Board driver did not start or was terminated e PC
105. nector 4 tap 8 28 e Installing X64 Xcelera LVDS PX4 X64 Xcelera LVDS PX4 User s Manual If the camera has four channels that output 10 bits per pixel Connect the camera channel 1 data bits 0 7 to the 8 bit data port Tap 1 on input connector 1 Connect the camera channel 1 data bits 8 9 to the first two bits on data port Tap 2 on input connector 1 Connect the camera channel 2 data bits 0 7 to the 8 bit data port Tap 3 on input connector 2 Connect the camera channel 2 data bits 8 9 to the first two bits on data port Tap 4 on input connector 2 Connect the camera channel 3 data bits 0 7 to the 8 bit data port Tap 5 on input connector 3 Connect the camera channel 3 data bits 8 9 to the first two bits on data port Tap 6 on input connector 3 Connect the camera channel 4 data bits 0 7 to the 8 bit data port Tap 7 on input connector 4 Connect the camera channel 4 data bits 8 9 to the first two bits on data port Tap 8 on input connector 4 One Camera 30 bit RGB Camera connector 1 Blue amp Green data plus controls Green amp Red data J2 connectors 3 amp 4 J12 connectors 1 amp 2 bit 0 bit 1 bit 2 bit 3 Blue bit 4 channel bit 5 bit 6 bit 7 bit 8 bit 9 bit 0 bit 1 bit 2 bit 3 bit 4 bit 5 Green channel ku ww wv v YY Y Y
106. odule Option on page 113 External Signals Connector Bracket Assembly Type 1 Drawing DB37 Female mounted on bracket 1 40 Flat cable 8 Female Connector is notched for one way insertion External Signals Connector Bracket Assembly Type 1 Pinout The following table defines the signal pinout on the DB37 connector Refer to the table J3 External Signals Connector on page 101 for signal descriptions DB37 Pin Number Signal J3 Connector Pin Number 1 Ground 1 20 Ground 2 2 General Input 0 3 21 General Input 0 4 X64 Xcelera LVDS PX4 User s Manual Technical Specifications 107 3 General Input 1 S 22 General Input 1 6 4 General Input 2 T 23 General Input 2 8 5 General Input 3 9 24 General Input 3 10 6 General Output 0 11 25 General Output 0 12 7 General Output 1 13 26 General Output 1 14 8 General Output 2 15 27 General Output 2 16 9 General Output 3 17 28 General Output 3 18 10 External Trigger Input 0 19 29 External Trigger Input 0 20 11 External Trigger Input 1 21 30 External Trigger Input 1 22 12 Shaft Encoder Phase A 23 31 Shaft Encoder Phase A 24 13 Shaft Encoder Phase B 25 32 Shaft Encoder Phase B 26 14 Ground 27 33 Strobe Output 0 28 15 Ground 29 34 Strobe Output 1 30 16 Ground 31 35 Ground 32 17 5V 33 36 5V 34 18 12V 35 37 12V 36 19 Ground 37
107. ogic for EXSYNC PRIN and strobe signals External trigger latency less than 1 usec Serial port 9600 to 115 kbps Honda 68 for camera board trigger strobe and serial port DB25 or DB37 option for opto coupled GIOs board trigger strobe Technical Specifications 81 I Os Software System Requirements Board Dimensions Opto coupled dual phase quadrature shaft encoder TTL RS 422 with a maximum input frequency of 200 KHz 1 opto coupled external trigger inputs 5V 24V 1 strobe outputs 5V 4 opto coupled general inputs 5V 24V 4 general outputs X IO Interface optional Supported by Sapera LT Microsoft Windows XP 32 64 bit Vista 32 64 bit Intel Pentium IV class CPU 1 GB system memory 20 MB free hard drive space one free PCIe x4 slot Approximately 6 5 in 16 6 cm wide by 4 in 10 cm high Host System Requirements General System Requirements for the X64 Xcelera LVDS PX4 PCI Express x4 slot or x8 slot compatible e Note There is no assumption made that the X64 Xcelera LVDS PX4 will function when installed in a x16 slot Direct testing by the user 1s required Operating System Support Windows XP XP 64 bit Windows Vista Environment Ambient Temperature Relative Humidity 10 to 50 C operation 0 to 70 C storage 5 to 90 non condensing operating 0 to 95 storage Power Requirements 3 3 12 1 92 standby 2 64A during acquisition 0 72
108. ogram from the Windows start menu Start Programs DALSA Sapera LT Sapera Configuration COM Port Assignment The lower section of the Sapera Configuration program screen contains the serial port configuration menu Configure as follows e Use the Physical Port drop menu to select the Sapera board device from all available Sapera boards with serial ports when more then one board is in the system e Use the Maps to drop menu to assign an available COM number to that Sapera board serial port e Click on the Save Settings Now button then the Close button Reboot the computer to enable the serial port mapping The X64 Xcelera LVDS PX4 serial port now mapped to COM3 in this example is available as a serial port to any serial port application for camera control Note that this serial port does not show in the Windows Control Panel System Properties Device Manager e Anexample setup using Windows HyperTerminal follows 16 e Installing X64 Xcelera LVDS PX4 X64 Xcelera LVDS PX4 User s Manual lt Sapera Configuration Server List System 1 Xcelera LYDS_PX4_1 None 4401043 Contiguous Memory Used for allocating buffers Used for allocating messages Requested Requested 5 MBytes 6 MBytes Allocated Allocated 3 MBytes 6 MBytes Serial Ports Physical Port Maps to Serial 0 on Xcelera LVDS_PX4_1 COM2 e Selected physical port is present Camera Link API p
109. on 0 76 Important In this example the average pixel value for the frame is close to black Also note that most sensors will show a much higher maximum pixel value due to one or more hot pixels The sensor specification accounts for a small number of hot or stuck pixels pixels that do not react to light over the full dynamic range specified for that sensor X64 Xcelera LVDS PX4 User s Manual CamExpert Quick Start e 51 Verify a Bright Acquisition Aim the camera at a diffused light source or evenly lit white wall with no shadows falling on it Using CamExpert click on the grab button and then the histogram button Use the lens iris to adjust for a bright gray approximately around a pixel value of 200 for 8 bit pixels The following figure shows a typical histogram for a bright gray image Statistics e See Histogram 83333 4 66666 4 50000 4 333334 16667 4 0 zn T T T T T 0 32 64 ER 128 160 Selected view Histogram m Number of bins Color selector N Minimum should not be black Coordinates Statistics unless there is a dead pixel 4 Line Line Colu Buffer SE Maximum should not be Minimum value 140 2 f 2 peak white unless there is a Column Maximum value 42 hot pixel i e 255 for 8 bit Min 102 1023 for 10 bit Average value 198 Standard deviation 2 Average bright pixel value bright gray but not white
110. on and Test Tools The CamExpert utility also includes a number of demonstration features which make CamExpert the primary tool to configure test and calibrate your camera and imaging setup Display tools include image pixel value readout image zoom and line profiler Functional tools include hardware Flat Field calibration and operation support X64 Xcelera LVDS PX4 User s Manual CamExpert Quick Start 47 Camera Files Distributed with Sapera The Sapera distribution CDROM includes camera files for a selection of X64 Xcelera LVDS PX4 supported cameras Using the Sapera CamExpert program you may use the camera files CCA provided to generate a camera configuration file CCF that describes the desired camera and frame grabber configuration Browse our web site www dalsa com mv support for the latest information and application notes on X64 Xcelera LVDS PX4 supported cameras DALSA continually updates a camera application library composed of application information and prepared camera files Along with the camera search utility on the DALSA web site as described above a number of camera files are ready to download from the DALSA FTP site ftp ftp dalsa com Public Sapera CamFile Updates Camera files are ASCII text and are read with Windows Notepad or any other text file reader on any computer without having Sapera installed CamExpert Memory Errors when Loading Camera Configuration Files The memory error message Error
111. on page 102 SW Assigned to OFF Position ON Position Switch Number C TIL amp low volatage default for 24V differential systems perioral iniput 1 Logic Threshold at 2 general input 2 2 volts Logic Threshold at 3 general input 3 preferred for differential 10 volts signals 4 general input 4 X64 Xcelera LVDS PX User s Manual Technical Specifications e 85 SW5 Trigger Inputs Signal Switch Point For each trigger input select the threshold voltage detected as a logic high signal See Note 3 External Trigger Input Specifications on page 103 SW5 Assigned to OFF Position ON Position Switch Number TIL amp low volatage for 24V systems differential EEN Logic Threshold at 2 trigger input 2 2 volts Logic Threshold at 3 NA preferred for differential 10 volts 4 NA signals SW3 Normal Safe Boot Mode amp GEN2 Slot Workaround The X64 Xcelera LVDS PX4 powers up either in its normal state or a Safe Boot mode required to load firmware under certain conditions See the notes for SW3 1 following the table for details SW3 Assigned to OFF Position ON Position Switch Number default 1 Boot Mode Normal Safe 2 GEN2 Slot Workaround Disabled Enabled 3 reserved 4 reserved SW3 1 Boot Mode Details Normal Mode Board powers up in the normal operating mode Safe Mode With the computer off move the switch to the ON position This mode is required if any problems occurred while upda
112. or I O Input module dialog if capInput m pDlgInput iDevice new CGioInputDlg this iDevice m pGio iDevice end for end if Function CreateObjectsO BOOL CreateObjects CWaitCursor wait Loop for all I O resources for UINT32 iDevice 0 iDevice lt MAX GIO DEVICE amp amp iDevice lt m gioCount The SapLocation object specifying the server where the I O resource is located SapLocation location m ServerIndex iDevice The SapGio constructor is called for each resource found m_pGio iDevice new SapGio location Creates all the low level Sapera resources needed by the I O object if m pGio iDevice amp amp m pGio iDevice amp amp m_pGio iDevice gt Create DestroyObjects return FALSE return TRUE 124 e Appendix X I O Module Option X64 Xcelera LVDS PX4 User s Manual Output Dialog CGioOutputDlg class see Sapera Gui class void CGioOutputDlg UpdateIO UINT32 output 0 UINT32 state 0 BOOL status ae a We loop to get all I O pins for UINT32 110 0 ilO lt UINT32 m pGio gt GetNumPins 11044 Se ae We set the current state of the current I O pin by using the pin number on the current I O resource the pointer to pin state SapGio PinLow if low and SapGio PinHigh if high status m pGio SetPinState ilO SapGio PinState state Input Dialog CGioInputDlg clas
113. ort index Enable DirectShow support Save Settings Now Close Setup Example with Windows HyperTerminal The following instructions apply to Windows XP only Windows Vista and Windows 7 no longer include HyperTerminal but a number of alternatives are available for download by searching the internet e Run HyperTerminal and type a name for the new connection when prompted Then click OK Onthe following dialog select COM port to connect The port could be the COM port mapped to the X64 Xcelera LVDS PX4 or the COM device as shown in this example Connection Description New Connection Enter a name and choose an icon for the connection Name xcelera serial Icon lt s 6 3 EA 3 B xcelera serial Enter details for the phone number that you want to dial Country region United States 1 Area code 666 Phone number Connect using Xcelera LVDS_PX4_1_Serial_0 iv Cancel X64 Xcelera LVDS PX4 User s Manual Installing X64 Xcelera LVDS PX4 e 17 e HyperTerminal now presents a dialog to configure the COM port properties Change settings as required by the camera you are connecting too Note that the X64 Xcelera LVDS PXA serial port does not support hardware flow control Xcelera LVDS PX4 1 Serial 0 Properties 2 Port Settings Bits per second 2o Flow control None R
114. p 1 pixel CORACQ PRM HBACK INVALID min 0 pixel max 16777215 pixel step 1 pixel CORACQ PRM VFRONT INVALID min 0 line max 16777215 line step 1 line CORACQ PRM VBACK INVALID min 0 line max 16777215 line step 1 line CORACQ PRM PIXEL CLK SRC CORACQ VAL PIXEL CLK SRC EXT 0x2 CORACQ VAL PIXEL CLK SRC EXT INT 0x4 CORACQ PRM PIXEL CLK INT min 1 Hz max 85000000 Hz step 1 Hz CORACQ PRM PIXEL CLK 11 20000000 Hz CORACQ PRM PIXEL CLK EXT 1 Hz max 85000000 Hz step 1 Hz CORACQ PRM SYNC CORACQ VAL SYNC SEP SYNC 0x4 CORACQ PRM HSYNC POLARITY CORACQ VAL ACTIVE LOW 0x1 CORACQ PRM VSYNC POLARITY CORACQ VAL ACTIVE LOW 0x1 CORACQ PRM DETECT HACTIVE 0 active pixel per line 70 X64 Xcelera LVDS PX4 Reference X64 Xcelera LVDS PX4 User s Manual CORACQ PRM DETECT VACTIVE 0 lines per field CORACQ PRM TIME INTEGRATE METHOD CORACQ VAL TIME INTEGRATE METHOD 1 0x1 CORACQ VAL TIME INTEGRATE METHOD 2 0x2 CORACQ VAL TIME INTEGRATE METHOD 3 0x4 CORACQ VAL TIME INTEGRATE METHOD 4 0x8 CORACQ VAL TIME INTEGRATE METHOD 5 0x10 CORACQ VAL TIME INTEGRATE METHOD 6 0x20 CORACQ VAL TIME INTEGRATE METHOD 7 0x40 CORACQ VAL TIME INTEGRATE METHOD 8 0x80 CORACQ PRM CAM TRIGGER METHOD CORACQ VAL CAM TRIGGER METHOD 1 0x1 CORACQ VAL CAM TRIGGER METHOD 2 0x2 CORACQ PRM CAM TRIGGER POLARITY
115. p along with a full description of your computer X64 Xcelera LVDS PX4 User s Manual Troubleshooting Installation Problems 37 Diagnostic x r PCI bus 1 0 range Number Bus 2 Range 1 0 0 00000000 0 00000000 METUS Mem Oxf7f00000 Oxt7ttttf Le Pref 0 00000000 0000000 0 000000 0000000 0000000 000000006031 DALSA 2 0 0 Information No conflict in PCI configuration for bus 2 al r Display warnings Save OK Windows Device Manager From the Windows Start Menu select Start Control Panel System Hardware Device Manager As shown in the following screen images look for X64 Xcelera LVDS PX4 board under Imaging Devices Double click and look at the device status You should see This device is working properly Go to Resources tab and make certain that the device has no conflicts By Device Manager In x File Action View Help 1510 amp a Dell380 W7 32 jM Computer cs Disk drives Display adapters eii DVD CD ROM drives 5 Human Interface Devices IDE ATA ATAPI controllers 29 Imaging devices gt X64 Xcelera LVDS 4 Board 22 Keyboards n Mice and other pointing devices Monitors SP Network adapters 7 Ports COM amp LPT D Processors X Sound video and game controllers BR System devices 9 Universal Serial Bus controllers 38 e Troubleshooting Installation Problems
116. r on Driver installation requires administrator rights for the current user of the computer Windows will find the X64 Xcelera LVDS PX4 and start its Found New Hardware Wizard Click on the Cancel button to close the Wizard Insert the DALSA Sapera CD ROM With AUTORUN enabled on your computer the installation menu opens Install the X64 Xcelera LVDS PX4 driver Without AUTORUN enabled use Windows Explorer and browse to the root directory of the CD ROM Execute launch exe to start the installation menu and install the X64 Xcelera LVDS PXA driver During the late stages of the installation the X64 Xcelera LVDS PX4 firmware loader application starts See the following section for a detailed description If Windows displays any unexpected message concerning the installed board power off the system and verify that the X64 Xcelera LVDS 4 is properly installed in the slot When using Windows XP if a message stating that the X64 Xcelera LVDS PX4 software has not passed Windows Logo Testing displays click on Continue Anyway to finish the driver installation Reboot the computer if prompted to do so When using Windows Vista 7 a message asking to install the DALSA device software displays Click Install 12 e Installing X64 Xcelera LVDS PX4 X64 Xcelera LVDS PX4 User s Manual X64 Xcelera LVDS PX4 Firmware Loader After Windows boots the Device Manager Firmware Loader program automatically executes at the end of the driver installation and o
117. rt make detailed notes on your installation and or test results for our technical support to review See Contact Information on page 127 Problem Type Summary X64 Xcelera LVDS PX4 problems either are installation types because the system PCle bus does not recognize the board hardware i e trained or function errors due to camera connections or bandwidth issues The following links jump to various topics in this troubleshooting section First Step Check the Status LED RED Status LED 1 indicates a camera problem while various Green states indicate the acquisition mode Status LED 2 if flashing RED indicates a PCIe bus problem If you run the PCI Diagnostics tool the board is not in the PCI device list If the board is installed in a computer which supports PCIe GEN2 expansion slots see section SW3 2 GEN2 Slot Workaround Details on page 86 The complete status LED description is available in the technical reference section see Status LEDs Functional Description on page 87 X64 Xcelera LVDS PX4 User s Manual Troubleshooting Installation Problems 35 Possible Installation Problems Hardware PCI bus conflict When a new installation produces PCI bus error messages or the board driver does not install it is important to verify that there are no conflicts with other PCI or system devices already installed Use the DALSA PCI Diagnostic tool as described in Checking for PCI Bus Conflicts on page 37 Also verify the instal
118. rved 134 Reserved 101 Reserved 135 Reserved 102 Reserved 136 Reserved 92 e Technical Specifications X64 Xcelera LVDS PX4 User s Manual J12 Connector 1 RGB 24 amp RGB 30 Pinout Pin RGB 24 Type RGB 30 Type l BLUE 0 LSB In BLUE 0 LSB In 35 BLUE 0 LSB In BLUE 0 LSB In 2 BLUE 1 In BLUE 1 In 36 BLUE 1 In BLUE 1 In 3 BLUE 2 In BLUE 2 In 37 BLUE 2 In BLUE 2 In 4 BLUE 3 In BLUE 3 In 38 BLUE 3 In BLUE 3 In 5 BLUE 4 In BLUE 4 In 39 BLUE 4 In BLUE 4 In 6 BLUE 5 In BLUE 5 In 40 BLUE 5 In BLUE 5 In 7 BLUE 6 In BLUE 6 In 41 BLUE 6 In BLUE 6 In 8 BLUE_7 MSB In BLUE_7 In 42 BLUE 7 MSB In BLUE 7 In 9 43 GND GND 10 GREEN 0 In BLUE 8 In 44 GREEN 0 In BLUE 8 In 11 GREEN 1 In BLUE_9 MSB In 45 GREEN 1 In BLUE 9 MSB In 12 GREEN 2 In GREEN 0 In 46 GREEN 2 In GREEN 0 In 13 GREEN 3 In GREEN_1 In 47 GREEN 3 In GREEN 1 In 14 GREEN 4 In GREEN 2 In 48 GREEN 4 In GREEN 2 In 15 GREEN 5 In GREEN 3 In 49 GREEN 5 In GREEN 3 In 16 GREEN 6 In GREEN 4 In 50 GREEN 6 In GREEN 4 In 17 GREEN 7 In GREEN 5 In 51 GREEN 7 In GREEN 5 In X64 Xcelera LVDS PX4 User s Manual Technical Specifications e 93 18 52 19 53 20 54 21 55 22 56 23 57 24 58 25 59 26 60 27 61 28 62 29 63 30 64 31 65 32 66 33 67 34 68 GND Shaft encoder phase A Shaft encoder phase A Shaf
119. s X64 Xcelera LVDS 4 features a LED indicator to facilitate system installation and setup This provides visual feedback indicating when the camera is properly connected and sending data See LVDS Camera Connections amp on page 20 for led color definitions External Event Synchronization Trigger inputs and strobe signals provide precisely synchronize image captures with external events Quadrature Shaft Encoder An important feature for web scanning applications the Quadrature Shaft Encoder inputs allow synchronized line captures from external web encoders About the Optional X I O Module The optional X I O module adds independent general purpose software controllable I O signals to the X64 Xcelera LVDS PX4 The X I O module provides two opto coupled inputs 6 logic signal inputs 5 V or 24V and 8 TTL outputs NPN or PNP type selectable The module also makes available 5V or 12V dc power from the host system Purchase the X I O module preinstalled on the X64 Xcelera LVDS PX4 board or later for installation into the computer system The module occupies one adjacent PCI slot and connects to the X64 Xcelera L VDS PX4 via a ribbon cable X I O Module external connections use the DB37 connector on the module bracket X I O requires X64 Xcelera LVDS PX4 board driver version 1 00 or later and Sapera LT version 6 0 or later See Appendix X I O Module Option on page 113 for details and specifications X64 Xcelera LVDS PX4 User s
120. s see Sapera Gui class BOOL CGioInputDlg Update SapGio PinState state SapGio PinState PinLow BOOL status true UINT32 iIO UINT32 jIO if m pGio NULL return FALSE We loop to get all I O pins for 110 0 ilO lt UINT32 m pGio GetNumPins 11044 m pGio SetDisplayStatusMode SapManager StatusLog NULL We get the current state of the current I O pin by using the pin number on the current I O resource the pointer to pin state SapGio PinLow if low and SapGio PinHigh if high status m pGio GetPinState ilO amp state m pGio SetDisplayStatusMode SapManager StatusNotify NULL La seca 2 X64 Xcelera LVDS PX4 User s Manual Appendix X I O Module Option 125 T O Event Handling void CGioInputDlg GioCallbackInfo SapGioCallbackInfo pInfo CGioInputDlg pInputDlg CString strEventCount We get the application context associated with I O events pInputDlg CGioInputDlg pInfo gt GetContext We get the current count of I O events strEventCount Format d pInfo GetEventCount We get the I O pin number that generated an I O event and apply the changes pInputDlg m GioEventCount pInfo GetPinNumber 126 Appendix X I O Module Option X64 Xcelera LVDS PX4 User s Manual TELEDYNE DALSA A Teledyne Technologies Company Contact Information Sales Information Visit our web site Email Canada
121. sIn This program demonstrates the basic acquisition functions included in the Sapera library The program allows you to acquire images either in continuous or in one shot mode while adjusting the acquisition parameters The program code may be extracted for use within your own application This demo is built using Visual C 6 0 and is based on Sapera C classes See the Sapera User s and Reference manuals for more information Using the Grab Demo Server Selection Run the grab demo from the start menu StartePrograms Sapera LT DemoseGrab Demo The demo program first displays the acquisition configuration menu The first drop menu displayed permits selecting from any installed Sapera acquisition servers installed DALSA acquisition hardware using Sapera drivers The second drop menu permits selecting from the available input devices present on the selected server X64 Xcelera LVDS PX User s Manual Sapera Demo Applications e 55 Location Acquisition Server Acquisition Device Xcelera LVD 5 4 1 52 Digital Mono 1 F Lonfiguration File DALSA SP 1x 02K40 Spyder Free running Default Area Scan 1 tap Mono CADALSA Sapera CamFiles U ser Browse If no Configuration exists for your board camera you must run the CamE xpert utility to generate your Configuration file CCF File Selection Use the acquisition configuration menu to select the required camera configuration fil
122. sfer module 67 trigger 9 63 64 U user defined I O state 113 USER PWR 118 v viewer program 41 virtual frame buffer 64 visual LED indicators 9 W Web inspection 63 Windows HyperTerminal 16 Windows operating system memory 34 workstation 11 15 X64 Xcelera LVDS PX4 User s Manual x X I O field installation 115 X I O module driver update 115 X I O module overview 113 X64 Xcelera LVDS PX4 User s Manual Index e 135
123. t Sapera application run after an installation Previously created ccf files are easily usable with a new Sapera installation when copied into that system CamExpert Example with a Monochrome Camera The image below shows CamExpert with the X64 Xcelera LVDS PX4 The selected camera outputs monochrome 8 bit video After selecting the camera model the default timing parameters are displayed and the user can test by clicking on Grab CamExpert descriptions follow the image X64 Xcelera LVDS PX4 User s Manual CamExpert Quick Start e 45 File View Pre Processing Advanced CameraLink Port Help D SE Device Selector x Device Hg XceleraVDS PX4 1 d Digital Mono 1 d Configuration Camera Library DALSA 5 1 01 40 Spyder Parameters Category Parameter Value Basic Timing Linescan Advanced Control Color Type Monochrome External Trigger Pur B Horizontal Active in Pixels 1024 Image Buffer and ROI Horizontal Offset in Pixels 0 Pixel Clock Input Frequen 40 Pixel Clock Ouput Freque 40 Pixel Clock Source From the Camera Horizontal Sync Polarity Active Low Vertical Sync Polarity Active Low Data Valid Disabled Camera Sensor Geometry One Tap Left to Right Camera Type Video source image type Specifies whether the acquired signal is an area type or a line type Possible Types Area scan video source Linescan video source Refer to Parameter in Manual CORACQ_PRM_SCAN
124. t Source fused power off reset 12 Volt Source fused power off reset Programmable Camera Control 2 Programmable Camera Control 2 Programmable Camera Control 1 Programmable Camera Control 1 Programmable Camera Control 3 Technical Specifications e 89 59 26 60 27 61 28 62 29 63 30 64 31 65 32 66 33 67 34 68 J12 Connector 2 Monochrome 3 amp 4 Pinout Camera taps 3 and 4 cam CC3 STROBEI GND cam LVAL cam LVAL cam FVAL cam FVAL cam DVAL cam DVAL cam PCLK cam PCLK RS 232 Tx cam CC4 cam CC4 RS 232 Rx Output Output Output Input Input Input Input Input Input Input Input Serial Out Output default Pixel clk Output Serial In Programmable Camera Control 3 Strobe control 1 Reserved Ground Camera Line Valid Camera Line Valid Camera Frame Valid Camera Frame Valid Camera Data Valid Camera Data Valid Camera Pixel Clock In Camera Pixel Clock In Reserved Programmable Camera Control 4 Programmable Camera Control 4 Reserved 12 Connector 2 Name Type Description VHDCI Pin Number 69 DINc 0 Input Bit0 Tap 3 103 DINc_0 Input BitO Tap 3 70 DINc_1 Input Bit1 Tap 3 104 DINc_1 Input Bitl Tap 3 71 DINc_2 Input Bit2 Tap 3 105 DINc 2 Input Bit2 Tap3 72 DINc 3 Input Bit3 Tap3 106 DINc 3 Input Bit3 Tap3 73 DINc 4 Input Bit4 Tap3 1
125. t encoder phase B Shaft encoder phase B External Trigger 1 External Trigger 1 12Vout fused power off reset 12Vout fused power off reset CC2 CC2 CC3 CC3 Strobe Control 1 Strobe Control 2 GND LVAL LVAL FVAL FVAL DVAL DVAL PCLK PCLK RS 232 Rx revision B board reserved CC4 CC4 RS 232 Tx revision B board reserved In In In In In In Out Out Out Out Out Out Out Out Out Out In In In In In In In In In Out Out Out GND Shaft encoder phase A Shaft encoder phase A Shaft encoder phase B Shaft encoder phase B External Trigger 1 External Trigger 1 12Vout fused power off reset 12Vout fused power off reset CC2 CC2 CC3 CC3 Strobe Control 1 Strobe Control 2 GND LVAL LVAL FVAL FVAL DVAL DVAL PCLK PCLK RS 232 Rx revision B board reserved CC4 CC4 RS 232 Tx revision B board reserved In In In In In In Out Out Out Out Out Out Out Out Out Out In In In In In In In In In Out Out Out 94 e Technical Specifications X64 Xcelera LVDS PX4 User s Manual J12 Connector 2 RGB 24 amp RGB 30 Pinout Pin RGB 24 Type RGB 30 Type 69 RED_0 LSB In GREEN_6 In 103 RED_0 LSB In GREEN 6 In 70 RED 1 In GREEN 7 In 104 RED 1 In GREEN 7 In 71 RED 2
126. t four bits on data port Tap 4 on input connector 2 Connect the camera channel 3 data bits 0 7 to the 8 bit data port Tap 5 on input connector 3 Connect the camera channel 3 data bits 8 11 to the first four bits on data port Tap 6 on input connector 3 Connect the camera channel 4 data bits 0 7 to the 8 bit data port Tap 7 on input connector 4 Connect the camera channel 4 data bits 8 11 to the first four bits on data port Tap 8 on input connector 4 Configuring Sapera Viewing Installed Sapera Servers The Sapera configuration program Start Programs e DALSA Sapera LT Sapera Configuration allows the user to see all available Sapera servers for the installed Sapera compatible boards The System entry represents the system server It corresponds to the host machine your computer and is the only server that should always be present Increasing Contiguous Memory for Sapera Resources The Contiguous Memory section lets the user specify the total amount of contiguous memory a block of physical memory occupying consecutive addresses reserved for the resources needed for Sapera buffers allocation and Sapera messaging For both items the Requested value dialog box shows the driver default memory setting while the Allocated value displays the amount of contiguous memory successfully allocated The default values will generally satisfy the needs of most applications The Sapera buffers value determines the total amount of con
127. t is 32mA typical Output switching is lt 4 2ns typical Refer to Sapera Strobe Methods parameters CORACQ PRM _ STROBE ENABLE CORACQ STROBE POLARITY CORACQ STROBE LEVEL STROBE METHOD CORACQ PRM STROBE DELAY CORACQ PRM STROBE DURATION See also cvi file entries Strobe Enable Strobe Polarity Strobe Level Strobe Method Strobe Delay Strobe Duration Note 6 DC Power Details Connect the PC floppy drive power connector to J7 so as to supply DC power to a camera Both 5Vdc and 12Vdc are available on J3 or on the DB37 External Signals Bracket Assembly Both the 5Volt and 12Volt power pins have a 1 5 amp re settable fuse on the board If the fuse is tripped turn off the host computer power When the computer is turned on again the fuse is automatically reset 106 Technical Specifications X64 Xcelera LVDS PX4 User s Manual External Signals Connector Bracket Assembly Type 1 The External Signals bracket OC X4CC IOCAB provides a simple way to bring out the signals from the External Signals Connector J3 to a bracket mounted DB37 Install the bracket assembly into an adjacent PC expansion slot and connect the free cable end to the board s J3 header When connecting to J3 make sure that the cable pin 1 goes to J3 pin 1 see the layout drawing X64 Xcelera LVDS PX4 Board Layout Drawing on page 84 Note For additional independent I O signals use the optional X I O module See Appendix X I O M
128. t5 Bad bte bite bte gt bite 2 bit7 bit7 m c c 5 X64 Xcelera LVDS PX4 5 X64 Xcelera LVDS PX4 x bit 8 gt bit 0 bit 8 gt bit 0 a bit 9 gt bit 1 bit 9 gt bit1 As E 2 gU d connector 1 tap 2 connector 2 tap 4 Programmable Control Signals Camera Camera 0 bit D bit 0 bit 1 bit 1 bt rh bit 1 bit2 gt J2 bit 2 bit2 J2 tech bit3 bt3 _ _ gt 44 pita connector tap 5 bit4 J 4 connector 4 tap 7 e bit 5 5 bit 5 gt bit5 m bte bit 6 6 r bit 6 Q bit pit 5 X64 Xcelera LVDS PX4 64 Xcelera LVDS PX4 bit 8 bit 0 bit 8 m bit 0 Q bit 9 bit 1 Q bit 9 bit 1 MS we GE i bit 3 connector 3 tap 6 connector 4 tap 8 32 e Installing X64 Xcelera LVDS PX4 X64 Xcelera LVDS PX4 User s Manual If the camera has four channels that output 12 bits per pixel Connect the camera channel 1 data bits 0 7 to the 8 bit data port Tap 1 on input connector 1 Connect the camera channel 1 data bits 8 11 to the first four bits on data port Tap 2 on input connector 1 Connect the camera channel 2 data bits 0 7 to the 8 bit data port Tap 3 on input connector 2 Connect the camera channel 2 data bits 8 11 to the firs
129. tiguous memory reserved at boot time for the allocation of dynamic resources used for host frame buffer management such as DMA descriptor tables plus other kernel needs Adjust this value higher if your application generates any out of memory error while allocating host frame buffers You can approximate the amount of contiguous memory required as follows e Calculate the total amount of host memory used for frame buffers number of frame buffers number of pixels per line number of lines 2 if buffer is 10 or 12 bits Provide 1MB for every 256 MB of host frame buffer memory required e Add an additional 1 MB if the frame buffers have a short line length say or less the increased number of individual frame buffers requires more resources e Add an additional 2 MB for various static and dynamic Sapera resources X64 Xcelera LVDS PX4 User s Manual Installing X64 Xcelera LVDS PX4 e 33 Test for any memory error when allocating host buffers Simply use the Buffer menu of the Sapera Grab demo program see Grab Demo Overview on page 55 to allocate the number of host buffers required for your acquisition source Feel free to test the maximum limit of host buffers possible on your host system The Sapera Grab demo will not crash if the requested host frame buffers cannot be allocated Host Computer Frame Buffer Memory Limitations When planning a Sapera application and its host frame buffers used plus other Sapera memory
130. ting firmware With the switch in the ON position power on the computer and update the firmware again After the update completes power off the computer and move the switch to the OFF position Power on the computer once again to use the Xcelera LVDS PX4 normally See Recovering from a Firmware Update Error on page 39 SW3 2 GEN2 Slot Workaround Details Normal Mode Normal operation of the Xcelera LVDS PX4 GEN2 Slot Workaround In computers with GEN2 slots and the Intel 5400 chipset there have been circumstances where the board is not detected properly This issue is identified by the status LED 2 that keeps on flashing red at boot time In one example with a Dell T5400 or T7400 computer the following message was displayed by the computer BIOS Alert Error initializing Express slot 86 Technical Specifications X64 Xcelera LVDS PX4 User s Manual e Therefore when using such a computer with the Xcelera SW3 2 in the ON position the computer should boot normally and the Xcelera should function If this is not the case please contact Technical Support Contact Information on page 127 with details about your computer e Note ECO 4252 is needed for SW3 2 to be functional X64 Xcelera LVDS PX4 End Bracket View x LED 2 OO J2 Connector 4 J12 Connector 2 d LED i 55 J2 Connector 3 J12 Connector 1 e Connector 1 is for camera Taps 1 and 2 e Connector
131. to disable the power standby mode This prevents the case where some computers unexpectedly power up when a board is installed Sapera LT Library Installation Note to install Sapera LT and the X64 Xcelera LVDS PX4 device driver logon to the workstation as administrator or with an account that has administrator privileges The Sapera LT Development Library or runtime library if application execution without development is preferred must be installed before the board device driver Insert the DALSA Sapera CD ROM With AUTORUN enabled on your computer the installation menu runs automatically e If AUTORUN is disabled use Windows Explorer and browse to the root directory of the CD ROM Execute launch exe to start the installation menu and install the required Sapera components installation program will prompt you to reboot the computer Refer to Sapera LT User s Manual for additional details about Sapera LT X64 Xcelera LVDS PX4 User s Manual Installing X64 Xcelera LVDS PX4 e 11 Installing X64 Xcelera LVDS PX4 Hardware and Driver In a Windows XP Vista 7 System Turn the computer off disconnect the power cord disables power standby mode and open the computer chassis to allow access to the expansion slot area Install the X64 Xcelera LVDS PX4 into a free PCI Express x4 expansion slot The X64 Xcelera LVDS PX4 could also be installed in a PCI Express 8 Close the computer chassis and turn the compute
132. to the X64 Xcelera LVDS PX4 board Power on the computer again For new X64 Xcelera LVDS PX4 and X I O module installations simply follow the procedure to install Sapera and the X64 Xcelera LVDS PX4 driver start with Installing X64 Xcelera LVDS PX4 on page 11 X64 Xcelera LVDS PX4 and X I O Driver Update If both Sapera and X64 Xcelera LVDS PX4 driver need to be installed follow the procedure Sapera LT Library Installation on page 11 This procedure steps through the upgrade of both Sapera and the board driver typically required when installing the X I O module in the field If the X64 Xcelera LVDS PX4 installation already has the required Sapera and board driver version install the X I O module and perform a firmware update as described in Executing the Firmware Loader from the Start Menu on page 14 X I O Module External Connections to the DB37 Users can assemble their interface cable using some or all of the signals available on the X I O module DB37 Use a male DB37 with thumbscrews for a secure fit Wiring type should meet the needs of the imaging environment For the external signals Trigger Input Shaft Encoder Input and Strobe output now available on the DB37 refer J3 External Signals Connector on page 101 to for signal details X64 Xcelera LVDS PX4 User s Manual Appendix X I O Module Option e 115 DB37 Pinout Description Pin Signal Description 1 IN 1 Inp
133. tput lookup tables available for each mode e Vertical Flip supported on board e Compliant with DALSA Trigger to Image Reliability framework e RoHS compliant See Technical Specifications on page 81 for detailed information ACU Plus X64 LVDS Acquisition Control Unit Provides a flexible front end for interfacing LVDS RS422 cameras ACU incorporates a fault tolerant image synchronization design allowing automatic detection reporting and recovery from lost camera signals ensuring image sequence reliability Embedded timing logic within the ACU Plus identifies each acquired image with a time code DTE Intelligent Data Transfer Engine The X64 Xcelera LVDS PX4 intelligent Data Transfer Engine ensures fast image data transfers between the board and the host computer with zero CPU usage The DTE provides a high degree of data integrity during continuous image acquisition in a non real time operating system like Windows DTE consists of multiple independent DMA units Tap Descriptor Tables and Auto loading Scatter Gather tables PCI Express x4 Interface The X64 Xcelera L VDS PXA is a universal PCI Express x4 board compliant with the PCI Express 1 0 specification The X64 Xcelera LVDS PX4 board achieves transfer rates up to 680 Mbytes sec with all taps used when connected to a corresponding camera or sensor The X64 Xcelera LVDS PX4 board occupies one PCI Express x4 expansion slot and one chassis opening two slots with the option
134. type of camera file A similar cca file can be loaded into CamExpert then modified to match timing and operating parameters for your camera and lastly save them as Camera Configuration file ccf e Finally if Sapera has no applicable camera file run CamExpert after installing Sapera and the acquisition board driver select the board acquisition server and manually enter the camera parameters Using the Flat Field Correction Tool Flat Field Correction is the process of eliminating small gain differences between pixels in a sensor array or from lens elements That sensor when exposed to a uniformly lit field will have no gray level differences between pixels with calibrated flat field correction applied to the image The CamExpert Flat Field tool functions with hardware supporting flat field processing X64 Xcelera LVDS PX4 Flat Field Support The X64 Xcelera LVDS PX4 supports hardware based real time Flat Field Correction with monochrome cameras Important Flat field and flat line correction impose limitations to the maximum acquisition frame rate Please contact the DALSA support group for more details on camera specific maximum supported acquisition rates Loading the Required Camera File Select the required camera configuration file for the connected camera Verify the acquisition with the live grab function Make camera adjustments to get good images Also at this time make preparations to grab a flat gray level image such as
135. ual frame buffer an external frame trigger signal called FRAME_RESET is used The number of lines sequentially grabbed and stored in the virtual frame buffer is controlled by the Sapera vertical cropping parameter Virtual Frame_Reset Timing Diagram The following timing diagram shows an example of grabbing 10 video lines from a Line Scan camera and the use of FRAME_RESET to define when a video line is stored at the beginning of the virtual frame buffer The FRAME_RESET signal generated by some external event is input on the X64 Xcelera LVDS PX4 trigger input FRAME RESET be TTL or RS 422 and be rising or falling edge active e FRAME RESET control is configured for rising edge trigger in this example FRAME RESET connects to the X64 Xcelera LVDS 4 via the Trigger In 1 balanced inputs on connector J3 pin 11 and 12 After the X64 Xcelera LVDS PX4 receives FRAME RESET the EXSYNC control signal is output to the camera to trigger n lines of video as per the defined virtual frame size e The EXSYNC control signal is either based on timing controls input on one or both X64 Xcelera LVDS PX4 shaft encoder inputs see J3 External Signals Connector on page 101 pinout or an internal X64 Xcelera LVDS PX4 clock e The number of lines captured is specified by the Sapera vertical cropping parameter 64 X64 Xcelera LVDS PX4 Reference X64 Xcelera LVDS PX4 User s Manual Synchronization Signals for a Virtual Fram
136. uffer File Formats section RISC Reduced Instruction Set Computer A computer architecture that reduces chip complexity by using simpler instructions 130 Glossary of Terms X64 Xcelera LVDS PX4 User s Manual Scatter Gather Host system memory allocated for frame buffers that is virtually contiguous but physically scattered throughout all available memory Tap Data path from a camera that includes a part of or whole video line When a camera tap outputs a partial video line the multiple camera tap data must be constructed by combining the data in the correct order VIC Sapera camera parameter definition file that uses the file extension CVI by default Files using the CVI extension also know as VIC files contain all operating parameters related to the frame grabber board i e what the frame grabber can actually do with camera controls or incoming video X64 Xcelera LVDS PX4 User s Manual Glossary of Terms 131 132 Glossary of Terms X64 Xcelera LVDS PX4 User s Manual Index A acquisition bandwidth 43 Acquisition events 66 acquisition module 66 acquisition parameters 55 administrator 11 15 AUTORUN 11 Block Diagram 59 BoardInfo txt 19 40 boot recovery mode 40 buffer output supply voltage 118 C cable diagrams 20 calibration information 41 camera configuration file 45 camera connections 21 Camera file 42 50 56 63 65 camera power 20 camera serial port control 16 camera timing 45 CamE
137. ut 1 Opto coupled 20 IN 1 2 2 Input 2 Opto coupled 21 IN 2 3 23 24 Gnd 22 OUT_TTL_1 output 1 4 OUT TIL 2 output 2 S USER PWR Power for the TTL Outputs in PNP mode 6 TrigIn 1 Trigger Input 1 25 TrigIn 1 Trigger Input 1 TTL trigger GND 7 TrigIn 2 Trigger Input 2 26 TrigIn 2 Trigger Input 2 TTL trigger GND 8 Phase A Shaft Encoder Phase A 27 Phase A Shaft Encoder Phase A 9 Phase B Shaft Encoder Phase B 28 Phase B Shaft Encoder Phase B 10 Strobe 2 TTL Strobe 2 output 11 Strobe 1 TTL Strobe 1 output 16 29 30 Gnd 12 Power PC 5V 1A max 31 Power PC 12V max 13 IN TTL 3 Input 3 TTL 32 IN TTL 4 Input 4 14 IN TTL 5 Input 5 33 IN TTL 6 Input 6 15 IN TTL 7 Input 7 34 IN TTL 8 Input 8 35 OUT TTL 3 output 3 17 OUT TTL 4 output 4 36 OUT TTL 5 output 5 18 OUT TTL 6 output 6 37 OUT TTL 7 output 7 19 OUT TTL 8 output 8 116 e Appendix X I O Module Option X64 Xcelera LVDS PX4 User s Manual Outputs in NPN Mode Electrical Details When the outputs are configured for NPN mode open collector sink mode the user is required to provide an external input pull up resistor on the signal being controlled by the X I O output A simplified schematic and important output specification follow NPN Open Collector Output Mode 5V or 24V typical DB37 External Pull up Resistor
138. xpert 56 63 65 CamExpert parameters 47 connector location 114 Contiguous Memory 33 CORACQ EXT LINE TRIGGER DETECTIO N 105 CORACQ PRM EXT LINE TRIGGER ENABLE 105 CORACQ PRM EXT LINE TRIGGER LEVEL 105 CORACQ PRM EXT LINE TRIGGER SOURCE 105 CORACQ PRM EXT TRIGGER DETECTION 103 CORACQ PRM EXT TRIGGER ENABLE 103 CORACQ PRM EXT TRIGGER LEVEL 103 CORACQ PRM SHAFT ENCODER DROP 105 CORACQ PRM SHAFT ENCODER ENABLE 105 CORACQ PRM SHAFT ENCODER LEVEL 105 CORACQ PRM STROBE DELAY 106 X64 Xcelera LVDS PX User s Manual CORACQ PRM STROBE DURATION 106 CORACQ PRM STROBE ENABLE 106 CORACQ PRM STROBE LEVEL 106 CORACQ PRM STROBE METHOD 106 CORACQ PRM STROBE POLARITY 106 D Data Overflow event 66 Data Transfer Engine 7 Device Manager 13 19 40 120 device report 19 double buffering memory 41 driver upgrade 15 E End of Frame event 67 End of Transfer event 67 External Signals Connector 62 63 64 101 107 109 External Signals Connector Bracket Assembly 63 107 109 F failure firmware upgrade 39 Firmware Loader 13 firmware revision 19 firmware selection 8 Flat Field Correction 50 Found New Hardware Wizard 12 frame buffer 33 64 Frame Lost event 67 Frame Sync 65 FRAME RESET 64 HyperTerminal 16 I I O available capabilities 120 I O Device 0 120 I O Device 1 120 I O flash memory 120 I O input event 122 I O input trip points 119 I O interface cable 115 I O interrupts 122 I O NP
139. y includes over 600 optimized image DALSA processing routines X64 Xcelera LVDS PX4 User s Manual X64 Xcelera LVDS PX4 Overview e 5 X64 Xcelera LVDS PX4 Cables amp Accessories optional X64 Xcelera LVDS 4 shipped with an External Signals Connector Bracket Assembly either with a DB37 or DB25 connector see the two product numbers below Specify either cable if required at the time of order Note clients requiring more I O connections must add the optional X I O Module DB37 assembly see External Signals Connector Bracket Assembly Type 1 on page 107 OR X4CC IOCAB This cable assembly connects to J3 DB25 assembly see External Signals Connector Bracket Assembly Type 2 on page 109 OR X4CC 0TIO2 Provides direct compatibility with external cables made for products such as the X64 CL iPro This cable assembly connects to J3 DB25 male to color coded blunt end cable 6 foot 1 82 meter length OC COMC XENDI optional Power interface cable required when supplying power to cameras OR COMC POW03 6 X64 Xcelera LVDS PX4 Overview X64 Xcelera LVDS PX4 User s Manual About the X64 Xcelera LVDS PX4 Frame Grabber Key Features e Legacy support for LVDS area and Line Scan monochrome and RGB digital cameras EIA 644 e Single slot solution for cameras with up to 8 taps Pixel clock 1 Hz to 85 MHz Half length PCIe x4card compliant with PCIe Rev 1 1 e Flat Field Flat Line Correction e Ou
140. y the application because new board driver releases may change product specifications Specifically the X64 Xcelera LVDS PXA family is described in Sapera as e Board Server Xcelera LVDS 4 1 Acquisition modules available are select one or the other Acquisition Device 0 Digital Monochrome Acquisition Device 1 Digital Color RGB Camera Related Capabilities Capability Values CORACQ CAP CONNECTOR TYPE CORACQ VAL CONNECTOR CONTROL 0x4 CORACQ CAP CONNECTOR CONTROL Pin 01 CORACQ VAL SIGNAL NAME NO CONNECT 0x1 CORACQ VAL SIGNAL NAME PULSEO 0x8 CORACQ VAL SIGNAL NAME PULSE 0x10 CORACQ VAL SIGNAL NAME GND 0x4000 CORACQ CAP CONNECTOR CAM CONTROL Pin 02 CORACQ VAL SIGNAL NAME NO CONNECT 0x1 CORACQ VAL SIGNAL NAME PULSEO 0x8 CORACQ VAL SIGNAL NAME PULSE 0x10 CORACQ VAL SIGNAL NAME GND 0x4000 X64 Xcelera LVDS PX User s Manual X64 Xcelera LVDS PX4 Reference e 69 Camera Related Parameters Parameter Values CORACQ PRM CHANNEL monochrome and RGB monochrome CORACQ VAL CHANNEL SINGLE 0x1 CORACQ VAL CHANNEL DUAL 0x2 CORACQ PRM FRAME CORACQ PRM INTERFACE CORACQ VAL FRAME PROGRESSIVE 0x2 CORACQ VAL INTERFACE DIGITAL 0x2 CORACQ PRM SCAN CORACQ VAL SCAN AREA 0x1 CORACQ VAL SCAN LINE 0x2 CORACQ PRM SIGNAL CORACQ VAL SIGNAL DIFFERENTIAL 0x2 CORACQ PRM VIDEO CORACQ VAL VIDEO MONO 0x1 CORACQ VAL VIDEO RGB 0x

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