Service Manual Model 6400 Cardridge Tape Drive
Contents
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3. Y then press carriage return CR VDT displays 1 1 DESCRIPTION OF TEST ENTER TAPE CARTRIDGE UNIT TO TEST Cf C3 Type Cf then press carriage return CR VDT displays HOW MANY ERRORS TO BE DISPLAYED ON VDT Type 10 then carriage return CR At the completion of the test approximately 10 minutes the VDT shall display DO YOU WANT TO TEST ANYMORE TAPE CARTRIDGE UNITS Y N Type N then press carriage return CR 2 7 3 MAINTENANCE 3 1 CORRECTIVE MAINTENANCE 3 1 1 GENERAL PHILOSOPHY This chapter contains information which will aid the Service Engineer in troubleshooting the MTCD 3 2 TROUBLESHOOTING PROCEDURES A typical sequence used to isolate the trouble to a replaceable module or PCB is as follows e Collect information about the malfunction e Examine the unit to see if power is applied Examine for a blown ac line fuse e Decide if the malfunction is in the MTCD or the Controller e If the 15 bad switch OFF power and open the cabinet e Examine for loose connectors or broken wires e Examine for broken or burned parts If the malfunction is located correct it 3 3 FUNCTIONAL DESCRIPTION The MTCD functions within a system as a backup read and write memory device The record mode is four serial Data and control signals are received via interface 1 0 cable connecting the to the CPU The two major functional systems of the MTCD are the
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6. 2 The Controller is a complete link between the computer program and the tape unit The Controller performs command decoding tape start stop timing generation tape record formatting tape position status reporting and interrupt control As such it is a combination of Controller Formatter The Controller is designed around a Z80 MOS Microprocessor The three major functional logic blocks begin with the microprocessor logic A3 1 1 MICROPROCESSOR LOGIC Memory addressing and I O ranges are limited by design to be sufficient for use in this environment The Microcomputer is comprised of the Z80 clock generator buffers for 280 address and control line memory bank 1 0 decoders The clock circuit divides the 5 megahertz CPU clock CPH2 by two creating a 2 5 megahertz square wave clock This clock is driven to most other clocked functions on the board The buffers increase the drive capability of the Z80 outputs to drive the multiple TTL loads on the Controller The memory bank decoder 6L translates Z80 address bits 9 10 and 11 into eight 512 byte bank select lines address lines 12 thru 15 are not connected the memory address space consists of 4 kilobytes By convention the firmware for the Controller places this 4 kilobyte space in addresses 0000 thru The address decoder is 16 6 enabled by the 280 MREQ signal creating unique enable outputs from the decoder These select lines
7. Service Manual Model 6400 Cartridge Tape Drive 4 Proprietary Information The information contained herein is proprietary to and considered a trade secret of Basic Four Corporation rights reserved No part of this publication may be reproduced recorded or stored in a retrieval system or transmitted in any form or by any means whether electronic mechanical photographical or otherwise without prior written permission of Basic Four Corporation All specifications are subject to change without notice Basic Four and Sf ana MAI are registered trademarks of Management Assistance Inc Copyright 1979 O by Basic Four Corporation Reprinted August 1979 Revised June 1980 BFC 8015B Printed in the United States of America Basic Four Corporation A Management Assistance Inc Company 14101 Myford Road Tustin California 92680 714 731 5100 TABLE OF CONTENTS Page CHAPTER 1 INTRODUCTION 1 1 General Description 1 1 1 2 Purpose i 1 2 1 5 Physical Description 1 2 1 3 1 Tape Drive Transport 1 2 1 3 1 1 Magnetic Head Assembly 1 3 1 3 1 2 Switch Sensor Assembly 1 3 Heat Sink Assembly 1 3 1 3 1 4 Tape Cleaner 1 3 1 3 2 Magnetic Tape Cartridge 1 4 1 4 MTCD Specifications 1 7 CHAPTER 2 INSTALLATION AND OPERATION 2 1 Unpacking Packing Procedure 2 1 2 1 1 Transport 2 2 Preinstallation Checks ASZ 2 2 1 Installing a Transpo
8. Track Number binary coded number of the track selected during performance of the command This will always agree to the TR field in the command except that TR will always be 0 for a rewind termination Unit Number The number of the unit or test associated with the interrupt 5 1 REFERENCE DATA SECTION 5 REFERENCE DATA 5 1 5 2 Sheet 1 of 3 2 of 3 3 of 3 Major Flow Diagrams Contents Control Structure Non Data Transfer Commands Data Transfer Commands RESET Power On Self Test Rom START Controller Initialize S Sheet 2 3 EXEC Executive Command Received Rewind Comple ECMDD Command Decode 0 Sheet 3 3 Queve nterrup Interrupt Interrupt Sheet 2 2 Disabled External Interrupt A5 3 Control Structure Sheet 1 of 3 19445 i 49245 5 vivudd 8114 23130 40 93148 1 39945 TIELT 5 m dvi 2113 43138 qi 39948 de 4 1 29945 3223044 9113 13044 X 194300 3591 sa 19949 40 49d 42018 58 245 1043093 501915 yous 5 39945 389 1910245 E 821195 3541 30N 195 JON S TA lt s gt 201 mm 2203 49301 043402 Nen
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10. Tape Cleaner should be cleaned the same schedule as the head To clean insert a folded sheet of paper in the bottom of the cleaning slot of the cleaner Slide the paper up lifting the foreign material from the cleaner A soft brush may be used to remove the foreign material from the area around the tape CAUTION Do not use metal objects to clean the Tape Cleaner If the Tape Cleaner should become scratched it could scratch the tape surface resulting in lost data cleaner and head assembly 3 5 3 MOTOR CAPSTAN CLEANING The Capstan is composed of hard polyurethane and must be cleaned after foreign material has built up Clean using Freon and a lint free cloth cleaning schedule should be the same as for the head CAUTION Be careful not to permit cleaning solvent to drip into the drive motor bearings as it will result in a failed component 3 8 4 REMOVAL REPLACEMENT PROCEDURE 4 1 SPARE PARTS LIST TABLE 4 1 SPARE PARTS 160189 MDX 04 000 FUSE 4A MDX SB 160190 MDA 12 000 FUSE 12A MDA 610010 B903030 PCB CART TAPE CONTROLLER 610020 NB903040 PCB CART TAPE POWER SUPPLY 610710 900960 002 CABLE CARTRIDGE TAPE 611000 902761 001 TAPE DRIVE TRANSPORT 617010 345002 FAN COOLING 617020 100321 SWITCH TOGGLE 617030 180007 001 TRANSFORMER 737020 181003 RFI FILTER 4 2 REMOVAL REPLACEMENT PROCEDURE This section explains the procedure to remove the major spared ass
11. 2 Converting From 110V to 220V LIST OF TABLES Table 1 1 Specifications 2 1 Sense Switch Settings CPU 4 1 Spare Parts Page Page rab dm eos 1 INTRODUCTION 1 1 GENERAL DESCRIPTION The Model 6400 Magnetic Tape Cartridge Drive MTCD records at 6400 bpi with a 9 2 megabyte tape cartridge The recording format is four track serial with a data transfer rate in both the read and write mode of 192 000 bits per second integral tape cleaner is provided Track selection is performed by the Controller located in the CPU card cage The MICD provides backup data storage capability and an economical means of off line storage of selected data see Figure 1 1 Figure 1 1 Magnetic Tape Cartridge Drive MTCD 1 2 PURPOSE This Service Manual is the primary source of information for first level maintenance It contains the necessary information to repair and maintain the This manual contains both physical and functional descriptions installation operations maintenance procedures and equipment supplied This information shall enable a Service Engineer to identify isolate and repair the MTCD 1 3 PHYSICAL DESCRIPTION The MTCD is packaged as a single unit and is directly connected to the CPU main frame and placed top of the cabinet MTCD is made up of a cabinet power supply tape drive and a ANSI magnetic tape cartridge The Cabinet contains a standard
12. 5 ce Figure 1 2 A1 2 22727275 25 2 RZ WAS 7270 4 ON ADDED AT 58 JEMA NGEO rcs 47 20 46 OF 1 REWORK TO 624 924259 Ec C CARTS D REV ITEM 55 f UNLER OTHERWISE SPECIFIED 1336 Peary Anehe Leeds 101 802020 Controller PCB The Tape Unit Interface Signal List is contained in Table AI 1 TABLE Al 1 UNIT INTERFACE SIGNAL LIST Drive Selected Drive Ready Drive Write Enabled Drive Flag Drive Load Point Sensed Drive File Unprotected Drive Busy Drive Early Warning Sensed Controller Rewind Controller Reverse Controller Forward Controller High Speed Controller Write Enable Controller Unit Select 29 Controller Unit Select 2 Controller Unit Select j Controller Select Gate Drive Read NRZ Data Drive Read Data Strobe Drive Data Selected Controller Write Data Enabled Controller Write NRZ Data Controller Track Select 21 Drive Write Data Strobe Controller Track Select 29 The MTCD pin to pin listing of the interface cable is shown in Figure 2 4 1 3 The Computer Interface Signal List is contained in Table 1 2 TABLE 1 2 COMPUTER INTERFACE SIGNAL LIST Signal Name Type A Pin Master Reset TTL Input A 6 B 44 Cloc
13. Power Supply and Transport The Transport contains two sub functions they are Tape Motion Control and Read Write Operations 3 3 1 POWER SUPPLY The Power Supply is an open frame multi output power supply which supplies the Transport with its required dc voltages Tap changes on the Transformer T1 give the following ranges over a frequency range of 47 to 63 hertz see Figure 2 2 100 105 VAC 200 10 VAC 110 10 220 10 115 10 230 105 120 105 240 105 The Power Supply outputs the following voltages including a regulated 5 0 volts dc 0 1V Measure voltage at PCB Adjust RS for correct level 5V 8 2 6A 24V 8 1 5A with 3 5A surge up to 80 milliseconds 24V 8 1 5A with 3 5 surge up to 80 milliseconds A crowbar overvoltage circuit is provided on the 5 volts output The crowbar trips above 6 5 volts dc 3 3 2 TRANSPORT The Transport is made up of three assemblies and five PCBs dividing the Transport into two sub functions The two sub functions are Tape Motion Control and Read Write Operations The assemblies and PCBs are Assemblies Printed Circuit Boards Magnetic Head Interconnect Board Switch Sensor Data Circuit Board Heat Sink Interface Board Encoder Decoder Board Servo Board 3 2 5 3 3 SUB FUNCTIONS OF THE TRANSPORT A functional description of the assemblies and PCBs that make up the Transport are best explained in the following sub fu
14. Speed HSP true enables the 500 millivolts threshold The Read envelope threshold detector is used to produce the Data Detected DAD signal After the selected track on the read heads have been determined the Read Data is input to a read amplifier which amplifies the data to approximately 250 millivolts and filtered by a low pass network This MFM data plus the Data Detected signal is sent to the Encoder Decoder Board via a line driver The Read Data decoding stages of the Encoder Decoder Board include a desnake circuit which eliminates data dropouts during periods of no transition a phase lock servo a timing pulse generator consisting of four one shots whose pulse widths are controlled by the servo output and a data acquisition circuit which strips the preamble and a Read Data Strobe generator The timing pulse generator four one shots produce four sampling pulses of variable width Each pulse is timed by the phase lock servo to equal one quarter of the bit cell This division helps the detection of the mid bit transition which is peculiar to one data bits of the MFM code Depending on the data pattern two of the sampling pulses EO A and E1 A which represent 0 and 1 data bits are applied to the data acquisition network This network develops the NRZ data The Read Data Strobe is developed by a flip flop nand gate combination that automatically eliminates the all ones read preamble by disabling the Read Data
15. ac to dc power supply refer to Chapter 2 Preinstallation Checks for 115 volts ac to 230 volts ac conversion transparent window is provided for visual inspection of the cartridge during normal operation The opening for the tape cartridge is directly below the window 1 3 1 TAPE DRIVE TRANSPORT The Tape Drive Transport hereafter referred to as Transport will record and reproduce data onto and from Magnetic Tape Cartridges The Transport consists of three subassemblies Magnetic Head Assembly Switch Sensor Assembly and Heat Sink Assembly Transport also contains a tape cleaner capstan drive motor tachometer and houses the PCBs 1 2 1 3 1 1 Magnetic Head Assembly The Magnetic Head Assembly consists of a closed magnetic circuit This circuit is built of laminated high permeability metal with wound coils for inducing and detecting flux reversals is constructed as a dual gap with erase head read while write while erase Control signals are received from the Controller located in the CPU card cage via an interface cable which enables it to write or erase as required 1 3 1 2 Switch Sensor Assembly The Switch Sensor Assembly contains circuitry to sense Beginning of Tape BOT End of Tape EOT Load Point LP and Early Warning EW This enables automatic tape positioning after cartridge insertion power on or a rewind operation It further contains the File Protect and Cartridge In Place switches 1 5 1 5 He
16. is taking data The low or true strobe period is 5 2 5 psec 5 4 APPENDIX MAGNETIC TAPE CARTRIDGE CONTROLLER APPENDIX SECTION 1 Al Al Al Al Al Al Al Al gt DY ND SECTION 2 A2 1 SECTION 3 AS HH RH WNN ES 4 4 1 4 2 5 5 1 TABLE OF CONTENTS MAGNETIC TAPE CARTRIDGE CONTROLLER INTRODUCTION General Description Physical Description Firmware Description Control Structure Command Sequencing Physical Requirements General Specifications Options INSTALLATION General Description MAINTENANCE General Description Microprocessor Logic Computer Interface Logic Magnetic Tape MTCD Interface Logie Functional Parameters RECOMMENDED SPARE PARTS GLOSSARY Recommended Spare Parts List Glossary of Mnemonics REFERENCE DATA Reference Data Page Al 1 1 1 1 7 1 7 Al 8 1 10 1 10 Al 12 A2 1 1 A3 2 A3 4 5 A3 6 A4 1 A5 1 iii Figure Al 1 1 2 1 Table Al 1 1 2 1 3 4 1 iv LIST OF ILLUSTRATIONS Magnetic Tape Cartridge Controller Interface Cabling Controller PCB jy Ue rouge RI UR Cartridge Tape Controller Block Diagram LIST OF TABLES Tape Unit Interface Signal List Computer Interface Signal List
17. of the 280 Note that the Read Write Memories which are very 1 MOS parts connect to the actual 780 bus 11 other parts are connected to the high fanout bus The following tasks are performed by microprocessor logic 1 Decode of all commands 2 Monitoring and posting tape unit status 5 Generation of all tape unit control signals and timing 4 Formatting of records written on tape 5 Byte by byte control of data transfers 6 Initiation of interrupts The detailed control for each of the Controller operations resides in read only memory resident firmware routines A minimal amount of Random Access Memory is provided for scratch pad use by the firmware A3 3 A3 1 2 COMPUTER INTERFACE LOGIC This is composed of two parts Programmed I O and Direct Memory Access DMA Programmed I O The Programmed I O logic is used to receive and latch commands from the Basic Four CPU hereafter called CPU It also holds and reports status to the CPU It decodes and latches the Initial Program Load IPL bus cycle and performs the external interrupt function to the CPU The Programmed I O logic does not operate on commands and status in any way It serves only as a holding function and provides the response time necessary to participate in the CPU bus cycles which the Z80 cannot respond to directly The content of the command and status data bytes is controlled entirely by Z80 firmware DMA The DMA Direct Me
18. passed to EFM where tape motion is stopped a File Mark Status is posted and control is passed to SQINT If not a File Mark control is passed to ESPI to wait for the record to pas If the command is a Forward File or Reverse File command then the firmware loops to space over the next record until a File Mark is reached If a Forward Record or Reverse Record command tape motion is stopped normal status is posted and control is passed to SQINT Data Transfer Commands The following routines perform the read write and data test command set of the Controller EWRT Write Write Gap Write File Mark All write oriented commands enter this routine Write Gap and Write File Mark proceed similarly to the space commands see ESP above except that 1 the Tape Unit s Write Enab line is activated prior to initiating tape motion 2 the INIT flip flop is toggled to reset the write bit counter and various control terms in the tape unit interface logic and 3 the last flip flop is set in preparation for initializing the write CRC generation chip Then based on the command code either EWG or EWRT2 is entered EWG Write Gap this routine Simply delays enough time for about 4 inches of tape to be erased Tape is stopped their SQINT is called EWRT2 Write File Mark see the discussion of this routine below for the Write command For Write Data start up is different The firmware must fetch the control block from main frame
19. the inner parts of the MTCD When installing the Transport proceed as follows o If unit is still plugged in 1 Set ON OFF switch on rear of lower cover to OFF 2 Remove ac power plug from ac outlet o Remove cables from Cartridge Tape Drive Power Supply located at J1 and J3 o Lift out the PCB Cartridge Tape Drive Power Supply and set aside o Place Transport in lower cover 2 2 VENDOR VERSION LINE FILTER LFI 100 V NEP 005 006 007 008 HSV REF O0 UNE FILTER 220 REF 002 f 004 VERSION INPUT ON OFF BLK 4 LINE FILTER LF 100 REF 005 006 007 LINE FILTER 54 HSV REF O01 009 LINE FILTER 220 REF f 004 Figure 2 2 Converting From 100V to 220V Clean heads carefully Spray type head cleaners are not recommended as they may contaminate the drive motor lubricant Cleaning the head with hard metal objects will result in permanent head damage The Tape Cleaner may be cleaned with a folded sheet of paper Insert the folded paper into the open slit and move the paper up down twice Install the transparent window and insert a cartridge Look through the transparent window and observe tape motion should move forward approximately one second and then reverse to BOT 2 Grasp the tape cartridge firmly wit
20. 0 0 to 0 4 V equals logic low 2 4 to Vcc equals logic high All lines exceeding 2 feet will terminate with 220 ohm pull up resistors and 333 ohm pull down resistors 65 F to 75 F 18 C to 25 C 40 to 60 non condensation 500 to 7 000 feet above sea level 500 to 30 000 feet above sea level 1 11 Al 4 OPTIONS This Page Left Intentionally Blank A1 12 SECTION 2 INSTALLATION A2 1 GENERAL DESCRIPTION The installation procedures are explained in the System Manual and the installation They are therefore not repeated here 1 This Page Left Intentionally Blank SECTION 3 A3 1 GENERAL DESCRIPTION Maintenance of the Controller is limited to replacement of the Controller itself This section will explain the Controller function only as an aid to the Service Engineer in troubleshooting A Functional Block Diagram is shown in Figure A3 1 Bus Wire gt 4 gt PRA gt e a 3 a gt a 33 118 Bus cec de w x ou E 7 47 3171 4 mic go 3 Processor lt 1 Tum 5 4 Courto Tape Umir Face ence M CeoPeocES Te 10646 Figure 3 1 Cartridge Tape Controller Block Diagram 3 1
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24. BLE 1 2 COMPUTER INTERFACE SIGNAL LIST continued epum Memory Address Bit 8 Memory Address Bit 9 Memory Address Bit 10 Memory Address Bit 11 Memory Address Bit 12 Memory Address Bit 13 Memory Address Bit 14 Memory Address Bit 15 Memory Address Bit 16 Memory Address Bit 17 Memory Data Bit 0 Memory Data Bit 1 Memory Data Bit 2 Memory Data Bit 3 Memory Data Bit 4 Memory Data Bit 5 Memory Data Bit 6 Memory Data Bit 7 DMA Acknowledge DMA Request DMA Memory Address Bit 15 Read Enable RTXX Transmitted DMA Acknowledge High Speed DMA TTL TTL TTL TTL TTL TTL TTL TTL TTL TTL TTL TTL TTL TTL TTL TTL TTL TTL TTL TTL TTL TTL TTL TTL TTL Output B Output Output Output Output Output Output Output Output Output Bus I O Bus 1 0 Bus I O Bus I O Bus I O Bus 1 0 Bus I O Bus Input Output Output Output Input Output Output B 14 Bus A 11 Bus 12 Bus 13 Bus B 7 Bus B 18 Bus B 9 Bus B 47 Bus B 33 Bus B 41 B 34 A 35 B 43 B 28 A 36 B 30 B 40 B 27 A 57 A 44 Bus B 57 Bus B 23 20 48 Bus A 24 1 2 1 FIRMWARE DESCRIPTION The firmware is divided into two portions T 25 The Control Structure includes power on sequencing initialization Executiv
25. FM or other high density codes Recording Mode 4 Track Serial Head Type Dual Gap Read While Write with Separate Erase Tape Cleaner Integral 1 8 TABLE 1 1 Parameters GENERAL Operating Speeds Transfer Rate Start Stop Time Instantaneous Speed Variation Long Term Speed Variation Data Reliability Interface Signal Levels SPECIFICATIONS continued Characteristics 50 ips Write Bidirectional Read 90 ips Bidirectional 192 000 Bits Sec At 30 ips 0 30 0 41 At 90 ips 2 97 3 42 3 Drive only 7 225 Drive only 255 Less than 1 Error Standard TTL Levels Logic 1 Logic 0 Search and Rewind inches inches cartridge inclusive cartridge inclusive 108 Bits 0 0 to 40 4 VDC 12 4 to 5 0 VDC 1 9 2 INSTALLATION AND OPERATION INSTALLATION 2 1 UNPACKING PACKING PROCEDURE The MTCD is shipped as part of a system Instructions for unpacking packing as part of a system are found in the system manual This manual will cover procedures for the MTCD only 2 1 1 TRANSPORT The shipping container provides protection against moisture dust and contact damage If the MTCD is not to be installed but placed in storage it should be opened and checked for damage then repacked Use the following procedure for unpacking packing the MTCD 1 Upon receipt of the shipping container examine for damage report any damage to the carrier before opening 2 If no damag
26. General Specifications Spare Parts Page 1 1 1 2 1 Al 3 1 4 Al 11 4 1 1 INTRODUCTION 1 1 GENERAL DESCRIPTION The Magnetic Tape Cartridge Controller is a standard size Basic Four printed circu board PCB This PCB is located in the card cage CPU Backplane of the CPU Fo a typical system interconnection diagram see Figure 1 1 900960 002 TAPE DRIVE CPU CARD CAGE Figure 1 1 Magnetic Tape Cartridge Controller Interface Cabling 1 2 PHYSICAL DESCRIPTION The Magnetic Tape Cartridge Controller hereafter referred to as the Controller i a single PCB plugged directly into the card cage of a processor system A single interface cable part number 900960 002 connects the Tape Drive and CPU Backplane For drawing of the Controller PCB see Figure Al 2 Al 94 3 3 54 3 3 231 Cc 5 coi 88 583 583 Cae 383 283 083 Coca s Cole 36 2527 coca P2 Coe 70 50 463 3 3 23 93 7 363 38 gt 28 gt 25 coca2 22 Cs 3C 3C 29 50 1 3 40 39 u wer 2 C3 93 a S ee ri Goo
27. O OVERRIDE DEFAULT 5 Within 10 seconds press carriage return CR 6 VDT displays ENTER PROGRAM NAME 7 Type BBIITC then press carriage return CR 8 VDT displays ENTER PROGRAM NAME MTC OR BASS 9 Type BASS then press carriage return CR 2 6 10 11 12 15 14 15 16 17 18 19 20 21 22 23 VDT displays BASIC FOUR ALL PURPOSE SERVICE SYSTEM SYSTEM DATE IS XX XX XX DO YOU WANT TO CHANGE IT Y N Type N then press carriage return CR VDT displays SYSTEM TIME IS DO YOU WANT TO CHANGE IT Type N then press carriage return CR VDT displays B 4 SERVICE SYSTEM INSPECTION CYCLE BURN IN CYCLE DISPLAY PRINT PREVIOUS TEST RESULTS AU ENTER YOUR SELECTION CR END Type 1 then press carriage return CR VDT displays WOULD YOU LIKE TO HAVE DESCRIPTIONS OF SELECTED BASS PROGRAMS Y N Type N then press carriage return CR VDT displays a listing of all BASS tests followed by SELECT NUMBER S Type 15 write test or 16 read test then press carriage return CR VDT displays SELECTED ENTRIES 15 ENTER ONE OF THE FOLLOWING ADD D DELETE REVIEW CR EXECUTE Press carriage return CR VDT displays DO YOU WANT TO LOG ERRORS TO THE ERROR FILE Y N Type Y then press carriage return CR 24 25 26 27 28 29 30 31 VDT displays DO YOU WISH TO RESET ERROR FILE
28. Strobe during its occurrence 3 4 3 4 ELECTRICAL ADJUSTMENTS For information only Not a field adjustment 5 4 1 GAIN ADJUSTMENT DATA BOARD Adjust for a 1 9 volts dc positive and negative read envelope output on the lowest output signal track using the following procedure 1 Using an external DEI 502050 Data Pattern Generator or its equivalent write an all ones test pattern on all tracks MFM format Data transfer rate is 192 kilohertz at 30 inches per second Other data Sources may be used and none is required in drives having Codec Boards Read back each data track while alternately monitoring the positive or negative read envelopes on the Interconnect Board Test points are J500 20 positive envelope and J500 3 negative envelope on the Interconnect Board Determine track exhibiting lowest amplitude read envelopes Adjust pot R513 on the Data Board for 1 9 volts dc in the read reverse pass just after writing the track with the lowest amplitude Recheck 11 data tracks Positive and negative read envelopes of each track should measure within 0 05 volt dc of each other 5 4 2 SERVO POWER ADJUSTMENT SERVO BOARD Generally not required unless 15 volts regulator has failed If failed use the following procedure I 2 Connect reference lead to diode VR700 cathode Attach VOM or DVM test lead to Pin 4 of operational amplifier U705 Record 15 volts dc voltage to three
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30. a for the Service Engineer TABLE 1 1 SPECIFICATIONS Parameters Characteristics PHYSICAL Height 6 0 inches 15 2 cm Width 15 5 inches 34 3 cm Depth 12 0 inches 30 5 cm Weight 18 8 pounds 8 5 kg AC POWER REQUIREMENTS Voltage 115 230 VAC Current 1 5 75A Power 172 Frequency 60 50 Hz 1 phase Heat Output 586 5 Btu hr DC POWER REQUIREMENTS Voltage 24 VDC 15 24 15 5 5 3 Current Amperes 24 VDC 1 8 typ 5 4 max 24 VDC 1 9 typ 5 5 max 5 VDC 1 4 typ 2 6 max Drive Power Dissipation 18 5 Watts Typical Without Motion 57 4 Watts Typical With Motion 68 9 Watts With 105 Ramp Duty Cycle 1 7 TABLE 1 1 SPECIFICATIONS continued Parameters Characteristics ENVIRONMENTAL REQUIREMENTS Temperature 65 F to 759F 18 25 Humidity 405 to 605 RH non condensing Altitude 0 to 10 000 feet MAGNETIC TAPE Read to Write Gap Spacing 500 005 inch Write to Erase Gap Spacing 300 010 inch Write Gap to EOT BOT Optical C L 2 50 04 inch Erase Track Width 032 005 inch Write Track Width 028 002 inch Read Track Width 010 002 inch Tape Motion Steady State Bit Period Definitions Nominal Nominal Bit Nominal Data Speed Speed Period Transfer Range ips microseconds Rate Low 30 5 208 192 000 bps High 90 1 74 ANSI Standard ANSI Standard X3B5 75 43 GENERAL Cartridge ANSI x 3 55 1977 300 or 450 tape length Recording Density 6400 bpi M
31. are directly connected to PROM and RAM chip enable pins The two I O decoders 6D 8F are similar in their implementation Both are enabled by the 280 10 and address bit 5 They are selectively enabled by the WR write and RD read control lines They decode the three LSB address lines Because address bit 5 is an enable the decoders are active for If ports with addresses XXIXXyyy where X can be 0 or 1 and is a 3 bit code A So for each there are 16 possible occurrences By firmware conyentions the XXXX is always set to 0000 so the I O decoders actually decode ports 2016 thru 276 Due to the timing relationship of the address lines and the IO RD and WR control lines the decoder outputs are glitch free pulses This is important as it allows the decoder outputs to be directly connected to the flip flop clock and clear pins The Read Write Memory s RWM and Read Only Memory s are 256 4 bit and 512 x 8 bi parts respectively The two RWM chips are enabled together to provide a 256 byte Read Write Memory array Note that 246 bytes of the space enable by MBK6 are unused Each prom chip is uniquely enabled by one memory decode signal The Controller has sockets for 6 ROM s the seventh decode MBK7 is unused The Six sockets may not all be used depending on the size of the firmware package Finally the Data Bus Buffers created a high fanout bidirectional bus from the 1 load drive
32. are for read and write CRC calculations is included 2 FUNCTIONAL PARAMETERS Data reliability of the Controller is subject to the limits of the MTCD Soft Error Rate Recoverable Errors is not more than one error in 10 bits of data transferred A3 6 SECTION 4 RECOMMENDED SPARE PARTS GLOSSARY A4 1 RECOMMENDED SPARE PARTS LIST TABLE A4 1 SPARE PARTS Item BFC MM J Vendor Number Number Part Number Description Quantity 8903030 610010 Controller PCB 610710 Cable AC Abnormal Condition This bit amplifies the FP CRC and EOT bits When set in conjunction with AC indicates a write command was issued to a File Protected Unit the command is aborted When set in conjunction with EOT AC indicates tape has reached physical End of Tape EOT When set in conjunction with CRC AC indicates a data dropout has occurred during a Read or Write Command The last command has therefore reached an unpredictabl conclusion 900960 002 A4 2 GLOSSARY OF MNEMONICS MNEMONIC MEANING AC will be set if the Not Ready Device Busy or Illegal Command situations occur These conditions are reflected in the Auxiliary Status byte AC will also be set if a Read Read Format or Write Command is issued with Byte count of 0 in the Control Block BF Busy Flag This bit allows the Controller to be run in an interrupt drive environment or a test flag environment When busy the Controller will set the Bus
33. at Sink Assembly The Heat Sink Assembly contains the drive motor tachometer power transistor circuits and a two piece heat sink It is designed as a plug in module and is The MTCD must be mounted in a horizontal position only This prevents dust and residue from falling into the Transport which could result in lost data center of gravity mounted 1 5 1 4 Tape Cleaner The Tape Cleaner removes foreign material and loose oxide particles as the tape passes the Tape Cleaner 1 3 1 5 2 MAGNETIC TAPE CARTRIDGE The Magnetic Tape Cartridge Assembly is shown in Figure 1 5 Each Magnetic Tape Cartridge Assembly is a single assembly consisting of a supply reel to left take up reel to right a magnetic tape file protect and belt guides DIRECTION OF FORWARD TAPE MOTION LIGHT SENSING DRIVE MOTOR FIXED TAPE GUIDES 2 RUBBER COVERED DRIVE ROLLER TAPE PATH OXIDE OUT BELT CAPSTAN FILE PROTECT TAPE SHOWN IN BOT POSITION TAKE UP HUB SUPPLY HUB BELT GUIDE ROLLERS 2 FLAT DRIVE BELT Figure 1 5 Cartridge Diagram 1 4 The Cartridge dimensions are shown in Figure 1 6 FEATURES RECUIREO TO PREVENT T INSERTING CARTRIDGE IMPROPERLY NOTED 0 005 ZO S 5 21 SHALL NOT EXTEND BEYOND BASE DIMENSIONS IN INCHES ALL SIDES EXCEPT AT NOTCHES Figure 1 6 Cartridge Dimensions The Cartridge is to be mounted in one position only and has asymmetrical features to prevent improper installation The Car
34. e idle loop and all paths in and out of the Executive Command Sequencing routine which realizes the Controller commands 1 2 1 1 Control Structure INIT this routine begins at address 000 6 Controller Reset caused by I O bus signal RESET being asserted or 50 software issuing Reset Control operation forces firmware to begin executing at INIT as soon as the reset condition is removed INIT performs the Controller Initialization First Controller status is set to FF then all used ROM locations are added together Modulo 256 and compared with an expected sum stored in ROM location KSUM If the two sums are the same then the Read Write memory is tested Each memory location is tested to verify that the following patterns can be written and read from it 00 FF AA 55 and XY XY is the 8 LSB of the memory location s address If these tests also succeed the firmware sets the Controller status to 00 and proceeds to START START various Read Write Memory locations are set to 0 The 280 interrupt mode is set to 1 280 stack pointer is set to 6 the top of Read Write Memory The Z80 Hl register pair is cleared and the Executive idle loop EXEC is entered EXEC this routine provides the main control structure of the operational firmware When entered via 5 EXEC has nothing to do so it loops testing several internal and external flags looking for things to do One flag may be set by the Co
35. e interface signals the same as serial Tape Drives equipped with interface circuit board assemblies except the WDA and RDA signals Input Data For Drives With an Encoder Decoder Circuit Board Assembly Write Data Enable A control line to the Tape Drive which separately allows enabling of the write function the sending of write data strobes and the writing of data on tape WEN function is still required and will enable both writing and erasing WEN causes the write circuits to become active and tape to be erased after the tape 16 up to speed and other conditions met the WDE will cause the Tape Drive to send the first data strobe and shall commence to record flux transitions on the tape data which 15 to be written on the tape must be sent to the Tape Drive all preambles postambles and check characters and that data is recorded in Manchester form phase encoded Write Non Return Zero During the write data strobe period the state of the input write Data data line is sensed as follows WNZ Low 1 and WNZ High 0 The state of WNZ is only examined during the write data strobe period WNZ signal must be steady 0 5 usec prior to the the Write data strobe true period WDS Low Table 3 10 Ouput Data For Drives With an Encoder Decoder Circuit Board Assembly Data Detected RNZ Read Non Return to Zero Data Read Data Strobe Write Data Strobe Description Will be false except whe
36. e is noted and the MICD is not to be placed in storage cut the packing tape on the top center of the container and open the outer container Use care when cutting the tapes to open the container Too deep of a cut may damage cabinet or transparent door on the cabinet 3 Cut packing tape on inner container open container and lift out the MTCD or Transport 4 Examine for damage noting any dents cracks or missing parts per shippin list If any are found they should be reported to the Marketing Office or Dealer immediately 2 1 Use care in removing the Transport The Heat Sink and Pins are exposed Mechanical damage can result if bent or broken 5 All containers and packing material especially preformed containers must be saved These are to be reused if the assembly is returned to the factory 6 Packing is the reverse of the above procedure using the saved container and packing material Add packing tape to replace the cut tape in the unpacking procedure 2 2 PREINSTALLATION CHECKS The first part of this section will explain the procedure to install a Transport in the cabinet 2 2 1 INSTALLING A TRANSPORT First remove the top cover newer models the top cover is held in place by stick together clamps Remove the transparent window then lift up on the front of the top cover and it will snap loose older models the cover is screwed down remove the screws and then lift off the cover This will expose
37. eater than 0 5 microseconds Output Status Signals 22 Drive Selected Will be true when the Tape Drive has received its proper unit address RDY Drive Ready Will be true when a cartridge is installed the sensor lamp is draw ing current and the 5 VDC applied to the Tape Drive BSY Drive Busy Will be true when the Tape Drive is in an automatic rewind sequence 1 when a cartridge is first installed in the Tape Drive or when the Tape Drive is executing a rewind forward or reverse command This signal will go true when the command is received and will re main true until the motion has stopped i e 30 milliseconds after low speed motion has been commanded to stop and 80 milliseconds after 90 ips operation has been commanded to stop In the case of receipt of a non executed or illegal command FWD at EOT or REV at BOT this signal will not be true indicating the command 18 rejected Will be set and latched when an automatic sequence to position the cartridge to BOT has been executed or a rewind has been com pleted This signal is reset by subsequent receipt of a FWD command WND Write Enabled Will be true when a write enable condition is latched within the Tape Drive File Unprotected Will be true when a cartridge is installed and it is the unprotected state i e can be written on Will be set and latched when the upper load point hole the warning of beginning of tape 18 passed in the r
38. emblies and install their replacements Before removing any assembly the following steps shall be followed Remove Magnetic Cartridge e Set power switch to OFF position e Unplug the ac power cord from its source 4 2 1 CARTRIDGE TRANSPORT POWER SUPPLY This PCB is removed in the following manner Complete steps in Section 4 2 Lift off the top cover of the older models have screws holding them in place of the 3M stick tight connections These screws must be removed to remove the top cover Locate the PCB Disconnect the cable at Jl Lift up on the PCB till the connectors J2 and J3 can be seen Disconnect the cables at J2 and J3 Remove the PCB To install a new PCB repeat the above in reverse order Verify the regulated 5 volts is within tolerance refer to Section 5 3 1 4 2 2 TRANSPORT To remove the Transport first complete the steps in Section 4 2 then do the following procedure 4 2 Remove the screws located on the bottom of the MTCD Lift off the top cover Disconnect the PCB Cartridge Tape Drive power supply and remove per Section 4 2 1 Lift the Transport up and to your left placing on right side of MTCD Disconnect cable at P702 of Servo PCB cable at P3 of Encoder Decoder PCB Lift the Transport up und set to one side To install the Transport repeat the above in reverse order connecting cables as required Place top cover in place and tight
39. en all screws loosened or removed 5 5 1 This section contains Logic Diagrams Schematics and drawings used in the MICD and is intended to be used ONLY by Service Engineers as a troubleshooting aid 5 2 Tape Motion When true causes the tape to move a forward direction When true causes the tape to move a reverse direction High Speed When true causes the tape to move at high speed in the direction selected by either FWD or REV Tape motion will proceed until the command signals go false or In forward where an EOT hole is encounted whereupon motion will stop In reverse where set of BOT holes 18 encountered whereupon motion will stop c Both directions are commanded simultaneously whereupon the tape will stop Rewind command is received which will overrule other motion commands Internal Ready signal is not true whereupon motion will stop f In High Speed motion will drop to low speed when the upper load point hole is sensed in reverse or the upper early warning hole is sensed in forward When true causes the tape to be positioned to beginning of tape at high speed The Tape Drive must be selected to start a Rewind sequence but may be unselected after the sequence is started Beginning of tape is defined as between the two innermost toward the middle of the tape set of upper and lower hole
40. ers with the microprocessor and converting them to serial data transfers with the The microprocessor does not deal with the bit to bit timing details of the MTCD data transfers A set of individually settable resettable discrete latches is provided to supply control signals to the MTCD The microprocessor firmware has direct control over these control lines Thus all the details of MTCD control timing and sequence i e the tape formatting positioning functions is resident in 280 firmware The control logic in the MTCD interface is therefore mainly passive MTCD status is routed through a set of latches that allow the firmware to read it MTCD hardware does not react to MICD status or status changes there are minor exceptions to this which will be discussed in the detailed description of the logic The data handling portion of the MICD interface logic consists of the following functions 1 A shift register for parallel to serial and serial to parallel conversion 2 Bit counters to define 8 bit byte increments of data 3 generation and checking logic 4 Logic to synchronize tape unit strobes and data to internal CTC timing 5 280 interrupt logic for read after write control and escape from tape unit hang up situations This functional block contains the line drivers and receivers data buffer registers and the decode logic necessary for the microprocessor to control the tape unit s Hardw
41. everse direction This signal will be internally reset when the load point hole is subsequently passed the forward direction When this signal is true high speed will be disabled Reverse tape motion is allowed to proceed until the BOT holes are encountered where the Tape Drive will stop accept only forward commands Early Warning Sensed Read Data Will be set and latched when the upper early warning hole the warning at end of tape is passed in the forward direction This signal will be internally reset when the early warning holes is sub sequently passed in the reverse direction When this signal is true high speed disabled Forward tape motion is allowed to proceed until the hole 15 encountered where the Tape Drive will stop and accept only reverse commands Output Data Description This signal is replica of the WDA data written onto the tape The RDA line is latched and its initial state is not preset thus initially the RDA line may be high or low Conditions can occur wherein single transitions can occur during erased portions of the tape These can set the RDA line in the opposite state The read signal is always available in dual gap drives and is always available when WEN has been set for single gap drives The threshold levels are internally set as function of the mode of operation Tape Drives with Encoder Decoder circuit board assemblies hav
42. figure accuracy XX XXX Attach VOM or DVM test lead to Pin 7 of the operational amplifier U705 Adjust R765 until 15 volts dc is within 5 volts in positive direction of the reading obtained at Pin 4 of U705 3 4 3 INTERFACE PCB ONE SHOT PERIODS LOCATION 0623 Pin U623 Pin U617 Pin U617 Pin U614 Pin U615 Pin 10 3 4 4 SERVO PCB POT SETUP li 2 2 3 6 PERIOD 9 1 msec 22 5 usec 650 100 msec 650 100 msec 30 4 msec 90 15 msec Adjust R761 for a voltage of 0 0 0 1 volt at BALAS test point Set forward speed with R764 Set reverse speed with R763 Adjust R762 for a ramp time of 23 0 5 milliseconds Insure any loss of voltage that will result in loss of tape motion 3 4 5 DATA ADJUSTMENT AND CHECK PROCEDURE 1 Write all ones pattern 192 kilohertz at 30 inches per second on track Unit select track 0 forward and write enable are required 2 Attach scope probe to R555 on lead near R537 on board 301 061 3 the Read Only Mode adjust R513 refer to 301 061 until the signal approximately a sine wave in appearance is 1 8 volts peak to peak 4 Check inter record gap voltage amplitudes after gain adjustment Voltage shall not exceed 350 millivolts A11 four tracks must be checked 5 Check DAD signal to insure true level only during data Attach scope trigger on forward command at P3 Pin 22 of PCBA 301 094 Observe DAD on U23 Pin 3 on PCBA 301 094 Place seco
43. h one hand and pull it from the opening Place the tape cartridge in the opening and push forward till the stopping point is felt and an audible sound is heard Verify tape motion if none insure the ac power cord is connected power is on and the fuse is not blown If the fuse is blown or the tape still does not move refer to Chapter 4 of this manual If the tape is in motion and stops at BOT the MTCD is ready for normal operation NOTE If the tape was on the left reel take up automatic rewind will take place till the tape has moved to theright reel supply and BOT 2 5 SYSTEM INSTALLATION The MTCD is part of a system therefore the System Installation and Preinstallation Checks are one and the same 2 4 2 4 SYSTEM INITIALIZATION PROCEDURES 2 4 1 BASS PROGRAM 1 Install a tape cartridge scratch tape in the Transport 2 Perform an alternate load from disc refer to Table 2 1 TABLE 2 1 SENSE SWITCH SETTINGS CPU Switches 1 2 3 4 Function 0 0 0 0 Fixed Media Load 0 0 1 0 Fixed Media Alternate Load Lt 1 0 1 Tape Cartridge System Load 1 1 1 1 Tape Cartridge Load 1 0 0 1 VDT Boot 0 1 0 1 Disc Load 0 1 1 1 Disc Alternate Load i M M Test SW on front panel CPU may be used instead of 553 Not allowed in present operating system 3 Press and release LOAD switch on processor front panel 4 VDT displays the PROPRIETARY MESSAGE then MAKE ENTRY T
44. k Phase 1 TTL Input A 6 Clock Phase 2 TTL Input B 22 I O Control Reg 1 TTL Input 31 I O Control Reg 2 TTL Input 31 I O Control Reg 3 TTL Input B 61 Output Data Bit 0 TTL Output Bus 39 Output Data Bit 1 TTL Output Bus B 10 Output Data Bit 2 TTL Output Bus A 26 Output Data Bit 3 TTL Output Bus B 58 Output Data Bit 4 TTL Output Bus B 37 Output Data Bit 5 TTL Output Bus A 10 Output Data Bit 6 TTL Output Bus B 26 Output Data Bit 7 TTL Output Bus A 58 Input Data Bit 0 TTL Input Bus 32 Input Data Bit 1 TTL Input Bus A 60 Input Data Bit 2 TTL Input Bus B 62 Input Data Bit 5 TTL Input Bus A 62 Input Data Bit 4 TTL Input Bus A 32 Input Data Bit 5 TTL Input Bus B 59 Input Data Bit 6 TTL Input Bus A 61 Data Bit 7 TTL Input Bus B 60 Priority In TTL Input B 54 Priority Out TTL Output A 55 1 4 TABLE 1 2 COMPUTER INTERFACE SIGNAL LIST continued Select In TTL Input Select Out TTL Output A 52 External Interrupt TTL Output 38 Request 5 Volts DC Power 1 2 64 65 Ground Return 1 19 2 35 13 36 14 56 18 33 34 56 64 65 Memory Address Bit 0 TTL Output Bus 51 Memory Address Bit 1 TTL Output Bus 53 Memory Address Bit 2 TTL Output Bus B 55 Memory Address Bit 3 TTL Output Bus A 50 Memory Address Bit 4 TTL Output Bus 53 Memory Address Bit 5 TTL Output Bus A 54 Memory Address Bit 6 TTL Output Bus A 15 Memory Address Bit 7 TTL Output Bus A 9 1 6 TA
45. memory using subroutine SGETCB to establish the number of bytes to write and where the data buffer is in memory Tape motion is then initiated 5 and control is passed to 2 e EWRT2 Write the write function can be broken down into three main portions 1 front of record 2 body of record and 3 end of record Front this portion of firmware must write the preamble initialize the CRC generator and write the Leader on tape ERSS ETST ERD after write these are anticlimactic 1 9 Subroutines These routines are used by many of the above described routines SELU SELUA sets the track and unit numbers on the tape unit interfaces then asserts the select line thereby selecting the desired unit SELUA selects the track last used on the unit SELU selects the track specified in the command SREADY tests that the selected unit is selected Ready and not Rewinding If not a not ready exit is taken posting an abnormal condition status and calling SQINT SGETCB fetches the 7 byte control block CB from main memory by reading addresses 7016 76 It then places the address portions of the in the DMA Addr ss Register and returns with the byte count in the DE register pair the 16 address LSBs in the HL pair and the Index bytes in Read Write Memory SMOT starts tape motion providing appropriate delays to ensure proper gap size and proper head positioning before tape is writte
46. mory Access logic is again mostly passive An incrementing address register holds the address in Basic Four computer memory The address is established by 280 firmware accordin to the operation being performed control block fetching data transfer status transfers etc There is no direct connection of the DMA logic to any Cartridge Tape Controller CTC function other than the microprocessor Memory input and output data is also handled passively DMA logic merely contains latches to hold the data Data is always provided by or received by the 280 firmware logic in no way assigns any significance to either data or address The active portion of the DMA logic is the DMA control This logic participates in all memory transfers providing control signals enabling address and data is in proper timing sequence for operation with a BFC memory module A3 4 Logic is included to allow the to be placed in DMA priority daisy chain this enables the CTC to perform byte interweaving of DMA operations with other controlle equipped with this daisy chain logic Logic is included to decode bus cycles and perform the following bus operations l Command and main status transmission over I O bus 2 Data control and auxiliary status input and output over DMA channel 3 External interrupts A3 1 3 MAGNETIC MTCD INTERFACE LOGIC The MTCD interface hardware includes logic for performing byte data transf
47. n data has been detected Data detected requires the receipt of at least 12 zeros and a one following without a period of 2 5 bit times without data being received Data detected can be used to sense the presence of the block of data This signal will strip the preamble from the read data signal and is used to enable the other data output signals During read data strobe period if RNZ is low true then the data is a one if high then the data is zero Will be low for 0 3 50 usec indicating that RNZ can be sampled during this period Read data in the forward direction will have preamble removed and will stay true for all of the postamble and for approximately 2 5 bit times after postamble has passed Therefore CRCC and postamble must be stripped in forward direction and the CRCC and preamble must be removed in the reverse direction To first set read data 12 zeros must be sensed A drop out will shut off circuit if it exists for gt 2 5 bit times 50 usec and circuit will stay off for 13 bit times 5 290 usec The read data threshold levels are internally set to three different levels depending on the write and motion commands Read only threshold occurs when running at low speed without writing Write threshold occurs when writing Search threshold occurs when running at high speed The write data strobe is generated within the encoder decoder module and 18 sent out to indicate when the Tape Drive
48. n illegal command status is posted then control is passed to SQINT e ECLRI any queued interrupts are removed from the queues The status of the tape unit whose number is coded in the command is placed into the main and auxiliary status bytes The Controller is made Not Busy and control is passed to EXEC e EREW Rewind The last used track for the desired track is selected then the unit s status is tested If the unit is not ready an abnormal termination exit is taken Otherwise the Rewind line to the unit is pulsed and control is returned to EXEC e Unload Similar to Rewind except that the tape unit Unload control line is raised until the unit reaches End of Tape EOT which is Signified by the unit becoming Not Control is then passed to 501 ESP all space commands cause control to be passed to this routine Space File and Record Forward and Reverse Subroutines SELU and SREADY are called to select the unit and verify it is selected and ready SBOT is called to check for reverse motion requested with tape positioned at Then routine SMOT is called to initiate tape motion When tape is up to speed subroutine SDAD is called to wait until data from tape is detected i e the start of a record Then depending on forward or reverse motion ESPFWD or ESPREV is entered These routines read the first data bytes from tape and test for a value of 0 If 0 the record is a File Mark Control is
49. n or read SMOT tests for forward or reverse tape motion setting the appropriate control signal to the selected tape unit After SMOT commands the units to Move it samples the units BSY busy status to insure it goes busy if not tape is either at physical EOT forward motion or BOT reverse motion 1 this occurs control is not returned to the calling routine instead the status is updated to reflect an error exit to SDAD this routine simply tests the tape units Data Detected DAD which is connected as bit 1 SBOT test for BOT This routine aborts reverse motion commands issued to a unit positioned at BOT and insures that the Load Point area of the Tape is not used by any of the forward commands 1 5 PHYSICAL REQUIREMENTS The Controller will be installed in the card cage of a standard Basic Four data processing system 11 clearance and airflow provisions normal to the Basic Four system will be observed 1 5 1 GENERAL SPECIFICATIONS The general specifications including Electrical Interface and Environmental are listed in Table 1 3 1 10 TABLE 1 3 Parameters ELECTRICAL REQUIREMENTS DC Voltage DC Current INTERFACE REQUIREMENTS Signal Levels Standard TTL Termination ENVIRONMENTAL REQUIREMENTS Operating Temperature Operating Humidity Operating Elevation Storage and Shipping Altitude GENERAL SPECIFICATIONS Characteristics 5 X25 y 3 8A
50. nction descriptions 5 5 5 1 Motion Control The Switch Sensor Assembly located on top of the drive is used to determine the state of the tape cartridge and the position of the tape two microswitches in the Switch Sensor Assembly are used to originate the Cartridge In Place CIP and File Protect FIP signals goes true whenever a cartridge is completely engage The FIP signal will be true only when the File Protect Indicator Arrow on the cartridge points toward the SAFE position This will disable the write operation Upper Tape Hole UTH and Lower Tape Hole LTH signals are derived from two photo sensors These signals go true whenever an upper or lower tape hole has passed the sensors These signals are sent directly to the Interface Board which utilizes the tape hole to control tape position tape cannot run forward beyond the second EOT hole reverse past the second set of BOT holes 3 3 3 3 3 2 Read Write Operations The Data Board contains a read envelope threshold detection comparator network to assure valid read data and to discriminate against non valid data This network disables the Data Detected signal unless the read envelope exceeds a certain predetermined voltage This voltage is 60 millivolts during normal read operations 200 millivolts during a read after write operation Write enable WEN true enables the 200 millivolts threshold 500 millivolts during a high speed search High
51. nd 2nd channel lead to R535 on LEAD NEAR R537 on PCBA 301 061 for data burst correlation b Operate drive in READ AFTER WRITE MODE and write at least 20 consecutive data blocks for check 11 four tracks must be checked NOTE First 100 microseconds after Forward Command may generate DAD spikes not of consequence 3 5 PREVENTIVE MAINTENANCE Preventive Maintenance which should be done by the Service Engineer is limited to cleaning as needed and observing safety procedures while making repairs Cleaning shall be done if the Transport is replaced 3 5 1 MAGNETIC HEAD CLEANING The Magnetic Head should be cleaned daily if the Transport is in regular use Dirty heads may cause data dropouts during read and write operations Use non residue non corrosive cleaning agent such as DuPont Freon TF and a lint free cloth to clean the head assembly sure to wipe up any excess and allow the heads to dry prior to operating the Transport 3 7 Spray type head cleaners are not recommended because overspray may contaminate the motor bearings Also never clean the head with hard metal objects This will result in permanent head damage 5 5 2 CLEANER CLEANING The Tape Cleaner removes loose tape oxide and other foreign material from the tape before it contacts the head This foreign material accumulates in and around the tape cleaner and must be removed to ensure that the Tape Cleaner will continue to work effectively
52. ntroller s 1 0 bus hardware Command Received This flag is included as bits 5 of Input Port 27 Two internally create Situations caused by previously issued commands are also tested as follows 1 When processing a Rewind command the firmware merely initiates the Rewind sets an internal flag to indicate the unit is rewinding and returns to EXEC up to four units may be rewinding simultaneously EXEC then will test the status of a rewinding unit until it reaches Beginning of Tape BOT at which point an interrupt will be initiated for that unit 2 Most Controller interrupts are processed through subroutine SUINT As described in the discussion of that routine interrupts may be disabled by the executing software If so the Controller firmware will set a flag indicating an interrupt is queued and will return to EXEC EXEC will monitor the two interrupt enable flags Attention and Command Complete bits 6 and 7 of Input Port 27 When an interrupt is re enabled and a corresponding interrupt is queued EXEC unqueues the interrupt and branches to 5 which performs the interrupt of the CPU 1 7 ECMDD when command is received EXEC branches to this routine This routine first sets the Controller s main status to Busy by writing an 80 to Output Port 20 then reads the command byte from Input Port 20 The four most significant bits comprising the CMD field are then used to branch thru a table to the r
53. outine which is coded to perform that command e SQINT this subroutine is called by most routines at the completion of their normal operation or to abnormally abort a command Two types of interrupts are defined in the product specification Attention and Command Complete which are essentially non data transfer and data transfer interrupt Each may be selectively enabled or disabled by software For each interrupt request SQINT tests the associated enable disable bit in Input Port 27 bit 6 for Attention bit 7 for Command Complete If enable control 15 passed to SEXIN If disabled an interrupt of the appropriate type is queued and control is returned to the calling routing e SEXIN this subroutine updates the Main and Auxiliary status bytes and makes the Controller Not Busy The interrupt requests flip flop input to the CPU it is then set by simply writing to Output Port 25 and is reset by the CPU acknowledging the interrupt Control is then returned to the calling routine e EIPL EIPLI these routines initiate and control the firmware sequencing through the IPL sequence 1 2 1 2 Command Sequencing Non Data Transfer Commands The following routines are used to perform the set of non data transfer commands defined for the Controller They include certain subroutines which deal with the tape unit control and status lines These routines are used by most of the major command performing firmware routines e EILL a
54. rt 2 2 215 System Installation A venen 2 4 System Initialization Procedures 2 4 1 BASS Program 2 5 CHAPTER 3 MAINTENANCE 3 1 Corrective Maintenance 3 1 3 1 1 General Philosophy 3 1 5 2 Troubleshooting Procedures 3 1 5 3 Functional Description 3 1 3 3 1 Power Supply 3 2 3 3 2 Transport 3 2 3 5 5 Sub Functions of the Transport 3 3 3 3 3 1 Tape Motion Control 3 3 SUP dea Read Write Operations 3 4 3 4 Electrical Adjustments 3 5 3 4 1 Gain Adjustment Data Board 3 5 5 4 2 Servo Power Adjustment Servo Board 3 5 3 4 3 Interface PCB One Shot Periods 3 6 3 4 4 Servo PCB Pot Setup 3 6 3 4 5 Data Adjustment and Check Procedure 3 7 111 3 C3 Q3 Ui Ui 4 gt 5 5 1 APPENDIX iv TABLE OF CONTENTS continued MAINTENANCE Preventive Maintenance Magnetic Head Cleaning Tape Cleaner Cleaning Motor Capstan Cleaning REMOVAL REPLACEMENT PROCEDURE Spare Parts List Removal Replacement Procedure PCB Cartridge Power Supply Transport REFERENCE DATA x sas Magnetic Tape Cartridge Controller Page 5 1 LIST OF ILLUSTRATIONS Figure 1 1 Magnetic Tape Cartridge Drive 1 5 Cartridge Diagram 1 6 Cartridge Dimensions 1 7 File Protect Switch 1 8 Tape Configuration 2
55. s located at the head end of the tape This location is recommended for unloading the cartridge as the data recording area is completely protected Rewind will overrule all other motion signals Successive Rewind commands will not cause the tape to be off Rewind will stop if the internal Ready signal is false An automatic Rewind sequence 18 executed when a cartridge is installed in the Tape Drive or when power is applied when a cartridge 18 installed Input Write Enable When true enables the writing and erasing functions for the selected track The writing and erasing processes occur only if the cartridge WDA Write Data is in the unprotected state not safe This signal is internally latched and will remain set unless reset by Reverse or High Speed commands Interna Ready signal not true Will modulate the write head to produce a recorded waveform tape when WEN 18 true and the cartridge is in the unprotected state not safe In WDA unactuated state the tape will be erased in the ANSI fashion The WDA state will cause the opposite polarity to be re corded Therefore if no erase head is used erasing can be done by using the write head The minimum clock period for data input should not allow the re sultant number of flux reversal from exceeding 3200 per inch 1260 flux reversal cm and the rise and fall times should not be gr
56. tridge contains optical elements to enable photo electrical detection of tape position holes cartridge has sensing area on the front surface which senses when the cartridge is in position to read or write see Figure 1 7 for dimensions 1 5 1 6 MAXIMUM HEIGHT OF FILE PROTECT PLUG CARTRIDGE IN POSITION SENSING MAREA 71 WRITE PROHIBITEO PERMITTED Figure 1 7 File Protect Switch Tape guides are employed to guide the tape while in motion The file protect cam of the cartridge is an operator rotatable switch see Figure 1 5 which prevents writing or erasing when in the SAFE position see Figure 1 7 The magnetic tape length between Load Point LP and Early Warning EW shall be 300 10 0 feet The tape position holes for Beginning of Tape BOT Load Point LP Early Warning EW and End of Tape EOT are shown in Figure 1 8 AREA REACHED RECORDAELE FROM OR AREA LOADING Figure 1 8 Tape Configuration The presence of a spurious tape signal after a tape has been erased will not exceed 10 percent of the average base to peak read signal under test The tape is wound on the reel with the magnetic coating out During forward operation it will wind clockwise and unwind counterclockwise as viewed through the transparent door 1 4 MTCD SPECIFICATIONS Table 1 1 summarizes the general operation and performance of the MTCD This table provides a reference source of general dat
57. y Flag the Busy Flag is set the software should not issue any commands to the Controller The Controller will reset BF when it is again ready to accept a new command NOTE Controller can take up to 500 microseconds to set the Busy Flag after a command has been received BOT The tape in the cartridge is positioned at the Beginning of Tape BOT 4 1 CC CRC EOT FM FP MEANING 1 Command Complete Interrupt 0 Attention Interrupt This bit is set if during a read or read after write operation a CRC error is detected The tape in the cartridge is positioned in the End of Tape EOT warning area is physically the EOT This latter condition is undesirable When it occurs bit O AC is also set File Mark This bit is set after a Write File Mark command or after a Read or Space command that terminates immediately after traversing a File Mark record The tape unit is loaded with a cartridge that is file protected refer also to AC AUXILIARY STATUS BYTE MNEMONIC DB IC NR TR 4 2 MEANING Device Busy The desired unit is busy rewinding Illegal Command Code Not Ready desired tape unit 15 not ready for one or more of the following reasons 1 Power 5 volts dc not applied to the unit 2 No cartridge installed 3 BOT EOT sensor lamp is burned out When set indicates that the command just completed was performed in the test mode
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