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1. FRM 9 10 DRO GND 11 12 3 3V E SERIRQ 13 14 EXP_PME EXP_SMI 15 16 SIO CLK14 5 FWH_IDO 17 18 FWH_INIT ICH_RCIN 19 20 ICH_A20GATE Y GND 2 2 5V i USB EXP P2 23 24 USB EXP P1 USB EXP P2 25 26 USB EXP P1 USB EXP OC 27 28 H_DBRESET 40 SIO GPIO16 29 30 SIO GPIO17 bavu GND 6 5V Socket AC97 SDOUT 33 34 97 SDINO 97 RSTH 35 36 AC97 SYNC 97 BITCLK 37 38 97 SDIN1 SPEAKER 39 40 12V VCCRTC This pin is connected to 12V via a 0 ohm jumper default on rev 2 or higher Alternatively it connects to VCCRTC via a diode default on revision O or 1 boards The expansion interface header is available on both sides of the board top and bottom in order to provide attachment of the CCA LAMBADA either to the left or to the right side of the CCD CALYPSO WARNING Neither the 3 3V pin nor the 5V pin nor the 12V pin are protected against a short circuit situation This connector therefore should be used only for attachment of an expansion board like CCA LAMBADA The maximum current flowing across these pins should be limited to 2A per power rail EKF 47 ekf com User Guide CCD CALYPSO e Advanced CompactPCI 3U Pentium M CPU Board ATA IDE Header PIDE O EKF 276 53 040 01 ekf com 40 1 27mm Socket IDE_RST IDE_DO7 IDE DO6 IDE 005 IDE DO4 IDE DO3 IDE_DO2 IDE DO IDE DOO GND IDE DREQ IDE 0 IDE IOR IDE IORDY IDE DACK7F IDE IRQ INT 15 IDE
2. Shock 15g 0 33ms 6g 6ms Vibration 1g 5 2000Hz gt EN55022 EN55024 EN60950 1 UL60950 1 IEC60950 1 gt 2002 95 EC RoHS 150 Board Processor CPU MEM Score CCD 2 CALYPSO 1 0GHz ULV Celeron M Dothan 373 4735 8642 CCD 3 CALYPSO 1 4GHz LV Pentium M Dothan 738 tbd CCD 6 CALYPSO 2 0GHz Pentium M Dothan 760 tbd Intel SpeedStep Frequency Modes LFM Low Frequency Mode HFM High Frequency Mode The ULV Celeron M processor on CCD 2 does not support Intel SpeedStep6 amp alwaysHigh Frequency Mode Subject to technical changes 8 ekf com User Guide CCD CALYPSO Advanced CompactPCI 3U Pentium M CPU Board Short Description CCD CALYPSO Scalable from the ULV Celeron M processor up to the 2 0GHz Pentium M and provided with 2GB dual channel capable DDR2 RAM the CCD CALYPSO is a versatile 4HP 3U single size Eurocard CompactPCl amp CPU board designed especially for systems which reguire high performance at low power consumption The chipset is based on PCI Express technology and has a powerful dual screen integrated graphics accelerator The DVI I video interface allows for simultaneous attachment of both advanced digital and legacy analog flat panel displays and CRT monitors D SUB connector optionally The CCD CALYPSO is eguipped with two independent PCle Gigabit Ethernet controllers for high speed communication Seven USB 2 0 ports are provided for attachment of peripheral devices In
3. The CCD CALYPSO comes with a CompactFlash adapter module C10 CFA which is suitable to hold a silicon memory CF card operated in True IDE Mode similar to a hard disk If the CCD CALYPSO is accompanied by a mezzanine expansion module such as the CCA LAMBADA or CCB BOSSANOVA the position of the C10 CFA CompactFlash adapter module changes to the mezzanine card C10 CFA Top Mount CF Card Adapter Optionally an on board 1 8 inch drive HDD or SSD module is available C30 PATA When ordered it replaces the CompactFlash adapter module please reguest for a special solution which allows to use both the CF slot and the 1 8 inch drive simultaneously The C30 PATA allows to maintain the 4HP envelope and can be combined with additional expansion side boards on the CCD CALYPSO EKF ekf com User Guide CCD CALYPSO Advanced CompactPCI 3U Pentium M CPU Board AAA 877987 ln TI Wi CCD CALYPSO w CCB BOSSANOVA Mezzanine Companion Board amp 2 5 Inch HD USB Flash Drive Option C15 EKF 13 ekf com DVI Digital Analog Block Diagram CCD CALYPSO Alternative CPU Pentium M 745 1 8GHz LV Pentium M 738 1 4GHz Celeron M 370 1 5GHz ULV Celeron M 373 1 0GHz Video Link FSB 533MHz EIS sovo VGA D SUB DMI x 4 Pentium M DROGA DDR2 533 512MB 1GB 2GB User Guide CCD CALYPSO Advanced CompactPCI 3U Pentium M CPU Board Block
4. User Guide CCD CALYPSO CompactPCI 3U Advanced Pentium M CPU Board Document No 3946 Edition 14 2010 09 CCD CALYPSO User Guide CCD CALYPSO Advanced CompactPCI 3U Pentium M CPU Board Contents ABout this MENA iaa aa 4 Edition EE 4 Related DOCUMENTS EE 5 lei Eer 5 Tade Marks et ARTE DRE aida 5 Legal Disclaimer Liability Exclusion casi dus tata DUR 16480 rs SARA G4 ADAR E R 5 CCD CALV PSO 111119 dE IAEA cea NE AAA AF GO AAA 6 PAU Summa EIA a ARAS 6 Short Description CCD CALYPSO y ss ceded Ad AWG ad GA AU ds 9 Block Diagram CCD CALYPSO ais RARA ARA AR AAA A AAA A 14 Top View Component Assembly CCD CALYPSO AWK kk a kk KRE KEK YY KK kk 15 Rear I O Transition Module 0 16 CCE PUNK Mezzanine Module EEN KK KK KK KK KK KK KK KK KK KK KK KK KK wee 18 Strapping Headers SF kk kk doe KK en KK det KK KK undead sheath pode KK RIK de k 19 Connectors amp Sockets a aa a a AAA ASA A An A ASA RA AD 0A RA GO 19 Front Panel Elemenl5 s pias H H kd ere DAS d W 19 ee geoeoew__mma mm 20 Thermal Considerations eq as pus sd dos kk kk e KK KK KK LA KI KI K KI KI K K 21 A EE 21 LAN SUBSYSTEM 4 hak se behn d ya du Aya Kur ya d n diya ban ya 2 5 dya FF ya n dya AN FFA 22 Serial ATA Interface SATA e 22 Enhanced 81 814 1 10 5 a
5. 4033 GND SATA 2RN SATA 2RP SATA ACT 13 AD38 GND V I O AD37 GND SATA 2TP 12 AD42 AD41 AD40 GND SATA 1RN SATA 1RP 11 AD45 GND V I O AD44 GND SATA 1TP 10 AD49 AD48 AD47 SATA ORN SATA ORP 9 4052 GND V I O GND 8 AD56 AD55 Y AD54 SATA OTN SATA OTP COM1_DSRZ 7 V I O AD58 COM1_DTR COM1_CTS COM1_RXD COM1_RTS 6 AD63 4062 USB P3P USB_P3N USB_P4P JSB OC 5 8 5 GND 64EN V I O C BE4 5V 1 5A MS_DATA 4 V I O BRSVP2B4 C BE7 GND 5V 1 5A KB_DATA 3 CLK4 GND GNT3 REQ4 2 CLK2 CLK3 SYSEN GNT2 1 CLK1 GND REQI GNT1 EKF 55 AD60 USB_P4N PAR64 MS_CLK C BE6 KB CLK GNT4 REQ3 REQ2 ekf com User Guide CCD CALYPSO Advanced CompactPCI 3U Pentium M CPU Board This pin is pulled up with 1kQ to V I 0 Other pull up resistor values e g 2 7kQ for V I 0 3 3V are available on request 2 This pin is pulled up via a OuickSwitch with 2 7kO to 5V 2 This pin is pulled up with 10kQ to 5V This pin is protected by a resettable PolySwitch fuse This pin is not connected H This pin is connected only in the rear I O configuration This pin is pulled up with 10kQ to 3 3V 9 This pin is connected to VCCRTC via a diode Pin positions printed blue Rear I O options jm E l m m N E m M m O mm l m m m Ri Ri E m m o jm i N el mm mm l ji mm n N
6. USB and audio expansion interface connector ATA IDE expansion connector High Speed PCI Express expansion connector e Suitable mezzanine companion boards available e C10 CFA CompactFlash adapter module C13 RD Front Panel CF Card Slot C15 DON On board USB stick module USB Flash disk C17 CFA Bottom mount CF Card Adapter H C23 SATA PCle to SATA controller USB SSD COM ports e C30 PATA 1 8 inch HDD SSD module H CCA LAMBADA Front panel COM USB AC97 audio PS 2 keyboard mouse on board hard disk drive 1 8 inch or 2 5 inch e CCB BOSSANOVA Front panel up to 2 x COM up to 2 x USB PS 2 keyboard mouse on board hard disk drive 1 8 inch or 2 5 inch H CCE PUNK Front panel 2 x COM 2 x USB 2 x 1394a FireWire on board hard disk drive 1 8 inch or 2 5 inch 6 ekf com User Guide CCD CALYPSO Advanced CompactPCI 3U Pentium M CPU Board Feature Summary CCD CALYPSO PATA IDE SATA CompactPCI PCI Express J2 P2 Rear I O BIOS Drivers All Major OS Typical Power Requirements EKF Ultra ATA 100 connector handover to CCA LAMBADA CCB BOSSANOVA CCE PUNK mezzanine expansion board with optional on board 2 5 inch hard disk drive or external device CompactFlash socket C10 CFA supplied for a CF memory card Option front panel CompactFlash slot C13 RD Option 1 8 inch on board HDD SSD module C30 PATA replaces CompactFlash facility Triple channel Serial ATA I F available for J2 P2 rear I O option suita
7. jm l Om l l mi o f 1 1 1 l 1 1 1 1 ke 9 E Y 8 q Eo o S 2 S ke ke wv un 2 D E E in TI N E uw E Lu e J2 2mm Metric Connector O EKF 250 0522 10 01 ekf com EKF 56 ekf com User Guide CCD CALYPSO Advanced CompactPCI 3U Pentium M CPU Board Literature Document Title CompactPCI PCI Express PCI Local Bus Ethernet USB CompactFlash EKF CompactPCI Specification PICMG 2 0 R3 0 Oct 1 1999 PCI Express Base Specification 1 1 PCI 2 2 2 3 3 0 Standards PCI SIG IEEE Std 802 3 2000 Edition Universal Serial Bus Specification CF and CompactFlash Specification Revision 3 0 www picmg org WWW pcisig com www pcisig com standards ieee org www usb org www compactflash org ekf com User Guide CCD CALYPSO Advanced CompactPCI 3U Pentium M CPU Board Appendix Mechanical Drawings The following drawing shows the positions of mounting holes and expansion connectors on the CCD CALYPSO 100 00 94 50 93 50 40 8 9 5 0 99 OP SOL 0 0VL 00091 p 5 E E SE EKF ekf com User Guide CCD CALYPSO Advanced CompactPCI 3U Pentium M CPU Board Top View CCD CALYPSO Shown w o Heatsink EKF BluLine Small CPCI Systems O EKF 59 ekf com User Guide CCD CALYPSO Advanced CompactPCI 3U Pentium M CPU Board mputers Made in Germa
8. 100Base TX Fast Ethernet and 10Base T Classic Ethernet capability Half or full duplex operation IEEE 802 3 Auto Negotiation for the fastest available connection e Jumperless configuration complete software configurable Two bicoloured LEDs integrated into the dedicated RJ 45 connector to signal the LAN link the LAN connection speed and activity status Each NIC Networking Interface Controller is connected by a single PCI Express lane to the chipset ICH6 Their MAC addresses unigue hardware number are stored in dedicated EEPROMs The Intel Ethernet software and drivers for the 82573 is available from Intel s World Wide Web site for download Serial ATA Interface SATA The CCD CALYPSO provides three serial ATA SATA ports each capable of transferring 150MP s Integrated within the ICH6 the SATA controller features different modes to support also legacy operating systems The SATA channels are routed to the CompactPCl J2 connector thus they are accessible via the rear I O transition module CCT RIO A LED named HD located in the front panel signals disk activity status of the SATA and IDE devices Available for download from Intel s web site are drivers for popular operating systems e g Windows 2000 Windows XP and Linux EKF 22 ekf com User Guide CCD CALYPSO Advanced CompactPCI 3U Pentium M CPU Board Enhanced IDE Interface The EIDE interface handles the exchange of information between the pr
9. M CPU Board Ethernet Connectors G ETH1 2 RJ45 1 CO SI OA U KR uN 27002095 SN U KR W WN 8 This signal may be switched either to the front connector or to the rear I O adapter CCT RIO NC1_MDXO NC1_MDXO NC1_MDX1 NC1_MDX2 NC1_MDX2 NC1_MDX1 NC1 MDX3 NC1_MDX3 NC2 MDX0 NC2 MDXO NC2 MDX1 NC2 MDX2 NC2 MDX2 NC2 MDX1 NC2 MDX3 NC2 MDX3 The upper green yellow dual LED signals 1Gbit s when lit yellow 100Mbit s when lit green and 10Mbit s when off The lower green LED indicates LINK established when continuously on and data transfer activity when blinking If the lower green LED is permanently off no LINK is established O EKF 45 ekf com User Guide CCD CALYPSO Advanced CompactPCI 3U Pentium M CPU Board Internal Connectors IDE PATA Legacy Expansion LPC Audio USB PCI Express x1 an C23 SATA C30 PATA CCA LAMBADA C23 SATA CCE PUNK CCB BOSSANOVA CCE PUNK CCE PUNK and other and many more and other CCD CALYPSO O EKF ekf com 11 ia ze Be tee MEE ele E OO DO CCD CALYPSO Mezzanine Module Side Board Expansion Options Mezzanine Expansion Connectors EKF 46 ekf com User Guide CCD CALYPSO Advanced CompactPCI 3U Pentium M CPU Board Expansion Interface Header PEXP GND 1 2 3 3V CLK 3 4 PCI 5 1 2 LPC_ADO 5 6 LPC_AD1 AD2 7 8 AD3
10. The CCD CALYPSO offers a LED marked as HD placed within the front panel This LED signals activity on any device attached to the SATA or the IDE ports GP General Purpose LED A second programmable LED can be also observed from the front panel The status of the GP LED is controlled by the GPO18 output of the ICH6 Setting this pin to 1 will switch on the LED As of current the GP LED is not dedicated to any particular hardware or firmware function this may change in the future Hot Swap Detection The CompactPCI specification added the signal ENUM to the PCI bus to allow the board hot swapping This signal is routed to the GPI3 of the ICH6 A System Management Interrupt SMI can be requested if ENUM changes by insertion or removal of a board Note that the CCD CALYPSO itself is not a hot swap device because it makes no sense to remove the system controller from a CompactPCI system However it is capable to recognize the hot swap of peripheral boards and to start software that is doing any necessary system reconfiguration O EKF 26 ekf com User Guide CCD CALYPSO e Advanced CompactPCI 3U Pentium M CPU Board Power Supply Status DEG FAL Power supply failures may be detected before the system crashes down by monitoring the signals DEG or FALF These active low lines are additions of the CompactPCI specification and may be driven by the power supply DEG signals the degrading of the supply voltages FAL there pos
11. a board reset signal By pressing the handle s red push button a short reset pulse is triggered To generate another reset the handle must be closed and unlocked again The manual reset could be passivated on customers request An alternative and recommended way to generate a system reset is to activate the signal PRST located on CompactPCl connector J2 pin C17 Pulling this signal to GND will have the same effect as to push the handle s red push button The healthy state of the CCD CALYPSO is signalled by the LED PG Power Good located in the front panel As soon as this LED begins to shine all power voltages are within their specifications and the reset signal has been deasserted An important reliability feature is the watchdog function which is programmable by software The behaviour of the watchdog is defined within the PLD which activates deactivates the watchdog and controls its time out period The time out delay is adjustable in the steps 2 10 50 and 255 seconds After alerting the WD and programming the time out value the related software e g application program must trigger the watchdog periodically All watchdog related functions are made available by calling service requests within the BIOS The watchdog is in a passive state after a system reset There is no need to trigger it at boot time The watchdog is activated on the first trigger reguest If the duration between two trigger reguests exceeds the programmed period the
12. addition an on board CF socket accommodates either a CompactFlash memory card or Microdrive As an alternate an 1 8 inch hard disk module is available as on board mass storage device option A local expansion interface connector may be used to directly attach a mezzanine companion board for audio and legacy support which can carry in addition a 2 5 inch IDE hard disk drive As an option a rear I O transition module is available to the CCD CALYPSO which e g provides the Serial ATA connectors 2 x SATA 1 x eSATA Benefits of the CCD CALYPSO Dual Screen Graphics Controller Dual Gigabit Ethernet Controllers Triple SATA F Seven USB 2 0 channels PCI Express Chipset 1915GM Alviso Ve Ak AS SA AS AA SA SA AGS RoHS compliant EKF Pentium M 2GHz FSB 533MHz CompactPCI CPU 2 x 1GB DDR2 Memory Dual Channel Mode Capable On Board CompactFlash or on Board 1 8 Inch Hard Disk Mezzanine Expansion Board and Rear I O Transition Module Options ekf com User Guide CCD CALYPSO Advanced CompactPCI 3U Pentium M CPU Board A rizontal Airflow Option AN Optimized Heatsink for Improved Horizontal Airflow Option EKF 10 ekf com User Guide CCD CALYPSO Advanced CompactPCI 3U Pentium M CPU Board CCD CALYPSO w C30 PATA 1 8 Inch HDD SSD Picture Similar EKF 11 ekf com User Guide CCD CALYPSO Advanced CompactPCI 3U Pentium M CPU Board D d i UR YL
13. c4 HSYNC c2 GREEN 2 This signal may be switched either to the front connector or to the rear I O adapter CCT RIO For attachment of an ordinary analog RGB monitor to the DVI I receptacle there are both adapters and also adapter cables available from DVI I to the HD SUB15 connector Attachment of digital monitors flat panel displays should be done by means of a DVI to DVI cable single link style cable is sufficient EKF J ekf com User Guide CCD CALYPSO Advanced CompactPCI 3U Pentium M CPU Board Video Monitor Connector VGA As an option the CCD CALYPSO can be equipped with a legacy VGA connector High Density D Sub 15 position female connector The VGA connector replaces the DVI I receptacle and the digital video interface therefore is not available with this option VGA Option 1 RED 2 GREEN 3 BLUE 5 4 NC 5 GND 6 GND 7 GND i 8 GND 9 DDC POW 10 GND 11 NC 12 DDC SDA 13 HSYNC 14 VSYNC 15 DDC SCL 5V protoected by a PolySwitch Fuse 0 75A 2 This signal may be switched either to the front connector or to the rear I O adapter CCT RIO EKF 43 ekf com User Guide CCD CALYPSO Advanced CompactPCI 3U Pentium M CPU Board USB Connectors USB Ports 1 2 EKF 5V protected by an Electronic Fuse 0 5A 44 1 2 3 4 POW USB DATA NEG USB DATA POS GND ekf com User Guide CCD CALYPSO Advanced CompactPCI 3U Pentium
14. connector or USB memory sticks Hence the CCD CALYPSO is virtually provided with all necessary I O ports However for compatibility purposes the CCD is additionally equipped with a simple Super l O chip for optional rear I O of PS 2 keyboard mouse and COM1 TTL level only across the J2 P2 CPCI connector The Super l O controller resides on the local LPC bus LPC Low Pin Count interface standard which is a serialized ISA bus replacement As an alternative EKF offers the CCA LAMBADA an expansion module to the CCD CALYPSO featuring all classic Super l O functionality The CCA LAMBADA is a 3U Eurocard with a 4HP single width front panel Access to the connectors PS 2 mouse keyboard COM USB and audio in out is given directly from the front panel The CCA LAMBADA connects to the CCD CALYPSO across the EKF 24 ekf com User Guide CCD CALYPSO Advanced CompactPCI 3U Pentium M CPU Board connector PEXPT or PEXPB The CCA LAMBADA can be attached either to the top or to the bottom of the CCD CALYPSO Reset Watchdog The CCD CALYPSO is provided with two supervisor circuits to monitor the supply voltages 1 8V 3 3V 5V and to generate a clean power on reset signal Due to lack of space within the front panel the CCD CALYPSO does not offer a classical push button to force a manual board reset Nevertheless it is possible to reset the board manually The handle within the front panel contains a micro switch that is used to generate
15. module CCT RIO instead Each of the above functions can be activated individually by appropriate stuffing removing of resistor networks The CCD CPU card by default is suitable for a 64 bit CompactPCI backplane However the J2 P2 pin assignments of a 64 bit CPCI backplane differ substantially from a CompactPCI rear VO backplane Hence usage of the rear I O features is available only as stuffing options on the CCD CPU board which have to be ordered explicitly The system in use must be equipped with a P2 CompactPCI rear I O backplane If the system is provided with a P2 CompactPCI 64 bit backplane instead several of the CCD rear I O signals will collide with the 64 bit address data lines on the backplane with unpredictable results regarding the rear I O signal integrity Sk Yo Single Slot Rear I O Backplane EKF Part No 932 4 01 080 EKF 28 ekf com User Guide CCD CALYPSO Advanced CompactPCI 3U Pentium M CPU Board Installing and Replacing Components Before You Begin Warnings The procedures in this chapter assume familiarity with the general terminology associated with industrial electronics and with safety practices and regulatory compliance required for using and modifying electronic equipment Disconnect the system from its power source and from any telecommunication links networks or modems before performing any of the procedures described in this chapter Failure to disconnect power or telecommunication lin
16. on the PCI enumeration schema implemented in BIOS 2 The CCD CALYPSO is available with a 82573E 0x108B or 82573L 0x109A Ethernet controller EKF 34 ekf com User Guide CCD CALYPSO Advanced CompactPCI 3U Pentium M CPU Board Local SMB Devices The CCD CALYPSO contains a few devices that are reachable via the System Management Bus SMBus These are the clock generation chip the SPD EEPROMs on the SO DIMM memory modules a general purpose serial EEPROM and a supply voltage and CPU temperature controlling device in particular Other devices could be connected to the SMB via the CompactPCI signals IPMB SCL J1 B17 and IPMB SDA J1 C17 0x58 Hardware Monitor CPU Temperature Sensor LM87 SPD of SODIMM1 OxA2 SPD of SODIMM2 OxAE General Purpose EEPROM OxD2 Main Clock Generation CK 410M Hardware Monitor LM87 Located on the SMBus the CCD CALYPSO offers a hardware monitor of type LM87 NSC This device is capable to observe board and CPU temperatures as well as several supply voltages generated on the board with a resolution of 8 bit The following table shows the mapping of the voltage inputs of the LM87 to the corresponding supply voltages of the CCD CALYPSO AIN1 CPU Core Voltage 9 8 0x28 AIN2 1 05V 9 8 0x29 VCCP1 1 5V 14 1 0x21 VCCP2 D2 1 8V 14 1 0x25 2 5V D2 2 5V 13 0x20 3 3V 3 3V 17 2 0x22 5V 5V 26 0x23 12V 12V 62 5 0x24 Revision 2 or higher Beside the continuous measuring
17. s proprietary PCI express based SDVO interface to the differential DVI signals The Silf 362 Silicon Image transmitter uses PanelLink Digital technology to support displays ranging from VGA to UXGA resolutions 25 165Mpps in a single link interface The GMCH supports several video resolutions and refresh rates A partial list is contained in the table below Please note that flat panel displays should be operated with their maximum resolution at 60Hz refresh rate 640x480 NA AA ZU ZU Ava 800x600 VA VI v v Vi J 1024x768 7 Vi 2 J Z VIs VIs 1280x1024 A VIs VIs VIs 1600x1200 A Zf Z2 2048x1536 T ic v Z O EKF 23 ekf com User Guide CCD CALYPSO e Advanced CompactPCI 3U Pentium M CPU Board 9 This video mode is suitable for popular flat panel displays As an option the CCD CALYPSO can be equipped with an ordinary HD D Sub 15 lead connector VGA style This connector is suitable for analog signals only so the PanelLink transmitter is not stuffed with this option Nevertheless also flat panel displays can be attached to the D Sub connector but with minor reduced image quality Independent from the video connector actually in use DVI or VGA the VESA DDC 2B standard is supported This is a two wire serial bus clock data which is controlled by the GMCH and allows to read out important parameters e g the maximum allowable resolution from the attached monitor In addition DDC Power 5V i
18. slot for I O boards system slot for CPU boards with the system slot typically most right or most left to the backplane Insert card carefully be sure not to damage components mounted on the bottom side of the board by scratching neighboured front panels A card with onboard connectors reguires attachment of associated cabling now e Lock the ejector lever fix screws at the front panel top bottom Retain original packaging in case of return O EKF 30 ekf com User Guide CCD CALYPSO Advanced CompactPCI 3U Pentium M CPU Board Removing the Board Warning This procedure should be done only by qualified technical personnel Disconnect the system from its power source before doing the procedures described here Failure to disconnect power or telecommunication links before you open the system or perform any procedures can result in personal injury or equipment damage Typically you will perform the following steps Switch off the system remove the AC power cord Attach your antistatic wrist strap to a metallic part of the system A Identify the board be sure to touch the board only at the front panel unfasten both front panel screws top bottom unlock the ejector lever Remove any onboard cabling assembly Activate the ejector lever Remove the card carefully be sure not to damage components mounted on the bottom side of the board by scratching neighboured front panels Store board in the original
19. watchdog times out and a system reset will be generated The watchdog remains in the active state until the next system reset There is no way to disable it once it had been put on alert whereas it is possible to reprogram its time out value at any time Firmware Hub Flash BIOS The BIOS is stored in an 82802 8Mbit Firmware Hub there are second sources in use with deviant part numbers The firmware hub contains a nonvolatile memory core based on flash technology allowing the BIOS to be upgraded The FWH can be reprogrammed if suitable by a DOS based tool This program and the latest CCD CALYPSO BIOS are available from the EKF website Read carefully the enclosed instructions If the programming procedure fails e g caused by a power interruption the CCD CALYPSO may no more be operable In this case you would have to send in the board because the BIOS is directly soldered to the PCB and cannot be changed by the user EKF 25 ekf com User Guide CCD CALYPSO Advanced CompactPCI 3U Pentium M CPU Board PG Power Good LED The CCD CALYPSO offers a software programmable LED labelled PG located within the front panel After system reset this LED defaults to signal the board healthy respective power good state This LED changes its function by calling an appropriate BIOS request and is then controlled by software only The PG LED remains in the programmable state until the next system reset occurs HD Hard Disk Activity LED
20. with an attached designate active low lines Trade Marks Some terms used herein are property of their respective owners e g Intel Pentium Celeron Pentium M Core Duo amp Intel gt CompactPCI PICMG Windows 2000 Windows XP amp Microsoft EKF ekf system amp EKF EKF does not claim this list to be complete Legal Disclaimer Liability Exclusion This manual has been edited as carefully as possible We apologize for any potential mistake Information provided herein is designated exclusively to the proficient user system integrator engineer EKF can accept no responsibility for any damage caused by the use of this manual O EKF 5 ekf com User Guide CCD CALYPSO Advanced CompactPCI 3U Pentium M CPU Board CCD CALYPSO Features Feature Summary Feature Summary CCD CALYPSO Form Factor Processor Chipset Memory Video USB Ethernet Mezzanine UO O EKF Single size CompactPCI style Eurocard 160x100mm front panel width 4HP 20 3mm Designed for Intel Pentium M Micro FC BGA 479 processors 90nm Dothan maximum junction temperature 100 C CCD 2 1 0GHz ULV Celeron M Dothan 373 400MHz FSB 512KB L2 cache 5W CCD 3 1 4GHz LV Pentium M Dothan 738 400MHz FSB 2MB L2 cache 10W CCD 6 2 0GHz Pentium M Dothan 760 533MHz FSB 2MB L2 cache 27W Intel i915GM chipset Alviso consisting of 82915GM Graphics Memory Controller Hub GMCH with
21. 1 IDE AO IDE 51 IDE ACTH 39 O Fa 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 GND IDE 008 IDE DO9 IDE D10 IDE D11 IDE D12 IDE D13 IDE D14 IDE D15 3 3V 3 3V GND GND 5V 5V GND IDE CBLIDA IDE A2 IDE 53 GND Like the expansion interface header the IDE connector is also available on both sides of the board WARNING Neither the 3 3V pin nor the 5V pin are protected against a short circuit situation This connector therefore should be used only for attachment of the C10 CFA adapter or an expansion board like CCA LAMBADA The maximum current flowing across these pins should be limited to 2A per power rail O EKF A8 ekf com User Guide CCD CALYPSO Advanced CompactPCI 3U Pentium M CPU Board C13 RD Front Panel CF Card Slot C17 CFA Bottom Mount CF Card Adapter EKF 49 ekf com User Guide CCD CALYPSO Advanced CompactPCI 3U Pentium M CPU Board PCI Express Expansion Header PPCIE GND 1 2 GND a ROV 3 4 ION PSV 5 6 1 269 1 020 002 GND 7 8 GND PE_CLKP 9 10 PE_RST EU PE CLKN 11 12 PE WAKE High Speed Socket Connector GND 13 14 GND PE WP 5 16 PE_1RP PE 1TN 1 18 PE_1RN GND 1 20 GND The PCI Express expansion interface header is available on the top side of the board WARNING Neither the 3 3V pin nor the 5V pin are protected against a short circuit situation The maximum current flowing across these pins should be limited
22. Connectors Added information regarding Ethernet Jumbo Frame support to table Feature Summary Added replaced several photos and illustrations Table J1 pin D15 changed to not connected Corrected section Replacement of the Battery gn gn gn gn j gn gn gn 2005 10 28 2005 12 02 4 January 2006 2006 01 19 23 March 2006 2006 05 05 2006 07 20 23 August 2006 25 September 2006 2007 02 13 7 February 2008 27 November 2008 23 March 2010 2010 09 06 ekf com User Guide CCD CALYPSO Advanced CompactPCI 3U Pentium M CPU Board Related Documents For information about the CCA LAMBADA mezzanine companion board refer to the CCA Technical Information Manual available at http www ekf com c ccpu cca cca_tie pdf For information about the CCB BOSSANOVA mezzanine companion board refer to the CCB Technical Information Manual available at http www ekf com c ccpu ccb ccb_tie pdf For information about the CCE PUNK mezzanine companion board refer to the CCE Technical Information Manual available at http www ekf com c ccpu cce cce tie pdf For information regarding the CCT RIO rear I O transition module please read the CCT Technical Information Manual available at http www ekf com c ccpu ccd cct tie pdf For ordering information refer to document CCD CALYPSO Product Information available at http www ekf com c ccpu ccd ccd_pie paf Nomenclature Signal names used herein
23. D5 C BEO AD10 AD13 C BE1 PERR LOCK TRDY C BE2 AD19 AD22 AD24 AD27 AD31 GNT INTS INTD 5V This pin is pulled up with 1kQ to V I O Other pull up resistor values e g 2 7kQ for V I 0 3 3V are available on request This pin is not used on CCD CALYPSO but pulled up with 1kQ to V I O Other pull up resistor valus on request This pin is fixed to GND on CCD CALYPSO to force 33MHz operation since 66MHz operation is not supported This pin is pulled up with 2 4k to J1 pin A4 This pin is not connected EKF 54 ekf com User Guide CCD CALYPSO e Advanced CompactPCI 3U Pentium M CPU Board CompactPCI J2 GAO 3 GA4 GA3 GA2 GA1 21 CLK6 GND RSV RSV NC1_MX2 NC1_MX3 20 CLK5 GND RSV GND NC1_MX2 19 GND RSV RSV NC1_MX1 NC1_MX1 BRSVP2A18 VGA RED BRSVP2B18 VGA GREEN BRSVP2C18 VGA_HSYNC 18 RSV NC1_MX3 RSV NC1_MX04 RSV NC1_MXO BRSVP2E18 PXI_TRIG6 VGA VSYNC GNT6 BRSVP2E16 PXI_TRIG7 DDE SDA GNT5 AD32 GND AD36 SATA 2TN AD39 GND AD43 SATA_1TN AD46 COM1_TXD 4057 COM1_DCD 17 BRSVP2A17 GND PRST VGA BLUE 16 BRSVP2A16 BRSVP2B16 DEG PXI_TRIG1 PXI TRIGO 15 BRSVP2A15 GND FAL REQ5 14 AD35 H AD34
24. Diagram CCD CALYPSO O EKF ekf com SO DIMM 200 Front Panel I O E IDE USB1 USB2 0 VGA SATA USB Gigabit Ethernet SIO1 KB MS 82 2 5 com 5 3 lt v GPIO ETH FWH1 82 LA 573 802 Gigabit Ethernet PCI 32biy33MHz PCle Expansion t Future Opt CCA LAMBADA Expansion or CCB BOSSANOVA Option Expansion Board Opt CCA LAMBADA lt lt or CCB BOSSANOVA Expansion Board Rear I O Opt Rear WO CCT RIO CompactPCI User Guide CCD CALYPSO Advanced CompactPCI 3U Pentium M CPU Board Top View Component Assembly CCD CALYPSO OSSAVO UI DIO LO ya EKF os ekf com User Guide CCD CALYPSO Advanced Com pactPCI 3U Pentium M CPU Board Rear I O Transition Module CCT RIO Available as a rear I O expansion board to the CCD CALYPSO CPU card the CCT RIO is provided with several I O port connectors to be used either in addition to the CCD front panel connectors or alternatively Being mainly a passive rear I O transition module groups of signals from the CCD CALYPSO CPU board are passed across the CompactPCl J2 P2 connector to the CCT RIO Some of the data lines are available locally on the CCT board for system internal wiring only while other connectors such as VGA Video and Gigabit Ethernet are mounted into the back panel for external use USB and SATA eSATA c
25. Intel Graphics Media Accelerator GMA 900 82801FB I O Controller Hub ICH6 82802 Compatible Firmware Hub FWH Dual 200 pin SO DIMM socket DDR2 533 SDRAM 2 x 1GB maximum single or dual channel mode Analog monitor and digital flat panel display support by DVI I connector front panel up to 2048x1536 pixel 16M colours 75Hz refresh rate analog up to 1600 x 1200 pixel 16M colours D60Hz digital incorporates PanelLink Digital technology Silicon Image Front panel option D Sub female HD15 VGA connector available replaces DVI I connector Rear I O option Analog video across J2 P2 CCT RIO rear I O transition module Dual screen capable 2 x 1600 x 1200 pixel one display attached to the front panel the other to the back panel or both to the front panel by means of a DVI I splitter cable All ports over current protected data transfer rate of up to 480Mbps conforming to USB2 0 2 x USB type A connector front panel 3 x USB ports J2 P2 Rear I O option CCT RIO rear I O transition module 2 x USB ports expansion interface option CCA LAMBADA CCB BOSSANOVA CCE PUNK mezzanine companion board USB Flash drive module C15 DON option USB stick on board module e Dual 10 100 1000Mbps Gigabit Ethernet controller e Accessible via RJ45 jacks from the front panel e Option 1 x GbE across J2 P2 with attached CCT RIO rear I O transition module Jumbo Frame support up to 9KB e On board LPC USB AC97 Super l O
26. Line Not used on CCD fixed to GND Not used on CCD fixed to GND CompactPCl Bus Grant Line 6 CompactPCI Bus Grant Line 5 General Purpose LED Control via PLD Not used on CCD Local Option Reg Interface within PLD Local Option Reg Interface within PLD Connect SERIRO to CompactPCl Line INTS LOW SERIRO disconnected from INTS HIGH SERIRO connected to INTS Connect CPCI IPMB to local SMBus LOW IPMB disconnected from SMBus HIGH IPMB connected to SMBus Enable CompactPCl Clock Buffer 36 ekf com User Guide CCD CALYPSO Advanced CompactPCI 3U Pentium M CPU Board CCD CALYPSO GPIO Usage ICH6 GPIO SS acte GPI 26 3 3V N A Not used on CCD fixed to GND GPIO 27 O 3 3V VGA SWITCH VGA Switching Line LOW VGA via Rear HIGH VGA via Front I O GPIO 28 O 3 3V ETH_SWITCH Ethernet Switching Line LOW Ethernet Port 1 via Rear I O HIGH Ethernet Port 1 via Front I O GPI 29 31 3 3V BOARD CFG Board Configuration Jumpers GPIO 32 O BSM NC EN Enable Ethernet Controller NC1 GPIO 33 O SEV NC2_EN Enable Ethernet Controller NC2 GPIO 34 VO N A Not used on CCD GPI 40 5V CPCI_REQ4 CompactPCl Bus Request Line 4 GPI 41 3 3V LPC DRQEXP Expansion Interface LPC DMA Request Line GPO 48 O 3 3V GNT4 CompactPCI Bus Grant Line 4 GPO 49 OD 1 05V CPU PWRGD CPU Power Good Line EKF 37 ekf com User Guide CCD CALYPSO Advanced CompactPCI 3U Pentium M CPU Board GPIO Usage FWH CCD CALYPSO GPI
27. O Usage FWH a Y TTT Y Y NIN GPI O GPI 1 GPI 2 GPI 3 GPI 4 GPIO Usage SIO 3 3V 3 3V SON 3 3V 3 3V FWH_ID FWH Identity Fixed to GND indicates FWH 1 IDE_CLBID IDE 80pol Cable Detection Line WDOGRST Last Hardware Reset caused by watchdog LSB PCB REV GPI 4 GPI3 Rev 0 0 0 0 1 1 MSB PCB REV 1 0 2 1 1 D CCD CALYPSO GPIO Usage SIO GPIO SE AS GPIO 13 GPIO 14 15 GPIO 16 GPIO 17 GPIO 20 GPIO 21 GPIO 22 25 GPIO 26 GPIO 27 VO VO VO VO VO VO VO VO 5V CPCI_64EN 5V 8maA N A 5V 24mA SIO GPIO16 5V24mA SIO GPIO17 5V 8mA PXI TRIGO 5V 8mA PXI TRIG 1 5V 24mA N A 5W24mA PXI_TRIG6 5V24mA PXI_TRIG7 CompactPCl 64 Bit Backplane Not used on CCD GPIO on Expansion Interface PEXP Pin 29 GPIO on Expansion Interface PEXP Pin 30 PXI Trigger O on CompactPCl J2 Pin B16 PXI Trigger 1 on CompactPCl J2 Pin A16 Not used on CCD PXI Trigger 6 on CompactPCl J2 Pin E18 PXI Trigger 7 on CompactPCl J2 Pin E16 These GPIOs have pullup resistors of approx 50kO within the SIO EKF 38 ekf com User Guide CCD CALYPSO Advanced CompactPCI 3U Pentium M CPU Board Configuration Jumpers Reset Jumper BIOS CMOS RAM Values JGP The jumper JGP is used to bring the contents of the battery backed CMOS RAM to a default state The BIOS uses the CMOS to store configuration values e g the actual boot devices Using this jumper is only necessary if it is n
28. PCI 3U Pentium M CPU Board Installing or Replacing the Memory Modules Note If you decide to replace the memory observe the precautions in Before You Begin By default the CCD CALYPSO comes fully equipped and tested with two DDR2 SD RAM memory modules So normally there should be no need to install the memory modules The CCD CALYPSO requires at least one PC2 3200 4200 400 533MHz DDR2 SDRAM SO DIMM module for better performance two SO DIMMs of equal capacity are recommended Further it is highly recommended that Serial Presence Detect SPD SO DIMMs be used since this allows the chipset to accurately configure the memory settings for optimum performance A replacement memory module must match the 200 pin SO DIMM form factor known from Notebook PCs DDR2 V 1 8V PC2 3200 PC2 4200 400 533MHz on die termination ODT unbuffered non ECC style Suitable modules are available up to 1GB The i915GM supports modules of up to a maximum of 14 address lines A0 A13 Memory modules organized by more than14 address lines are not suitable Replacement of the Battery When your system is turned off a battery maintains the voltage to run the time of day clock and to keep the values in the CMOS RAM The battery should last during the lifetime of the CCD CALYPSO For replacement the old battery must be desoldered and the new one soldered We suggest that you send back the board to EKF for battery replacement Warning Danger of explosio
29. a a 23 Graphics ISSN xu x sata kana den den ala duan ew Wl AAA ADA AAA 23 Real Time A 24 Universal Serial Bus USB os o ja Ka Wl Wa a dah kulk A ARA ARA ET AAA ARA AR 24 LPC Super UO Interface uu d A dE EE 4 9 9 EW BUAN ADA dl d die A 25 ReseU Watchdog a elteren do kK de d dw dw n MB KK KK 25 Firmware Hub Flash BIOS dic vivo var vos Pega pira a yD lies a uad 26 PG Power Good LED EE 26 HD Hard Disk Activity LED qa odie Are kk kK KK KK KK as dica ia KI KIRI ia Arr 26 GP General Purpose LED i ss sl a n e nln n ahde b ka a be dn bbe eee 26 Hot Swap RE e EE 26 Power Supply Status DEG FAL 27 PXI Trigger OMS TT eN a da 27 Loc a OGRO E 27 Rear VO OPHONS a IA 28 Installing and Replacing Components Vii a t ch re KK KK k 29 Before You Begin EE 29 Installing the Board AAA AAA ARA AAA NS UC ARA AR 0 30 Removing the Board vk kk kk kk kk kk kK KK KK KK KK KK KI KK KK KK KI KK KK KK KI KK KK KK 31 De aan E EEN 32 Installing or Replacing the Memory Module 33 Replacement of the Battery 33 Technical Reference a Ae ed kk kk kk kK kK beh KK cr KI KK y ld KI KK KK KI KK KK KK KI KIR KK KK KK KK KK 83 34 Bai PEI DEVICES ici ir y A an M MAR she A 34 E NM YNAD MM MM MI ADY ASA FE AEYN FFA A FY AF FFA FFAW AFF 35 Hardware Monitor RRE 36 EKF 2 ekf com User Guide CCD CALYPSO Advanced Compac
30. between the CCE PUNK I O module and the CPU carrier board is achieved by several expansion connectors which comprise the PCle PCI Express LPC Low Pin Count and ATA IDE interfaces As an option the CCE PUNK is available with a rugged on board 2 5 inch hard disk drive 1 8 inch as a mezzanine module The CCE PUNK will be attached on top of the CPU board and shares its front panel typically with the host CPU carrier board 8HP front panel width in total Ol gt CCD CALYPSO CPU Board with CCE PUNK Mezzanine Companion Module EKF ekf com User Guide CCD CALYPSO Advanced CompactPCI 3U Pentium M CPU Board Strapping Headers ISPCON JGP JRST JRTC JSPK PLD Programming Connector not stuffed Jumper to Reset BIOS CMOS RAM Values Jumper to Reset Board Jumper to Reset RTC Core of ICH6 not stuffed Speaker Connector Connectors amp Sockets J1 J2 PEXPT PEXPB PIDET PIDEB PITP PPCIE SODIMM1 SODIMM2 CompactPCI Bus 32 bit 33MHz PXI Rear I O Expansion Interface Connector LPC Interface 2 Super I O 2 FWH USB Interfaces AC 97 Interface GPlOs available either from top T or bottom B of the board Ultra ATA 100 IDE Port Interface to CompactFlash ATA Socket on C10 CFA available either from top T or bottom B of the board CPU Debug Port PCI Express Expansion Interface Connector 200 pin DDR2 Memory Module SDRAM PC2 3200 4200 DDR400 533 Sockets Front Pa
31. ble rear UO transition module CCT RIO 2 x system internal SATA 1 x eSATA for attachment of external devices ICH6 integrated 32 bit PCI bridge 133MBps CPCI master 1 Lane PCle connector option for CCE PUNK and future mezzanine companion boards 3 x Serial ATA SATA 2 x system internal SATA connectors 1 x external eSATA connector 1 x GB Ethernet switched by BIOS between front panel I O and rear VO 3 USB VGA Analog Video or GPIO Keyboard Mouse COM1 TTL Level Suitable rear I O transition module CCT RIO available Phoenix BIOS with EKF enhancements 8Mbit Flash memory Updates available from website ekf com Intel graphics drivers Intel networking drivers 3 3V 0 17V 0 1V 5V 0 25V 0 15V Board MaxPower WinXP Idle MaxPower WinXP Idle LFM HFM LFM HFM LFM HFM LFM HFM CCD 2 CALYPSO DTA IDAS 12 2 054 CCD 3 CALYPSO 2 9A 2 9A 2 2 2 2 1 2 2 4 0 7 0 9 CCD 6 CALYPSO 3 0A 3 3A 2 3A 2 3A 1 2A 5 2A 0 7N 1 6A 7 ekf com User Guide CCD CALYPSO Advanced CompactPCI 3U Pentium M CPU Board Feature Summary CCD CALYPSO Thermal Conditions Environmental Conditions EC Regulations MTBF Performance Rating Measured with PCMark2002 under Windows XP 1GB DDR2 533 1 2 EKF Operating temperature 0 C 70 C CPU dependent Storage temperature 40 C 85 C max gradient 5 C min Humidity 5 95 RH non condensing Altitude 300m 3000m
32. ced from the 5V plane The processor signals its required core voltage by 6 dedicated pins according to Intels IMVP IV voltage regulator specification 0 09 Dothan Processors Supported Processor Speed Host Bus L2 Cache TDP DieTemp CPUID Stepping sSpec min max MHz MB W C GHz ULV Celeron M 373 1 0 1 0 400 0 100 06D8h SL8LW LV Pentium M 738 0 6 1 4 400 2 10 0 100 06D6h B 0 SL7P9 06D8h 0 SL89N Pentium M 745 0 6 1 8 400 2 21 0 100 06D6h B 0 SL7Q6 06D8h 0 SL8U8 Pentium M 760 0 8 2 0 533 2 27 0 100 06D8h C 0 SL869 This processor does not support SpeedStep technology since it runs at a fixed core speed 2 Following the Intel Embedded Roadmap this processor is recommended for long time availability EKF 20 ekf com User Guide CCD CALYPSO Advanced CompactPCI 3U Pentium M CPU Board Thermal Considerations In order to avoid malfunctioning of the CCD CALYPSO take care of appropriate cooling of the processor and system e g by a cooling fan suitable to the maximum power consumption of the CPU chip actually in use Please note that the processors temperature is steadily measured by a special controller LM87 attached to the onboard SMBus System Management Bus A second temperature sensor internal to the LM87 allows for acquisition of the boards surface temperature Beside this the LM87 also monitors most of the supply voltages A suitable software to display both the tempe
33. f com 1 3 3V 2 Serial Out 3 Serial In 4 ispGAL Enable 5 NC 6 Mode 7 GND 8 Clock Note The ISPCON is not stuffed Its footprint is situated at the bottom side of the board EKF 52 ekf com User Guide CCD CALYPSO Advanced CompactPCI 3U Pentium M CPU Board Processor Debug Header PITP PITP 1 O o N OS Uu Bb N IS ND Boi u BM MN Bi uU MS MS MRS M CIN fom O RS U Bom EW Bom Ol Je SS EA Ee TDI TMS TRST NC TCK NC TDO BCLKN BCLKP GND FBO RST BPM5 GND BPM4 GND BPM3 GND BPM2 GND BPM1 GND BPMO DBA DBR VTAP Vr Vr Note The Debug Header is situated at the bottom side of the board EKF 53 ekf com User Guide CCD CALYPSO e Advanced CompactPCI 3U Pentium M CPU Board CompactPCI J1 25 5V 24 AD1 23 3 3V 22 AD7 21 3 3V 20 AD12 19 3 3V 18 SERR 17 3 3V 16 DEVSEL 15 3 3V 14 13 12 11 AD18 10 AD21 9 C BE3 8 AD26 7 AD30 6 REQ H 5 BRSVP1A5 5 4 IPMB PWR 3 INTA 2 5 1 5V SL REQ644 5V AD4 GND AD9 GND AD15 GND IPMB SCL GND FRAME AD17 GND 5 GND AD29 GND BRSVP1B5 5 GND INTB 5V 12V ENUM V 1 0 AD3 3 3V AD8 V VO AD14 3 3V IPMB SDA V O IRDY KEY AREA 1 3 3V ADO 5V AD6 M66EN AD11 GND PAR GND STOP 5 GND AD20 GND AD25 GND CLK GND INTP 5V 5 12V 5V ACK64 AD2 A
34. hannels are provided both on board and externally Typically the CCT RIO is equipped with a 4 HP rear panel 20 3mm width As a custom specific option an 8 HP panel is available with additional connectors Utilization of the CCT RIO transition module adds a level of I O functionality that is not available with the CCD CALYPSO CPU board alone Further on swapping the CPU card is simplified by means of rear I O which is important for efficient system maintenance MTTR For technical details please refer to the CCT RIO Technical Information Manual available at www ekf com c ccpu ccd cct_tie pdf CCT RIO Shown with on Board USB Stick EKF ekf com User Guide CCD CALYPSO Advanced CompactPCI 3U Pentium M CPU Board Block Diagram CCT RIO Video GPIO 2 E com a COM e ei ADM Ro COM 5 TIL d a 211 Ca RS 232E e Ethernet USB LM 3526 KB MS 2 a SATA gt Zo os 25 Ue Os na o T oo E c o E amp o ES TE ES P POW 28 2 ES EKF io 5V ekf com CCD CALYPSO with CCT RI EKF 17 ekf com User Guide CCD CALYPSO Advanced CompactPCI 3U Pentium M CPU Board CCE PUNK Mezzanine Module Available as a mezzanine companion board to the CCD CALYPSO CPU card the CCE PUNK is provided with high speed communication channels such as FireWire and USB and common legacy ports as well Interconnection
35. installing 200 pin SO DIMM modules module height 1 25 inch Supported are unbuffered DDR2 SO DIMMs V 1 8V without ECC featuring on die termination ODT according the PC2 3200 or PC2 4200 specification Minimum memory size is 128MB maximum memory size is 2GB Due to the video requirements of the i915GM chipset a minimum of 2x256MB of memory is recommended for the operating systems Windows NT 4 0 Windows 2000 or Windows XP some of the system memory is dedicated to the graphics controller The contents of the SPD EEPROM on the SO DIMMs is used by the BIOS at POST Power on Self Test to program the memory controller within the chipset The 915GM chipset supports symmetric and asymmetric memory organization The maximum memory performance can be obtained by using the symmetric mode To achieve this mode two SO DIMMs of egual capacity must be installed in the memory sockets In asymmetric mode different memory modules may be used with the drawback of less bandwidth A special case of asymmetric mode is to populate only one memory module i e one socket may be left empty LAN Subsystem The Ethernet LAN subsystem is composed of two Intel 82573 Gigabit Ethernet controllers that provide also legacy 10Base T and 100Base TX connectivity The Ethernet ports are fed to two RJ45 jacks located in the front panel Each port includes the following features e One PCI Express lane per Ethernet controller 250MB s e 1000Base Tx Gigabit Ethernet
36. ks before you open the system or perform any procedures can result in personal injury or eguipment damage Some parts of the system can continue to operate even though the power switch is in its off state Caution Electrostatic discharge ESD can damage components Perform the procedures described in this chapter only at an ESD workstation If such a station is not available you can provide antistatic wrist strap and attaching it to a front panel Store the board only in its some ESD protection by wearing an metal part of the system chassis or board original packaging antistatic bag and antistatic box in case of returning the board to EKF for rapair original ESD protected packaging Retain the O EKF 29 ekf com User Guide CCD CALYPSO Advanced CompactPCI 3U Pentium M CPU Board Installing the Board Warning This procedure should be done only by qualified technical personnel Disconnect the system from its power source before doing the procedures described here Failure to disconnect power or telecommunication links before you open the system or perform any procedures can result in personal injury or equipment damage Typically you will perform the following steps Switch off the system remove the AC power cord Attach your antistatic wrist strap to a metallic part of the system A Remove the board packaging be sure to touch the board only at the front panel Identify the related CompactPCI slot peripheral
37. l Drawings kk kk kk kk kk kk KK KK A a 58 EKF 3 ekf com About this Manual User Guide CCD CALYPSO Advanced CompactPCI 3U Pentium M CPU Board This manual describes the technical aspects of the CCD CALYPSO required for installation and system integration It is intended for the experienced user only Edition History P Contents Changes EKF User Manual CCD CALYPSO english ccd uge wpd initial edition Text 3946 File Corrected table of local PCI devices added section Hardware Monitor LM87 Added images CCD CALYPSO CCT RIO Added chapter Appendix containing mechanical drawings Added image CCD CALYPSO top view w o heatsink Added image of single slot backplane for SAC SBC operation Reworked sections Reset Watchdog Real Time Clock table GPIO Usage FWH and table GPIO Usage ICH6 Corrected mechanical drawing in chapter Appendix position of PPCIE Corrected table of expansion interface connector PEXP pin 40 Updated table Feature Summary from latest product info Removed some typos Added images CCD CALYPSO w CCB BOSSANOVA C15 DON CCD CALYPSO w C10 CFA Updated table Feature Summary Updated table Processors Supported Added Performance Score for CCD 2 Added Power Requirements Added 12V connectivity to table of expansion interface connector PEXP pin 40 and to the table in section Hardware Monitor LM87 Added photo section CCE PUNK modified illustration Front Panel
38. ll of these connectors are overcurrent protected Do not use these internal connectors for powering devices external to the computer chassis A fault in the load presented by the external devices could cause damage to the board the interconnecting cable and the external devices themselves Front Panel Connectors O EKF draft only do not scale ekl com KE Al 31 A KS CCD CALYPSO MM ES CCD CALYPSO DVI VGA CCD CALYPSO w CCB BOSSANOVA CCD CALYPSO w CCE PUNK Typical CCD CALYPSO Front Panel Elements EKF 40 ekf com EKF User Guide CCD CALYPSO Advanced CompactPCI 3U Pentium M CPU Board n ccr BG RIO SYSTEN TAM wo g E E E wac CCT RIO 4 8HP Typical CCT RIO Rear Panel Elements A ekf com User Guide CCD CALYPSO Advanced CompactPCI 3U Pentium M CPU Board Video Monitor Connector DVI I DVI I 1 18 19 20 21 22 23 24 1 BENEEHNHEG 28 u u u u u ES x 5V protoected by a PolySwitch Fuse 0 75A TXO 9 TX1 1 TX2 TXO 10 TX1 2 TX2 GND 11 GND 3 GND 12 4 13 5 GND 14 DDC POW 6 DDE SCL TXC 15 GND 7 DDC SDA TXC 16 DVI HP 8 VSYNC c3 BLUE c1 RED c6 GND c5 GND
39. n if the battery is incorrectly replaced Replace only with the same or equivalent type Do not expose a battery to fire EKF 33 ekf com User Guide CCD CALYPSO e Advanced CompactPCI 3U Pentium M CPU Board Technical Reference Local PCI Devices The following table shows the on board PCI devices and their location within the PCI configuration space These devices consist of the Ethernet controllers and several devices within the i915GM chip set 0 0 0 0x8086 0x2590 Host Bridge 0 2 0 0x8086 0x2592 Internal Graphics Device 0 2 1 0x8086 0x2792 Int Graphics Config Regs 0 27 0 0x8086 0x2668 Intel High Definition Audio 0 28 0 0x8086 0x2660 PCI Express Port 1 0 28 1 0x8086 0x2662 PCI Express Port 2 0 28 2 0x8086 0x2664 PCI Express Port 3 0 28 3 0x8086 0x2666 PCI Express Port 4 0 29 0 0x8086 0x2658 USB UHCI Controller 1 0 29 1 0x8086 0x2659 USB UHCI Controller 2 0 29 2 0x8086 0x265A USB UHCI Controller 3 0 29 2 0x8086 0x265B USB UHCI Controller 4 0 29 7 0x8086 0x265C USB 2 0 EHCI Controller 0 30 0 0x8086 Ox244E PCl to PCI Bridge 0 30 2 0x8086 Ox266E AC97 Audio Controller 0 30 3 0x8086 0x266D AC97 Modem Controller 0 31 0 0x8086 0x2640 LPC Bridge 0 EN 1 0x8086 0x266F IDE Controller 0 31 2 0x8086 0x2651 SATA Controller 0 EN 3 0x8086 0x266A SMB Controller 3 0 0 0x8086 0x108B Ethernet Controller NC1 0x109A SR 0 0 0x8086 0x108B Ethernet Controller NC2 0x109A 1 This bus number can vary depending
40. nel Elements EKF Ethernet G ETH Graphics DVI I USB1 2 GP HD PG Dual 1000Base TX 100Base TX 10Base T RJ 45 Receptacles with integrated indicator LEDs DVI I Integrated digital amp analog Receptacle suitable for DVI digital flat panel displays and or analog monitors Universal Serial Bus 2 0 self powered root hub type A receptacle General Purpose LED LED indicating any activity on IDE or SATA ports LED indicating Power Good Board Healthy 19 ekf com User Guide CCD CALYPSO Advanced CompactPCI 3U Pentium M CPU Board Microprocessor The CCD CALYPSO is designed for use with Pentium M and Celeron M processors manufactured in 0 09 technology Dothan These includes also the Ultra Low Voltage ULV Celeron M and the Low Voltage LV Pentium M processors as listed below The processors are housed in a Micro FC BGA package for direct soldering to the PCB e the CPU chip cannot be removed or changed by the user The processors supported by the CCD CALYPSO are running at FSB clock speeds of 400MHz and 533MHz The internal Pentium M processor speed is achieved by multiplying the host bus frequency by a variable value The multiplier is chosen by currently required performance and the actual core temperature This technology is called Enhanced Intel SpeedStep Power is applied across the CompactPCI connectors J1 3 3V 5V The processor core voltage is generated by a switched voltage regulator sour
41. ny systems solutions EKF Elektronik GmbH em Phone 49 0 2381 6890 0 Philipp Reis Str 4 gn Fax 49 0 2381 6890 90 59065 Hamm E ST O Internet www ekf com Germany ae aq E Mail sales ekf com
42. ocessor and peripheral devices like hard disks ATA CompactFlash cards and CD ROM drives The interface supports Up to two ATA devices PIO Mode 3 4 Ultra ATA 33 Ultra ATA 66 Ultra ATA 100 The IDE interface is routed to the on board connectors PIDET and PIDEB T top side B bottom side of the board PIDE is used to interface to the CompactFlash Card adapter C10 CFA or to the expansion board CCA LAMBADA Use the C10 CFA adapter to attach a CompactFlash ATA style silicon disk whenever a hard disk is not suitable for your system or as an additional mass storage device The CCA LAMBADA expansion board is capable to carry an on board 1 8 or 2 5 hard disk drive When using the 1 8 option the concurrent operation of a CompactFlash device is possible A LED named HD located in the front panel signals disk activity status of the IDE and SATA devices The IDE controller is integrated into the ICH6 Ultra ATA IDE drivers can be downloaded from the Intel web site Graphics Subsystem The graphics subsystem is part of the Intel 91 5GM Graphics Memory Controller Hub GMCH The CCD CALYPSO is provided with a DVI I graphics connector This is both a digital and analog interface Recent digital input flat panel displays are widely available with this connector style For classic monitors adapters or adapter cables can be used for converting from DVI I to the 15 pin HD D SUB connector A special display transmitter chip is used to convert Intel
43. of temperatures and voltages the LM87 may compare these values against programmable upper and lower boundaries As soon as a measurement violates the allowed value the LM87 may request an interrupt via the GPI 11 of the ICH6 EKF 35 ekf com User Guide CCD CALYPSO Advanced CompactPCI 3U Pentium M CPU Board GPIO Usage GPIO Usage ICH6 GPI O GPI 1 GPI 2 GPI 3 GPI 4 GPI 5 GPI 6 GPI GPI 8 GPI 9 GPI 10 GPI 11 GPI 12 GPI 13 GPI 14 GPI 15 GPO 16 GPO 17 GPO 18 GPO 19 GPO 20 GPO 21 GPO 23 GPIO 24 GPIO 25 EKF 5V 5V 5V 5V 5V 5V 3 3V 3 3V 3 3V DOM 3 3V 3 3V 3 3V 1 3 3V 3 3V 3 3V 3 3V DOM 3 3V 59 1 3 3V 3 3V CPCI_REQ6 CPCI_REQ5 CPCI_INTP CPCI_ENUM CPCI_FAL CPCI_DEG GP_JUMP CPCI_SYSEN N A USB_OC4 USB_OC5 HM_INT EXP_PME EXP SMI N A N A CPCI GNT6 GNT54 GP LED N A PLD SCL PLD SDA INTS EN CPCI SMB EN CPCI CLK EN CompactPCI Bus Request Line 6 CompactPCl Bus Request Line 5 CompactPCl Interrupt Request Line INTP CompactPCl System Enumeration Line ENUM CompactPCI Power Failure Line FAL CompactPCl Power Degeneration Line DEG BIOS CMOS Values Reset Jumper JGP CompactPCI System Slot Enable Line SYSEN Not used on CCD fixed to GND USB Port 4 Overcurrent Detect Line USB Port 5 Overcurrent Detect Line Hardware Monitor LM87 Interrupt Line Expansion Interface PME Line Expansion Interface SMI
44. ot possible to enter the setup of the BIOS To reset the CMOS RAM mount a jumper on JGP and perform a system reset As long as the jumper is stuffed the BIOS will use the default CMOS values after any system reset To get normal operation again the jumper has to be removed JGP RI X 1 GPI6 2 GND O EKF 240 1 02 ekf com Jumper OFF No CMOS reset performed Jumper ON CMOS reset performed This setting is the factory default Reset Jumper ICH6 RTC Core JRTC The jumper JRTC is used to reset the battery backed core of the ICH6 This effects some registers within the ICH6 RTC core that are important before the CPU starts its work after a system reset Note that JRTC will neither perform the clearing of the CMOS RAM values nor resets the real time clock To reset the RTC core the board must be removed from the system rack Short circuit the pins of JRTC for about 1 sec After that reinstall the board to the system and switch on the power It is important to accomplish the RTC reset while the board has no power JRTC K lt 1 RTCRST 2 GND O EKF 240 1 02 ekf com Jumper OFF No RTC reset performed Jumper ON RTC reset performed This setting is the factory default EKF 39 ekf com User Guide CCD CALYPSO Advanced CompactPCI 3U Pentium M CPU Board Connectors Caution Some of the internal connectors provide operating voltage 3 3V and 5V to devices inside the system chassis such as internal peripherals Not a
45. packaging do not touch any components hold the board at the front panel only Warning EN Do not expose the card to fire Battery cells and other components could explode A and cause personal injury EKF 31 ekf com User Guide CCD CALYPSO Advanced CompactPCI 3U Pentium M CPU Board EMC Recommendations CE In order to comply with the CE regulations for EMC it is mandatory to observe the following rules The chassis or rack including other boards in use must comply entirely with CE Close all board slots not in use with a blind front panel Front panels must be fastened by built in screws Cover any unused front panel mounted connector with a shielding cap External communications cable assemblies must be shielded shield connected only at one end of the cable Use ferrite beads for cabling wherever appropriate Some connectors may reguire additional isolating parts Reccomended Accessories Blind CPCI Front EKF Elektronik Widths currently available Panels 1HP 5 08mm with handle 4HP 8HP without handle 2HP 4HP 8HP 10HP 12HP Ferrit Bead Filters ARP Datacom Ordering No 63115 Dietzenbach 102 820 cable diameter 6 5mm 102 821 cable diameter 10 0mm 102 822 cable diameter 13 0mm Metal Shielding Conec Polytronic Ordering No Caps 59557 Lippstadt CDFA 09 165 X 13129 X DB9 CDSFA 15 165 X 12979 X DB15 CDSFA 25 165 X 12989 X DB25 EKF 32 ekf com User Guide CCD CALYPSO Advanced Compact
46. ratures as well as the supply voltages is MBM Motherboard Monitor which can be downloaded from the web After installation both temperatures and voltages can be observed permanently from the Windows taskbar The CCD CALYPSO is equipped with a passive heatsink lts height takes into account the 4HP limitation in mounting space of a CPCI board In addition a forced vertical airflow through the system enclosure e g bottom mount fan unit is strongly recommended gt 15m h or 200LFM around the CPU slot As an exception the CCD 2 CALYPSO ULV Celeron M 1GHz can be operated with natural convection only Be sure to thoroughly discuss your actual cooling needs with EKF Generally the faster the CPU speed the higher its power consumption For higher ambient temperatures consider increasing the forced airflow to 400 or 600LFM The table showing the supported processors above give also the maximum power consumption TDP Thermal Design Power of a particular processor Fortunately the power consumption is by far lower when executing typical Windows or Linux tasks The heat dissipation increases when e g rendering software like the Acrobat Distiller is executed The Pentium M processors support Intel s Enhanced SpeedStep technology This enables dynamic switching between multiple core voltages and freguencies depending on core temperature and currently reguired performance The processors are able to reduce their core speed and core voltage in
47. s delivered to either connector A resettable fuse is stuffed to protect the board from an external short circuit condition 0 75A Graphics drivers for the i915GM can be downloaded from the Intel web site Real Time Clock The CCD CALYPSO has a time of day clock and 100 year calendar integrated into the ICH6 A battery on the board keeps the clock current when the computer is turned off The CCD uses a BR2032 lithium battery soldered in the board giving an autonomy of more than 3 years Under normal conditions replacement should be superfluous during lifetime of the board Universal Serial Bus USB The CCD CALYPSO is provided with seven USB ports all of them are USB 2 0 capable Two USB interfaces are routed to front panel connectors two ports are feed to the expansion board interface connectors PEXP and three ports are optionally available for rear I O across the J2 P2 CompactPCI connector The front panel USB connectors can source up to 0 5A 5V each over current protected by two electronic switches Protection for the USB ports on the expansion interface and on the rear VO connector is located on the CCA LAMBADA and the CCT RIO respective The USB controllers are integrated into the ICH6 LPC Super l O Interface In a modern system legacy ports as PS 2 keyboard mouse COM1 2 and LPT have been replaced by USB and Ethernet connectivity The 1 4MB floppy disk drive has been swapped against LS 120 or CD RW drives attached to a SATA
48. sible failure On the CCD CALYPSO the signal FAL is routed to the GPI4 and DEG to the GPI5 of the ICHO PXI Trigger Signals As an option the CCD CALYPSO supports four of the eight trigger signals of the PXI standard as defined by National Instruments The trigger signals are provided by the local SIO Super l 0 chip IT8761E GPIO20 21 are routed to TRIGO 1 and GPIO26 27 are used to control TRIG6 7 These signals can also be used as GPIO lines in a non PXI environment Local GPIO Option In addition to the GPIO PXI Trigger lines optionally available on J2 the expansion connector PEXP provides another two GPIO lines available for user specific application The 5V TTL signals sio gpio16 17 are controlled by the on board SIO IT8761E with an internal 50kO PU resistor and capable of sinking 24mA each O EKF 27 ekf com User Guide CCD CALYPSO Advanced CompactPCI 3U Pentium M CPU Board Rear I O Options Optionally the CCD CALYPSO can be used for rear I O with respect to the following functions Analog Graphics 1 Gigabit Ethernet Port e 3 SATA Ports 3 USB Ports Keyboard Mouse COM1 TTL Level The analog graphics and the gigabit ethernet port 1 signals are routed to multiplexers on the CCD CALYPSO These switches controlled by BIOS select either the front panel or the rear I O connection The COM1 port does not include the physical transceiver TTL level only This transceiver is located on the rear I O
49. tPCI 3U Pentium M CPU Board PIENSOS AENA ERASE 37 GPIO Usage e kk a eta KK KK KK KK KK RI KIR KIR KI KK KIR KIR YU 37 GPIO Usage FWH odon dean did doe doe dado dla dew RE ols de ots 39 GPIO Usage papi ea Pee Pere Dene Pee ewe Pree DOD DU OL 39 Configuration Jumper ss xa aeu baii td ei dee KK KK KK KK Pines ee dee Hien Ae 40 Reset Jumper BIOS CMOS RAM Values JGP 40 Reset Jumper ICH6 RIC Core JRTO ain cee 9 TR eked AO CONNECTORS sais Sig ces EE 41 et Eo yy ae FT e YP 1 41 Video Monitor Connector DVI L cu on ox E WW Y YR Y WW WWW Y WU WR 43 Video Monitor Connector VGA kk kk a RAW nda da gas ata 44 USB COMMGEIONS ix retas dra eg ee rn a daa 44 Ethernet Connectors aba kk did a aid ant 45 Internal e eet Le i ses oy dad i O RF TR FRY AAA AA ADA 46 Expansion Interface Header PEXP A7 ATA IDE Header PIDE a que pia a K KI KK KIR KIRI RIK R KIR RS 48 PCI Express Expansion Header PPCIE 50 Speaker Header JSPK vk a kk kk kK KK KK FF eee 52 System Reset Header JRST LAV kk kk kk kK KK ooo 52 PLD Programming Header ISPCON 52 Processor Debug Header PITP V FFF Y ug 53 CompactPCl A SN ANY EF AN ee eege 54 o ag PAPO ge Paa A ire ava a Paes oa HF TF YH HE DE IT 55 ER RT orbe o aa ee ee ee ee ee 28755 57 APPENAIX EE 58 Mechanica
50. to 2A per power rail High Speed Expansion Connector EKF 50 ekf com User Guide CCD CALYPSO Advanced CompactPCI 3U Pentium M CPU Board Ta Ani E am y CCD CALYPSO w C23 SATA Side Boar C23 SATA Side Board PCle Based EKF 51 ekf com User Guide CCD CALYPSO e Advanced CompactPCI 3U Pentium M CPU Board Speaker Header JSPK JSPK X X 1 5V 2 Speaker O EKF 240 1 02 ekf com WARNING The 5V pin is protected against a short circuit situation by a 0 1A PolySwitch The JSPK connector should be used exclusively for direct attachment of a dynamic speaker device When connecting to the input of a sound card most likely a short circuit situation will occur between the 5V pin of the JSPK connector and the GND pin of the audio card input which could cause permanent damage to the CCD CALYPSO and the audio board despite the PolySwitch resettable fuse A workaround to this would be to place a 1k resistor across pin 1 and pin 2 of the JSPK connector and strapping a single wire cable from JSPK pin 2 to the audio input System Reset Header JRST The jumper JRST is used to perform a manually system reset By default JRST is connected with a short cable to a micro switch located within the front panel handle The switch performs a system reset by short circuiting the pins 1 and 3 of JRST JRST 1 5 2 NC 3 GND PLD Programming Header ISPCON ISPCON Xx es X X ek
51. up to 8 steps down to 600MHz This leads to an obvious reduction of power consumption max 7 5W 600MHz resulting in less heating This mode of lowering the processor core temperature is called TM2 TM Thermal Monitor Note that TM2 is not supported by Celeron M processors Another way to reduce power consumption is to modulate the processor clock This mode TM1 is supported also by the Celeron M processors and is achieved by actuating the Stop Clock input of the CPU A throttling of 50 e g means a duty cycle of 50 on the stop clock input However while saving considerable power consumption the data throughput of the processor is also reduced The processor works at full speed until the core temperature reaches a critical value Then the processor is throttled by 50 As soon as the high temperature situation disappears the throttling will be disabled and the processors runs at full speed again A similar feature is embedded within the Graphics and Memory Controller GMCH i915GM An on die temperature sensor is used to protect the GMCH from exceeding its maximum junction temperature T max 105 C by reducing the memory bandwidth J max These features are controllable by BIOS menu entries By default the BIOS of the CCD CALYPSO enables mode TM2 which is the most efficient EKF 21 ekf com User Guide CCD CALYPSO Advanced CompactPCI 3U Pentium M CPU Board Main Memory The CCD CALYPSO is equipped with two sockets for

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