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        Philips LPC2138 User's Manual
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1.  connects GPIO P0 21 to the LCD enable pin    J18  LCD R W Signal  connects GPIO P0 22 to the LCD R W pin     J19  Analog Output Enable  connects DA converter output  GPIO P0 25  to the OP amplifier     J20  Analog Input Enable  connects the TRIM potentiometer to the analog input ADO 0  GPIO  P0 27      P21  16 Pin LCD Connector  see connectors   J22  LCD LED Backlight Enable  J22 is set to turn on LCD backlight    J25  bottom side   Startup mode  populated on the bottom side of the target board   J25 connects  either a pull up  USER mode  or a pull down  BOOT loader mode  to P0 14  Default set in position    USER  User mode   J16 must be removed when setting J25 in position BOOT  otherwise J25 setting is  not effective      Jumper pin 1 is marked with a white square on the ITLPC2138 PCB  If pin 1 cannot be located directly from  the ITLPC2138  please use Figure 2 for assistance     Note  Don t change jumper settings while the target board is supplied with power        iSYSTEM  March 2007 6 13    Connectors    DB9 male connector UART1  P35        The serial port is configured as a standard RS232 interface with RTS CTS control  Cross female to female cable  is needed for connection with PC computer COM port     16 pin LCD connector  P21     14 12 19 15    0000000000000000    15 11 987654321 16    Top View    Pin Assignment for Crystal Clear technology CMC216x04 or EDT EW162B0GLY LCD      vaa       Supply Terminal    vo      Power Supply for LOD Driver_    RS       Register Sel
2.  since it   s powered from the  PC USB port     An external ARM7TDMI S debugger  including e g  ETM support  can be used for debugging as an alternative  to the on board integrated debugger     Description    View of the ITLPC2138    o  o  3  2  4  o       mum Ji ii  mum J2    J22  a   M um LCD   CMC216X04    al  al  OU wl dd          Figure 2  Top View of the ITLPC2138    O   SYSTEM  March 2007 3 13    Block Diagram            BATT  RTC power supply        5V from USB    USB       Figure 3  ITLPC2138 Block diagram  Notes    1  The board provides 16 pin connector for the optional LCD display  type CMC216x04 or  EW162BOGLY  checkout backlight LED polarity   which is not included in the package          SYSTEM  March 2007 4 13    Components List     Name   Description        Pa  P5  P11 RTC power supply input  3 3V    P12  P13  P21  P31  P32  P33    P34 USB connector  integrated debugger   P35 DB9 connector  serial port  UART1     J1  J2  J7    J10  J15   J20    Jumpers  J22 J25  LDO     LD3 User LEDs  LD11 Power LED 5V    LD12 Power LED 3 3V  TO   T3 Push buttons    Reset  T4  Reset button  TR2 Trimmer potentiometer  R25  R26 Resistors for adjusting LCD contrast         See schematic for details     Power Supply  The target board is powered from the PC USB port  through which winIDEA  IDE  running on a PC  connects to    the on board integrated debugger  Connection is made using a standard USB cable  Battery power supply for  RTC can be optionally connected to P11  see P11 des
3. 1 1 22  0 5 0 13 0 21 0 30 1 21  0 4 0 12 0 20 0 29 1 20  0 3 0 11 0 19 0 28 1 19  0 2 0 10 0 18 0 27 1 18 GND  0 1 0 9 0 17 0 26 1 17 1 25  0 0 08 916 025 1 16 1 24  VCC vcc VCC vcc vcc vcc  28 as ao    Figure 4  Expansion connectors    All CPU signals are available on the expansion connectors  which are standard connectors with a 2 54 mm raster        iSYSTEM  March 2007 9 13    Schematic    Note  On board integrated debugger is not part of the schematic                 2 m  E E E 3  ES CH je ib le  Pe  Poes Pe 16 P0 25 n  Pee  Pees Pe 17 PQ 26 N  Pe 02 Pe 18 Pe 18 P0 27 E  Ep P812 Er P029  Peas m PAIS 2  pe2 p 30  Pe 86 i P8 14     Pe22 PQ 31  0 27  S Pets g Pen  2  lt   a  J8 10k 1 PC2138  P1 26     gt  P1 16 AP 1 16 TRACEPKTO PO 0 TxDO PWM1 Poego  R36 21 17     2 AP1 17 1RACEPKT   P  1 R lt DO PWMS EINT   Pat  P1 18       3   P 1 1 8 TRACEPKT2 P   2 SCLO CAPC C  Pa 02  47 10k P1 19       2  P   S TRACEPKT3   PO 3 SDAB MATO B EINI 22        P6 03  p120     69 P1 20    24  P  20 TRACESYNC     PO 4 SCKQ CAPQ  1  AD0  2  Pas  A P1 21 IP1 21 PIPESTATO  P8 5 MISOQ  MATO  1  ADI 52 Pees  R37 P1 22    3 2  P  22 PIPESTAT      P  6 NOSI8 CAPO 2 AD 2 P0 06  P1  23      5  pi 23 PIPESTAT2     PO 7 SSELO PWM2 ENT  Pa07  P1 24 IP 1 24 TRACECLK P8 B TxD1 PWMA AD1  1 55 Pe es8  P1 25   3  5  P1 25  xniNo P8 9 RxD1 PWM6 EINT3  F829  P126  P1 26 RTCK PQ 18 RTS   CAP1 0 AD  P0 18  CPU  TDO a 1P1 27 100 P9 11 CTS11 CAP1 1 S  P  11  CPU TO  P 1 28 TO  P  12 0SR11 MATI O A  Pa 12  CPU  TCK  
4. IP1 29 TCK P0  13 DTRTT MAT  1  A  P  13  CPUT TMS P1 30 TMS 8 14 DCD11 EINT1 SO  P2 14  10k CPU  TRST  IP1 31 TRST PQ 15 RI1 1 EINT2 AD1 P 15                             6  re TS PO 16 EINTO MATO 2 C P8 16  R46 ae vss F0  17 CAP1 2 SCK1 MA  P2 17  R47 5 vss P  18 CAP 1  5 MISO   ME2 P8 18  TRACECLK            L      3           P1 24 i vss PB 19 MAT1 2 MOSI1 CH2S Pa 19  47E a vss PO 20 MAT1 3 SSEL1 E E  20  vss P9 21 PWMS AD1  5 CAP  P221  P0 22 AD1 7 CAPO 0 M    2 P222  mejo paz Pa23  2 1av3 421400 PQ 25 00 4 Acut 9 Pa25  e E P0 25 100 5  9     P0 26    Vret P2 27 AD2 O CAPS  1  M I F227   a al P0 28 AD0 1 CAPO 2 413      pQ 28  lol vom P0 29 4D0 2 CAPQ S M P029  RIC BAIT Jie VSSA PO 38 AD  3 EINTS CA  12       P 8 38  1  TM Pas  PAJ  E A    9n es reset  22  d OR   42 ect Xr i     O  i e  5 IRTXC2 Xr 2   8  wo  ON a xt           P1 12MHz  36 Sr  ca c   GND   gal lw  E                                  10 13       iSYSTEM  March 2007    Use of the on board integrated debugger    Follow below instructions  in order to get a sample application running with    out of the box    experience  All  jumpers are set in the default position during the final tests in the manufacturing     If winIDEA 2006 CD is not part of the package  please obtain winIDEA 2006 setup from your local iSYSTEM  office or from www isystem com        e Install winIDEA 2006  IDE  full setup on a PC   e Verify jumpers J15 J20  see Jumpers description for their default position    e   Verify that jumper J8 is s
5. X     1 SY M T E M Solutions for Embedded Systems Development V1 7    User   s Guide       Philips NXP LPC2138 Target Board    Ordering code ITLPC2138   Dimensions    100x96mm       Figure 1  ITLPC2138FE Target Board       iSYSTEM  March 2007 1 13    Contents    COMES rodada dien Unde Rodeo eb dude VA ER 2  INT OCUCTION une ee 3  Descriptio sas sss T  see 3  View  Of the TEEPC2136    iio a o P rt Ree T REI ORDRE Re ERREUR 3  Block DIGS TOI mE 4  Components List    aia ico M eaa thugs sakes chou REED AM GR DR E eb ER RR 5  Power Supply  i e Mee seach e epe e Er e e a Re e NE E RES 5  Jumper  amp  Connector Descriptions    det arret HERE Ro e Io eg repe de eee aae 6   Guam    E                   eee Toco 7  SOM ia a 10  Use of the on board integrated debugger                  eecccceeeeeeeeeeeeeeeeeeeeeeeeeneeneneaeeeeeneenneneeees 11  Use of an external debugger                een enn enint dana n Eie emen 12  A A 13    O   SYSTEM  March 2007 2 13    Introduction    NXP LPC2138 Target Board is an evaluation and a development system for NXP ARM7TDMI S based  LPC2138 microcontroller  The ITLPC2138 package consists of a USB cable and a target board populated with  NXP LPC2138 CPU  minimum peripherals  JTAG debug connector  ETM trace connector and an on board  integrated iSYSTEM debugger     The user can write and debug the application using the on board integrated iSYSTEM debugger  which connects    to the PC through the USB connection  The board requires no external power supply
6. cription for more details         iSYSTEM  March 2007 5 13    Jumper  amp  Connector Descriptions    J1  J2  LCD LED Backlight Polarity  If J1 and J2 is set in position 1 2  then LCD pin15 is connected  to  5V and pinl6 is connected to GND  If J1 and J2 is set in position 2 3 then pin15 is connected to  GND and pin16 is connected to  5V  Default set in position 1 2     J7  Trace Port Enable  J7 is set to enable pins P1 25 16 to operate as ETM Trace port after reset   Default not set     J8  Debug Port Enable  J8 is set to enable pins P1 31 26 to operate as a JTAG Debug port after reset   Default is set     J9  Debug Mode  J9 selects whether iSYSTEM on board integrated USB JTAG debugger is used or an  external debug tool  Default set in position 1 2      J10  RTC Power Supply Selector  J10 connects Vbat pin of LPC2138 to the main 3 3V     P11  RTC Power supply  PCB terminal providing connection for battery  When battery power supply  applied to P11 is used  J10 must be open     P12  Manufacturing purpose connections    P13  Analog Output  P13 is analog output from OP amplifier  which connects to output of the DA  converter     J15  User LEDs Enable  enables the LED driver connecting the on board LEDs to GPIO P0 4     PO 7   J16  User Buttons Enable  enables buttons driver connecting the on board buttons to GPIO P0 12      P0 15  Pushing the button generates a low signal  If J16 is set  the CPU will not start in Boot loader  mode  see J25 description     J17  LCD Enable Signal 
7. e RST  CPU reset  pin  If a  low level is detected  ISP command handler starts and takes over control of the CPU after reset  If there is no  request for the ISP command handler execution  a high level detected   a search is made for a valid user  program  If a valid user program is found then the execution control is transferred to it  Refer to CPU User  Manual for more details on CPU startup mode     Normally  jumper J25 is set for    User mode    by default  Boot loader mode should be normally selected only for  troubleshooting or when the user explicitly wants to use Boot loader mode  J16 must be removed when Boot   loader mode is selected  see J16 description for more details      There was a case  where the code was programmed in the flash  which disabled the JTAG debug port shortly  after reset  Due to the NXP implementation  the debugger cannot take over control over the CPU immediately  after reset  but a part of code is executed before the CPU can be stopped by the debugger  In this particular case   the application disabled JTAG port before the debugger took control over the CPU and the debugger could not  connect to the CPU at all  Thereby  note that if the debugger cannot connect to the CPU  winIDEA reports     Cannot stop CPU      it may be due to bad program in the flash  In this case  Boot loader mode has to be selected   in order for the CPU to start executing ISP command handler   in which the debugger can always stop the  program and take over control over 
8. ect Signal      E      Enable Signal  7   DB0   Data Bus Line  Notused       OBI   Data Bus Line  Notused       DB2   Data Bus Line  Not used   10      DB3   Data Bus Line  Not used         11   DB4  DaaBuslie    12   DBS   DataBusline    13   DB6  Data BusLine    14   DB7  DaaBuslme    I    BL    LED Backlight Power Supply    16   BL   LEDBackightGrund      Verify polarity of LED backlight on your LCD display     ND  dd  O  S   E   BO  B1  B2  B3  B4  B5  B6  B7  L   T    V  V  R   R    D   D   D   D   D   D   D   D   B  B          iSYSTEM  March 2007 7 3    20 pin JTAG Debug Connector  P33   Not used  CPU_TRST  CPU_TDI  CPU_TMS  CTCK  Not used  CPU_TDO    Not used  Not used       An external JTAG debug tool can be connected to a 20 pin P33 debug connector  Jumper J9 must be set to 2 3  position when using an external debugger     38 pin Mictor JTAG Debug  amp  ETM Trace Connector  P32         D   5   6   TRACECLK      Notused   7   8   Notused      CPU RESET   9   10    Notused    GND 13 14 Not used       b   25   26    Pii8      eo   27   28    Pii7          D     Pie     33   35   7         mao      ND   33   34   Pres    as   36       and  y    ma    An external JTAG  amp  ETM debug tool can be connected to a 38 pin Mictor P32 debug connector  Jumper J9  must be set to 2 3 position when using an external debugger     26    28  30   P1 20  34  36  38          iSYSTEM  March 2007 8 13    CPU expansion connectors    GND GND GND GND GND  9 7 0 15 0 23 1 23  0 6 0 14 0 22 0 3
9. et   e   Verify that jumper J7 is not set    e Verify that jumper J9 is set in position 1 2  on board integrated debugger enabled      e Open winIDEA 2006 application and open a sample workspace for the ITLPC2138 running from the  internal flash     e Connect the USB cable to the PC and to the ITLPC2138     e Windows should auto detect a new USB device and install belonging USB driver  In case of any  problems  the driver is located under winIDEA install directory  e g  c  winIDEA 2006 USBDrv      e Disconnect the USB cable from the ITLPC2138 and then connect it again  The two power LEDs  should turn on  The target board is not powered if the LEDs don t lit and the problem needs to be    resolved before proceeding to the next step     e Finally  execute Debug Debug Reset  This should initialize the development system and the user  should be able to write to the internal CPU RAM through the memory window     e Next  execute Debug Download  This should program and run the application until main function  The  development system is now ready for the debugging        iSYSTEM  March 2007 11 13    Use of an external debugger    An external debugger can be     a JTAG debugger  which connects to a 20 pin P33 connector    a development tool supporting JTAG debugging and ETM  on chip trace   which connects to a 38 pin  Mictor P32 connector    Setting up a debug environment for the first time    Verify jumpers J15 J20  see Jumpers description for their default position    Verify that ju
10. mper J8 is set   Verify that jumper J7 is set if your development tool connects to P32   Verify that jumper J9 is set in position 2 3  on board integrated debugger disabled     winIDEA 2006 application must to be installed and run once in order to power the ITLPC2138 board  through the USB connection     Connect the USB cable to the PC and to the ITLPC2138     Windows should auto detect a new USB device and install belonging USB driver  In case of any  problems  the driver is located under winIDEA install directory  e g  c  winIDEA 2006 USBDrv      Disconnect the USB cable from the ITLPC2138 and then connect it again  The two power LEDs  should turn on  The target board is not powered if the LEDs don   t lit and the problem needs to be  resolved before proceeding to the next step     Disconnect the USB cable from the ITLPC2138 once again  connect the external development system  to P32 or P33  depending on the development system   turn it on and then connect back the USB cable     Execute a debug command equivalent to the CPU reset debug command  This should initialize the  development system and the user should be able to write to the internal CPU RAM through the  memory window  The development system should be now ready for use        iSYSTEM  March 2007 12 13    Troubleshooting    The flash boot loader code is executed every time the CPU is powered or reset  The loader can execute the ISP  command handler or the user application code  P0 14 is sensed on a rising edge on th
11. the CPU  Then a new valid program can be programmed in the flash or flash  erased  Then the User mode can be used again     Disclaimer  iSYSTEM assumes no responsibility for any errors which may appear in this document  reserves the  right to change devices or specifications detailed herein at any time without notice  and does not make any  commitment to update the information herein     O   SYSTEM  All rights reserved        iSYSTEM  March 2007 13 13    
    
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