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Philips ISYSTEM LPC2138 User's Manual

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Contents

1. 0 26 1 17 1 25 0 0 0 8 0 16 025 1 16 1 24 3v3 3V3 3v3 3v3 5V3 5V3 5 G t 5 Figure 4 Expansion connectors All CPU signals are available on the expansion connectors which are standard connectors with a 2 54 mm raster iSYSTEM December 2005 9 16 Schematic Note On board integrated debugger is not part of the schematic m La n m a ko Toa Eee Pe P8 16 Pa2 n HBF 2 17 4 P0 26 8 P9 02 19 27 S BE P811 P8 19 P0 28 04 P8 12 in P8 20 ln 29 Brae Pees Pas 2 R ME POOG 1 P8 14 P8 22 4 P3 P13 PA 87 I Pais 8 2 2 3 PC2138 P1 16 12 P1 16 TRACEPKTO P8 G TxOQ P WMT 117 21 1 17 1 PO 1 R108 PNUS EINTO 1 1 18 1 1 2 PQ 2 SCLO CAPO 0 2 0 02 P1 19 PILAG TRACEPKTS PO S SDAQ WATO Q EN 29 P0 03 P1 20 P1 2 TRACESYNC 0 4 5 00 227 0 04 1 21 1 21 5 _P8 5 MiSO MATE 1 AD 42 P2 05 P122 PI22 PIPESTAT PO 6 UOSIB CAPQ 2 AD 3 PQ 06 1 23 2 1 1 23 5 2 PO 7 SSELO PWU2 ENT P007 P1 2 amp 2 Pi 2A TRACECLK PR B T4D1 PWMA AD1 13 P0 08 P125 1 25 EXTING P S RxD1 PRME EINT3 34 P0 09 P1 26 1 26 P 10 RTS1 CAP1 AD S P0 10 CPU 00 6 1 22 09 P 11 CTS1 1 1 1 5 Pa 11 CPU TD Se 1 28 T01 P9 12 0SR
2. CMC216x04 LCD Sri Ground Terminal Supply Terminal RS Register Select Signa E EnaleSgna DBO Data Bus Line Not used DBI Data Bus Line Not used DB2 _ Data Bus Line Notused Data Bus Line Not used DB4 DaaBulme DB5 DB6 DB7 Bt BL Power Supply for LCD Driver ND Vdd Vo RS R E DBO DB1 DB2 DB3 DB4 DB5 DB6 DB7 BL BL 20 pin JTAG Debug Connector P3 Notused 1 2 CPU_TRST 3 4 GND CPU TDI 5 6 GND CPU TMS 7 8 GND CTCK 9 10 GND Not used 11 12 GND CPU_TDO 13 14 GND CPU_RESET 15 16 GND Not used 117 18 GND Not used 19 20 GND An external JTAG debug tool can be connected to a 20 pin P3 debug connector Jumper J9 must be set to 2 3 position when using an external debugger iSYSTEM December 2005 8 16 38 pin Mictor JTAG Debug amp ETM Trace Connector P2 Pin Not used 1 2 Not used GND 5 6 TRACECK CPU RESET 9 10 EN gt a EN 3i EN amp An external JTAG amp ETM debug tool can be connected to a 38 pin Mictor P2 debug connector Jumper J9 must be set to 2 3 position when using an external debugger CPU expansion connectors GND GND GND GND GND 0 7 0 15 9 23 1 23 2 6 0 14 9 22 0 51 1 22 0 5 0 13 921 9 59 1 21 0 4 0 12 0 20 0 29 1 20 0 3 0 11 9 19 9 28 1 19 0 2 0 18 9 18 0 27 1 18 GND 2 1 9 9 0 17
3. T1 MAT P912 CPU 1 29 5 11 1 15 CPU TMS 1 52 7 5 P 14 DCO11 EINT SO 214 CPU_TRST 28 TRST P 15 RI 1 ONT2 AD1 P9 15 P0 16 ENT amp WATO 2 C P9 16 s P0 17 CAP1 2 SCK1 MA p9 17 LS P 18 CAP1 3 MS01 M 2 P2 18 TRACECLK P24 221 55 9 1 2 051 19 I A ss 20 MATI 3 SSEL 1 E P0 20 0 55 21 1 21 227 01 77 SE 22 Pe 23 58 p23 R P0 25 A0 4 Acut H 9 25 pa P0 26 AD8 5 3 P0 26 vrot P 277AD0 CAP9 I M 0 27 PO 2 0 1 2 12 2 Hvo P0 29 A00 2 20 59 Pa 30 406 ENTS CA PO 38 A POJI 31 reset 2 RIXC1 xui S5 RTXC2 XTAL2 1 12MHz ca c7 27 20 220E R23 10 16 iSYSTEM December 2005 Licensing the on board integrated debugger A 30 days evaluation period starts after the debugger winIDEA connects to the ITLPC2138 for the first time Within the evaluation period the user should request a regular license from 15 5 Run the request wizard to obtain the license INIT string by pressing the Request INIT button in the Hardware Hardware License tab Hardware Configuration a iSYSTEM December 2005 11 16 Use of the on board integrated debugger Follow below instructions in or
4. X 1 SY 5 T E M Solutions for Embedded Systems Development V1 4 User s Guide Philips LPC2138 Target Board Ordering code ITLPC2138 Dimensions 100x96mm Figure 1 ITLPC2138 Target Board iSYSTEM December 2005 1 16 Contents cde Rode VA ER 2 Introduction 3 Descriptio sss T see 3 View Of the TEL 3 Block tie 4 Components Lists a ico o eaa Pea e de a er nt AM en 5 Power Supply ev e Re e RAPERE 6 Jumper amp Connector dee arret HR ERE Ro S o Reg re pe de eee Rt dae 6 CONNECIOFS serres 7 eiie I 9 H 10 Licensing the on board integrated debugger 2 11 Use of the on board integrated debugger 12 Use of an external deb gger ret poe opt eet osa e eer 13 14 iSYSTEM December 2005 2 16 Introduction Philips LPC2138 Target Board is an evaluation and a development system for Philips ARM7TDMI S based LPC2138 microcontroller The ITLPC2138 package consists of a USB cable and a target board populated with Philips LPC2138 CPU minimum peripherals JTAG debug connector ETM trace conn
5. able Signal connects GPIO 0 21 to the LCD enable pin J18 LCD R W Signal connects GPIO P0 22 to the LCD R W pin J19 Analog Output Enable connects DA converter output GPIO P0 25 to the OP amplifier J20 Analog Input Enable connects the TRIM potentiometer to the analog input ADO 0 GPIO P0 27 J21 16 Pin LCD Connector see connectors J22 LCD LED Backlight Enable J22 is set to turn on LCD backlight J25 Startup mode populated on the bottom side of the target board J25 connects either a pull up USER mode or a pull down BOOT loader mode to 0 14 Default set in position USER User mode J16 must be removed when setting J25 in position BOOT otherwise J25 setting is not effective Jumper pin 1 is marked with a white square on the ITLPC2138 PCB If pin 1 cannot be located directly from the ITLPC2138 please use Figure 2 for assistance Note Don t change jumper settings while the target board is supplied with power iSYSTEM December 2005 6 16 Connectors DB9 male connector UART1 P5 The serial port is configured as a standard 3 wire interface Cross female to female cable is needed for connection with PC computer COM port 3 pin serial connector UARTO J14 J14 The serial port is configured as a standard 3 wire interface iSYSTEM December 2005 7 16 16 pin LCD connector J21 14 12 19 15 0000000000000000 15 11 987654321 16 Top View Pin Assignment for Crystal Clear technology
6. alent to the CPU reset debug command This should initialize the development system and the user should be able to write to the internal CPU RAM through the memory window The development system should be now ready for use iSYSTEM December 2005 13 16 Troubleshooting The flash boot loader code is executed every time the CPU is powered or reset The loader can execute the ISP command handler or the user application code 0 14 is sensed a rising edge on the RST CPU reset pin Ifa low level is detected ISP command handler starts and takes over control of the CPU after reset If there is no request for the ISP command handler execution a high level detected a search is made for a valid user program If a valid user program is found then the execution control is transferred to it Refer to CPU User Manual for more details on CPU startup mode Normally jumper J25 is set for User mode by default Boot loader mode should be normally selected only for troubleshooting or when the user explicitly wants to use Boot loader mode J16 must be removed when Boot loader mode is selected see J16 description for more details There was a case where the code was programmed in the flash which disabled the JTAG debug port shortly after reset Due to the Philips implementation the debugger cannot take over control over the CPU immediately after reset but a part of code is executed before the CPU can be stopped by the debugger In this particul
7. ar case the application disabled JTAG port before the debugger took control over the CPU and the debugger could not connect to the CPU at all Thereby note that if the debugger cannot connect to the CPU winIDEA reports Cannot stop CPU it may be due to bad program in the flash In this case Boot loader mode has to be selected in order for the CPU to start executing ISP command handler in which the debugger can always stop the program and take over control over the CPU Then a new valid program can be programmed in the flash or flash erased Then the User mode can be used again iSYSTEM December 2005 14 16 Notes iSYSTEM December 2005 15 16 Disclaimer iSYSTEM assumes no responsibility for any errors which may appear in this document reserves the right to change devices or specifications detailed herein at any time without notice and does not make any commitment to update the information herein iSYSTEM rights reserved iSYSTEM December 2005 16 16
8. der to get a sample application running with out of the box experience All jumpers are set in the default position during the final tests in the manufacturing If winIDEA 2006 CD is not part of the package please obtain winIDEA 2006 setup from your local iSYSTEM office or from www isystem com Install winIDEA 2006 IDE full setup on a PC e Verify jumpers J15 J20 see Jumpers description for their default position e Verify that jumper J8 is set Verify that jumper J7 is not set e Verify that jumper J9 is set in position 1 2 on board integrated debugger enabled e Open winIDEA 2006 application and open a sample workspace for the ITLPC2138 running from the internal flash e Connect the USB cable to the PC and to the ITLPC2138 e Windows should auto detect a new USB device and install belonging USB driver In case of any problems the driver is located under winIDEA install directory e g c winIDEA 2006 USBDrv e Disconnect the USB cable from the ITLPC2138 and then connect it again The two power LEDs should turn on The target board is not powered if the LEDs don t lit and the problem needs to be resolved before proceeding to the next step Finally execute Debug Debug Reset This should initialize the development system and the user should be able to write to the internal CPU RAM through the memory window e Next execute Debug Download This should program and run the application until main function The
9. development system is now ready for the debugging SYSTEM December 2005 12 16 Use of an external debugger An external debugger can be a JTAG debugger which connects to a 20 pin P3 connector a development tool supporting JTAG debugging and ETM on chip trace which connects to a 38 pin Mictor P2 connector Setting up a debug environment for the first time Verify jumpers J15 J20 see Jumpers description for their default position Verify that jumper J8 is set Verify that jumper J7 is set if your development tool connects to P2 Verify that jumper J9 is set in position 2 3 on board integrated debugger disabled winIDEA 2006 application must to be installed and run once in order to power the ITLPC2138 board through the USB connection Connect the USB cable to the PC and to the ITLPC2138 Windows should auto detect a new USB device and install belonging USB driver In case of any problems the driver is located under winIDEA install directory e g c winIDEA 2006 USBDrv Disconnect the USB cable from the ITLPC2138 and then connect it again The two power LEDs should turn on The target board is not powered if the LEDs don t lit and the problem needs to be resolved before proceeding to the next step Disconnect the USB cable from the ITLPC2138 once again connect the external development system to P2 or P3 depending on the development system turn it on and then connect back the USB cable Execute a debug command equiv
10. ector and an on board integrated iSYSTEM debugger The user can write and debug the application using the on board integrated iSYSTEM debugger which connects to the PC through the USB connection The board requires no external power supply since it s powered from the PC USB port An external ARM7TDMI S debugger including e g ETM support can be used for debugging as an alternative to the on board integrated debugger Description View of the ITLPC2138 40128uuoo W13 15 LCD CMC216X04 T2 ol jo 041414141 Figure 2 Top View of the ITLPC2138 iSYSTEM December 2005 3 16 Block Diagram BATT RTC power supply 5V from USB USB Figure 3 ITLPC2138 Block diagram Notes 1 board provides 16 pin connector for the optional LCD display type CMC216x04 which is not included in the package iSYSTEM December 2005 4 16 Components List USB connector integrated debugger DB9 connector serial port UART1 Expansion connector GPIO pins P0 16 P0 23 Expansion connector GPIO pins P0 25 P0 31 JU Expansion connector GPIO pins P0 0 0 7 5s Expansion connector GPIO pins P1 16 P1 23 Expansion connector GPIO pins P0 8 P0 15 3V 6 J20 J22 J25 Trimmer potentiometer P1 P2 P3 P4 P5 J1 J2 J3 J4 J5 J 21 iSYSTEM December 2005 5 16 Power Supply The target board is powered from the PC USB po
11. rt through which winIDEA IDE running on a PC connects to the on board integrated debugger Connection is made using a standard USB cable Battery power supply for RTC can be optionally connected to J11 see J11 description for more details Jumper amp Connector Descriptions J7 Trace Port Enable J7 is set to enable pins P1 25 16 to operate as ETM Trace port after reset Default not set J8 Debug Port Enable J8 is set to enable pins P1 31 26 to operate as a JTAG Debug port after reset Default is set J9 Debug Mode J9 selects whether iSYSTEM on board integrated USB JTAG debugger is used or an external debug tool Default set in position 1 2 J10 RTC Power Supply Selector J10 connects Vbat pin of LPC2138 to the main 3 3V J11 RTC Power supply PCB terminal providing connection for battery When battery power supply applied to J11 is used J10 must be open 12 Manufacturing purpose connections J13 Analog Output J13 is analog output from OP amplifier which connects to output of the DA converter J14 Serial Port UART 0 three pins connected to UARTO See connectors for more details J15 User LEDs Enable enables the LED driver connecting the on board LEDs to GPIO P0 8 P0 11 J16 User Buttons Enable enables buttons driver connecting the on board buttons to GPIO P0 12 P0 15 Pushing the button generates a low signal If J16 is set the CPU will not start in Boot loader mode see J25 description J17 LCD En

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