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National Instruments PC-DIO-96 User's Manual

1. Programming Considerations for the 8253 A general overview of the 8253 and how it is configured on the PC DIO 96 are presented as follows This section also includes an indepth example of handling interrupts generated by the 8253 General Information The 8253 contains three counter timers each of which can operate in one of six different modes As the PC DIO 96 is designed however only counter 0 and counter 1 are configured for operation counter 2 is not connected nor is it available on the external I O connector In addition counter 0 and counter 1 are wired to the interrupt circuitry in such a way that only four of the modes are available for use The source for counter 0 is a 2 MHz clock If counter 0 is used for interrupting the host computer configure the counter for rate generation or mode 2 If counter 1 is used for interrupting the host computer counter 0 is used as a frequency scaler which feeds the source input for counter 1 In this case configure both counters for rate generation or mode 2 To determine the time between pulses generated by counter 0 multiply the load value by 500 nsec 1 2 MHz To determine the time between pulses generated by counter 1 multiply the load value by the time between pulses of counter 0 A sample configuration procedure is presented in the next section National Instruments Corporation 4 21 PC DIO 96 User Manual Register Level Programming Chapter 4 Interrupt Programming Exam
2. count in BCD count in binary Access Mode Mode Select 00 latch counter value 000 mode 0 01 access LSB only 001 mode 1 10 access MSB only 010 mode 2 11 access LSB then MSB 011 mode 3 100 mode 4 101 mode 5 110 mode 2 111 mode 3 Figure 4 2 Control Word Format for the 8253 PC DIO 96 User Manual 4 4 National Instruments Corporation Chapter 4 Register Level Programming Register Description for the Interrupt Control Registers There are two interrupt control registers on the PC DIO 96 One of these registers has individual enable bits for the two interrupt lines from each of the 82C55A devices The other register has a master interrupt enable bit and two bits for the timed interrupt circuitry Of the latter two bits one bit enables counter interrupts while the other selects counter 0 or counter 1 The bit maps and signal definitions are listed as follows National Instruments Corporation 4 5 PC DIO 96 User Manual Register Level Programming Chapter 4 Interrupt Control Register 1 D7 D6 D5 D4 D3 D2 D1 DO Bit Name Description 7 DIRQ1 PPI D Interrupt Request for Port B If this bit and the INTEN bit in Interrupt Control Register 2 are both set PPI D sends an interrupt INTRB to the host computer If this bit is cleared PPI D does not send the interrupt INTRB to the host computer regardless of the setting of INTEN 6 DIRQO PPI D Interrupt Request for Port A If this
3. Enable interrupts enable counter interrupts and select counter 1 s output else outp ireg2 0x06 Enable interrupts enable counter interrupts and select counter 0 s output At this point you should install your interrupt service routine using the interrupt channel selected by W1 install_isr channel X Now write out the counter load values for the selected counters PC DIO 96 User Manual 4 22 National Instruments Corporation Chapter 4 Register Level Programming if use_ctrl outp ctrl unsigned char ctrl_ data amp Ox00ff Send the least significant byte of the counter data for counter 1 outp ctrl unsigned char ctrl_data amp Oxff00 gt gt 8 Send the most significant byte of the counter data for counter 1 outp ctr0 unsigned char ctr0_ data amp Ox00ff Send the least significant byte of the counter data for counter 0 outp ctr0 unsigned char ctr0_ data amp Oxff00 gt gt 8 Send the most significant byte of the counter data for counter 0 As soon as the last byte is written to counter 0 the counter begins counting and the PC DIO 96 starts to interrupt the host computer At this point you can run other code call_foreground_code z7 When you are ready to exit your program you should deactivate the counters and interrupts as shown below if use_ctrl outp cnfg 0x70 Turn off co
4. National Instruments Corporation Chapter 4 Bit 1 0 Name AIRQI AIRQO Register Level Programming Description continued PPI A Interrupt Request for Port B If this bit and the INTEN bit in Interrupt Control Register 2 are both set PPI A sends an interrupt INTRB to the host computer If this bit is cleared PPI A does not send the interrupt INTRB to the host computer regardless of the setting of INTEN PPI A Interrupt Request for Port A If this bit and the INTEN bit in Interrupt Control Register 2 are both set PPI A sends an interrupt INTRA to the host computer If this bit is cleared PPI A does not send the interrupt INTRA to the host computer regardless of the setting of INTEN National Instruments Corporation 4 7 PC DIO 96 User Manual Register Level Programming Chapter 4 Interrupt Control Register 2 D7 D6 DS D4 D3 D2 D1 DO Bit Name Description 7 3 X Don t Care Bit 2 INTEN Global Interrupt Enable Bit TIf this bit is set the PC DIO 96 can interrupt the host computer If this bit is cleared the PC DIO 96 interrupt line is put into high impedance mode so other devices can use the interrupt channel selected by jumper W1 1 CTRIRQ Counter Interrupt Enable Bit TIf this bit is set the 8253 counter outputs can interrupt the host computer If this bit is cleared the counter outputs have no effect 0 CTRI Counter 1 Enable Bit TIf this bit is set the output from counter 1 of the 82
5. 1 to OBF 0 T4 ACK 0 to OBF 1 T5 ACK pulse width 100 T6 ACK 1 to INTR 1 All timing values are in nanoseconds PC DIO 96 User Manual 2 16 Maximum 250 200 150 150 150 National Instruments Corporation Chapter 2 Configuration and Installation Mode 2 Bidirectional Timing The following figure illustrates the timing specifications for bidirectional transfers in mode 2 Name Description Minimum Maximum T1 WR 1 to OBF 0 150 T2 Data before STB 1 20 T3 STB pulse width 100 T4 STB 0toIBF 1 150 T5 Data after STB 1 50 T6 ACK 0 to OBF 1 150 T7 ACK pulse width 100 T8 ACK 0 to output 150 T9 ACK 1 to output float 20 250 T10 RD 1 to IBF 0 150 All timing values are in nanoseconds National Instruments Corporation 2 17 PC DIO 96 User Manual Chapter 3 Theory of Operation This chapter contains a functional overview of the PC DIO 96 board and explains the operation of each functional unit making up the PC DIO 96 The block diagram in Figure 3 1 illustrates the key functional components of the PC DIO 96 board Port A 8 qth gt 82C55A PPI Ponc 8 Port A 8 PotC 8 Port A 8 21 au OKI lt Port B van Control 82C55A PPI lt Port C ae PortA 8 lt o con p ae ak 82C55A PPI Circuitry PortC 8 p AMD 8253 Timer AS 1
6. BASE ADDRESS ACNFGoffset EXAMPLE 1 outp cnfg 0x80 Ports A B and C are outputs outp porta 0x12 Write data to port A outp portb 0x34 Write data to port B outp portc 0x56 Write data to port C EXAMPLE 2 outp cnfg 0x90 Port A is input ports B and C are outputs outp portb 0x22 Write data to port B outp portc 0x55 Write data to port C valread inp porta Read data from port A EXAMPLE 3 outp cnfg 0x82 Ports A and C are outputs port B is an input EXAMPLE 4 outp cnfg 0x89 Ports A and B are outputs port C is an input Mode 1 Strobed Input In mode 1 the digital I O bits are divided into two groups group A and group B Each of these groups contains one 8 bit port and one 4 bit control data port The 8 bit port can be either an input or an output port and the 4 bit port is used for control and status information for the 8 bit port The transfer of data is synchronized by handshaking signals in the 4 bit port The control word written to the CNFG Register to configure port A for input in mode 1 is shown as follows Bits PC6 and PC7 of port C can be used as extra input or output lines D7 D6 D5 D4 D3 D2 D1 DO 1 0 X X X l Port C bits PC6 and PC7 1 input 0 output PC DIO 96 User Manual 4 12 National Instruments Corporation Ch
7. Base I O Address of Hardware NI DAQ Version Windows Version Windows Mode Other Products Computer Make and Model Microprocessor Clock Frequency Type of Video Board Installed DOS Version Programming Language Programming Language Version Other Boards in System Base I O Address of Other Boards DMA Channels of Other Boards Interrupt Level of Other Boards Documentation Comment Form National Instruments encourages you to comment on the documentation supplied with our products This information helps us provide quality products to meet your needs Title PC DIO 96 User Manual Edition Date September 1995 Part Number 320289B 01 Please comment on the completeness clarity and organization of the manual If you find errors in the manual please record the page numbers and describe the errors Thank you for your help Name Title Company Address Phone Mail to Technical Publications Fax to Technical Publications National Instruments Corporation National Instruments Corporation 6504 Bridge Point Parkway MS 53 02 MS 53 02 Austin TX 78730 5039 512 794 5678 Glossary kbytes LSB MSB PPI Rexr RTSI SCXI Vext Vin VDC degrees ohms percent amperes Advanced Micro Devices American Wire Gauge binary coded decimal Celsius
8. PORTA Register i Read and write PORTB Register Read and write PORTC Register Read and write CNFG Register Write only Interrupt Control Register Group Register 1 Write only Register 2 Write only PC DIO 96 User Manual 4 2 National Instruments Corporation Chapter 4 Register Level Programming Register Descriptions The register descriptions for the devices on the PC DIO 96 including the 82C55A the 8253 and each of the interrupt control registers are given on the pages that follow Register Description for the 82C55A Figure 4 1 shows the two control word formats used to completely program the 82C55A The control word flag determines which control word format is being programmed When the control word flag is 1 bits 6 through 0 select the I O characteristics of the 82C55A ports These bits also select the mode in which the ports are operating that is mode 0 mode 1 or mode 2 When the control word flag is 0 bits 3 through 0 select the bit set reset format of port C Control Word Flag Port C pe low nibble 1 mode set 1 input 0 output Mode Selection 00 mode 0 Port B 01 mode 1 1 input 1X mode 2 0 output Mode Selection 0 mode 0 1 mode 1 PortA 1 input 0 output high nibble 1 input 0 output a Mode Set Word Format Control Word Bit Set Reset Flag 1 set 0 bit set reset 0 reset Bit Select
9. Table 4 1 PC DIO 96 Address Maps Re terres 4 2 Table 4 2 Port C Set Reset Control Words men ieee eddie 4 4 Table 4 3 Mode 0 I O Configurations 25 54 4 11 Table A 1 Maximum Average Transfer Rates for the PC DIO 96 0 00 eee eeeeeeereees A 3 National Instruments Corporation vii PC DIO 96 User Manual Contents Chapter 1 About This Mandil ss ss sens tn suai Anne v Organization of This Manual ssh oisnealins ns dote nn nan ntis v Conventions Used in This Manual sus seactssnssed esse soaasacesbaccvas sdcndesccsenence sees vi National Instruments Documentation ss Vil Related Documentations issus eed cea eet eet teii aisa esii ansis Vil Chapter 1 Introduction ini Snel eee ee i 1 1 Abot te PE DIO 06 Ets So sah rcs racic aes a acs te ee ct cr ne 1 1 What You Need to Get Started 59s MR tardes ahaa ckecionddam ten cotati N R 1 2 Software Programming Choices sante nn nn nr tin 1 2 LabVIEW and LabWindows CVI Application Software eecceeeseeeesteeees 1 2 NI DAQ Driver SoftWare aae iaee deaaSeves aiaa 2 e tt nest 1 3 Register Level Programming inner 1 4 OPUONAL QUIPMENT Se iai AG ne en se tn 1 4 Cabling urine nr nn en SR ed nn E delle lies 1 4 Unpacking tonene ii a dde quod eon nn nn a de 1 5 Chapter 2 Configuration and Installation 2 1 SOAS OM OU AON rues opin MR soo ce ae ag eae EEEE 2 1 Base UO Address Settings tan dm nta tonton 2 2 Interrupt Level S lection insistent in E
10. 0 0 0 0 1 1 1 1 1 1 1 1 Base 1 0 address values 000 through OFF hex are reserved for system use Base I O address values 100 through 3FF hex are available on the I O channel PC DIO 96 User Manual 2 4 National Instruments Corporation Chapter 2 Configuration and Installation Interrupt Level Selection There is one set of jumpers for interrupt selection on the PC DIO 96 board W1 is used for selecting the interrupt level The location of this jumper is shown in Figure 2 1 The PC DIO 96 board can connect to any one of six interrupt lines of the PC I O Channel IRQ3 IRQ4 IRQS IRQ6 IRQ7 or IRQ9 Select the interrupt line by setting a jumper on W1 The default interrupt line is IRQ5 To change to another line remove the jumper from IRQ5 and place it on the pins for another request line Figure 2 3 shows the default factory setting for IRQS Figure 2 3 Interrupt Jumper Setting for IRQ5 Factory Setting The PC DIO 96 can share interrupt lines with other devices because it uses a tri state driver to drive its selected interrupt line For information on how to disable this driver see Chapter 4 Register Level Programming Installation The PC DIO 96 can be installed in any unused 8 bit 16 bit or 32 bit expansion slot in your computer After you make any necessary changes and verify the switch and jumper settings record them using the PC D10 96 Hardware and Software Configuration Form in Appe
11. 2 Configuration and Installation onboard registers On the U26 DIP switches press the side marked OFF to select a binary value of 1 for the corresponding address bit Press the other side of the switch to select a binary value of 0 for the corresponding address bit Figure 2 2 shows two possible switch settings The black side indicates the side of the switch that is pushed down B Switches Set to Base I O Address Hex 2A0 Figure 2 2 Example Base I O Address Switch Settings Table 2 2 shows all possible switch settings and their corresponding address ranges National Instruments Corporation 2 3 PC DIO 96 User Manual Configuration and Installation Chapter 2 Table 2 2 Switch Settings with Corresponding Base I O Address and Base I O Address Space Switch Setting Base I O Address Base I O Address A9 A8 A7 A6 A5 hex Space Used hex 000 O1F 020 03F 040 OSF 060 O7F 080 09F OAO OBF OCO ODF OEO OFF 100 11F 120 13F 140 15F 160 17F 180 19F 1A0 IBF 1C0 IDF 1E0 LFF 200 21F 220 23F 240 25F 260 27F 280 29F 2A0 2BF 2C0 2DF 2E0 2FF 300 31F 320 33F 340 35F 360 37F 380 39F 3A0 3BF 3C0 3DF 3E0 3FF ee aS ee ee ee el IDDM M mn mm OO OOo mm nm OOO OrR RR re OO Oo Om rR Ke COCO mm OO Or nm OO Oh nm OO Om OO Om OO Om OO mm OO mm OO OR OrFOrFOrFOrR Or OMR Or Or Or Or Or Or Or OF 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0
12. I O ports A B and C of the 82C55A These ports can be programmed as two groups of 12 signals or as three individual 8 bit ports The 8253 is a general purpose counter timer that is used to send periodic interrupts to the host computer This chapter includes register level programming information for the PC DIO 96 along with program examples written in C and assembly language Note Ifyou plan to use a programming software package such as LabWindows CVI or NI DAQ with your PC DIO 96 board you need not read this chapter Introduction The three 8 bit ports of the 82C55A are divided into two groups group A and group B two groups of 12 signals One 8 bit control word selects the mode of operation for each group The group A control bits configure port A A7 through AO and the upper 4 bits nibble of port C C7 through C4 The group B control bits configure port B B7 through BO and the lower nibble of port C C3 through CO These configuration bits are defined in the Register Description for the 82C55A section later in this chapter Because there are four 82C55A PPI devices on the board they are referenced as PPI A PPI B PPI C and PPI D when differentiation is required The three 16 bit counters of the 8253 are accessed through individual data ports and controlled by one 8 bit control word The control word selects how the counter data ports are accessed and what mode the counter uses The configuration bits are defined in the Register
13. ORO ROPE MEADE ne ERE AOR PORE Glossary 1 WN ON os cutter Men nee dede Re ee E E Index 1 PC DIO 96 User Manual vi National Instruments Corporation Contents Figures Figure 1 1 The Relationship between the Programming Environment NI DAQ and Your HardWare sae she ass vse eee Oe ease dena dene Se Ae Ca REE 1 3 Figure 2 1 PC DIO 96 Parts Locator Diagramme ining gndindnndk 2 2 Figure 2 2 Example Base I O Address Switch Settings 2 3 Figure 2 3 Interrupt Jumper Setting for IRQS Factory Setting eee eeeeeeeeeeeeeeneees 2 5 Figure 2 4 Digital I O Connector Pin Assignments 0 0 0 0 ee ceeseeeseceseceeeeeeaeeceeeneenseeeeneees 2 7 Figure 2 5 Cable Assembly Connector Pinout for Pins 1 through 50 secese 2 10 Figure 2 6 Cable Assembly Connector Pinout for Pins 51 through 100 eee 2 11 Figure 2 7 Digital I O Connections i2 25seccs titan ala niin lie an detente 2 13 Figure 3 1 PC DIO 96 Block Diagram 246 64 224 eck CA RSG 3 1 Figure 4 1 Control Word Formats for the 82C55A oo eeceseeesseceeeeeseeeeseecaeenseenseeeeneees 4 3 Figure 4 2 Control Word Format for the 8253 oo eee eeeeceesseeesseceseeeseeesseecsaeceseesseeeeneees 4 4 Tables Table 2 1 PC DIO 96 Factory Set Switch and Jumper Settings 20 0 0 eeeeeeseeetteeeeees 2 1 Table 2 2 Switch Settings with Corresponding Base I O Address and Base TO Address Space sacdan nt TE en ne 2 4 Table 2 3 Port C Signal Assignments esis nes cadens hs es nn le ne anne cn edf 2 9
14. and company names listed are trademarks or trade names of their respective companies WARNING REGARDING MEDICAL AND CLINICAL USE OF NATIONAL INSTRUMENTS PRODUCTS National Instruments products are not designed with components and testing intended to ensure a level of reliability suitable for use in treatment and diagnosis of humans Applications of National Instruments products involving medical or clinical treatment can create a potential for accidental injury caused by product failure or by errors on the part of the user or application designer Any use or application of National Instruments products for or involving medical or clinical treatment must be performed by properly trained and qualified medical personnel and all traditional medical safeguards equipment and procedures that are appropriate in the particular situation to prevent serious injury or death should always continue to be used when National Instruments products are being used National Instruments products are NOT intended to be a substitute for any form of established process procedure or equipment used to monitor or safeguard human health and safety in medical or clinical treatment Contents Chapter 1 About This Mandil ss ss sens tn suai Anne v Organization of This Manual ssh oisnealins ns dote nn nan ntis v Conventions Used in This Manual sus seactssnssed esse soaasacesbaccvas sdcndesccsenence sees vi National Instruments Documentation ss Vil Related Documentations issus
15. and the appropriate part number for the 100 pin mating connector is as follows e Robinson Nugent part number PS5OE 100S TG The recommended manufacturer part numbers for 50 pin female ribbon socket connectors suitable for use with the preceding connector are e Electronic Products Division 3M part number 3425 7650 e T amp B Ansley Corporation part number 609 5041CE Recommended manufacturers and the appropriate part numbers for the standard ribbon cable 50 conductor 28 AWG stranded that can be used with both the 100 pin and the 50 pin connectors are e Electronic Products Division 3M part number 3365 50 e T amp B Ansley Corporation part number 171 50 Unpacking Your PC DIO 96 board is shipped in an antistatic package to prevent electrostatic damage to the board Electrostatic discharge can damage several components on the board To avoid such damage in handling the board take the following precautions e Ground yourself via a grounding strap or by holding a grounded object e Touch the antistatic package to a metal part of your computer chassis before removing the board from the package e Remove the board from the package and inspect the board for loose components or any other sign of damage Notify National Instruments if the board appears damaged in any way Do not install a damaged board into your computer e Never touch the exposed pins of connectors National Instruments Corporation 1 5 PC DIO 24 User Man
16. bit and the INTEN bit in Interrupt Control Register 2 are both set PPI D sends an interrupt INTRA to the host computer If this bit is cleared PPI D does not send the interrupt INTRA to the host computer regardless of the setting of INTEN 5 CIRQI PPI C Interrupt Request for Port B If this bit and the INTEN bit in Interrupt Control Register 2 are both set PPI C sends an interrupt INTRB to the host computer If this bit is cleared PPI C does not send the interrupt INTRB to the host computer regardless of the setting of INTEN 4 CIRQO PPI C Interrupt Request for Port A If this bit and the INTEN bit in Interrupt Control Register 2 are both set PPI C sends an interrupt INTRA to the host computer If this bit is cleared PPI C does not send the interrupt INTRA to the host computer regardless of the setting of INTEN 3 BIRQI PPI B Interrupt Request for Port B If this bit and the INTEN bit in Interrupt Control Register 2 are both set PPI B sends an interrupt INTRB to the host computer If this bit is cleared PPI B does not send the interrupt INTRB to the host computer regardless of the setting of INTEN BIRQO PPI B Interrupt Request for Port A If this bit and the INTEN bit in Interrupt Control Register 2 are both set PPI B sends an interrupt INTRA to the host computer If this bit is cleared PPI B does not send the interrupt INTRA to the host computer regardless of the setting of INTEN PC DIO 96 User Manual 4 6
17. direct memory access Extended Industry Standard Architecture hexadecimal hertz inches output current Industry Standard Architecture 1 024 bytes least significant bit megabytes of memory meters most significant bit programmable peripheral interface external resistance Real Time System Integration seconds Signal Conditioning eXtensions for Instrumentation volts external volt volts in volts direct current National Instruments Corporation Glossary 1 PC DIO 96 User Manual
18. for mode 1 output for port A Enable the appropriate interrupt bits outp cnfg 0xA0 Port A is an output in mode 1 outp cnfg 0x0D Set PC6 to enable interrupts from 82C55A outp iregl 0x01 Set AIRQO to enable PPI A port A interrupts outp ireg2 0x04 Set INTEN bit EXAMPLE 4 Set up interrupts for mode 1 output for port B Enable the appropriate interrupt bits PC DIO 96 User Manual 4 20 National Instruments Corporation Chapter 4 Register Level Programming outp cnfg 0x84 Port B is an output in mode 1 outp cnfg 0x05 Set PC2 to enable interrupts from 82C55A outp ireg1 0x02 Set AIRQ1 to enable PPI A port B interrupts outp ireg2 0x04 Set INTEN bit EXAMPLE 5 Set up interrupts for mode 2 output transfers Enable the appropriate interrupt bits outp cnfg 0xC0 Mode 2 output outp cnfg 0x0D Set PC6 to enable interrupts from 82C55A outp ireg1 0x01 Set AIRQO to enable PPI A port A interrupts outp ireg2 0x04 Set INTEN bit EXAMPLE 6 Set up interrupts for mode 2 input transfers Enable the appropriate interrupt bits outp cnfg 0xD0 Mode 2 input outp cnfg 0x09 Set PC4 to enable interrupts from 82C55A outp ireg1 0x01 Set AIRQO to enable PPI A port A interrupts outp ireg2 0x04 Set INTEN bit
19. inp porta Read data from port A Interrupt Programming Examples for the 82C55A The following examples show the process required to enable interrupts for several different operating modes The interrupt handling routines and interrupt installation routines for the 82CSSA are not included however sample routines for the 8253 are included later in the chapter These routines can be modified to function for the 82C55A Consult the JBM Personal Computer XT Technical Reference manual for additional information Also if you generate interrupts with the PC3 or PCO lines of the 82C55A devices you must maintain the active high level until the interrupt service routine is entered Otherwise the host computer considers the interrupt a spurious interrupt and routes the request to the channel responsible for handling spurious interrupts To prevent this problem try using some other I O bit to send feedback to the device generating the interrupt In this way the interrupting device can be signaled that the interrupt service routine has been entered For further information on using PC3 and PCO for interrupts see the section entitled Interrupt Handling later in this chapter National Instruments Corporation 4 19 PC DIO 96 User Manual Register Level Programming Chapter 4 Main define BASE_ADDRESS 0x180 Board located at address 180 define APORTAoffset 0x00 Offset for PPI A port A define APO
20. interrupt level Get interrupt level Generate some masks cx has 1 in bit pos of int level bx has 0 in bit pos of int level Get mask data from master chip Delay wait for data transfer Determine setting of mask bit Enable interrupts for selected level Delay wait for data transfer Get mask data from slave chip Delay wait for data transfer Determine setting of mask bit Enable interrupts for selected level Save the previous value of the mask PC DIO 96 User Manual Register Level Programming restore saved registers ii exit pop pop pop pop pop pop pop sti ret _install_isr remove_isr bp reg ret addr ofs ret addr seg _remove_isr proc cli push push push push push push mov mov see if our vector restore old mask and vector values PC DIO 96 User Manual es ds ax CX bx ax bp endp ax bx Cx dx ds es ax seg _DATA ds ax is installed if not vect_num 0 short ri_exit al vect_num ah 35h 21h CX CS dx es dx CX short ri _ exit bx offset _isr handler short ri_exit f F LA 4 26 Chapter 4 do not remove the vector See if vect_num was ever set Our vector never installed exit Get vector number Get current vector from DOS Get previous int_addr in es bx Prep to compare old current vectors See if our vector is already there Different vector segment exit Different vector offset exit Nat
21. of which is connected to pins 51 through 100 of the PC DIO 96 I O connector The cable with the label on it is connected to pins 1 through 50 Figures 2 5 and 2 6 show the pin assignments for the 50 pin connectors on the cable assembly National Instruments Corporation 2 9 PC DIO 96 User Manual Configuration and Installation Chapter 2 Figure 2 5 Cable Assembly Connector Pinout for Pins 1 through 50 of the PC DIO 96 I O Connector PC DIO 96 User Manual 2 10 National Instruments Corporation Chapter 2 Configuration and Installation Figure 2 6 Cable Assembly Connector Pinout for Pins 51 through 100 of the PC DIO 96 I O Connector National Instruments Corporation 2 11 PC DIO 96 User Manual Configuration and Installation Chapter 2 Digital I O Signal Connections Pins 1 through 48 and pins 51 through 98 of the I O connector are digital I O signal pins The following specifications and ratings apply to the digital I O lines Absolute maximum voltage rating 0 5 to 5 5 V with respect to GND Digital input specifications referenced to GND Input logic high voltage 2 2 V minimum 5 3 V maximum Input logic low voltage 0 3 V minimum 0 8 V maximum Maximum input current 0 lt Vin lt 5 V 1 0 LA minimum 1 0 WA maximum Digital output specifications ref
22. the most commonly needed information for the modules chassis and software e Your SCXI hardware user manuals If you are using SCXI read these manuals next for detailed information about signal connections and module configuration They also explain in greater detail how the module works and contain application hints e Your DAQ hardware user manuals These manuals have detailed information about the DAQ hardware that plugs into or is connected to your computer Use these manuals for hardware installation and configuration instructions specification information about your DAQ hardware and application hints e Software manuals Examples of software manuals you may have are the LabVIEW and LabWindows CVI manual sets and the NI DAQ manuals a 4 6 1 or earlier version of NI DAQ supports LabWindows for DOS After you set up your hardware system use either the application software LabVIEW or LabWindows CVI manuals or the NI DAQ manuals to help you write your application If you have a large and complicated system it is worthwhile to look through the software manuals before you configure your hardware e Accessory installation guides or manuals If you are using accessory products read the terminal block and cable assembly installation guides or accessory board user manuals They explain how to physically connect the relevant pieces of the system Consult these guides when you are making your connections e SCXI chassis manuals If yo
23. these 5 V power pins be connected directly to ground or to any other voltage source on the PC DIO 96 or any other device Doing so may damage the PC DIO 96 and the PC National Instruments is NOT liable for damage resulting from such a connection National Instruments Corporation 2 13 PC DIO 96 User Manual Configuration and Installation Chapter 2 Timing Specifications This section lists the timing specifications for handshaking with the PC DIO 96 The handshaking lines STB and IBF synchronize input transfers The handshaking lines OBF and ACK synchronize output transfers The following signals are used in the timing diagrams later in this chapter Description Strobe Input A low signal on this handshaking line loads data into the input latch Input Buffer Full A high signal on this handshaking line indicates that data has been loaded into the input latch This is an input acknowledge signal Acknowledge Input A low signal on this handshaking line indicates that the data written to the port has been accepted This signal is a response from the external device indicating that it has received the data from the PC DIO 96 Output Output Buffer Full A low signal on this handshaking line indicates that data has been written to the port Output Interrupt Request This signal becomes high when the 82C55A requests service during a data transfer The appropriate interrupt enable bits must be set to generate t
24. to Get Started To set up and use your PC DIO 96 you will need the following Li PC DIO 96 board L PC DIO 96 User Manual Ly One of the following software packages and documentation NI DAQ for PC compatibles LabVIEW for Windows LabWindows CVI for Windows Ly Your computer Software Programming Choices There are several options to choose from when programming your National Instruments DAQ and SCXI hardware You can use LabVIEW LabWindows CVI or NI DAQ A 4 6 1 or earlier version of NI DAQ supports LabWindows for DOS LabVIEW and LabWindows CVI Application Software LabVIEW and LabWindows CVI are innovative program development software packages for data acquisition and control applications LabVIEW uses graphical programming whereas LabWindows CVI enhances traditional programming languages Both packages include extensive libraries for data acquisition instrument control data analysis and graphical data presentation LabVIEW features interactive graphics a state of the art user interface and a powerful graphical programming language The LabVIEW Data Acquisition VI Library a series of VIs for using LabVIEW with National Instruments DAQ hardware is included with LabVIEW The LabVIEW Data Acquisition VI Libraries are functionally equivalent to the NI DAQ software LabWindows CVI features interactive graphics a state of the art user interface and uses the ANSI standard C programming language The LabWindows CVI Data Acquisitio
25. 000 001 010 Unused 111 b Bit Set Reset Word Format Figure 4 1 Control Word Formats for the 82C55A National Instruments Corporation 4 3 PC DIO 96 User Manual Register Level Programming Chapter 4 Warning During programming note that each time a port is configured output ports A and C are reset to 0 and output port B is undefined Table 4 2 shows the control words for setting or resetting each bit in port C Notice that bit 7 of the control word is cleared when programming the set reset option for the bits of port C Table 4 2 Port C Set Reset Control Words Bit Bit Set Bit Reset The Bit Set or Number Control Word Control Word Reset in Port C Oxxx0001 0xxx0000 XXXXXXxb 0xxx0011 0xxx0010 XXXXXxbx Oxxx0101 Oxxx0100 XXXXXDXX Oxxx0111 Oxxx0110 XXXXDXXX Oxxx1001 Oxxx1000 XXXDXXXX Oxxx1011 Oxxx1010 XXDXXXXX Oxxx1101 Oxxx1100 XbXXXXXX 0xxx1111 0xxx1110 bxXXXXXXX ennai Register Description for the 8253 Figure 4 2 shows the control word format used to completely program the 8253 Bits 7 and 6 of the control word select the counter to be programmed Bits 5 and 4 select the mode by which the count data is written to and read from the selected counter Bits 3 2 and 1 select the mode for the selected counter Bit 0 selects whether the counter counts in binary or BCD format D7 D6 D5 D4 Mir Counter Select 00 counter 0 1 01 counter 1 0 10 counter 2 11 illegal
26. 00000000000000000000 D on oolmloo jeo oo d SS928 a 6cc5c8 er exe 0000000000000000000 0060000000 COO0COCO0C0oDNococooood Coo0cococol Se L 00000 o OOOO OOS o00000000 SCOoomMuIG t 000000000 U15 Ni 00000000000000000000 joo oO U o anl 2000000000 0000000000000 000000 0 exe GO Ieo 00 1100 OO LV joo co joo joo exe J CG5c8 Heca loc oolT joa oo cD 5000000000000000000 00000000000000000000 5ovcoocococuooccooocooo bococococo Hooocococoo RE RRVSB SE RE Dee D 000000000000 a oooooonto HOLIMS S 4 MH O S11 00000 w a 5000008 5 a te CO00OdH o vo0000o0oouso F 9 O00000000000 gSa 0000000000 O 890 OLIO exe ol slcolN col mice al sloo oo soclsloclqloo ob1910 of 69 JO of 9a 5316 0 551 60 ofa ol place l a M 10 ao ao ools loco a o a M o 2 Oj ne Ul 2 a e w 2628 ool loo lao lool ool Jac lao DS LE eters Learns Lolz Lend Led oo gle Ga 0000000000 c oooooon o Gi 9g S 500000 Ot
27. 4 Mode TL Input TIMME este ment nt de nn Tim sud 2 15 Mode Output TIRER eens RER En nette 2 16 Mode 2 Bidirectional Timing is tttinnenaetntssitshetentesll 2 17 Chapter 3 Theory of Operation cree achalasia ace Rico en A Sc Rall Sees 3 1 Data Transceivers Zarate M devas essen eae ease E espe ve eae ep oes 3 2 PC WO Channel Control CITES RS Re le M Re etre tale nanas 3 2 82C55A Programmable Peripheral Interface eee ees eeseceeeceeeeesaeecaeceeeeseeeeaeees 3 2 8253 Programmable Interval Timer ss acdets ton eens cece 3 2 Interrupt Control Cire wiry iere nn Steno Saeed he Bae wedi 3 2 Digital WO Coma ete wagers sess Gis yd aioe ee os sed A Eee ne ne Ce 3 3 National Instruments Corporation v PC DIO 96 User Manual Contents Chapter 4 Register Level Programming 0 0 0cccccccccccesesesesesesesesesesesesesesesesesesescseseseseseseaes 4 1 Introductionis se le ne a ne es ne tn tin 4 Resister IV Lea eal dye Sy use Nm EE D E nn eset anak 4 2 Register D SCHPUONSS ea RS stacey Se en a ia 4 3 Register Description for the 82C55A ss 4 3 Register Description for the 8253 nine nn nr te nt terne see 4 4 Register Description for the Interrupt Control Registers eee eeeeeseeeeeeeeeee 4 5 Interrupt Control Register 1 1x tance tannins ti 4 6 Interrupt Control Register 2 issues dhseielessnenssse 4 8 Programming Considerations for the 82C55A oo ceeeesceessecsseceeeeeeseeceaeceaeeeseeeeneessaeenes 4 9 Modes of Operation for the S2
28. 5 V with respect to GND Handshaking ss sng anvecbasteons cc eeSelst vansotenetuccaess Requires 1 port Poweron Slate isrener isna ar E Configured as inputs D t tr ns ferS sn ini dm Rennes Interrupts programmed I O Digital Logic Levels Input Signals Pins 1 48 51 98 Input logic high voltage Input logic low voltage Input current 0 lt Vin lt 5 V Output Signals Pin 49 ate Vin helt EE E 0 5 A max Pin 99 aths Vlan rhin Mean 0 5 A max Note The total combined current output from pins 49 and 99 may be limited by the available current from your computer s power supply To determine the available current subtract the maximum power consumption of the board from the maximum current per slot The difference if less than 1 is the maximum combined current available to pins 49 and 99 If the difference is equal to or greater than 1A the maximum current available is restricted by the limitations of the connector as shown previously If your external circuitry requires 0 5 to 1 A of current you should connect pins 49 and 99 in parallel in order to distribute the current National Instruments Corporation A 1 PC DIO 96 User Manual Specifications Appendix A Pins 1 48 51 98 sisi muse hnnntanismenss Output high voltage Tout 2 5 mA Output low voltage Tout 2 5 mA Output current Va 0 5 V Output current V 2 7 V Environment Operating Temperature 0 to 70
29. 53 is connected to the interrupt request circuitry In this mode counter 0 of the 8253 acts as a frequency scaler for counter 1 which generates the interrupt If CTR1 is cleared the output from counter 0 of the 8253 is connected to the interrupt request circuitry In this mode counter 0 generates the interrupt For more information see the section later in this chapter on programming interrupts using the 8253 PC DIO 96 User Manual 4 8 National Instruments Corporation Chapter 4 Register Level Programming Programming Considerations for the 82C55A Modes of Operation for the 82C55A The three basic modes of operation for the 82C55A are as follows e Mode 0 Basic I O e Mode 1 Strobed I O e Mode 2 Bidirectional bus The 82C55A also has a single bit set reset feature for port C which is programmed by the 8 bit control word For additional information refer to Appendix B OKI 82C55A Data Sheet Mode 0 This mode can be used for simple input and output operations for each of the ports No handshaking is required data is simply written to or read from a specified port Mode 0 has the following features e Two 8 bit ports A and B and two 4 bit ports upper and lower nibbles of port C e Any port can be input or output e Outputs are latched but inputs are not latched Mode 1 This mode transfers data that is synchronized by handshaking signals Ports A and B use the eight lines of port C to generate or receive the handshak
30. AO the LSB 2 4 6 8 10 12 BPC lt 7 0 gt Bidirectional Data Lines for Port C of PPI B BPC7 is the 14 16 MSB BPCO the LSB 18 20 22 24 26 BPB lt 7 0 gt Bidirectional Data Lines for Port B of PPI B BPB7 is the 28 30 32 MSB BPBO the LSB 34 36 38 40 42 BPA lt 7 0 gt Bidirectional Data Lines for Port A of PPI B BPA7 is the 44 46 48 MSB BPAO the LSB 51 53 55 57 59 CPC lt 7 0 gt Bidirectional Data Lines for Port C of PPI C CPC7 is the 61 63 65 MSB CPCO the LSB 67 69 71 73 75 CPB lt 7 0 gt Bidirectional Data Lines for Port B of PPI C CPB7 is the 77 79 81 MSB CPBO the LSB 83 85 87 89 91 CPA lt 7 0 gt Bidirectional Data Lines for Port A of PPI C CPA7 is the 93 95 97 MSB CPAO the LSB 52 54 56 58 60 DPC lt 7 0 gt Bidirectional Data Lines for Port C of PPI D DPC7 is the 62 64 66 MSB DPCO the LSB 68 70 72 74 76 DPB lt 7 0 gt Bidirectional Data Lines for Port B of PPI D DPB7 is the 78 80 82 MSB DPBO the LSB 84 86 88 90 92 DPA lt 7 Bidirectional Data Lines for Port A of PPI D DPA7 is the 94 96 98 MSB DPAO the LSB 49 99 see note 5 V 5 Volts These pins are connected to the computer s 5 VDC below supply 50 100 GND Ground These pins are connected to the computer s ground signal Note Pins 49 and 99 are connected to the 5 V PC power supply via a 1 A fuse Replacement fuses are avail
31. C Storage Temperature 55 to 150 C Relative humidity cece eee ceeseecseceeceseeeeeeeeeeeeaes 5 to 90 noncondensing Physical DIMENSIONS ss ses ne hr mms 3 9 in by 6 5 in WO connector eis ch es kt nnie Kirene en EE e ias 100 pin male ribbon cable connector Power Requirement from PC I O Channel EYP POWEL session E ete 0 38 A at 5 VDC 5 Max POWET e rA EE EE A ANR Inn 0 8 A at 5 VDC 45 Note These power usage figures do not include the power used by external devices that are connected to the fused supply present on the I O connector Transfer Rates The maximum average transfer rates for the PC DIO 96 are shown as follows The code used to make the measurements follows the table The assembly language code was assembled as inline assembly C code using version 8 00 of the Microsoft Optimizing C Compiler The C code was compiled using version 8 00 of the Microsoft Optimizing C Compiler PC DIO 96 User Manual A 2 National Instruments Corporation Appendix A Specifications Table A 1 Maximum Average Transfer Rates for the PC DIO 96 AT ISA16 486DX4 100 MHz 490 kbytes s 470 kbytes s Assembly language code mov cx 64 mov dx 0180h loop lodsb out dx al dec CX jnz short loop C code address 0x0180 for i 0 i lt 64 itt outp address data National Instruments Corporation Count out 64 transfers The port to acc
32. C5 5A 2 nn ann nt nur asian 4 9 Mods ei aie a ah ROR aa GR Neh atl oleic 4 9 INGE Sees des oat aca RE Ge le ae as Mecca 4 9 Mode Figs let teeta desea tie etn A tS Manon ns 4 10 Single Bit Set Reset Feature ent nt ain tnt 4 10 Mode 0 Basie lo puted be ie teh Buenas Nate eee 4 10 Mode 0 Programming Example eccceeesceceecceceeeeeceneeeenteeeenaeeeenas 4 11 Mode 1 Strobed Input neineanien dentiste 4 12 Mode 1 Input Programming Example cceeeccecesceeeeeeceeeteeeeneeeenes 4 14 Mode 1 Strobed Output rss sesiis esini aiii esis 4 15 Mode 1 Output Programming Example cee eeeeeseeseceeeeeeeeeeneees 4 16 Mode 2 Bidirectionial Bus ic 2cciciieecdienl eek oiesnieeliiesteesteaiee 4 17 Mode 2 Programming Example 23e 4 19 Interrupt Programming Examples for the 82C55A seseeseseerresreererersrrererreess 4 19 Programming Considerations for the 8253 sic sscecvacsssascnessasesanastesanccosncsisessbcdecaneesenee 4 21 General Informati n assa a Me a ian i isoa iNNi 4 21 Interrupt Programming Example for the 8253 ooo eee eeeeeeeeeeeneeeneeeneeteees 4 22 ICE el aS asco RSR a a Re ee setae 4 28 Appendix A SD CHICALIOTIS 95 8 innin haen oh ae etl ae ete tan a aoe A 1 Appendix B OKI 82C55A Data Sheet sia enr auiiiiod maaan B 1 Appendix C AMD 8253 Data SHCCC fs closes cd RL nn Rs nn ce CA C 1 Appendix D Customer Communication D 1 Glossary eu ee SL CD SO PCE
33. Description for the 8253 section later in this chapter In addition to the 82C55A devices and the 8253 device there are two registers that select which onboard signals are capable of generating interrupts There are two interrupt signals from each of the four 82C55A devices and two interrupt signals from the 8253 device Individual enable bits select which of these 10 signals can generate interrupts Also a master enable signal determines whether the board can actually send a request to the host computer The configuration bits for these registers are defined in the Register Description for the Interrupt Control Registers section later in this chapter National Instruments Corporation 4 PC DIO 96 User Manual Register Level Programming Chapter 4 Register Map The following table lists the address map for the PC DIO 96 Table 4 1 PC DIO 96 Address Map Register Name Offset Address Size Type Hex 82C55A Register Group PPI A PORTA Register Read and write PORTB Register Read and write PORTC Register Read and write CNFG Register Write only PPIB PORTA Register Read and write PORTB Register Read and write PORTC Register Read and write CNFG Register Write only PPI C PORTA Register i Read and write PORTB Register Read and write PORTC Register Read and write CNFG Register Write only PPI D PORTA Register Read and write PORTB Register Read and write PORTC Register Read and write CNFG Register Write only 8253 Register Group
34. E R a a tiiri 2 5 ITS CAN ALLO I cose ceca ie On ele a a eA E a a tee ne 2 5 Signal CONNEC OMS esinen a E A A ei iaaa 2 6 VO Connector Pin Description ss ssssesesssesessseessesseesseerseesseressressersserssseeessees 2 7 T O Connector Signal Connection Descriptions sssesesesessseesssessersseresseesssees 2 8 Port C Pin ASSIEnMents sidi tenta ne E 2 8 Cable Assembly Connectors ss sssessssssesssesessseesstsseessereseeessseessressresseeesseesseees 2 9 Digital I O Signal Connections SE Ra de La 2 12 Power Connections n e a a a ST ea e aes aloe N 2 13 Timina SpecifieatioiS nesae a r E 2 14 Mode TL Input TIMME este ment nt de nn Tim sud 2 15 Mode Output TIRER eens RER En nette 2 16 Mode 2 Bidirectional Timing is tttinnenaetntssitshetentesll 2 17 Chapter 3 Theory of Operation cree achalasia ace Rico en A Sc Rall Sees 3 1 Data Transceivers Zarate M devas essen eae ease E espe ve eae ep oes 3 2 PC WO Channel Control CITES RS Re le M Re etre tale nanas 3 2 82C55A Programmable Peripheral Interface eee ees eeseceeeceeeeesaeecaeceeeeseeeeaeees 3 2 8253 Programmable Interval Timer ss acdets ton eens cece 3 2 Interrupt Control Cire wiry iere nn Steno Saeed he Bae wedi 3 2 Digital WO Coma ete wagers sess Gis yd aioe ee os sed A Eee ne ne Ce 3 3 National Instruments Corporation v PC DIO 96 User Manual Contents Chapter 4 Register Level Programming 0 0 0cccccccccccesesesesesesesesesesesesesesesesesesescsesesese
35. ENTS SHALL BE LIMITED TO THE AMOUNT THERETOFORE PAID BY THE CUSTOMER NATIONAL INSTRUMENTS WILL NOT BE LIABLE FOR DAMAGES RESULTING FROM LOSS OF DATA PROFITS USE OF PRODUCTS OR INCIDENTAL OR CONSEQUENTIAL DAMAGES EVEN IF ADVISED OF THE POSSIBILITY THEREOF This limitation of the liability of National Instruments will apply regardless of the form of action whether in contract or tort including negligence Any action against National Instruments must be brought within one year after the cause of action accrues National Instruments shall not be liable for any delay in performance due to causes beyond its reasonable control The warranty provided herein does not cover damages defects malfunctions or service failures caused by owner s failure to follow the National Instruments installation operation or maintenance instructions owner s modification of the product owner s abuse misuse or negligent acts and power failure or surges fire flood accident actions of third parties or other events outside reasonable control Copyright Under the copyright laws this publication may not be reproduced or transmitted in any form electronic or mechanical including photocopying recording storing in an information retrieval system or translating in whole or in part without the prior written consent of National Instruments Corporation Trademarks LabVIEW NI DAQ and GPIB PCII are trademarks of National Instruments Corporation Product
36. Fuse 5 Cc Cc pa O O A I O Connector Figure 3 1 PC DIO 96 Block Diagram The PC I O channel consists of an address bus a data bus interrupt lines and several control and support signals National Instruments Corporation 3 1 PC DIO 96 User Manual Theory of Operation Chapter 3 Data Transceivers The data transceivers control the sending and receiving of data to and from the PC I O channel PC I O Channel Control Circuitry The base address used by the board is determined by an onboard switch setting The address on the PC I O channel bus is monitored by the address decoder which is part of the I O channel control circuitry If the address on the bus matches the selected I O base address of the board the board is enabled and the corresponding register on the PC DIO 96 is accessed In addition the I O channel control circuitry monitors and transmits the PC I O channel control and support signals The control signals identify transfers as read or write memory or I O and 8 bit 16 bit or 32 bit transfers The PC DIO 96 uses only 8 bit transfers 82C55A Programmable Peripheral Interface The four 82C55A PPI chips are the heart of the PC DIO 96 Each of these chips has 24 programmable I O pins that represent three 8 bit ports PA PB and PC Each port can be programmed as an input or an output port The 82C55A has three modes of operation simp
37. Level Programming for more information Normally PC3 and or PCO of the 82C55A devices are controlled by the PC DIO 96 User Manual 3 2 National Instruments Corporation Chapter 3 Theory of Operation handshaking circuitry however either of these two lines can be configured for input and used as external interrupts An interrupt occurs on the low to high transition of the signal line Refer to Chapter 4 Register Level Programming Appendix B OKI 82C55A Data Sheet or Appendix C AMD 8253 Data Sheet for more detailed information Digital I O Connector All digital I O is transmitted through a standard 100 pin male connector Pins 49 and 99 are connected to 5 V through a protection fuse F1 This 5 V supply is often required to operate I O module mounting racks Pins 50 and 100 are connected to ground See Chapter 2 Configuration and Installation for additional information National Instruments Corporation 3 3 PC DIO 96 User Manual Chapter 4 Register Level Programming This chapter describes in detail the address and function of each of the PC DIO 96 control and status registers This chapter also includes important information about register level programming the PC DIO 96 The PC DIO 96 is a parallel digital I O board designed around four 82C55A integrated circuits and one 8253 integrated circuit The 82C55A is a general purpose peripheral interface containing 24 programmable I O pins These pins represent the three 8 bit
38. Offset Offset Offset 180 A port A A port B A port C A CNFG PPI PPI PPI PPI for for for for Variable to store data read from a port addresses APORTAoffset APORTBoffset APORTCoffset ACNFGoffset Port Aisa until Wait n input in mode 1 IBFA is set indicating that data Read Port Wait has been loaded in port A the da B until isa n input ta from port A in mode 1 IBFB data 4 14 is set indicating that has been loaded in port B National Instruments Corporation Chapter 4 Register Level Programming Mode 1 Strobed Output The control word written to the CNFG Register to configure port A for output in mode 1 is shown as follows Bits PC4 and PCS of port C can be used as extra input or output lines D7 D6 D5 D4 D3 D2 D1 DO 1 0 X X X oa Port C bits PC4 and PC5 1 input 0 output The control word written to the CNFG Register to configure port B for output in mode 1 is shown as follows Notice that port B does not have extra input or output lines from port C During a mode 1 data write transfer the status of the handshaking lines and interrupt signals can be obtained by reading port C Notice that the bit definitions are different for a write and a read transfer Port C status word bit def
39. PC DIO 96 User Manual Digital I O Board for the IBM PC XT AT September 1995 Edition Part Number 320289B 01 Copyright 1990 1995 National Instruments Corporation All Rights Reserved National Instruments Corporate Headquarters 6504 Bridge Point Parkway Austin TX 78730 5039 512 794 0100 Technical support fax 800 328 2203 512 794 5678 Branch Offices Australia 03 9 879 9422 Austria 0662 45 79 90 0 Belgium 02 757 00 20 Canada Ontario 519 622 9310 Canada Qu bec 514 694 8521 Denmark 45 76 26 00 Finland 90 527 2321 France 1 48 14 24 24 Germany 089 741 31 30 Hong Kong 2645 3186 Italy 02 48301892 Japan 03 5472 2970 Korea 02 596 7456 Mexico 95 800 010 0793 Netherlands 0348 433466 Norway 32 84 84 00 Singapore 2265886 Spain 91 640 0085 Sweden 08 730 49 70 Switzerland 056 200 51 51 Taiwan 02 377 1200 U K 01635 523545 Limited Warranty The PC DIO 96 is warranted against defects in materials and workmanship for a period of one year from the date of shipment as evidenced by receipts or other documentation National Instruments will at its option repair or replace equipment that proves to be defective during the warranty period This warranty includes parts and labor The media on which you receive National Instruments software are warranted not to fail to execute programming instructions due to defects in materials and workmanship for a period of 90 days from date of shipment as evidenced by receipts or o
40. Port A Output Interrupts Setting this bit enables output interrupts from port A of the 82C55A This bit is controlled by setting resetting PC6 5 IBFA Input Buffer for Port A A high setting indicates that data has been loaded into the input latch of port A 4 INTE2 Interrupt Enable Bit for Port A Input Interrupts Setting this bit enables input interrupts from port A of the 82C55A This bit is controlled by setting resetting PC4 3 INTRA Interrupt Request Status for Port A If INTE1 and IBFA are high then this bit is high indicating that an interrupt request is pending for port A input transfers If INTE2 and OBFA are high then this bit is high indicating that an interrupt request is pending for port A output transfers 2 0 VO Input Output These bits can be used for general purpose I O lines if group B is configured for mode 0 If group B is configured for mode 1 refer to the bit explanations shown in the preceding mode 1 sections At the digital I O connector port C has the following pin assignments when in mode 2 Notice that the status of STBA and the status of ACKA are not included in the port C status word Peeri The three port C lines associated with group B function based on the mode selected for group B that is if group B is configured for mode 0 PC2 PCO function as general purpose I O but if group B is configured for mode 1 input or output PC2 PCO function as handshakin
41. RTBoffset 0x01 Offset for PPI A port B define APORTCoffset 0x02 Offset for PPI A port C define ACNFGoffset 0x03 Offset for PPI A CNFG define IREGloffset 0x14 Offset for Interrupt Reg 1 define IREG2offset 0x15 Offset for Interrupt Reg 2 unsigned int porta portb portc cnfg iregl ireg2 char valread Variable to store data read from a port Calculate register addresses porta BASE ADDRESS APORTAoffset portb BASE_ADDRESS APORTBoffset portc BASE ADDRESS APORTCoffset A A A cnfg BASE_ADDRESS ACNFGoffset iregl BASE_ADDRESS IREGloffset ireg2 BASE_ADDRESS IREG2offset EXAMPLE 1 Set up interrupts for mode 1 input for port A Enable the appropriate interrupt bits outp cnfg 0xB0 Port A is an input in mode 1 outp cnfg 0x09 Set PC4 to enable interrupts from 82C55A outp iregl 0x01 Set AIRQO to enable PPI A port A interrupts outp ireg2 0x04 Set INTEN bit t EXAMPLE 2 Set up interrupts for mode 1 input for port B Enable the appropriate interrupt bits outp cnfg 0x86 Port B is an input in mode 1 outp cnfg 0x05 Set PC2 to enable interrupts from 82C55A outp iregl 0x02 Set AIRQ1 to enable PPI A port B interrupts outp ireg2 0x04 Set INTEN bit EXAMPLE 3 Set up interrupts
42. able from Allied Electronics part number 845 2007 or Littelfuse part number 251001 Port C Pin Assignments The signals assigned to port C depend on the mode in which the 82C55A is programmed In mode 0 port C is considered as two 4 bit I O ports In modes 1 and 2 port C is used for status and handshaking signals with zero two or three lines available for general purpose I O The following table summarizes the signal assignments of port C for each programmable mode Consult Chapter 4 Register Level Programming for programming information PC DIO 96 User Manual 2 8 National Instruments Corporation Chapter 2 Configuration and Installation Warning During programming note that each time a port is configured output ports A and C are reset to 0 and output port B is undefined Table 2 3 Port C Signal Assignments Programming Mode Group B Mode 0 Mode 1 Input Mode 1 Output Mode 2 Indicates that the signal is active low Cable Assembly Connectors The cable assembly listed under Optional Equipment in Chapter 1 is an assembly of two 50 pin cables and three connectors Both cables are joined to a single connector on one end and to individual connectors on the free ends The connector that joins the two cables is a 100 pin connector that plugs into the I O connector of the PC DIO 96 The other two connectors are 50 pin connectors one of which is connected to pins 1 through 50 of the PC DIO 96 I O connector and the other
43. ansion boards for the PC computer family These boards are designed for high performance data acquisition and control for applications in laboratory testing production testing and industrial process monitoring and control This manual describes installation theory of operation and basic programming considerations for the PC DIO 96 The example programs included are written in C and assembly language Organization of This Manual The PC DIO 96 User Manual is organized as follows e Chapter 1 Introduction describes the PC DIO 96 lists what you need to get started describes software programming choices optional equipment and custom cables and explains how to unpack the PC DIO 96 e Chapter 2 Configuration and Installation describes the PC DIO 96 jumper configuration installing the PC DIO 96 board in your computer signal connections to the PC DIO 96 board and cabling instructions e Chapter 3 Theory of Operation explains the basic operation of the PC DIO 96 circuitry e Chapter 4 Register Level Programming describes in detail the address and function of each of the PC DIO 96 control and status registers This chapter also includes important information about register level programming the PC DIO 96 e Appendix A Specifications lists the specifications of the PC DIO 96 e Appendix B OKI 82C55A Data Sheet contains the manufacturer data sheet for the OKI 82C55A OKI Semiconductor CMOS programmable peripheral interface This in
44. anual OKI 82C55A Data Sheet Appendix B PC DIO 96 User Manual B 10 National Instruments Corporation Appendix B OKI 82C5S5A Data Sheet National Instruments Corporation B 11 PC DIO 96 User Manual OKI 82C55A Data Sheet Appendix B PC DIO 96 User Manual B 12 National Instruments Corporation Appendix B OKI 82C5S5A Data Sheet National Instruments Corporation B 13 PC DIO 96 User Manual OKI 82C55A Data Sheet Appendix B PC DIO 96 User Manual B 14 National Instruments Corporation Appendix B OKI 82C5S5A Data Sheet National Instruments Corporation B 15 PC DIO 96 User Manual OKI 82C55A Data Sheet Appendix B PC DIO 96 User Manual B 16 National Instruments Corporation Appendix B OKI 82C5S5A Data Sheet National Instruments Corporation B 17 PC DIO 96 User Manual cl Appendix C C1 AMD 8253 Data Sheet This appendix contains the manufacturer data sheet for the AMD 8253 integrated circuit Advanced Micro Devices Inc This circuit is used on the PC DIO 96 board Copyright Advanced Micro Devices Inc 1987 Reprinted with permission of copyright owner All rights reserved Advanced Micro Devices Inc 1987 1988 Data Book MOS Microprocessors and Peripherals National Instruments Corporation C1 PC DIO 96 User Manual AMD 8253 Data Sheet Appendix C PC DIO 96 User Manual C2 National Instruments Corporation Appendix C AMD 8253 Data Sheet National Instruments Corporation C3 PC DIO 96 Use
45. apter 4 Register Level Programming The control word written to the CNFG Register to configure port B for input in mode 1 is shown as follows Notice that port B does not have extra input or output lines from port C During a mode 1 data read transfer the status of the handshaking lines and interrupt signals can be obtained by reading port C The port C status word bit definitions for an input transfer are shown as follows Port C status word bit definitions for input port A and port B D7 D6 D5 D4 D3 D2 D1 DO Bit Name Description 7 6 VO Input Output These bits can be used for general purpose I O when port A is in mode 1 input If these bits are configured for output the port C bit set reset function must be used to manipulate them 5 IBFA Input Buffer for Port A A high setting indicates that data has been loaded into the input latch for port A 4 INTEA Interrupt Enable Bit for Port A Setting this bit enables interrupts from port A of the 82C55A This bit is controlled by setting resetting PC4 3 INTRA Interrupt Request Status for Port A When INTEA and IBFA are high this bit is high indicating that an interrupt request is pending for port A 2 INTEB Interrupt Enable Bit for Port B Setting this bit enables interrupts from port B of the 82C55A This bit is controlled by setting resetting PC2 1 IBFB Input Buffer for Port B A high setting indicates that data has been loaded int
46. ard 24 channel I O module mounting racks such as those manufactured by Opto 22 and Gordos The CB 100 cable termination accessory is available from National Instruments for use with the PC DIO 96 board This kit includes two 50 conductor flat ribbon cables and a connector block Signal input and output wires can be attached to screw terminals on the connector block and are therefore connected to the PC DIO 96 I O connector PC DIO 24 User Manual 1 4 National Instruments Corporation Chapter 1 Introduction The CB 100 is useful for initial prototyping of an application or in situations where PC DIO 96 interconnections are frequently changed Once a final field wiring scheme has been developed however you may want to develop your own cable This section contains information for the design of custom cables The PC DIO 96 I O connector is a 100 pin Centronics style male ribbon cable header connector The manufacturer and the appropriate part number for this connector is as follows e Robinson Nugent part number PS5OE 100P1 SR1 TG The mating connector for the PC DIO 96 is a 100 position polarized Centronics style female ribbon socket connector with strain relief National Instruments uses a polarized keyed connector to prevent inadvertent upside down connection to the PC DIO 96 This 100 pin connector attaches to two 50 pin cables each of which can be connected to a 50 pin connector on the other end The recommended manufacturer
47. as a reference for your current configuration Completing this form accurately before contacting National Instruments for technical support helps our applications engineers answer your questions more efficiently If you are using any National Instruments hardware or software products related to this problem include the configuration forms from their user manuals Include additional pages if necessary Name Company Address Fax __ Phone ___ Computer brand Model Processor Operating system Speed MHz RAM MB Display adapter Mouse yes no Other adapters installed Hard disk capacity MB Brand Instruments used National Instruments hardware product model Revision Configuration National Instruments software product Version Configuration The problem is List any error messages The following steps will reproduce the problem PC DIO 96 Hardware and Software Configuration Form Record the settings and revisions of your hardware and software on the line to the right of each item Complete a new copy of this form each time you revise your software or hardware configuration and use this form as a reference for your current configuration Completing this form accurately before contacting National Instruments for technical support helps our applications engineers answer your questions more efficiently National Instruments Products Data Acquisition Hardware Interrupt Level of Hardware DMA Channels of Hardware
48. ce that bit 7 of the control word is set when programming the mode of operation for each port PC DIO 96 User Manual 4 10 National Instruments Corporation Chapter 4 Register Level Programming Table 4 3 Mode 0 I O Configurations Bit Port A Port C Port B Port C 76543210 10000000 10000001 10000010 10000011 10001000 10001001 10001010 10001011 10010000 10010001 10010010 10010011 10011000 10011001 10011010 10011011 Upper nibble of port C 2 Lower nibble of port C Mode 0 Programming Example The following example shows how to configure PPI A for various combinations of mode 0 input and output This code is strictly an example and is not intended to be used without modification in a practical situation Main define BASE ADDRESS 0x180 Board located at address 180 define APORTAoffset 0x00 Offset for PPI A port A define APORTBoffset 0x01 Offset for PPI A port B define APORTCoffset 0x02 Offset for PPI A port C define ACNFGoffset 0x03 Offset for PPI A CNFG unsigned int porta portb portc cnfg char valread Variable to store data read froma port Calculate register addresses National Instruments Corporation 4 11 PC DIO 96 User Manual Register Level Programming Chapter 4 porta BASE ADDRESS APORTAoffset portb BASE ADDRESS APORTBoffset portc BASE ADDRESS APORTCoffset cnfg
49. connector The PC DIO 96 can be used in a wide range of digital I O applications With the PC DIO 96 any PC can be interfaced to any of the following e Other computers Another PC with a National Instruments PC DIO 96 PC DIO 24 or AT DIO 32F IBM Personal System 2 with a National Instruments MC DIO 24 or MC DIO 32F Macintosh II with a National Instruments NB DIO 24 or NB DIO 32F Any other computer with an 8 bit or 16 bit parallel interface e Centronics compatible printers and plotters e Panel meters e Instruments and test equipment with BCD readouts and or controls e Opto isolated solid state relays and I O module mounting racks Note The PC DIO 96 cannot sink sufficient current to drive the SSR OAC 5 and SSR OAC SA output modules However it can drive the SSR ODC 5 output module and all SSR input modules available from National Instruments If you need to drive a SSR OAC 5 or SSR OAC 5A you can either use a non inverting digital buffer chip between the PC DIO 96 and the SSR backplane or you can use a DIO 23F or MIO Series board with appropriate connections e g SC 205X and cables With the PC DIO 96 a PC can serve as a digital I O system controller for laboratory testing production testing and industrial process monitoring and control Detailed specifications of the PC DIO 96 are in Appendix A Specifications National Instruments Corporation 1 1 PC DIO 24 User Manual Introduction Chapter 1 What You Need
50. e signals This mode divides the ports into two groups group A and group B and includes the following features e Each group contains one 8 bit data port port A or port B and one 4 bit control data port upper or lower nibble of port C e The 8 bit data ports can be either input or output both of which are latched e The 4 bit ports are used for control and status of the 8 bit data ports e Interrupt generation and enable disable functions are available National Instruments Corporation 4 9 PC DIO 96 User Manual Register Level Programming Chapter 4 Mode 2 This mode can be used for communication over a bidirectional 8 bit bus Handshaking signals are used in a manner similar to mode 1 Mode 2 is available for use in group A only port A and the upper nibble of port C Other features of this mode include the following e One 8 bit bidirectional port port A and a 5 bit control status port port C e Latched inputs and outputs e Interrupt generation and enable disable functions Single Bit Set Reset Feature Any of the eight bits of port C can be set or reset with one control word This feature generates control signals for port A and port B when these ports are operating in mode 1 or mode 2 Mode 0 Basic I O Mode 0 can be used for simple I O functions no handshaking for each of the three ports Each port can be assigned as an input or an output port The 16 possible I O configurations are shown in Table 4 3 Noti
51. ed in the preceding section Interrupt Programming Example for the 8253 External signals can be used to interrupt the PC DIO 96 when port A or port B is in mode 0 and the low nibble of port C is configured for input If port A is in mode 0 use PC3 to generate an interrupt if port B is in mode 0 use PCO to generate an interrupt Once you have configured the selected 82C55A you must set the corresponding interrupt enable bit in Interrupt Register 1 If you are using PC3 set xIRQO if you are using PCO set xIRQ1 When the external signal becomes logic high an interrupt request occurs Although the host computer s interrupt monitoring circuitry is triggered by the positive going edge of the interrupt signal the signal must remain high until the interrupt routine has been entered and interrupts have been masked out Make sure your external interrupt signal meets these qualifications To disable the external interrupt clear the appropriate xIRQy bit or clear the INTEN bit PC DIO 96 User Manual 4 28 National Instruments Corporation Appendix A Specifications This appendix lists the specifications of the PC DIO 96 These specifications are typical at 25 C unless otherwise stated The operating temperature range is 0 to 70 C Digital I O Number of channels 0 eee eesseeeceeceeceseeeeeeeeeneeaes 96 I O Compatibility eesin eee ere a ani EEE e TTL Absolute max voltage rating 0 5 to 5
52. eed cea eet eet teii aisa esii ansis Vil Chapter 1 Introduction ini Snel eee ee i 1 1 Abot te PE DIO 06 Ets So sah rcs racic aes a acs te ee ct cr ne 1 1 What You Need to Get Started 59s MR tardes ahaa ckecionddam ten cotati N R 1 2 Software Programming Choices sante nn nn nr tin 1 2 LabVIEW and LabWindows CVI Application Software eecceeeseeeesteeees 1 2 NI DAQ Driver SoftWare aae iaee deaaSeves aiaa 2 e tt nest 1 3 Register Level Programming inner 1 4 OPUONAL QUIPMENT Se iai AG ne en se tn 1 4 Cabling urine nr nn en SR ed nn E delle lies 1 4 Unpacking tonene ii a dde quod eon nn nn a de 1 5 Chapter 2 Configuration and Installation 2 1 SOAS OM OU AON rues opin MR soo ce ae ag eae EEEE 2 1 Base UO Address Settings tan dm nta tonton 2 2 Interrupt Level S lection insistent in E E R a a tiiri 2 5 ITS CAN ALLO I cose ceca ie On ele a a eA E a a tee ne 2 5 Signal CONNEC OMS esinen a E A A ei iaaa 2 6 VO Connector Pin Description ss ssssesesssesessseessesseesseerseesseressressersserssseeessees 2 7 T O Connector Signal Connection Descriptions sssesesesessseesssessersseresseesssees 2 8 Port C Pin ASSIEnMents sidi tenta ne E 2 8 Cable Assembly Connectors ss sssessssssesssesessseesstsseessereseeessseessressresseeesseesseees 2 9 Digital I O Signal Connections SE Ra de La 2 12 Power Connections n e a a a ST ea e aes aloe N 2 13 Timina SpecifieatioiS nesae a r E 2 1
53. erenced to GND Output logic high voltage 3 7 V minimum 5 0 V maximum at Tout 2 5 mA Output logic low voltage 0 0 V minimum 0 4 V maximum at Lout 2 5 mA Output current 4 0 mA minimum at Vo 0 5 V Output current 4 0 mA minimum at Voy 2 7 V Figure 2 7 depicts signal connections for three typical digital I O applications PC DIO 96 User Manual 2 12 National Instruments Corporation Chapter 2 Configuration and Installation PPIA PortA APA lt 3 0 gt gt TTL Signal PPIC Port B CPB lt 7 4 gt A Switch 20 7 1 0 Connector PC DIO 96 Board Figure 2 7 Digital I O Connections In Figure 2 7 PPI A port A is configured for digital output and PPI C port B is configured for digital input Digital input applications include receiving TTL signals and sensing external device states such as the state of the switch in Figure 2 7 Digital output applications include sending TTL signals and driving external devices such as the LED shown in Figure 2 7 Power Connections Pins 49 and 99 of the I O connector are connected to the 5 V supply from the PC power supply These pins are referenced to GND and can be used to power external digital circuitry For more information on these output pins see Output Signals in Appendix A Power rating 0 5 A per pin at 5 V 10 Warning Under no circumstances should
54. ess Assume ds si points to buffer of data Send the data Decrement the loop counter See if we need to loop Ne Ne Ne Ne The port address Loop 64 times Send data A 3 PC DIO 96 User Manual Appendix B OKI 82C55A Data Sheet This appendix contains the manufacturer data sheet for the OKI 82C55A OKI Semiconductor CMOS programmable peripheral interface This interface is used on the PC DIO 96 board Copyright OKI Semiconductor 1993 Reprinted with permission of copyright owner All rights reserved OKI Semiconductor Data Book Microprocessor Seventh Edition March 1993 National Instruments Corporation B 1 PC DIO 96 User Manual OKI 82C55A Data Sheet Appendix B PC DIO 96 User Manual B 2 National Instruments Corporation Appendix B OKI 82C5S5A Data Sheet National Instruments Corporation B 3 PC DIO 96 User Manual OKI 82C55A Data Sheet Appendix B PC DIO 96 User Manual B 4 National Instruments Corporation Appendix B OKI 82C5S5A Data Sheet National Instruments Corporation B 5 PC DIO 96 User Manual OKI 82C55A Data Sheet Appendix B PC DIO 96 User Manual B 6 National Instruments Corporation Appendix B OKI 82C5S5A Data Sheet National Instruments Corporation B 7 PC DIO 96 User Manual OKI 82C55A Data Sheet Appendix B PC DIO 96 User Manual B amp National Instruments Corporation Appendix B OKI 82C5S5A Data Sheet National Instruments Corporation B 9 PC DIO 96 User M
55. et ofs into ax Save address in variable Get seg into ax Save address in variable vector save th ax bp 6 al 7 short slave al 008h short setvec al 068h slave _ack 1 ax ah 35h 21h ax CX CS dx es dx CX short ii O0 bx offset _isr handler short ii exit vect_num al word ptr int_addr 0 bx current vector before writing out new one T LA T Get interrupt level Check to see if it belongs to master or slave interrupt chip Offset for master vector list Go set the vector Offset for slave vector list Flag for slave channel Save vector number for later Get current vector Get previous int_addr in es bx Restore vector number Prep to compare current new vectors See if vector is already there Vector already installed exit Save vector number for remove _isr Save the address word ptr int_addr 2 es ds ds cx dx offset _isr_ handler ah 25h 21h ds LA Save the data segment Copy cx cs into ds ds dx points to new handler Install the handler in the system mask interrupt level in the interrupt controller register and store the original setting of the mask bit for th mov mov shl mov not in jmp and and out jmp in jmp and and out mov cx bp 6 bx 1 bx cl cx bx bx al maskm 2 Gi ad al bl maskm al 2 al masks 2 ch al al bh masks al int_mask cx National Instruments Corporation 4 25 selected
56. evelopment time Optional Equipment National Instruments offers a variety of products to use with your PC DIO 96 board including cables connector blocks and other accessories as follows e Cables and cable assemblies shielded and ribbon e Connector blocks shielded and unshielded 50 pin screw terminals e Signal conditioning eXtensions for Instrumentation SCXI modules and accessories for isolating amplifying exciting and multiplexing signals for relays and analog output With SCXI you can condition and acquire up to 3 072 channels e Low channel count signal conditioning modules boards and accessories including conditioning for strain gauges and RTDs simultaneous sample and hole and relays For more specific information about these products refer to your National Instruments catalog or call the office nearest you Cabling National Instruments offers cables and accessories for you to prototype your application or to use if you frequently change board interconnections The PC DIO 96 can be interfaced to a wide range of printers plotters test instruments I O racks and modules screw terminal panels and almost any device with a parallel interface The PC DIO 96 digital I O connector is a standard 100 pin header connector Adapters for this header connector expand the interface to four 50 pin ribbon cables each of which has the pinout of a PC DIO 24 The pin assignments of the expansion cables are compatible with the stand
57. g lines as shown in the preceding mode 1 sections PC DIO 96 User Manual 4 18 National Instruments Corporation Chapter 4 Register Level Programming Mode 2 Programming Example The following example shows how to configure PPI A for mode 2 input and output and how to use the handshaking signals to control data flow This code is strictly an example and is not intended to be used without modification in a practical situation Main define BASE ADDRESS 0x180 Board located at address 180 define APORTAoffset 0x00 Offset for PPI A port A define APORTBoffset 0x01 Offset for PPI A port B define APORTCoffset 0x02 Offset for PPI A port C define ACNFGoffset 0x03 Offset for PPI A CNFG unsigned int porta portb portc cnfg char valread Variable to store data read from a port Calculate register addresses porta BASE ADDRESS APORTAoffset portb BASE ADDRESS APORTBoffset portc BASE_ADDRESS APORTCoffset cnfg BASE ADDRESS ACNFGoffset EXAMPLE 1 outp cnfg 0xC0 Port A is in mode 2 while inp portc amp 0x80 Wait until OBFA is set indicating that the data last written to port A has been read outp porta 0x67 Write the data to port A while inp portc amp 0x20 Wait until IBFA is set indicating that data is available in port A to be read ay valread
58. his signal Internal Read Signal This signal is the read signal generated from the control lines of the computer s I O expansion bus Internal Write Signal This signal is the write signal generated from the control lines of the computer s I O expansion bus Bidirectional Data Lines at the Specified Port This signal indicates the availability of data on the data lines at a port that is in the output mode If the port is in the input mode this signal indicates when the data on the data lines should be valid PC DIO 96 User Manual 2 14 National Instruments Corporation Chapter 2 Configuration and Installation Mode 1 Input Timing The following figure illustrates the timing specifications for an input transfer in mode 1 Name Description Minimum Maximum TI STB pulse width 100 T2 STB 0 to IBF 1 150 T3 Data before STB 1 20 T4 STB 1 to INTR 1 150 T5 Data after STB 1 50 T6 RD 0 to INTR 0 200 T7 RD 1 to IBF 0 150 All timing values are in nanoseconds National Instruments Corporation 2 15 PC DIO 96 User Manual Configuration and Installation Mode 1 Output Timing Chapter 2 The following figure illustrates the timing specifications for an output transfer in mode 1 Name Description Minimum T1 WR 0 to INTR 0 T2 WR to output T3 WR
59. initions for output port A and port B D7 D6 D5 D4 D3 D2 D1 DO Bit Name Description if OBFA Output Buffer for Port A A low setting indicates that the CPU has written data to port A 6 INTEA Interrupt Enable Bit for Port A Setting this bit enables interrupts from port A of the 82C55A This bit is controlled by setting resetting PC6 5 4 VO Input Output These bits can be used for general purpose I O when port A is in mode 1 output If these bits are configured for output the port C bit set reset function must be used to manipulate them 3 INTRA Interrupt Request Status for Port A When INTEA and OBFA are high this bit is high indicating that an interrupt request is pending for port A National Instruments Corporation 4 15 PC DIO 96 User Manual Register Level Programming Bit 2 Name INTEB OBFB INTRB Chapter 4 Description continued Interrupt Enable Bit for Port B Setting this bit enables interrupts from port B of the 82C55A This bit is controlled by setting resetting PC2 Output Buffer for Port B A low setting indicates that the CPU has written data to port B Interrupt Request Status for Port B When INTEB and OBFB are high this bit is high indicating that an interrupt request is pending for port B At the digital I O connector port C has the following pin assignments when in mode 1 output Notice that the status of ACKA and the status of ACKB are not included when port C i
60. ional Instruments Corporation Chapter 4 mov cx int_mask in al maskm jmp 2 or al cl out maskm al jmp 2 in al masks jmp 2 or al ch out masks al jmp 2 mov al vect_num mov ah 25h lds dx int_addr int 21h restore saved registers ri_exit pop es pop ds pop dx pop Cx pop bx pop ax sti ret _remove_isr endp isr_handler i _isr_handler proc far cli push ax push ds service interrupt F Your code here at _DATA is following s mov mov lds you need no registers y National Instruments Corporation Register Level Programming Get the old mask value Get current lay wait fo in old mask master mask r data tra value Send out new setting Get current lay wait fo lay wait fo in old mask slave r data tra mask r data tra value Send out new setting De OR De De OR De al ds j IN if this was not your interrupt if this was your interrupt the pointer for the data structure to access the structure rb_addr teps ax seg _DATA ds ax si isrb_addr t use ds si ou use 4 27 lay wait fo r data tra holds interrupt level dx stall the old vector jump to ih_0 ns ns ns ns points to new handler fer fer fer fer service it as appropriate isr_block PC DIO 96 User Manual is stored use but be sure to save any the Registe
61. le T O mode 0 strobed I O mode 1 and bidirectional I O mode 2 In modes 1 and 2 the three ports are divided into two groups group A and group B Each group has eight data bits and four control and status bits from port C PC Modes 1 and 2 use handshaking signals from port C to synchronize data transfers Refer to Chapter 4 Register Level Programming or to Appendix B OKI 82CSSA Data Sheet for more detailed information 8253 Programmable Interval Timer The 8253 Programmable Interval Timer is used to generate timed interrupt requests to the host computer The 8253 has three 16 bit counters which can each be used in one of six different modes The PC DIO 96 uses two of the counters to generate interrupt requests the third counter is not used and is not accessible to the user Refer to Chapter 4 Register Level Programming or to Appendix C AMD 8253 Data Sheet for more detailed information Interrupt Control Circuitry The interrupt level used by the PC DIO 96 is selected by the onboard jumper W1 Two software controlled registers determine which devices if any generate interrupts Each of the four 82C55A devices has two interrupt lines PC3 and PCO connected to the interrupt circuitry The 8253 device has two of its three counter outputs connected to the interrupt circuitry Any of these 10 signals can interrupt the host computer if the interrupt circuitry is enabled and the corresponding enable bit is set see Chapter 4 Register
62. n Library a series of functions for using LabWindows CVI with National Instruments DAQ hardware is included with the NI DAQ software kit The LabWindows CVI Data Acquisition libraries are functionally equivalent to the NI DAQ software Using LabVIEW or LabWindows CVI software will greatly reduce the development time for your data acquisition and control application PC DIO 24 User Manual 1 2 National Instruments Corporation Chapter 1 Introduction NI DAQ Driver Software The NI DAQ driver software is included at no charge with all National Instruments DAQ hardware NI DAQ is not packaged with SCXI or accessory products except for the SCXI 1200 NI DAQ has an extensive library of functions that you can call from your application programming environment These functions include routines for analog input A D conversion buffered data acquisition high speed A D conversion analog output D A conversion waveform generation digital I O counter timer operations SCXI RTSI self calibration messaging and acquiring data to extended memory NI DAQ has both high level DAQ I O functions for maximum ease of use and low level DAQ TO functions for maximum flexibility and performance Examples of high level functions are streaming data to disk or acquiring a certain number of data points An example of a low level function is writing directly to registers on the DAQ device NI DAQ does not sacrifice the performance of National Instruments DAQ de
63. ndix D Customer Communication You are now ready to install the PC DIO 96 The following are general installation instructions but consult the user manual or technical reference manual of your personal computer for specific instructions and warnings If you want to install this board in an EISA class computer you can obtain a configuration file for the board by contacting National Instruments 1 Turn off your computer 2 Remove the top cover or access port to the I O channel 3 Remove the expansion slot cover on the back panel of the computer National Instruments Corporation 2 5 PC DIO 96 User Manual Configuration and Installation Chapter 2 4 Insert the PC DIO 96 in an unused 8 bit 16 bit or 32 bit slot It may be a tight fit but do not force the board into place 5 Screw the mounting bracket of the PC DIO 96 to the back panel rail of the computer 6 Check the installation 7 Replace the cover to the computer Note If you have an ISA class computer and you are using a configurable software package such as NI DAQ you may need to reconfigure your software to reflect any changes in jumper or switch settings If you have an EISA class computer you need to update the computer s resource allocation or configuration table by reconfiguring your computer See your computer s user manual for information about updating the configuration table The PC DIO 96 board is now installed and ready for operation Signal Connec
64. nn Q LIES O CICI LES LTO I Er O TLO CI I E Q000000000000000000000000 O000000000000000000000000 CO000COC0O00COC0OO00O0CO000CO0O oo oo oo o Lern en HSH peen obte oferte cirte ol Y loo oo oo un ool lco DO Q O Oo Q Zees 0000000000 o i O679 C ort Figure 2 1 PC DIO 96 Parts Locator Diagram Base I O Address Settings The base I O address for the PC DIO 96 is determined by the switches at position U26 see Figure 2 1 The switches are set at the factory for the I O address hex 180 With this default setting the PC DIO 96 uses the I O address space hex 180 through 19F Note Verify that this space is not already used by other equipment installed in your computer If any equipment in your computer uses this I O address space you must change the base I O address for the PC DIO 96 or for the other device Each switch in U26 corresponds to one of the address lines A9 through A5 Thus the range for possible base I O address settings is hex 000 through 3E0 Base I O address values hex 000 through OFF are reserved for system use Base I O values hex 100 through 3FF are available on the I O channel A4 A3 A2 Al and AO are used by the PC DIO 96 to decode accesses to the PC DIO 96 User Manual 2 2 National Instruments Corporation Chapter
65. ntil OBFB is set indicating that the data last written to port B has been read outp portb 0x34 Write the data to port B Mode 2 Bidirectional Bus Mode 2 has an 8 bit bus that can transfer both input and output data without changing the configuration The data transfers are synchronized with handshaking lines in port C This mode uses only port A however port B can be used in either mode 0 or mode 1 while port A is configured for mode 2 The control word written to the CNFG Register to configure port A as a bidirectional data bus in mode 2 is shown as follows If port B is configured for mode 0 then PC2 PC1 and PCO of port C can be used as extra input or output lines D7 D6 D5 D4 D3 D2 D1 DO 1 0 ia Port C PC2 PCO 1 input 0 output Port B 1 input 0 output Group B Mode 0 mode 0 1 mode 1 During a mode 2 data transfer the status of the handshaking lines and interrupt signals can be obtained by reading port C The port C status word bit definitions for a mode 2 transfer are shown as follows National Instruments Corporation 4 17 PC DIO 96 User Manual Register Level Programming Chapter 4 Port C status word bit definitions for bidirectional data path port A only D7 D6 DS D4 D3 D2 D1 DO Bit Name Description 7 OBFA Output Buffer for Port A A low setting indicates that the CPU has written data to port A 6 INTE1 Interrupt Enable Bit for
66. o the input latch for port B 0 INTRB Interrupt Request Status for Port B When INTEB and IBFB are high this bit is high indicating that an interrupt request is pending for port B National Instruments Corporation 4 13 PC DIO 96 User Manual Register Level Programming Chapter 4 At the digital I O connector port C has the following pin assignments when in mode 1 input Notice that the status of STBA and the status of STBB are not included in the port C status word Mode 1 Input Programming Example The following example shows how to configure PPI A for various combinations of mode 1 input This code is strictly an example and is not intended to be used without modification in a practical situation Main define BASE_ADDRESS define APORTAoffset define APORTBoffset define APORTCoffset define ACNFGoffset unsigned int porta char valread Calculate register porta BASE_ADDRESS 4 portb BASE ADDRESS 4 portc BASE ADDRESS cnfg BASE ADDRESS EXAMPLE 1 port A input outp cnfg 0xBO while inp portc amp 0x20 valread inp porta EXAMPLE 2 Port B input outp cnfg 0x86 while inp portc amp 0x02 valread inp portb PC DIO 96 User Manual portb portc 0x180 0x00 0x01 0x02 0x03 cnfg Board located at address Offset
67. omments taken from program code NI DAQ is used throughout this manual to refer to the NI DAQ software for PC computers unless otherwise noted OKI 82C55A refers to the OKI 82C55A OKI Semiconductor CMOS programmable peripheral interface PC refers to the IBM PC XT the IBM PC AT and compatible computers as well as EISA personal computers PPI x where the x is replaced by A B C or D refers to one of the four programmable peripheral interface PPI chips on the PC DIO 96 SCXI stands for Signal Conditioning eXtensions for Instrumentation and is a National Instruments product line designed to perform front end signal conditioning for National Instruments plug in DAQ boards Angle brackets containing numbers separated by an ellipses represent a range signal or port for example ACH lt 0 7 gt stands for ACHO through ACH7 Abbreviations acronyms metric prefixes mnemonics and symbols are listed in the Glossary PC DIO 96 User Manual x National Instruments Corporation Preface National Instruments Documentation The PC DIO 96 User Manual is one piece of the documentation set for your data acquisition DAQ system You could have any of several types of manuals depending on the hardware and software in your system Use the different types of manuals you have as follows e Getting Started with SCXI TIf you are using SCXI this is the first manual you should read It gives an overview of the SCXI system and contains
68. ple for the 8253 An in depth example of handling interrupts generated by the 8253 is presented as follows The main program is presented in C while sample interrupt routines are presented in assembly language Main define BASE_ADDRESS 0x180 Board located at address 180 define CTROoffset 0x10 Offset for counter 0 define CTRloffset 0x11 Offset for counter 1 define CTRCNFGoffset 0x13 Offset for 8253 CNFG x define IREGloffset 0x14 Offset for Interrupt Reg 1 define IREG2offset 0x15 Offset for Interrupt Reg 2 define channel 5 Interrupt channel on W1 define use_ctr1 0 0 for ctr0 1 for ctrl define ctr0_ data 10000 Pulse every 5 msec define ctrl_data 1000 Pulse every 5 sec unsigned int ctr0O ctrl cnfg iregl ireg2 Calculate register addresses ctrO BASE ADDRESS CTROoffset ctrl BASE ADDRESS CTRloffset cnfg BASE ADDRESS CTRCNFGoffset iregl BASE ADDRESS IREGloffset ireg2 BASE_ADDRESS IREG2offset Disable interrupts outp ireg1 0x00 Disable all 82C55A interrupts outp ireg2 0x00 Disable counter interrupts hia Set up the counter modes do not write out the counter load values at this time as this starts the counter outp cnfg 0x34 Set counter 0 to mode 2 if use_ctrl outp cnfg 0x74 Set counter 1 to mode 2 outp ireg2 0x07
69. pt level that is to be modified National Instruments Corporation 4 23 PC DIO 96 User Manual Register Level Programming 7 void on input the isr_handler Chapter 4 isr_block points to the data structure that will be used by the isr_handler function isr_handler void gt void remove_isr void public _install_isr _isr_handler _DATA segment word public DATA declarations ackm equ 00020h acks equ 000a0h eoi equ 00020h maskm equ 00021h masks equ 000a1h int_addr dd 0 int_mask dw 0 isrb_addr dd 0 slave _ack db 0 vect_num db 0 _DATA ends _TEXT segment word public CODE assume cs _TEXT ss _TEXT install_isr bp reg at bp 0 ret addr ofs at bp 2 ret addr seg at bp 4 level at bp 6 isr_ block ofs at bp 8 isr_ block seg at bp 10 _install_isr proc far cli push bp mov bp sp push ax push bx push CX push dx push ds push es mov ax seg _DATA mov ds ax function will never b called from C _remove_isr ds _DATA save the pointer for the isr_block structure used in isr_handler PC DIO 96 User Manual 4 24 National Instruments Corporation Chapter 4 mov mov mov mov set interrupt slave setvec pls ee Obed Ov mp a dd mp u wua QnA g mov mov push mov mov mov int pop ax bp 8 word ptr isrb_addr 0 ax ax bp 10 word ptr isrb_addr 2 ax Register Level Programming G
70. r Level Programming Chapter 4 acknowledge the interrupt iA Os mov ax seg _DATA mov ds ax mov al eoi Signify end of interrupt cmp slave_ack 0 See if we need to acknowledge slave je short ih_l Jump if not out acks al Send slave acknowledge jmp 2 Delay wait for data transfer DRE out ackm al Send master acknowledge restore saved registers pop ds pop ax sti iret _isr_handler endp _ TEXT ends end Interrupt Handling The INTEN bit of Interrupt Register 2 must be set to enable interrupts from the PC DIO 96 This bit must first be cleared to disable unwanted interrupts After all sources of interrupts have been disabled or placed in an inactive state you can set INTEN To interrupt the host computer using one of the 82C55A devices program the selected 82C55A for the I O mode desired In mode 1 set either the INTEA or the INTEB bit to enable interrupts from port A or port B respectively In mode 2 set either INTE or INTE2 for interrupts on output or input transfers respectively The INTE1 and INTE2 interrupt outputs are cascaded into a single interrupt output for port A After interrupts have been enabled from the 82C55A set the appropriate enable bit for the selected 82C55A for example if you selected both mode 2 interrupts for PPI C you would set CIRQO in order to interrupt the host computer To interrupt the host computer using one of the 8253 counter outputs program the counter s as describ
71. r Manual AMD 8253 Data Sheet Appendix C PC DIO 96 User Manual C4 National Instruments Corporation Appendix C AMD 8253 Data Sheet National Instruments Corporation C5 PC DIO 96 User Manual AMD 8253 Data Sheet Appendix C PC DIO 96 User Manual C6 National Instruments Corporation Appendix C AMD 8253 Data Sheet National Instruments Corporation C7 PC DIO 96 User Manual AMD 8253 Data Sheet Appendix C PC DIO 96 User Manual CS National Instruments Corporation Appendix C AMD 8253 Data Sheet National Instruments Corporation C9 PC DIO 96 User Manual AMD 8253 Data Sheet Appendix C PC DIO 96 User Manual C 10 National Instruments Corporation Appendix C AMD 8253 Data Sheet National Instruments Corporation C 11 PC DIO 96 User Manual AMD 8253 Data Sheet Appendix C PC DIO 96 User Manual C 12 National Instruments Corporation Appendix C AMD 8253 Data Sheet National Instruments Corporation C 13 PC DIO 96 User Manual AMD 8253 Data Sheet Appendix C PC DIO 96 User Manual C 14 National Instruments Corporation Appendix D Customer Communication For your convenience this appendix contains forms to help you gather the information necessary to help us solve technical problems you might have as well as a form you can use to comment on the product documentation Filling out a copy of the Technical Support Form before contacting National Instruments helps us help you better and faster National Ins
72. ramming Considerations for the 8253 sic sscecvacsssascnessasesanastesanccosncsisessbcdecaneesenee 4 21 General Informati n assa a Me a ian i isoa iNNi 4 21 Interrupt Programming Example for the 8253 ooo eee eeeeeeeeeeeneeeneeeneeteees 4 22 ICE el aS asco RSR a a Re ee setae 4 28 Appendix A SD CHICALIOTIS 95 8 innin haen oh ae etl ae ete tan a aoe A 1 Appendix B OKI 82C55A Data Sheet sia enr auiiiiod maaan B 1 Appendix C AMD 8253 Data SHCCC fs closes cd RL nn Rs nn ce CA C 1 Appendix D Customer Communication D 1 Glossary eu ee SL CD SO PCE ORO ROPE MEADE ne ERE AOR PORE Glossary 1 WN ON os cutter Men nee dede Re ee E E Index 1 PC DIO 96 User Manual vi National Instruments Corporation Contents Figures Figure 1 1 The Relationship between the Programming Environment NI DAQ and Your HardWare sae she ass vse eee Oe ease dena dene Se Ae Ca REE 1 3 Figure 2 1 PC DIO 96 Parts Locator Diagramme ining gndindnndk 2 2 Figure 2 2 Example Base I O Address Switch Settings 2 3 Figure 2 3 Interrupt Jumper Setting for IRQS Factory Setting eee eeeeeeeeeeeeeeneees 2 5 Figure 2 4 Digital I O Connector Pin Assignments 0 0 0 0 ee ceeseeeseceseceeeeeeaeeceeeneenseeeeneees 2 7 Figure 2 5 Cable Assembly Connector Pinout for Pins 1 through 50 secese 2 10 Figure 2 6 Cable Assembly Connector Pinout for Pins 51 through 100 eee 2 11 Figure 2 7 Digital I O Connections i2 25secc
73. s read Mode 1 Output Programming Example The following example shows how to configure PPI A for various combinations of mode 1 output This code is strictly an example and is not intended to be used without modification in a practical situation Main define BASE_ADDRESS define define define define APORTAoffset APORTBoffset APORTCoffset ACNFGoffset unsigned int porta char valread Calculate register porta BASE_ADDRESS portb BASE ADDRESS portc BASE_ADDRESS cnfg BASE_ADDRESS EXAMPLI PC DIO 96 User Manual 0x180 Board located at address 180 0x00 Offset for PPI A port A 0x01 Offset for PPI A port B 0x02 Offset for PPI A port C 0x03 Offset for PPI A CNFG portb porten cnfg Variable to store data read from a port addresses APORTAoffset APORTBoffset APORTCoffset ACNFGoffset E 1 port A output 4 16 National Instruments Corporation Chapter 4 Register Level Programming outp cnfg 0xA0 Port A is an output in mode 1 while inp portc amp 0x80 Wait until OBFA is set indicating that the data last written to port A has been read outp porta 0x12 Write data to port A EXAMPLE 2 port B output outp cnfg 0x84 Port B is an output in mode 1 while inp portc amp 0x02 Wait u
74. s titan ala niin lie an detente 2 13 Figure 3 1 PC DIO 96 Block Diagram 246 64 224 eck CA RSG 3 1 Figure 4 1 Control Word Formats for the 82C55A oo eeceseeesseceeeeeseeeeseecaeenseenseeeeneees 4 3 Figure 4 2 Control Word Format for the 8253 oo eee eeeeceesseeesseceseeeseeesseecsaeceseesseeeeneees 4 4 Tables Table 2 1 PC DIO 96 Factory Set Switch and Jumper Settings 20 0 0 eeeeeeseeetteeeeees 2 1 Table 2 2 Switch Settings with Corresponding Base I O Address and Base TO Address Space sacdan nt TE en ne 2 4 Table 2 3 Port C Signal Assignments esis nes cadens hs es nn le ne anne cn edf 2 9 Table 4 1 PC DIO 96 Address Maps Re terres 4 2 Table 4 2 Port C Set Reset Control Words men ieee eddie 4 4 Table 4 3 Mode 0 I O Configurations 25 54 4 11 Table A 1 Maximum Average Transfer Rates for the PC DIO 96 0 00 eee eeeeeeereees A 3 National Instruments Corporation vii PC DIO 96 User Manual About This Manual This manual describes the mechanical and electrical aspects of the PC DIO 96 and contains information concerning its operation and programming The PC DIO 96 is a 96 bit parallel digital I O interface designed around four OKI Semiconductor OKI 82C55A programmable peripheral interface PPI chips The PC DIO 96 also includes an Advanced Micro Devices AMD 8253 counter timer which can be used to send periodic interrupts to the host system The PC DIO 96 is a member of the National Instruments PC Series of PC I O Channel exp
75. seseaes 4 1 Introductionis se le ne a ne es ne tn tin 4 Resister IV Lea eal dye Sy use Nm EE D E nn eset anak 4 2 Register D SCHPUONSS ea RS stacey Se en a ia 4 3 Register Description for the 82C55A ss 4 3 Register Description for the 8253 nine nn nr te nt terne see 4 4 Register Description for the Interrupt Control Registers eee eeeeeseeeeeeeeeee 4 5 Interrupt Control Register 1 1x tance tannins ti 4 6 Interrupt Control Register 2 issues dhseielessnenssse 4 8 Programming Considerations for the 82C55A oo ceeeesceessecsseceeeeeeseeceaeceaeeeseeeeneessaeenes 4 9 Modes of Operation for the S2C5 5A 2 nn ann nt nur asian 4 9 Mods ei aie a ah ROR aa GR Neh atl oleic 4 9 INGE Sees des oat aca RE Ge le ae as Mecca 4 9 Mode Figs let teeta desea tie etn A tS Manon ns 4 10 Single Bit Set Reset Feature ent nt ain tnt 4 10 Mode 0 Basie lo puted be ie teh Buenas Nate eee 4 10 Mode 0 Programming Example eccceeesceceecceceeeeeceneeeenteeeenaeeeenas 4 11 Mode 1 Strobed Input neineanien dentiste 4 12 Mode 1 Input Programming Example cceeeccecesceeeeeeceeeteeeeneeeenes 4 14 Mode 1 Strobed Output rss sesiis esini aiii esis 4 15 Mode 1 Output Programming Example cee eeeeeseeseceeeeeeeeeeneees 4 16 Mode 2 Bidirectionial Bus ic 2cciciieecdienl eek oiesnieeliiesteesteaiee 4 17 Mode 2 Programming Example 23e 4 19 Interrupt Programming Examples for the 82C55A seseeseseerresreererersrrererreess 4 19 Prog
76. terface is used on the PC DIO 96 board e Appendix C AMD 8253 Data Sheet contains the manufacturer data sheet for the AMD 8253 integrated circuit This circuit is used on the PC DIO 96 board e Appendix D Customer Communication contains forms you can use to request help from National Instruments or to comment on our products National Instruments Corporation ix PC DIO 96 User Manual Preface e The Glossary contains an alphabetical list and description of terms used in this manual including abbreviations acronyms metric prefixes mnemonics symbols and terms e The Index alphabetically lists the topics in this manual including the page where you can find each one Conventions Used in This Manual The following conventions are used in this manual bold bold italic italic monospace NI DAQ OKI 82C55A PC PPI x SCXI lt gt Bold text denotes menus menu items or dialog box buttons or options Bold italic text denotes a note caution or warning Italic text denotes emphasis a cross reference or an introduction to a key concept Lowercase text in this font denotes text or characters that are to be literally input from the keyboard sections of code programming examples and syntax examples This font is also used for the proper names of disk drives paths directories programs subprograms subroutines device names functions variables filenames and extensions and for statements and c
77. ther documentation National Instruments will at its option repair or replace software media that do not execute programming instructions if National Instruments receives notice of such defects during the warranty period National Instruments does not warrant that the operation of the software shall be uninterrupted or error free A Return Material Authorization RMA number must be obtained from the factory and clearly marked on the outside of the package before any equipment will be accepted for warranty work National Instruments will pay the shipping costs of returning to the owner parts which are covered by warranty National Instruments believes that the information in this manual is accurate The document has been carefully reviewed for technical accuracy In the event that technical or typographical errors exist National Instruments reserves the right to make changes to subsequent editions of this document without prior notice to holders of this edition The reader should consult National Instruments if errors are suspected In no event shall National Instruments be liable for any damages arising out of or related to this document or the information contained in it EXCEPT AS SPECIFIED HEREIN NATIONAL INSTRUMENTS MAKES NO WARRANTIES EXPRESS OR IMPLIED AND SPECIFICALLY DISCLAIMS ANY WARRANTY OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE CUSTOMER S RIGHT TO RECOVER DAMAGES CAUSED BY FAULT OR NEGLIGENCE ON THE PART OF NATIONAL INSTRUM
78. tions This section includes specifications and connection instructions for the signals given on the PC DIO 96 I O connector Warning Connections that exceed any of the maximum ratings of input or output signals on the PC DIO 96 may result in damage to the PC DIO 96 board and to the PC Maximum input ratings for each signal are given in this chapter under the discussion of that signal National Instruments is NOT liable for any damages resulting from any such signal connections PC DIO 96 User Manual 2 6 National Instruments Corporation Chapter 2 Configuration and Installation T O Connector Pin Description Figure 2 4 shows the pin assignments for the PC DIO 96 digital I O connector III B W P Figure 2 4 Digital I O Connector Pin Assignments National Instruments Corporation 2 7 PC DIO 96 User Manual Configuration and Installation Chapter 2 T O Connector Signal Connection Descriptions Signal Name Description 1 3 5 7 9 11 13 APC lt 7 0 gt Bidirectional Data Lines for Port C of PPI A APC7 is the 15 MSB APCO the LSB 17 19 21 23 25 APB lt 7 0 gt Bidirectional Data Lines for Port B of PPI A APB7 is the 27 29 31 MSB APBO the LSB 33 35 37 39 41 APA lt 7 0 gt Bidirectional Data Lines for Port A of PPI A APA7 is the 43 45 47 MSB AP
79. truments provides comprehensive technical assistance around the world In the U S and Canada applications engineers are available Monday through Friday from 8 00 a m to 6 00 p m central time In other countries contact the nearest branch office You may fax questions to us at any time Corporate Headquarters 512 795 8248 Technical support fax Branch Offices Australia Austria Belgium Canada Ontario Canada Quebec Denmark Finland France Germany Hong Kong Italy Japan Korea Mexico Netherlands Norway Singapore Spain Sweden Switzerland Taiwan U K 800 328 2203 512 794 5678 Phone Number 03 9 879 9422 0662 45 79 90 0 02 757 00 20 519 622 9310 514 694 8521 45 76 26 00 90 527 2321 1 48 14 24 24 089 741 31 30 2645 3186 02 48301892 03 5472 2970 02 596 7456 95 800 010 0793 0348 433466 32 84 84 00 2265886 91 640 0085 08 730 49 70 056 200 51 51 02 377 1200 01635 523545 National Instruments Corporation Fax Number 03 9 879 9179 0662 45 79 90 19 02 757 03 11 519 622 9311 514 694 4399 45767111 90 502 2930 1 48 14 24 14 089 714 60 35 2686 8505 02 48301915 03 5472 2977 02 596 7455 5 520 3282 0348 430673 32 84 86 00 2265887 91 640 0533 08 730 43 70 056 200 51 55 02 737 4644 01635 523154 PC DIO 96 User Manual Technical Support Form Photocopy this form and update it each time you make changes to your software or hardware and use the completed copy of this form
80. u are using SCXI read these manuals for maintenance information on the chassis and installation instructions Related Documentation The following document contains information that you may find helpful as you read this manual e IBM Personal Computer XT Technical Reference manual Customer Communication National Instruments wants to receive your comments on our products and manuals We are interested in the applications you develop with our products and we want to help if you have problems with them To make it easy for you to contact us this manual contains comment and configuration forms for you to complete These forms are in Appendix D Customer Communication at the end of this manual National Instruments Corporation xi PC DIO 96 User Manual Chapter 1 Introduction This chapter describes the PC DIO 96 lists what you need to get started describes software programming choices optional equipment and custom cables and explains how to unpack the PC DIO 96 About the PC DIO 96 Thank you for purchasing the National Instruments PC DIO 96 The PC DIO 96 is a 96 bit parallel digital I O interface for the PC Four 82C55A PPI chips control the 96 bits of digital V O The 82C55A can operate in either a unidirectional or bidirectional mode and can generate interrupt requests to the host computer The 82C55A can be programmed for almost any 8 bit or 16 bit digital I O application All digital I O is through a standard 100 pin male
81. ual Chapter 2 Configuration and Installation This chapter describes the PC DIO 96 jumper configurations installing the PC DIO 96 board in your computer signal connections to the PC DIO 96 board and cabling instructions Board Configuration The PC DIO 96 contains one DIP switch and one jumper to configure the base I O address and interrupts respectively The DIP switch and jumper are shown in the parts locator diagram in Figure 2 1 The PC DIO 96 is configured at the factory to a base I O address of hex 180 and to interrupt level 5 These settings shown in Table 2 1 are suitable for most systems However if your system has other hardware at this base I O address or interrupt level you need to change these settings on the PC DIO 96 as described in the following pages or on the other hardware Record your settings in the PC DIO 96 Hardware and Software Configuration Form in Appendix D Customer Communication Table 2 1 PC DIO 96 Factory Set Switch and Jumper Settings Base I O Address Hex 180 factory setting AQ A8 A7 A6 A5 The black side indicates the side of the switch that is pushed down Interrupt Level Interrupt level 5 selected W1 Row 5 factory setting National Instruments Corporation 2 1 PC DIO 96 User Manual Configuration and Installation Chapter 2 NATIONAL INSTRUMENTS CORP PC DIO 96 19 ASSY181170 01 REU B S N 00000000 0000000000 000000000 f o c3 o vos O0000000000000000000 O
82. unter 1 outp cnfg 0x30 Turn off counter 0 outp ireg2 0x00 Disable PC DIO 96 interrupts After you have deactivated interrupts you must remove your interrupt service routine before exiting your program do this now remove_isr at Sample code for the functions install_isr and remove_isr is presented as follows Be sure to pass a 32 bit structure pointer to the install_isr function because the main program s data will probably be stored in a different memory segment than the one where the interrupt functions are located In addition if you call the installation function from a language besides C make sure the parameters are passed in the proper order C pushes parameters on the stack from right to left but most other languages most notably Pascal push parameters from left to right Finally be sure to make the calls to the functions using 32 bit addresses because all of the code assumes data is offset with respect to a 32 bit return address The code can be modified to use 16 bit addresses by changing far to near and decrementing all references to the base page register bp by two in install_isr and remove_isr only Do not modify isr_handler assemble this file with the following command masm MX filename MX preserves case sensitivity function prototypes void install_isr int level isr_block_type far isr_block gt on input level indicates the interru
83. vices because it lets multiple devices operate at their peak performance NI DAQ also internally addresses many of the complex issues between the computer and the DAQ hardware such as programming interrupts and DMA controllers NI DAQ maintains a consistent software interface among its different versions so that you can change platforms with minimal modifications to your code Figure 1 1 illustrates the relationship between NI DAQ and LabVIEW and LabWindows CVI Conventional Programming LabVIEW LabWindows CVI Environment PC Macintosh or PC or Sun PC Macintosh or Sun SPARCstation SPARCstation Sun SPARCstation NI DAQ Driver Software DAQ or Personal Computer or SCXI Hardware Workstation Figure 1 1 The Relationship between the Programming Environment NI DAQ and Your Hardware National Instruments Corporation 1 3 PC DIO 24 User Manual Introduction Chapter 1 Register Level Programming The final option for programming any National Instruments DAQ hardware is to write register level software Writing register level programming software can be very time consuming and inefficient and is not recommended for most users Even if you are an experienced register level programmer consider using NI DAQ LabVIEW or LabWindows CVI to program your National Instruments DAQ hardware Using the NI DAQ LabVIEW or LabWindows CVI software is easier than and as flexible as register level programming and can save weeks of d

National Instruments PC-DIO-96 User's Manual

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