Fujitsu MB39A104 User's Manual
Contents
1. Continued Switching Wave Form CH1 15 Ta 25 C VIN 12 V 10 CTL 5V Vo 5V 5 RL 1 67 0 Vs V lt gt EEE EEE EEE EEE EEE EE EEE 10 5 0 1 0 1 2 3 4 5 6 7 8 9 10 t us Switching Wave Form CH2 Vom FET A OE 15 Ta 25 C VIN 12 V 10 CTL 5V 1 Vo 3 3V 5 RL 1 10 Vs V lla lll ll H 10 5 0 I 0 1 2 3 4 5 6 7 8 9 10 t us 33 MB39A104 USAGE PRECAUTION 9 Printed circuit board ground lines should be set up with consideration for common impedance e Take appropriate static electricity measures Containers for semiconductor materials should have anti static protection or be made of conductive material After mounting printed circuit boards should be stored and shipped in conductive bags or containers Work platforms tools and instruments should be properly grounded Working personnel should be grounded with resistance of 250 kQ to 1 MQ between body and ground e Do not apply negative voltages The use of negative voltages below 0 3 V may create parasitic transistors on LSI lines which can cause abnormal operation ORDERING INFORMATION Partnumber number o O Package 24 EB seg iesic sse rand 34 MB39A104 gt gt gt gt gt mM PACKAGE DIMENSIONS Note 1 24 pin plastic SSOP Note 2 FPT 24P M03 Note 3 Note 42. Power supply current Icc mA 5 10 15 Power supply voltage Vcc V 20 Reference Voltage vs Ambient Temperature 10 Ta 25 C VCC 12V Se rot 5 s gt 6 o D Q 4 6 o 2 g o 0 10 15 20 25 30 35 5 Ambient temperature Ta C CTL terminal Current vs CTL terminal Voltage 500 T 10 Ta 25 C lt VCC 12V 79 gt 400 VREF 0 8 5 7 E 300 6 9 g VREF bo 5 3 200 4 o ICTL 3 E 100 2 i E oc 0 5 10 15 20 CTL terminal voltage Vcr V Reference voltage AVner 96 Reference Voltage vs Power Supply Voltage 10 _ Ta 25 C 2 CTL 5V u 8 VREF 0 UI gt 6 gt o 4 O c 8 2 0 0 5 10 15 20 Power supply voltage Vcc V Reference Voltage vs Ambient Temperature 2 0 VCC 12V 1 5 CTL 5V VREF 0 1 0 0 5 0 0 0 5 1 0 1 5 2 0 40 20 0 20 40 60 80 100 Ambient temperature Ta C Continued 5 39 104 Triangular Wave Oscillation Frequency vs Timing Resistor 10000 Ta 425 C VCC 12V CTL 5V 1000 100 CT
3. Triangular wave oscillation frequency fosc KHz 10 1 10 100 Timing resistor Rr kQ 1000 Triangular Wave Upper and Lower Limit Voltage vs Triangular Wave Oscillation Frequency 3 2 2 3 0 Ion 5 5 2 8 gt 2 6 2 o 20 2 4 g amp 2 2 SZ 20 SE 52 1 8 SS 16 Bs 8 1 4 1 2 0 200 400 600 800 1000 1200 1400 1600 Triangular wave oscillation frequency fosc kHz Triangular Wave Oscillation Frequency vs Ambient Temperature 560 7 5 VCC 12V 2 CTL 5V E N 540 RT 24 kQ E T CT 100 pF Oo 520 a 2 SE 33 2 o 480 eo GU E 460 440 40 20 0 20 40 60 80 100 Ambient temperature Ta C Triangular Wave Oscillation Frequency vs Timing Capacitor 10909 Ta 25 C S VCC 12 V 2 CTL 5V UN SE GE 1000 O o 9 8 S R 11 kQ S 9 100 RT 24 ko gt 55 RT 130 KO RT 68 KO o9 ce K 10 10 100 1000 10001 Timing capacitor Cr pF Triangular Wave Upper and Lower Limit Voltage vs Ambient Temperature 3 2 r VCC 12V eo 30fCTL 5V G 28 Dm t 5 T 1 RS 26 p Upper S 24 L ds GO gt 20 GE 18 Lower 2 1 6 E D D E a 3 1 4 ET 12 40 20 0 20 40 60 80
4. 22 46 CH1 MB39A104 Smoothing Capacitor The smoothing capacitor is an indispensable element for reducing ripple voltage in output In selecting a smooth ing capacitor it is essential to consider equivalent series resistance ESR and allowable ripple current Higher ESR means higher ripple voltage so that to reduce ripple voltage it is necessary to select a capacitor with low ESR However the use of a capacitor with low ESR can have substantial effects on loop phase characteristics and therefore requires attention to system stability Care should also be taken to use a capacity with sufficient margin for allowable ripple current This application uses the OS CON 6SVP82M made by Sanyo The ESR capacitance value and ripple current can be calculated from the following formulas Equivalent Series Resistance ESR AVo 1 ESR lt ai gt 6 Capacitance value CL gt 2mf AVo ALXESR Ripple current IC rms Vin Vo ton 2V3L IC rms gt Example Using the 6SVP82M Rated voltage 6 3 V ESR 50 mQ maximum allowable ripple current 1570 mArms Equivalent series resistance CH1 AVo 1 ESRUS 276 0 050 1 70491 2n x 500 x 103 x 82 x 10 5 lt 98 0 mQ MB39A104 CH2 AVo 1 ESO ZE 0 033 1 0 364 x 500 x 10 x 82 x 1075 lt 86 8 ma Capacitance value CH1 CL gt Alt Pri AVo Al x ESR 0 491 2nx500x10 x 0 050 0 491
5. DC Continued Continued 8 Error amplifier bolck Parameter Frequency bandwidth Symbol Pin No MB39A104 VCC VCCO 12 V VREF 0 mA Ta 25 C Conditions Output voltage Error Ampi Error Amp2 Output source current SOURCE FB1 FB2 2V Output sink current Isink FB1 FB2 2V block PWM Comp 1 PWM Comp 2 Threshold voltage Vro Duty cycle 0 Duty cycle Dtr Input current DTC1 DTC2 0 4 V block OCP1 OCP2 ILIM terminal input current RT 24 KQ CT 100 pF Offset voltage 11 Bias 10 Overcurrent 9 PWM comparator voltage protection circuit block VH 12 Output block Drive1 Drive2 Output voltage Output source current IsouRCE VCC VCCO 7 V to 19V VH 0 to 30 mA OUT1 to OUT4 7 V Duty lt 5 t 1 foscxDuty Output sink current OUT1 to OUT4 12 V Duty lt 5 0 1 foscxDuty Output ON resistor OUT1 OUT2 45 mA OUT1 OUT2 45 13 Control block CTL CTL input voltage IC Active mode IC Standby mode Input current CTL 5V CTL 0V Standby current CTL 0V Power supply current 14 General Standard design value CTL 5V MB39A104 TYPICAL CHARACTERISTICS Power Supply Current vs Power Supply Voltage 10 Ta 25 C CTL 5V
6. 17 75 0 10 305 004 D Y 25 600 10 7 60 0 20 2204 004 299 008 INDEX 1 Resin protrusion Each side 0 15 006 MAX 2 These dimensions do not include resin protrusion Pins width and pins thickness include plating thickness Pins width do not include tie bar cutting remainder J 0 65 026 0 08 02400 516 131005 009 203 2003 FUJITSU LIMITED F240185 c 4 5 10 10 004 0 17 0 03 007 001 Details of A part 1 25 010 Mounting height 049 004 0 25 010 SH 0 50 0 20 0 10 0 10 020 008 004 004 0 60 0 15 Stand off 024 006 Dimensions in mm inches Note The values in parentheses are reference values MB39A104 FUJITSU LIMITED All Rights Reserved The contents of this document are subject to change without notice Customers are advised to consult with FUJITSU sales representatives before ordering The information such as descriptions of function and application circuit examples in this document are presented solely for the purpose of reference to show examples of operations and uses of
7. Triangular oscillation frequency fosc 1200000 Cr pF eRr kO fosc KHz 13 MB39A104 SETTING THE SOFT START AND DISCHARGE TIMES To prevent rush currents when the IC is turned on you can set a soft start by connecting soft start capacitors Cs and 52 to the CS1 terminal pin 11 for channel 1 and the CS2 terminal pin 14 for channel 2 respectively When CTL terminal pin 24 goes to H level and IC starts Vcc gt UVLO threshold voltage the external soft start capacitors Cs and Cs connected to CS1 and CS2 terminals are charged at 10 uA The error amplifier output FB1 pin 9 FB2 pin 16 is determined by comparison between the lower one of the potentials at two non inverted input terminals 1 24 V CS1 terminal voltages and the inverted input terminal voltage INE1 pin 10 voltage INE2 pin 15 voltage The FB1 FB2 terminal voltage is decided for the soft start period by the comparison between 1 24 V in an internal reference voltage and the voltages of the CS1 CS2 terminal The DC DC converter output voltage rises in proportion to the CS1 CS2 terminal voltage as the soft start capacitor connected to the CS1 CS2 terminal is charged The soft start time is obtained from the following formula Soft start time ts time to output 100 ts s 0 124 x Cs uF CS1 CS2 terminal voltage 1 24V 0V Soft start time ts 14 MB39A104 Soft
8. 4 ion D Max 10 2L 19 5 1 3 Exi5x10 50x10 0 268 3 25 A Drain current Min lo min Vin Vo t 2L lo Mim 10 19 5 1 2x15x10 X 500x10 0263 2 75 A 3 MB39A104 gt gt gt AA Pc p x Ros on x Duty 3 x 0 05 x 0 263 0 118 W Vo max X Ip x tr x fosc Dam EE 19 x 3 x 100 x 107 x 500 x 10 6 0 475 W VD Max X lo Max x tf x fosc Dapp SE cm _ 19 x 3 25 x 100 x 10 x 500 x 10 i 6 0 515 W Pr Pc Pston Ps orr 0 118 0 475 0 515 1 108 W The above power dissipation figures for the TPC8102 are satisfied with ample margin at 2 4 W Ta 25 C CH2 Input voltage Vin max 19 V output voltage Vo 3 3 V drain current Ip 3 A Oscillation frequency fosc 500 kHz L 15 uH drain source on resistance Ros on 50 MQ tr tf 100 ns Drain current Max lo Max lo Vin Vo ion D Max 10 2L 19 3 3 1 CES EE 52017 z 3 18 A 3 Drain current Min lo Min bwm lo Vin Vo gt D Min SL 19 3 3 1 ABRO Goggi REI 2 82 A MB39A104 e s Pc Ip x Ros on x Duty 32x0 05x0 174 0 078 W Vb Max X Ip x tr x fosc Ps on 8 19 x 3x 100 x 107 x 500 x 10 6 5 0 475 W Pelosi VD Max x lo ey x tf x fosc _ 19 x3 18 x 100 x 107 x 500 x 10 6 0 504 W Pr Pc Ps on Ps corr 0 078 0 475 0 504 1 057 W The
9. Fujitsu semiconductor device Fujitsu does not warrant proper operation of the device with respect to use based on such information When you develop equipment incorporating the device based on such information you must assume any responsibility arising out of such use of the information Fujitsu assumes no liability for any damages whatsoever arising out of the use of the information Any information in this document including descriptions of function and schematic diagrams shall not be construed as license of the use or exercise of any intellectual property right such as patent right or copyright or any other right of Fujitsu or any third party or does Fujitsu warrant non infringement of any third party s intellectual property right or other right by using such information Fujitsu assumes no liability for any infringement of the intellectual property rights or other rights of third parties which would result from the use of information contained herein The products described in this document are designed developed and manufactured as contemplated for general use including without limitation ordinary industrial use general office use personal use and household use but are not designed developed and manufactured as contemplated 1 for use accompanying fatal risks or dangers that unless extremely high safety is secured could have a serious effect to the public and could lead directly to death personal injury severe physical dam
10. R16 Resistor 13 kQ 0 5 96 RR0816P 133 D Note TOSHIBA TOSHIBA Corporation ROHM ROHMCo Lid SANYO SANYO Electric Co Ltd TDK TDK Corporation SUMIDA SUMIDA Electric Co Ltd ssm SUSUMU Co Ltd 23 MB39A104 SELECTION OF COMPONENTS Pch MOS FET The P ch MOSFET for switching use should be rated for at least 20 more than the maximum input voltage To minimize continuity loss use a FET with low Rosion between the drain and source For high input voltage and high frequency operation on off cycle switching loss will be higher so that power dissipation must be considered In this application the Toshiba TPC8102 is used Continuity loss on off switching loss and total loss are deter mined by the following formulas The selection must ensure that peak drain current does not exceed rated values and also must be in accordance with overcurrent detection levels Continuity loss Pc Pc Ip x Roson x Duty On cycle switching loss Ps on Vo Max X Ip x tr x fosc Ps on 8 Off cycle switching loss Ps orr Vo Max X lp max X tf x fosc 6 Ps OFF Total loss Pr Pr Pc Ps ow Ps 066 Example Using the Toshiba TPC8102 CH1 Input voltage Vin way 19 V output voltage Vo 5 V drain current lo 3 A Oscillation frequency fosc 500 kHz L 15 uH drain source on resistance Ros on 50 MQ tr 100 ns Drain current Max Ip Max
11. among FB2 and DTC terminals with triangular wave and controls output Overcurrent protection circit detection resistor connection terminal Set overcurrent detection reference voltage depending on external resistor and internal current resource 110 at RT 24 kQ Overcurrent protection circuit input terminal External Pch MOS FET gate drive terminal Output circuit ground terminal Connect to same potential as GND terminal Power supply control terminal Setting the CTL terminal at L level places IC in the standby mode MB39A104 BLOCK DIAGRAM CH2 1 vcco 3 OUT Current Protection 4 vst Logic AR 5 ILIM1 Drive2 4 lo 200 mA at VCCO 12V Current Protection Logic VH H UVLO release i C B 3 RT Bias Voltage Error Amp Power Supply Error Amp Reference 1 24 V Power VR1 ON OFF 22 OUT2 1 vs2 CO ILIM2 VH 63 GNDO 7 vcc 24 CTL ABSOLUTE MAXIMUM RATINGS Parameter Power supply voltage MB39A104 Condition VCC VCCO terminal Output current OUT1 OUT2 terminal Output peak current Duty lt 5 t 1 foscxDuty Power dissipation Ta lt 25 C Storage temperature The packages are mounted on the epoxy board 10 cm
12. 19 5 1 S e amor 2 4 91 uH CH2 L gt 2 Vin Vo ian lo 2x 19 3 3 1 S lo Bopx tor 0 174 gt 3 64 uH Inductance values derived from the above formulas are values that provide sufficient margin for continuous operation at maximum load current but at which continuous operation is not possible at light loads It is therefore necessary to determine the load level at which continuous operation becomes possible In this application the Sumida CDRH104R 150 is used At 15 uH the load current value under continuous operating conditions is determined by the following formula Load current value under continuous operating conditions lo Vo 2L toff lo 2 Example Using the CDRH104R 150 15 uH allowable tolerance 30 rated current 3 6 Vo 2L toff 5 1 2x15x105 X 500x107 0 263 gt 245 7 mA CH2 Vo lo 2L toff 3 3 1 215162 s 50015 DE 2 181 7 mA MB39A104 To determine whether the current through the inductor is within rated values it is necessary to determine the peak value of the ripple current as well as the peak to peak values of the ripple current that affect the output ripple voltage The peak value and peak to peak value of the ripple current can be determined by the following formulas Peak value IL Vin Vo IL gt lo 2L ton Peak to peak value Al AlL Vin Vo L ton Example Using the CDRH104R 150 15 uH allowable tolerance 30 rat
13. above power dissipation figures for the TPC8102 are satisfied with ample margin at 2 4 W Ta 25 C Inductors In selecting inductors it is of course essential not to apply more current than the rated capacity of the inductor but also to note that the lower limit for ripple current is a critical point that if reached will cause discontinuous operation and a considerable drop in efficiency This can be prevented by choosing a higher inductance value which will enable continuous operation under light loads Note that if the inductance value is too high however direct current resistance DCR is increased and this will also reduce efficiency The inductance must be set at the point where efficiency is greatest Note also that the DC superimposition characteristics become worse as the load current value approaches the rated current value of the inductor so that the inductance value is reduced and ripple current increases causing loss of efficiency The selection of rated current value and inductance value will vary depending on where the point of peak efficiency lies with respect to load current Inductance values are determined by the following formulas The L value for all load current conditions is set so that the peak to peak value of the ripple current is 1 2 the load current or less Inductance value L 2 Vin Vo ton lo MB39A104 gt gt gt gt gt gt gt gt gt Example CH1 Z 2 Vin Vo iin lo 2x
14. x 0 05 2 6 14 uF CH2 Al C gt a AVo AIXESR 0 364 2223500105 0 033 0 364 x 0 05 gt 7 83 uF Ripple current CHI Vin Vo ton IC rms gt 19 5 x 0 263 2N3 x 15 x 10 6 x 500 x 103 2 141 7 mArms CH2 Vin Vo ton IC rms gt SL 19 3 3 x 0 174 2N3 x 15 x 10 5 x 500 x 10 IV 105 1 mArms MB39A104 gt gt gt mM REFERENCE DATA TOTAL Efficiency vs Input Voltage 100 90 9 80 E gt 70 2 Vin 7V Vin 10V GE ooo Vin 12V Vin 19V 8 y 50 PA A Ta 25 C 5 V Output O V SW1 OFF E SW2 ON i 11111 10 100 10 Input voltage Vin V Each CH Efficiency vs Input Voltage 100 90 9 Mex 80 gt o 70 5 Vin 7V 5 Vin 10V i i RS d RE EAT DT TTT dM Vin 12V Vin 19V 5 50 4 7 Ta 25 C c A 3 3 V Output O SW1 ON 40 LU 4 ul SW2 OFF gt ULTI 10m 100m 1 10 Input voltage Vin V Continued 32 MB39A104
15. 100 Ambient temperature Ta C Triangular Wave Oscillation Frequency vs Power supply voltage 560 5 Ta 25 C BR CTL 5V EM 540 RT 24 kQ 1 DE CT 100 pF Oo 520 a gt 2 500 E 23 20 480 go E 460 440 0 5 10 15 20 Power supply voltage Vcc V Continued 10 MB39A104 Continued Gain Av dB Power dissipation Po mW Error Amplifier Gain Phase vs Frequency Ta 25 C 40 VCC 12 V 180 30 Av 20 La 90 10 0 0 10 20 90 30 40 180 100 ik 10k 100k 1M 10M Frequency f Hz Power Dissipation vs Ambient Temperature 1000 800 740 600 400 200 0 40 20 0 20 40 60 80 100 Ambient temperature Ta C Phase 6 deg 240 kQ wh AN 10 kQ THE 15 OM IN 2 4 KQ O EE 1 16 OUT Error Amp1 124V Error Amp2 777 777 777 MB39A104 FUNCTIONS 1 DC DC Converter Functions 1 Reference voltage block REF The reference voltage circuit generates a temperature compensated reference voltage 5 0 V Typ from the voltage supplied from the power supply terminal pin 7 The voltage is used as the reference voltage for the IC s internal circuitry The reference voltage can supply a load current of up to 1 mA to an exte
16. FUJITSU SEMICONDUCTOR DS04 27231 3E ASSP For Power Management Applications General Puroose DC DC Converter 2 ch DC DC Converter IC with Overcurrent Protection MB39A104 DESCRIPTION The MB39A104 is a 2 channel DC DC converter IC using pulse width modulation PWM incorporating an overcurrent protection circuit requiring no current sense resistor This IC is ideal for down conversion Operating at high frequency reduces the value of coil This is ideal for built in power supply such as LCD monitors and ADSL This product is covered by US Patent Number 6 147 477 FEATURES Built in timer latch overcurrent protection circuit requiring no current sense resistor Power supply voltage range 7 V to 19 V Reference voltage 5 0 V 1 96 Error amplifier threshold voltage 1 24 V 1 96 High frequency operation capability 1 5 MHz Max Built in standby function 0 uA Typ Built in soft start circuit independent of loads Built in totem pole type output for Pch MOS FET PACKAGE 24 pin plastic SSOP FPT 24P M03 cO FUJITSU MB39A104 A PIN ASSIGNMENTS VCCO VH OUT ILIM1 DTC1 VCC CSCP FBI NEI CS1 TOP VIEW 24 CTL 23 GNDO 22 OUT2 21 VS2 20 ILIM2 19 DTC2 18 GND 17 VREF 16 FB2 15 INE2 14 CS2 13 CT FPT 24P M03 MB39A104 PIN DESCRIPTION Pin No Symb
17. Start Circuit R2 777 CH ON OFF signal L ON H OFF 4 Error Amp 2 052 04 Csi Cs2 FB2 15 MB39A104 eee TREATMENT WITHOUT USING CS TERMINAL When not using the soft start function open the CS1 terminal pin 11 and the CS2 terminal pin 14 Without Setting Soft Start Time MB39A104 ABOUT TIMER LATCH PROTECTION CIRCUIT 1 Setting Timer Latch Overcurrent Protection Detection Current The overcurrent protection circuit is actuated upon completion of the soft start period When an overcurrent flows the circuit detects the increase in the voltage between the FET s drain and source using the external FET ON resistor Ron actuates the timer circuit and starts charging the capacitor Csce connected to the CSCP terminal pin 8 If the overcurrent remains flowing beyond the predetermined period of time the circuit sets the latch to fix OUT terminals pin 3 22 at H level and turn off the external FET The detection current value can be set by the resistors Rum and Ruw connected between the FET s drain and the ILIM1 terminal pin 5 and between the drain and the ILIM2 terminal pin 20 respectively The internal current lum can be set by the timing resistor Rr connected to the RT terminal pin 12 Time until activating timer circuit and setting latch is equal to short circuit detection time in 2 Setting Time Constant for Timer La
18. To prevent such malfunctions under voltage lockout protection circuit detects a decrease in internal reference voltage with respect to the power supply voltage turns off the output transistor and sets the dead time to 100 while holding the CSCP terminal pin 8 at the L level The circuit restores the output transistor to normal when the supply voltage reaches the threshold voltage of the undervoltage lockout protection circuit 4 Protection circuit operating function table This table refers to output condition when protection circuit is operating Operating circuit Overcurrent protection circuit Short circuit protection circuit Under voltage lockout 12 MB39A104 SETTING THE OUTPUT VOLTAGE Output Voltage Setting Circuit RI Error Amp 1 24 Vo Vv es R1 R2 SETTING THE TRIANGULAR OSCILLATION FREQUENCY The triangular oscillation frequency is determined by the timing capacitor Cr connected to the CT terminal pin 13 and the timing resistor Rr connected to the RT terminal pin 12 Moreover it shifts more greatly than the caluculated values according to the constant of timing resistor Rr when the triangular wave oscillation frequency exceeds 1 MHz Therefore set it referring to Triangular Wave Oscillation Frequency vs Timing Resistor and Triangular Wave Oscillation Frequency vs Timing Capacitor in MW TYPICAL CHARACTERISTICS
19. age or other loss 1 6 nuclear reaction control in nuclear facility aircraft flight control air traffic control mass transport control medical life support system missile launch control in weapon system or 2 for use requiring extremely high reliability 1 6 submersible repeater and artificial satellite Please note that Fujitsu will not be liable against you and or any third party for any claims or damages arising in connection with above mentioned uses of the products Any semiconductor devices have an inherent chance of failure You must protect against injury damage or loss from such failures by incorporating safety design measures into your facility and equipment such as redundancy fire protection and prevention of over current levels and other abnormal operating conditions If any products described in this document represent goods or technologies subject to certain restrictions on export under the Foreign Exchange and Foreign Trade Law of Japan the prior authorization by Japanese government will be required for export of those products from Japan F0308 FUJITSU LIMITED Printed in Japan
20. at current sense resistor To reset the actuated protection circuit either the power supply turn off and on again or set the CTL terminal pin 6 to the L level to lower the VREF terminal pin 17 voltage to 2 4 V Min or less See 1 Setting Timer Latch Overcurrent Protection Detection Current in MABOUT TIMER LATCH PROTECTION CIRCUIT 2 Timer latch short circuit protection circuit SCP Logic SCP Comp The short circuit detection comparator SCP Comp detects the output voltage level of Error Amp and if the error amp output voltage of any channel falls below the short circuit detection voltage 3 1 V Typ the timer circuits are actuated to start charging the external capacitor Csce connected to the CSCP terminal pin 8 When the capacitor voltage reaches about 0 73 V the circuit is turned off the output transistor and sets the dead time to 100 96 To reset the actuated protection circuit either the power supply turn off and on again or set the CTL terminal pin 24 to the L level to lower the VREF terminal pin 17 voltage to 2 4 V Min or less See 2 Setting Time Constant for Timer Latch Short Circuit Protection Circuit in MABOUT TIMER LATCH PROTECTION CIR CUIT 3 Under voltage lockout protection circuit UVLO The transient state or a momentary decrease in supply voltage which occurs when the power supply is turned on may cause the IC to malfunction resulting in breakdown or degradation of the system
21. ed current 3 6 A Peak value CHI IL lo on 19 5 1 23 3345x105 x 500x105 0263 gt 3 25 CH2 IL gt lo MTV ton vai x 0 174 2x 15x 10 500 x 10 23 16 Peak to peak value CH1 Alt Vw Vo Aen 19 5 1 15x 10 5 x 500x107 0 263 0 491 CH2 Alt zo EVO ion ma l 2074 15x105 500x105 0 364 MB39A104 e Flyback diode The flyback diode is generally used as a Shottky barrier diode SBD when the reverse voltage to the diode is less than 40V The SBD has the characteristics of higher speed in terms of faster reverse recovery time and lower forward voltage and is ideal for achieving high efficiency As long as the DC reverse voltage is sufficiently higher than the input voltage the average current flowing through the diode is within the average output current level and peak current is within peak surge current limits there is no problem In this application the Rohm RBO53L 30 is used The diode average current and diode peak current can be calculated by the following formulas Diode mean current loi Vo Ibi gt lo x 1 ETE Diode peak current loi 9 gt lot tof Example Using the Rohm RB053L 30 VR DC reverse voltage 30 V average output voltage 3 0 A peak surge current 70 A VF forward voltage 0 42 V IF 3 0A CH1 bi Seda Vin 23x 1 0 263 gt 2 21A CH2 ibi 2lox 1 23x 1 0 174
22. ercurrent as shown below This example shows the range of operation of the overcurrent detection function with a setting of Vo 3 3V Ie ErrAmp Q1 Connectto RS when using RS Method to detect by current when external FET Q1 is turned on Overcurrent Detection Function Operating Range 1600 1400 Vo set to 3 3 V Operation Range Method to detect by mean current VIN ErrAmp Q1 Rs nr rw VS2 T 4 VS1 777 ILIM2 CO iL wu 5 Ww d Overcurrent Detection Function Operating Range 1600 1400 Vo set to 3 3 V 1200 1000 800 600 Operation Range fosc kHz 400 200 0 6 8 10 12 14 16 18 20 VCC V 18 5 39 104 2 Setting Time Constant for Timer Latch Short Circuit Protection Circuit Each channel uses the short circuit detection comparator SCP Comp to always compare the error amplifier s output level to the reference voltage 3 1 V Typ While DC DC converter load conditions are stable on all channels the short circuit detection comparator output remains at L level and the CSCP terminal pin 8 is held at L level If the load condition on a channel changes rapidly due to a short circuit of the load causing the output voltage to drop the output of the short circuit detection comparator go
23. es to H level This causes the external short circuit protection capacitor Csce connected to the CSCP terminal to be charged at 1 uA Short circuit detection time sc tscr 8 0 73 x Cscr UF When the capacitor Csce is charged to the threshold voltage Vr 0 73 V the latch is set and the external FET is turned off dead time is set to 10096 At this time the latch input is closed and the CSCP terminal is held at L level If a short circuit is detected on either of the two channels both channels are shut off When the power supply is turned on back or VREF terminal pin 17 voltage is less than 2 4 V Min by setting CTL terminal pin 24 to L level the latch is released Timer latch short circuit protection circuit To each channel Drive 19 MB39A104 TREATMENT WITHOUT USING CSCP TERMINAL When not using the timer latch short circuit protection circuit connect the CSCP terminal pin 8 to GND with the shortest distance Treatment without using CSCP GND 8 CSCP RESETTING THE LATCH OF EACH PROTECTION CIRCUIT When the overcurrent or short circuit protection circuit detects each abnormality it sets the latch to fix the output at the L level To reset the actuated protection circuit either the power supply turn off and on again or set the CTL terminal pin 24 to the L level to lower the VREF terminal pin 17 vo
24. ltage to 2 4 V Min or less mM I O EQUIVALENT CIRCUIT MB39A104 Reference voltage block Control block 72 kO 104 kQ voc O 1 24 V a des VREF x E 2482 GND4 GND 9 l Short circuit detection block VREF q 4 5 0 V oi 3 1 V B 280 CE GND 4 GND 4 Triangular wave oscillator block RT gt VCC Error amplifier block CH1 CH2 VCC 4 VREF 60V Ti INEX GND 4 PWM comparator block CH1 CH2 BENE FBX q DTCX GND o cr Overcurrent protection circuit block Soft start block gt VCC VREF 4 5 0 V GND 4 Triangular wave oscillator CT block 8 4 t 1 Q DEN 3 1 V q CT GND 4 TOD vcco VCC 4 ILIMX VSX GND 4 Bias voltage block VCC 8i GND D VCCO VH p GNDO Output block CH1 CH2 VCCO dE a HE A VH anoo GB X Each channel No b GNDO 21 AVL HA epouu KqpuelS 440 NO 48M0d NO LOA Sa 438 mof M9 Aver 5519 019 T 29u919J9H dwy 10113 i 91 4 Ad 0001 A ddng semog dwy 1043 ASZ Leo vi 1ueuno oDeyoA
25. ol 1 0 Descriptions VCCO Output circuit power supply terminal Connectto same potential as VCC pin Power supply terminal for FET drive circuit VH Vcc 5 V External Pch MOS FET gate drive terminal Overcurrent protection circuit input terminal Overcurrent protection circuit detection resistor connection terminal Set overcurrent detection reference voltage depending on external resistor and internal current resource 110 at RT 24 kQ PWM comparator block PWM input terminal Compares the lowest voltage among FB1 and DTC terminals with triangular wave and controls output Power supply terminal for reference power supply and control circuit Connect to same potential as the VCCO terminal Timer latch short circuit protection capacitor connection terminal Error amplifier Error Amp 1 output terminal Error amplifier Error Amp 1 inverted input terminal Soft start capacitor connection terminal Triangular wave oscillation frequency setting resistor connection terminal Triangular wave oscillation frequency setting capacitor connection terminal Soft start capacitor connection terminal Error amplifier Error Amp 2 inverted input terminal Error amplifier Error Amp 2 output terminal Reference voltage output terminal Output circuit ground terminal Connect to same potential as GNDO terminal PWM comparator block PWM input terminal Compares the lowest voltage
26. re No warranty is made with respect to uses operating conditions or combinations not represented on the data sheet Users considering application outside the listed conditions are advised to contact their FUJITSU representatives beforehand MB39A104 ELECTRICAL CHARACTERISTICS Parameter Output voltage Symbol VREF Pin No VCC VCCO 12 V VREF 0 mA Ta 25 C Conditions Ta 25 C Output voltage temperature variation Input stability AVREF VREF Ta 0 C to 85 C VCC 7Vto19V 1 Reference voltage block REF Load stability VREF 0 mA to 1 Short cuircuit output current VREF 1V Threshold voltage 2 Under VREF p block UVLO Hysteresis width voltage lockout protection circuit Threshold voltage Input source current SCP Logic 3 Short circuit Reset voltage Threshold voltage 4 Short circuit SCP Comp Oscillation frequency CT 2100 pF RT 24 kQ Frequency temperature variation x O 2 2 c Oo a 6 D x O Q Fe 6 6 D o g amp D 5 o gt 5 Triangular block OSC Ta 0 C to 85 C start block CS1 CS2 6 Soft Charge current CS1 CS2 0V Threshold voltage FB1 FB2 2V Input bias current bolck INE1 INE2 0V 7 Error amplifier Error Ampi Error Amp2 Voltage gain
27. rnal device through the VREF terminal pin 17 2 Triangular wave oscillator block OSC The triangular wave oscillator incorporates a timing capacitor and a timing resistor connected respectively to the CT terminal pin 13 and RT terminal pin 12 to generate triangular oscillation waveform amplitude of 1 5 V to 2 5 V The triangular waveforms are input to the PWM comparator in the IC 3 Error amplifier block Error Amp1 Error Amp2 The error amplifier detects the DC DC converter output voltage and outputs PWM control signals In addition an arbitrary loop gain can be set by connecting a feedback resistor and capacitor from the output terminal to inverted input terminal of the error amplifier enabling stable phase compensation to the system Also it is possible to prevent rush current at power supply start up by connecting a soft start capacitor with the CS1 terminal pin 11 and CS2 terminal pin 14 which are the non inverted input terminal for Error Amp The use of Error Amp for soft start detection makes it possible for a system to operate on a fixed soft start time that is independent of the output load on the DC DC converter 4 PWM comparator block PWM Comp The PWM comparator is a voltage to pulse width modulator that controls the output duty depending on the input output voltage The comparator keeps output transistor on while the error amplifier output voltage remain higher than the triangular wave voltage 5 Outp
28. seig 0136 0444 queuing gola T NS Q2 ol 28444 0001 TIA BL O A 2 1 NO ZIH 89 euBis 440 NO ZHO LU e e GL X 28 O1 f 0L SN UI 79 9 Da o m e z Tag T gio 440 1 NO ZIH O O sisi dx gg 86 44O NO IHO 6H et lt noe UU 96 DOS O LON O A E NM a 2 a MS LINI 148018 a dee gt lt n 22 MB39A104 mM PARTS LIST COMPONENT SPECIFICATION VENDOR PARTS No Q1 Q2 Pch FET VDS 30 V ID 6 TOSHIBA TPC8102 D1 D2 Diode VF 0 42 V Max atIF 3A ROHM 880530 30 L1 L2 Inductor 15 uH 3 6 A 50 ma SUMIDA CDRH104R 150 C1 Ceramics Condenser 100 pF 50 V TDK C1608CH1H101J C2 C6 OS CON 10 uF 20 V SANYO 20SVP10M 63 67 Ceramics Condenser 10 uF 25V TDK C3225JF1E106Z C4 C8 OS CON 82 uF 6 3 V SANYO 6SVP82M C10 C11 C20 Ceramics Condenser 0 1 uF 50V TDK C1608JB1H104K C12 C14 C21 Ceramics Condenser 1000 pF 50V TDK C1608JB1H102K C16 C17 Ceramics Condenser 0 1 uF 50V TDK C1608JB1H104K R1 Resistor 24 KQ 0 5 ssm RR0816P 243 D R4 R5 Resistor 2 7 KQ 0 5 ssm RR0816P 272 D R8 R13 Resistor 220 kQ 0 5 ssm RR0816P 224 D R9 R14 Resistor 68 0 5 RR0816P 683 D R10 Resistor 150 kQ 0 5 RR0816P 154 D R11 Resistor 56 kO 0 5 RR0816P 563 D R15 Resistor 100 kQ 0 5 RR0816P 104 D
29. tch Short Circuit Protection Circuit Internal current value lim 2700 Rr KQ lum UA Detection current value loce Iw A x Rum Q Vin V Vo V x Vo V loce A Ron Q 2x Vin V x fosc Hz x L H Rum Overcurrent detection resistor Ron External FET ON resistor Vin Input voltage Vo DC DC converter output voltage fosc Oscillation frequency L Coil inductance To reset the actuated protection circuit either the power supply turn off and on again or set the CTL terminal pin 24 to the L level to lower the VREF terminal pin 17 voltage to 2 4 V Min or less Overcurrent detection circuit Q1 L Current Protection 1 HA 17 MB39A104 Overcurrent Protection Circuit Range of Operation When an overcurrent flow occurs if the increased voltage between the drain and source of the FET is detected by means of the external FET Q1 resistor operational stability is lost when the external FET Q1 ON interval determined by the oscillation frequency input voltage and output voltage falls below 450 ns Therefore the circuit should be used within a range that ensures that the ON interval does not fall below 450ns according to the following formula Vo V ON interval 450 ns gt Vin x foso Hz If the ON interval of the external FET Q1 is below 450ns we recommend the use of an overcurrent detection resistor RS to detect ov
30. ut block The output block is in the totem pole configuration capable of driving an external P channel MOS FET 6 Bias voltage block VH This bias voltage circuit outputs Vcc 5 V Typ as minimum potential of the output circuit In standby mode this circuit outputs the potential equal to Vcc MB39A104 2 Control Function When CTL terminal pin 24 is L level IC becomes the standby mode The power supply current is 10 Max at the standby mode On Off Setting Conditions Power OFF Standby ON Operating 3 Protective Functions 1 Timer latch overcurrent protection circuit block OCP The timer latch overcurrent protection circuit is actuated upon completion of the soft start period When an overcurrent flows the circuit detects the increase in the voltage between the FET s drain and source using the external FET ON resistor actuates the timer circuit and starts charging the capacitor Csce con nected to the CSCP terminal pin 8 If the overcurrent remains flowing beyond the predetermined period of time latch is set and OUT terminlas pin 3 22 of each channel are fixed at H level And the circuit sets the latch to turn off the external FET The detection current value can be set by resistor Rum connected between the FET s drain and the ILIM1 terminal pin 5 and resistor Rum connected between the drain and the ILIM2 terminal pin 20 Changing connection enables to detect overcurrent
31. x 10 cm WARNING Semiconductor devices can be permanently damaged by application of stress voltage current temperature etc in excess of absolute maximum ratings Do not exceed these ratings RECOMMENDED OPERATING CONDITIONS Parameter Power supply voltage Condition VCC VCCO terminal Reference voltage output current VH output current VREF terminal VH terminal Input voltage INE1 INE2 terminal DTC1 DTC2 terminal Control input voltage CTL terminal Output current OUT1 OUT2 terminal Output Peak current Duty lt 5 t 1 foscxDuty Oscillation frequency Overcurrent detection by ON resistance of FET Timing capacitor Timing resistor VH terminal capacitor VH terminal Soft start capacitor Short circuit detection capacitor CS1 CS2 terminal CSCP terminal Reference voltage output capacitor VREF terminal Operating ambient temperature See SETTING THE TRIANGULAR OSCILLATION FREQUENCY WARNING The recommended operating conditions are required in order to ensure the normal operation of the semiconductor device All of the device s electrical characteristics are warranted when the device is operated within these ranges Always use semiconductor devices within their recommended operating condition ranges Operation outside these ranges may adversely affect reliability and could result in device failu
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