Delta Tau PMAC PCI User's Manual
Contents
1. Mn 24 Bit Word 1 24 BITS 23 22 21 20 19 18 17 16 15 14 135 12 11 10 09 0OS O7 OO6 OS O4 03 OZ OT OO 4 n 0 1023 CODE1 CODE2 Integer 15 EXPONENT 6 BIT Start of line bit CODE2 0 24 Bit Word 2 23 22 21 20 19 19 17 16 15 14 135 12 11 10 09 089 O07 06 05 04 03 02 01 00 S FRACTIONAL PART OF FLOAT MANTISSA fe SIGN Dual Ported RAM Automatic Functions 24 BITS 352. USER MANUAL PMAC DUAL PORTED RAM N DELTA TAU y Data Systems Inc NEW IDEAS IN MOTION Single Source Machine Control Power Flexibility Ease of Use 21314 Lassen Street Chatsworth CA 91311 Tel 818 998 2095 Fax 818 998 7807 www deltatau com Copyright Information O 2003 Delta Tau Data Systems Inc All rights reserved This document is furnished for the customers of Delta Tau Data Systems Inc Other uses are unauthorized without written permission of Delta Tau Data Systems Inc Information contained in this manual may be updated from time to time due to product improvements etc and may not conform in every respect to former issues To report errors or inconsistencies call or email Delta Tau Data Systems Inc Technical Support Phone 818 717 5656 Fax 818 998 7807 Email support deltatau com Website http www deltatau com Operating Conditions All Delta Tau Data Systems Inc motion controller products accessories and amplifiers contain static sensitive components that can be damaged by incorrect handling When installing or handling Delta Tau Data Systems Inc products avoid contact with highly insulated materials Only qualified personnel should be allowed to handle this equipment In the case of industrial applications we expect our products to be protected from hazardous or conductive materials and or environments that could cause harm to the controller by damaging components
3. Set bit to enable clear bit to disable Bit 0 Coordinate System O Bitl Coordimte System 2 O Bit2 Coordimte System 3 O Bit 3 Coordinate Sysiemt 4 O Bit 4 Coordinate System 5 O Bits o Bite Bit Bit 2 Motor Coordinate System 3 Bit 3 Motor Coordinate System 4 Bit4 Motor Coordinate System 5 Bit 5 Coordinate System 6 Bit 6 Coordinate System 7 Bit 7 Coordinate System 8 Bits 8 15 Not Used Control Panel Request Words Meter CS amp 1 2 3 4 5 6 7 8 0x0010 0x0018 0x0020 PMAC Address Y D001 Y D003 Y D004 Y D005 Y D006 Y D007 Y D008 Bit Format of Request Words Request 1 action requested 0 no action requested Reserved for Delta Tau Future Use Jog Minus Motor Only Jog Plus Motor Only Pre Jog Motor Only Start RUN Coord Sys Only Step STEP QUIT Coord Sys Only Stop ABORT Coord Sys Only Home Motor Only Feed Hold HOLD Coord Sys Only When both Jog Minus and Jog Plus are set motor will stop PMAC Address X D001 X D002 X D003 X D004 X D005 X D006 X D007 X D008 Dual Ported RAM Automatic Functions 13 PMAC Dual Ported RAM User Manual Servo Fixed Data Buffer PMAC can provide key motor servo data to the DPRAM where it can be accessed easily and quickly by the host computer PMAC copies data from key motor registers into f
4. Typically these DPRAM locations are accessed through host word read and word write commands When a location in DPRAM 1s accessed either reading or writing address bit Al selects whether it is reading or writing to PMAC s Y or X memory If address bit Al 0 you are selecting the equivalent of PMAC s Y memory Conversely if address bit Al 1 selecting PMAC s X memory The following table shows the DPRAM addresses and the corresponding host address from our previous example Dual Ported RAM Communications PMAC Dual Ported RAM User Manual PMAC Address Y D000 D000 D001 D001 SIFC800 1FC802 The following two equations can be helpful to help calculate both PMAC and host addresses for DPRAM Host address Host start address 4 x PMAC address D000 offset where offset 0 for accessing Y memory and offset 2 for accessing X memory In our example Host start address 1FC000 In converting the other way we have PMAC address 0 25 x Host address Host start address D000 Host DPRAM address bits A2 through A13 select which PMAC word 1s to be accessed The value of these bits equals the PMAC equivalent address minus D000 Read write Example Suppose the DPRAM was configured to begin at host location EC000 and you write to PMAC WY DOOO 1234 WX D000 5678 FAC VI oy y SRA Nu NL Writing to the DPRAM on the host side and reading it through PMAC is just as easy The align
5. 0x0530 OxOSAC 0x0628 Host Address ce oxo3a2 0x03BE 0043A Ox0aBe 0x0532 OxOSAE 01002A Note 1 The following is the logic used in the PMAC to determine which variable will be put in this slot It is controlled by bits of the coordinate system program execution status word PSTATUS If PSTATUS 7 1 amp amp PSTATUS 5 0 Use Source A Else If PSTATUS 9 1 Use Source B Else Use Source C Endif Enait PSTATUS 7 is the Segmented move flag 113 0 PSTATUS 5 is the Segmented move stop flag PSTATUS 9 is the Tool Compensation flag Background Variable Data Read Buffer The Background Variable Data Read Buffer allows the user to have up to 128 user specified PMAC registers copied into DPRAM during the background cycle This function is controlled by 155 The buffer has two modes of operation single user and multi user The default mode is the single user mode It is active when bit 8 of the control word Y D1FA is set to zero Multi user mode is active when bit 8 of the control word Y D1FA is set to one Dual Ported RAM Automatic Functions 21 PMAC Dual Ported RAM User Manual General Description The buffer has three parts The first part is the header four 16 bit words eight host addresses containing handshake information and defining the location and size of the rest of the table This is at a fixed location in DPRAM see table at end of section The second part contains the address specifications
6. Byte 0 PMAC X WORD y Byte 3 0 Byte 0 7 1 Byte 1 DPRAM 2 S Byte 2 BYTE 3 S S S S S S S NO 4 SIGN EXTENSION Byte 3 RELATIVE 5 Byte 4 6 First word sign bit 7 8 8 8 8 8 8 8 8 ign bi 6 EXTENSION S Second word sign bit En Exponent for floating point Control Panel Function PMAC provides the capability to create the software equivalent of a hardware control panel in the DPRAM By setting and clearing individual bits in the DPRAM the host computer can duplicate all of the functions available from external switches through the JPAN connector Also by writing a 16 bit value the host can control the feedrate override value just as a real potentiometer would The DPRAM control panel functions are enabled if I2 1s set to 3 They are disabled if I3 is set to other values General Description The host loads command request bits for motors and coordinate systems into registers 0x0004 Y D001 0x0008 Y D002 etc then triggers the action by setting the appropriate enable bits of register Ox0000 Y D000 When PMAC processes the request it clears all of the bits of 0x0000 Y D000 The DPRAM is now ready for the next set of requests The host loads the desired Feedrate Override time base values for the coordinate systems it wishes to change into registers 0x0006 X D001 0x000A X D002 etc then triggers the action by setting the appropriate enable bits of
7. DPRAM card together occupy 2 PC slots The two short cables provided connect the DPRAM to the CPU on the PMAC The 50 pin cable connects P3 of DPRAM to J2 of PMAC piggy back board or J9 of PMAC Lite The 10 pin cable connects P4 of DPRAM to J4 of PMAC piggy back board or J10 of PMAC Lite Dual Ported RAM Communications 1 PMAC Dual Ported RAM User Manual PMAC PC OPTION 2 DUAL PORTED RAM INTERFACE BOARD 7 50 in 190 5 mm P3 3 88 in 98 5 MM 4 19 in 106 4 mm P4 To install the board connect the cables as previously stated with the boards removed from your computer Next install both boards plugging in PMAC first and then the DPRAM board in the slot next to it Turn on your computer and establish communication with PMAC using the PMAC Executive software At the time of this manual revision the easiest method of configuring the Dual Ported RAM is using the Executive Program There are only two hardware configurations set with jumper El for the DPRAM card Jumper El controls whether the DPRAM uses 8 or 16 bit access El should be removed for 8 bit access in a 16 bit PC bus AT slot Install El for 16 bit operation faster data transfers All other DPRAM configurations are done entirely through software programming via PMAC Software Setup The software setup is simply a matter of setting a few register values in PMAC
8. I9 Le 7116 23 14 13 22 111010908107 06108 04103 02 01 00 sees eese ees peo eese e ees e ele eese eee o rede S FRACTIONAL PART OF FLOAT MANTISSA 36 BITS SIGN Sub type B TA TS PVT TM DWELL DELAY CCR 24 Bit Word 1 23 22 21 20 19 198 17 16 15 14 13 12 11 10 09 08 07 06 05 04 03 02 O0 L OO CODE2 Not Used 1 CODE1 28 EXPONENT 6 BIT 0 1 2 8 TA TO PUT 67 68 69 TM DWELL DELAY Start of line bit TO ti US 2 AS CGR 24 Bit Word 2 Z23 22 21 20 19 16 17 26 15 14 13 1211 109 09 08 10706 03104 035102 UE OO seges eje ea ea jeajes es ea ese a a a a a a a a a S FRACTIONAL PART OF FLOAT MANTISSA 24 BITS O DGN Note I Codel 14 and 15 normally letters N and O are not available for use and are used for 14 Inz Mnz Pnz QOn commands and 15 MnlZ Mn Mn amp Mn commands Command Type 1 Sub type A ENABLE DISABLE PLC 24 Bit Word 1 23 22 21 20 19 19 17 16 15 i14 15 12 11 10 O09 OS O7 O6 05 04 053 102 01 OO 7 6 5 4 3 2 1 0 N U 1 CODEL 30 1 ENA DIS Start of line bit CODE2 0 1 ENA DIS PLC 23 2221 20 Lo 16 27 16 15 14 135 1211 10109108107 061051041051 O2 OX OO rim oa tases Gara bases lacus es cae aon eee va coe sas ees sede oen One esee eee e SL 30 29 28 27 26 25 24 23 22 21 20 19 19 17 16 15 14 13 12 11 10 9 6 PLC Dual Ported RAM Automatic Function
9. M102 gt DP D202 used for motor x s commanded position M103 gt DP SD100 used for motor x s commanded position M100 gt DP D200 0 go flag to stop motion program M104 gt DP D200 1 flag to stop C program when positions have been received OPEN PROG 1 CLEAR TA10 WHILE M100 1 keep looking while go flag is 1 X M101 Y M102 Z M103 move x y z to new positions ENDWHILE CLOSE The C program calculates the positions and would send them to PMAC via a subroutine like this void update positions longx long y long z int stop program static long far x y 2 x MK_FP 0xD400 0x0804 y MK FP 0xD400 0x0808 z MK FP 0xD400 0x080C Dual Ported RAM Communications 10 while Xx y z poke peek 0xD400 0x0801 NK 5X 0xD400 0x0801 1 PMAC Dual Ported RAM User Manual wait until position received send position flag Dual Ported RAM Communications PMAC Dual Ported RAM User Manual DUAL PORTED RAM AUTOMATIC FUNCTIONS PMAC provides many facilities for using the dual ported RAM DPRAM to pass information back and forth between the host computer and PMAC These facilities are comprised of the following functions DPRAM Control Panel Function Host to PMAC DPRAM Servo Data Reporting Function PMAC to Host DPRAM Background Fixed Data Reporting Function PMAC to Host DPRAM Background Variable Data Reporting Function PMAC to Host DP
10. TEE 2 SAVE values to PMAC EEPROM ind E51 EN x 3 Reset PMAC to copy values or into active control registers zs rcx E 00073 I Non volatile SAVE serine Storage Registers era l Active Interface in PMAC AO RAM Any Reset Control Registers EEPROM Normal l Reset A NS LEEN MIN EN E e PMAC A A A AAA A __ ___ ____ _ __ l VME RHX 783 10 WX 783 VME i PC RHX 786 2 WX 786 vs PC Setup Computer Setting up the VME Dual Ported RAM Option 2V There is no hardware setup or connections for the Option 2V DPRAM on the PMAC VME or PMAC2 VME It is factory installed on the PMAC board itself Starting Address Before you can communicate with PMAC VME through the DPRAM you must setup its starting address Initial communications to the VME for setup of the address of the VME mailbox registers is done over the serial port The setup of the DPRAM address can be done either with or after the mailbox setup see Writing a Host Communications Program in the PMAC User Manual 4 Dual Ported RAM Communications PMAC Dual Ported RAM User Manual Before choosing the DPRAM starting address determine what memory space is available in the VME system so that PMAC s DPRAM does not interfere with existing RAM or other devices on the VME bus Just like setting up the base address of PMAC VME the starting address of DPRAM 1s done through software but in a somewhat different manner The best way to descr
11. and 0x062C Y D18B Read Write Procedure To initialize the buffer 1 Clear registers 0x062C Y D1B4 and 0x06D0 Y D18B Bit 0 2 Set I58 1 To send a command line 1 Put ASCII characters in Host to PMAC buffer 0x0630 0x06CE D18C D1B3 with a NULL character to terminate the string 2 Set Host Output Control Flag 0x062C Y D18B Bit 0 to 1 Host Output Complete Note When sending ASCII command strings through the DPRAM it is not necessary to use a carriage return character PMAC looks for the NULL character ASCII value 0 to mark the end of the string and looks at the Host Output Control Flag to know when it has been given a command Dual Ported RAM Automatic Functions 27 PMAC Dual Ported RAM User Manual The buffer in DPRAM is limited to 159 characters however a command line of up to 200 characters can be sent by using the DPRAM buffer twice The first 159 characters are placed in DPRAM without a terminating NULL character and the host output complete flag 1s set then the remaining up to 41 characters are sent with a NULL character to terminate and the host output complete flag 1s set again To read a response 1 Wait for Host Input Control Word 0x06D0 Y D1B4 gt 0 Response Ready 2 Interpret the value in this register to determine what type of response is present If the register does not show an error continue with the following steps 3 Read 0x06D2 X D1B4 to find the number of characters in t
12. memory minus the starting address always D000 multiply by 4 because the X and Y words for each location in PMAC s DPRAM space is equivalent to four bytes or locations of PC memory and add it to the PC memory starting address selected for the DPRAM PC Location PMAC Mem Location hex D000 x 4 PC Mem Starting Address selected for DPRAM Assume we configured DPRAM to start at PC address D4000 We want the equivalent PC address location for PMAC location D200 This would be Hex D200 D000 x 4 D4000 D4800 Decimal 53760 53248 x 4 868352 870400 Our C code now only has to PEEK location D4800 and D4802 since we need to get four bytes to get a 32 bit word to obtain motor 1 s current position The C code subroutine may look like this long get motor position int hi word unsigned lo word lo word peek 0xD400 0x0800 hi word peek 0xD400 0x0802 return hi word 65536 1lo word Example 2 To calculate positions for three axes in a custom C program and have PMAC move to these positions Assign three M variables to point to three DPRAM locations write position values to these locations with the C program and have a PMAC motion program use these variables in its move statements In the sample code below a flag bit has been used to signal the C program when the data has been taken by PMAC so the next move locations can be loaded M101 gt DP D201 used for motor x s commanded position
13. of registers to copy to PMAC to let PMAC know that it can perform another cycle 24 Dual Ported RAM Automatic Functions PMAC Dual Ported RAM User Manual Data Format PMAC X Y and Special registers will use the long 32 bit data lword The 32 bit Data 2 word is not used in this case For PLCC function blocks only X bits 0 2 6 or Y bits 0 2 4 memory writes are allowed For a 48 bit PMAC integer or float point value The L Long format should be used L will have the lower 32 bits of the total 48 bits in the long 32 bit data 1 word and the upper 16 bits in the lower 32 bit data 2 word PCOMM LIB supplies a function to convert this IEEE 64 bit number to a PMAC 48 bit floating point number This data starts immediately after the last address specification register Disabling To disable this function simply leave Y D1F5 set to zero Register Map Background Variable Data Write Buffer Host to PMAC Transfer Y D1F5 Host must set for another update 0x07E8 Starting address of data structure D200 DFFD X D1F5 Variable Address Buffer Format for each Data Structure 6x16 bit Address Bit Definitions D200 Bits 13 15 Special type PMAC address 0 PLCC Function Block A eoe PNAC HRS nestor fuese DFFD starting offset for the read is a 24 bit width Bits 0 2 Variable type PLCC Function Block 0 Y register to write Number L register 2 X register 4 Special Y register 6 Special X register PO _
14. of the PMAC registers to be copied into DPRAM It occupies two 16 bit words four host addresses for each PMAC location to be copied starting at the location specified in the header The third part starting immediately after the end of the second part contains the copied information from the PMAC registers It contains two 16 bit words four host addresses for each short X or Y PMAC location copied and four 16 bit words eight host addresses for each long PMAC location copied The data format is the same as for data gathering to dual ported RAM Enabling To start operation of this buffer 1 Write the starting location of the second part of the buffer into register OXO7EE X D1FB This location is expressed as a PMAC address and it must be between D200 and DFFF 2 Starting at the DPRAM location specified in the above step write the PMAC addresses of the registers to be copied and the register types The first 16 bit word is the PMAC address of the first register to be copied the second 16 bit word takes a value of 0 1 2 or 4 to specify Y Long X or Special respectively for the first register The third and fourth word specifies the address and type of the second register to be copied and so on 3 Write a number representing the size of the buffer into register OXO7EC Y D1FB This value must be between 1 and 128 When PMAC sees that this value is greater than zero and the individual data ready bit is zero it is ready to
15. or causing electrical shorts When our products are used in an industrial environment install them into an industrial electrical cabinet or industrial PC to protect them from excessive or corrosive moisture abnormal ambient temperatures and conductive materials If Delta Tau Data Systems Inc products are exposed to hazardous or conductive materials and or environments we cannot guarantee their operation PMAC Dual Ported RAM User Manual Table of Contents DUAL PORTED RAM COMMUNICA TONS isesicccsscccteredetecccscccocecscesscvcesccovessdetevecesscecestvelaeusscecedesededecessscseteeeezeces 1 Usesor DERA N nai iras l Setting up the PC Bus Dual Ported RAM Option D cccccccoonooonoocncccnnnnnnnnnnnnnononononnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnos l E 12077 a E E E 2 System Memory Map Most Compatible eee ete OESE ENNART AES 3 YET ISP MITES TOPE TT e o E O AE T o M 3 Setting up the VME Dual Ported RAM Option ZY ieiesoestesiseste voe opa eni pla Eine poa UN Pro gUr osa Fue krass Rua ppl Db Ee val e Ee s Unde 4 AP e UE e ee Sa 4 Usine the Dual Ported RAM 1PC and VVS 6 DUAL PORTED RAMAUTOMATICTEUNCITO Dec o ciao aepo o b dcn ncc ia ocn oed Ode Pa a eeHe S2 d Ce en eet a oce pose 11 IB VUE Aah Oral mmt 11 Control Pa o LE UNICO ato ii rijacos 12 FTC TAT CCT OG abr 12 ROBSIOP CO ag cach A e asta N OH oe 15 Control anei Request WO GS ls oooO 13 DIU Toria o ICG ESI Woori Sesinin ienn ota ce eunltoes So bnses 13
16. register 0x0002 X D000 The register holds values from 0 to 32 767 in units of 1 32 768 msec The value represents the elapsed time PMAC uses in its trajectory update equations each servo cycle If it matches the true time the trajectories will go at the programmed speeds If it is greater than the true time trajectories will go faster if it 1s less they will go slower This value corresponds to values of O to 8 388 352 in units of 110 1 8 388 608 msec At the default 10 value of 3 713 707 this corresponds to override values from 0 to 225 87 for real time execution 26100 a value of 14 507 should be used PMAC copies these values multiplied by 256 into the command override register for the appropriate coordinate system e g X 0806 for C S 1 If Ix93 Time Base Source Address for the coordinate system contains the address of this register then the value is used as the override for the coordinate system PMAC does not clear the enable bits in register 0x0002 X D000 as long as the enable bit for a coordinate system stays set PMAC will use the override values provided by the host 12 Dual Ported RAM Automatic Functions PMAC Dual Ported RAM User Manual Register Addresses 0x0000 Control Panel Motor Coordinate System Enable Mask Y D000 Set bit to enable PMAC clears on taking action Bit 0 Motor Coordinate System 1 Bit 1 Motor Coordinate System 2 Coordinate System Feed Pot Override Enable Mask X D000
17. start copying the registers you have specified into DPRAM 4 To enable the single user mode write a zero into the control word at 0x07E8 Y D1FA To enable the multi user mode write a 256 set bit 8 and clear bit 0 into the control word at 0x07E8 Y D1FA and set bit 15 0 of each variable s data type register X memory register This will tell PMAC that the host 1s ready to receive data and what the mode is for the data 5 Set I55 to 1 This enables both the background variable data reporting function and the background variable data writing function Single User Mode Procedure In operation PMAC will try to copy data into the buffer each background cycle between each scan of each PLC program If bit O of the control word 0x07E8 is set to 1 it will assume that the host has not finished reading the data from the last cycle so it will skip this cycle If bit O 1s O it will copy all of the specified registers When PMAC is done copying the specified registers it copies 16 bits of the servo timer register X 0000 into the DPRAM at Ox07EA X SDIFA Then it sets Bit O of the control word 0x07E8 Y DIFA to let the host know that it has completed a cycle When the host wants to read this data it should check to see that Bit O of the control word OxO7ES the Data Ready bit has been set If it has the host can begin reading and processing the data in the DPRAM When it is done it should clear the Data Ready bit to let PMAC know tha
18. 0C8 0x0104 0x0140 0x017C OxOIBS Ox01F4 0x0056 0x0092 Ox0OCE Ox010A 0x0146 0x0182 Ox01BE OxOIFA PMAC Address D014 D023 D032 D041 D050 DOSF DO6E D07D D015 D024 D033 D042 D051 D060 DO6F DO7E Source Address Motor Master Position 64 bits 1 Ix07 32 counts of the master 1 Ix08 32 motor counts Motor 1 2 3 4 5 6 7 8 Host Address 0x0058 0x0094 Ox00DO Ox010C 0x0148 0x0184 0x01C0 OxOIFC Ox005E 0x009A Ox00D6 0x0112 0x014E 0x018A 0x01C6 0x0202 PMAC Address D016 D025 D034 D043 D052 D061 D070 D07F D017 D026 D035 D044 D053 D062 D071 D080 Source Address Motor Compensation Position 64 bits 1 1x08 32 counts Motor 1 2 3 4 5 6 7 8 Host Address 0x0060 0x009C 0x00D8 0x0114 0x0150 0x018C OxOICS 0x0204 0x0066 0x00A2 OxOODE OxOIIA 0x0156 0x0192 Ox01CE Ox020A PMAC Address D018 D027 D036 D045 D054 D063 D072 D08 1 D019 D028 D037 D046 D055 D064 D073 D082 Source Address Dual Ported RAM Automatic Functions 15 PMAC Dual Ported RAM User Manual Motor 1 2 3 4 5 6 7 0x006A 0x00A6 OxOOE2 0x011E Ox015A 0x0196 0x01D2 0x020E Motor Servo Status 32 bits low 24 bits used 1st word returned on command Motor CS tt 1 2 3 4 5 6 7 8 2 Host Address 0x006C OxOOA8 OxOOEA 0x0120 0x015C 0x0198 0x01D4 0x0210 Motor Actual Velocity 1 Ix09 32 counts
19. 5 04 03 02 01 00 soe ee sale epa eee e Els ee eese ee CODE2 N U 1 CODE1 30 O Start of line bit CODEZ2 0 4 10 11 12 13 14 15 CIRDn SPLINEn CCn TSELn ADISn AROIn IBISD IROT Dual Ported RAM Automatic Functions PMAC Dual Ported RAM User Manual 24 Bit Word 2 23 22 21 20 19 18 17 16 15 14 13 12 11 10 09 0 maa egy an cue a a Gor aa aa on an ea Gas a a S n 1 1023 amp v SIGN Integer number value Two s complement 8 07 06 05 04 03 J02 01 00 alue of 1024 0 Sub type F LINEAR NORM PSET STOP BSTART BSTOP WAIT RAPID TINIT 24 Bit Word 1 23 22 21 20 19 18 17 16 15 14 13 12 11 10 09 0 CODE2 N U 1 CODE1 ae CODE2 1 2 3 5 6 LINEAR NORM PSET STOP 7 8 9 16 BSTOP WAIT RAPID TINI 23 22 21 20 19 18 17 16 15 14 13 12 11 10109 0 0 0 No DATA Command Type 2 Sub type A Inz Mnz Pnz Qn 24 Bit Word 1 AZ3p22 2L 20 L9TLe I7PLertspialt3 12 11 10 9910 Integer n 0 1023 CODE Z 1 CODEI 5Tart CODE2 0 In 24 Bit Word 2 23 22 21120 19 18 17 T6 15 14 13 12 11 10108910 8 07 06 05 04 03 J02 01 00 30 0 of line bit BSTART I 8 07 06 05 04 03 02 01 00 e 0o7 06 05 04 03 02 O01L1 00 14 EXPONENT 6 BIT of line bit 1 Mn 2 Pn 3 Qn 8 07 06 05 04 03 J02 01 00 S FRACTIONAL PART OF FLOAT MANTISSA SIGN Sub type B Mnlz Mn4 Mn amp
20. A D179 D0A1 DOCO DODF DOFE DIID DI3C DISB DI7A 0879 0939 09F9 0AB9 0B79 0C39 0CF9 ODB9 Coordinate System V Axis Target Position User Units Note 1 Motores 1 2 3 4 s 6 7 8 Host Address 0x0288 0x0304 0x0380 OxO3FC 0x0478 0x04F4 0x0570 OxOSEC PMAC Address D0A2 DOCI DOEO DOFF D11E D13D D15C D17B PMAC Address As SDOCI spoe _ spi0 spur SDISE SDISD SDUC Coordinate System W Axis Target Position User Units Note 1 Motor C S 1 2 3 3 4 5 6 7 8 Host Address 0x0290 0x030C 0x0388 0x0404 0x0480 OxOAFC 0x0578 Ox05F4 NF NP NE NE AE E NE DOAS D0C4 DOE3 D102 S DI21 D140 D15F D17E Dual Ported RAM Automatic Functions 19 PMAC Dual Ported RAM User Manual Coordinate System X Axis Target Position User Units Note 1 is 6 7 8 Host Address 0x0298 0x0314 0x0390 0x040C 0x0488 0x0504 0x0580 OxOSFC PMAC Address D0A6 D0C5 DOEA D103 D122 D141 D160 D17F PMAC Address DAT space spoes spios_ sbi23_ spia2_ spiel Sbiso Coordinate System Y Axis Target Position User Units Note 1 Motor C S 1 2 3 4 5 6 7 O8 0x02A6 0x0322 0x039E 0x041A 0x0496 0x0512 Ox058E 0x060A D0A9 DOC8 DOE7 D106 D125 D144 D163 D182 D D D Coordinate System Z Axis Target Position User Units Note 1 Motor C S 8 6 7 8 Host Ad
21. M in Intel format the less significant bytes and words appear in the lower numbered addresses To reassemble a long fixed point word in the host take the less significant 32 bit word and mask out the sign extension top eight bits In C this operation could be done with a bit by bit AND LSW and 16777215 Treat this result as an unsigned integer Next take the more significant word and multiply it by 16 777 216 Finally add the two intermediate results together To reassemble a long floating point word in the host treat the less significant word the same as for the fixed point case above Take the bottom 12 bits of the more significant word MSW and 4095 multiply by 16 777 216 and add to the masked less significant word This forms the mantissa of the floating point value Now take the next 12 bits MSW and 16773120 of the more significant word This is the exponent to the power of two which can be combined with the mantissa to form the complete value Dual Ported RAM Automatic Functions 11 PMAC Dual Ported RAM User Manual DUAL PORTED RAM DATA GATHERING FORMATS 24 BITS BIT 4 23 16 15 8 7 0 PMAC WORD S Byte2 Byte 1 Byte 0 ppram 9 Byte 0 BYTE 1 Byte 1 NO 2 S Byte2 RELATIVE 45Sssssss S Sign bit SIGN EXTENSION 48 BITS BIT 4 23 16 15 87 0 PMAC Y WORD Ss Byte 2 Byte 1
22. OO aA aa Z7 IPS EE ORO CE o Pan Pup Pe Eo Eo NNI ND NP 28 uno TE 29 Binary Rotary Program DULCES esci das ceteri d ee pid ecu iaa oaS d bbb sd ad barn Heu E iVa s Rs dad RP PPaD DAD deua tud ga EPUM noob cdccabadds 20 General DESC OM 30 A PPP UE LES o e e E UR nd heated 31 Binary Command Structure isses essen eee rr nn R NEE RR RR RR RR ss nn nn einn ries s a err n eite sess rennes 31 Internal PMAC 48 Bit Command Format eese cece eens n n hhhnnhhh nene sees sess senis enr r nnn nnne eene essen nnn ns 32 Table of Contents i ii PMAC Dual Ported RAM User Manual Table of Contents PMAC Dual Ported RAM User Manual DUAL PORTED RAM COMMUNICATIONS PMAC s Option 2 provides an 8K x 16 bit dual ported RAM that allows PMAC and its host to share an area of fast memory For the PMAC PC and the PMAC Lite Option 2 is a separate board that sits on the PC bus and cables to PMAC For the PMAC VME Option 2 V consists of ICs added to the main board itself Option 2 is not available for the PMAC STD For all versions of the PMAC2 Option 2 consists of ICs added to the main board itself The dual ported RAM can be used for extremely fast communication of data and commands to and from PMAC Uses of DPRAM The typical use in writing to PMAC is for a very fast repetitive downloading of position data and or rotary program information in real time The typical use in reading from PMAC is gettin
23. RAM ASCII Communications Buffer Bi directional DPRAM Binary Rotary Program Buffer Host to PMAC DPRAM Data Gathering Buffer PMAC to Host already existing DPRAM CONTROL W ASCII Command Function Host to PMAC superseded by DPRAM ASCII Communications In addition to these automatic functions the user is free to access otherwise unused registers in the DPRAM through the use of M variables on the PMAC side and through pointer variables on the host side for sending data either way between the host and PMAC Each of the automatic functions 1s described in detail below Note In listing memory locations both the host memory address and the PMAC memory address will be given The host address is given as an offset from the base address of the DPRAM in the host memory space it is expressed in standard C language hexadecimal notation e g Ox1F80 The PMAC address is given in parentheses as an absolute location in PMAC memory it is expressed in the standard PMAC hexadecimal notation e g X D008 DPRAM Data Format Long format data is stored in the DPRAM in 32 bit sign extended form That is each short 24 bit from PMAC is sign extended and stored in 32 bits of DPRAM The most significant byte is all ones or all zeros matching bit 23 Each long 48 bit word is treated as 2 24 bit words with each short word sign extended to 32 bits The host computer must re assemble these words into a single value The data appears in the DPRA
24. RAM User Manual PMAC Dual Ported RAM Memory Map Host Address PMAC Offset Address Ox0000 Control Panel Functions D000 Ox0024 Servo Data Reporting Buffer D009 0x0228 Background Data Reporting D08A Buffer 0x062C ASCII Command Buffer D18B Host to PMAC OxO6DO ASCII Response Buffer D1B4 PMAC to Host 0x07E8 Pointers to Variable Size D1FA Buffers 0x0800 Room for Variable Size Buffers D200 1 Data Gathering 2 Background Variable Data 3 Binary Rotary Program Open Use Space Ox3FFC DFFF Note DPRAM only occupies the low 16 bits 0 15 of each 24 bit word in PMAC PMAC memory locations D000 to D1FF are reserved for fixed uses The range of D200 to DFFF is open for general purpose use From the PMAC side locations in DPRAM are typically accessed using M variables An M variable is defined to each word to be used such as M120 X D200 0 16 S then these M variables are used in programs They can either be written to e g M120 P1 P5 or read from e g X M120 or P12M120 MAC Y Memory X Memory Memory VIL LAMAZE Z AK Memory To the host DPRAM appears as 8K x 16 bit words of memory Since most computers address by byte this requires 16K of address space or 14 bits 2 16K on the host bus Consecutive 16 bit locations of DPRAM are located at even addresses That is address bit AO the least significant bit of your DPRAM address should always be 0
25. Seno cb et B BOMINES DO Lo omm 14 II EAE oU TC 14 POPES VOT VN T 15 loce dure tios Mb vo Data or M 17 CCT OS oT e Q 217 a ia VD T T 17 Background Variable Data Read Bulfler ccccoooonoooooonncnnnnnnnnnnnnnnononnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnas 21 aga D as AAA A 22 A e o o IN 22 OY ned ee USF M ae T TOCE OUT ee TER 22 Multi User Mode HUI united a EE A A AE ZZ DW IIo T taco sedan Zo DSO Hc E 23 POC USUI IVP aiii 23 Background Variable Data Write Bul er oooooooooooooncncnnnonononnnnnnnnnnnnnnonnnnnnnnnnnnnnnnnnnnnnnnnonnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnas 24 A qiie Cr 24 Ign T A 24 AA AE AISE AT A AEA E A NE ANTE A A AAA T 24 SP E 25 A PE uo 25 PO PUG IG PP RO OE E 25 DPRAM Data Gathering BUL salidas cnanneshpdesnapioncdanadaandeeseonesaseancs 25 DPRAM ASCI Communications xc2256ssodexeasesascancteamascanetaakoacdensncanansanapeauescauedaadiananeacannanaonapiouenesauttienestacnaanenseaaeonses 2 Conero DEST PU NA IA PEE O nn PU OO E e E NN 27 Ten Wre JTOCPOHPE acd nn e e o
26. Upper 16 bits of data 1 Lower 16 bits of data 1 Data to send to PMAC Upper 16 bits of data2 Lower 16 bits of data 2 Data to send to PMAC DPRAM Data Gathering Buffer PMAC s data gathering function can create a rotary buffer in DPRAM so that the host computer can pick up the data as it is being gathered This function was implemented before V 1 14 and is described in the User s Manual for PMAC The data gathering buffer in DPRAM must start at address 0x0800 D200 Its length is determined by the DEFINE GATHER size command If also using a DPRAM Background Variable Data Buffer and or a DPRAM Binary Rotary Program Buffer it is important to set the starting points and sizes of those buffers so there is no overlap Dual Ported RAM Automatic Functions 25 PMAC Dual Ported RAM User Manual Note If the size requested in the DEFINE GATHER size command is smaller than required to hold an even multiple of the requested data the actual data storage will go beyond the requested size to the next higher multiple of memory words required to hold the data For example 1f gathering one 24 bit value and one 48 bit value three words of memory is needed If the size specified is 4000 words not a multiple of 3 the actual storage size will be 4002 words the next higher multiple of 3 PMAC to Host Transfer memory locations set by PMAC 0x07FC Y D1FF 0x07FC X D1FF PMAC Data Gather Buffer Storage Address If 145 2 and the b
27. acter to be sent to PMAC X D18B 0x0630 Host to PMAC Host Output Transfer Buffer Up to 159 characters with a NULL Ox06CE character ASCII value 0 terminating the string D18C D1B3 ASCII PMAC to Host Transfer Description 0x06DO ASCII Host Input Control Word PMAC termination character Y D1B4 Upper Lower 8 of 16 bits shown as hex digits 00 00 PMAC Output Enable Set to this value by HOST to note that 1t has processed the previous response data PMAC will not update the Host Input buffer unless this control Word is zero 00 0D CR Set to this value by PMAC after it has filled the Host Input buffer to note that there is more data to follow in transmission 01 0D CR Set to this value by PMAC after it has filled the Host Input buffer to note a PMAC program CMD command response End of transmission no ACK is sent 02 0D CR Set to this value by PMAC after it has filled the Host Input buffer to note a PMAC program SEND command message End of transmission No ACK is sent 8d dd Set to this value by PMAC to note an error in the command where ddd 12 bit BCD coded Error Number See I6 description for error listing 0x06D2 of ASCII characters 1 in the Host Input buffer set by PMAC after it has written to X D1B4 the buffer 0x06D4 PMAC to Host Host Input Transfer Buffer Up to 255 characters with a NULL 0x07D2 character ASCII value 0 terminating the string D1B5 D1F4 The
28. ar bits in registers to PMAC without using a communications port PC Bus serial or DPRAM ASCII I O This allows the user to set any PMAC variable without using an ASCI command such as Ml 1 and without worrying about an open Rotary Buffer This function is controlled by I55 It is available starting with firmware version 1 15G PLCC function blocks are available starting with firmware version 1 16 General Description The buffer has two parts The first part is the header two 16 bit words four host addresses containing handshake information and defining the location and size of the rest of the table This is at a fixed location in DPRAM PMAC address D1F5 as shown in the table at the end of this section The second part contains the address specifications of the PMAC registers to be copied into PMAC It occupies six 16 bit words twelve host addresses for each PMAC location to be written to starting at the location specified in the header Enabling To start operation of this buffer 1 Write the starting location of the second part of the buffer into register OxO7E8 X D1F5 This location is expressed as a PMAC address and it must be between D200 and DFFD 2 Starting at the DPRAM location specified in the above step write the PMAC addresses of the registers to be copied and the register types The first 16 bit word is the PMAC address of the first register to be copied the second 16 bit word takes a value of 0 to 32768 to spec
29. cutes it housekeeping routines it tests to see 1f the Data Ready flag at 0x0228 Y D08A Bit 0 is set 1 If itis PMAC assumes the host has not finished reading the last update so it skips this update of the buffer If the flag 1s clear 20 meaning that the host has finished reading the previous update it will copy new data into the buffer The information copied is for motors and coordinate systems numbered from 1 to the value of I59 After updating the buffer it sets the Data Ready flag to 1 and sets register 0x022A X DO8A equal to the servo timer to mark the time of the report The host computer should check the Data Ready flag before attempting to read the information in the buffer If the flag 1s not set the host can either check several more times waiting for it to be set by PMAC or immediately go on to other tasks If the flag is set the host can read the information it desires from the buffer It must clear the Data Ready flag after reading the information in order to permit PMAC to write another set of data into the buffer To Enable 1 Set 159 highest motor C S 1 8 and 2 Set 149 1 To Disable 1 Set 149 20 or 2 Set 159 0 This will also disable the Servo Data Buffer Register Map Global Registers for Background Fixed Data Buffer 0x0228 Buffer Status to Host and PMAC Y D08A Bit 0 Data Ready Flag 1 means PMAC done updating buffer 0 means host ready for another update from PMAC Bits 1 15 Res
30. dress 0x02A8 0x0324 Ox03A0 0x041C 0x0498 0x0514 0x0590 0x060C pea 0x02AE 0x03A6 0x049E 0x051A 0x0596 0x0612 PMAC Address DOAA D0C9 DOES D107 D126 D145 D164 D183 PMAC Address SS SDOCA SDOES spine SDI2T SDl spiss spisa Coordinate System Program Execution Status 32 bits low 24 bits used Second word returned on command MeouC amp s 1 2 3 4 s 6 7 8 Host Address 0x02B0 0x032C OxO3AS 0x0424 0x04A0 0x051C 0x0598 0x0614 0x02B2 0x032E 0x03AA 0x0426 0x04A2 0x051E 0x059A Ox0616 Same value as PR command returns Meter CS amp 1 2 3 4 5 6 7 8 0x02B6 0x0332 OxO3AE 0x042A 0x04A6 0x0522 0x059E 0x061A 20 Dual Ported RAM Automatic Functions PMAC Dual Ported RAM User Manual Motores 1 2 3 4 s 6 7 Host Address 0x02B8 0x0334 0x03B0 0x042C 0x04A8 0x0524 Ox05AO0 0x061C XS0110 X 5014C X 50188 X SOICa Coordinate System Time Remaining in accel decel when 113 gt 0 2 msec Motor C S 7 8 a 2 3 a OxO2BE 0x033A 0x03B6 0x0432 0x04AE 0x052A 0x05A6 0x0622 Same value as PE command returns Meter CS S 1 2 3 4 5 6 7 8 0x02C2 0x033E Ox03BA 0x0436 0x04B2 0x052E OxOSAA 0x0626 Motor Averaged Actual Velocity 1 1x09 32 counts per servo cycle Motor Cs 4 1 2 3 4 8 6 7 8 Host Address 0x02C4 0x0340 OxO3BC 0x0438 0x04B4
31. dresses in terms of memory segments Each memory segment starts 16 addresses from the pervious segment so the segment address is like the memory address without the hex digit 1 e memory address D4000 is segment address D400 Bits 0 3 first four least significant bits of PMAC location X 787 as follows Bit 0 DPRAM enable disable 1 enable O disable Bit 1 SK RAM 08K Bit 2 24 bit 20 bit addressing enable 1224 bit 0220 bit Dual Ported RAM Communications 3 PMAC Dual Ported RAM User Manual Example To configure the DPRAM to start at ECOOO in PC memory There is 8K of DPRAM and 24 bit addressing 1s needed To configure and enable the DPRAM either use the PMAC Executive program s dual port RAM configuration feature or send the following commands directly to PMAC WX 786 0000E 000C5 configure DPRAM for ECO00 save save configuration to EAROM SSS re initialize the card The last hex digit 5 comes from the above binary number 0101 5 Unused 24 bit Addr a Enabled To disable the DPRAM you could use the PMAC Executive program s dual port RAM configuration feature or send the following commands directly to PMAC WX 786 0000E 000C4 disable DPRAM save save configuration to EAROM re initialize the card VME and or DPRAM Address Setup Normal Setup Procedure 1 Send values from setup computer to PMAC User interface registers Default values M Besse
32. e control PROM 1 15x 3 changed to 27 1 changed to 0 PROM 1 14x Always set to 2 14 0 Checksum control I6 1 Error reporting control These variables should be changed subsequent to setting I58 to 1 Once the DPRAM ASCII communication is enabled PMAC is ready to receive ASCII commands either through the normal bus port or through the DPRAM port The active response port is whichever port through which PMAC has received the most recent command Therefore PMAC will respond to a host command through the port where it received the command Communications resulting from internal SEND or CMD statements in PMAC programs will be sent to the active response port When sending and receiving ASCII strings through the DPRAM the handshake control characters are not part of the strings as they are on the other ports Instead they are placed in fixed control word registers To make the serial port the active response port it is necessary to send the CTRL Z command through the serial port This will disable the DPRAM ASCII communications by setting 58 to 0 Setting 15820 will disable the ASCII communications PMAC will not accept any commands through the DPRAM If you have been communicating through the DPRAM it is a good idea also to send CTRL X command to clear any pending responses Note With I58 1 sending a CTRL X command will empty the command and response queues it will also clear the control words 0x06D0 Y D1B4
33. eneral Description The host defines the start and size of the Binary Rotary Buffer in 0x07F8 and 0x07FA Y and X D1FE sets the Host and PMAC indexes at 0x07F4 and 0x07F6 Y and X D1FD to zero the beginning of the buffer fills the rotary buffer with data sets the host index to the end of the buffer then enable the Binary Rotary buffer transfer by setting I57 1 The host can use the PMAC Indexes to determine when to update the Dual Port buffer or the BREQ interrupt will be active on the internal Rotary buffer also Rules 1 The data in the buffer must contain a complete line Therefore the line must be in the buffer before the Host Binary Rotary Buffer Index 1s updated 2 The buffer size parameter is subject to the following restrictions a Minimum Size six words 24 bytes which means it could have only one command per line b The size must be an even number 6 8 12 etc so that no 64 bit instruction command will wrap in the buffer 3 Host Buffer Full when PMAC Index Host_Index 4 buffer size 4 Host Buffer Empty when PMAC Index Host Index 5 In the DPRAM rotary buffer at the Host Index a special end of buffer command needs to be stored after each transfer It is the following DPRotBuf Host Index 800 DPRotBuf Host Index 1 FFFF Note These values are Intel format 6 Notall motion program commands can be sent through the binary rotary program buffer First any command that cannot be sent to a rotary bu
34. erved for future use 0x022A PMAC Servo Timer Updated at Data Ready Time from X 0000 X D08A Control Panel Hardware Port from Y FFCO DO8B DO8C DO8D 0x0238 4A Spare Global Variable DOSE 92 Dual Ported RAM Automatic Functions 17 PMAC Dual Ported RAM User Manual Motor Coordinate System Specific Registers for Background Fixed Data Buffer Motor Target Position 64 bits 1 1x08 32 counts 2 07 8 0x0252 0x02CE 0x034A Ox03C6 0x0442 OxO4BE 0x053A Ox05B6 PMAC Address D093 DOB2 DOD1 DOFO D10F D12E D14D D16C D094 D0B3 DOD2 DOFI D110 D12F D14E D16D Motor Position Bias 64 bits 1 1x08 32 counts Motor C S 1 2 3 4 5 6 7 8 0x0254 0x03C8 0x0444 Ox04C0 0x053C Ox05B8 0x025A Ox02D6 0x0352 OxO3CE 0x044A 0x04C6 0x0542 OxOSBE PMAC Address D095 DOB4 DOD3 DOF2 D111 D130 DIAF D16E D096 DOB5 DOD4 DOF3 D112 D131 D150 D16F Motor Status Word 32 bits low 24 bits used 2nd word returned on command Metr CS amp 1 2 3 4 5 6 7 8 Host Address 0x025C O0x02D8 0x0354 0x03DO 0x044C Ox04C8 0x0544 Ox05CO 0x025E Ox02DA 0x0356 0x03D2 0x044E Ox04CA 0x0546 0x05C2 PMAC Address DOB6 DOD5 D132 D151 D170 4 Source Address Y 0814 Y 08D4 Y 0994 Y 0A54 Y 0B1 Y 0BD4 Y 0C94 Y 0D54 Coordinate System Status Definition Word lo
35. ffer through an ASCII command string cannot be sent in binary form e g IF WHILE GOTO GOSUB Second the binary command syntax does not support mathematical expressions Any place that the ASCII command syntax description uses the form data or expression the binary command must use the form constant instead 30 Dual Ported RAM Automatic Functions PMAC Dual Ported RAM User Manual Register Map 0x07F0 Y D1FC 0x07F2 X D1FC 0x07F4 Y D1FD 0x07F6 X D1FD OxO7FS Y D1FE 0x07FA X D1FE HOST to PMAC Transfer Description PMAC to HOST Binary Rotary Buffer Status Word Bit 15 1 Error Stops processing commands Bitl4 1 Internal Rotary buffer full Busy flag PMAC Index stops updating Bits 7 0 Code Internal Rotary Buffer size 0 or DPRAM Rotary Buffer Size 0 These flags are set and reset by the PMAC The Busy flag is set when the PMAC internal rotary buffer is full This however does not mean the DPRAM Binary Rotary buffer is full See Rules The Busy flag is reset when the PMAC internal rotary buffer 1s not full or the DPR binary rotary buffer is empty Spare Host Binary Rotary Buffer Index for 32 bits PMAC Binary Rotary Buffer Index for 32 bits Size of Binary Rotary Buffer in long integers 32 bits Starting Binary Rotary Buffer PMAC Address Ex D600 must be gt D200 Binary Rotary Buffer Host to ensure that does not conflict with Data Gather Buffer Binar
36. g very fast status information repetitively PMAC supports both automatic functions for the DPRAM communications and user designated functions Data such as motor status position velocity following error etc can be continuously updated and written to DPRAM by PLC programs or automatically by PMAC Without using DPRAM this data must be accessed by sending PMAC on line commands such as P V and F through the VME mailbox registers or over the PC bus This same data may be obtained much faster via the DPRAM without the time required to send the command through the communications port and wait for the response For non automatic uses PMAC usually accesses the dual ported RAM through M variables that are addressed to these locations This can work for reading or writing The M variable formats likely to be used are X Y for 1 to 16 bits DP for 32 bit fixed point and F 32 bit floating point For sending data back to the host PMAC s data gathering function can also be used directed to the dual ported RAM rather than the regular RAM 145 controls See the Analysis Features section of the PMAC manual for details Setting up the PC Bus Dual Ported RAM Option 2 There is no hardware setup or connections for the Option 2 DPRAM on the PMAC2 PC or PMAC2 Lite It is factory installed on the PMAC2 itself For the PMAC PC bus cards the DPRAM card plugs into an available PC slot to the right side of your PMAC PC or Lite card The PMAC and
37. he response 4 Read the Host Input Buffer starting at Ox06D4 D1B5 until the specified number of characters has been read 5 Clear the Host Input Control Word 0x06D0 Y D1B4 6 Repeat steps 1 to 5 until the Host Input Control Word contains an lt ACK gt to mark the end of transmission PROM version 1 15 provides a register in the DPRAM 0x062E X D18B to be used specifically for sending PMAC a control character The read write procedure is exactly as described above except now instead of writing a string to the Host to PMAC buffer write the ASCII value of the control character to the dedicated register 0x062E X D18B Note PMAC s ASCII response strings in DPRAM do not end with a carriage return character The host computer has two ways of knowing where the end of the string is First the register immediately preceding the string is given the number of characters in the string convenient for Pascal programmers Second the string is terminated with the NULL character ASCII value 0 convenient for C programmers Interrupts I56 1 enables the Dual Ported RAM ASCII interrupt feature With this enabled the PMAC will interrupt the Host when a PMAC to Host buffer is ready to be read by the Host VME users will get the normal VME bus communications interrupt IRQ line specified by the value in X 788 with an interrupt vector default A2 one greater than the value specified in X 789 when the Dual Port RAM ASCII PMAC t
38. hex digit most significant bits will be the value of address bits A23 A20 and the other digit right digit amp least significant bits will always be 0 In this example the value for address bits A23 A20 would be 1 therefore we would write a value of 0 into location X 078A Now we have to determine the value of address bits A19 through A14 Every time PMAC is powered up or reset either with the hardware reset line or use of the command we will need to write this value into PMAC s base address 121 remember from our previous examples PMAC s base address is 7FAO000 In this example constructing a 6 bit hex number from bits A19 A14 gives us a value of 3F Eo o o oL LLL LL Binary mr Therefore we write 3F from the VME host computer master into VME bus location 7FA121 after PMAC is powered up or reset Dual Ported RAM Communications 5 PMAC Dual Ported RAM User Manual Note This dynamic addressing scheme provides the capability for addressing up to 1M byte of DPRAM in 16K byte blocks by changing the value of base 121 on the fly However PMAC VME currently utilizes only a single 16 Kbyte block 8K x 16 so the base 121 register only has to be written to once every time PMAC is powered up or reset At this point the starting address of DPRAM is fully specified However we need to check two more register locations in PMAC s memory for having appropriate values Location X 078B must ha
39. ibe how to set up DPRAM is to give an example Note Most users will simply use the ConfigurelV ME Communications window in the PMAC Executive program to set the address for DPRAM The following section explains how to perform this setup without the Executive program Example Suppose a starting address of 1FC000 was selected for the DPRAM Just as we did for the base address of PMAC it is best to rewrite this address in binary and label the address bits starting with AO as the rightmost bit Hx 0 I C0 00 i Clearly we have a value of 00 for address bits A31 A24 1F for address bits A23 A16 CO for bits A15 A8 and 00 for bits A7 AO To tell PMAC where we want DPRAM to begin we need to break up this starting address into two parts 1 The first part will represent the value address bits A23 through A20 This value will only be written to PMAC once during the setup process and saved 2 The second part will represent the value address bits A19 through A14 This value will need to be written to PMAC each time it is powered up or reset If using 32 bit addressing address bits A31 through A24 for the dual ported RAM are determined by PMAC s memory location X 0785 which is also used for the same address bits of the base address of the mailbox registers First we have to write the value of address bits A23 through A20 into bits 7 through 4 high order nibble of PMAC s memory location X 0784 i e the left
40. ify the type width and offset for writing to the PMAC register The third fourth fifth and sixth words specify the data to be written Note If address 0 is specified it will be writing into PMAC s servo clock register and will cause PMAC s watchdog timer to trip 3 Write a number representing the size of the buffer into register OxO7E6 Y D1F5 This value must be between 1 and 32 When PMAC sees that this value is greater than zero it is ready to start copying the registers you have specified into PMAC When it is finished it will change the value in this register to a Q 4 SetI55 to 1 This enables both the background variable data read function and the background variable data write function Procedure In operation PMAC will copy the data from the buffer into PMAC during the background cycle whenever Y D1F5 is a not zero If this register is 0 it will assume that the host has not finished placing the data in the buffer and will not write to PMAC Once this register is set to a number from 1 to 32 it will copy that many registers starting at the start of the header start address information from the DPRAM to PMAC When PMAC is done copying the specified registers it sets register Y D1F5 to zero to let the host know that it has completed a cycle When the host wants to update this buffer it should check to see that Y D1F5 is zero When it is done it should setup the address data structure Then set Y D1F5 to the number
41. iod in servo cycles 2 Set I59 highest motor number 1 8 3 SetI48 1 4 Issue GATHER command To disable this function 1 Issue ENDGATHER command or 2 Set I19 0 or 3 Set 148 0 or 4 Set 159 0 this will also disable the Background Fixed Data Buffer 14 Dual Ported RAM Automatic Functions PMAC Dual Ported RAM User Manual Register Map Global Registers for Servo Fixed Data Reporting Buffer 0x0024 Host Status to PMAC Bit 0 1 is Host Busy reading buffer 0 is not busy Bits 1 15 reserved for future use 0x0026 PMAC Status to Host X D009 Bits 0 14 Servo Timer Bit 15 1 is PMAC Busy updating buffer 0 is not busy Global Status Bits from Y 0003 DOOA Low 24 Bits First word returned on command Global Status Bits from X 0003 DOOB Low 24 bits Second word returned on command Spare Global Var DOOC 11 Motor Specific Registers for Servo Fixed Data Reporting Buffer Motor Commanded Position 64 bits 1 Ix08 32 counts Motor pod 2 3 4 5 6 7 8 Host Address 0x0048 0x0084 0x00CO OxOOFC 0x0138 0x0174 OxOIBO Ox01EC 0x004E 0x008A 0x00C6 0x0102 0x013E 0x017A 0x01B6 0x01F2 PMAC Address D012 D021 D030 DO3F DO4E DOSD D06C D07B D013 D022 D031 D040 D04F DOSE D06D D07C Source Address Motor Actual Position 64 bits 1 1x08 32 counts Motor 1 2 3 4 5 6 7 8 Host Address 0x0050 Ox008C Ox0
42. ixed registers in the DPRAM The copying is attempted every 119 servo cycles and is done for motors through n where n is determined by variable I59 Setting I48 to 1 and issuing the GATHER command enables this feature General Description In operation every 119 servo cycles PMAC tests to see if the Host Busy flag at 0x0024 Y D009 Bit 0 is set 21 If it is PMAC skips this update of the buffer If the flag is clear 20 PMAC first sets the PMAC Busy flag at 0x0026 X D009 Bit 15 to 1 then it updates the buffer with the information from the specified motors 1 to I59 then updates the servo time at 0x0026 X D009 Bits 0 14 and finally clears the PMAC Busy flag by setting 0x0026 X D009 Bit 15 to 0 When the host wishes to read the buffer it must make sure that the PMAC Busy flag is clear First set the Host Busy flag at 0x0024 Y D009 Bit 0 to 1 So PMAC stops updating and doesn t write as the host reads Then poll the PMAC Busy flag If the host finds that this flag 1s set it may test the flag some more times the number of tests should always be limited or it can decide to skip this cycle immediately The host then reads the information it desires and finally clears the Host Busy flag to permit PMAC to start the next update The data format in the DPRAM is the same as for the Data Gathering to the Dual Port Format 24 bit values are sign extended to 32 bits 48 bit values are treated as 2 24 bit values each half is
43. ment of the numbers work the same way as illustrated above The host application program and the PMAC motion control and or PLC programs may be written to allow a wide variety of control and data transfer capabilities While certain DPRAM addresses are reserved as mentioned above the host may set certain addresses to trigger an operation in the PMAC the PMAC may set certain addresses to trigger an operation in the host etc Programming Examples Example 1 Suppose a host program is written in C to read motor 1 s actual position Use the DPRAM automatic features to place this data in DPRAM or use a PMAC PLC program To use a PLC program define two M variables and a one line PLC program which constantly updates a location in DPRAM The C program can then read this value which is a 32 bit integer In PMAC enter the following M variable definitions and PLC program 8 Dual Ported RAM Communications PMAC Dual Ported RAM User Manual MLSO gt D 8Z8 motor L actual position M131 gt DP SD000 point to a location in DPRAM OPEN PLC 1 CLEAR M131 M130 1108 32 update motor position in counts in DPRAM CLOSE 15 2 allow PLC 1 to be enabled ENABLE PLC 1 curn on PLE 1 Now read the location corresponding to M131 D000 in PMAC s memory in PC memory and extract this position information so that the C program can use it The corresponding address in PC memory can easily be determined by talking the address location in PMAC s
44. ng function described earlier The next GATHER command will activate the data gathering function The ENDGATHER command stops the function started by the most recent GATHER command If both functions are running two ENDGATHER commands must be issued to stop them both To enable this function 1 Set 119 update period in servo cycles 2 Set 145 data storage location and mode 2 or 3 3 IssueaDEFINE GATHER size Determine buffer size 4 Issue GATHER command if 148 1 issue GATHER GATHER command To disable this function 1 Issue ENDGATHER command or 2 SetII9 20 26 Dual Ported RAM Automatic Functions PMAC Dual Ported RAM User Manual DPRAM ASCII Communications PMAC can perform ASCII communications through the dual ported RAM as well as through the normal bus communications port and the serial port The DPRAM ASCII communications is enabled by setting I58 to 1 This permits the host to send an ASCII command to PMAC by placing the command string characters in consecutive registers in the DPRAM and setting a flag to notify PMAC of the command PMAC will respond by placing its response string characters in consecutive registers in the DPRAM then setting a flag and optionally triggering an interrupt to notify the host of the response General Description Setting 158 to 1 enables the ASCII I O feature When this mode is enabled the following I variables are automatically set to the following values I3 20r O Handshak
45. o HOST data buffer is ready The non DPRAM mailbox VME interrupt vectors remain as before A0 and A 1 default PC users will get IR7 interrupt from the PMAC PC or PMAC Lite if jumper E55 is installed The EQU4 signal is used to generate this interrupt so it is unavailable for position compare use when 156 1 Due to the fact that the 8259 does not latch the interrupt on a transition interrupt the PMAC will hold the IR7 line true until the host services the Dual Port ASCII PMAC to Host buffer and sets 0x06D0 Y D1B4 to 0 saying it has the data Because of this the host may see an IR7 interrupt still active when it gets another interrupt If so the PMAC has not overwritten the PMAC to Host ASCII buffer it just has not satisfied the above described condition Also if 0x06DO0 Y D1B4 0 the IR7 was from the previous exchange and there is no data to be received by the Host The last transmission should be an lt ACK gt regardless of whether you have I56 equal to one or zero 28 Dual Ported RAM Automatic Functions PMAC Dual Ported RAM User Manual Register Map ASCII Host to PMAC Transfer Description 0x062C ASCII Host Output Control Word Y D18B Bit 0 Host Output Control Flag 0 Host Output Enable Set to 0 by PMAC when it has processed a command string 1 Host Output Complete Set to 1 by the Host when it has loaded a full command string Bits 1 15 Reserved for future use 0x062E Bits 0 7 Host Output Control char
46. per servo cycle Mec J 2 3 4 s 6 7 8 0x0072 OxOOAE OxOOEA 0x0126 0x0162 0x019E Ox0IDA 0x0216 DO2B X 50033 X 5006F XS00AB X 0087 Time Left in Move Segment 2 msec Mw i 2 3 4 s 6 7 8 0x0076 0x00B2 OxOOEE 0x012A 0x0166 0x01A2 OxOIDE 0x021A SDOID 1055 X 0020 X 5005C X 50098 X 00D4 X 0110 Motor 1 2 3 4 5 6 37 3 Host Address 0x0078 Ox00B4 OxOOFO Ox012C Ox0168 0x01A4 0x01E0 0x021C SDOIE DO78 SDOS7 Source Address X 0029 X 0065 X 00A1 X 00DD X 0119 X 0155 X 0191 X 01CD Motor J 1 2 3 4 S 6 7 8 0x007C OxOOBS 0x0130 OxOlAS 0x01E4 0x0220 0x0082 OxO0BE OxOOFA 0x0136 0x0172 O0xOIAE OxOIEA 0x0226 D020 D02F D03E D04D DO5C DOGB D07A D089 16 Dual Ported RAM Automatic Functions PMAC Dual Ported RAM User Manual Background Fixed Data Buffer PMAC can provide information of interest of the host computer through the DPRAM as a background task This feature is enabled if 149 1 If this feature is enabled each time PMAC executes its housekeeping tasks in background which 1t does between each scan of each PLC program 1t will update the buffer in DPRAM if the host has read the previous contents of the buffer The information in this buffer is data in PMAC that is updated less often than once per servo cycle General Description When this feature 1s enabled each time PMAC exe
47. re are two ASCII character bytes per 16 bit register in DPRAM The first character of the pair is in the LSB This format should be convenient for host computers with Intel processors but probably will require a byte swap for host computers with Motorola processors Binary Rotary Program Buffers The Binary Rotary Program Buffers in PMAC s DPRAM allows the host computer to send program commands to PMAC in binary format for the fastest possible transmission of these commands A standard rotary program buffer must be established in PMAC s internal memory with the DEFINE ROTARY command as well as a buffer in DPRAM for the binary transmission from the host Only the first of two binary rotary buffers that PMAC supports in DPRAM is described here Call or fax Delta Tau if the details memory register address description for the second one are required Dual Ported RAM Automatic Functions 29 PMAC Dual Ported RAM User Manual When PMAC receives a binary format program command in DPRAM from the host it simply copies it into the rotary program buffer in internal memory The end result is the same as if an ASCII program command had been sent to PMAC through any of the ports but the transmission is quicker because PMAC gets the command all at once and it does not have to parse the command from ASCII format Note Delta Tau has PC subroutines written in C to interface with the DPRAM binary rotary program buffer Contact the factory for details G
48. s 33 PMAC Dual Ported RAM User Manual Sub type B ABS INC 24 Bit Word 1 23 22 21 20 19 18 17 16 15 14 153 12 11 10 09 08 07 06 05 04 053 02 01 00 Not Used i N U 1 CODEI 30 2 FRAX ABS INC O ABS CODE2 1 INC Start of line bit 23 22 21 20 19 18 17 16 15 14 13 12 11 10 09 08 07 06 05 041 03 02 011 00 as e a ese pese et Z Y X W V U C B A R ABS INC AXIS Set bit 1 Sub type C FRAX 24 Bit Word 1 23122 21 20 19 18 17 16 158 14 13 12 11 10 09 08 07106 05104 103 02 01 1 00 ae pee fee e ese rele res eem eese ee peo e ees Not Used dde N U 1 CODE1 30 2 FRAX ABS INC CODE2 2 FRAX m Start of line bit 24 Bit Word 2 23 22 21 20 19 18 17 16 15 14 13 12 11 10 09 08 07 06 05 04 03 02 01 00 a ll a pede pee disegno a ce el Z Y X W V U C B A FRAX AXIS Set bit 1 Sub type D HOME amp HOMEZ 24 Bit Word 1 23 22 21 20 19 18 17 16 15 14 13 12 11 10 09 08 07 06 05 041 03 02 011 00 Not Used 1 CODE1 30 CODE2 3 6 HOME HOMEZ 4 5 Not Used Start of line bit 24 Bit Word 2 23 22 21 20 19 18 17 16 15 14 13 12 11 10 09 08 07 06 05 041 03 02 011 00 a oa oal o aa as aa ani aa an aa aai oa aa aa oi ian na en na el ao ed RE 8 7 6 5 4 3 2 1 MOTOR Set bit 1 Sub type E CIRn SPLINEn CCn TSELn ADISn AROTn IDISn IROTn 24 Bit Word 1 23 122 21 20 19 18 17 lo6 15 14 12 12 11 10 09 08 107 06 0
49. sign extended to 32 bits for a total of 64 bits The data is provided in Intel format with the low address containing the least significant word I19 determines the rate at which this buffer is updated by the PMAC in units of servo cycles 159 determines the highest motor number that will be updated For example I59 1 means only Motor 1 information will be updated I59 2 5 means information will be updated for Motors 1 2 3 4 and 5 159 0 means there will be no update of buffers On line commands GATHER and ENDGATHER enable and disable the Servo data reporting buffer but do not affect the Background data reporting buffer If the GATHER command is issued with 148 0 the data gathering function will start instead of this servo data reporting function This data gathering function could be storing data either in PMAC s main memory or the DPRAM depending on the setting of I45 It is possible to execute both the servo data reporting function and the data gathering function simultaneously After setting 148 to 1 the first GATHER command activates the servo data reporting function described here The second GATHER command also activates the data gathering function that uses 20 to 144 to determine what data is to be gathered The ENDGATHER command stops the function started by the most recent GATHER command If both functions are running two ENDGATHER commands must be issued to stop them both To enable this function 1 Set 119 update per
50. stem Memory Map Most Compatible A os AR 4000 A 0800 O wwo SS SSS Ap gt For DOS Programs etc Recommended memory space a SIN 7050 944K EC000 960K F0000 A System BIOS amp ROM 1008K _ Fco O Starting Address Once you have chosen a used block of memory space you must now configure the DPRAM to start at that address To do this you must write the segment value eight highest order bits of your chosen start address into locations 786 and 787 of PMAC s X memory see I O Memory Map section of PMAC s Users Manual These are special memory locations in PMAC which tell PMAC where in PC memory to locate the DPRAM In addition you also specify using the 20 or 24 bit DPRAM addressing mode The 24 bit addressing mode locates the DPRAM above the 1 megabyte range locations above FFFFF If using an 8086 or an 8088 microprocessor IBM PC XT only use 20 bit addressing and it is limited to configuring the DPRAM for locations FC000 and under In most cases no matter which microprocessor being used AT XT or whatever locating the DPRAM between B0000 and EC000 will be sufficient Note Most will simply use the ConfigurelPC Dual Ported Ram window in the PMAC Executive program to set the address for DPRAM The following section explains how to perform this setup without the Executive program The PMAC Executive program ConfigurelPC Dual Ported RAM screen specifies PC memory ad
51. ster the next cycle Data Format Each 24 bit X or Y register is sign extended to 32 bits For a 48 bit Long register each 24 bit half is sign extended to 32 bits for a total of 64 bits in the DPRAM This data starts immediately after the last address specification register Disabling To disable this function you can set the size register OXO7EC Y D1FB to 0 or simply leave the individual Data Ready bits set Register Map Background Variable Data Buffer PMAC to Host Transfer PMAC to HOST Bit 0 1 for single user mode Data Ready Y DIFA PMAC done updating buffer Host must clear for more data X SDIFA Y D1FB OxO7EE Start of Address Buffer Ex D400 must be D200 to DFFD X D1FB Variable Address Buffer Format 2x16 bit words X Mem Bits 15 Data X Mem Bits 0 2 Ready multi user mode Variable type to read Variable address Data Length 0 Host request data 0 Host request data 0 Host request data PMAC data ready 4 Special Firmware 1 16 PLCC Function Block 64 bits 0 Host request data PLCC Function Block Number Y 9FFF has the base address of the function blocks Dual Ported RAM Automatic Functions 23 PMAC Dual Ported RAM User Manual Background Variable Data Write Buffer The Background Variable Data Write Buffer 1s essentially the opposite of the Background Variable Data Read Buffer described above It allows the user to write to up to 32 user specified registers or particul
52. t it can perform another cycle Multi User Mode Procedure The operation of this mode is very similar to the Single User Mode described above The main difference is that the control word is no longer used as a global handshaking bit for updating the buffer It enables or disables the multi user mode only In multi user mode the control word is never modified by PMAC Handshaking is now on an individual variable basis and is controlled by bit 15 of the variable s data type specifier 22 Dual Ported RAM Automatic Functions PMAC Dual Ported RAM User Manual Each background cycle between each scan of each PLC program PMAC will try to copy data into each variable in the buffer Bit 15 of each variables data type specifier controls whether or not PMAC is allowed to update that particular variable s value PMAC will skip updating any variable that has bit of its data type specifier set to 1 Any variable that has bit 15 set to O will be updated When PMAC is done servicing the buffer it copies 16 bits of the servo timer register X 0000 into the DPRAM at 0x07EA X D1FA This is not dependent upon updating any variables in the buffer When the host wants to read a register it should check to see that Bit 15 of the data type specifier the Data Ready bit has been set If it has the host can begin reading and processing the data from that register When it 1s done it should clear the Data Ready bit to let PMAC know that it can update that regi
53. through the normal bus communications port and saving these values to non volatile memory This should allow the host computer to have direct access to this memory in an open area of its memory space Once the setup has been made successfully the DPRAM registers can be accessed from the PC side with pointer variables The configuration of the DPRAM is done entirely through software Configuring consists of selecting an 16K block byte addressing of unused memory space in your PC This is not necessarily a trivial task Depending on the computer and other accessory cards you may have such as network cards graphic cards etc that use conventional memory space and not I O memory space the available memory space location may vary Think of it as adding a standard memory card to the computer where an address location must be selected in the memory map that no other device in the computer uses If you are unsure about the locations available for DPRAM to use there is menu option ConfigurelPC Dual Ported RAM under the Configure menu in the PMAC Executive Program which can help find an available block of memory space Refer to the PMAC Executive Program Manual for details on how to do this In most cases the available memory space will be found between locations B0000 and ECOOO Usually a system memory map of the PC which is standard for most PCs and compatible is found below 2 Dual Ported RAM Communications PMAC Dual Ported RAM User Manual Sy
54. uffer s end has been reached this index is greater than or equal to the size the DEFINE GATHER command must be issued again to allow gathering to restart 0x0800 D200 Start of Data Gather Buffer not changeable The data format for the Data Gathering to the Dual Port Format is that 24 bit values are sign extended to 32 bits 48 bit values are treated as 2 24 bit values each half is sign extended to 32 bits for a total of 64 bits The data is provided in Intel format with the low address containing the least significant word The variables that control the Data Gathering are as follows I19 determines the rate at which this buffer 1s updated by the PMAC in units of servo cycles I20 to I44 to determine what data PMAC addresses 1s to be gathered 145 determines if the data will be stored in PMAC s main memory or the DPRAM On line commands GATHER and ENDGATHER enable and disable the Data Gathering These commands do not affect the Background data reporting buffer but could affect the Servo fixed data reporting function If the GATHER command is issued with 148 0 the data gathering function will start If the GATHER command is issued with 148 1 the servo fixed data reporting function will start instead of the data eathering function It is possible to execute both the servo fixed data reporting function and the data gathering function simultaneously After setting 148 to 1 the first GATHER command activates the servo fixed data reporti
55. ve a value of SEO to enable the DPRAM chip installed on the PMAC VME and we must modify the value in location X 078C the address width register by adding 80 to the existing value For this example our PMAC register values would be PMAC Address X 0783 X 0784 X 0785 X 0786 X 0787 X 0788 X 0789 X 078A X 078B X 078C The shaded registers above contain the values we changed from example 2 0 to enable DPRAM A simple write command followed by a SAVE command to PMAC will put these values into their appropriate registers and make them permanent WX 0783 39 4 0 7F A0 02 5 A1 10 E0 90 SAVE Remember that these values must be saved with the SAVE command and then the card reset with the command the INIT input line pulled low or power cycled before these new values will take effect After this writing 3F to 7FA121 base 121 will allow us to start using dual ported RAM Using the Dual Ported RAM PC and VME The mapping of memory addresses between the host computer on one side and PMAC s address space on the other side is quite simple Using this memory is a matter of matching the addresses on both sides To PMAC DPRAM simply appears as extra memory in the range D000 to DFFF which can be thought of as 4K of double 48 bit words or 8K of single 24 bit words in both X and Y memory remember X and Y memory in PMAC are 24 bit locations 6 Dual Ported RAM Communications PMAC Dual Ported
56. w 32 bits contains Motor Definition Word high 32 bits contain first word returned on command Motor C S 1 2 3 4 5 6 7 8 Host Address 0x0260 0x02DC 0x0358 0x03D4 0x0450 OxO4CC Ox0548 0x05C4 DOD6 DOFS D114 D133 D152 D171 D099 DOB8 DOD7 DOF6 SDIIS D134 D153 D172 Coordinate System A Axis Target Position User Units Note 1 Motor C S 1 2 3 4 5 6 7 8 3 0x026E Ox02EA 0x0366 0x03E2 0x045E Ox04DA 0x0556 0x05D2 D09B DOBA DOD9 DOF8 D117 D136 D155 D174 6 IS Dual Ported RAM Automatic Functions PMAC Dual Ported RAM User Manual Coordinate System B Axis Target Position User Units Note 1 Motor C S 1 07 8 E Host Address 0x0270 0x02EC 0x0368 0x03E4 0x0460 0x04DC 0x0558 0x05D4 D09D DOBC DODB DOFA D119 D138 D157 D176 Coordinate System C Axis Target Position User Units Note 1 Motor C S 1 2 3 4 5 7 8 mE um Host Address 0x0278 0x02F4 0x0370 OxO3EC 0x0468 OxOAEA 0x0560 Ox05DC A SS lle lee le dle DO9F DOBE DODD DOFC D11B D13A D159 D178 Coordinate System U Axis Target Position User Units Note 1 sas 5 7 8 Host Address 0x0280 0x02FC 0x0378 0x03F4 0x0470 0x04EC 0x0568 Ox05E4 0x0286 0x0302 0x037E OxO3FA 0x0476 Ox04F2 Ox056E OxOSEA PMAC Address DOA0 DOBF DODE DOFD D11C DI3B DI5
57. y Command Structure The first second and third 16 bit words contain the 48 bits of data for the internal 48 bit PMAC command format The fourth word of the 64 bit dual port rotary buffer format is not used in the transfer and is reserved for future use Allowed Rotary Buffer Commands CMD Type Description O0 Singleletter CALL DWELL with floating point data 1 Commands with integer or mask type data In Mrz Pn Qn Mnl Mn Mn amp Mn Code 2 data 14 amp 15 2 N amp O are not used here 1 2 67 70 AAA 71 72 Dual Ported RAM Automatic Functions 31 PMAC Dual Ported RAM User Manual Code 2 3 4 5 7 Code2 om 02 p _ a A 6 PS 0 6 EA 8 a E 2 Mn constant n 0 to 1023 Internal PMAC 48 Bit Command Format This section details the internal structure of the permitted binary commands It is for reference for those designing their own subroutines to create these commands Contact the Delta Tau factory for pre written subroutines that create these commands 32 Dual Ported RAM Automatic Functions PMAC Dual Ported RAM User Manual Command Type 0 Sub type A A thru Z and CALL 24 Bit Word 1 23122 28 20 L9 fell 7 lol ts ia Pepi o pto Oe Loe 07 0G 0S 104 03102 01 600 FLOAT MANTISSA 36 BITS 1 CODE1 1 27 EXPONENT 6 BIT a 1 3 A B amp 27 CALL Note 1 Start ot line bit 24 Bit Word 2 23222 Zo
Download Pdf Manuals
Related Search