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Delta Tau PMAC MINI PCI Reference Manual

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3. J3 JTHW 26 Pin Header EEE ee 269 000000000000 7 Front View Pint Symbol Function Description Notes 1 GND Common PMAC Common 2 GND Common PMAC Common 3 DATO Input Data 0 Input Data Input from Thumbwheel Switches 4 SELO Output Select 0 Output Scanner Output for reading TW Switches 5 DATI Input Data 1 Input Data Input from Thumbwheel Switches 6 SELI Output Select 1 Output Scanner Output for reading TW Switches 7 DAT2 Input Data 2 Input Data Input from Thumbwheel Switches 8 SEL2 Output Select 2 Output Scanner Output for reading TW Switches 9 DAT3 Input Data 3 Input Data Input from Thumbwheel Switches 10 SEL3 Output Select 3 Output Scanner Output for reading TW Switches 11 DAT4 Input Data 4 Input Data Input from Thumbwheel Switches 12 SELA Output Select 4 Output Scanner Output for reading TW Switches 13 DATS Input Data 5 Input Data Input from Thumbwheel Switches 14 SELS Output Select 5 Output Scanner Output for reading TW Switches 15 DAT6 Input Data 6 Input Data Input from Thumbwheel Switches 16 SEL6 Output Select 6 Output Scanner Output for reading TW Switches 17 DAT7 Input Data 7 Input Data Input from Thumbwheel Switches 18 SEL7 Output Select 7 Output Scanner Output for reading TW Switches 19 N C N C No Connection 20 GND Common PMAC Common 21 BFLD N C No Connection 22 GND Common PMAC Common 23 IPLD N C No Connection 24 GND Common PMAC Common 25 5V Output 5VDC Supply Power Supply Out
4. IOCS A 48d oe 14 BRD locs_ A lt lt DO DET VAT 2 BDOO D1 26129 SEE 8001 A 45 4 8P3V D2 44 GND GND BDO2 A 5 C44 D3 43 22 Ba l 6 8003 cas 42 7 1 54 41 YCCA _ VCOB BDO4 A 1 7 0 1 mfd 55 BEES BD05 A 0 1 mfd 39 10 DE 38 GND GND 711 BDOG A 7 D7 37 26 B6 12 8007 58 36 B 173 8008 D9 35 8 88 14 BD09 A 34 15 8P3V 510 GND SND BD10 A 5 7 cag 511 32 410 10 47 BD11 car 31 18 512 19 BDi2 7 0 1 mfd D13 25 12 B12 70 BD13 A 0 1 mfd 28 21 514 27 GND GND 27 BD14 A T D15 zo 14 B14 23 BD15 252 15 B15 24 BRD OE2 T R2 IDT74FCT164245TPA TSSOP48 U16 48d og ml BRD D16 47 OE1 TRI 2 BD16 A D17 26129 80 3 BD17_A 45 4 F3P3V 518 44 GND SND 5 BDi8 A BV 7 D19 2 Ba 18 BDi9 A cag 42 7 1 D20 41 VCCB BD20 A 7 0 1 mfd D21 a0 At BEES 8021 0 1 mfd 39 10 522 38 GND GND 711 8622 T D23 37 AS BS 72 BD23 A BAOO 36 13 BAOO BAO1 35 8 BA 14 BA 34 H 8P3V BAOZ ONE ND 16 BAO2 A 32 A1 B11 7 RASTA es 04 30 BAO4 GAGA A 0 1 mfd BX Y 29 12 812 70 BX Y A BROA 0 1 mfd TAIZ 27 GND GND 55 BATZ B 357 LA12 LA13 26 14 B14 23 BA13 B LA13 25 15 815 54 T R2 IDT74FCT164245TPA Schematic
5. E I EE 32 JI JDISP I4 Pin Hedder item t dec dy eat et ee ee ese as 32 J3 26 Pin Header eot 33 J4 JRS232 I0 Pin Header e e e ette oe 34 J5 JOPT 34 PIn Connector ii E ee MI 34 JT JST 102 Pin Header iride ere ee ee Reh 35 JS JAUX I4 Pin ti tnt ee t rete tg 36 TIL JMACH 60 PinHeadey ica a eres t bao aa Seda Ge ree st de eR De o He deed 37 c c TE 39 JPWR 4 Pin Terminal Block sse a eene entrent teet nnt enne nne 39 JUMPERS AND CONNECTORS LAYOUT eesessesverevneveenenneneenensenensenennennenennennenennensenennenssnennenasnennenssvessenasseneenner 40 SCHEMATICS E on DREAN NN 42 Table of Contents PMAC Mini PCI Hardware Reference Manual INTRODUCTION The PMAC Mini PCI is an inexpensive compact 2 axis version of the PMAC family It can be used in a PC s PCI slot as a half sized board 230 mm 9 long or it can be used as a standalone using serial communications for setup and or application control Programs for the PMAC Mini PCI both motion and PLC are 100 compatible with other versions of PMAC However there are several features unique to the PMAC Mini PCI 1 10 11 There are only two output digital to analog converters DAC1 and DAC2 DAC3 and DAC4 do not exist Both have different
6. Cis 172 12 ADR FO io ri HDBTT AUR A i andi io 77 19 6608Mhz 114 ckusr vesint 120 m HEN io io Heg Hang RAR USBOE io UBR amp DPRCS i 14 167 HDBOS SRD io io He E B5A00 SWR iH i io es CER S i P 17 7 veo andint ez 1 OER io io Her oem HDBOS BUSYR EROR 184 io io AS Ed HDBOS SEMR pcibus_connector HREQ 1512 io He EM INTR i KV CLKOUTR 2015 ia HDBO3 VCC us zo somit 215 vedo eg 14 vea 290 E Kvec 22 gr t 155 18 VEG 2829 25 ae HDBO1 34 GND i 2928 AD m semi X 2 io 17 HDBOO endo 38 GND ET MER 25 i 155 i 7 ad26 KK 3 27 dona 10k308qe240 10k508q0240 gndint 954 RWL TaFP100 ad25 12 28 vocint lo 183 i t v io io BYR A 23 lt SA1 25 122 _ 2423 30 151 2422 saz SE 15 io He adi SA3 a o Hag GEL 2920 sm T 35 io 548 BUSYLS adio 5 UBL SAT 36 io 145 t ad16 SAT 32 io gndint 44 BSA12 ad15 ar vecio io 143 BSATT E ve 2 38 ca is pis E m ERAS o TERESET a013 sao Sig o ASELO 0 9 adi2 ENT SATI 41 19 140 Fe e EE 19 6608Mh E SCLK adii A11 BSA08 35Khz 1 z
7. 11 11 RP35A peux 200 peks J 4 330SIP81 u36 AN DCLK 1 8 md ANODEH vec EN AC DATA 4 2 CATHODERA vor H oper 4 je TA SA 1AV P35B 4 is pAGOUT amp DAGOUT we pw Be ees IBI opaTA NT 1 2 As _ 35 3305 4 var 1KSIPEI 10K AsELO ANODEH2 GND 1 OSELO 2 15 2 bse 1 1 ASELO HCPL 2630 i ys 1 AD822AR cne 7 5 PN LF347M RP38A 1 ens ODATA 9 vor 14 PA RP37B tage gt 1 2 DACI 11 ASELI 4 4 RP368 EN 22051 pi AEE 4 13 Af 3 4 EE byg 5014 ASEL1 9 10 9350 1 8 0 1 mtd NRL t fou ASELI lt lt IND ANODE 1 vec 1KSIPBI 8014 33051P8I Slog 2 47 mid tani 1 2 1 OSELO GND CATHODER vor ostio 6 ne T MC34C87D 5016 3 6 OSELO 5 CATHODE 2 7 10 AT R38 t 1 RP38B 5 DGND VOR mtem Ra 7 89370 8 10KSIPSI aie 4 ANODEH2 END 3 4 DACT 0 1 mid HCPL2830 Ver vs 5K POT 22081P81 ADTESER C122 50116 as 014 04 md z NS 10 mfd tanl ceramic 1 3 015 9 R44 R45 2670 150k assy uate 1 138580 2 004 al HK A
8. 17 E17D Motors 1 4 Amplifier Enable Polarity Control Jumpers E17A through E17D control the polarity of the amplifier enable signal for the corresponding motor to 4 When the jumper is on default the amplifier enable line for the corresponding motor is low true so the enable state is low voltage output and sinking current and the disable state is not conducting current With the default ULN2803A sinking driver used by the PMAC on U44 this is the fail safe option allowing the circuit to fail in the disable state With this jumper off the amplifier enable line is high true so the enable state is not conducting current and the disable state is low voltage output and sinking current This setting is not recommended Warning Hardware Setup 7 PMAC Mini PCI Hardware Reference Manual A wrong setting of these jumpers will damage the associated output IC E101 E102 Motors 1 4 AENA EQU Voltage Configure U37 driver IC controls the AENA and EQU signals of motors 1 4 With the default sinking output driver IC ULN2803A or equivalent in U44 these jumpers must connect pins 1 and 2 to supply the IC correctly If this IC is replaced with a sourcing output driver IC UDN29814 or equivalent these jumpers must be changed to connect pins 2 and 3 to supply the new IC correctly Resistor Pack Configuration Termination Resistors The PMAC provides sockets for termination resistors on differential input pairs coming into th
9. o000000000800001 0000909000000 01 9000080000000 DPRAM Option 2 s00 000 00000068 VIF Option 15 JUMPERS AND CONNECTORS LAYOUT 6600000000000 0600000000000 yE a dl Jumpers and Connectors Layout 40 PMAC Mini PCI Hardware Reference Jumpers and Connectors Layout 41 Mini PMAC Hardware Reference Manual SCHEMATICS
10. 22 81 05 0 J4 JRS232 Serial Communications 1 Two 10 pin female flat cable connector Delta Tau P N 014 ROOF10 0K0 T amp B Ansley P N 609 1041 2 171 10 T amp B Ansley standard flat cable stranded 26 wire 3 Phoenix varioface module type FLKM 34 male pins P N 22 81 06 3 45 JOPT OPTO I O 1 Two 34 pin female flat cable connector Delta Tau P N 014 R00F34 0K0 T amp B Ansley P N 609 3441 2 171 34 T amp B Ansley standard flat cable stranded 34 wire 3 Phoenix varioface module type FLKM 34 male pins P N 22 81 06 3 J7 JS1 A D Inputs 1 4 1 Two 16 pin female flat cable connector Delta Tau P N 014 ROOF16 0K0 T amp B Ansley P N 609 1641 16 2 171 16 T amp B Ansley standard flat cable stranded 16 wire 3 Phoenix varioface module type FLKM 16 male pins P N 22 81 03 4 J8 JAUX Auxiliary 1 Two 14 pin female flat cable connector Delta Tau P N 014 ROOF14 0K0 T amp B Ansley P N 609 1641 14 2 171 14 T amp B Ansley standard flat cable stranded 14 wire 3 Phoenix varioface module type FLKM 14 male pins J11 JMACH Machine Connector 1 Two 60 pin female flat cable connector Delta Tau P N 014 ROOF60 0K0 T amp B Ansley P N 609 6041 available as ACC 8P or 8D 2 171 60 T amp B Ansley standard flat cable stranded 60 wire 3 Phoenix varioface module type FLKM 60 male pins P N 22 81 09 2 Note Normally J11 is used with Acc 8P or 8D with Option P which provides complete terminal strip fan out of all connections TB4 JPWR
11. 26 INIT Input PMAC Reset Low is Reset The JTHW multiplexer port provides eight inputs and eight outputs at TTL levels While these I O can be used in un multiplexed form for 16 discrete I O points most will utilize PMAC software and accessories to use this port in multiplexed form to multiply the number of I O that can be accessed on this port In multiplexed form some of the SELn outputs are used to select which of the multiplexed I O are to be accessed See also I O and Memory Map Y FFC1 Y FFC2 Suggested M variables M40 M58 M variable formats TWB TWD TWR TWS Acc 8D Opt 7 Acc 8D Opt 9 Acc 18 Acc 34x NC Control Panel Connector Pinouts 33 PMAC Mini PCI Hardware Reference Manual J4 JRS232 10 Pin Header 90 9 6 109 e e e 02 Front View Pin Symbol Function Description Notes 1 PHASE Bidirectional Receive Transmit Phase Clock Check Jumpers E10 E8 and E9 2 PHASE Bidirectional Data Term Ready Tied to DSR or DTR 3 TXD Input Receive Data Host Transmit Data 4 CTS Input Clear to Send Host Ready Bit 5 RXD Output Send Data Host Receive Data 6 RTS Output Request to Send PMAC Ready Bit 7 SERVO Bidirectional Data set Ready Tied to DTR or DSR 8 SERVO Bidirectional Receive Transmit Servo Clock Check Jumpers E10 E8 and E9 9 GND Common PMAC Common 10 5V Output 5VDC Supply Power Supply Out The JRS232 connector provides the PMAC
12. E87 E88 Analog Power Source Configuration essere 25 E89 Amplifier Supplied Switch Pull Up Enable sess 26 E90 Host Supplied Switch Pull Up Enable 26 E98 DAC ADC Clock Frequency 2 2 esses nennen nennen 26 E101 E102 Amplifier Enable Output Configure sss enne nennen nnne nnns 27 E110 E115 V F Converter Configuration esee enne enne enne ennt nenne nnns 27 E116 E119 Converter 28 MATING 30 JDISP Display R 30 2 01 ense teen enne nette 30 SLEW Multipl ener rm 30 JRS232 Serial Communications eee eese esent nette tentent trennt tren retener innen eret enne 30 JSJOPTVOPTO IO E Diana ERE ROT E Fa E EVE se ERE 30 J7 JSIJ A D ankesaken ananasen 30 IS JAUX Atri hary I O EEE 30 JII JMACH Machine Connector 30 TBI JPR scele arte d cape dr 30 CONNECTOR citet 32 Headers
13. in U44 socket 100 mA per point sinking sourcing capability 4 Function of this signal determined by Ix02 and Ix25 5 Can be tied to Encoder 3 or 4 feedback with jumpers see E111 E112 E114 E115 6 With jumper E89 ON tied to A 15V from J11 pin 59 with E89 OFF and E90 at 1 2 can be separate 12V to 24V for input flags HMFLn PLIMn MLIMn with sinking drivers or OV for input flags with sourcing drivers 36 Connector Pinouts PMAC Mini PCI Hardware Reference Manual J11 JMACH 60 Pin Header Top View Eo ecc eee et Pin Symbol Function Description Notes 1 5V Output 5V Power For Encoders 1 2 T5V Output 5V Power For Encoders 1 3 GND Common Digital Common 4 GND Common Digital Common 5 CHC3 Input Encoder C Ch Pos 2 6 CHC4 Input Encoder C Ch Pos 2 7 CHC3 Input Encoder C Ch Neg 2 3 8 CHC4 Input Encoder C Ch Neg 23 9 CHB3 Input Encoder B Ch Pos 2 10 CHB4 Input Encoder B Ch Pos 2 11 CHB3 Input Encoder B Ch Neg 2 3 12 CHB4 Input Encoder B Ch Neg 2 3 13 CHA3 Input Encoder A Ch Pos 2 14 CHA4 Input Encoder A Ch Pos 2 15 CHA3 Input Encoder A Ch Neg 2 3 16 CHA4 Input Encoder A Ch Neg 2 3 17 CHCI Input Encoder C Ch Pos 2 18 CHC2 Input Encoder C Ch Pos 2 19 CHC1 Input Encoder C Ch Neg 2 3 20 CHC2 Input
14. 2 Et AcHe 4 i rS PINE 7 3 T Acum 1 MEL Mus Mattis dica H eee 2 1 t ACRE 4 i i ESO l CMS aKsiPal NEC 1 RP27 10KSIP10C mer HOMES HOME LER T puma KELMA gt m 4 RP32 MLM 4 j Bic 5 1 1 i 5 5 arr RECTE 4 ica LE EI 2 ON SOLDER SIDE PLANE WIPER1 WIPER2 03 0 Vw Raw 14689 2 E89 E90 DGND PLANE 5 N 508 SELVE 52 8 ete cra 10 LF347M RP38C NFT esos Dec 6 pacz AGND PLANE 0390 14 3 vve 91 22051 8 7 Sea 13 10KSIP8l 5014 cus RP38D i el o om 5K POT av RP4
15. 24 Result of the analog conversion The range of M34 is from 0 to the I10 value proportional to the 0 10V range on the analog input 41 M35 gt X 50727 24 Result of the analog conversion The range of M35 is from 0 to the I10 value proportional to the 0 10V range on the analog input 2 General Configuration for Step and Direction Outputs Set the appropriate jumpers as shown in the diagrams below Wire the PULSEn and AENAn DIRn open collector outputs on the JAUX connector to the stepper drive inputs with AGND as the reference Tie the DACn output to the WIPERn input by putting the jumper on Select the desired frequency range with the two jumpers for the channel If true open loop operation is desired tie the PULSEn output to the CHAm input with the jumper and tie the AENAn DIRn output to the CHBm input otherwise leave these jumpers off If true open loop operation is desired set up the encoder channel for pulse and direction decode by setting I910 or I915 to 4 otherwise use as normal for real encoder feedback If true open loop operation is desired and the 0 2 MHz frequency range is selected set I911 1 or 1916 1 This will disable the digital delay filter for Encoder 3 or Encoder 4 respectively Put the PMAC output channel in magnitude and direction mode by setting bit 16 of Ix02 to 1 and bit 16 of Ix25 to 1 Choose the appropriate simulated or real encoder for the motor s feedback loop by setting Ix03 and Ix04 to the address
16. 3 to apply GND to input reference resistor sip pack This will bias MII to MIS inputs to GND for off state input must then be pulled up for on state 5V to 24V E Point Jumper Descriptions 19 PMAC Mini PCI Hardware Reference Manual E8 E10 Synchronizing PMAC clocks CARDO E Point and Location Description Default Physical Layout E8 C1 Jump pin 1 2 for NULL modem connection No jumper installed 11278 connects to DSR Jump pin 2 3 for differential Phase signal PHASE E9 C1 Jump pin 1 2 for NULL modem connection No jumper installed 1 2 3 DTR connects to DSR Jump pin 2 3 for differential Servo signal SERVO E10 1 Jump pin 1 2 to select to receive external No jumper installed Note Jumpers E8 and E9 must have the same settings E10A E10C Flash Firmware Bank Select BE E Point and Location Description Default Physical Layout E10A G2 Flash firmware bank select jumper 1 No jumper installed E10B G2 Flash firmware bank select jumper 2 No jumper installed G2 Flash firmware bank select jumper 3 No jumper installed E11 E14 Encoder Single Ended Differential Select note REv 103 and above E Point and em Physical Layout Location Description Default E11 Jump pin 2 to 3 to obtain differential 1 2 Jumper installed 8 E12 5 E13 8 E14
17. Control 3 E Display Control 4 E44 Jumper E44 5 E45 Jumper E45 6 E46 Jumper E46 7 E47 Jumper E47 Y FFC6 Dedicated Use 0 E48 Jumper E48 1 49 49 2 50 Jumper E50 3 E51 Jumper E51 4 PWR GUD Power Supply Detect 5 Reserved for future use 6 Reserved for future use 7 Reserved for future use 10 Hardware Setup PMAC Mini PCI Hardware Reference Manual Hardware Setup 11 PMAC Mini PCI Hardware Reference Manual OPTION 15 VOLTAGE TO FREQUENCY CONVERTER When the PMAC Mini PCI Option 15 is ordered the following components are installed on board at the factory WIPER1 AGND WIPER2 AGND PULSE1 PULSE2 DIR1 9 9 9 9 eee eo 00009 BRR 00060000 DAC1 E110 DAC2 Analog Circuit E113 606000060900000006090 000000000000000 0690000020009 5 5 AENA1 DIR1 AENA2 DIR2 Configuration as Analog Input with a 0 100 kHz Frequency Range Jumpers Setting Input 1 Input 2 E110 111 112 116 117 113 114 115 118 119 ON ON ON OFF ON ON ON ON Software configuration to be typed in the terminal window 50724 5400722 1280 50726 5400723 1280 1910 4 1915 4 34 gt 50725 24 35 gt 50727 24 12 M se se Timebase Encoder Conversi
18. E102 Amplifier Enable Output Configure E Point and Location Description Default Physical Layout E100 B2 Jump pin 1 to 2 to apply A 15V from J11 pin 59 to pin 1 of 1 2 Jumper E101 pin 3 of E102 and FAULT input flag return This installed makes U44 AENA EQU PULSE DIR FEFCO driver IC work from analog A 15V supply Jump pin 2 to 3 to apply A V 12 24V from J8 pin 13 to pin I of E101 pin 3 of E102 and FAULT input flag return This makes U44 AENA EQU PULSE DIR FEFCO driver IC work from separate A V 12 24V supply This cannot be used when A V is brought from digital side through E85 E101 B2 Jump pin I to 2 to apply A 15V A V as set by E100 to pin 1 2 Jumper 11 of U44 AENAn and EQUn driver IC should be installed ULN2803A for sink output configuration Jump pin 2 to 3 to apply GND to pin 11 of U44 should be UDN2981A for source output configuration E102 B2 Jump pin 1 to 2 to apply GND to pin 11 of U44 AENAn and 1 2 Jumper EQUn should be ULN2803A for sink output configuration installed Jump pin 2 to 3 to apply A 15V A V as set by E100 to pin 11 of U44 should be UDN2981A for source output configuration Note E100 E101 and E102 must number in the same direction E110 E115 V F Converter Configuration Voltage to Frequency Converter Option OPT 15 Required E Point and Location Description Default Physical Layout E110 B1 Jump p
19. FAULTS FAULTS MLIM3 MLIMA MPLS HMFLE DAG2 DACT DAC2 AENATDIRT AENAZIDIRZ FAULTT FAULTZ MLIMT PUMI PLIM2 HMFLT HMFLZ TEFCO AGND A 18VO 1 A 15V MBRS14073 MBRS140T3 INTERFACE TO ACC28A ACC28B DGND PLANE DGND HEADER 16 PLANE ELTA TAU DATA SYSTEMS Inc Mini Pmac MACHINE INTERFACE SECTION Pze Document Number 603712 320 Tuesday May 07 2002 Ener 5 oi amp 45
20. Input 1 Input 2 E110 E112 E116 E117 E113 5 8 119 ON OFF OFF OFF OFF ON OFF OFF OFF OFF 14 Option 15 Voltage to Frequency Converter PMAC Mini PCI Hardware Reference Manual Option 15 Voltage to Frequency Converter 15 PMAC Mini PCI Hardware Reference Manual SUGGESTED I O M VARIABLE DEFINITIONS General Purpose Inputs and Outputs M1 gt Y SFFC4 0 1 Machine Output 1 2 gt 5 4 1 1 Machine Output 2 M3 gt Y SFFC4 2 1 Machine Output 3 M4 gt Y SFFC4 3 1 Machine Output 4 5 gt 5 4 4 1 Machine Output 5 6 gt 5 4 5 1 Machine Output 6 7 gt 5 4 6 1 Machine Output 7 M8 gt Y SFFC4 7 1 Machine Output 8 M9 gt Y SFFC4 0 8 U Machine Outputs 1 8 treated as byte 11 gt 5 0 1 Machine Input 1 M12 gt Y SFFC3 1 1 Machine Input 2 13 gt 5 2 1 Machine Input 3 14 gt 5 3 1 Machine Input 4 M15 gt Y S FFC3 4 1 Machine Input 5 M16 gt Y S FFC3 5 1 Machine Input 6 M17 gt Y SFFC3 6 1 Machine Input 7 M18 gt Y SFFC3 7 1 Machine Input 8 19 gt 5 0 8 0 Machine Inputs 1 8 treated as byte Thumbwheel Port Bits Can be Used as General Purpose I O These definitions are valid for PMAC Mini PCI only M40 gt Y SFFC2 0 1 SELO Output
21. LH adio sa T 44 graint io Ha BSAO7 LESSE Exp 19 6608Mhz Cuan 9 ado SA12 r io 37 BSADG TETUR Eo 384 SA13 SAT 45 935 BSADS 24576 10k 2 ad END SA14 20 515 46 9 io 135 12288Mhz ere 6 206 SATS ra M 454 1 BSA0A clock phaseb ads R13 c76 500 25 vccint io 133 7 soo io 2000 LA mta tant 800 057 aa eru Esa Be e E ad 1 16V int vccio int vedo 501 90 502 50 ADT gt o cs TANT 555 553 51 0 sam 1 59 e 88 a E 10 tantceramic ax 4 210 aca T 2 2 6 304 gt 55 33 io io 32 BAOT A PHASE int vecio TANT RIS RIS 804 A oe aoe PINSE RIT 10k 555 555 55 io 126 SERVO Een 1210 306 07507 55 ona 325 I nce RPM 124 10KSIP10C ims pei 123 sel 243 par 2 3 st 122 par 2 our i Tata 121 nconfig xs 234 _ frames OR LM1117MPX ADJ a framed _ MC33269ST ADJ RI PP sss 555555555 FS ES cre Bg 507 223 int vecio AR 47 midtant 04 mia Pss sa pu ground pm ET aR 225 EQU 2 ber PSE 5 EaU int vecint 1 4 4 4 int_ground 8001 R19 framet 00 818 8000 D
22. M41 gt Y SFFC2 1 1 SEL1 Output M42 gt Y SFFC2 2 1 SEL2 Output M43 gt Y SFFC2 3 1 SEL3 Output M44 gt Y SFFC2 4 1 SEL4 Output M45 gt Y SFFC2 5 1 SEL5 Output M46 gt Y SFFC2 6 1 SEL6 Output M47 gt Y SFFC2 7 1 SEL7 Output M48 gt Y SFFC2 0 8 U SELO 7 Outputs treated as a byte 50 gt 5 0 1 DATO Input 51 gt 5 1 1 DAT1 Input 52 gt 5 2 1 DAT2 Input 53 gt 5 3 1 DAT3 Input M54 gt Y SFFC1 4 1 DAT4 Input 55 gt 5 5 1 DAT5 Input 56 gt 5 6 1 DAT6 Input 57 gt 5 7 1 DAT7 Input M58 gt Y SFFC1 0 8 U DATO 7 Inputs treated as a byte 16 Suggested I O M Variable Definitions PMAC Mini PCI Hardware Reference Manual Suggested I O M Variable Definitions 17 PMAC Mini PCI Hardware Reference Manual E POINT JUMPER DESCRIPTIONS Reserved for Future Use E Point and Location Description Default Physical Layout EO F1 Reserved for future use No jumper HI2 installed Warning The jumper setting must match the type of driver IC or damage to the IC will result E1 E2 Machine Output Supply Voltage Configure E Point and Location Description Default Physical Layout 1 1 Jump pin 1 to 2 to apply V 5V to 24V to pin 10 1 2 Jumper of U55 should be ULN2803A for sink output installed EGG configuration JOPTO Machine outputs 01 08
23. for normal power up reset installed 24 E Point Jumper Descriptions PMAC Mini PCI Hardware Reference Manual E85 E87 E88 Analog Power Source Configuration E Point and Location Description Default Physical Layout E85 E3 Jump pin 1 to pin 2 to allow analog V to come from No jumper digital side TBI ties amplifier and PMAC 112 Mini PCI power supply together defeats opto isolation E88 Remove jumper to keep analog V separate from digital 12V 112 E87 Note If E85 is changed E88 and E87 must also be changed Also see E90 E85 E87 E3 Jump pin 1 to pin 2 to tie analog common AGND to No jumper digital common GND defeats opto isolation 112 E88 Remove jumper to keep AGND and GND separate Note If E87 is changed E85 and E88 must also be changed 112 E87 Also see E90 112 E88 E3 Jump pin 1 to pin 2 to allow analog V to come from No jumper digital side Plor ties amplifier and PMAC 112 Mini PCI power supply together defeats opto isolation Ees Remove jumper to keep analog V separate from digital 12V 112 E87 Note If E88 is changed E85 and E87 must also be changed 1 2 Also see E90 E85 E Point Jumper Descriptions 25 PMAC Mini PCI Hardware Reference Manual E89 Amplifier Supplied Switch Pull Up Enable to DACs and ADCs Impo
24. per channel or differential two signal lines main and complementary per channel REV 102 and below The selection of the type of encoder used either single ended or differential is made through resistor packs configurations and not through jumper configurations RP13 RP14 RP20 and RP21 REV 103 and above The selection of the type of encoder used either single ended or differential is made through jumper configurations E11 E12 E13 and E14 Single Ended Encoders With the jumper for an encoder set for single ended the differential input lines for that encoder are tied to 2 5V the single signal line for each channel is then compared to this reference as it changes between 0 and 5V When using single ended TTL level digital encoders the differential line input should be left open not grounded or tied high this is required for The PMAC differential line receivers to work properly Differential Encoders Differential encoder signals can enhance noise immunity by providing common mode noise rejection Modern design standards virtually mandate their use for industrial systems especially in the presence of PWM power amplifiers which generate a great deal of electromagnetic interference Connect pin I to 2 to tie differential line to 2 5V e Tie to 2 5V when no connection e Tie to 2 5V for single ended encoders Connect pin 2 to 3 to tie differential line to 5V e Don t care for differential line driver encoders Tie t
25. 0 1 2 0 1 mfd 10KSIP10C 129 aena 1 KANAL pA 2 S614 UAB 1 AENA 2 4 i MENA 2 lt ter Moe z 801 a70siPt0c i vage ANAS um Tr HS 19702 4 x 8014 5 FI 3 TARTS ie amp E2 AENA 4 12 yan 5 12 REG 4 amp N rap T 33KSIP10C NEM o S014 t H 10 1 AENASIDIRI ed zw uty pi I Four PSEDTANEC iw outs Big E uS 2 18 5 Pi PULSET SJAL PE AEN PU 5 NS ours Bs PULSE EQU 1 212 y2 pi T Q 1 H ING Brg 14 au 7 5 Bis 2 e 831 FEFCO EQU2 vb Enur 4 0 1 INS b31 EQU 3 Eau 3 5 A5 Y5 pit 3 GND Vt 10 EQU 3 Eau 4 D 1 52701 1 102 AQUA SS 6 Ye pu ULRZSOSA WOO s wo OR z100 E 2 UDNZSB1A 19 20 e102 bIP18 1 495 IN SOCKET E101 EDI GND p 74 540 H 4 0120 4 1 ansv ES i 022 023 122 AMPA pee AGND PLANE EQU1 EQU2 AENATUDIRT AENAZIDIRZ PULSET PULSE2 FEFCO HEADER 7X2 Ld AGND AW 6602 EQU1 KEQU2
26. 00 data items per second are to be passed between the controller and the host computer in either direction e Option 2 provides an 8k x 16 bank of on board dual ported RAM The key component on the board is U20 located at the back of the board Part number 302 603712 OPT Option 5xF CPU Speed Options The base PMAC Mini PCI has a 40 MHz DSP563xx CPU This is Option 5AF that is provided automatically if no CPU speed option is specified e Option SAF 40 MHz DSP563xx CPU 80 MHz 56002 equivalent This is the default CPU speed Part number 5AF 603712 OPT Option SCF 80 MHz DSP563xx CPU 160 MHz 56002 equivalent Part number 5CF 603712 OPT e Option 5EF 160 MHz DSP563xx CPU 320 MHz 56002 equivalent Part number SEF 603712 OPT Hardware Setup PMAC Mini PCI Hardware Reference Manual Option 6 Extended Servo Algorithm Firmware e Option 6 provides an Extended Pole Placement Servo Algorithm firmware instead of the regular servo algorithm firmware This is required only in difficult to control systems resonances backlash friction disturbances changing dynamics Part number 306 00PMAC OPT Option 6L Special Lookahead Firmware e Option 6L provides a special lookahead firmware for sophisticated acceleration and cornering profile execution With the lookahead firmware PMAC controls the speed along the path automatically but without changing the path to ensure that axis limits are not violated Part number 3L6 00PMAC OP
27. 1 4 terminal block Phoenix Connector MKDS41 3 5 30 Mating Connectors PMAC Mini PCI Hardware Reference Manual Mating Connectors 3l PMAC Mini PCI Hardware Reference Manual CONNECTOR PINOUTS Headers J1 JDISP 14 Pin Header Front View Pin Symbol Function Description Notes 1 Vdd Output 5V Power Power Supply Out 2 Vss Common PMAC Common 3 Rs Output Read Strobe TTL Signal Out 4 Vee Output Contrast Adjust VEE 0 to 5VDC 5 E Output Display Enable High is Enable 6 R W Output Read or Write TTL Signal Out 7 Display Data 1 8 DBO Output Display Data 0 9 DB3 Output Display Data 3 10 DB2 Output Display Data 2 11 DB5 Output Display Data 5 12 DB4 Output Display Data 4 13 DB7 Output Display Data 7 14 DB6 Output Display Data 6 The JDISP connector is used to drive the 2 line x 24 character Acc 12 2 x 40 Acc 12A LCD or the 2 x 40 vacuum fluorescent ACC 12C display unit The DISPLAY command may be used to send messages and values to the display See Also Program Commands DISPLAY Accessories Acc 12 ACC16D Memory Map Y 0780 07D1 Note There is no J2 JPAN control panel connector on PMAC Mini PCI Controlled by potentiometer R57 32 Connector Pinouts PMAC Mini PCI Hardware Reference Manual
28. 200 E47 are all on Jumpers E44 E47 control what baud rate is used for serial communications Any character received over the bus causes PMAC to use the bus for its standard communications The serial port is disabled if E points E44 These jumpers are read only at power up reset to set the baud rate at that time Currently Flex CPU s communication baud rate is determined at power up reset by variable I54 Non standard baud rate E48 Reserved for future use 12 E Point and Location Description Default Physical Layout E48 E2 Reserved for future use No jumper installed E Point Jumper Descriptions 23 PMAC Mini PCI Hardware Reference Manual E49 Serial Communications Parity Control E Point and Location Description Default Physical Layout E49 E2 Jump pin to 2 for no serial parity remove jumper for Jumper installed _ 112 odd serial parity E50 EAROM Save Enable Disable E Point and Location Description Default Physical Layout E2 Jump pin 1 to 2 to enable save to EAROM or flash Jumper installed memory remove jumper to disable save to EAROM or flash memory E51 Normal Re Initializing Power Up B E Point and Location Description Default Physical Layout E51 E2 Jump pin to 2 to re initialize on power up reset No jumper 12 remove jumper
29. 37 38 Q 39 40 41 42 Q 43 44 46 48 50 BDO1 8003 8005 8007 8009 8011 8013 8015 8017 BD19 BD21 BD23 BAO1 BX Y CS3 voo joojoo CS3 506 512 CS16 BA13 B BRD B B I MEE RK WAIT2 HEADER 25X2 BDOO A BD02 A BD04 A BDO6 A BDO8 A BD10 A BD12 A BD14 A BD16 A BD18 A BD20 A BD22 A CS00 CS0 BDOO A BDO1 A BD02 A A BDO4 A BDO5 A BDOS BDOG_A BDO7_A BDOS A BD0B A BD0S A ELA BD10 A BDIT A BPA BD12 A BDi3 A Bote BDi4 A BD15 A BDI BD16 A BD17 BD18 A BDi9 A Boi BD20 A BD21_A BD22 A BD23 A CS00 z CS0 1 lt VMECS KVMECS DPRCS lt 2PRES Delta Tau Data Systems Inc itle mini PMAC1 ize c Document Number 603712 320 ev ate Tuesday May 07 2002 Sheet 2 of 43 Mini PMAC Hardware Reference Manual 44
30. 4 35 BDIS A BD06 A HDB14 H 10 10 151 VO A8R 33 BDi4 A T t t BDOS 811014 148 32 BDA 7 045 VO TIR z m 0 10 128 55 1 dila y ad ain ka 002 EY 5 VO MR 25 Ld ed 5 E 001 3 10 10 10108 25 05 E 34 ks 5 10 09 vooor 6001 12288Mhz q BDA HOB 1 39 O 08L vo osr 27 EEN 0 1 mid int vesio S ees i voor 10 078 int vecio int vecio int vecio rm VOR 9 t 10 061 0 058 022 022 mid 022 mf 10 048 022 mf 10 03 UO 03R i LI 1 R Ro R10 int vecio 10 02 110 028 i nooit VO 01R 10k 10 008 T 4 Sussspeosooosgsssesoopoogrucp9S999999999 9999999999999955 E 2 sr JARL MUR 0 22 mid 0 22 0 22 mid tok pci 11252222825 835 8 S28 55 FE Syq He data0 dk o Jan aur cn I UI re 5 5 5 8 HA EN ER nce xt OBR f wept ales ps ADR E cb veeint 4 AGR VMECS 3 ECS 616 io 72 HDB AOSR DPRBSY ie lo 973 HDBTS 022 mtd 022 mid 022 mf penas E io MR
31. 5 encoder input mode encoder input mode 2 5V This will bias encoder negative inputs to VCC SV Jump pin 1 to 2 to obtain non differential This will bias encoder negative inputs to 1 2 VCC E Point Jumper Descriptions PMAC Mini PCI Hardware Reference Manual E17A E17D Amplifier Enable Direction Polarity Control E Point and Location Description Default Physical Layout E17A A3 Jump 1 2 for high TRUE No jumper installed Remove jumper for low TRUE AENAI E17B A3 Jump 1 2 for high TRUE AENA2 No jumper installed Remove jumper for low TRUE AENA2 8 17 Jump 1 2 for high TRUE AENA3 No jumper installed Remove jumper for low TRUE AENA3 8 E17D A3 Jump 1 2 for high TRUE AENAA No jumper installed Remove jumper for low TRUE AENA4 8 Low true enable is the fail safe option with the default sinking open collector ULN2803A output driver IC in U44 If 044 is replaced with a UDN2981A sourcing driver IC and E101 and E102 are changed high true enable is the fail safe option E19 Watchdog Disable E Point and Location Description Default Physical Layout E19 F1 Jump pin 1 to 2 to disable Watchdog timer for No jumper installed 112 test purposes only Remove jumper to enable Watchdog timer E20 E22 Flash Firmware Bank Select E Point and Location Description Lese P
32. 57 OohmSIP8l SELO BWR A lois 55 17013 ENE 7 DAT1 BAOO A 1913 54 1012 p SELI ves 53 DATZ BAO1 A i LER T 1011 i BAOZ A lio VOTO DATS RESET 50 17009 T SEL3 RESET NT 2 109 49 17008 T DATA E44 EO 108 728 ET E45 t 17000 151 17007 T DATS 17001 197 1 006 1KSIP10C 1KSIP10C t SELS 1 002 105 1 45 1 005 7 DATS 17003 195 44 17004 SELG 43 SHE n vss amp U51 1 SEL IOGATE PLCC84 ioe H c 1 041 don 2 0 1 mfd 1a2 162 Hi o o r EN o e vad gnd s vss 1b3 Ma Vee NOTE BE 20 168 DB1 HEADER 26 gnd gnd DBO 157 158 2a1 251 DBS 5V 2a2 2 Da ae gnd gnd DB7 2a3 2b3 DB6 7 2a4 204 1UF Dee HEADER 14 c39 a5 255 2 6 256 t 5 gnd gnd ptionally stu ohm x 9 gr gnd optionally stuff zero ohm re aur Eu aur 2a8 2b8 2oe 2dir Ed E7 2 cn c2 5 o 4 is _ 1UE 74ac16245DL 2 Hos E c1 C2 i 1 C150 9 3 3KSIP10C lt lt TXD TXD H RXD EE RxD 13 pt 5 dz 8 5 RP55 5 RP51 1 2 lt lt RTS RIS H CTS 3 4 lt lt Od crs cts 9 10 6 5 10KSIP8l 7 8 18 8 7 RP52 1 2 1 EN HEADER 10 3 4 0 BOX RP56 OohmSIP8l 5 6 i 10 51 8 7 8 7 gt 1 1384 5 u62 o amp MI2 SOLE GND A gt E9 5V 2 i 3 C N
33. 85 E87 E88 Analog Circuit Isolation Control These jumpers control whether the analog circuitry on the PMAC is isolated from the digital circuitry or electrically tied to it In the default configuration these jumpers are off keeping the circuits isolated from each other provided separate isolated supplies are used E89 E90 Input Flag Supply Control If E90 connects pins I and 2 and E89 is on the input flags LIMn LIMn HMFLn and FAULTn are supplied from the analog A 15V supply which can be isolated from the digital circuitry If E90 connects pins 1 and 2 and E89 is off the input flags are supplied from a separate A V supply brought in on pin 13 of the J8 JAUX connector This supply can be in the 12V to 24V range and can be kept isolated from the digital circuitry If E90 connects pins 2 and 3 the input flags are supplied from the digital 12V supply and isolation from the digital circuitry is defeated E100 AENA EQU Supply Control If E100 connects pins 1 and 2 the circuits related to the AENAn EQUn and FAULTn signals will be supplied from the analog A 15V supply which can be isolated from the digital circuitry If E100 connects pins 2 and 3 the circuits will be supplied from a separate A V supply brought in on pin 13 of the J8 JAUX connector This supply can be in the 12V to 24V range and can be kept isolated from the digital circuitry Clock Configuration Jumpers E3 E6 Servo Clock Frequency Control The jum
34. 9 A 15V OPT V Input Analog 15V Supply 60 A 15V Input Analog 15V Supply The J11 connector is used to connect PMAC to the servo amps flags and encoders Notes 1 In standalone applications these lines can be used as 5V power supply inputs to power PMAC s digital circuitry However if a terminal block is available on the version of PMAC bring the 5V power in through the terminal block 2 Referenced to digital common GND Maximum of 12V permitted between this signal and its complement If not used leave this input floating i e digital single ended encoders 10V 10mA max referenced to analog common AGND Leave floating if not used do not tie to AGND In this case AGND is the return line Functional polarity controlled by jumper E17 Sinking sourcing nature of output control by IC type in U44 socket default sinking and E101 E102 configuration Choice between AENA and DIR use controlled by Ix02 and Ix25 7 Functional polarity controlled by variable Ix25 Must be conducting to AGND sinking driver to produce a 0 in PMAC software Pull up is to A 15V or A V 12 24V as determined by E100 Automatic fault function can be disabled with Ix25 8 Pins marked PLIMn should be connected to switches at the positive end of travel Pins marked MLIMn should be connected to switches at the negative end of travel 9 Must be conducting to usually AGND for PMAC to consider itself not into this limit Automatic limit functio
35. D CHES CHC PLANE STEPPER OPTION 15 cw R33 50K 12 TURN C105 AGND AGND 2N7002 PLANE DEND PLANE WIPER2 ia er E i m DAC2 181 62 VIN AGND 4 once 346 B vour Ha Aw m 4 vs COMP n 5 ena vs E n ETt5 1 i 2 8 cos N C E 2 pen ce cuo pem 2200pf 56 0 1 mfd 0 1 mta DIP14 SOCKET AGND PLANE a2 2N7002 160602 CHB3 u31 1 8 ANODEH vcc 16117 2 _ CHAM 2 CATHODEH vor 3 GATHODEH2 vo2 16118 2 ANODEH2 8 HCPL2630 DIP8 151602 CHB4 RP33 470SIP10C D13 Ae bat54 AGND PLANE Schematics 012
36. D 6 1 74AC540 SHOULD BE 215 GND SOL20 25mill ETCH GND SN75240PW R72 220 PHASE 4 9 C153 SERVO X D24 0 1 mfd R73 220 75200 5 3 3KSIP10C MBRS AUTS SOT23 5 m PHA 5V SER 055 a D ies 1 18 MOT gt 1 MOG 3 IN2 OUT2 Pig Mos 4 OUT3 Pig MO IN4 OUTA Pig MOS 2 INS OUTS 63 MOZ gt ING 75 MOT 3 IN7 ourz 077 97 outs Pig GND ve ULN2803A OR 0156 HEADER 34 EE BDS A m EE M 0 1 mtd BD04 A 8005 A IN SOCKET EDORA 007 BDO8 A BD09 BD10 A BD11 A CES BS oque SHOULD BE 3 3KSIP10C BD12 A BD13 A 1 USB CONN 000 SIP SOCKET SHOULD BE BD14 A BD45 A BD16 A BD17 A AND BD18 A BD19 A NOTE El AND E2 E 2 E 1 25mill ETCH BD20 A BD21 A BX Y KA WOHSER vacuus BD22 A BD23 A AME DIRECTION E2 E1 RK INIT fo 2AMP_FUSE DELTA TAU DATA SYSTEMS Inc Title gate arrays and i o Size Document Number 603712 320 aie Wednesday November 27 2002 Bheet 4 6 42 Schematics PMAC Mini PCI Hardware Reference THIS DOCUMENT IS THE CONFIDENTIAL PROPERTY OF DELTA TAU DATA SYSTEMS INC AND IS LOANED SUBJECT TO RETURN UPON DEMAND OF DELTA TAU DATA SYSTEMS INC TITLE TO THIS DOCUMENT IS NEVER SOLD OR TRANSFERRED FOR ANY REASON THIS DOCUMENT IS TO BE USED ONLY PURSUANT
37. Encoder C Ch Neg 2 3 21 CHBI Input Encoder B Ch Pos 2 22 CHB2 Input Encoder B Ch Pos 2 23 1 Input Encoder B Ch Neg 2 3 24 CHB2 Input Encoder B Ch Neg 2 3 25 CHA1 Input Encoder A Ch Pos 2 26 CHA2 Input Encoder A Ch Pos 2 27 1 Input Encoder A Ch Neg 2 3 28 CHA2 Input Encoder A Ch Neg 2 3 29 N C No Connect 30 N C No Connect 31 N C No Connect 32 N C No Connect 33 EQUI Output Position Compare 1 6 34 EQU2 Output Position Compare 2 6 35 N C No Connect 36 N C No Connect 37 N C No Connect 38 N C No Connect 39 N C No Connect 40 N C No Connect 41 N C No Connect 42 N C No Connect 43 DACI Output Ana Out Pos 1 4 11 44 DAC2 Output Ana Out Pos 2 4 11 Connector Pinouts PMAC Mini PCI Hardware Reference Manual J11 JMACH 60 Pin Header Continued PT Pin Symbol Function Description Notes 45 DACI Output Ana Out Neg 1 4 5 46 DAC2 Output Ana Out Neg 2 4 5 47 AENA1 DIR1 Output Amp Ena Dir 1 6 48 AENA2 DIR2 Output Amp Ena Dir 2 6 49 FAULTI Input Amp Fault 1 7 50 FAULT2 Input Amp Fault 2 7 51 MLIMI Input Neg End Limit 1 8 9 52 MLIM2 Input Neg End Limit 2 8 9 53 PLIMI Input Pos End Limit 1 8 9 54 PLIM2 Input Pos End Limit 2 8 9 55 HMFLI Input Home Flag 1 10 56 HMFL2 Input Home Flag 2 10 57 FEFCO Output Watchdog Out Indicator Driver 58 AGND Input Analog Common 5
38. FF Phase Clock Divided by 13 OFF ON OFF OFF Phase Clock Divided by 14 ON OFF OFF OFF Phase Clock Divided by 15 OFF OFF OFF OFF Phase Clock Divided by 16 The setting of I Variable 110 should be adjusted to match the servo interrupt cycle time set by E98 E3 E6 29 E33 and the master clock frequency I10 holds the length of a servo interrupt cycle scaled so that 8 388 608 equals one millisecond Since I10 has a maximum value of 8 388 607 the servo interrupt cycle time should always be less than a millisecond unless the basic unit of time on PMAC should be something other than a millisecond To have a servo sample time for a motor greater than one millisecond the sampling may be slowed in software for that motor with variable Ix60 Approximate servo frequency may be measured by typing successive RXO commands in a PMAC terminal window to read the servo cycle counter with the carriage return characters for the two commands hit exactly ten seconds apart To obtain the servo frequency in kHz take the difference of the two responses and divide by 10 000 E7 Machine Input Sourcing Sinking Control E Point and Location Description Default Physical Layout E7 Fl Jump pin to 2 to apply 5V to input 1 2 Jumper installed 013 reference resistor sip pack This will bias to MIS inputs to 5V for off state input must then be grounded for on state Jump pin 2 to
39. GND R46 1 57 mons SZ 4 Kt FBRI2NDOS 2 SVO AAA d 14 safety relay al Fr FE 14 R50 1 739580 saav gt r pul ena 3 75 ena i A 5VO OA 5V 018 uso NMBD301LTI ia 1 138580 1 R55 13 R56 330 ves T RA DK 21 ano ve 01 mid LED GRN uc d PWR GOOD LED svi RIAA 22k i LED GRN i AGND PLANE i PLANE AGND PLANE DGND E X RP12 10KSIP10C ON COMPONENT SIDE Hle ped z 1 d ACB t 5 5 1 MUM Punts ie no 2 4 7 PAX T ps 1 4 7 51 8 Matte 12 5 gar 4 E3 ACI3B T B 5 areri GAEL LE 8 2 Ea ACHB d NEC 1 2 3 5 5 5 7 HOME2 4 efo aona H pezi 2 HEL t 4 i 4 PLING 3 ES ACHB 1 4 7KSIPBI TRU flo 5 HERI amp 4 QA 4 Mes H Es ACHE AKSIPBI FSZISANEC Rp26 lt HOMES c H
40. If Sinking Out Low True If Source Out High True 26 GND Common PMAC Common 34 Connector Pinouts PMAC Mini PCI Hardware Reference Manual J5 JOPT 34 Pin Connector Continued Front View Pin Symbol Function Description Notes 27 MO3 Output Machine Output 3 If Sinking Out Low True If Source Out High True 28 GND Common PMAC Common 29 MO2 Output Machine Output 2 If Sinking Out Low True If Source Out High True 30 GND Common PMAC Common 3l MOI Output Machine Output 1 If Sinking Out Low True If Source Out High True 32 GND Common PMAC Common 33 TV V Power I O TV 5V 24V 5V Out from PMAC 5 to 24V in from External Source Diode Isolation from PMAC 34 GND Common PMAC Common This connector provides means for eight general purpose inputs and eight general purpose outputs Inputs and outputs may be configured to accept or provide either 5V or 24V signals Outputs can be made sourcing with an IC U55 to UDN2981 and jumper E1 and E2 change E7 controls whether the inputs are pulled up or down internally Outputs are rated to 100mA per line J7 JS1 16 Pin Header 8 OUT2 Output Amp Enable Dir JumperSetPolarity EI7B 9 OUT3 Output Enable Dir Jumper SetPolarity E170 gt Power Supply Out This connector is used to communicate with an Acc 28 A D converter bo
41. Jump pin 2 to 3 to apply GND to pin 10 of U55 should be UDN2981A for source output configuration Also see E2 E2 E1 Jump pin 1 to 2 to apply GND to pin 9 of U55 should 1 2 Jumper 23 be ULN2803A for sink output configuration installed Jump pin 2 to 3 to apply V 5V to 24V to pin 9 of 055 should be UDN2981A for source output configuration Also see El Note E1 and E2 must number in the same direction 18 E Point Jumper Descriptions PMAC Mini PCI Hardware Reference Manual E6 Servo Clock Frequency Control The servo clock which determines how often the servo loop is closed is derived from the phase clock see E29 E33A and E98 through a divide by N counter Jumpers E3 through E6 control this dividing function E3 E4 E5 E6 Servo Clock Frequency Default and 2 ON ON ON ON Phase Clock Divided by 1 OFF ON ON ON Phase Clock Divided by 2 ON OFF ON ON Phase Clock Divided by 3 OFF OFF ON ON Phase Clock Divided by 4 Only E5 and E6 On ON OFF ON ON Phase Clock Divided by 5 OFF ON OFF ON Phase Clock Divided by 6 ON OFF OFF ON Phase Clock Divided by 7 OFF OFF OFF ON Phase Clock Divided by 8 ON ON ON OFF Phase Clock Divided by 9 OFF ON ON OFF Phase Clock Divided by 10 ON OFF ON OFF Phase Clock Divided by 11 OFF OFF ON OFF Phase Clock Divided by 12 ON ON OFF O
42. Mini PCI with the ability to communicate serially with an RS232 port This connector can be used for daisychain interconnection of multiple PMACs Check E10 See Also Serial Communications J5 JOPT 34 Pin Connector PYTTEN o Front View Pin Symbol Function Description Notes 1 MIS Input Machine Input 8 Low is true 2 GND Common PMAC Common 3 MI7 Input Machine Input 7 Low is true 4 GND Common PMAC Common 5 MI6 Input Machine Input 6 Low is true 6 GND Common PMAC Common 7 MIS Input Machine Input 5 Low is true 8 GND Common PMAC Common 9 MI4 Input Machine Input 4 Low is true 10 GND Common PMAC Common 11 Input Machine Input 3 Low is true 12 GND Common PMAC Common 13 MI2 Input Machine Input 2 Low is true 14 GND Common PMAC Common 15 MII Input Machine Input 1 Low is true 16 GND Common PMAC Common 17 MOS Output Machine Output 8 If Sinking Out Low True If Source Out High True 18 GND Common PMAC Common 19 MO7 Output Machine Output 7 If Sinking Out Low True If Source Out High True 20 GND Common PMAC Common 21 MO6 Output Machine Output 6 If Sinking Out Low True If Source Out High True 22 GND Common PMAC Common 23 MOS Output Machine Output 5 If Sinking Out Low True If Source Out High True 24 GND Common PMAC Common 25 MO4 Output Machine Output 4
43. ND 5 in Wo b CHAS MC34C86D 5016 2 CHB1 INA B2 ENS 13 ENAAC n ENC 82 8 mc LS 2 we bt 2 mp 14 CHB3 E RP13 2 2KSIP10C DEND RP14 1KSIP10C PLANE AGND WIPER1 PLANE 14 DAC1 6 AAA 84 5 CHAT BEES CHAT 4 CHBT CHET 3 i CHOT CHCTE 1 2 2KSIP6C RPI8 6 ACE el 2 2KSIP6C B4 er CHC3 E eu MC34086D la S076 ours A H ENC B4 ng wo 10 2 de euo wo p CHB4 1 MG3408D 5016 RP20 2 2KSIP10C RP21 1KSIP10C IN INCOM VIN AGND 4 VS COMP ENA avs cos x R29 R30 50K Nd 12 TURN 2 DIP14 SOCKET 1 DGND FOUT 8 C100 VECTO _ 2200pf 56 0 1 mfd IRI 0 1 mta 6 AAS 5 PERSE 4 CHB3 CHB3 3 i CHES CHES 2 2KSIP6C 8225 0 5 CHAS CHA amp CHB CHCA 2 2KSIP6C DGN
44. PMAC Mini PCI DELTA TAU Data Systems Inc NEW IDEAS IN MOTION Single Source Machine Control Power Flexibility Ease of Use 21314 Lassen Street Chatsworth CA 91311 Tel 818 998 2095 Fax 818 998 7807 www deltatau com Copyright Information O 2010 Delta Tau Data Systems Inc All rights reserved This document is furnished for the customers of Delta Tau Data Systems Inc Other uses are unauthorized without written permission of Delta Tau Data Systems Inc Information contained in this manual may be updated from time to time due to product improvements etc and may not conform in every respect to former issues To report errors or inconsistencies call or email Delta Tau Data Systems Inc Technical Support Phone 818 717 5656 Fax 818 998 7807 Email support deltatau com Website http www deltatau com Operating Conditions All Delta Tau Data Systems Inc motion controller products accessories and amplifiers contain static sensitive components that can be damaged by incorrect handling When installing or handling Delta Tau Data Systems Inc products avoid contact with highly insulated materials Only qualified personnel should be allowed to handle this equipment In the case of industrial applications we expect our products to be protected from hazardous or conductive materials and or environments that could cause harm to the controller by damaging components or causing electrical sh
45. T Option 8A High Accuracy Clock Crystal The PMAC Mini PCI has a clock crystal of nominal frequency 19 6608 MHz 20 MHz The standard crystal s accuracy specification is 100 ppm e Option 8A provides a nominal 19 6608 MHz crystal with a 15 ppm accuracy specification Part number 3A8 603712 OPT Option 10 Firmware Version Specification Normally the PMAC Mini PCI is provided with the newest released firmware version A label on the memory IC U13 shows the firmware version loaded at the factory e Option 10 provides for a user specified firmware version 1 17 or newer Part number 310 00PMAC OPT Option 15 V to F Converter for Analog Input The Mini PMAC PCI has an optional analog input called Wiper because it is often tied to a potentiometer s wiper pin Mini PMAC PCI can digitize this signal by passing it through an optional voltage to frequency converter The key component on the board is U27 and U30 e Option 15 provides a voltage to frequency converter that permits the use of the Wiper input on the auxiliary port J8 JAUX Part number 315 603712 OPT General Purpose Digital Inputs and Outputs JOPTO Port PMAC Mini PCI s J5 or JOPTO connector provides eight general purpose digital inputs and eight general purpose digital outputs Each input and each output has its own corresponding ground pin in the opposite row The 34 pin connector was designed for easy interface to OPTO 22 or equivalent optically isolated I O m
46. TO WRITTEN LICENSE OR WRITTEN INSTRUCTIONS ALL RIGHTS TO DESIGNS AND INVENTIONS ARE RESERVED BY DELTA TAU DATA SYSTEMS INC POSSESSION OF THIS DOCUMENT INDICATES ACCEPTANCE OF THE ABOVE AGREEMENT FLASH BANK SELECT 3p3V R3 R4 R5 33K ask E10A E10B E18 i E10C E10 iL U13 A22 A24 WP 56 FLASHCS FLASHCS CE1 WE P Ban BWR PA21 PASO A21 OE p BRD PA20 20 sts PRDY PA19 Bais A19 pais Lx ay PA18 A18 27 PA17 A17 0 PA16 3 3 7 5 Dae 48 15 VEE GND 47 A15 DQ13 45 X DS BA13 14 095 45 BA12 A13 DQ12 44 X A12 504 23 CEO 72 RESET VEEN GND 44 RESET lt lt 179 RP DQ11 5 X 39 BAOS A10 DQ10 38 X p A09 DQ2 BAOB 209 vee 37 3P3V 5V 7 GND DAS 35 D1 BAOG ADT 34 1 BAO5 206 Tas DO W 4 hon nae 32 BAGO SOLDER 204 ENS EST JUMPER A09 P30 1 BAO1 29 gt A01 CE2 sowie 1 E28F320J3A _ e177 C178 TSOP56 o 0 1 0 1 mfa 5V OR 28F320J5A
47. The PMAC contains a number of jumpers pairs of metal prongs called E points These jumpers customize the hardware features of the board for a given application and must be set up appropriately The following is an overview of the several PMAC jumpers grouped in appropriate categories Fora complete description of the jumper setup configuration refer to the E Point Descriptions section of this manual Board Configuration Base Version The base version of the PMAC Mini PCI provides a half sized board with 40 MHz DSP563xx CPU 128k x 24 zero wait state flash backed SRAM 512k x 8 flash memory for firmware and user backup Latest released firmware version RS232 serial interface 33Mhz PCI bus interface Two channels axis interface circuitry each including e 16 bit 10V analog output 3 channel AB quad with index differential single ended encoder input e Four input flags two output flags e Interface to four external 16 bit serial ADC Display muxed I O direct I O interface ports Buffered expansion port Clock crystal with 100 ppm accuracy PID notch feedforward servo algorithms 1 year warranty from date of shipment One manuals CD per set of one to four PMACs in shipment cables mounting plates mating connectors not included Option 2 Dual Ported RAM Dual ported RAM provides a high speed communications path for bus communications with the host computer through a bank of shared memory DPRAM is advised if more than 1
48. ard It can be used also to build a digital amplifier interface All signals are referenced to the digital common GND 6 Connector Pinouts 35 PMAC Mini PCI Hardware Reference Manual J8 JAUX 14 Pin Header Pin Symbol Function Description 1 WIPERI Input 0 10V Analog Input 2 WIPER2 Input 0 10V Analog Input 3 AGND Common Analog Flag Common 4 AGND Common Analog Flag Common 5 EQUI Output Enc 1 Position Compare 3 6 EQU2 Output Enc 2 Position Compare 3 7 1 Output Amp 1 Enable Direction 3 4 5 DIR 1 8 AENA2 Output Amp 2 Enable Direction 3 4 5 DIR2 9 PULSE I Output Chan 1 Pulse Command 1 3 10 PULSE2 Output Chan 2 Pulse Command 1 3 11 FEFCO Output Watchdog Output 3 12 AGND Common Analog Flag Common 13 A V FRET Input Flag Supply Volt 6 14 A 15V I O Analog Minus Supply This connector provides auxiliary signals for the PMAC Mini PCI including analog inputs position compare outputs pulse and direction outputs and a flag supply return voltage All signals are referenced to AGND isolated from the SV digital circuitry Notes 1 Requires Option 15 V F Converters be installed to use 2 WIPERI is tied to DACI if jumper E110 is installed WIPER2 is tied to DAC2 if jumper E113 is installed 3 Open collector sinking output in standard configuration ULN2803A in U44 Can be replaced with sourcing driver UDN2981A
49. e board If these signals are brought long distances into the PMAC board and ringing at signal transitions is a problem SIP resistor packs may be mounted in these sockets to reduce or eliminate the ringing All termination resistor packs have independent resistors no common connection with each resistor using two adjacent pins The following table shows which packs are used to terminate each input device Device Resistor Pack Pack Size Encoder 1 RP15 6 pin Encoder 2 RP18 6 pin Encoder 3 RP23 6 pin Encoder 4 RP25 6 pin 8 Hardware Setup PMAC Mini PCI Hardware Reference Manual The Optional Dual Ported RAM When the PMAC Mini PCI Option 2 is ordered U20 is installed on board at the factory The DPRAM is located on the back of the board See the PMAC User Manual for more information LED Indicators The PMAC Mini PCI has two sets front side and back of three LED indicators D9 and D9A When the green LED is lit this indicates that power is applied to the 5V input and it is good green D10 and When the red LED is lit this indicates that the watchdog timer has tripped and shut down the D10A red PMAC D19 and The PMAC Mini PCI has an interlock circuit that drops out the 15V supplies to the analog D19A outputs through a fail safe relay if any supply on PMAC is lost In this case the LED will be off yellow Input and Ou
50. e of these six jumpers may be on at a time E34A E37 Encoder Sampling Clock Frequency Control E34 E35 E36 E37 SCLK Clock Frequency Default and Physical Layout 19 6608 MHz Master E34A E34 E35 E36 E37 me ON OFF OFF OFF OFF 19 6608 MHz OFF ON OFF OFF OFF 9 8304 MHz E34 On OFF OFF ON OFF OFF 4 9152 MHz OFF OFF OFF ON OFF 2 4576 MHz OFF OFF OFF OFF ON 1 2288 MHz Jumpers E34 E37 control the encoder sampling clock SCLK used by the gate array ICs No more than one of these five jumpers may be on at a time 22 E Point Jumper Descriptions PMAC Mini PCI Hardware Reference Manual E44 E47 Communications Control Baud Rate Control Baud Rate Default and Physical E Points Layout E44 E45 E46 E47 Standard CPU 60 MHz E44 E45 E46 E47 40 MHz Flash Flash CPU CPU Opt 5A Opt 5B ON ON ON ON Disabled Disabled OFF ON ON ON 600 900 ON OFF ON ON 800 1200 OFF OFF ON ON 1200 1800 ON ON OFF ON 1600 2400 OFF ON OFF ON 2400 3600 ON OFF OFF ON 3200 4800 OFF OFF OFF ON 4800 7200 ON ON ON OFF 6400 9600 Opt 5B OFF ON ON OFF 9600 14400 Standard Opt 5A ON OFF ON OFF 12800 19200 OFF OFF ON OFF 19200 28800 ON ON OFF OFF 25600 38400 OFF ON OFF OFF 38400 57600 ON OFF OFF OFF 51200 76800 OFF OFF OFF OFF 776800 115
51. hysical Layout _ Power Up Reset Load Source Jumper 1 No jumper 2 Power Up Reset Load Source Jumper 2 Jumper installed 412 Install to read flash IC on power up reset G3 Power Up Reset Load Source Jumper 3 Jumper installed 412 Install to read flash IC on power up reset Other combinations are for factory use only the board will not operate in any other configuration E23 Firmware Load E Point and Location Description Default Physical Layout E23 G3 Remove jumper for normal operation No jumper installed 112 Jump pin 1 to 2 to reload firmware through serial or bus port E Point Jumper Descriptions 21 PMAC Mini PCI Hardware Reference Manual E29 E33A Phase Clock Frequency Control E29 E30 E31 E32 E33 E33A Phase Phase Default and Physical Layout Clock Clock E33 E32 E30 E29 Freq Freq E98 1 2 E98 2 3 ON OFF OFF OFF OFF OFF 2 26 kHz 1 13 kHz OFF ON OFF OFF OFF OFF 4 52 kHz 2 26 kHz OFF OFF ON OFF OFF OFF 9 04 kHz 4 52 7 OFF OFF OFF OFF OFF 18 07 kHz 9 04 kHz OFF OFF OFF OFF ON OFF 36 14 kHz 18 07 kHz OFF OFF OFF OFF OFF ON 72 28 kHz 36 14 kHz Jumpers E29 through E33A control the speed of the phase clock and indirectly the servo clock which is divided down from the phase clock see E3 E6 No more than on
52. ial outputs The two analog outputs on the PMAC Mini PCI can be used as velocity or torque commands for separate axes or as phase current commands for a single axis commutated by the card However there are four incremental encoder interfaces that can be used for feedback or master positions Two of these may alternately be used to process analog voltages through optional on board V F converters There is no JPAN control panel port There are no digital inputs dedicated to the functions of this port on other PMACs To obtain equivalent functions general purpose inputs must be used along with a PLC program reading these inputs Handwheel encoders may be brought in through the JMACH port Wiper inputs may be brought in through the JAUX port if Option 15 is purchased The memory mapping of the general purpose digital I O is different from other versions of the PMAC Different M Variable definitions are required for these I Os on the PMAC Mini PCI see below The serial port is RS 232 only There is no on board or optional capability to use RS 422 format Dual ported RAM Option 2 is an on board option that must be factory installed The PMAC Mini PCI cannot use the separate Option 2 DPRAM board The JTHW multiplexer port outputs are not as powerful as on other PMACs There should be no more than one meter three feet of cable to any device on the port instead of the three meters ten feet on other PMACs Anything longer should use the Acc 35A d
53. in 1 to 2 to tie DACI output to WIPERI input stepper No jumper 112 drive installed Remove jumper to keep lines separate E111 Jump pin I to 2 to set 10kHz V gain 100kHz max Ist V F No jumper 112 converter installed Remove jumper to set 200kHz V gain 2MHz max on 1st V F converter E112 B1 Jump pin I to 2 to set 10kHz V gain 100kHz max on Ist V F No jumper 112 converter installed Remove jumper to set 200kHz V gain 2MHz max on 1st V F converter E113 B2 Jump pin 1 to 2 to tie DAC2 output to WIPER2 input stepper No jumper 112 drive installed Remove jumper to keep lines separate E114 B2 Jump pin 1 to 2 to set 10kHz V gain 100kHz max on 2nd No jumper 112 V F converter installed Remove jumper to set 200kHz V gain 2MHz max on 2nd V F converter E115 B2 Jump pin 1 to 2 to set 10kHz V gain 100kHz max on 2nd No jumper 112 V F converter installed Remove jumper to set 200kHz V gain 2MHz max on 2nd V F converter E Point Jumper Descriptions 27 PMAC Mini PCI Hardware Reference Manual E116 E119 V F Converter Configuration Voltage to Frequency Converter Option OPT 15 Required E Point and Location Description Default Physical Layout E116 A3 Jump pin I to 2 to tie AENA1 DIR1 output to CHB3 No jumper 112 input installed Remove jumper to keep lines separate E117 A3 Jump pin I to 2 to tie PULSE1 output to CHA3 input No jumper 112 Remove jumper
54. in the conversion table of the proper encoder channel Assuming the default conversion table the value is 0720 for ENCI 0721 for ENC2 0722 for ENC3 and 0723 for ENC4 If the simulated feedback is used set x30 to 550 000 for 100 kHz max or x30 to 27 500 for 2 MHz max Set Ix31 to 0 Ix32 to 1000 Ix33 to 0 and Ix35 to 0 If real feedback is used tune the motor the same as for a velocity mode amplifier Option 15 Voltage to Frequency Converter 13 PMAC Mini PCI Hardware Reference Manual 0 100 kHz Frequency Range and Pseudo Feedback no External Encoder Connected Jumpers Setting Input 1 Input 2 E110 E111 E112 E116 E117 E113 E114 E115 E118 E119 ON ON ON ON ON ON ON ON ON ON 0 2 MHz Frequency Range and Pseudo Feedback no External Encoder Connected Jumpers Setting Input 1 Input 2 E110 12 E116 E117 E113 Ens E118 119 ON OFF OFF ON ON ON OFF OFF ON ON E34 E37 Encoder Sampling Clock Frequency Control E34A E34 E35 E36 E37 SCLK Clock Frequency ON OFF OFF OFF OFF 19 6608 MHz 0 100 kHz Frequency Range and Pseudo Feedback no External Encoder Connected Jumpers Setting Input 1 Input 2 0 E112 E116 Ell7 E113 E115 E118 E119 ON ON ON OFF OFF ON ON ON OFF OFF 0 2 MHz Frequency Range and External Encoder Feedback Connected Jumpers Setting
55. ing of jumpers 44 47 and the CPU frequency a PMAC board If the CPU s operational frequency has been determined by a non zero setting of 146 the serial communications baud rate is determined at power up reset by variable I54 alone Currently the Flex CPU s serial baud rate is determined at power up reset by variable 154 alone E49 Serial Communications Parity Control Jump pin I to 2 for no serial parity Remove jumper for odd serial parity Reserved Configuration Jumpers E0 Reserved for future use E48 Reserved for future use Configuration Jumpers Warning A wrong setting of these jumpers will damage the associated output IC E1 E2 Machine Output Supply Configure With the default sinking output driver IC ULN2803A or equivalent in U55 for the Js JOPTO port outputs these jumpers must connect pins I and 2 to supply the IC correctly If this IC is replaced with a sourcing output driver IC UDN2981A or equivalent these jumpers must be changed to connect pins 2 and 3 to supply the new IC correctly E7 Machine Input Source Sink Control With this jumper connecting pins and 2 default the machine input lines on the JS JOPTO port are pulled up to 5V or the externally provided supply voltage for the port This configuration is suitable for sinking drivers If the jumper is changed to connect pins 2 and 3 these lines are pulled down to GND This configuration is suitable for sourcing drivers
56. n can be disabled with Ix25 10 Functional polarity for homing or other trigger use of HMFLn controlled by Encoder Flag Variable 2 1902 1907 etc HMFLn selected for trigger by Encoder Flag Variable 3 1903 1908 etc Must be conducting to OV usually AGND to produce a 0 in PMAC software 11 If DAC calibration is needed R37 is for offset DACI and R41 is for offset DAC2 Qv Ux 36 Connector Pinouts PMAC Mini PCI Hardware Reference Manual Terminal Block TB1 JPWR 4 Pin Terminal Block Pin Symbol Function Description Notes 1 GND Common Digital Ground 2 5V Input 5V Supply Reference to digital ground 3 12V Input 12V to 15V Supply Reference to digital ground 4 12V Input 12V to 15V Supply Reference to digital ground This terminal block may be used as an alternative power supply connector if PMAC Lite is not installed in a PC bus The 5V powers the digital electronics If jumpers E85 E87 and E88 are installed the 12V and 12V power the analog output stage this defeats the optical isolation on PMAC To keep the optical isolation between the digital and analog circuits on PMAC provide analog power 12V to 15V and AGND through the JMACH connector instead of the bus connector or this terminal block Connector Pinouts 39 PMAC Mini PCI Hardware Reference Manual 00090091 006900020
57. nd GND 4 1 ond GROUND FRON TITT 932 18 OHM m INT GROUND FROM C13 PIN 2 I ISMC15 0AT3 1SMC15 0AT3 VRS 225W gnd ord our IN p L RESET gt 2 ds p needs to be inverted for use with the phase servo yenexatar EE H 25V 25V ne E TSMC1BAT3 p 4 E m JOIN GND INT GRO P one AT THIS POINT NO gnd 4 5 D KAGND U24 C94 gre TSMCS 0AT3 c95 C93 eis 22 Msmci8ata 08 gnd x C 0 1 mfa 22 mid 025 0 1 mfd 13 25 gnd 12V 2 35V led rst 21 4 4 2 E88 A 14V0 4 A 15V 261 12M h GND I S6uh E H E MERS14013 B NC7SZ14M5 id E K 5v Doa Dio LED LED LED LED GRN GRN RED RED M Xm Rom Jes i DGND PLANE R27 ROTA ROBA AGND PLANE 1K 1K Delta Tau Data Systems Inc Te mini PMAC1 PCI AND DUAL PORT RAM Sze Document Number D 603712 320 Tuesday May 07 2002 3 5 6 Schematics PMAC Mini PCI Hardware Reference ENG A1 At vec i 2 CHATS OUT A INA ENC A2 A4 1 ENG A2 5 cure wc LS CHA2 ms bis 53 ours ETT CHA3 H2 10 CHA4 B1 B1 I
58. nput Sourcing Sinking Control essere nennen enne nnne nennen 19 Table of Contents PMAC Mini PCI Hardware Reference Manual E10 Synchronizing ern Ped torpet cipe eere p eeu ede spe ianua 20 E10A E10C Flash Firmware Bank Select esses 20 E11 E14 Encoder Single Ended Differential Select Note REV 103 and above eese 20 E17A E17D Amplifier Enable Direction Polarity Control esee 21 E19 Watchdog Disable eene enne nennen nennen tren trennen enn entren nen entente nennen nenne 21 E20 E22 Flash Firmware Bank eccesesssssecseeeecseeeceseeecesecseesecnevseenaeencsaecaeeecaecaeeeeeneeeaeeaeesesaeearenee 21 E23 Farmware Load URBI GENET 21 E29 E33A Phase Clock Frequency Control enne enne enne enne 22 E34A E37 Encoder Sampling Clock Frequency Control sese enne 22 E44 E47 Communications Control essere nennen enne tenere ennt inneren ene 23 EAS Reserved for future uses des ken ket Bakdelen 23 E49 Serial Communications Parity Control essent ener ennemi enne nre 24 E50 EAROM Save Enable Disable trem eie Ir Henr e Lo ente e Er Enea eoe Pe 24 E51 Normal Re Initializing Power Up eese eren nne 24 E85
59. o 5V for complementary open collector encoders obsolete E117 E118 Wiper to Encoder Input Enable Putting these jumpers on ties the output of the Option 10 voltage to frequency converter that can process the Wiper analog input on the JAUX port to the Channel 3 E117 or 4 E118 encoder circuitry If the frequency signal is connected to one of these channels no encoder should be connected through the JMACHI connector 6 Hardware Setup PMAC Mini PCI Hardware Reference Manual Board Reset Save Jumpers E50 Flash Save Enable Disable Control If E50 is on default the active software configuration of the PMAC can be stored to non volatile flash memory with the SAVE command If the jumper on E50 is removed this SAVE function is disabled and the contents of the flash memory cannot be changed E51 Re Initialization on Reset Control If E51 is off default PMAC executes a normal reset loading active memory from the last saved configuration in non volatile flash memory If E51 is on PMAC re initializes on reset loading active memory with the factory default values Communication Jumpers PCI Bus Base Address Control The selection of the base address of the card in the I O space of the host PC s expansion bus is assigned automatically by the operating system and it is not selected through a jumper configuration 44 47 Serial Baud Rate Selection The serial baud rate is determined by a combination of the sett
60. odules Acc 21F is a six foot cable for this purpose Characteristics of the JOPTO port on the PMAC e 16 T O points 100mA per channel up to 24V e Hardware selectable between sinking and sourcing in groups of eight default is all sinking inputs can be changed simply by moving a jumper sourcing outputs must be special ordered or field configured Eight inputs eight outputs only no changes Parallel fast communications to PMAC CPU e Not opto isolated easily connected to Opto 22 PB16 or similar modules through Acc 21F cable Jumper E7 controls the configuration of the eight inputs If it connects pins 1 and 2 the default setting the inputs are biased to 5V for the OFF state and they must be pulled low for the ON state If E7 connects pins 2 and 3 the inputs are biased to ground for the OFF state and must be pulled high for the ON state In either case a high voltage is interpreted as a 0 by the PMAC software and a low voltage is interpreted as a 1 4 Hardware Setup PMAC Mini PCI Hardware Reference Manual Power Supply Configuration Jumpers 12 24V A V pin 9 J9 JEQU E89 12V E85 A 15V gt e ee e 5V E90 E100 5V 30 v e 1 i e LT 1 3 VIF Input AENAs AGND DACs AGND Flags EQUs E87 GND GND E88 12V A 15V 4 o e e e gt P1 TB1 JMACH1 E
61. on entry for Input 1 Timebase Encoder Conversion entry for Input 2 Encoder channel 3 for pulse and direction decode Input 1 Encoder channel 4 for pulse and direction decode Input 12 Result of the analog conversion The range of M34 is from 0 to the I10 value proportional to the 0 10V range on the analog input 1 Result of the analog conversion The range of M35 is from 0 to the I10 value proportional to the 0 10V range on the analog input 2 Option 15 Voltage to Frequency Converter PMAC Mini PCI Hardware Reference Manual Configuration as Analog Input with a 0 2 MHz Frequency Range Jumpers Setting Input 1 Input 2 E110 112 116 117 E113 E114 115 EI18 E119 OFF OFF OFF ON ON OFF OFF OFF ON ON E34 E37 Encoder Sampling Clock Frequency Control E34A E34 E35 E36 E37 SCLK Clock Frequency ON OFF OFF OFF OFF 19 6608 MHz Software configuration to be typed on the terminal window WYS0724 40722 64 Timebase Encoder Conversion entry for Input 1 WY 0726 40723 64 Timebase Encoder Conversion entry for Input 2 1911 1 Encoder 3 digital delay filter disabled bypassed 1916 1 Encoder 4 digital delay filter disabled bypassed 1910 24 Encoder channel 3 for pulse and direction decode Input 1 1915 4 Encoder channel 4 for pulse and direction decode Input 42 M34 gt X 50725
62. or Epor m 8001 55 Lara tont serr 002 23 BDO4 A 5 BROS 1 16V 8004 99 BDOS A EDIT BDOS TANT intag bie 8006 BDOS A BA 0 mfd tantceramic ck rs BDi0 A BDii A A 16V m BD12 BD12 A BD13 A BD13 A TANT idsel int vecio BOIZA R20 _ u22 a6 EDITA int vem Q 110 adii se 5 8018 A So EDEA EDTA 2 ama ve 8 j ZA H vec HX 8020 lt gt BEAR 6 8021 2 5 a Rn Quo Qm 34 sek veo Hr ES FPS BD22 A BD23 A 4 our IN tk tk tk ik ijs neste 5 ces OR LMIMZMPXAD MC332698T ADJ prentz t 68 mid 807 223 OND VO peentt p Tok pa 25 at ground 3 tek Tag Adi pci tdi ido pci opes ms pci 5 ist bus 12V conf done st aam bus 12v SHOULD JOIN GND NET AT mena soos Lo aa THIS POINT 27 EE ER ie u us E 7 rea 001 mid F uw lt x b a m a2 8 sy E b5 bus 5V c85 AGND PLANE jus ef x 12 Eas Kbus 5V dL de 5V 55 22 mid VOC H RAISE RESISTOR OFF BOARD DE bn 2 His T id PLANE SOLDER JUMPER TT i i D bus gnd 72 A 15V gnd x 4 lt 02 35V i 56uh i
63. orts When our products are used in an industrial environment install them into an industrial electrical cabinet or industrial PC to protect them from excessive or corrosive moisture abnormal ambient temperatures and conductive materials If Delta Tau Data Systems Inc products are directly exposed to hazardous or conductive materials and or environments we cannot guarantee their operation REVISION HISTORY REV DESCRIPTION DATE CHG APPVD 1 REVISIONS TO FLEX CPU BAUD RATE PPS 6 amp 21 05 09 06 CP S SATTARI 2 UPDATED ENCODER SETTING DESC PPS 6 amp 20 01 30 09 CP S MILICI 3 CORRECTED JUMPER LAYOUT E85 E87 E88 P 25 04 26 10 CP S MILICI PMAC Mini PCI Hardware Reference Manual Table of Contents INTRODUCTION trm 1 Lon Ope S E E EEE e e T N EEES EE EEN ES EEEO EE EENES 1 e O see seas E E ale ai 2 E EHOAVE IURI Ng 3 Board Corpus 3 BaseN a E A n E 3 Option 2 gt DualPorted RAM se RA de ee a sen 3 Option 5xE CPU Speed Options iege ti sd ta es 3 Option 6 Extended Servo Algorithm Firmware eese eene ener 4 Option 6L Special Lookahead Firmware essetis 4 Option 84 High Accuracy Clock Crystal eee eene ener nete 4 Option 10 Firmware Version Specification essent eene nennen eren 4 Option 15 V to F Converter for Analog In
64. peakers a ud eue tbt eat 10 aa dye DIEI Ose T 10 OPTION 15 VOLTAGE TO FREQUENCY 12 Configuration as Analog Input with a 0 100 kHz Frequency Range seen 12 Configuration as Analog Input with a 0 2 MHz Frequency Range seen eee 13 General Configuration for Step and Direction Outputs sss 13 0 100 kHz Frequency Range and Pseudo Feedback no External Encoder Connected sss 14 0 2 MHz Frequency Range and Pseudo Feedback no External Encoder Connected sss 14 0 100 kHz Frequency Range and Pseudo Feedback no External Encoder Connected sss 14 0 2 MHz Frequency Range and External Encoder Feedback Connected ee 14 SUGGESTED I O M VARIABLE 8 00 16 General Purpose Inputs and Outputs sessi enn nn nennen rnt enne 16 Thumbwheel Port Bits Can be Used as General Purpose I O essere 16 E POINT JUMPER 5 0 18 BO Reserved for Future USe denitro PERSONS s 18 E2 Machine Output Supply Voltage Configure rvrrnvrvrenrenennernrervnnerernnnnrrerneevarsennerresvrerernernsenesnessrennesre 18 B6 Servo Clock Frequency Control eee ect reti nee des Ca V de 19 E7 Machine I
65. pers E3 E6 determine the servo clock frequency by controlling how many times it is divided down from the phase frequency The default setting of E3 and E4 off E5 and E6 on divides the phase clock frequency by 4 creating a 2 25 kHz servo clock frequency This setting is seldom changed E29 E33A Phase Clock Frequency Control Only one of the jumpers E29 E33A which select the phase clock frequency may be on in any configuration The default setting of E31 on which selects a 9 kHz phase clock frequency is seldom changed Hardware Setup 5 PMAC Mini PCI Hardware Reference Manual E34A E37 Encoder Sample Clock Only one of the jumpers E34A E37 which select the encoder sample clock frequency may be on in any configuration The frequency must be high enough to accept the maximum true count rate no more than one count in any clock period but a lower frequency can filter out longer noise spikes The anti noise digital delay filter can eliminate noise spikes up to one sample clock cycle wide E98 DAC ADC Clock Frequency Control Leave E98 in its default setting of 1 2 which creates a 2 45 MHz DCLK signal unless connecting an Acc 28 A D converter board In this case move the jumper to connect pins 2 and 3 which creates a 1 22 MHz DCLK signal Encoder Configuration Jumpers Encoder Complementary Line Control PMAC has differential line receivers for each encoder channel but can accept either single ended one signal line
66. put essent entren 4 General Purpose Digital Inputs and Outputs 4 Power Supply Configuration Jumpers sees eene tremere rene reete nnenne trennen enne 5 Clock 5 Encoder Configuration Jumpers esses eene eene nnne innen nennen enne 6 Sinele Ended Encoders RT sa 6 Differential Envcoders t 6 Board Reset Save Jumpets eter E HE e He e Fee e PRA RI EP 7 Go unn comun cM 7 Reserved Configuration Jumpers esses enne enne enne 7 VO Contig uratiGi JUITIDerS 7 Resistor Pack Configuration Termination Resistors c cessssssesssesecereescseeecsaecaeesecaeeeecnaveeceeceavenesaeeeeeaeeateateneens 8 The Optional Dual Ported ceri inneren n e re Re HH E ta eie de erred 9 PEDAGOG TR 9 Input and Output Mapping soeonrernvrnvrrnrrrnrrrnrrrnnrenarrnsrennrsnessnesnnessvrssvennrensernsernnrennesnnrennrsnersnernnssneenesnnrsnsesnsessnsssnenn 9 YSSERCO JE JDISP 2 cci erdt esee b reete elgen 9 Y SFFC1 Inputs RR 9 YS EFC JSUIHW Outp ts nest 10 Y SEFCS JD MO MIO dad 10 YSSERCHT JS VOP TOVO MIUS araire tette 10 YS FFCS Dedicated Use ce cies reca ase s
67. river board There are no jumpers to control the open circuit voltage of the complementary inputs Instead there are removable socketed SIP resistor packs At the factory these are configured to tie the complementary lines to 2 5V Removed they will tie the complementary lines to 5V There is no JXIO connector to provide clock signals to mating connectors on Acc 24P or Acc 8D Option 8 boards If either of these boards is used with the PMAC Mini PCI a custom cable should be made to connect the DCLK signal on the PMAC Mini PCI J7 port to both the DCLK and SCLK inputs on the Acc 24P JXIO port or the SCLK input on the Acc 8D Option 8 JXIO port The HMFLn PLIMn and MLIMn flag inputs on the PMAC Mini PCI can accept signals from both sourcing and sinking drivers If the A 15V on JMACH is used to supply the flag isolators through E89 and E90 only sinking drivers can be used But if pin 13 on J8 JAUX is used to supply the isolators a 12V to 24V supply can be used for sinking drivers or a supply can be used for sourcing drivers The PMAC Mini PCI has an interlock circuit that drops out the 15V supplies to the analog outputs through a fail safe relay if any supply on PMAC is lost If Option 15 is purchased the PMAC Mini PCI has the capability for two on board voltage to frequency V F converters These may be used for two Wiper analog inputs or to convert the two analog outputs to pulse trains for stepper type drives The V F conver
68. rtant for high accuracy A D conversion on Acc 28A boards Note This also divides the phase and servo clock freq in half See E29 E33 E3 E6 E Point and Location Description Default Physical Layout E89 A1 Jump pin 1 to 2 to allow A V on J8 JAUX pin 13 to Jumper 112 tie to A 15V on J11 IMACHI pin 59 installed Remove jumper to permit separate voltage supply from A V for input flags 12V to 24V for sinking drivers OV for sourcing drivers This jumper must be installed to allow A 15V to power the OPTO switch sensor inputs including limits from the same OPTO power supply that powers the amplifier output stage Also see E90 E90 Host Supplied Switch Pull Up Enable E Point and Location Description Default Physical Layout E90 Al Jump pin 1 to 2 to allow A V FRET on J8 pin 13 and or 1 2 Jumper EGG J11 pin 59 also see E89 to power OPTO switch sensor installed inputs including limits Jump pin 2 to 3 to allow 12V from DC bus connector P1 pin 09 to power switch sensor inputs including limits Optical isolation is then lost Also see E85 E87 E88 and PMAC opto isolation diagram E98 DAC ADC Clock Frequency Control E Point and Location Description Default Physical Layout E98 C2 Jump 1 2 to provide a 2 45 MHz DCLK signal to DACs 1 2 Jumper and ADCs Jump 2 3 to provide a 1 23 MHz DCLK signal installed 26 E Point Jumper Descriptions PMAC Mini PCI Hardware Reference Manual E101
69. s TSSOP48 IOCS B lt lt A1 m 22 4 AS AS AG AT AT A2 A10 A10 AT 11 12 A13 A13 A14 A15 15 16 AIG 17 17 A19X YP lt lt D1 D2 p D3 p D4 D D5 DS D6 De D7 Dr pa pa D10 DIO D11 Bid 012 pia 013 Dia D14 Bis 015 DIS 016 216 Di7 DIT 018 18 D19 ae D20 920 D21 Dzi D22 pes D23 D23 BA00 BAOT BAOT BAOZ BAOZ BAOS BAO4 BADA 5 BAOS BAOB BAO BAO BAOB BAOB BAO BAOS BA10 10 SS BATT 12 BA BA13 BAS BA15 mE BX Y BX Y 3P3V IOCS B A19X YP IDT74FCT164245TPA TSSOP48 U17 IDT74FCT164245TPA TSSOP48 BRD BDOO BDO1 8002 8003 8004 8005 8006 8007 8008 8009 BD10 BD11 BD12 BD13 BD14 BD15 BRD f le jojo meer mo fom join BRD BD16 BD17 BD18 BD19 BD20 BD21 BD22 BD23 BAOO BAO1 BAO2 4 BX Y 2 f moser so PHA SER B CS2 CS04 CS10 CS14 BWR B lt lt RESET B im o o co co 00 co 0 oo n oo B B RESET B SER B J2 JEXP 1 2 3 4 5 6 7 8 go 10 11 12 13 14 Q 15 16 17 18 19 20 21 22 23 24 Q 25 26 27 28 29 30 31 32 34 Q 35 36 Q
70. ters can each take an input of 0 10V referenced to AGND The pulse trains can be tied into encoder channels 3 or 4 for counting It is also possible but more expensive to use the first two channels of the off board Acc 8D Option 2 board Features Introduction 1 PMAC Mini PCI Hardware Reference Manual Motorola DSP 563xx Digital Signal Processor Two output digital to analog DAC converters Four full encoder channels 16 general purpose I O OPTO 22 compatible Multiplexer port for expanded I O Overtravel limit home fault amplifier enable flags Display port for LCD and VFD displays Optional on board dual ported RAM Optional two on board V to F converters Optional on board stepper control PCI Bus and or RS 232 control Stand alone operation G Code command processing for CNC Linear and circular interpolation 256 motion programs capacity Asynchronous PLC program capability Rotating buffer for large programs 36 bit position range 64 billion counts 16 bit DAC output resolution S curve acceleration and deceleration Cubic trajectory calculations splines Electronic gearing Dimensions 8 S o0020000000000 44212 e o o o o e o o o wO00000000000000000000000000000 0009000000 o a 64 3 773 ecocoooccooo 0 143 0 000 Introduction PMAC Mini PCI Hardware Reference Manual HARDWARE SETUP
71. to keep lines separate installed E118 A3 Jump pin I to 2 to tie PULSE2 output to CHA4 input No jumper 112 Remove jumper to keep lines separate installed E119 A3 Jump pin 1 to 2 to tie AENA2 DIR2 output to CHB4 No jumper 112 input installed Remove jumper to keep lines separate Note For stepper Feedback install E116 and E119 28 E Point Jumper Descriptions PMAC Mini PCI Hardware Reference Manual E Point Jumper Descriptions 29 PMAC Mini PCI Hardware Reference Manual MATING CONNECTORS This section lists several options for each connector Choose an appropriate one for your application J1 JDISP Display Port 1 Two 14 pin female flat cable connector Delta Tau P N 014 R00F14 0K0 T amp B Ansley P N 609 1441 2 171 14 T amp B Ansley standard flat cable stranded 14 wire 3 Phoenix varioface modules type FLKM14 male pins P N 22 81 021 d JEXP Expansion Two 50 pin female flat cable connector Delta Tau P N 014 ROOF50 0K0 T amp B Ansley P N 609 5041 2 171 50 T amp B Ansley standard flat cable stranded 50 wire 3 Phoenix varioface module type FLKM 50 male pins P N 22 81 08 9 used for daisy chaining acc 14 I 0 23 A and D connectors 24 expansion J3 JTHW Multiplexer Port 1 Two 26 pin female flat cable connector Delta Tau P N 014 R00F26 0K0 T amp B Ansley P N 609 2641 2 171 26 T amp B Ansley standard flat cable stranded 26 wire 3 Phoenix varioface module type FLKM 26 male pins
72. tput Mapping Y FFCO J1 JDISP Outputs 0 DBO Display Data 0 J1 8 1 Display Data 1 71 7 2 DB2 Display Data 2 71 10 3 DB3 Display Data 3 11 9 4 DB4 Display Data 4 J1 12 5 DB5 Display Data 5 J1 11 6 DB6 Display Data 6 J1 14 7 DB7 Display Data 7 J1 13 Y FFC1 J3 JTHW Inputs 0 DATO THW Data 0 J3 3 1 DATI THW Data 1 J3 5 2 DAT2 THW Data 2 J3 7 3 DAT3 THW Data 3 J3 9 4 DAT4 THW Data 4 J3 11 5 DATS THW Data 5 J3 13 6 DAT6 THW Data 6 J3 15 7 DAT7 THW Data 7 J3 17 Hardware Setup 9 PMAC Mini PCI Hardware Reference Manual Y FFC2 J3 JTHW Outputs 0 SELO THW Select 0 J3 4 1 SEL1 THW Select 1 J3 6 2 SEL2 THW Select 2 J3 8 3 SEL3 THW Select 3 J3 10 4 SEL4 THW Select 4 J3 12 5 SELS THW Select 5 J3 14 6 SEL6 THW Select 6 J3 16 7 SEL7 THW Select 7 J3 18 Y FFC3 J5 JOPTO Inputs 0 Machine Input 1 15 15 1 MD Machine Input 2 15 13 2 MI3 Machine Input 3 75 11 3 MIA Machine Input 4 15 9 4 Machine Input 5 75 7 5 MI6 Machine Input 6 15 5 6 MI7 Machine Input 7 15 3 7 MIS Machine Input 8 15 1 Y FFC4 J5 JOPTO Outputs 0 MOI Machine Output 1 15 31 1 MO2 Machine Output 2 15 29 2 MO3 Machine Output 3 15 27 3 MO4 Machine Output 4 J5 25 4 MO5 Machine Output 5 J5 23 5 MO6 Machine Output 6 15 21 6 MO7 Machine Output 7 15 19 7 MOS Machine Output 8 15 17 Y FFC5 Dedicated Use 0 ENA422 Serial Enable 1 RS Display Control 2 R W Display

Delta Tau PMAC MINI PCI Reference Manual

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