Cypress CY62158EV30 User's Manual
Contents
1. and output loading of the specified as shown in AC Test Loads and Waveforms on page 4 12 At any given temperature and voltage condition tyzce is less than tj tyzoe is less than tj zog and tyzwe_ is less than tj for any given device 13 tuzog tuzce and tyzwe transitions are measured when the outputs enter a high impedance state 14 The internal write time of the memory is defined by the overlap of WE CE Vj V p All signals must be ACTIVE to initiate a write and any of these signals can terminate a write by going INACTIVE The data input setup and hold timing should be referenced to the edge of the signal that terminates the write Document 38 05578 Rev D Page 5 of 11 Feedback F CYPRESS CY62158EV30 MOBL Switching Waveforms Read Cycle No 1 Address Transition Controlled 15 16 ADDRESS DATA OUT PREVIOUS DATA VALID DATA VALID Read Cycle No 2 OE Controlled 171 ADDRESS tLZ0E DATA OUT HIGH IMPEDANCE IMPEDANCE Voc SUPPLY CURRENT Notes ee 15 Device is continuously selected OE CE Vi CE3 16 WE is HIGH for read cycle 17 Address valid before or similar to CE transition LOW and CE transition HIGH Document 38 05578 Rev D Page 6 of 11 Feedback F CYPRESS CY62158EV30 PERFORM Switching Waveforms continued Write Cycle No 1 WE Controlled 18 192. P _ r M M W Se SSE ecr CY62158EV30 MoBL YPRESS PERFOR Features Very high speed 45 ns Wide voltage range 2 20 3 60 Pin compatible with CY62158DV30 Ultra low standby power Typical standby current 2 Maximum standby current 8 pA Ultra low active power Typical active current 1 8 mA f 1 MHz Easy memory expansion with CE4 and OE features Automatic power down when deselected CMOS for optimum speed power Offered in Pb free 48 ball VFBGA 44 pin TSOP II and 48 pin TSOP I packages Logic Block Diagram 8 Mbit 1024K x 8 Static RAM Functional Description 221 The CY62158EV30 is a high performance CMOS static RAM organized as 1024K words by 8 bits This device features advanced circuit design to provide ultra low active current This is ideal for providing More Battery Life MoBL in portable applications such as cellular telephones The device also has an automatic power down feature that significantly reduces power consumption Placing the device into standby mode reduces power consumption significantly when deselected HIGH or LOW The eight input and output pins IOg through 107 are placed a high impedance state when the device is deselected CE4 HIGH or CE2 LOW the outputs are disabled OE HIGH or a write operation is in progress C
3. 1 twc CE2 taw tsa tpwe RSs wo tHZ0E m Write Cycle No 2 CE or CE Controlled 18 191 OF tsp tup DATA IO VALID DATA Notes 18 Data IO is high impedance if OE 19 If CE goes HIGH or goes LOW Simultaneously with WE HIGH the output remains in high impedance state 20 During this period the 10 are in output state Do not apply input signals Document 38 05578 Rev D Page 7 of 11 Feedback ES CYPRESS CY62158EV30 MoBL Switching Waveforms continued Write Cycle No 3 WE Controlled OE LOW U twc mones C tuzwE tizwE Truth Table CE CE WE OE Inputs Outputs Mode Power H X X X High Z Deselect Power Down Standby Isp X L X X High Z Deselect Power Down Standby lag L H H L Data Out Read Active Icc L H H H High Z Output Disabled Active L H L X Data in Write Active lcc Ordering Information yeu Ordering Code Diem Package Type cb 45 CY62158EV30LL 45BVXI 51 85150 48 ball Very Fine Pitch Ball Grid Array Pb free Industrial CY62158EV30LL 45ZSXI 51 85087 44 pin TSOP II Pb free Document 38 05578 Rev D Page 8 of 11 Feedback PERFORM Package Diagrams TOP VIEW A1 CORNER 12 3 4 5 CY62158EV30 MoBL Fig
4. E4 LOW and CE5 HIGH and WE LOW To write to the device take Chip Enables CE4 LOW and CE HIGH and Write Enable WE input LOW Data on the eight IO pins through 107 is then written into the location specified on the address pins Ao through A49 To read from the device take Chip Enables CE4 LOW and HIGH and OE LOW while forcing the WE HIGH Under these conditions the contents of the memory location specified by the address pins appear on the IO pins See the Truth Table on page 8 for a complete description of read and write modes 109 a 102 o 1024K x 8 103 gt 9 ARRAY 104 105 106 4 107 lt lt lt lt lt lt Notes 1 For48 pin TSOP I pin configuration and ordering information please refer to CY62157EV30 Data sheet 2 For best practice recommendations refer to the Cypress application note System Design Guidelines http www cypress com San Jose CA 95134 1709 408 943 2600 19 2007 Cypress Semiconductor Corporation Document 38 05578 Rev D 198 Champion Court Feedback Pin Configurations 48 Ball VFBGA Top View OG OCIO OVOG C C C69 8 6 GC 9 8 696266966 Product Portfolio CY62158EV30 MoBL 44 Pin TSOPII Top View Power Dissipation Vcc Range
5. ENTION MODE gt 1 5V or CE2 Note 10 Full Device AC operation requires linear ramp from Vpr to Vcc min gt 100 or stable at Vcc min gt 100 us Document 38 05578 Rev D Page 4 of 11 Feedback Switching Characteristics Over the Operating Range CY62158EV30 MoBL Parameter Description an Unit Min Max Read Cycle tro Read Cycle Time 45 ns tAA Address to Data Valid 45 ns Data Hold from Address Change 10 ns tACE CE LOW and CE HIGH to Data Valid 45 ns tpoE OE LOW to Data Valid 22 ns lizoE OE LOW to Low 2112 5 ns tuzoE OE HIGH to High 2112 131 18 ns tizcE LOW and HIGH to Low 2112 10 ns CE HIGH or CE LOW to High 212 131 18 ns tpu LOW and HIGH to Power Up 0 ns tpp CE HIGH or CE LOW to Power Down 45 ns Write 4 twc Write Cycle Time 45 ns tscE CE LOW and HIGH to Write End 35 ns taw Address Setup to Write End 35 ns Address Hold from Write End ns tsa Address Setup to Write Start ns tpwe WE Pulse Width 35 ns tsp Data Setup to Write End 25 ns tup Data Hold from Write End 0 ns tuzwE WE LOW to High 2112 131 18 ns lizwE WE HIGH to Low 2112 10 ns Notes 11 Test conditions for all parameters other than tri state parameters assume signal transition time of 3 ns or less 1V ns timing reference levels of Vcc ypy2 input pulse levels of 0 to
6. V Operating Icc mA Product d yi Standby 1 f 1 MHz f fmax Min Max Typ Max Typ Max Typ Max CY62158EV30LL 2 2 3 0 3 6 45 1 8 3 18 25 2 8 Notes 3 NC pins are not connected on the die 4 Typical values are included for reference only and are not guaranteed or tested Typical values are measured at Vcc 25 Document 38 05578 Rev D Page 2 of 11 Feedback Z CYPRESS CY62158EV30 MoBL 1 PERFORM Maximum Ratings Output Current into Outputs 20 mA Exceeding the maximum ratings may impair the useful life of NE the device These user guidelines are not tested Storage 65 to 150 Latch up 2200 mA Ambient Temperature with Operating Range Power Applied cane 55 C to 125 Ambient Supply Voltage to Ground Potential 0 3V to 0 3V Product Range Temperature Vec DC Voltage to Outputs Loo A in High Z State 6 0 3V to Vcc max 0 3V CY62158EV30LL Industrial 40 C to 85 C 2 2V 3 6V DC Input Voltage 9l 0 3V to Vcc max 0 3V Electrical Characteristics Over the Operating Range 45 ns Par
7. ameter Description Test Conditions i Unit Min 1 Output HIGH Voltage lop 0 1 mA 2 0 V 1 0 mA Voc gt 2 70V 24 V VoL Output LOW Voltage loy 0 1 mA 0 4 V loi 2 1 mA Voc gt 2 70V 0 4 V Input HIGH Voltage 2 2V to 2 7V 1 8 Voc 0 3 1 V 2 7V to 3 6V 2 2 Vec 0 3V V Input LOW Voltage 2 2V to 2 7V 0 3 0 6 V 2 7V to 3 6V 0 3 0 8 V lix Input Leakage Current GND lt Vi lt 1 1 loz Output Leakage Current GND lt Vo lt Vcc Output Disabled 1 1 lec Vec Operating Supply Current f fmax 1 tre 18 25 mA louT 0 mA f 1 MHz CMOS levels 1 8 3 mA leg Automatic CE CE gt Vcc 0 2V lt 0 2V 2 8 uA Power down Current Vin gt 0 2V lt 0 2V CMOS Inputs f fmax Address and Data Only f 0 OE and WE Vec 3 60V 15821 Automatic CE CE gt Vcc 0 2V or CE lt 0 2V 2 8 Power down Current Vin gt 0 2V or Vin lt 0 2 CMOS Inputs f 0 3 60V Capacitance Parameter Description Test Conditions Max Unit Input Capacitance Ta 25 C f 1 MHz 10 pF Cout Output Capacitance 10 pF Notes 5 Vit min 2 0V for pulse durations less than 20 ns 6 Vcc 0 75V for pulse duration less than 20 ns 7 Full device AC operation assumes 100 us ramp time from 0 to Vcc min and 200 us wait time aft
8. d L bin Removed 44 pin TSOP Il package Included 48 pin TSOP I package Changed the Typ value from 16 mA to 18 mA and max value from 28 mA to 25 mA for test condition f fax 1 tgc Changed the max value from 2 3 mA to mA for test condition f 1MHz Changed the Isp and max value from 4 5 uA to 8 uA and Typ value from 0 9 uA to 2 pA respectively Updated Thermal Resistance table Changed Test Load Capacitance from 50 pF to 30 pF Added Typ value for lccpg Changed the max value from 4 5 uA to 5 uA Corrected tg in Data Retention Characteristics from 100 us to tec ns Changed tj zog from to 5 Changed t from 6 to 10 Changed tyzcg from 22 to 18 Changed tpwe_ from 30 to 35 Changed tsp from 22 to 25 Changed t from 6 to 10 Updated the ordering Information and replaced the Package Name column with Package Diagram C 467052 See ECN NXR Included 44 pin TSOP II package in Product Offering Removed TSOP I package Added reference to CY62157EV30 TSOP I Updated the ordering Information table D 1015643 See ECN VKN Added footnote 8 related to lsg2 and Iccpr Document 38 05578 Rev D Page 11 of 11 Feedback
9. er Vcc stabilization 8 Only chip enables CE and must be at CMOS level to meet the 5 2 spec Other inputs can be left floating 9 Tested initially and after any design or process changes that may affect these parameters Document 38 05578 Rev D Page 3 of 11 Feedback SSF CYPRESS 0 CYG2158EV30 MoBL Thermal Resistance Parameter Description Test Conditions BGA TSOP Il Unit Thermal Resistance Still Air soldered on a 3 x 4 5 inch 72 76 88 C W Junction to Ambient two layer printed circuit board Thermal Resistance 8 86 13 52 C W Junction to Case AC Test Loads and Waveforms ALL INPUT PULSES R1 90 OUTPUT 10 GND 30 pF I R2 Rise Time 1 V ns Fall time 1 V ns INCLUDING JIGAND a Equivalent to THEVENIN EQUIVALENT SCOPE OUTPUTo wo VH Parameters 2 5V 3 0V Unit R1 16667 1103 Q R2 15385 1554 Q 8000 645 Q VIH 1 20 1 75 V Data Retention Characteristics Over the Operating Range Parameter Description Conditions Min Typ Max Unit VDR for Data Retention 1 5 V lecpr Data Retention Current Vcc 1 5V gt 0 2V 2 5 or lt 0 2V gt 0 2V or VIN lt 0 2 Chip Deselect to Data 0 ns Retention Time tg Lol Operation Recovery tre ns Time Data Retention Waveform DATA RET
10. spective holders Document 38 05578 Rev D Page 10 of 11 Cypress Semiconductor Corporation 2004 2007 The information contained herein is subject to change without notice Cypress Semiconductor Corporation assumes no responsibility for the use of any circuitry other than circuitry embodied in a Cypress product Nor does it convey or imply any license under patent or other rights Cypress products are not warranted nor intended to be used for medical life support life saving critical control or safety applications unless pursuant to an express written agreement with Cypress Furthermore Cypress does not authorize its products for use as critical components in life support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user The inclusion of Cypress products in life support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all charges Feedback CY62158EV30 MoBL Document History Page Document Title CY62158EV30 MoBL 8 Mbit 1024K x 8 Static RAM Document Number 38 05578 Orig of REV Change NO Issue Date Description of Change idi 270329 See ECN PCI New Data Sheet 291271 See ECN SYT Converted from Advance Information to Preliminary Changed lccpg from 4 to 4 5 pA B 444306 See ECN NXR Converted from Preliminary to Final Removed 35 ns speed bin Remove
11. ure 1 48 Ball VFBGA 6 x 8 x 1 mm 51 85150 rm 0 10 A B 2 D e G H 6 005010 a 8 e X 3 i C CZ CZ T SEATING PLANE lt 5 8 Document 38 05578 Rev D BOTTOM VIEW A1 CORNER 0 05 MC 60 25 0 30 0 05 48 6 5 4 3 2 7 xX E 171900000 OOO OOO e 8 8 5 OOO OOO e a Q OQ Qo Oo F OOO OOO t H A 1 875 0 75 3 75 B m 6004040 A 0 15 4 51 85150 D Page 9 of 11 Feedback CYPRESS 6 82158 0 MoBL PERFORM Package Diagrams continued Figure 2 44 Pin TSOP Il 51 85087 DIMENSION IN MM INCH MIN 11 938 0 4705 EJECTOR PIN VIEW VIEW 10 262 0 404 gt 10058 0 396 0362 p 5 0210 0 0083 0 120 0 0047 0 597 0 02355 0 406 0 01605 0 0315 0800 EN 0 300 0 012 18 517 0 729 18313 0725 0 0395 51 85087 A 1194 0 0475 0 150 0 0059 0 99 MoBL is a registered trademark and More Battery Life is a trademark of Cypress Semiconductor All product and company names mentioned in this document are the trademarks of their re
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