Finisar FTLX1671D3BTL network transceiver module
Contents
1. Finisar Corporation February 2011 Rev AO Page 3 FTLX1671D3BCL SFP ER EW Preliminary Specification February 2011 F Intsar Receiver Receiver Sensitivity OMA Stressed Receiver Sensitivity SPERM Ree Cas mes Average Receive Power Paw 158 10 dBm 4 Damage Threshold II Io dm Opisi Cemer Waver 3 m6 199 m FRecdverRellecume Ss r s dB DAMM dE 94 A 1 Losas 108 a am LOS Hysteresis i dB Notes 1 Average launch power min is informative and not the principal indicator of signal strength A transmitter with launch power below this value cannot be compliant however a value above this does not ensure compliance 2 Valid between 1530 and 1565 nm Measured with worst ER BER 10 2 1 PRBS Valid between 1530 and 1565 nm Per IEEE 802 3ae 4 Average power figures are informative only per IEEE 802 3ae LA V General Specifications Typ Brae BR 95 193 G5 Bit Error Rao Bit Error Rati BR oe 2 Max Supported Link Length Lux 1 39 m Notes 1 IOGBASE ER IOGBASE EW 2 Tested with a 2 1 PRBS 3 SMF 28 fiber 1565nm wavelength Power Level I Power Level II Power up Sequence The FTLX1671D3BTL is a Power Level II device as the maximum power dissipation is above IW at high temperat2. Notes 1 Accuracy of measured Tx bias current is 10 of the actual bias current from the laser driver to the laser Finisar Corporation February 2011 Rev AO Page 6 FTLX1671D3BCL SFP ER EW Preliminary Specification February 2011 F Intsar X Mechanical Specifications Finisar FTLX1671D3BTL SFP transceivers are compatible with the SFF 8432 specification for improved pluggable form factor and shown here for reference purposes only To allow for potential heat sink applications the label 1s on the bottom side Bail color is red 14 80 13 60 13 70 Gs 539 503 335 L f 9 x ages j 1 LHHEHH MEME l N 8 50 335 0 50 024 1 80 2 55 44 95 EE 071 100 1 770 47 50 1 870 Figure 2 FTLX1671D3BTL Mechanical Dimensions Finisar Corporation February 2011 Rev AO Page 7 IHISGF F FTLX1671D3BCL SFP ER EW Preliminary Specification February 2011 XI PCB Layout and Bezel Recommendations Em 10 00 a PLACES Detail X ARE 60 85 0 05 le 20 1 amp Xx v A A A BSC pcm rpm PHP CROSS HATCHED AREA DENOTES COMPONENT AND TRACE KEEP DUT CEXCEPT CHASSIS GROUND AN Cy Vy H E AEN m ee ER el 11 PLACES A g1 905 0 1 ke THIS AREA DENOTES 11 PLACES COMPONENT KEEP OUT E A 19 HOLES TRACES ALLOWED 3 PACER 26 8 Datum and Basic Dimension Established by Customer gt Rads and Vias are Chassis Ground
3. 300 s50 mv 26 Output ise time and fallime Tete 28 ps 3 Tostat REEL 4 Lige Mise et E Power Supply Noise Tolerance VecT VecR PerSFESE3IRev41 mVpp 5 Notes 1 Connected directly to TX data input pins AC coupling from pins into laser driver IC 2 Into 100Q differential termination 3 20 80 Measured with Module Compliance Test Board and OMA test pattern Use of four Us and four 0 s sequence in the PRBS 9 is an acceptable alternative 4 LOS is an open collector output Should be pulled up with 4 7kQ 1OK 2 on the host board Normal operation is logic 0 loss of signal is logic 1 See Section 2 8 4 of SFF 8431 Rev 4 1 6 The FTLX1671D3BTL is a limiting module 1 e it employs a limiting receiver Host board designers using an EDC PHY IC should follow the IC manufacturer s recommended settings for interoperating the host board EDC PHY with a limiting receiver SFP module A IV Optical Characteristics Top 40 to 85 C Vcc3 3 14 to 3 46 Volts Transmitter Optical Modulation Amplitude mpm LEGERE Average Launch Power Pax 47 LL 40 d m 1 Optical Wavelength a 1530 meim Side Mode Suppression Ratio 1 SMSR 30 dB Optical Extinction Ratio ER 30 9 dBj Transmitter and Dispersion Penalty TDP I T an on a transmitter OFF Tx Tx Jitter itter T Tg Per 802 3ae requirements WEE ur m REM
4. February 2011 Rev AO Page 1 FTLXI671D3BCL SFP ER EW Preliminary Specification February 2011 F Intsar I Pin Descriptions A C E 1 V L3 Tes Transmitter Disable Laser output disabled on Kigh or opens 3 E 4 SDA _ 2 wire Serial Interface Data Line Z OZ ooo 5 SCL nie Serial Interface Clock Line 2 6 MOD ABS Module Absent Grounded within the module Li 7 RSO JjRateSelctO LL 8 RXIOS Toss of Signal indication Logic 0 indicates normal operation 8 o0 5 9 RSI JQgRateSeecl S O 10 Ver Receiver Ground LL 1l Veer Receiver Ground LL Tx Rb Receiver Inverted DATA out AC Coupled 13 RD Receiver Non inverted DATA out AC Coupled 14 Ver Receiver Ground LL 15 Veg Receiver Power Sum 16 Vor Transmitter Power Supply 17 Veer Transmitter Ground LL 18 TD Transmitter Non Inverted DATA in AC Coupled JL L19 TD Transmitter Invened DATA in AC Coupled Notes 1 Circuit ground is internally isolated from chassis ground Tu is an open collector drain output which should be pulled up with a 4 7k 10k Ohms resistor on the host board if intended for use Pull up voltage should be between 2 0V to Vcc 0 3V A high output indicates a transmitter fault caused by either the T X bias current or the TX output power exceeding the preset alarm thresholds A low output indicates normal
5. operation In the low state the output is pulled to 0 8 V Laser output disabled on Tpjs gt 2 0V or open enabled on Tp s 0 8V Internally pulled down per SFF 8431 Rev 4 1 5 LOS is open collector output Should be pulled up with 4 7k 10kQ on host board to a voltage between 2 0V and 3 6V Logic 0 indicates normal operation logic 1 indicates loss of signal pU VeeT VeeT 4 v TX_Fault 4 el Y TX Disable VeeT 12 el gt VccT Towards Bezel 6 Towards ASIC VccR MOD ABS VeeR H Wa o D el RX_LOS Ee 2 D e VeeR VeeR 5 n Q r Figure 1 Diagram of Host Board Connector Block Pin Numbers and Names Finisar Corporation February 2011 Rev AO Page 2 FTLX1671D3BCL SFP ER EW Preliminary Specification February 2011 F Intsar II Absolute Maximum Ratings Exceeding the limits below may damage the transceiver module permanently erte Supply Voltage ve 0s 40 Y o 1 ee ece po Las 9 II l Non condensing III Electrical Characteristics Top 40 to 85 C Vcc 3 14 to 3 46 Volts Supply Voltage Wee 14 ose pvp Supply Curent fee m w mA Input differential impedance Rae io Ja i Differential data input swing Vinpp 189 mo mV Transmit Disable Vollage ve 2 ve v Transmit Enable Voltage Vin Vee Veew 08 v Differential data output swing 1 Vowpp
6. 11 Places AxXThrough Holes are Unplated 0 95r0 025 S HOLESA Figure 3 Page 8 Rev AO Finisar Corporation February 2011 FTLX1671D3BCL SFP ER EW Preliminary Specification February 2011 F FHtsar 0 8 3 PLACES Jo oslo BS 1 5520 05 eo 1L AG BG A2 HO S 16 250 640 AX r 10 REF 44 BEZEL OPENING preis BELOW PC BOARD NOTES An MINIMUM PITCH ILLUSTRATED ENGLISH DIMENSIONS ARE FOR REFERENCE ONLY 2 NOT RECOMMENDED FOR PCI EXPANSION CARD APPLICATIONS Figure 4 Finisar Corporation February 2011 Rev AO Page 9 FTLX1671D3BCL SFP ER EW Preliminary Specification February 2011 XII Host Module Interface Diagram Finisar Transceiver VCCT d ke 10k EEPROM Controller z VEE ER 7 KENNEN 40 Control and 230k 230k JEER Diagnostics VEE VEE Receiver 11 VEER 42 Ww 14 VEER L 15 16 Transmitter 17 WEET 418 4 g E 20 WEET V Figure 5 D d oo E Y Finisar Corporation February 2011 Rev AO Finisar oystem Host YCC_HOST D 1uF MSA Suggested Filter Network O 4 pF 22 UF 22 UF 4 7 uH 47uH 47k 10k D 1uF D 1pF TXF ault TxDiz SDA SCA MOD ABS RSO LOS jr D VECR VCCT ili X Page 10 FTLX1671D3BCL SFP ER EW Preliminary Specification February 2011 F Intsar XIII References 1 Specifications for Enhanced 8 5 and 10 Gigabit Sma
7. Finisar PRELIMINARY Product Specification RoHS 6 Compliant 10Gb s Industrial Temperature 40km Datacom SFP Transceiver FTLX1671D3BTL PRODUCT FEATURES e Hot pluggable SFP footprint e Supports 9 95 to 10 3Gb s bit rates e Power dissipation lt 1 5W Typical IW e RoHS 6 compliant lead free e Industrial temperature range 40 C to 85 C e Single 3 3V power supply e Maximum link length of 40km e 1550nm cooled CML technology Preliminary photo shown e Receiver limiting electrical APPLICATIONS interface e Duplex LC connector e lOGBASE ER EW 10G Ethernet e Built in digital diagnostic functions Finisars FTLX1671D3BTL 10Gb s Enhanced Small Form Factor Pluggable SFP transceivers are designed for use in 10 Gigabit Ethernet links up to 40km over single mode fiber They are compliant with SFF 8431 SFF 84327 and IEEE 802 3ae IOGBASE ER EW The FTLX1671D3BTL incorporates advanced CML technology and is a limiting module Le it employs a limiting receiver Host board designers using an EDC PHY IC should follow the IC manufacturer s recommended settings for interoperating the host board EDC PHY with a limiting receiver SFP module Digital diagnostics functions are available via a 2 wire serial interface as specified in SFF 8472 The transceiver is RoHS compliant and lead free per Directive 2002 95 EC and Finisar Application Note AN 2038 PRODUCT SELECTION FTLX1671D3BTL Finisar Corporation
8. d the serial clock signal SCL Mod Def 1 1s generated by the host The positive edge clocks data into the SFP transceiver into those segments of the E PROM that are not write protected The negative edge clocks data from the SFP transceiver The serial data signal SDA Mod Finisar Corporation February 2011 Rev AO Page 5 FTLX1671D3BCL SFP ER EW Preliminary Specification February 2011 F Intsar Def 2 1s bi directional for serial data transfer The host uses SDA in conjunction with SCL to mark the start and end of serial protocol activation The memories are organized as a series of 8 bit data words that can be addressed individually or sequentially For more information please see the SFP MSA documentation and Finisar Application Note AN 2030 Please note that evaluation board FDB 1027 is available with Finisar ModDEMO software that allows simple to use communication over the 2 wire serial interface IX Digital Diagnostic Specifications FTLX1671D3BTL transceivers can be used in host systems that require either internally or externally calibrated digital diagnostics E cc NN RN NC NU temperature Hee CET supply voltage Measured TX bias current mp o a Measured TX output power mp 2 dB Measured RX received average ADDnnp power 2 optical power Dynamic Range for Rated Accuracy Measured TX bias current Measured TX output power Measured RX received average optical power
9. ifications The standard SFP serial ID provides access to identification information that describes the transceiver s capabilities standard interfaces manufacturer and other information Additionally Finisar SFP transceivers provide a enhanced digital diagnostic monitoring interface which allows real time access to device operating parameters such as transceiver temperature laser bias current transmitted optical power received optical power and transceiver supply voltage It also defines a sophisticated system of alarm and warning flags which alerts end users when particular operating parameters are outside of a factory set normal range The SFP MSA defines a 256 byte memory map in E PROM that is accessible over a 2 wire serial interface at the 8 bit address 1010000X AOh The digital diagnostic monitoring interface makes use of the 8 bit address 1010001 X A2h so the originally defined serial ID memory map remains unchanged The interface is identical to and is thus fully backward compatible with both the GBIC Specification and the SFP Multi Source Agreement The complete interface is described in Finisar Application Note AN 2030 Digital Diagnostics Monitoring Interface for SFP Optical Transceivers The operating and diagnostics information is monitored and reported by a Digital Diagnostics Transceiver Controller DDTC inside the transceiver which is accessed through a 2 wire serial interface When the serial protocol 1s activate
10. ll Form Factor Pluggable Module SFP SFF Document Number SFF 8431 Revision 4 1 July 6 2009 Although SFF 8431 does not explicitly refer to IFOGBASE ER EW it is intended for the FTLX1671D3BTL product to adhere to references to electrical SFI specifications similar to LOGBASE LR LW 2 Improved Pluggable Formfactor SFF Document Number SFF 8432 Revision 4 2 April 18 2007 3 IEEE Std 802 3ae Clause 52 PMD Type IOGBASE ER IEEE Standards Department 4 Digital Diagnostics Monitoring Interface for Optical Transceivers SFF Document Number SFF 8472 Revision 10 1 March 1 2007 5 Directive 2002 95 EC of the European Council Parliament and of the Council on the restriction of the use of certain hazardous substances in electrical and electronic equipment January 27 2003 6 Application Note AN 2038 Finisar Implementation Of RoHS Compliant Transceivers Finisar Corporation January 21 2005 XIV For More Information Finisar Corporation 1389 Moffett Park Drive Sunnyvale CA 94089 1133 Tel 1 408 548 1000 Fax 1 408 541 6138 sales finisar com Www finisar com Finisar Corporation February 2011 Rev AO Page 11
11. ure Please refer to SFF 8431 and Finisar Application Note AN 2076 for details of the host responsibilities regarding the Power Level I Power Level II power up sequence to ensure proper transceiver operation Timing Parameters Time to initialize cooled module t start up cooled 1 60 90 s 1 Notes 1 More details on Timing Parameters can be found in SFF 8431 Maximum Tx Disable negate time t on 3 seconds Finisar Corporation February 2011 Rev AO Page 4 FTLX1671D3BCL SFP ER EW Preliminary Specification February 2011 F Int tsar VI Environmental Specifications Finisar FTLX1671D3BTL transceivers have an operating temperature range from 40 C to 85 C case temperature Parameter Symbol Min Typ Max Units Ref ee Te 9 5 Sorge Tempere 4 3 8 VII Regulatory Compliance Finisar transceivers are Class 1 Laser Products and comply with US FDA regulations These products are certified by T V and CSA to meet the Class 1 eye safety requirements of EN IEC 60825 and the electrical safety requirements of EN IEC 60950 Copies of certificates are available at Finisar Corporation upon request VIII Digital Diagnostic Functions Finisar FTLX1671D3BTL SFP transceivers support the 2 wire serial communication protocol as defined in the SFP MSA It is very closely related to the E PROM defined in the GBIC standard with the same electrical spec
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