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Intel SR1640TH

1. The power supply Fan shall be external control able through a HW pin on the connector This function allows overwriting the MCU Fan control due to thermal stress at the PDB In normal operation the MCU controls the fan depending on Loading and internal temperature The Pin B3 B P Fail controls the internal Fan duty depending on voltage level recognized corresponding to below table Table 66 Fan control Voltage Pin B3 Fan Duty lt 1 25V MCU controlled 3 7 SMBus communication The serial bus communication devices for MC and FRU data in the power supply shall be compatible with both SMBus 2 0 high power and 12C Vdd based power and drive This bus shall operate at 5V The SMBus pull ups are located on the motherboard and shall be connected to 5V Two pins are allocated on the power supply One pin is the serial clock SCL The second pin is used for serial data SDA Both pins are bi directional and are used to form a serial bus The device s in the power supply shall be located at an address s determined by addressing pins AO and A1 on the power supply module The circuits inside the power supply shall derive their 5V power from the 5Vsb bus through a buffer Device s shall be powered from the system side of the 5VSB or ing device No pull up resistors shall be on SCL or SDA inside the power supply The pull up resistors should be located external to the power supply on system application side 68 Revision 1 0 Intel orde
2. User Password Status lt Installed Information only Indicates Not Installed gt the status of the user password Set Administrator 123aBcD Administrator password is used to This option is only to control Password control change access in BIOS Setup access to the setup Utility Administrator has full Only alphanumeric characters can be access to all the setup used Maximum length is 7 characters It items Clearing the is case sensitive Administrator password Note Administrator password must be also clears the user set in order to use the user account password Set User Password 123aBcD User password is used to control entry Available only if the access to BIOS Setup Utility administrator password is Only alphanumeric characters can be installed This option only used Maximum length is 7 characters It protects the setup is case sensitive User password only has Note Removing the administrator limited access to the setup password also automatically removes items the user password Front Panel Lockout Enabled If enabled locks the power button and Disabled reset button on the system s front panel If Enabled is selected power and reset must be controlled via a system management interface 2 6 5 4 Server Management Screen The Server Management screen allows the user to configure several server management features This screen also provides an access point to the screens for configuring console redirection an
3. 0 1 2 Default 2 2 3 Clear CMOS 3 10 BIOS Recovery_Node1 J1G3 1 p G 1 2 Default 2 2 3 Enable 3 Je BIOS Recovery_Node2 J39H3 1 2 Default 2 3 Enable CMOS Clear_Node2 eB Bim Bee 2 ura ae Sum se H a a J9J1 1 2 Default 2 3 Clear CMOS y z gm 1 gt 0 De uE EO 2 he 59 00 00 9 L L m T UCI PT DC Gin gt a 3 10 o TE S O im L ao mnm AREND EE o DI paan TT G Cie al al BER S uu C5 ee wow D d M ie Dh ee Santer gt 000000 sm MEW E O Ogesses a e El ENEE Figure 34 Jumper locations on board Revision 1 0 57 Intel order number E94847 001 Functional Architecture Intel Server System SR1640TH TPS 2 7 2 1 CMOS Clear J1G2 J9J1 When enabled all CMOS settings will be reset to default Table 46 CMOS Clear J1G2 J9J1 Name Pin To Pin Function Description Reset 2 3 CMOS Clear 2 7 2 2 BIOS Recovery J1G3 J9H3 Provide a manual mode of BIOS recovery configures Table 47 BIOS Recovery J1G3 J9H3 Name Pin To Pin Function Description Default 12 Normal operation Recovery 2 3 Recovery BIOS recovery from other media 2 7 2 3 BMC Force Update J1A1 J5A1 Provide a manual mode of BIOS recovery configures Table 48 BMC Force Update J1A1 J5A1 Name Pin To Pin Function Description Default Normal operation Enable 2 3 Enable BMC fo
4. 10 15 09 15 11 25 10 15 09 15 08 36 10 15 09 15 07 11 10 15 09 15 05 05 MEM Parity Error CPUO Ch 0 Dimm0 Thermal Trip Occurred Figure 8 Example of Event Log Viewer The Event log viewer is at another page than the BIOS error manager The event log viewer can display many log in one page Each event log is displayed in one line The latest one is on the top When there are more event logs on one page Page Up and Page Down keys can be used There is a scroll bar to allow end users to view the logs from top to bottom 2 6 BIOS User Interface 2 6 1 Logo Diagnostic Screen The logo Diagnostic Screen displays in one of two forms e If Quiet Boot is enabled in the BIOS setup a logo splash screen displays By default Quiet Boot is enabled in the BIOS setup If the logo displays during POST press lt Esc gt to hide the logo and display the diagnostic screen e Ifa logo is not present in the flash ROM or if Quiet Boot is disabled in the system configuration the summary and diagnostic screen displays The diagnostic screen displays the following information e BIOSID e Platform name e Total memory detected Total size of all installed DDR3 DIMMs e Processor information Intel branded string soeed and number of physical processor identified e Keyboards detected if plugged in e Mouse devices detected if plugged in 2 6 2 BIOS Boot Popup Menu The BIOS Boot Specification BBS provides for a Boot Popup Menu invo
5. Current frequency of the processor Core Frequency Information only Frequency at which the processor are currently running O eee only Revision of i Ie loaded microcode Ss Cache RAM Information only Size of the Processor L1 Cache L2 Cache RAM Information only Size of the Processor L2 Cache L3 Cache RAM Information only Size of the Processor L3 Cache Revision 1 0 31 Intel order number E94847 001 PA Revision Functional Architecture Setup Item Help Text Processor Version Current QPI Link Speed QPI Link Frequency Intel Turbo Boost Technology Enhanced Intel SpeedStep Technology Intel Hyper Threading Technology Core Multi Processing Execute Disable Bit Intel Virtualization Technology Intel Virtualization Technology for Directed 1 0 Interrupt Remapping Coherency Support ATS Support Pass through DMA Support Hardware Prefetcher Adjacent Cache Line Prefetch 32 Enabled Disabled Enabled Disabled Enabled Disabled Enabled Disabled Enabled Disabled Enabled Disabled Enabled Disabled Enabled Disabled Enabled Disabled Enabled Disabled Enabled Disabled Enabled Disabled Intel Server System SR1640TH TPS Comments Information only ID string from the Processor Information only Current speed that the QPI Link is using Information only Current frequency that the QPI Link is using This option is only visibl
6. Field name Field description Manufacturer name 3Y POWER Product name YM 2451C Product part model number SUNNY451AMP200Rxx Product version A Product serial number 18 digit serial number Asset tag Not used code is zero length byte FRU file ID Not required PAD bytes SE necessary to allow for 8 byte offset to 3 9 2 Multi record area Implement as defined by the IPMI FRU document The following record types shall be used on this power supply Power supply information Record type 0x00 DC output Record type 0x01 No other record types are required for the power supply 3 10 AC Inlet Connector The AC input connector is an IEC 320 C 14 power inlet This inlet is rated for 15 A 250 VAC 3 11 AC Power Cord Specification Requirements The AC power cord used must meet the following specification requirements Cable Type SJT Wire Size 16 AWG Temperature Rating 105 C Amperage Rating 13A Voltage Rating 125V 0 2340 008 che D 1610 008 Le el 0 5540 008 Figure 38 AC Power Cord Specification Requirements Revision 1 0 71 Intel order number E94847 001 Cooling Sub System Intel Server System SR1640TH TPS 4 Cooling Sub System Several components and configuration requirements make up the cooling sub system of the chassis These include processors chipsets VR heatsinks system fan module power supply fans CPU air duct and drive bay population All are necessary to provide and reg
7. Interface To Host PCle x1 Interface Graphics Subsystem Figure 7 Integrated BMC Hardware 2 4 6 1 Integrated BMC Embedded LAN Channel The Integrated BMC hardware includes two dedicated 10 100 network interfaces Interface 1 This interface is available from either of the available NIC ports in system that can be shared with the host Only one NIC may be enabled for management traffic at any time To change the NIC enabled for management traffic please use the Write LAN Channel Port OEM IPMI command The default active interface is port 1 NIC1 Interface 2 This interface is available from the optional RMM3 Lite V module which is a dedicated management NIC that is not shared with the host For these channels support can be enabled for IPMI over LAN and DHCP For security reasons embedded LAN channels have the following default settings P Address Static All users disabled 2 4 6 2 Optional RMM3 Lite V module RMM3 Lite V module serves two purposes Give the customer the option to add a dedicated management 100 Mbit LAN interface to the product Provide additional flash space enabling the Advanced Management functions to support WS MAN and CIMON 18 Revision 1 0 Intel order number E94847 001 Intel Server System SR1640TH TPS Functional Architecture Table 9 Optional RMM3 Advanced Management Board Features Feature Description KVM Redirection Remote console access via ke
8. RERAN dei Hio Revision 1 0 Intel order number E94847 001 Environmental and Regulatory Specification Intel Server System SR1640TH TPS Compliance d Compliance Reference Marking SEH Compliance Reference Description Example F EME lt UE ETHEL atea 2 REIRE ER German Dieses Ger te hat mehr als ein Stromkabel Um eine Gefahr des elektrischen Schlages zu verringern trennen sie beide 2 Stromkabeln bevor Instandhaltung Ground 60950 Deviation for Nordic Countries e NES Connection Swedish online Apparaten skall anslutas till jordat uttag n r den ansluts till ett n tverk Finnish on line 3 Laite on liitett v suojamaadoituskoskettimilla arustettuun pistorasiaan English on line 4 Connect only to a properly earth grounded outlet Country of Origin Logistic Requirements Applied to products to indicate where product Made in China as made Revision 1 0 93 Intel order number E94847 001 Intel Server System SR1640TH TPS Appendix A Integration and Usage Tips Appendix A Integration and Usage Tips Before attempting to integrate and configure your system you should reference this section which provides a list of useful information After the system is integrated with processors memory and peripheral devices the FRUSDR utility must be run to load the proper Sensor Data
9. Virtualization Technology for Directed I O is enabled Only visible when Intel Virtualization Technology for Directed I O is enabled Only visible when Intel Virtualization Technology for Directed I O is enabled Enable Disable Intel VT d Coherency support Enable Disable Intel VT d Address Translation Services ATS support Enable Disable Intel VT d Pass through DMA support Hardware Prefetcher is a speculative prefetch unit within the processor s Note Modifying this setting may affect system performance Enabled Cache lines are fetched in pairs even line odd line Disabled Only the current cache line required is fetched Note Modifying this setting may affect system performance Revision 1 0 Intel order number E94847 001 Intel Server System SR1640TH TPS Functional Architecture 2 6 5 2 2 Memory Screen The Memory screen allows the user to view details about the system memory DDR3 DIMMs installed This screen also allows the user to open the Configure Memory RAS and Performance screen To access this screen from the Main screen select Advanced gt Memory Advanced Memory Configuration Total Memory lt Total Physical Memory Installed in System gt Effective Memory lt Total Effective Memory gt Current Configuration lt Independent gt Current Memory Speed lt Speed that installed memory is running at gt gt DIMM Information DIMM Al alled No all led Disab DIMM_A2
10. cccecccecceeeceeeeeeeeeeeeeeeeeeeeeeeeeeseeeeeeeseeeseeeeeeeeseeess 1 2 Functional Architecture e iecteciedescdecesdcesdececsesdeueseesoseewndecetsesendesos ance acbssevenecsaveeusiesseseseedsre 2 2 1 WEE A 2 2 System DIMENSIONS ii ona ada 5 2 3 System Components imi enman e a tio 6 2 4 Server Board Overview rnnr AEEEEEEEEEEEEEEEEEEEEEEEEEEE EEEE EEn EEEE 7 2 4 1 Server board architecture cccccceecceecceeceeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeneeeeeeeeseeeeeeeneeess 7 2 4 2 tee E NEE 8 2 4 3 Memory Subsystem ie en Dee ida 9 2 4 4 MEN EE 15 2 4 5 PQS UDA SYS EE 15 2 4 6 Integrated Baseboard Management Controller nono 17 2 4 7 VIGGO SUPPOMT aoc feces Seco O NS 19 2 4 8 Network Interface Controller NiIC Tc ostia bei rated 20 2 4 9 Intel Virtualization Technology for Directed I O Intel VT 0 oooooconocococcicno 20 2 5 Platform Management er der uEZ EA ad 21 2 5 1 Feature Support 21 2 5 2 Optional Advanced Management Feature Support coocccccccncccncccncccocccnncnancnancnaninnns 22 2 5 3 Management Engine ME comicos iras 24 2 5 4 O Ee 24 2 5 5 Event log and RTE 24 2 6 BIOS User Itaca p a io e a a ene 25 2 6 1 bogo RI Le e EE 25 2 6 2 BIOS Boot Popup MON Udine ae eee 25 2 6 3 BIOS Set p utility EE 26 2 6 4 OPeratiOn iii E as 26 2 6 5 Server Platform Setup Utility Screens 2 02 e cece eet eter eee eeeteaaeeeeeeeeneeeee 28 2 6 6 Belle Nee 51 2 1 Connector Header Locations and Pin 0UtS ooooocccccccnncc
11. following table provides the pin out for this connector Table 41 Front Panel USB header pin out J7K1 Ping Sign Pins Signal O IE AS IC A INC CI ASIA Usa POH 2 Fe DN e USB PCH 2 FB DN mode o ee 0 USB POH 2 FB DP mode USB_PCH_8 FB_DP USB_PCH_8 FB_DP 2 7 1 5 SAS 4i Connector The server board S3420TH provides a 32 pin SATA SAS connector J9J2 for HDD connection The following table provides the pin out for this connector 54 Revision 1 0 Intel order number E94847 001 Intel Server System SR1640TH TPS Functional Architecture Table 42 SAS 4i connector pin out J9J2 Ping Signal SATAO J RXP_Node2 SGPIO_PCH_SLOAD_R SATAO J RXN_Node2 SGPIO_PCH SDATAO_R Ping i fe Ets MEAN EX RAS ESCH ER SS ND SR E p 17 18 19 0 1 2 3 4 5 6 7 8 9 31 32 a 7 G E G SATA1_J_RXP SATA1_J_RXN_Node2 ND SATA1_J_RXP_Node2 GND SATA1_J_TXN_Node2 SATA1_J_TXP_Node2 SATA1_J RXN SGPIO_PCH_SCLK_R_Node2 SATA1_ J TXN SGPIO DCH SLOAD D Node BEN SATA1_J_TXP EA RA SN WC LS E E EA ES El EN KEE EE 5 10 11 12 13 14 15 6 2 7 1 6 Board Identification LED Connector The server board S3420TH provides a 3 pin connector J3B1 for Board ID LED connection The following table provides the pin out for this connector Table 43 Board Identification LED connector pin out J3B1 Pins Signal SS 2 7 1 7 Syst
12. it emits a short beep for each USB device plugged into the system as they were all just hot added Only on board USB controllers are initialized by BIOS This does not prevent the operating system from supporting any available USB controllers including add in cards 2 4 5 3 2 Legacy USB Support The BIOS supports PS 2 emulation of USB keyboards and mouse During POST the BIOS initializes and configures the root hub ports and searches for a keyboard and or a mouse on the USB hub and then enables the devices that are recognized 16 Revision 1 0 Intel order number E94847 001 Intel Server System SR1640TH TPS Functional Architecture 2 4 6 Integrated Baseboard Management Controller The server boards S3420TH in Intel Server System SR1640TH have the integrated baseboard management controller The ServerEngines LLC Pilot Il Integrated BMC is provided by an embedded ARM9 controller and associated peripheral functionality that is required for IPMl based server management Firmware usage of these hardware features is platform dependant The following is a summary of the Integrated BMC management hardware features used by the ServerEngines LLC Pilot II Integrated BMC 250 MHz 32 bit ARM9 Processor Memory Management Unit MMU Two 10 100 Ethernet Controllers with NC SI support 16 bit DDR2 667 MHz interface Dedicated RTC 12 10 bit ADCs Eight Fan Tachometers Four PWMs Battery backed Chassis Intrusion I O R
13. power nozzle power gauge and PROCHOT2 Therm Ctrl sensors Battery failure Predictive failure when the system has redundant power supplies Amber Blink Non critical Non fatal alarm system is likely to fail BIOS Detected 1 In non mirroring mode if the threshold of ten correctable errors is crossed within the window 2 PCI Express uncorrectable link errors Integrated BMC Detected Critical threshold crossed Voltage temperature power nozzle power gauge and PROCHOT Therm Ctrl sensors VRD Hot asserted Minimum number of fans to cool the system are not present or have failed Amber Solid on Critical non Fatal alarm system has failed or shutdown recoverable BIOS Detected DIMM failure when there i is one DIMM present and no good memory is present Run time memory uncorrectable error in non redundant mode CPU configuration error for instance processor stepping mismatch Integrated BMC Detected 1 CPU CATERR signal asserted 2 CPU 1 is missing 3 CPU THERMTRIP 4 No power good power fault Power Unit Redundancy sensor Insufficient resources offset indicates not enough power supplies are present Notes 1 The BIOS detects these conditions and sends a Set Fault Indication command to the Integrated BMC to provide the contribution to the system status LED 2 Blink rate is 1Hz at 50 duty cycle 6 2 2 1 System Status LED BMC Initialization When AC power is first a
14. 0 compliant Processor on die temperature monitoring thru PECI interface to iBMC Board temperature measurement Fan speed monitoring amp control Voltage monitoring IPMI2 0 based server management Power management via PMBus The Intel Server System SR1640TH system is supporting all Intel Xeon 3400 series and Intel Core i3 processors with TDP 95 W and below Supported processor list can be found at http support intel com support motherboards server SR1640TH Revision 1 0 3 Intel order number E94847 001 Functional Architecture Intel Server System SR1640TH TPS 2 1 System Views There are 2 trays in SR1640TH system chassis Each tray contains one computing board with system FANS and control panel Figure 1 System Overview Figure 2 Single tray overview Left Tray 4 Revision 1 0 Intel order number E94847 001 Intel Server System SR1640TH TPS Functional Architecture Figure 3 System trays overview with power supply units 2 2 System Dimensions Table 2 Chassis Dimensions Height 44 mm 1 73 inches Width without rails 440 mm 17 32 inches Width with rails 456 6 mm 17 97 inches Depth without CMA 690 mm 26 77 inches Weight Chassis basic configured 0 drives 14 6 kg 32 19 Ibs Chassis fully configured 4 drives 17 8 kg 39 25 lbs Revision 1 0 5 Intel order number E94847 001 Functional Architecture Intel Server System SR1640TH TPS 2 3 System Co
15. 1 0 7 Intel order number E94847 001 Functional Architecture Intel Server System SR1640TH TPS Block Diagram gt daag AAA AAA AAA AT NEAN AAN LANA NAAA VANNNNNNN Intel 3420 PCH intel 3420 PCH Node weng e n Figure 6 Server board S3420TH block diagram By high density design philosophy there are two computing nodes on one server board S3420TH These two nodes are identical in logic but they are separated on design without any link between them including any power rail Two nodes share one PSU and three system fans 2 4 2 Processor sub system The Intel Server Board S3420TH supports the following processor e Intel Xeon 3400 Processor series Intel Core 3 processor The Intel Xeon 3400 Series processors are made up of multi core processors based on the 45 nm processor technology The Intel Core i3 processor is made up of dual core processor based on the 32 nm processor technology 2 4 2 1 Intel Xeon 3400 Processor The Intel Xeon 3400 Series processors highly integrated solution variant is composed of four Nehalem based processor cores FC LGA 1156 socket package with 2 5 GT s Up to 95 W Thermal Design Power TDP processors with higher TDP are not supported The server board does not support previous generations of the Intel Xeon processors 8 Revision 1 0 Intel order number E94847 001 Intel Server System SR1640TH TPS Functional Architecture 2 4 2
16. 8589 DIMM_C2 Correctable ECC error encountered Pause after 10 Occurrence Occurrence Occurrence Occurrence Occurrence Occurrence Occurrence Override jumper is set to force boot from lower alternate BIOS bank of flash No Pause 8601 ROM 104 Revision 1 0 Intel order number E94847 001 Appendix D POST Code Errors Intel Server System SR1640TH TPS Error Code Error Message Response 92C8 Serial Port component encountered an output error 94C6 LPC component encountered a controller error 9506 ATA ATPI component encountered a controller error No Pause 9609 Unspecified software component encountered a start error No Pause DXE boot services driver Not enough memory available to shadow a legacy No Pause OxA6A0 option ROM POST Error Beep Codes The following table lists POST error beep codes Prior to system video initialization the BIOS uses these beep codes to inform users on error conditions The beep code is followed by a user visible code on POST Progress LEDs Table 84 POST Error Beep Codes POST Progress Code Memory error Multiple System halted because a fatal error related to the memory was detected Revision 1 0 105 Intel order number E94847 001 Intel Server System SR1640TH TPS Glossary Glossary AR Built In Self Test bridge the IPMB buses of multiple chassis In terms of this specification this describes the PC AT compatible region of battery backed 128
17. Correction The input power factor shall be greater than 0 98 115Vac and 0 94 230Vac over all input voltages at loads greater than 50 of the power supply s rated output 3 5 DC output voltage specification 3 5 1 Output Rating Each DC output shall be capable of supplying the output current shown in below table Table 59 DC output rating Revision 1 0 65 Intel order number E94847 001 Power Sub System Intel Server System SR1640TH TPS 3 5 2 Remote Sensing 12VRS The power supply system output shall have remote sense 12VRS to compensate for drops in the system for the 12V output The remote sense input impedance to the power supply shall be greater than 200 ohms on 12VRS Remote sense shall be able to compensate for a minimum of 400mvV drop on the 12V output The current in any remote sense line shall be less than 5mA to minimum voltage sensing errors 3 5 3 No load operation The power supply shall meet all requirements except for the transient loading requirements when operated at no load on all outputs 3 5 4 Regulation ripple and noise The power supply shall meet the regulation ripple and noise limit under all operating conditions AC line transient loading and output loading The regulation shall be measured at the output connector of the power supply subject to the cross loading conditions in the following table Table 60 Output voltage regulation 3 l Output voltage limits Vdc Output Minimum No
18. Inlet Comet A NEE geit 71 3 11 AC Power Cord Specification Requirements ssssesssessseessessreereerererrtrerrrerreeereet 71 4 Cooling Sub Systeim ET 72 4 1 CPU Heatsink ieee e aae ea E Oa E E E AE E R 72 4 2 Three Fan Module oooccccnnnnnccnnccnnccnnncnnnonnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnineninins 73 4 3 Power zppplv FAM ia ee edd Ed 73 4 4 Air Duct ele UE 73 D Hard Disk Drive Support eeeuegekEek ENEE iii iia 75 5 1 Hard Disk RE 75 5 2 Hard Drive Cartier eet a e a a A hae 75 6 Front Panel Control and Indicators 2 seeeseeeeeeeeeeeeeeeeeeeneeeeeeeeeeeeeneeeseeeseeeeeeeeees 77 Revision 1 0 V Intel order number E94847 001 Table of Contents Intel Server System SR1640TH TPS 6 1 Control Panel BUTO sisi 77 6 2 Control Panel LED Indicators voice eden dema 77 6 2 1 Power Sleep LED dreet eedk ENNEN ENNEN E EEN EES ee 78 6 2 2 System Stat s LED D 78 6 2 3 System identification LEE coo it tati 79 7 Configuration SUM PONS es cima 81 7 1 Force IBMC Update ITALIA Daiana tia 82 7 2 BIOS Recovery Mode J163 JE conosca a 82 7 3 Clearing the CMOS J1G2 JO 82 steps for clearing the CMOS EEN 83 8 Environmental and Regulatory Specifications ccceeeeceeeeeeeeeeeeeeeeeeeeeeeeeseeeeeneneeeees 84 8 1 System Level Environmental Limits c cccceeeeeseseseeceeeeeeneeeseeseeenneceeteeeeeee 84 8 2 Serviceability and Availability cccccceesesee
19. Low gt SKS elijes ch N WW Y E MSB MSB Literal data format X Y 2 X the sensor value in volts amps watts degrees C or RPM Y mantissa The mantissa is the variable components that changes as the sensor value changes Y is a 16 bit unsigned value for the READ_VOUT command For all other READ commands Y is an 11 bit signed 2 s compliment value N exponent The exponents are fixed for each power supply and define the resolution for each sensor 3 8 3 Function commands supported The following PMBus commands are supported for the purpose of monitoring currents voltages power and status MFR_ID READ_IOUT eee H STAUTS_VOUT CLEAR_FAULTS STATUS_WORD ON_OFF_CONFIG STATUS_BYTE OPERATION QUERY PAGE MFR_SERIAL MFR_POUT_MA STAUTS_IOUT CAPABLITY 3 9 FRU data format The information to be contained in the FRU device is shown in the following table Table 68 FRU device information Area type Description Common header As defined by the FRU document Internal use area Not required do not reserve Chassis info area Not required do not reserve Board info area Not required do not reserve 3 9 1 Product info area Implement as defined by the IPMI FRU document Product information shall be defined as follows 70 Revision 1 0 Intel order number E94847 001 Intel Server System SR1640TH TPS Power Sub System Table 69 Product Information
20. Memory suppliers not productizing native 800 ECC UDIMMs Intel Xeon 3400 Series support all timings defined by JEDEC 256 Mb 512 Mb technology x4 and x16 DRAMs on RDIMM are NOT supported All channels in a system will run at the fastest common frequency No mixing of registered and unbuffered DIMMs No mixing of different ranks or speeds on UDIMM or RDIMM 2 4 3 2 Post Error Codes The range OxE0 OxEF of POST codes is used for memory errors in early POST In late POST this range is used for reporting other system errors e 0xE8 No Usable Memory Error If no memory is available the system emits POST Diagnostic LED code OxE8 and halts the system e OxE8 Configuration Error If a DDR3 DIMM has no SPD information the BIOS treats the DIMM slot as if no DDR3 DIMM is present on it Therefore if this is the only DDR3 DIMM installed in the system the BIOS halts with POST Diagnostic LED code OxE8 no usable memory and halts the system 10 Revision 1 0 Intel order number E94847 001 Intel Server System SR1640TH TPS Functional Architecture e OxEB Memory Test Error If a DDR3 DIMM or a set of DDR3 DIMMs on the same memory channel row fails HW Memory BIST but usable memory remains available the BIOS emits a beep code and displays POST Diagnostic LED code OxEB momentarily during the beeping and then continues POST If all of the memory fails HW Memory BIST the system acts as if no memory is available beeping and haltin
21. Screen The Processor screen allows the user to view the processor core frequency system bus frequency and to enable or disable several processor options This screen also allows the user to view information about a specific processor To access this screen from the Main screen select Advanced gt Processor 30 Revision 1 0 Intel order number E94847 001 Intel Server System SR1640TH TPS Advanced Processor Configuration Processor Socket Processor ID Processor Frequency Microcode Revision Processor 1 Version Current QPI Link Speed QPI Link Frequency Intel Turbo Boost Technology Enhanced Intel SpeedStep Tech Intel Hyper Threading Technology Core Multi Processing Execute Disable Bit Intel Virtualization Technology Intel VT for Directed I O Interrupt Remapping Coherency Support ATS Support Pass through DMA Support Hardware Prefetcher Adjacent Cache Line Prefetch Enabled Disabled Enabled Disabled Enabled Disabled All 1 2 Enabled Disabled Enabled Disabled Enabled Disabled Enabled Disabled Enabled Disabled Enabled Disabled Enabled Disabled Enabled Disabled Enabled Disabled Functional Archit ecture Figure 11 Setup Utility Processor Configuration Screen Display Table 15 Setup Utility Processor Configuration Screen Fields Setup Item Help Text Processor ID Comments Information only Processor CPUID Processor Frequency Information only
22. an EFI boot option from the Internal EFI Shell boot order 2 6 5 7 3 Hard Disk Order Screen The Hard Disk Order screen allows the user to control the hard disks To access this screen from the Main screen choose Boot Options gt Hard Disk Order Boot Options Hard Disk 1 lt Available Hard Disks gt Hard Disk 2 lt Available Hard Disks gt Figure 24 Setup Utility Hard Disk Order Screen Display Table 28 Setup Utility Hard Disk Order Fields Setup Item Help Text Hard Disk 1 Available Set system boot order by selecting the boot Legacy devices option for this position for this Device group 46 Revision 1 0 Intel order number E94847 001 Intel Server System SR1640TH TPS Functional Architecture Setup Item Help Text Hard Disk 2 Available Set system boot order by selecting the boot Legacy devices option for this position for this Device group 2 6 5 7 4 CDROM Order Screen The CDROM Order screen allows the user to control the CDROM devices To access this screen from the Main screen select Boot Options gt CDROM Order Boot Options CDROM 1 lt Available CDROM devices gt CDROM 2 lt Available CDROM devices gt Figure 25 Setup Utility CDROM Order Screen Display Table 29 Setup Utility CDROM Order Fields CDROM 1 Available Set system boot order by selecting the boot Legacy devices option for this position for this Device group CDROM 2 Available Set system
23. boot order by selecting the boot Legacy devices option for this position for this Device group 2 6 5 7 5 Floppy Order Screen The Floppy Order screen allows the user to control the floppy drives To access this screen from the Main screen choose Boot Options gt Floppy Order Boot Options Floppy Disk 1 lt Available Floppy Disk gt Floppy Disk 2 lt Available Floppy Disk gt Figure 26 Setup Utility Floppy Order Screen Display Table 30 Setup Utility Floppy Order Fields Help Text Floppy Disk 1 Available Set system boot order by selecting the boot Legacy devices option for this position for this Device group Revision 1 0 47 Intel order number E94847 001 Functional Architecture Intel Server System SR1640TH TPS Setup Item Help Text Floppy Disk 2 Available Set system boot order by selecting the boot Legacy devices option for this position for this Device group 2 6 5 7 6 Network Device Order Screen The Network Device Order screen allows the user to control the network bootable devices To access this screen from the Main screen select Boot Options gt Network Device Order Boot Options Network Device 1 lt Available Network devices gt Network Device 2 lt Available Network devices gt Figure 27 Setup Utility Network Device Order Screen Display Table 31 Setup Utility Network Device Order Fields Help Text Network Device 1 Available Set system boot
24. bytes of memory which normally resides on the server board General Purpose YO General Purpose UO Hot Swap Controller Tngetae KB 1024 bytes KCS Keyboard Controller Style Revision 1 0 107 Intel order number E94847 001 Glossary Intel Server System SR1640TH TPS Term Local Area Network Liquid Crystal Display Output Buffer LAN CD ED PC UN MAC MB MCH MD2 MD5 s Mux NIC NMI L L LI L m Original Equipment Manufacturer Unit of electrical resistance Platform Event Filtering O O Pulse Width Modulation RASUM Reliability Availability Serviceability Usability and Manageability 108 Revision 1 0 Intel order number E94847 001 EM hm PEF PEP PIA PLD PMI PWM RAM Intel Server System SR1640TH TPS Glossary Voltage Regulator Down 16 bit quantity ZIF Zero Insertion Force Revision 1 0 109 Intel order number E94847 001 Reference Documents Intel Server System SR1640TH TPS Reference Documents Refer to the following documents for additional information Intel Dynamic PowerTechnology Node Manager 1 5 External Interface Specification using IPMI 2007 Intel Corporation Node Power and Thermal Management Architecture Specification v1 5 rev 0 79 2007 Intel Corporation Intel Server System Integrated Baseboard Management Controller Core External Product Specification 2007 Intel Corporation Intel Thurley Server Platform Services IPMI Commands Spec
25. detected The system BIOS provides the option for dual video operation when an add in video card is configured in the system The integrated video controller supports all standard IBM VGA modes The following table shows the 2D modes supported for both CRT and LCD Table 10 Video Modes 2D Mode Refresh Rate Hz 2D Video Mode Support 8 bpp 16 bpp 32 bpp 640x480 60 72 75 85 90 100 120 160 200 Supported Supported Supported 800x600 60 70 72 75 85 90 100 120 160 Supported Supported Supported 1024x768 60 70 72 75 85 90 100 Supported Supported Supported 1152x864 43 47 60 70 75 80 85 Supported Supported Supported 1280x1024 60 70 74 75 Supported Supported Supported 1600x1200 52 Supported Supported Supported Revision 1 0 19 Intel order number E94847 001 Functional Architecture Intel Server System SR1640TH TPS 2 4 8 Network Interface Controller NIC The server boards S3420TH in Intel Server System SR1640TH support three network interfaces two is provided from the onboard Intel 82574L GbE PCI Express network controllers the third one is the onboard 10 100Mbps KSZ8041NL Network controller only enabled by RMM3 Lite V module for management 2 4 8 1 GigE Controller 82574L The 82574 family 82574L and 82574 IT are single compact low power components that offer a fully integrated Gigabit Ethernet Media Access Control MAC and Physical Layer PHY port The 82574 uses
26. device is remotely attached during system boot both virtual IDE and virtual floppy are presented as bootable devices It is not possible to present only a single mounted device type to the system BIOS The default inactivity timeout is 30 minutes but may be changed through the embedded web server Media redirection sessions persist across system reset but not across an AC power loss 2 5 2 4 Web Services for Management WS MAN The Integrated BMC firmware supports the Web Services for Management WS MAN specification version 1 0 Revision 1 0 23 Intel order number E94847 001 Functional Architecture Intel Server System SR1640TH TPS 2 5 2 5 Local Directory Authentication Protocol LDAP The Integrated BMC firmware supports the Local Directory Authentication Protocol LDAP protocol for user authentication Note IPMI users passwords and sessions are not supported over LDAP 2 5 2 6 Embedded Webserver The Integrated BMC provides an embedded web server for out of band management User authentication is handled by IPMI user names and passwords Base functionality for the embedded web server includes Power Control Limited control based on IPMI user privilege Sensor Reading Limited access based on IPMI user privilege SEL Reading Limited access based on IPMI user privilege KVM Media Redirection Limited access based on IPMI user privilege Only available when the Intel RMM3 Lite V module is presen
27. gt lt Boot Option x gt Figure 29 Setup Utility Boot Manager Screen Display Table 33 Setup Utility Boot Manager Screen Fields Setup Item Help Text Internal EFI Shell Select this option to boot now Note This list is not the system boot option order Use the Boot Options menu to view and configure the system boot option order Boot Device x Select this option to boot now Note This list is not the system boot option order Use the Boot Options menu to view and configure the system boot option order 2 6 5 9 Error Manager Screen The Error Manager screen displays any errors encountered during POST Error Manager ERROR CODE SEVERITY INSTANCE Figure 30 Setup Utility Error Manager Screen Display Table 34 Setup Utility Error Manager Screen Fields Setup Item Displays System Errors Information only Displays errors that occurred during the POST Revision 1 0 49 Intel order number E94847 001 Functional Architecture Intel Server System SR1640TH TPS 2 6 5 10 Exit Screen The Exit screen allows the user to choose whether to save or discard the configuration changes made on the other screens It also allows the user to restore the server to the factory defaults or to save or restore them to set of user defined default values If Load Default Values is selected the factory default settings noted in bold in the tables in this chapter are applied If Load User Default Values is selected
28. intel Intel Server System SR1640TH Technical Product Specification Intel order number E94847 001 Revision 1 0 March 2010 Inside Enterprise Platforms and Services Marketing Revision History Intel Server System SR1640TH TPS Revision History Date Revision Modifications Number March 26 2010 1 0 Initial release Intel order number E94847 001 Revision 1 0 Intel Server System SR1640TH TPS Disclaimers Disclaimers Information in this document is provided in connection with Intel products No license express or implied by estoppels or otherwise to any intellectual property rights is granted by this document Except as provided in Intel s Terms and Conditions of Sale for such products Intel assumes no liability whatsoever and Intel disclaims any express or implied warranty relating to sale and or use of Intel products including liability or warranties relating to fitness for a particular purpose merchantability or infringement of any patent copyright or other intellectual property right Intel products are not intended for use in medical life saving or life sustaining applications Intel may make changes to specifications and product descriptions at any time without notice Designers must not rely on the absence or characteristics of any features or instructions marked reserved or undefined Intel reserves these for future definition and shall have no r
29. on the server board S3420TH Each of them is dedicated to one 3 5 inch HDD bay using customized SATA cable 2 4 5 3 USB 2 0 Support On the Intel 3420 Chipset the USB controller functionality is provided by the dual EHCI controllers with an interface for up to ten USB 2 0 ports All ports are high speed full speed and low speed capable Two external connectors are located on the back edge of the server board Two internal headers are provided on the board for each node each supporting two front panel USB 2 0 ports 2 4 5 3 1 Native USB Support During the power on self test POST the BIOS initializes and configures the USB subsystem The BIOS is capable of initializing and using the following types of USB devices USB Specification compliant keyboards USB Specification compliant mouse USB Specification compliant storage devices that utilize bulk only transport mechanism USB devices are scanned to determine if they are required for booting The BIOS supports USB 2 0 mode of operation and as such supports USB 1 1 and USB 2 0 compliant devices and host controllers During the pre boot phase the BIOS automatically supports the hot addition and hot removal of USB devices and a short beep is emitted to indicate such an action For example if a USB device is hot plugged the BIOS detects the device insertion initializes the device and makes it available to the user During POST when the USB controller is initialized
30. order by selecting the boot Legacy devices option for this position for this Device group Network Device 2 Available Set system boot order by selecting the boot Legacy devices option for this position for this Device group 2 6 5 7 7 BEV Device Order Screen The BEV Device Order screen allows the user to control the BEV bootable devices To access this screen from the Main screen select Boot Options gt BEV Device Order Boot Options BEV Device 1 lt Available BEV devices gt BEV Device 2 lt Available BEV devices gt Figure 28 Setup Utility Network Device Order Screen Display Table 32 Setup Utility Network Device Order Fields Help Text BEV Device 1 Available Set system boot order by selecting the boot Legacy devices option for this position for this Device group 48 Revision 1 0 Intel order number E94847 001 Intel Server System SR1640TH TPS Functional Architecture Setup Item Help Text BEV Device 2 Available Set system boot order by selecting the boot Legacy devices option for this position for this Device group 2 6 5 8 Boot Manager Screen The Boot Manager screen allows the user to view a list of devices available for booting and to select a boot device for immediately booting the system To access this screen from the Main screen select Boot Manager Main Advanced Security Server Management Boot Options Boot Manager Internal EFI Shell lt Boot device 1
31. requested EFI to close boot services has been Progress Code OXF9h O X X O X X X X Resetting the keyboard OxFAh O X X O X X X O Disabling the keyboard Revision 1 0 101 Intel order number E94847 001 Intel Server System SR1640TH TPS Appendix D POST Code Errors Appendix D POST Code Errors Whenever possible the BIOS outputs the current boot progress codes on the video screen Progress codes are 32 bit quantities plus optional data The 32 bit numbers include class subclass and operation information The class and subclass fields point to the type of hardware being initialized The operation field represents the specific initialization activity Based on the data bit availability to display progress codes a progress code can be customized to fit the data width The higher the data bit the higher the granularity of information that can be sent on the progress port The progress codes may be reported by the system BIOS or option ROMs The Response section in the following table is divided into three types No Pause The message is displayed on the local Video screen during POST or in the Error Manager The system continues booting with a degraded state The user may want to replace the erroneous unit The setup POST error Pause setting does not have any effect with this error Pause The message is displayed on the Error Manager screen and an error is logged to the SEL The setup POST error Pause setting determines whether the system
32. the system is restored to previously saved user defined default values Error Manager Save Changes and Exit Discard Changes and Exit Save Changes Discard Changes Load Default Values Save as User Default Values Load User Default Values Figure 31 Setup Utility Error Manager Screen Display Table 35 Setup Utility Error Manager Screen Fields Setup Item Help Text Save Changes and Exit Exit the BIOS Setup utility after saving changes User is prompted for confirmation only The system reboots if required if any of the setup fields were The F10 key can also be used modified Discard Changes and Exit the BIOS Setup utility without saving User is prompted for confirmation only Exit changes if any of the setup fields were The Esc key can also be used modified Save Changes Save changes without exiting the BIOS Setup User is prompted for confirmation only Utility if any of the setup fields were Note Saved changes may require a system modified reboot before taking effect Discard Changes Discard changes made since the last Save User is prompted for confirmation only Changes operation was performed if any of the setup fields were modified Load Default Values Load factory default values for all BIOS Setup User is prompted for confirmation utility options The F9 key can also be used Save as User Default Save current BIOS Setup utility values as User is prompted for confirmation Values custom user
33. using closed loop fan control algorithm taking into account DIMM temperature readings Address Resolution Protocol ARP The Integrated BMC sends and responds to ARPs supported on embedded NICs Dynamic Host Configuration Protocol DHCP The Integrated BMC performs DHCP supported on embedded NICs Platform environment control interface PECI thermal management support E mail alerting Embedded web server Integrated KVM Integrated Remote Media Redirection Lightweight Directory Authentication Protocol LDAP support 2 5 2 Optional Advanced Management Feature Support This section explains the advanced management features supported by the Integrated Baseboard Management Controller Integrated BMC firmware 2 5 2 1 Enabling Advanced Management Features The Integrated BMC enables the advanced management features only when it detects the presence of the Intel Remote Management Module 3 Lite V Intel RMM3 Lite V module Without the Intel RMM3 Lite V Module the advanced features are dormant The Intel RMM3 Lite V module provides the Integrated BMC through dedicated network interface The dedicated interface consumes its own LAN channel Additionally the Intel RMM3 Lite V provides additional flash storage for advanced features like Web Services for Management WS MAN 2 5 2 2 Keyboard Video Mouse KVM Redirection The Integrated BMC firmware supports keyboard video and mouse redirection over LAN T
34. 001 Functional Architecture Intel Server System SR1640TH TPS Setup Item Help Text Asset Tag Press lt Enter gt to edit system Information only Serial Number and then use Backspace to delete existing value Maximum length is 20 characters HSC Firmware Revision Information only If there is no HSC installed the Firmware Revision Number appears as 0 00 2 6 5 6 BMC Configuration The Server Management System Information screen allows the user to view part numbers serial numbers and firmware revisions The BMC configuration screen allows you to configure the BMC Baseboard RMM3 LAN channel and User settings User can configure first five BMC user s settings Information only BMC configuration screen will not available on some models To access this screen from the Main screen select Server Management gt BMC Configuration 42 Revision 1 0 Intel order number E94847 001 Intel Server System SR1640TH TPS Functional Architecture Figure 20 Setup Utility BMC configuration Screen Display DEE Server Management BMC Configuration Baseboard channel configuration IP Source Static Dynamic IP Address Subnet Mask Gateway IP Intel RMM3 channel configuration IP Source Static Dynamic IP Address Subnet Mask Gateway IP BMC Host Name Intel Y RMM3 Jser Configuration U User ID User1 User2 User5 User status Disable Enable Network Privilege Callback User Operator Administrator Us
35. 2 Intel Core i3 Processor The Intel Core i3 Series processors highly integrated solution variant is composed of two processor cores FC LGA 1156 socket package with 2 5 GT s Up to 95 W Thermal Design Power TDP processors with higher TDP are not supported Please get the detail supported processor list from Intel website 2 4 2 3 Intel Turbo Boost Technology Intel Turbo Boost Technology is featured on certain processors in the Intel Xeon Processor 3400 Series Intel Turbo Boost Technology opportunistically and automatically allows the processor to run faster than the marked frequency if the processor is operating below power temperature and current limits This results in increased performance for both multi threaded and single threaded workloads Intel Turbo Boost Technology operation Turbo Boost operates under Operating System control It is only entered when the operating system requests the highest PO performance state Turbo Boost operation can be enabled or disabled by BIOS Turbo Boost converts any available power and thermal headroom into higher frequency on active cores At nominal marked processor frequency many applications consume less than the rated processor power draw Turbo Boost availability is independent of the number of active cores Maximum Turbo Boost frequency depends on the number of active cores and varies by processor configuration The amount of time the sy
36. 3 Figure 34 Jumper locations on DO ti pt 57 Figure 35 Board diagnostic LED locations 20 ia dit 59 Figure 36 Back Panel Feature Overview left tray ooomoococonncnnnininnioicccccrcnnnnnnnar nana 60 Figure 37 Power Supply Mechanical Drawing eccccceeeeeeeeeeeeeeneeeeeeeeeedeneseeseeeeeeeeeteeee 61 Figure 38 AC Power Cord Specification Requirements oooocoiccccccncccocccnccnocccononononnnnnnnineninininnn 71 Figure 39 CPU Heatsink Overview EE 72 Figube 40 Air Re ET 73 Figure 41 Air Duct Module assembly process oooocccccccococononcncnnccccnnnnnnonnnonnnnnnnnnnnnnnnnnnnnnnnnnnnnnns 74 Figure 42 HDD Bays N DEE 75 Figure 43 3 5 inch HDD Assembly Overview ccceceecccceeeeeeeneseeeeneeeeeeeeeeedeenneeeeneeeeneeeeenes 76 Figure 44 Install HDD assembly into Iran 76 Figure 45 Front Control Panel uta aiii rate 77 Revision 1 0 vil Intel order number E94847 001 List of Figures Intel Server System SR1640TH TPS Figure 46 Jumper location on Server Board S3420TH oooooocooccccccccccononononnncnnnnnnnnnnnnnnnnnnnnnnnnnnnnnns Figure 47 Diagnostic LED Placement Diagram oooooccccccccoconcccncccnonanonannncnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnns viii Revision 1 0 Intel order number E94847 001 Intel Server System SR1640TH TPS List of Tables List of Tables Table 1 System Feature Get AAA 2 Table 2 Chassis Rn Ee E 5 Table 3 Standard Platform DIMM Nomenclature o ooocoooocccccccccccnnnon
37. 5 3 No lOad operai O a a rrr a e aa aaae as 66 3 5 4 Regulation ripple and noise ooooooooococcccncconcnnnnnnonnnonononononononnnnnnnnnnon ono nn nan nnnnnnnnnnas 66 3 5 5 Ripple and Bue 66 3 5 6 Transient e lee EE 66 3 5 7 Gapacitive O o EE 66 3 5 8 Maximum load Bn le E TEE 67 3 5 9 Output voltage rise dl 67 3 5 10 Output voltage hold up tiMe 0 00 eee ee eeee eee eeee eee eeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeees 67 O TOMES EE 67 3 5 12 Temperature coefficient cono rnnornnnrnnorrnn narran 67 3 6 Protection elle TICE 67 3 6 1 Over Current short circuit Protection OCH 67 3 6 2 Over voltage Protection OVP Jesalalocstinc ride ns Uinta had ateesdad 67 3 6 3 Over temperature Protection OTP oononininiooncccnnnccnnnnanancnnnne nene rencia 68 3 6 4 Thermal Fan Speed Control External Control 68 3 7 SMBUS Communication 68 3 7 1 Power supply management controller DM 69 3 7 2 Power supply field replacement unit FRU signals ooooonnninnnncccnnnnniccnncccnnnnnos 69 3 7 3 Power Supply Status LED indicators oooooooococcccocccoonoconoconono nono nonnnnnn no nono nonnnnnnonnnos 69 3 8 PSMC and PMBUS compltance nono nono no nononnnnnnn nono nono nnnnnnnonnnnnnnos 69 3 8 1 ele NEG Ae E dida 69 3 8 2 REI RS eu EE 70 3 8 3 Function commands supported oocccccccccccnccnncconnnnnnncnnnnnnnnnnnononnnnnnnnnnnonnnnnnnnonnnnnnnos 70 3 9 FRU data do E 70 3 9 1 Product into RT HE 70 3 9 2 M lti rec rd area ET 71 3 10 AG
38. 94847 001 Environmental and Regulatory Specification Intel Server System SR1640TH TPS 8 6 3 Europe CE Declaration of Conformity This product has been tested in accordance too and complies with the Low Voltage Directive 73 23 EEC and EMC Directive 89 336 EEC The product has been marked with the CE Mark to illustrate its compliance 8 6 4 Japan EMC Compatibility Electromagnetic Compatibility Notices International CORE PRUBEESRRESAEMABRS VCCI OR IROXMDSAZAPHRRMHEE CT CORBCRER CHEATS CBR PBEANSRCTCEMHOET CORNER RAS SKIBRENSZCEMHVET English translation of the notice above This is a Class A product based on the standard of the Voluntary Control Council For Interference VCCI from Information Technology Equipment If this is used near a radio or television receiver in a domestic environment it may cause radio interference Install and use the equipment according to the instruction manual 8 6 5 BSMI Taiwan The BSMI Certification number and the following warning is located on the product safety label which is located on the bottom side pedestal orientation or side rack mount configuration SERS 8 6 6 KCC Korea Following is the KCC certification information for Korea 0141 S CPU SR1640 A 8 7 Rack Mount Installation Guidelines Anchor the equipment rack The equipment rack must be anchored to an unmovable support to prevent it from falling over when one or more servers are extended i
39. Boot Options Screen The Boot Options screen displays any bootable media encountered during POST and allows the user to configure the preferred boot device To access this screen from the Main screen select Boot Options Main Advanced Security Server Management Boot Options Boot Manager System Boot Timeout lt 0 65535 gt Boot Option 1 lt Available Boot devices gt Boot Option 2 lt Available Boot devices gt Boot Option x lt Available Boot devices gt Hard Disk Order CDROM Order Floppy Order Network Device Order BEV Device Order Add New Boot Option gt Delete Boot Option EFI Optimized Boot Enabled Disabled Boot Option Retry Enabled Disabled Figure 21 Setup Utility Boot Options Screen Display Table 25 Setup Utility Boot Options Screen Fields Help Text Boot Timeout 0 65535 The number of seconds the BIOS After entering the preferred should pause at the end of POST to timeout press the Enter key allow the user to press the F2 key for to register that timeout value entering the BIOS Setup utility to the system These Valid values are 0 65535 Zero is the settings are in seconds default A value of 65535 causes the system to go to the Boot Manager menu and wait for user input for every system boot Boot Option x Available boot Set system boot order by selecting the Po 44 Revision 1 0 Intel order number E94847 001 Intel Server System SR1640TH TPS Functional Architecture ee
40. Boot options Disabled This allows all USB Mass Storage devices as Boot options Device Reset USB Mass Storage device Start Unit command timeout Grayed out if the USB Controller is timeout Setting to a larger value provides more time for a mass disabled storage device to be ready if needed One line for each Auto Auto USB devices less than 530 MB are emulated as Hidden if no USB Mass storage mass storage Floppy floppies devices are installed device insystem Forced FDD Forced FDD HDD formatted drive are emulated as a Grayed out if the USB Controller is Hard Disk FDD e g ZIP drive disabled CD ROM This setup screen can show a maximum of eight devices on this screen If more than eight devices are installed in the system the USB Devices Enabled shows the correct count but only displays the first eight devices here 2 6 5 2 5 PCI Screen The PCI Screen allows the user to configure the PCI add in cards onboard NIC controllers and video options To access this screen from the Main screen select Advanced gt PCI Advanced PCI Configuration Maximize Memory below 4GB Enabled Disabled Memory Mapped I O above 4GB Enabled Disabled Onboard NIC ROM Enabled Disabled Onboard NIC2 ROM Enabled Disabled Onboard NIC iSCSI ROM Enabled Disabled NIC 1 MAC Address lt MAC gt NIC 2 MAC Address lt MAC gt Figure 15 Setup Utility PCI Configuration Screen Display 36 Revision 1 0 Intel o
41. C Mark applied to system level products only European Directive 2002 95 EC Restriction of Hazardous Substances RoHS Threshold limits and banned substances are noted below Quantity limit of 0 1 by mass 1000 PPM for Lead Mercury Hexavalent Chromium None Required Polybrominated Biphenyls Diphenyl Ethers PBB PBDE Quantity limit of 0 01 by mass 100 PPM for Cadmium Intel Internal All materials parts and subassemblies must not Specification contain restricted materials as defined in Intel s Environmental Product Content Specification of Suppliers and Outsourced Manufacturers http supplier intel com ehs environmental htm International 15011469 Plastic parts weighing gt 25gm are intended to be marked with per 15011469 Recycling Markings Fiberboard FB and Cardboard CB are marked with international LS recycling marks Applied to outer bulk packaging A d j orrugate and single package Recycles None Required gt PC ABS lt 8 10 Other Markings Stand by Power 60950 Safety Requirement Applied to product is stand by power switch is used Multiple Power 60950 Safety Requirement English This unit has more than one Cords Applied to product if more than one power cord S power supply cord To reduce used the risk of electrical shock disconnect 2 two power supply cords before servicing Simplified Chinese HE ASC 4 LEGS AK HAR SHE Bo AMA HG EHET HEB HADAA 2
42. CED ENHANCED Supports up to 6 Disappears when the Onboard Compatibility SATA ports with IDE Native SATA Controller is disabled AHCI Mode Matrix RAID COMPATIBILITY Supports up to 4 SATA ports 0 1 2 3 with IDE Legacy mode and 2 SATA ports 4 5 with IDE Native Mode AHCI Supports all SATA ports using the Advanced Host Controller Interface Intel Matrix RAID Technology with Software RAID levels 0 1 10 and 5 34 Revision 1 0 Intel order number E94847 001 Intel Server System SR1640TH TPS Functional Architecture SATA Port 0 lt Not Installed Information only This field is Drive unavailable when RAID Mode is information gt enabled SATA Port 1 lt Not Installed Information only This field is Drive unavailable when RAID Mode is information gt enabled SATA Port 4 lt Not Installed Information only This field is Drive unavailable when RAID Mode is information gt enabled SATA Port 5 lt Not Installed Information only This field is Drive unavailable when RAID Mode is information gt enabled 2 6 5 2 4 USB Configuration Screen The USB Configuration screen allows the user to configure the USB controller options To access this screen from the Main screen select Advanced gt USB Configuration Advanced USB Configuration Detected USB Devices Total USB Devices in Systen USB Controller Enabled Disabled Legacy USB Support Enabled Disabled Auto Port 60 64 Emulation Enabled Disable
43. DC power is still on The operating system has saved context and gone into a level of low power state ACPI Solid On System and the operating system are up and running Note Blink rate is approximately 1Hz at 50 duty cycle 6 2 2 System Status LED Table 73 System Status LED Operation Criticalit Off N A Not ready AC power off or BMC initialization completes if no degraded non critical critical or non recoverable conditions exist after AC plug in Amber Solid On Not ready Pre DC Power On 15 20 second BMC Initialization when AC is applied to the server The system will not POST until BMC initialization completes Green Blink Degraded BIOS detected 1 Unable to use all of the installed memory more than one DIMM installed 2 In a mirrored configuration when memory mirroring takes place and system loses memory redundancy This is not covered by 2 78 Revision 1 0 Intel order number E94847 001 Front Panel Control and Indicators Intel Server System SR1640TH TPS Criticality 3 PCI Express correctable link errors Integrated BMC detected Redundancy loss such as a power supply or fan Applies only if the associated platform subsystem has redundancy capabilities CPU disabled if there are two CPUs and one CPU is disabled Fan alarm Fan failure Number of operational fans should be more than minimum number needed to cool the system Non critical threshold crossed Temperature voltage
44. LED Decoder Intel Server System SR1640TH TPS Diagnostic LED Decoder O On X Off Checkpoint MSB Upper Nibble Lower Nibble ESR Description 8h Ah 2h lh 8h 4h 2h 1h LED 7 6 5 4 3 2 1 0 0x99h O x x Oo Ix x O O Detecting the mouse Ox9Ah O x x O x O O Xx Detecting the presence of mouse 0x9Bh o x x O x O O O Enabling the mouse Fixed Media OxBOh O x O O x x x x Resetting fixed media device OxBlh O x O O x x x O Disabling fixed media device 0xB2h o x o o x x o x aot presence of a fixed media device SATA hard drive detection 0xB3h O x O O x x O O Enabling configuring a fixed media device Removable Media OxB8h O X O 0 O X X X Resetting removable media device 0xB9h O X o O O X X O Disabling removable media device OxBAh o x o o o x o x Ge GER of a removable media device SATA CDROM OxBCh O X 0 O O O X X Enabling configuring a removable media device Boot Device Selection BDS 0xDO O O X O X X X X Entered the Boot Device Selection phase BDS 0xD1 O O X O X X X O Return to last good boot device 0xD2 O O X O X X O X Setup boot device selection policy 0xD3 O O X O X X O O Connect boot device controller 0xD4 O O X O X O X X Attempt flash update boot mode 0xD5 O O X O X O X O Transfer control to EFI boot 0xD6 O O X O xX O O X Trying to boot device selection OxDF O O X O O O O O Reserved for boot device selection Pre EFI Initialization PEI Cor
45. MM socket field reflects one of the following possible states Installed There is a DDR3 DIMM installed in this slot Not Installed There is no DDR3 DIMM installed in this slot Disabled The DDR3 DIMM installed in this slot was disabled by the BIOS to optimize memory configuration Failed The DDR3 DIMM installed in this slot is faulty malfunctioning Spare Unit The DDR3 DIMM is functioning as a spare unit for memory RAS purposes Note X denotes the Channel Identifier and Y denote the DIMM Identifier within the Channel 2 6 5 2 3 Mass Storage Controller Screen The Mass Storage screen allows the user to configure the SATA SAS controller when it is present on the baseboard midplane or backplane of an Intel system To access this screen from the Main menu select Advanced gt Mass Storage Advanced Mass Storage Controller Configuration Onboard SATA Controller Enabled Disabled Configure SATA Mode ENHANCED COMPATIBILITY AHCI Matrix RAID gt SATA Port 0 Not Installed lt Drive Info gt gt SATA Port 1 Not Installed lt Drive Info gt gt SATA Port 4 Not Installed lt Drive Info gt gt SATA Port 5 Not Installed lt Drive Info gt Figure 13 Setup Utility Mass Storage Controller Configuration Screen Display Table 17 Setup Utility Mass Storage Controller Configuration Screen Fields Help Text Onboard SATA Enabled Onboard Serial ATA SATA Controller Disabled controller SATA Mode ENHAN
46. O D 055 uk Soos LAS me QU 3 one 3 e e 3 s Se a g IS anze Nodel DIMM Slot J9H1 PSU Connector mt OOOO 333 y HCH P wunns 3932 DOI III EI g J8K1 Figure 32 Connector locations on server board S3420TH Intel order number E94847 001 Revision 1 0 Intel Server System SR1640TH TPS Functional Architecture 2 7 1 1 Power Connectors The main power supply connection uses a special designed connector J9H1 to provide power to both nodes on the same board SIGNAL PINS POWER BLADE EM PL AO Pe es ea CB PoR 55 AA A A Se ES eee EE Mo teg PS KILL7A1 SDA 5V5B Figure 33 Connector Pin out Table 37 Power connector pin out J9H1 Signal Description Signal Description 12VLS 12V load share bus PWOK Power OK output 5 VSB 5V standby output 12 VRS 12V remote sense PS Supply fast shutdown I2C PSON Power enable input KILLR A1 address biti B P FAIL B P fail input SCL 12C clock signal AO 12C address bit 0 SDA 12C data signal 15VCC B P VCC 2 7 1 2 System Management Headers 2 7 1 2 1 Intel Remote Management Module 3 Lite V Intel RMM3 Lite V Connector A 8 pin Intel RMM 3 Lite V connector is included for every node on the server board S3420TH to support the optional Intel Remote Management Module 3 Lite V This server board does not support third party management card Note Thi
47. Record data to the integrated Server Management subsystem Failure to run this utility may prevent Server Management from accurately monitoring system health and may affect system performance The FRUSDR utility for this server system can either be run from the Intel Deployment CDROM that came with your system or can be downloaded from the Intel website referenced at the bottom of this page To ensure the highest system reliability make sure the latest system software is loaded on the server before deploying the system onto a live networking environment This includes system BIOS FRUSDR BMC firmware and hot swap controller firmware The system software can be updated using the Intel Deployment CDROM that came with your system or can be downloaded from the Intel website referenced at the bottom of this page System fans are not hot swappable Only supported memory validated by Intel should be used in this server system A list of supported memory can be found in the Intel Server System SR1640TH Tested Memory List which can be downloaded from the Intel website referenced at the bottom of this page This system supports the Intel Xeon processor 3400 sequence You cannot use Intel Xeon processors not referenced on the supported processor list in this server system You must use the CPU memory air duct to maintain system thermals To maintain system thermals you must populate all hard drive bays with either a hard drive or drive bl
48. Server board you must use an Intel server board UL recognized Add in boards must have a printed wiring board flammability rating of minimum UL94V 1 Add in boards containing external power connectors and or lithium batteries must be UL recognized or UL listed Any add in board containing modem telecommunication circuitry must be UL listed In addition the modem must have the appropriate telecommunications safety and EMC approvals for the region in which it is sold Peripheral Storage Devices must be UL recognized or UL listed accessory and TUV or VDE licensed Maximum power rating of any one device or combination of devices can not exceed manufacturer s specifications Total server configuration is not to exceed the maximum loading conditions of the power supply The following table references Server Chassis Compliance and markings that may appear on the product Markings below are typical markings however may vary or be different based on how certification is obtained Note Certifications Emissions requirements are to Class A Table 79 Product Safety and Electromagnetic EMC Compliance Compliance Regional Compliance Reference Marking Example Description Reference Australia New AS NZS CISPR22 Emissions IRAM Certification Safety AATERTE Canada USA CSA 60950 UL 60950 1 Safety Listing Eh C US 3178574 Industry Canada ICES 003 CANADA ICES 003 CLASS A Emissions CANADA NMB 003 CLASSE A 86 Revis
49. Setup Utility Error Manager Screen Fields 50 Table 36 Board Connector Matrix nemesis cicle 51 Table 37 Power connector pin out JQH1 22 2 0 eeceeecccceeeee sees carecen 53 Table 38 RMM3 Lite V Internal header pin out J1G1 JE 53 Table 39 IPMB header PIn OUl JOK las ot id 53 Table 40 Front Control Panel header pin out U8K1 oe center eee ee eee eeeeeeeeeeeeeeeeeeeeeenaaaaes 54 Table 41 Front Panel USB header pin out UI 54 Table 42 SAS 4i connector pin out 92 55 Table 43 Board Identification LED connector pin out U3B1 ec ceeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeenaaaaes 55 Table 44 System FAN connector pin out J4K1 J6K2 JAR 55 Table 45 Power to backplane connector pin out U7K2 0 cece eeeeeeeee eee e eee eeeeeeeeeeeeeeeeeeeeeeeaaaaes 56 Revision 1 0 ix Intel order number E94847 001 List of Tables Intel Server System SR1640TH TPS Table 46 Table 47 Table 48 Table 49 Table 50 Table 51 Table 52 Table 53 Table 54 Table 55 Table 56 Table 57 Table 58 Table 59 Table 60 Table 61 Table 62 Table 63 Table 64 Table 65 Table 66 Table 67 Table 68 Table 69 Table 70 Table 71 Table 72 Table 73 Table 74 Table 75 Table 76 Table 77 Table 78 Table 79 Table 80 Table 81 Table 82 Table 83 Table 84 CMOS Clear KE EE 58 BIOS Recovery J1G3 JSS coccion iaa 58 BMC Force Update J1A1 IDA WE 58 Port 80 81 Display Interface on LPC BUS ocn 58 Outpu
50. System Feature Set Feature Description Server board Intel 3420 Platform Controller Hub PCH based dual node server board S3420TH Two identical boards are in one SR1640TH system Processor Each node supports one Intel Xeon Processor 3400 series and Intel Core i3 processors in FC LGA 1156 Socket B package with up to 95 W Thermal Design Power TDP 2 5GT s point to point DMI interface to PCH VRD 11 1 is supported Memory Four DDR3 DIMMs slots per processor across two memory channels total eight DIMMs per board For one node DDR3 1333 1066 800M UDIMM or RDIMM 2 Memory Channels 2 DIMM slots per channel 8GB dual rank with 1Gb max with X8 ECC UDIMM 16GB quad rank with 1Gb max RDIMM Chipset Intel Chipset which includes the following components Intel 3420 chipset Platform Controller Hub PCH ServerEngines Pilot II controller integrated BMC supports the following functions Integrated 2D video controller Super lO on LPC Baseboard Management Controller BMC based on ARM946E S Hard Disk Drive One fixed 3 5 inch SATA SAS HDD per node total four 3 5 inch HDDs are supported Supported in system System Connectors External I O connectors per node Headers One DB 15 Video connectors Two RJ 45 connectors for 10 100 1000 LAN 82574L based GE NIC one port connects to iBMC under share mode Two USB 2 0 connectors One RJ 45 10 100 LAN port dedicated for management Internal connectors h
51. The maximum leakage current to ground for each power supply is 3 5 mA when tested at 240 VAC 60 Hz 3 4 9 Power Recovery The power supply will recover automatically after an AC power failure AC power failure is defined as any loss of AC power that exceeds the dropout criteria 3 4 9 1 Voltage Brown Out The power supply should withstand a brownout and recover from it without any damage stated in below table Full Load 75 VAC 88 VAC 3 4 9 2 Voltage Interruptions The power supply complies with the limits defined in EN55024 1998 using the IEC 61000 4 11 1995 test standard and performance criteria C defined in Annex B of CISPR 24 3 4 10 AC Line Inrush The maximum ac line inrush current shall be 60A peak at an input voltage of 264VAC Inrush current shall be measured at an ambient temperature of 25 deg C after the input voltage has been removed from the power supply for a minimum of 10 minutes 3 4 11 AC Line Fuse The power supply shall incorporate one input fuse on the line side for input over current protection to prevent damage to the power supply and meet product safety requirements Fuses should be slow blow type or equivalent to prevent nuisance trips AC inrush current shall not cause the AC line fuse to blow under any conditions All protection circuits in the power supply shall not cause the AC fuse to blow unless a component in the power supply has failed This includes DC output load short conditions 3 4 12 Power Factor
52. abled the BIOS displays the total system memory on the diagnostic screen at the end of POST This total is the same as the amount described by the first bullet in this section The BIOS provides the total amount of memory in the system 2 4 3 3 1 Memory Reservation for Memory mapped Functions A region of size 40 MB of memory below 4 GB is always reserved for mapping chipset processor and BIOS flash spaces as memory mapped I O regions This region appears as a loss of memory to the operating system In addition to this loss the BIOS creates another reserved region for memory mapped PCle functions including a standard 64 MB or 256 MB of standard PCI Express MMIO configuration space If PAE is turned on in the operating system the operating system reclaims all these reserved regions In addition to this memory reservation the BIOS creates another reserved region for memory mapped PCI Express functions including a standard 64 MB or 256 MB of standard PCI Express Memory Mapped I O MMIO configuration space This is based on the selection of Maximize Memory below 4 GB in the BIOS Setup If this is set to Enabled the BIOS maximizes usage of memory below 4 GB for an operating system without PAE capability by limiting PCI Express Extended Configuration Space to 64 buses rather than the standard 256 buses This is done using the MAX BUS NUMBER Revision 1 0 11 Intel order number E94847 001 Functional Architecture Intel Server Syste
53. alled alled ed Disablec DIMM_A3 alled No allec ed Disablec DIMM_B1 alled No all led Disab DIMM_B2 No alled Failed Disab DIMM_B3 alled No alled ed Disablec Figure 12 Setup Utility Memory Configuration Screen Display Table 16 Setup Utility Memory Configuration Screen Fields Setup Item Total Memory Information only The amount of memory available in the system in the form of installed DDR3 DIMMs in units of MB or GB Effective Memory Information only The amount of memory available to the operating system in MB or GB The Effective Memory is the difference between the Total Physical Memory and the sum of all memory reserved for internal usage RAS redundancy and SMRAM This difference includes the sum of all DDR3 DIMMs that failed Memory BIST during POST or were disabled by the BIOS during memory discovery phase to optimize memory configuration Current Configuration Information only Displays one of the following Independent Mode System memory is configured for optimal performance and efficiency and no RAS is enabled Sparing Mode System memory is configured for RAS with optimal effective memory Current Memory Information only Displays the speed the memory is running at Speed Revision 1 0 33 Intel order number E94847 001 Functional Architecture Intel Server System SR1640TH TPS DIMM_ XY Displays the state of each DIMM socket present on the board Each DI
54. ample lt Tab gt can be used to move from hours to minutes in the time item in the main menu Change Value The minus key on the keypad is used to change the value of the current item to the previous value This key scrolls through the values in the associated pick list without displaying the full list Change Value The plus key on the keypad is used to change the value of the current menu item to the next value This key scrolls through the values in the associated pick list without displaying the full list On 106 key Japanese keyboards the plus key has a different scan code than the plus key on the other keyboards but will have the same effect lt F9 gt Setup Defaults Pressing lt F9 gt causes the following to display Load Optimized Defaults Yes No If Yes is highlighted and lt Enter gt is pressed all Setup fields are set to their default values If No is highlighted and lt Enter gt is pressed or if the lt Esc gt key is pressed the user is returned to where they were before lt F9 gt was pressed without affecting any existing field values lt F10 gt Save and Exit Pressing lt F10 gt causes the following message to display Save configuration and reset Yes No If Yes is highlighted and lt Enter gt is pressed all changes are saved and the Setup is exited If No is highlighted and lt Enter gt is pressed or the lt Esc gt key is pressed the user is returned to where they were before lt F10 g
55. ank You must remove power from the system prior to opening the chassis for service You can download the latest system documentation drivers and system software from the Intel Support website http support intel com support motherboards server SR1640TH 94 Revision 1 0 Intel order number E94847 001 Appendix B Integrated BMC Sensor Tables Appendix B Integrated BMC Sensor Tables This appendix lists the sensor identification numbers and information about the sensor type name supported thresholds assertion and de assertion information and a brief description of the sensor purpose See the Intelligent Platform Management Interface Specification Version 2 0 for sensor and event reading type table information Sensor Type The Sensor Type values are the values enumerated in the Sensor Type Codes table in the IPMI specification The Sensor Type provides the context in which to interpret the sensor such as the physical entity or characteristic that is represented by this sensor Event Reading Type The Event Reading Type values are from the Event Reading Type Code Ranges and Generic Event Reading Type Codes tables in the IPMI specification Digital sensors are a specific type of discrete sensor which have only two states Event Offset Triggers Event Thresholds are event generating thresholds for threshold types of sensors u l nr c nc upper non recoverable upper critical upper non critical lower non recove
56. ans are not replaceable Therefore if a power supply fan fails you must replace the whole power supply unit 4 4 Air Duct Module Each tray in the chassis requires the use of an air duct module to direct airflow over critical areas within the system The following provides a summary and description of Air Duct Module Figure 40 Air Duct Module The figure below provides a description for Air Duct module assembling position Revision 1 0 73 Intel order number E94847 001 Cooling Sub System Intel Server System SR1640TH TPS Figure 41 Air Duct Module assembly process 74 Revision 1 0 Intel order number E94847 001 Hard Disk Drive Support Intel Server System SR1640TH TPS 5 Hard Disk Drive Support The server system provides four hard drive bays each tray has two hard drive bays Each hard drive bay can support one fix 3 5 inch SATA SAS HDD 5 1 Hard Disk Drive Bays Each tray in the server system 1U chassis can support up to two carrier mounted fix SATA or SAS 3 5 inch hard disk drives The drives cannot be electrically hot swapped while the system power is applied Node1 HDD Bay Node2 HDD Bay Node HDD Bay Node2 HDD Bay Figure 42 HDD Bays in 2 trays If a failed drive needs replacing it is recommended to power off the correspondent tray and replaces the failed hard drive 5 2 Hard Drive Carrier You can use hard drive carrier for 3 5 inch hard drive installation The hard drive carr
57. assis device functionality including power reset control and BIOS boot flags support Event receiver device The Integrated BMC receives and processes events from other platform subsystems Field replaceable unit FRU inventory device functionality The Integrated BMC supports access to system FRU devices using IPMI FRU commands System event log SEL device functionality The Integrated BMC supports and provides access to a SEL Sensor device record SDR repository device functionality The Integrated BMC supports storage and access of system SDRs Sensor device and sensor scanning monitoring The Integrated BMC provides IPMI management of sensors It polls sensors to monitor and report system health PMI interfaces o Host interfaces include system management software SMS with receive message queue support and server management mode SMM o Terminal mode serial interface o IPMB interface o LAN interface that supports the IPMl over LAN protocol RMCP RMCP Serial over LAN SOL ACPI state synchronization The Integrated BMC tracks ACPI state changes provided by the BIOS Integrated Baseboard Management Controller Integrated BMC self test The Integrated BMC performs initialization and run time self tests and makes results available to external entities For more information refer to the IPMI 2 0 Specification 2 5 1 2 Non IPMI Features The Integrated BMC supports the following non IPMI
58. ate Jumper Jumper Position Mode of Operation Note 1 2 Normal 2 3 Update 1 Power down and remove the AC power cord Open the server chassis Refer to your server chassis documentation for instructions 3 Move the jumper from the default operating position covering pins 1 and 2 to the enabled position covering pins 2 and 3 Close the server chassis Reconnect the AC cord and power up the server Perform the BMC firmware update procedure as documented in the README TXT file included in the given BMC firmware update package After the successful completion of the firmware update process the firmware update utility may generate an error stating the BMC is still in update mode 7 Power down and remove the AC power cord 8 Open the server chassis 9 Move the jumper from the enabled position covering pins 2 and 3 to the disabled position covering pins 1 and 2 10 Close the server chassis 11 Reconnect the AC cord and power up the server oak Note Normal BMC functionality is disabled when the Force BMC Update jumper is set to the enabled position You should never run the server with the BMC Force Update jumper set in this position You should only use this jumper setting when the standard firmware update process fails This jumper should remain in the default disabled position when the server is running normally 7 2 BIOS Recovery Mode J1G3 J9H3 BIOS recovery jumper is used to repair the
59. ceeneceeeeeeneeseeeneeeeeeeeeeeeseeeneneeeeeneetenes 84 8 3 Replacing the Back up Battery caricia E EE E eE 84 8 4 Product Regulatory Compliance socios 85 8 5 Use of Specified Regulated Components ooooooococcccncccnncconononcnononononononnnnonononononnnos 86 8 6 Electromagnetic Compatibility Notices c ccceecececcecceeeeeseeseceeenteeeeeeeeteeeseneeees 88 8 6 1 FCC Verification Statement USA c ccceeeeeeee sence ceeeeeeeeeseseceneeseseeeneeeneeeenene 88 8 6 2 IGES 003 Canada EE 88 8 6 3 Europe CE Declaration of Conformity oooooococccicccccococoncccncccconnnnnannncncnnnnnnnnnnnnnnnno 89 8 6 4 Japan EMC Compatibility cocccccccccnccnnnccnnccnnnnnnnnnnnnnnnnnnnnonnnnnnnonnninnninininos 89 8 6 5 BSMI Tiwa n sere aee aeea meae eE pE E EEEE EE EE 89 8 6 6 KOC IR A EN 89 8 7 Rack Mount Installation Guidelines ctra ege gen 89 8 7 1 If AC power supplies are installed oooooonoonnoonnnoonoconcconccoonc nono nono nono nnnnrnnnnnnnnnnas 90 8 7 2 If DC power supplies are installed ooooooonoonnnconcconoconoconnn nono nono nono nnnnnnnnrnnnnnnas 90 8 8 Power Cord Usage Sudestada 91 8 9 Product Ecology Compliahie iaa 91 8 10 Other MANS sessir o iio 92 Appendix A Integration and Usage Tpe en 94 Appendix B Integrated BMC Sensor Tables seen 95 Appendix C POST Code LED Decoder ssssssssssnrnnnsnnnrnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnn ennnen nne 99 Appendix D POST Cod
60. cooaonccnncnnnnnnnnnanannnnnnnnnnnnnnnnns 51 2 7 1 General Purpose Connectors ocooocccocccccccncccncccnncnnoconnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnineninnninnn 51 2 7 2 Board Bue 56 2 7 3 Board LED EE 58 2 8 System lO at 59 2 9 Rack and Cabinet Mounting Options c c cccceeecececceceeeteeseeseeeeensenestenedeseneneceee 60 9 Power S b SysSteM EE 61 3 1 Mechanism OVervieW ee 61 3 2 QU put CONNECT Sisi E E A a E S 61 3 3 EMP CY EE 62 3 4 AC Input Voltage Specification ccooccccccccnccnnncnnncnonononononnnnnnnnnnnnnnnnnncnnnons 62 3 4 1 Input voltage and frequency E 62 3 4 2 leit t e 63 3 4 3 Input Current harmonics a eee eee eeeaeeeaeeaaeeaeeeeeseeesseeseeeeeeeees 63 3 4 4 AC Line Transient Gpecfcation 63 iv Revision 1 0 Intel order number E94847 001 Intel Server System SR1640TH TPS Table of Contents 3 4 5 Susceptibility Requirements cece ccecccecceecceeeceeeceeeeeeeeeeeeeeeeeeneeeeeeeseeeseeeerenereees 63 3 4 6 AC Line Fast Transient EFT Specification ec ceecceeeeeeeeeeeeeeeeeeeeeeeeeeeeeeneeeeeees 64 3 4 7 AC Line Dropout Holdunp 64 3 4 8 AGC Be e ge TEE 65 3 4 9 Power beer dais A ta eee 65 34 10 AC Bi CH E 65 34AT JAC LING EE 65 3 4 12 Power Factor Correction essesi a a iaa a a a 65 3 5 DC output voltage specification ccceeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeseeeeeeeeeeeees 65 3 5 1 OU UIT PRA A O dd havc T 65 3 5 2 Remote Sensing 12VRS ET 66 3
61. cord again wait 30 seconds and re install the AC power cord Power up system and proceed to the lt F2 gt BIOS Setup Utility to reset the preferred settings Revision 1 0 83 Intel order number E94847 001 Intel Server System SR1640TH TPS Environmental and Regulatory Specification 8 Environmental and Regulatory Specifications 8 1 System Level Environmental Limits The following table defines the system level operating and non operating environmental limits Table 78 System Office Environmental Summary Parameter Limits Operating Temperature 10 C to 35 C with the maximum rate of change not to exceed 10 C per hour Non Operating 40 C to 70 C Temperature Non Operating Humidity 50 90 non condensing with a maximum wet bulb of 28 C Acoustic noise Sound Pressure 55 dBA Rackmount in an idle state at typical office ambient temperature 23 C 2 C Sound Power 7 0 BA in an idle state at typical office ambient temperature 23 2 degrees C ESD System Cooling 2050 BTU hour Requirement in BTU Hr EMI operating Required to meet EMI emission requirements tested as part of system 8 2 Serviceability and Availability The system is designed to be serviced by qualified technical personnel only The desired Mean Time To Repair MTTR the system is 15 minutes which includes diagnosing the system s problem To meet this goal the system enclosure and hardware was designed to minimize the MTTR The followin
62. cus to the parent menu lt Esc gt Exit The lt Esc gt key provides a mechanism for backing out of any field When the lt Esc gt key is pressed while editing any field or selecting features of a menu the parent menu is re entered When the lt Esc gt key is pressed in any sub menu the parent menu is re entered When the lt Esc gt key is pressed in any major menu the exit confirmation window is displayed and the user is asked whether changes can be discarded If No is selected and the lt Enter gt key is pressed or if the lt Esc gt key is pressed the user is returned to where they were before lt Esc gt was pressed without affecting any existing settings If Yes is selected and the lt Enter gt key is pressed the setup is exited and the BIOS returns to the main System Options Menu screen Select Item The up arrow is used to select the previous value in a pick list or the previous option in a menu item s option list The selected item must then be activated by pressing the lt Enter gt key Select Item The down arrow is used to select the next value in a menu item s option list or a value field s pick list The selected item must then be activated by pressing the lt Enter gt key Select Menu The left and right arrow keys are used to move between the major menu pages The keys have no affect if a sub menu or pick list is displayed lt Tab gt Select Field The lt Tab gt key is used to move between fields For ex
63. cy can be 800 1066 1333 MHz DDR3 UDIMM frequency can be 1066 1333 MHz All RDIMMs and UDIMMs include ECC Error Correction Code operation Various speeds and memory technologies are supported The Intel Core 3 series processor has an Integrated Memory Controller IMC supports DDR3 protocols with two independent 64 bit wide channels each accessing one or two DIMMs Only DDR3 UDIMM can be supported with the Intel Core i3 series processor RAS Reliability Availability and Serviceability is not supported on the server board S3420TH in Intel Server System SR1640TH 2 4 3 1 Memory Sizing and Configuration The server board S3420TH in Intel Server System SR1640TH supports various memory module sizes and configurations These combinations of sizes and configurations are valid only for DDR3 DIMMs approved by Intel Corporation Server board BIOS supports e DIMM sizes of 1 GB 2 GB and 4 GB e DIMMs composed of DRAM using 2 Gb technology e DRAMs organized as single rank dual rank or quad rank DIMMS e DIMM speeds of 800 1066 or 1333 MT s e Registered or Unregistered unbuffered DIMMs RDIMMs or UDIMMs Note UDIMMs should be ECC and may or may not have thermal sensors RDIMMs must have ECC and must have thermal sensors Server board S3420TH BIOS has the below limitations 256 Mb technology x4 DRAM on UDIMM and quad rank UDIMM are NOT supported x16 DRAM on UDIMM is not supported on combo routing
64. d Make USB Devices Non Bootable Enabled Disabled USB Mass Storage Device Configuration Device Reset timeout 10 seconds 20 seconds 30 seconds 40 seconds Mass Storage Devices Mass storage devices one line device Auto Floppy Forced FDD Hard Disk CD ROM Figure 14 Setup Utility USB Controller Configuration Screen Display Table 18 Setup Utility USB Controller Configuration Screen Fields Setup Item Help Text Detected USB Information only Shows the number Devices of USB devices in the system USB Controller Enabled Enabled All onboard USB controllers are turned on and Disabled accessible by the OS Disabled All onboard USB controllers are turned off and inaccessible by the OS Revision 1 0 35 Intel order number E94847 001 Functional Architecture Intel Server System SR1640TH TPS Legacy USB Enabled USB device boot support and PS 2 emulation for USB Grayed out if the USB Controller is Support Disabled keyboard and USB mouse devices disabled Auto Auto Legacy USB support is enabled if a USB device is attached Port 60 64 Enabled 1 0 port 60h 64h emulation support Grayed out if the USB Controller is Emulation Disabled Note This may be needed for legacy USB keyboard disabled support when using an OS that is USB unaware Make USB Enabled Exclude USB in Boot Table Grayed out if the USB Controller is Devices Non Disabled Enabled This removes all USB Mass Storage devices disabled Bootable as
65. d displaying system information To access this screen from the Main screen select Server Management Revision 1 0 39 Intel order number E94847 001 Functional Architecture Intel Server System SR1640TH TPS Main Advanced Security Server Management Boot Options Boot Manager Assert NMI on SERR Enabled Disabled Assert NMI on PERR Enabled Disabled Resume on AC Power Loss Stay Off Last state Reset Clear System Event Log Enabled Disabled FRB 2 Enable Enabled Disabled O S Boot Watchdog Timer Enabled Disabled O S Boot Watchdog Timer Policy Power off Reset O S Boot Watchdog Timer Timeout 5 minutes 10 minutes 15 minutes 20 minutes Plug amp Play BMC Detection Enabled Disabled gt System Information gt BMC Configuration Figure 18 Setup Utility Server Management Configuraiton Screen Display Table 22 Setup Utility Server Management Configuration Screen Fields Assert NMI on SERR Enabled On SERR generate an NMI and log an error Disabled Note Enabled must be selected for the Assert NMI on PERR setup option to be visible Assert NMI on PERR Enabled On PERR generate an NMI and log an error Disabled Note This option is only active if the Assert NMI on SERR option is Enabled selected Resume on AC Stay Off System action to take on AC power loss recovery Power Loss Last state Stay Off System stays off Reset Last State System returns to the same state before the AC power loss R
66. de the power supply FRU data shall be stored starting in address location 8000h through 80FFh ref The FRU data format shall be compliant with the IPMI specifications The current versions of these specifications are available at http developer intel com design servers ipmi spec htm 3 7 3 Power Supply Status LED indicators There will be a bi color LED to indicate power supply status as shown below Table 67 Power supply status Power supply condition Power supply LED No AC power to PSU OFF AC present only standby output on Flashing GREEN Power supply DC output ON and OK GREEN Power supply failure RED Power supply warning Flashing RE GREEN 3 8 PSMC and PMBus compliance The PSMC monitoring and control function set shall comply to the PMBus Spec Rev 1 1 and above which can be downloaded from the www pmbus org 3 8 1 Hardware The device in the power supply is compatible with both the SMBus 2 0 high power specification for DC Vdd based power and drive for Vdd 3 3V This bus operates at 3 3 V but is tolerant of 5 V signaling It also operates at full 100 kbps SMBus speed without using clock stretching to slow down the bus Revision 1 0 69 Intel order number E94847 001 Power Sub System Intel Server System SR1640TH TPS 3 8 2 Data Format The data format for current voltage power temperature and fan speed are using the PMBus Literal format a Data Byte High eis Data Byte
67. default values If needed the user default values can be restored via the Load User Default Values option below Note Clearing the CMOS or NVRAM causes the user default values to be reset to the factory default values Load User Default Load user default values User is prompted for confirmation Values 50 Revision 1 0 Intel order number E94847 001 Intel Server System SR1640TH TPS Functional Architecture 2 6 6 Loading BIOS Defaults Different mechanisms exist for resetting the system configuration to the default values When a request to reset the system configuration is detected the BIOS loads the default system configuration values during the next POST You can send the request to reset the system to the defaults in the following ways Pressing lt F9 gt from within the BIOS Setup utility Moving the clear system configuration jumper IPMI command set System Boot options command Int15 AX DA209 Choosing Load User Defaults from the Exit page of the BIOS Setup loads user set defaults instead of the BIOS factory defaults The recommended steps to load the BIOS defaults are 1 Power down the system Do not remove AC power 2 Move the Clear CMOS jumper from pins 1 2 to pins 2 3 3 Move the Clear CMOS jumper from pins 2 3 to pins 1 2 4 Power up the system 2 7 Connector Header Locations and Pin outs 2 7 1 General Purpose Connectors The following section provides detailed information regarding all connector
68. der During the system boot process the BIOS executes a number of platform configuration processes each of which is assigned a specific hex POST code number As each configuration routine is started the BIOS displays the POST code to the POST Code Diagnostic LEDs on the back edge of the server board To assist in troubleshooting a system hang during the POST process you can use the diagnostic LEDs to identify the last POST process executed Each POST code is represented by the eight amber diagnostic LEDs The POST codes are divided into two nibbles an upper nibble and a lower nibble The upper nibble bits are represented by diagnostic LEDs 4 5 6 and 7 The lower nibble bits are represented by diagnostics LEDs 0 1 2 and 3 If the bit is set in the upper and lower nibbles then the corresponding LED is lit If the bit is clear then the corresponding LED is off The diagnostic LED 7 is labeled as MSB Most Significant Bit and the diagnostic LED 0 is labeled as LSB Least Significant Bit E Lo D JI MSB Node POST LED Nodel Figure 47 Diagnostic LED Placement Diagram In the following example the BIOS sends a value of ACh to the diagnostic LED decoder The LEDs are decoded as follows Table 81 POST Progress Code LED Example Upper Nibble LEDs Lower Nibble LEDs LEDs Status Results Upper nibble bits 1010b Ah Lower nibbl
69. e OxE0h O O O X X X X X Entered Pre EFI Initialization phase PET OxElh O O O X X X X O Started dispatching early initialization modules PEIM OxE2h O O O X X X O X Initial memory found configured and installed correctly OxE3h O O O X X X O O Transfer control to the DXE Core Driver eXecution Environment DXE Core OxE4h O O O x x O Xx Xx Entered EFI driver execution phase DXE OxESh O O O x x O x O Started dispatching drivers OxE6h O O O X x O O x Started connecting drivers DXE Drivers OxE7h O O O X O O X O Waiting for user input OxE8h O O O X O X X X Checking password OxE9h O O O X O X X O Entering BIOS setup OxEAh O O O X O O X X Flash Update OxEEh O O 0 X O O X X Calling Int 19 One beep unless silent boot is enabled OxEFh O O O X O O X O Unrecoverable boot failure Pre EFI Initialization Module PEIM Recovery 0x30h x X O O x x x x Crisis recovery has been initiated because of a user request 0x3 1h x x O O x x xX O Crisis recovery has been initiated by software corrupt flash 0x34h x x O O x O x x Loading crisis recovery capsule 0x35h x x O O x O x O Handing off control to the crisis recovery capsule 0x3Fh X X O O O O O O Crisis recovery capsule failed integrity check of capsule descriptors Runtime Phase EFI Operating System Boot OXF2h O O O O X X O X Signal that the OS has switched to virtual memory mode OXF4h O O O O X O X X Entering the sleep state OXFSh O O O O X O X O Exiting the sleep state OXF8h o o o o o x x x Bees system has
70. e Errors issiiisesiiesiecseseiaveciverdssnsdiaieevsseuvesvisedaveiinvnssenssehiesvulesvecv sedeeeiis 102 GI OSS E 107 Reference DOCUMENTS cirio deet duvet ccecsedesevaverveeneteeedossventeencecscuccrewssSusressesevevwntdsseteweseies 110 vi Revision 1 0 Intel order number E94847 001 Intel Server System SR1640TH TPS List of Figures List of Figures Figure 1 Ee EE 4 Figure 2 Single tray overview Left Tray cccccecccesesseeeceneceeeeeesteeeeeeeeeeeeeeeeenseenenseneeeeeeneeeses 4 Figure 3 System trays overview with power supply units ccccccccnnncononcconcccnnnoncnnnnnnnnnonononnnnnnnns 5 Figure 4 System tray Components stc A eee ea ere 6 Figure 5 Single server board S3420TH V EW cccccesessececneceeeesesseeeceneeeeeeeeeeenseeeaeeeeeeeeeeeeescees 7 Figure 6 Server board S3420TH block diagram c ecccceeeeeseeseseeeceeceeeeeeeeeeeeeneeeeeeeeeeetenees 8 Figure 7 Integrated BMC Plard TE 18 Figure 8 Example of Event Log Viewel 2 s 0 cccecceecsccceecceteeceetesecsedeeseeceeee er 25 Figure 9 Setup Utility Main Screen Display 28 Figure 10 Setup Utility Advanced Screen Display 30 Figure 11 Setup Utility Processor Configuration Screen Display 31 Figure 12 Setup Utility Memory Configuration Screen Display 33 Figure 13 Setup Utility Mass Storage Controller Configuration Screen Display 000000 34 Figure 14 Setup Utility USB Controller Confi
71. e bits 1100b Ch the two are concatenated as ACh Revision 1 0 99 Intel order number E94847 001 Intel Server System SR1640TH TPS Appendix C POST Code LED Decoder Table 82 POST Progress Code LED Example Diagnostic LED Decoder O On X Off Checkpoint aE Upper Nibble Lower Nibble a Description 8h Ah 2h lh 8h Ah 2h 1h LED 7 6 5 4 3 2 1 0 Host Processor 0x04h x X xX X x O Xx Xx Early processor initialization flat32 asm where system BSP is selected 0x10h x x X O x X X X Power on initialization of the host processor Boot Strap Processor 0x11h x x x O x x x O Host processor cache initialization including AP 0x12h x X X O x X O x Starting application processor initialization 0x13h Ke x x O x x O O SMM initialization Chipset 0x21h X X O X X X X O Initializing a chipset component Memory 0x22h X X O X X X 0 X Reading configuration data from memory SPD on FBDIMM 0x23h X X O X X X O O Detecting presence of memory 0x24h X X O X X O X X Programming timing parameters in the memory controller 0x25h X X O X X O X O Configuring memory parameters in the memory controller 0x26h X X O X X O O X Optimizing memory controller settings 0x27h X X O X X O 0 O Tnitializing memory such as ECC init 0x28h X X O X O X X X Testing memory PCI Bus 0x50h X O X O X X X X Enumerating PCI buses 0x51h X O X O X X X O Allocating resources to PCI buses 0x52h X O X O X X O X Hot Plug PCI co
72. e if all processor in the system support Intel Turbo Boost Technology Intel Turbo Boost Technology allows the processor to automatically increase its frequency if it is running below power temperature and current specifications Enhanced Intel SpeedStep Technology allows the system to dynamically adjust processor voltage and core frequency which can result in decreased average power consumption and decreased average heat production Contact your OS vendor regarding OS support of this feature Intel HT Technology allows multithreaded software applications to execute threads in parallel within the processor Contact your OS vendor regarding OS support of this feature Enable 1 2 or All cores of installed processor packages Execute Disable Bit can help prevent certain classes of malicious buffer overflow attacks Contact your OS vendor regarding OS support of this feature Intel Virtualization Technology allows a platform to run multiple operating systems and applications in independent partitions Note A change to this option requires the system to be powered off and then back on before the setting takes effect Enable Disable Intel Virtualization Technology for Directed I O Report the I O device assignment to VMM through DMAR ACPI Tables Enable Disable Intel VT d Interrupt Remapping support Only visible when Intel Virtualization Technology for Directed I O is enabled Only visible when Intel
73. eaders per node Two USB 2 0 ports with headers on motherboard One USB 2 0 port with headers dedicated for internal USB flash One RMM3 Lite V connector to support optional Intel Remote Management Module 3 Lite V module One SAS 4i connector for SATAII ports shared by two nodes and two SATAII ports from each node 2 Revision 1 0 Intel order number E94847 001 Intel Server System SR1640TH TPS Functional Architecture Feature Description Three 8 pin system FAN headers per board One power supply connector with PMBus enabled shared by two nodes System Fan Support Three sets of axial FAN per board Total six sets of system FANs in chassis Add in Adapter Support No support for add in card On board Video On board Server Engines Pilot Il Controller ServerEngine iBMC External 64MB DDR2 667MHz Memory LAN Support Two 10 100 1000 ports provided by Intel 82574L connected to PCI E x1 interface to processor One Gigabit Ethernet connects to iBMC through NC SI interface shared mode Two 10 100 1000 Base TX interfaces through RJ45 connectors with integrated magnetic One 10 100M PHY KSZ8041NL connected to iBMC through RMII interface as dedicated management port System Power Dual 450 W power supply 80 plus silver with PFC configured as one power supply per board System Management On board Server Engines Pilot II Controller Integrated Baseboard Management Controller Integrated BMC IPMI 2
74. eeesrrrrrrrsrrrrrrrrrrrrrrrrtrrrrrrrrrrrrrrrtrrrtrerteettent 78 SSI Power LED Operation NENNEN ENNEN 78 System Status LED Operation EE 78 System ID LED Indicator States geesde EECHER ECKE ENEE ENER oy ced RASSEL ee 80 Force IBMC Update Jumper 82 BIOS Recovery Mode JUMP Or socio Eed eege e Zeng ees 82 Clear CMOS Jumper eher 82 System Office Environmental SUMMALY c oooooccccccccccccononononcncncnonananononcnnnncnnnnnnnr rn ccnnnnnn 84 Product Safety and Electromagnetic EMC Compliance ooooooocooccccoccococcoonnnnonnnnnnnos 86 Integrated BMC Sensor Table ota ia 96 POST Progress Code LED Example oo ocociciacoccadc dida ee EEN learn dci ds 99 POST Progress Code LED erregt eeh te ces 100 POST Error Message and Handling comimos desea docensessevensedescneinennends 102 POST Error Beep Codes ricine rr aree ei n i aae aae eii 105 Revision 1 0 Intel order number E94847 001 Intel Server System SR1640TH TPS List of Tables lt This page intentionally left blank gt Revision 1 0 xi Intel order number E94847 001 Intel Server System SR1640TH TPS Introduction 1 Introduction This Technical Product Specification TPS provides system specific information detailing the features functionality and high level architecture of the Intel Server System SR1640TH including the server board S3420TH inside system In addition you can obtain design level information for specific sub systems by ordering the External Product Specifications EPS
75. egister JTAG Master Six I C interfaces General purpose I O Ports 16 direct 64 serial Additionally the ServerEngines Pilot II part integrates a super I O module with the following features KCS BT Interface Two 16C550 Serial Ports Serial IRQ Support 12 GPIO Ports shared with BMC LPC to SPI Bridge SMI and PME Support The Pilot Il contains an integrated KVMS subsystem and graphics controller with the following features USB 2 0 for keyboard mouse and storage devices USB 1 1 interface for legacy PS 2 to USB bridging Hardware Video Compression for text and graphics Hardware encryption 2D Graphics Acceleration DDR2 graphics memory interface Up to 1600x1200 pixel resolution PCI Express x1 support Revision 1 0 17 Intel order number E94847 001 Functional Architecture Intel Server System SR1640TH TPS USB Code Integrated BMC Block Diagram to Host Memory Interrupt Fan Tach 12 ADC Se Controller PWM 4 Thermal GS RTC E Ethernet General Purpose MAC with Timers 3 RMII 2 LPC Master JTAG Master amp SPI FLash JTAG Master ARM926EJ S 16KD amp 1 Cache DDR II 16 bit Memory Controller 667MHz BMC amp KVMS Subsystem Video Output KCS System UART 3 BT amp Wakeup Mailboxes Control elt LPC to SPI Watchdog Real Time Clock Flash Bridge Timer internace external RTC BMC amp KVMS Subsystem LPC
76. em cooling FAN connectors The server board S3420TH provides three 8 pin connectors J4K1 J6K2 J4K2 for Board cooling FAN sets connection The following table provides the pin out for this connector Table 44 System FAN connector pin out J4K1 J6K2 J4K2 Pint Signal SS AN oo mw GND GND ee INN Revision 1 0 55 Intel order number E94847 001 Functional Architecture Intel Server System SR1640TH TPS 2 7 1 8 Power to backplane connectors The server board S3420TH provides a 6 pin connector J7K2 for providing power to SATA HDD directly The following table provides the pin out for this connector Table 45 Power to backplane connector pin out J7K2 Pin Signal Pin Signal 5VDC_node2 5VDC_node1 12VDC_node2 12VDC_node1 a IUCN IEA A 2 7 2 Board Jumpers The following summary list provides description of board jumpers and their functions 56 Revision 1 0 Intel order number E94847 001 Intel Server System SR1640TH TPS on oo gon ms poa 0 0000 08008 ee ee ia fe ebe Functional Architecture El j 2 Sep Wm fp 5 P E f Bi a z H ay i 4 s m CO a E H 105003 grn 1 gt al amina o E 6 2 w OA G aci TEIENEI on a B i He H Zen BMC Force update Node 2 3 Enable 1 2 Default 110 BMC Force update_Node1 J1A1 1 2 Default cl 2 3 Enable 3 10 CMOS Clear_Node1 J1G2 1
77. en Intel server building blocks are used together the fully integrated system will meet the intended thermal requirements of these components It is the responsibility of the system integrator who chooses not to use Intel developed server building blocks to consult vendor datasheets and operating parameters to determine the amount of air flow required for their specific application and environmental conditions Intel Corporation cannot be held responsible if components fail or the server board does not operate correctly when used outside any of their published operating or non operating limits Revision 1 0 1 Intel order number E94847 001 Functional Architecture Intel Server System SR1640TH TPS 2 Functional Architecture The Intel Server System SR1640TH is a rack mount 1U server system purpose built for high density and lowest total cost of ownership in dense computing and hosting IPDC applications The system is integrated with two dedicated Intel Server Boards S3420TH each board contains 2 computing nodes The two server boards in Intel Server System SR1640TH are installed in two system trays each There are totally four 3 5 inch fixed SAS or SATA hard drives bays in system each system tray contains two HDD bays supporting total four computing nodes respectively This chapter provides a high level overview of the system features The following chapters provide greater detail for each major system component or feature Table 1
78. ensor O Specific 04 PEF action As 6Fh Trig A Offset Trig Al ne Volt Threshold Degraded oltage resho u 1 e ne As and De Analog R T A 02h Olh c Non fatal Se Revision 1 0 Intel order number E94847 001 Appendix B Integrated BMC Sensor Tables Intel Server System SR1640TH TPS Sensor Sensor Platform Sensor Event Event Offset Contrib Assert De Readable Event Name Applicability Type Reading Triggers To System assert Value Data Type Status Offsets nc Volt Threshold Degraded BB 1 1V PH Vecp ogee sess u 1 c nc As and De Analog 02h 01 c Non fatal nc Volt Threshold Degraded BB 1 IM Vecp SH Verin u 1 c nc As and De 02h 01 c Non fatal B nc Volt Threshold Degraded SEH SE u 1 c nc As and De 02h 01 c Non fatal nc Volt Threshold Degraded SCH E u 1 c nc As and De 02h 1 c Non fatal 1 1 ka 4 B 1 5V 1 DDR3 Eee a nc Volt Threshold Degraded eas een u 1 c nc As and De 02h 0 c Non fatal nc Volt Threshold Degraded Kg dog u 1 c nc As and De 02h c Non fatal Trig Offset oa Generi 01 Limit t eneric ottage exceeded Non fatal As and De 02h 05 nc Volt Threshold Degraded es een u 1 c nc As and De 02h 01 c Non fatal nc Volt Threshold Degraded Kg dog u 1 c nc As and De 02h 01 c Non fatal nc Volt Threshold Degraded OF deeg u 1 c nc As and De 02h 01 c Non fatal nc Volt Threshold Degraded SC ae
79. er Name User Password Table 24 Setup Utility BMC configuration Screen Fields Setup Item Help Text IP source Static Select BMC IP source When Static option is Dynamic selected IP address subnet mask and gateway are editable When Dynamic option selected these fields are read only and IP is address acquired automatically DHCP IP address address IP address View Edit IP address Press lt Enter gt to edit Subnet Mask View Edit subnet address Press lt Enter gt to edit Poor Mask pee TOA View Edit Gateway IP address Press lt Enter gt a to edit BMC Host Name View Edit BMC host name Press lt Enter gt to Available only edit when IP source for any one channel is dynamic option User ID Select the user id to configure User Status Enable Enable Disable LAN access for selected user Disable Also enables disables SOL KVM media redirection User Name Press lt Enter gt to edit user name User name is string of 4 to 15 alphanumeric characters User Revision 1 0 Intel order number E94847 001 Functional Architecture Intel Server System SR1640TH TPS Setup Item Help Text User Password Press lt Enter gt Key to enter password Only This filed will not alphanumeric characters can be used indicate whether Maximum length is 15 characters and case there is password sensitive set already Note Password entered will override any previously set password 2 6 5 7
80. eset System powers on Clear System Event Enabled If enabled clears the System Event Log All current Log Disabled entries will be lost Note This option is reset to Disabled after a reboot FRB 2 Enable Enabled Fault Resilient Boot FRB Disabled If enabled the BIOS programs the BMC watchdog timer for approximately 6 minutes If the BIOS does not complete POST before the timer expires the BMC resets the system O S Boot Watchdog Enabled If enabled the BIOS programs the watchdog timer Timer Disabled with the timeout value selected If the OS does not complete booting before the timer expires the BMC resets the system and an error is logged Requires OS support or Intel Management Software O S Boot Watchdog Power Off If the OS boot watchdog timer is enabled this is the Grayed out when the O S Timer Policy Reset system action taken if the watchdog timer expires Boot Watchdog Timer is Reset System performs a reset disabled Power Off System powers off O S Boot Watchdog 5 minutes If the OS watchdog timer is enabled this is the Grayed out when the O S Timer Timeout 10 minutes timeout value used by the BIOS to configure the Boot Watchdog Timer is 15 minutes Watchdog timer disabled 20 minutes Revision 1 0 Intel order number E94847 001 Intel Server System SR1640TH TPS Functional Architecture Setup Item Help Text Plug amp Play BMC Enabled If enabled the BMC is detectable by OSs that support Detecti
81. esponsibility whatsoever for conflicts or incompatibilities arising from future changes to them The Intel Server System SR1640TH may contain design defects or errors known as errata which may cause the product to deviate from published specifications Current characterized errata are available on request This document and the software described in it are furnished under license and may only be used or copied in accordance with the terms of the license The information in this manual is furnished for informational use only is subject to change without notice and should not be construed as a commitment by Intel Corporation Intel Corporation assumes no responsibility or liability for any errors or inaccuracies that may appear in this document or any software that may be provided in association with this document Except as permitted by such license no part of this document may be reproduced stored in a retrieval system or transmitted in any form or by any means without the express written consent of Intel Corporation Intel Pentium and Xeon are trademarks or registered trademarks of Intel Corporation Other brands and names may be claimed as the property of others Copyright Intel Corporation 2010 Revision 1 0 iii Intel order number E94847 001 Table of Contents Intel Server System SR1640TH TPS Table of Contents He UNTO MU CHIONNT ivi EVEN dunes Pl E A A 1 1 1 Chapter ell 1 1 2 Server Board Use Disclaimer
82. features This list does not preclude support for future enhancements or additions In circuit Integrated BMC firmware update Fault resilient booting FRB FRB2 is supported by the watchdog timer functionality Chassis intrusion detection and chassis intrusion cable presence detection Basic fan control using TControl version 2 SDRs Acoustic management Support for multiple fan profiles Signal testing support The Integrated Baseboard Management Controller Integrated BMC provides test commands for setting and getting platform signal states Revision 1 0 dl Intel order number E94847 001 Functional Architecture Intel Server System SR1640TH TPS The Integrated Baseboard Management Controller Integrated BMC generates diagnostic beep codes for fault conditions System GUID storage and retrieval Front panel management The Integrated Baseboard Management Controller Integrated BMC controls the system status LED and chassis ID LED It supports secure lockout of certain front panel functionality and monitors button presses The chassis ID LED is turned on using a front panel button or a command Power state retention Power fault analysis Intel Light Guided Diagnostics Power unit management Support for power unit sensor The Integrated Baseboard Management Controller Integrated BMC handles power good dropout conditions DIMM temperature monitoring New sensors and improved acoustic management
83. g with the POST Diagnostic LED code 0xE8 No Usable Memory displayed e OxEA Channel Training Error If the memory initialization process is unable to properly perform the DQ DQS training on a memory channel the BIOS emits a beep code and displays POST Diagnostic LED code OXEA momentarily during the beeping If there is usable memory in the system on other channels POST memory initialization continues Otherwise the system halts with POST Diagnostic LED code OxEA staying displayed e OxED Population Error If the installed memory contains a mix of RDIMMs and UDIMMs the system halts with POST Diagnostic LED code OxED e OxEE Mismatch Error If more than two quad ranked DIMMs are installed on any channel in the system the system halts with POST Diagnostic LED code OxEE 2 4 3 3 Publishing System Memory The BIOS displays the Total Memory of the system during POST if Quiet Boot is disabled in the BIOS setup This is the total size of memory discovered by the BIOS during POST and is the sum of the individual sizes of installed DDR3 DIMMs in the system The BIOS displays the Effective Memory of the system in the BIOS Setup The term Effective Memory refers to the total size of all active DDR3 DIMMs not disabled and not used as redundant units The BIOS provides the total memory of the system in the main page of the BIOS setup This total is the same as the amount described by the first bullet in this section If Quiet Boot is dis
84. g are the maximum times a trained field service technician should take to perform the listed system maintenance procedures after diagnosing the system and identifying the failed component s Time Estimate 10 sec Tmin 30 sec 1 min 10 min 8 3 Replacing the Back up Battery The lithium battery on the server board powers the real time clock RTC for up to 10 years in the absence of power When the battery starts to weaken it loses voltage and the server settings stored in CMOS RAM in the RTC for example the date and time may be wrong Contact your customer service representative or dealer for a list of approved devices 84 Revision 1 0 Intel order number E94847 001 Environmental and Regulatory Specification Intel Server System SR1640TH TPS A WARNING Danger of explosion if battery is incorrectly replaced Replace only with the same or equivalent type recommended by the equipment manufacturer Discard used batteries according to manufacturer s instructions A ADVARSEL Lithiumbatteri Eksplosionsfare ved fejlagtig handtering Udskiftning m kun ske med batteri af samme fabrikat og type Lev r det brugte batteri tilbage til leverandoren A ADVARSEL Lithiumbatteri Eksplosjonsfare Ved utskifting benyttes kun batteri som anbefalt av apparatfabrikanten Brukt batteri returneres apparatleverandoren A VARNING Explosionsfara vid felaktigt batteribyte Anvand samma batterityp eller en ekvi
85. g boot time when the OEM or Intel logo displays The following message displays on the diagnostics screen and under the Quiet Boot logo screen Press lt F2 gt to enter setup When the Setup is entered the Main screen displays However serious errors cause the system to display the Error Manager screen instead of the Main screen 2 6 4 3 Keyboard Commands The bottom right portion of the Setup screen provides a list of commands used to navigate through the Setup utility These commands display at all times 26 Revision 1 0 Intel order number E94847 001 Intel Server System SR1640TH TPS Functional Architecture Each Setup menu page contains a number of features Each feature is associated with a value field except those used for informative purposes Each value field contains configurable parameters Depending on the security option chosen and in effect by the password a menu feature s value may or may not be changed If a value cannot be changed its field is made inaccessible and appears grayed out Table 12 BIOS Setup Keyboard Command Bar lt Enter gt Execute The lt Enter gt key is used to activate sub menus when the selected feature is a sub Command menu or to display a pick list if a selected option has a value field or to select a sub field for multi valued features like time and date If a pick list is displayed the lt Enter gt key selects the currently highlighted item undoes the pick list and returns the fo
86. guration Screen Display 35 Figure 15 Setup Utility PCI Configuration Screen Display 36 Figure 16 Setup Utility System Acoustic and Performance Configuration Screen Display 37 Figure 17 Setup Utility Security Configuration Screen Display 38 Figure 18 Setup Utility Server Management Configuraiton Screen Display 40 Figure 19 Setup Utility Server Management System Information Screen Display 41 Figure 20 Setup Utility BMC configuration Screen Display ooooooooccccnnnnncccccncanaccnncnnnononnnnnns 43 Figure 21 Setup Utility Boot Options Screen Display 44 Figure 22 Setup Utility Add New Boot Options Screen Display 45 Figure 23 Setup Utility Delete Boot Option Screen Display 46 Figure 24 Setup Utility Hard Disk Order Screen Display ceceeeeeceeeeeeeeeeeeeenteeeeeeeeeeeeee 46 Figure 25 Setup Utility CDROM Order Screen Display 47 Figure 26 Setup Utility Floppy Order Screen Display 47 Figure 27 Setup Utility Network Device Order Screen Display 48 Figure 28 Setup Utility Network Device Order Screen Display 48 Figure 29 Setup Utility Boot Manager Screen Display 49 Figure 30 Setup Utility Error Manager Screen Display 49 Figure 31 Setup Utility Error Manager Screen Display 50 Figure 32 Connector locations on server board S3420TH ococcccconoconanoncnnnnnnnnnnnnanonnnnnnnnnncnannnns 52 Fig re 33 Connector il EE 5
87. he DIMM that is either single rank SR dual rank DR or quad rank QR The speed of the processor s IMC is the maximum speed possible The speed of the slowest component the slowest DIMM or the IMC determines the maximum frequency subject to further limitations A single 1333 MHz DIMM SR or DR on a channel may run at full 1333 MHz speed If two SR DR DIMMs are installed on a channel the speed is limited to 1066 MHZ Asingle QR RDIMM on a channel is limited to 1066 MHz Two QR RDIMMs or a mix of QR SR DR on a channel is limited to 800 MHz 2 4 3 4 2 Memory Subsystem Nomenclature 1 DIMMs are organized into physical slots on DDR3 memory channels that belong to processor sockets 2 The memory channels are identified as channels A B 3 For Intel Xeon 3400 Series each socket can support a maximum of four DIMM sockets two DIMM sockets per channel which can support a maximum of four DIMM sockets 4 The Intel Xeon 3400 Series processor on the Server Board of Intel Server System SR1640TH is populated on the processor socket It has an Integrated Memory Controller IMC The IMC provides two DDR3 channels and groups DIMMs on the board into an autonomous memory 12 Revision 1 0 Intel order number E94847 001 Intel Server System SR1640TH TPS Functional Architecture 5 The DIMM identifiers on the silkscreen on the board provide information about the channel and the processor socket to
88. his feature is available remotely from the embedded web server as a Java applet This feature is enabled only when the Intel RMM3 Lite V is present The client system must have a Java Runtime Environment JRE version 5 0 or later to run the KVM or media redirection applets 2 5 2 2 1 Keyboard and Mouse The keyboard and mouse are emulated by the Integrated BMC as USB human interface devices 22 Revision 1 0 Intel order number E94847 001 Intel Server System SR1640TH TPS Functional Architecture 2 5 2 2 2 Video Video output from the KVM subsystem is equivalent to the video output on the local console Video redirection is available after video is initialized by the system BIOS The KVM video resolution and refresh rates will always match the values set in the operating system 2 5 2 2 3 Availability The default inactivity timeout is 30 minutes however this can be changed through the embedded web server Remote KVM activation does not disable the local system keyboard video or mouse Unless the feature is disabled locally remote KVM is not deactivated by local system input KVM sessions persist across system reset but not across an AC power loss 2 5 2 3 Media Redirection The embedded web server provides a Java applet to enable remote media redirection This may be used in conjunction with the remote KVM feature or as a standalone applet The media redirection feature is intended to allow system administrators or users to m
89. ides a summary and description of configuration test and debug jumpers on the server board S3420TH which is used in Intel Server System SR1640TH BMC Force update_Node2 JSA1 2 3 Enable 1 2 Default D man inn NY LE ipsus SCH SST nos E BMC Force update_Node1 J1A1 CMOS Clear_Node1 J1G2 1 2 Default 2 3 Clear CMOS En NEE AEN BIOS Recovery_Node1 J1G3 5 1 2 Default E 2 3 Enable BIOS Recovery_Node2 J9H3 1 2 Default 2 3 Enable DD 213 ii CMOS Clear_Node2 J9J1 1 5 1 2 Default 2 2 3 Clear CMOS 3 10 180880891 e 0 00 09 00 000 Figure 46 Jumper location on Server Board S3420TH Revision 1 0 81 Intel order number E94847 001 Intel Server System SR1640TH TPS Configuration Jumpers 7 1 Force IBMC Update J1A1 J5A1 When performing a standard BMC firmware update procedure the update utility places the BMC into an update mode allowing the firmware to load safely onto the flash device In the unlikely event the BMC firmware update process fails due to the BMC not being in the proper update state the server board provides a BMC Force Update jumper J1A1 for node 1 J5A1 for node 2 that forces the BMC into the proper update state You must complete the following procedure in the event the standard BMC firmware update process fails Table 75 Force IBMC Upd
90. ier is fixed in the chassis tray You have to remove it from tray to install the hard drive To install the hard drive with carrier see below illustration Revision 1 0 75 Intel order number E94847 001 Intel Server System SR1640TH TPS Hard Disk Drive Support Figure 43 3 5 inch HDD Assembly Overview Figure 44 Install HDD assembly into tray 76 Revision 1 0 Intel order number E94847 001 Front Panel Control and Indicators Intel Server System SR1640TH TPS 6 Front Panel Control and Indicators The Intel Server System SR1640TH Front Control Panel integrates control buttons LEDs and USB ports The control panel assembly is pre assembled and fixed to the chassis Node 1 Node 2 Power Button Power LED E H System ID Button ID LED F l Node USB ports A G LAN 1 Activity LED B J LAN 2 Activity LED C K Node status LED D L Figure 45 Front Control Panel 6 1 Control Panel Button The following table lists the control panel features and functions The control panels features a system power button Table 70 Front Control Button Function Feature Function Toggles the system power on off This button also functions as a Sleep Power Sleep Button Button if enabled by an ACPI compliant operating system System ID Button Turn On turn off ID LED 6 2 Control Panel LED Indicators The control panel houses five LEDs which are viewable to display the system s operati
91. ification 2007 Intel Corporation Intelligent Platform Management Bus Communications Protocol Specification Version 1 0 1998 Intel Corporation Hewlett Packard Company NEC Corporation Dell Computer Corporation Platform Environmental Control Interface PECI Specification Version 2 0 Intel Corporation Platform Management FRU Information Storage Definition Version 1 0 Revision 1 2 2002 Intel Corporation Hewlett Packard Company NEC Corporation Dell Computer Corporation http developer intel com design servers ipmi spec htm ACPI 3 0 http www acpi info spec htm IPMI 2 0 Data Center Management Interface Specification v1 0 May 1 2008 www intel com go dcmi PCI Bus Power Management Interface Specification 1 1 http www pcisig com PCI Express Base Specification Rev 2 0 Dec06 http www pcisig com PCI Express Card Electromechanical Specification Rev 2 0 http www pcisig com PMBus http ombus org SATA 2 6 http www sata io org SMBIOS 2 4 SSI EEB 3 0 http www ssiforum org USB 1 1 http www usb org USB 2 0 http www usb org Microsoft Windows Logo SDG 3 0 110 Revision 1 0 Intel order number E94847 001
92. ing at high elevation Higher than 1500m 4920ft or greater Optimal performance setting at the highest elevations Set Fan Profile Performance Performance Fan control provides primary system This option is grayed Acoustics cooling before attempting to throttle memory out if CLTT is Acoustic The system will favor using throttling of enabled memory over boosting fans to cool the system if thermal thresholds are met 2 6 5 3 Security Screen The Security screen allows the user to enable and set the user and administrative password and to lock out the front panel buttons so they cannot be used Trusted Platform Module TPM security is NOT supported on the Server Board S3420TH To access this screen from the Main screen select Security Main Advanced Security Server Management Boot Options Boot Manager Administrator Password Status lt Installed Not Installed gt User Password Status lt Installed Not Installed gt Set Administrator Password 1234aBcD Set User Password 1234aBcD Front Panel Lockout Enabled Disabled Figure 17 Setup Utility Security Configuration Screen Display 38 Revision 1 0 Intel order number E94847 001 Intel Server System SR1640TH TPS Functional Architecture Table 21 Setup Utility Security Configuration Screen Fields Setup Item Help Text Administrator Password lt Installed Information only Indicates Status Not Installed gt the status of the administrator password
93. ion 1 0 Intel order number E94847 001 Environmental and Regulatory Specification Intel Server System SR1640TH TPS Compliance Regional Compliance Compliance Reference Marking Example Description Reference FCC This device complies with Part 15 of the ae FCC Rules Operation of this device is CFR 47 Part 15 Emissions subject to the following two conditions 1 This device may not cause harmful interference and 2 This device must accept interference receive including interference that may cause undesired operation CENELEC Europe Low Voltage Directive 2006 95 EC Europe EN60950 1 EMC Directive 2004 108 EEC EN55022 Emissions C EN55024 Immunity EN61000 3 2 Harmonics EN61000 3 3 Voltage Flicker CE Declaration of Conformity German GS Certification EN60950 International CB Certification IEC60950 f 1 None Required CISPR 22 CISPR 24 Korea KCC Certification p MIC Notice No 1997 41 E EMC amp 1997 42 EMI CPU SR1640 A Russia GOST R 50377 92 Certification GOST R 29216 91 Emissions GOST R 50628 95 Immunity MO04 Required Taiwan BSMI CNS13438 gt BoA a PRN ede BERR AEA gt TRS HATE gt Seet EAS BERR SHAR e TORES SA A TR oh Japan CCI Certification ee EE CHES takes e sees THA SORT CoOmriced te GEZEI gt A D BRETLS d nn OED VCCLA Revision 1 0 87 Intel order number E94847 001 Intel Server System SR1640TH TPS Environme
94. ipment to an outlet on a circuit other than the one to which the receiver is connected Consult the dealer or an experienced radio TV technician for help Any changes or modifications not expressly approved by the grantee of this device could void the user s authority to operate the equipment The customer is responsible for ensuring compliance of the modified product Only peripherals computer input output devices terminals printers etc that comply with FCC Class B limits may be attached to this computer product Operation with noncompliant peripherals is likely to result in interference to radio and TV reception All cables used to connect to peripherals must be shielded and grounded Operation with cables connected to peripherals that are not shielded and grounded may result in interference to radio and TV reception 8 6 2 ICES 003 Canada Cet appareil num rique respecte les limites bruits radio lectriques applicables aux appareils num riques de Classe A prescrites dans la norme sur le mat riel brouilleur Appareils Num riques NMB 003 dict e par le Ministre Canadian des Communications English translation of the notice above This digital apparatus does not exceed the Class A limits for radio noise emissions from digital apparatus set out in the interference causing equipment standard entitled Digital Apparatus ICES 003 of the Canadian Department of Communications 88 Revision 1 0 Intel order number E
95. ked by pressing the lt F6 gt key during POST The BBS popup menu displays all available boot devices The list order in the popup menu is not the same as the boot order in the BIOS setup it simply lists the bootable devices from which the system can be booted When a User Password or Administrator Password is active in Setup the password is to access the Boot Popup Menu Revision 1 0 25 Intel order number E94847 001 Functional Architecture Intel Server System SR1640TH TPS 2 6 3 BIOS Setup utility The BIOS setup utility is a text based utility that allows the user to configure the system and view current settings and environment information for the platform devices The Setup utility controls the platform s built in devices boot manager and error manager The BIOS setup interface consists of a number of pages or screens Each page contains information or links to other pages The advanced tab in Setup displays a list of general categories as links These links lead to pages containing a specific category s configuration The following sections describe the look and behavior for platform setup 2 6 4 Operation The BIOS Setup has the following features e Localization The BIOS Setup uses the Unicode standard and is capable of displaying setup forms in all languages currently included in the Unicode standard The Intel server board BIOS is only available in English e Console Redirection The BIOS Setup is functional thr
96. lation To avoid the potential for an electrical shock hazard you must include a third wire safety ground conductor with the rack installation If the server power cord is plugged into an AC outlet that is part of the rack then you must provide proper grounding for the rack itself If the server power cord is plugged into a wall AC outlet the safety ground conductor in the power cord provides proper grounding only for the server You must provide additional proper grounding for the rack and other devices installed in it Overcurrent protection The server is designed for an AC line voltage source with up to 20 amperes of overcurrent protection per cord feed If the power system for the equipment rack is installed on a branch circuit with more than 20 amperes of protection you must provide supplemental protection for the server 8 7 2 If DC power supplies are installed Connection with a DC Direct Current source should only be performed by trained service personnel The server with DC input is to be installed in a Restricted Access Location in accordance with articles 110 16 110 17 and 110 18 of the National Electric Code ANSI NFPA 70 The DC source must be electrically isolated by double or reinforced insulation from any hazardous AC source Main DC power disconnect You are responsible for installing a properly rated DC power disconnect for the server system This mains disconnect must be readily accessible and it must be labeled as contr
97. m Help Text boot option for this position ee aa Disk Order SS Network Device Order Set the order of the legacy devices in this group Set the order of the legacy devices in this group Set the order of the legacy devices in this group Set the order of the legacy devices in this group BEV Device Order Set the order of the legacy devices in this group Add New Boot Option Add a new EFI boot option to the boot order Delete Boot Option Remove an EFI boot option from the boot order EFI Optimized Boot Enabled If enabled the BIOS only loads Disabled modules required for booting EFI aware Operating Systems Boot Option Retry Enabled If enabled this continually retries non Disabled EFI based boot options without waiting for user input Visible when one or more hard disk drives are in the system Visible when one or more CD ROM drives are in the system Visible when one or more floppy drives are in the system Visible when one or more of these devices are available in the system Visible when one or more of these devices are available in the system This option is only visible if an EFI bootable device is available to the system for example a USB drive If the EFI shell is deleted you can restore it by setting CMOS defaults F9 If all types of bootable devices are installed in the system the default boot order is CD DVD ROM Floppy Disk Drive Hard Disk Drive PXE Net
98. m SR1640TH TPS feature offered by the Intel S3420 I O Hub and a variably sized Memory Mapped I O region for the PCI Express functions 2 4 3 3 2 High Memory Reclaim When 4 GB or more of physical memory is installed physical memory is the memory installed as DDR3 DIMMs the reserved memory is lost However the Intel 3420 chipset provides a feature called high memory reclaim which allows the BIOS and operating system to remap the lost physical memory into system memory above 4 GB the system memory is the memory the processor can see The BIOS always enables high memory reclaim if it discovers installed physical memory equal to or greater than 4 GB For the operating system the reclaimed memory is recoverable only if the PAE feature in the processor is supported and enabled Most operating systems support this feature For details see the relevant operating system manuals 2 4 3 3 3 ECC Support Only ECC memory is supported on server board S3420TH 2 4 3 4 Memory Map and Population Rules The following nomenclature is followed for DIMM sockets Table 3 Standard Platform DIMM Nomenclature Channel A Channel B A1 A2 B1 B2 2 4 3 4 1 TableMemory Subsystem Operating Frequency Determination The rules for determining the operating frequency of the memory channels are simple but not necessarily straightforward There are several limiting factors including the number of DIMMs on a channel and organization of t
99. minal 5VSB 4 75V 5 25V 3 5 5 Ripple and noise Ripple and noise are measured with 0 1uF of ceramic capacitance and 10uF of tantalum capacitance on each of the power supply output connector terminal The ripple and noise shall be met over all load ranges and AC line voltages The output noise requirements shall apply over a O Hz to 20 MHz bandwidth Table 61 Ripple and noise Output 12V 5VSB Maximum ripple nose 150mVp p 50mVp p 3 5 6 Transient loading The power supply shall operate within specified limits and meet regulation requirements over the following transient loading conditions anywhere within the specified load range of the power supply This shall be tested with no additional bulk capacitance added to the load Table 62 Transient loading Output Step size Slew rate Capacitive Load 12V 60 OF MAX 0 5A usec 2200uF 5VSB 25 OF MAX 0 5A usec 1uF Note While testing the transient loading the 12V limit is 5 3 5 7 Capacitive load The power supply shall operate within specifications over the capacitive load range defined 66 Revision 1 0 Intel order number E94847 001 Intel Server System SR1640TH TPS Power Sub System Table 63 Capacitive load Output Min Max 12V 10uF 11 000uF 5VSB TUF 350uF 3 5 8 Maximum load change The power supply shall continue to operate normally when there is a step change 1 A uS between minimum load and maxi
100. modify or use an AC power cord set that is not the exact type required You must use a power cord set that meets the following criteria e Rating In the U S and Canada cords must be UL Underwriters Laboratories Inc Listed CSA Canadian Standards Organization Certified type SJT 18 3 AWG American Wire Gauge Outside of the U S and Canada cords must be flexible harmonized lt HAR gt or VDE Verband Deutscher Electrotechniker German Institute of Electrical Engineers certified cord with 3 x 0 75 mm conductors rated 250 VAC Volts Alternating Current e Connector wall outlet end Cords must be terminated in grounding type male plug designed for use in your region The connector must have certification marks showing certification by an agency acceptable in your region and for U S must be Listed and rated 125 of overall current rating of the server e Connector server end The connectors that plug into the AC receptacle on the server must be an approved IEC International Electrotechnical Commission 320 sheet C13 type female connector e Cord length and flexibility Cords must be less than 4 5 meters 14 76 feet long 8 9 Product Ecology Compliance Intel has a system in place to restrict the use of banned substances in accordance with world wide product ecology regulatory requirements The following is Intel s product ecology compliance criteria Compliance Regional Compliance Reference Marking Sek Compliance Reference Desc
101. mponents Fixed 3 5 inch HDD bays F Dual node server board S3420TH Air duct G RMM3 Lite V module optional Front control pane Power supply unit mi Oo gt System Fans Module Figure 4 System tray Components Revision 1 0 Intel order number E94847 001 Intel Server System SR1640TH TPS Functional Architecture 2 4 Server Board Overview Intel Server System SR1640TH supports two dual node server board S3420TH in chassis The following sections provide an overview of the server board feature sets Figure 5 Single server board S3420TH view 2 4 1 Server board architecture The server board included in Intel Server System SR1640TH is a compact optimized dual node entry server board It is intended for any front end application in iPDC or high dense rack mount installation This product targets high power efficiency and low cost with good performance Below is the block diagram of the server board The architecture and design of the server board S3420TH is based on the Intel 3420 Chipset The chipset is designed for systems based on the Intel Xeon processor in the FC LGA 1156 socket package The chipset contains two main components Intel 3420 Chipset PCH Server Engines Pilot Il Controller This chapter provides a high level description of the functionality associated with each chipset component and the architectural blocks that make up the server board Revision
102. mum load 3 5 9 Output voltage rise time The turn on waveform for the 12V output shall be monotonic with less then 5 of overshoot The rise time from 10 1 2V to 90 10 8V shall be less then 50msec for a single power supply 3 5 10 Output voltage hold up time Upon loss of input voltage at nominal the output voltages shall remain in regulation for at least 16msec 3 5 11 Overshoot Any output overshoot at turn on shall be less than 10 of the nominal output value Any overshoot shall recover to within the specified regulation in less than 0 5mS 3 5 12 Temperature coefficient After operating for 30 minutes or longer at 25 C ambient the output voltages shall not change by more than 0 05 per degree C for any given line and load conditions 3 6 Protection Circuits The 5VSB output shall remain on if the failure does not involve this output When a protection circuit shuts down a power supply all the LED show a failed status and shall be active if the power supply latches off due to a protection circuit tripping An AC cycle off for 15 sec and PSON cycle high for 1 sec shall reset the power supply Else the Power should auto recover when the fail had been cleared or the power supply is within specifications again 3 6 1 Over Current short circuit Protection OCP The power supply shall have current limit to prevent the 12Voutput from exceeding the value shown in Table 10 The current limiting shall be of the constant cu
103. n u 1 c nc As and De 02h 01 c Non fatal nc Threshold Degraded 2 u 1 c nc As and De Olh c Non fatal Revision 1 0 97 Intel order number E94847 001 h h h h Olh ne Voltage Threshold Degraded v 1 c nc As and De 02h Oth Non fatal h h h h h 12 0V D D 13h 14h 15h 16h 17h 18h 19h 1Ah 1Bh 1Ch Oh Intel Server System SR1640TH TPS Appendix B Integrated BMC Sensor Tables Sensor Sensor Platform Sensor Event Event Offset Contrib Assert De Readable Name Applicability Type Reading Triggers To System assert Value Type Status Offsets nc Threshold Degraded u 1 c nc As and De Analog R 01h c Non fatal PCH Threshold Thermal Analog Marei Olh argin Process or MEMT Threshold l Analo HRM Olh 8 MRGN p nc an Chassis Threshold Degraded Tach Se e 1 c nc As and De Analog R e specific 01h c Non ensors S fatal Process or Threshold Therm 01h Margin Process Threshold T S u c Non fatal Therm 01h Offset Ctrl P Digital Ee 01 Limit Trig or VRD Discrete Fatal As and De exceeded Offset Temp 05h Process Digital or Discrete Di State Non fatal Trig Asserted Offset 07h 03h PCH Digital 018 Tri S Stat Thermal Discrete is Fatal As and De ne Asserted Offset Trip 03h T T 98 Revision 1 0 Intel order number E94847 001 Appendix C POST Code LED Decoder Intel Server System SR1640TH TPS Appendix C POST Code LED Deco
104. n Fields ooooooononoccccccnccnnonononcncncnnnnnnnnanann nono 37 Table 20 Setup Utility System Acoustic and Performance Configuration Screen Fields 38 Table 21 Setup Utility Security Configuration Screen Fields ooooooooococoncconccocncconcoonnonnnonnnonnnoo 39 Table 22 Setup Utility Server Management Configuration Screen FieldS 000000aennaeeeeeeeeaea 40 Table 23 Setup Utility Server Management System Information Fields 41 Table 24 Setup Utility BMC configuration Screen Fields ooooooooonccccnnncnncccononcccncnnnnnnnnnaro nono 43 Table 25 Setup Utility Boot Options Screen Fields oooooooocococcccccooccccccconnnonnnonnnon nono nor rnnnnnnnnnnns 44 Table 26 Setup Utility Add New Boot Options Screen Fields oooooooooconcccnnoconoconcconcnonnonnnonnnos 46 Table 27 Setup Utility Delete Boot Option Fields ccooommmoooconnnnonscnccanacrcrecnnnnnn anar 46 Table 28 Setup Utility Hard Disk Order Fields nono nnnnrnnnrnnnnnnns 46 Table 29 Setup Utility CDROM Order Fields AAA 47 Table 30 Setup Utility Floppy Order Fields 47 Table 31 Setup Utility Network Device Order FieldS nono nononononononnno 48 Table 32 Setup Utility Network Device Order FieldS nono nonononononnnnos 48 Table 33 Setup Utility Boot Manager Screen Fields ccccceeccceceeeeeseeseeeeneeeeeeeeeeeeeesnenees 49 Table 34 Setup Utility Error Manager Screen Fields 49 Table 35
105. n front of the rack on Revision 1 0 89 Intel order number E94847 001 Intel Server System SR1640TH TPS Environmental and Regulatory Specification slides You must also consider the weight of any other device installed in the rack A crush hazard exists should the rack tilt forward which could cause serious injury Temperature The temperature in which the server operates when installed in an equipment rack must not go below 5 C 41 F or rise above 40 C 104 F Extreme fluctuations in temperature can cause a variety of problems in your server Ventilation The equipment rack must provide sufficient airflow to the front of the server to maintain proper cooling The rack must also include ventilation sufficient to exhaust a maximum of 1023 BTUs British Thermal Units per hour for the server The rack selected and the ventilation provided must be suitable to the environment in which the server will be used 8 7 1 If AC power supplies are installed Mains AC power disconnection The AC power cord s is considered the mains disconnect for the server and must be readily accessible when installed If the individual server power cord s will not be readily accessible for disconnection then you are responsible for installing an AC power disconnect for the entire rack unit This main disconnect must be readily accessible and it must be labeled as controlling power to the entire rack not just to the server s Grounding the rack instal
106. ncy No mixing of registered and unbuffered DIMMs Non ECC UDIMMs not supported Mixing ECC and non ECC UDIMMs anywhere on the platform will prevent the system to boot function correctly 2 4 3 4 6 RDIMM Configuration rules Table 7 RDIMM memory configuration rule DIMM slots per channel DIMMs populated per channel Speed Ranks per channel 2 1 1066 1333 Single Rank Dual Rank 2 1 1066 Quad Rank 2 2 1066 1333 Single Rank Dual Rank 2 2 800 Quad Rank 14 Revision 1 0 Intel order number E94847 001 Intel Server System SR1640TH TPS Functional Architecture To get the maximum memory size on RDIMM you get the detail information from the following table Table 8 RDIMM Maximum configuration Max Memory Possible 1Gb DRAM Technology 2Gb DRAM Technology Single Rank RDIMM 4GB 8GB 4x 1GB DIMMs 4x 2GB DIMMs Dual Rank RDIMMs 8GB 16GB 4x 2GB DIMMs 4x 4GB DIMMs Quad Rank RDIMMs 16GB NA 4x 4GB DIMMs Also the server boards in Intel Server System SR1640TH have the following limitations on RDIMM No support for LV DIMMs 256Mb 512Mb technology x4 and x16 DRAMs on RDIMM are NOT supported All channels in a system will run at the fastest common frequency No mixing of registered and unbuffered DIMMs Note 1066MHz RDIMMs run at 800MHz 2 4 4 Intel 3420 PCH The Intel 3420 Chipset component is the Platform Controller Hub PCH The PCH is desig
107. ned for use with Intel processor in a UP server platform The role of the PCH on the server board S3420TH is to manage the flow of information between its eleven interfaces DMI interface to Processor PCI Express Interface PCI Interface SATA Interface USB Host Interface SMBus Host Interface SPI Interface LPC interface to IBMC JTAG interface LAN interface ACPI interface 2 4 5 UO Sub system Intel 3420 Chipset PCH provides extensive UO support 2 4 5 1 PCI Express Interface There is no PCI E extensive slot available on the server board S3420TH in Intel Server System SR1640TH Revision 1 0 15 Intel order number E94847 001 Functional Architecture Intel Server System SR1640TH TPS 2 4 5 2 Serial ATA Support The Intel 3420 Chipset has two integrated SATA host controllers that support independent DMA operation on up to six ports and supports data transfer rates of up to 3 0 GB s 300 MB s The SATA controller contains two modes of operation a legacy mode using I O space and an AHCI mode using memory space Software that uses legacy mode does not have AHCI capabilities The Intel 3420 Chipset supports the Serial ATA Specification Revision 1 0a The Intel 3420 Chipset also supports several optional sections of the Serial ATA Il Extensions to Serial ATA 1 0 Specification Revision 1 0 AHCI support is required for some elements There are two SATA ports implemented for each computing node
108. ng status The following table identifies each LED and describes their functionality Revision 1 0 77 Intel order number E94847 001 Intel Server System SR1640TH TPS Front Panel Control and Indicators Table 71 Front LED Indicator Functions LED Indicator Condition What it describes On Power On Blink Sleep S1 Power Off also 4 LAN 1 amp LAN 2 On LAN Link no Access Blink LAN Access Off Idle System ID On Unit Selected For Identification Off No Identification System Status On System Ready No Alarm Blink System ready but degraded redundancy lost such as PS or fan failure non critical temp voltage threshold battery failure or predictive PS failure On Critical Alarm Critical Power Modules Failure Critical t FANs Failure Voltage Power Supply critical Temperature and Voltage Non Critical Alarm redundant FAN Failure redundant Power Module Failure non critical Temperature and voltage AC power off System unplugged AC power on System powered off and in standby no prior degraded non critical critical state 6 2 1 Power Sleep LED Table 72 SSI Power LED Operation Non ACPI System power is off and the BIOS has not initialized the chipset Non ACPI Solid On System power is on but the BIOS has not yet initialized the chipset S5 ACPI Off Mechanical is off and the operating system has not saved any context to the hard disk S1 Sleep ACPI Blink
109. ng the sensors can be done manually or automatically This column indicates the type supported by the sensor The following abbreviations are used to describe a sensor A Auto rearm M Manual rearm Default Hysteresis The hysteresis setting applies to all thresholds of the sensor This column provides the count of hysteresis for the sensor which can be 1 or 2 positive or negative hysteresis Criticality Criticality is a classification of the severity and nature of the condition It also controls the behavior of the Control Panel Status LED Standby Some sensors operate on standby power These sensors may be accessed and or generate events when the main system power is off but AC power is present Sensor SE Platform Sensor Event ES Event Offset Contrib Assert De Readable Name Applicability Type ES Triggers To System assert Value Type Sans Offsets 00 Timer expired status only Watchd Sensor 01 Hard reset Trig og 2 Specific 02 Power As Offset 6Fh down 03 Power cycle 08 Timer interrupt 13h interrupt 00 Chassis Chassis Physical Sensor ho i i Trig face Security Specific E N Ee 04 LAN least Degraded set Sp Lal Event Logging Sensor All Disable Specific 02 Log area ae d s t reset cleared 10h K All Table 80 Integrated BMC Sensor Table SS E Sensor NME ee Specific P t diagnostic 6Fh System Event System Event Critical 00 Front panel Trig A A Offset S
110. ntal and Regulatory Specification 8 6 Electromagnetic Compatibility Notices 8 6 1 FCC Verification Statement USA This device complies with Part 15 of the FCC Rules Operation is subject to the following two conditions 1 this device may not cause harmful interference and 2 this device must accept any interference received including interference that may cause undesired operation For questions related to the EMC performance of this product contact Intel Corporation 5200 N E Elam Young Parkway Hillsboro OR 97124 1 800 628 8686 This equipment has been tested and found to comply with the limits for a Class A digital device pursuant to Part 15 of the FCC Rules These limits are designed to provide reasonable protection against harmful interference in a residential installation This equipment generates uses and can radiate radio frequency energy and if not installed and used in accordance with the instructions may cause harmful interference to radio communications However there is no guarantee that interference will not occur in a particular installation If this equipment does cause harmful interference to radio or television reception which can be determined by turning the equipment off and on the user is encouraged to try to correct the interference by one or more of the following measures Reorient or relocate the receiving antenna Increase the separation between the equipment and the receiver Connect the equ
111. ntroller initialization 0x53h X O X O X X O O Reserved for PCI bus 0x54h X O X O X O X X Reserved for PCI bus 0x55h X O X O X O X O Reserved for PCI bus 0x56h X O X O X O O X Reserved for PCI bus 0x57h X O X O X O 0 O Reserved for PCI bus USB 0x58h x O X O O X X X Resetting USB bus 0x59h O O x x Reserved for USB devices ATA ATAPI SATA OxSAh x O x O O x O x Resetting SATA bus and all devices 0x5Bh x O x O O x O O Detecting the presence of ATA device 0x5Ch x O x O O O xX x Enable SMART if supported by ATA device 0x5Dh x O X o O O X 0 Reserved for ATA SMBUS Ox5Eh X O X O O 0 O X Resetting SMBUS 0x5Fh X O X O O o 0 O Reserved for SMBUS Local Console 0x70h X O O O X X X X Resetting the video controller VGA 0x71h X O O O X X X O Disabling the video controller VGA 0x72h X O O O X X O X Enabling the video controller VGA Remote Console 0x78h X O O 0 O X X X Resetting the console controller 0x79h X O O O O X X O Disabling the console controller 0x7Ah X O O O O X O X Enabling the console controller Keyboard only USB 0x90h O X X O X X X X Resetting the keyboard 0x91h O X X O X X X O Disabling the keyboard 0x92h O X X O X X O X Detecting the presence of the keyboard 0x93h O X X O X X O O Enabling the keyboard 0x94h O X X O X O X X Clearing keyboard input buffer 0x95h O X X 0 X O X O Reserved for keyboard Mouse only USB 0x98h O x x O x x O x Resetting the mouse 100 Revision 1 0 Intel order number E94847 001 Appendix C POST Code
112. olling power to the server The circuit breaker of a centralized DC power system may be used as a disconnect device when easily accessible and should be rated no more than 10 amps Grounding the server To avoid the potential for an electrical shock hazard you must reliably connect an earth grounding conductor to the server The earth grounding conductor must be a minimum 18AWG connected to the earth ground stud s on the rear of the server The safety ground conductor should be connected to the chassis stud with a Listed closed two hole crimp terminal having 5 8 inch pitch The nuts on the chassis earth ground studs should be installed with a 10 in Ibs torque The safety ground conductor provides proper grounding only for the server You must provide additional proper grounding for the rack and other devices installed in it Overcurrent protection Overcurrent protection circuit breakers must be provided as part of each host equipment rack and must be incorporated in the field wiring between the DC source and the server The branch circuit protection shall be rated minimum 75Vdc 10 A maximum per feed pair If the DC power system for the equipment rack is installed with more than 10 amperes of protection you must provide supplemental protection for the server 90 Revision 1 0 Intel order number E94847 001 Environmental and Regulatory Specification Intel Server System SR1640TH TPS 8 8 Power Cord Usage Guidelines Warning Do not attempt to
113. on Disabled plug and play loading of an IPMI driver Do not enable if your OS does not support this driver System Information View system information Takes the user to the System Information screen BMC Configuration View Configure BMC LAN channel and User settings Takes the user to the BMC configuration screen Information only 2 6 5 5 Server Management System Information Screen The Server Management System Information screen allows the user to view part numbers serial numbers and firmware revisions To access this screen from the Main screen select Server Management gt System Information Server Management System Information Board Part Number Board Serial Number System Part Number System Serial Number Chassis Part Number Chassis Serial Number Asset Tag BMC Firmware Revision HSC Firmware Revision ME Firmware Revision SDR Revision UUID Figure 19 Setup Utility Server Management System Information Screen Display Table 23 Setup Utility Server Management System Information Fields Setup Item Help Text Board Part Number Pe Information only Board Serial Number Po Information only System Part Number Po Information only Information only Chassis Serial Number System Serial Number Press lt Enter gt to edit system Information only Serial Number and then use Backspace to delete existing value Maximum length is 20 characters Revision 1 0 4 Intel order number E94847
114. on s in which the product is sold To help ensure EMC compliance with your local regional rules and regulations before computer integration make sure that the chassis power supply and other modules have passed EMC testing using a server board with a microprocessor from the same family or higher and operating at the same or higher speed as the microprocessor used on this server board The final configuration of your end system product may require additional EMC Revision 1 0 85 Intel order number E94847 001 Intel Server System SR1640TH TPS Environmental and Regulatory Specification compliance testing For more information please contact your local Intel Representative This is an FCC Class A device and its use is intended for a commercial type market place 8 5 Use of Specified Regulated Components To maintain the UL listing and compliance to other regulatory certifications and or declarations the following regulated components must be used and conditions adhered to Interchanging or use of other component will void the UL listing and other product certifications and approvals Updated product information for configurations can be found on the Intel Server Builder Web site at the following URL http serverconfigurator intel com default aspx Please contact your local Intel representative if you do not have access to Intel s Web address Server chassis base chassis is provided with power supply and fans NRTL listed
115. ononcccnccncananononcnoncnnnnnnnnnnnnnnnnos 12 Table 4 Memory Configuration Table ooo 13 Table 5 UDIMM memory configuration rue 14 Table 6 UDIMM Maximum configuratioN oooooooconmnnncnnnccccnenonnnnnnaneccnnnnnn nina ccncn nene 14 Table 7 RDIMM memory configuration rule cecccecccteeeee ee eeee eee ceeeeeeeeeneseneccceesaeeeeeneensetenee 14 Table 8 RDIMM Maximum Confguraton o nn cnnnnnnnnnannnnnnnnnos 15 Table 9 Optional RMM3 Advanced Management Board Features n 19 Pable 10 VASO MOTOS ostia A A E AA A AA AED 19 Table 11 BIOS Setup Page Layout scans rails 26 Table 12 BIOS Setup Keyboard Command Bar coocccocccccccococononononnnonnno nono nono nono crono nino nn n nennen nnee 27 Table 13 Setup Utility Main Screen Fields ooooooooococcnocncoconoconoconccono no nono noo nnnnnnnnnnnonnnonnnrnnnnnnnns 29 Table 14 Setup Utility Advanced Screen Display Fields oooooooooonoonnnoconconocconoconcno nono nonnnnonnnos 30 Table 15 Setup Utility Processor Configuration Screen Fields oooooconnncnoccccnnnnnccccnncancnnnnos 31 Table 16 Setup Utility Memory Configuration Screen Fields oooooooooonncooncconccconoconcno nono nnnonono 33 Table 17 Setup Utility Mass Storage Controller Configuration Screen Fields 34 Table 18 Setup Utility USB Controller Configuration Screen Fields ooonooocccccnnnnnncconanannnnno 35 Table 19 Setup Utility PCI Configuration Scree
116. or External Design Specifications EDS for a given sub system EPS and EDS documents are not publicly available They are only made available under NDA with Intel and must be ordered through your local Intel representative For a complete list of available documents refer to the Reference Documents section at the end of this document The Intel Server System SR1640TH may contain design defects or errors known as errata which may cause the product to deviate from published specifications Refer to the Intel Server System SR1640TH Specification Update for published errata 1 1 Chapter Outline This document is divided into the following chapters Chapter 1 Introduction Chapter 2 Functional Architecture Chapter 3 Power Sub System Chapter 4 Cooling Sub System Chapter 5 Hard Disk Driver Support Chapter 6 Front Panel Control and Indicators Chapter 7 Configuration Jumpers Chapter 8 Environmental and Regulatory Specifications Appendix A Integration and Usage Tips Appendix B Integrated BMC sensor tables Appendix C POST code LED decoders Appendix D POST Code Errors Glossary Reference Documents 1 2 Server Board Use Disclaimer Intel Corporation server boards support add in peripherals and contain a number of high density VLSI and power delivery components that need adequate airflow to cool Intel ensures through its own chassis development and testing that wh
117. or can be restored by the operation of the controls Revision 1 0 63 Intel order number E94847 001 Power Sub System Intel Server System SR1640TH TPS 3 4 5 1 Electrostatic Discharge Susceptibility The power supply complies with the limits defined in EN 55024 1998 using the IEC 61000 4 2 1995 test standard and performance criteria B defined in Annex B of CISPR 24 Tested to meet the level 3 requirement 3 4 5 2 Fast Transient Burst The power supply complies with the limits defined in EN55024 1998 using the IEC 61000 4 5 1995 test standard and performance criteria B defined in Annex B of CISPR 24 Test to meet the level 3 requirement 3 4 5 3 Radiated Immunity The power supply complies with the limits defined in EN55024 1998 using the IEC 61000 4 3 1995 test standard and performance criteria A defined in Annex B of CISPR 24 3 4 5 4 Surge Immunity The power supply was tested with the system for immunity to AC Ringwave and AC Unidirectional wave both up to 2kV per EN 55024 1998 EN 61000 4 4 level 3 1995 and ANSI C62 45 1992 The pass criteria include No unsafe operation is allowed under any condition all power supply output voltage levels to stay within proper spec levels No change in operating state or loss of data during and after the test profile No component damage under any condition The power supply complies with the limits defined in EN55024 1998 using the IEC 61000 4 4 1995 test standard and pe
118. orms based on Intel Architecture Processor Intel VT d Technology enables multiple operating systems and applications to run in dependent partitions A partition behaves like a virtual machine VM and provides isolation and protection across partitions Each partition is allocated its own subset of host physical memory The Intel Virtualization Technology is designed to support multiple software environments sharing the same hardware resources The Intel Virtualization Technology can be enabled or disabled in the BIOS setup The default behavior is disabled Note If the setup options are changed to enable or disable the Virtualization Technology setting in the processor the user must perform an AC power cycle for the changes to take effect 20 Revision 1 0 Intel order number E94847 001 Intel Server System SR1640TH TPS Functional Architecture 2 5 Platform Management The platform management subsystem is based on the Integrated BMC features of the ServerEngines Pilot Il The onboard platform management subsystem consists of communication buses sensors system BIOS and server management firmware The following diagram provides an overview of the Server Management Bus SMBUS architecture used on this server board 2 5 1 Feature Support 2 5 1 1 IPMI 2 0 Features Integrated Baseboard Management Controller Integrated BMC s PMI Watchdog timer Messaging support including command bridging and user session support Ch
119. ough console redirection over various terminal emulation standards This may limit some functionality for compatibility for example color usage or some keys or key sequences or support of pointing devices 2 6 4 1 Setup Page Layout The setup page layout is sectioned into functional areas Each occupies a specific area of the screen and has dedicated functionality The following table lists and describes each functional area Table 11 BIOS Setup Page Layout Functional Area Description Title Bar The title bar is located at the top of the screen and displays the title of the form page the user is currently viewing It may also display navigational information Setup Item List The Setup Item List is a set of controllable and informational items Each item in the list occupies the left column of the screen A Setup Item may also open a new window with more options for that functionality on the board Item Specific Help Area The Item Specific Help area is located on the right side of the screen and contains help text for the highlighted Setup Item Help information may include the meaning and usage of the item allowable values effects of the options and so forth Keyboard Command Bar The Keyboard Command Bar is located at the bottom right of the screen and continuously displays help for keyboard special keys and navigation keys 2 6 4 2 Entering BIOS Setup To enter the BIOS Setup press the F2 function key durin
120. ount a remote IDE or USB CD ROM floppy drive or a USB flash disk as a remote device to the server Once mounted the remote device appears just like a local device to the server allowing system administrators or users to install software including operating systems copy files update the BIOS and so forth or boot the server from this device The following capabilities are supported The operation of remotely mounted devices is independent of the local devices on the server Both remote and local devices are usable in parallel Either IDE CD ROM floppy or USB devices can be mounted as a remote device to the server It is possible to boot all supported operating systems from the remotely mounted device and to boot from disk IMAGE IMG and CD ROM or DVD ROM ISO files Refer to the Tested supported Operating System List for more information It is possible to mount at least two devices concurrently The mounted device is visible to and useable by the managed system s operating system and BIOS in both pre boot and post boot states he mounted device shows up in the BIOS boot order and it is possible to change the BIOS boot order to boot from this remote device It is possible to install an operating system on a bare metal server no operating system present using the remotely mounted device This may also require the use of KVM r to configure the operating system during install If either a virtual IDE or virtual floppy
121. ovides an access point to configure several options On this screen the user selects the option they want to configure Configurations are performed on the selected screen and not directly on the Advanced screen To access this screen from the Main screen press the right arrow until the Advanced screen is chosen Revision 1 0 29 Intel order number E94847 001 Functional Architecture Intel Server System SR1640TH TPS Advanced Security Server Management Boot Options Boot Manager gt Processor Configuration gt Memory Configuration gt Mass Storage Controller Configuration gt Serial Port Configuration gt USB Configuration gt PCI Configuration gt System Acoustic and Performance Configuration Figure 10 Setup Utility Advanced Screen Display Table 14 Setup Utility Advanced Screen Display Fields Help Text Processor Configuration View Configure processor information and settings Memory Configuration View Configure memory information and settings Mass Storage Controller Configuration View Configure mass storage controller information and settings Serial Port Configuration View Configure serial port information and settings USB Configuration View Configure USB information and settings PCI Configuration View Configure PCI information and settings System Acoustic and Performance View Configure system acoustic and Configuration performance information and settings 2 6 5 2 1 Processor
122. pauses to the Error Manager for this type of error where the user can take immediate corrective action or choose to continue booting Halt The message is displayed on the Error Manager screen an error is logged to the SEL and the system cannot boot unless the error is resolved The user needs to replace the faulty part and restart the system The setup POST error Pause setting does not have any effect with this error Table 83 POST Error Message and Handling 0109 attempt to re flash the firmware 0140 0141 0146 0192 0194 0195 0196 0197 0198 019F 5220 5221 5224 8110 8111 8120 8121 8130 8131 8140 8141 8160 8161 8170 102 Revision 1 0 Intel order number E94847 001 Appendix D POST Code Errors Intel Server System SR1640TH TPS Error Code Error Message Response 8171 Processor 02 failed Self Test BIST 8180 Processor 01 BIOS does not support the current stepping for processor 8190 Watchdog timer failed on last boot Pause 84F3 Integrated Baseboard Management Controller in update mode Pause DIMM_B4 Component encountered a Serial Presence Detection SPD fail error DIMM_D4 Component encountered a Serial Presence Detection SPD fail error Occurrence Occurrence Revision 1 0 103 Intel order number E94847 001 Intel Server System SR1640TH TPS Appendix D POST Code Errors Error Code Error Message Response Occurrence Occurrence Occurrence Occurrence Occurrence Occurrence Occurrence
123. pplied to the system and 5V STBY is present the BMC controller on the server board requires 15 20 seconds to initialize During this time the system status LED will be solid on both amber and green Once BMC initialization has completed the status LED will stay green solid on If power button is pressed before BMC initialization completes the system will not boot to POST 6 2 3 System Identification LED The system ID LED provides a visual indication of a system being serviced The state of the system ID LED is affected by the following Toggled by the system ID button Revision 1 0 79 Intel order number E94847 001 Intel Server System SR1640TH TPS Front Panel Control and Indicators Controlled by the Chassis Identify command IPMI Controlled by the Chassis Identify LED command OEM Table 74 System ID LED Indicator States LED State Identify active via button Identify active via command 1 Hz blink Off Off There is no precedence or lock out mechanism for the control sources When a new request arrives all previous requests are terminated For example if the system ID LED is blinking and the system ID button is pressed then the system ID LED changes to solid on If the button is pressed again with no intervening commands the system ID LED turns off 80 Revision 1 0 Intel order number E94847 001 Configuration Jumpers Intel Server System SR1640TH TPS 7 Configuration Jumpers The following chapter prov
124. processor socket CU AE 2 4 3 4 4 Memory Configuration Table Table 4 Memory Configuration Table Channel A Channel B Al A2 B1 B2 RDIMM Xx X X X X X X X X X X X UDIMM Xx Xx Xx Xx Xx Xx Xx Xx Xx Xx Xx Xx Revision 1 0 13 Intel order number E94847 001 Functional Architecture This table defines half of the valid memory configurations You can exchange Channel A DIMMs with the DIMMs on Channel B to get another half Intel Server System SR1640TH TPS 2 4 3 4 5 UDIMM Configuration rules Table 5 UDIMM memory configuration rule DIMM slots per DIMMs populated per Speed Ranks per channel channel channel 2 1 1066 1333 Single Rank Dual Rank 2 2 1066 1333 Single Rank Dual Rank To get the maximum memory size on UDIMM you get the detail information from below table Table 6 UDIMM Maximum configuration Max Memory Possible 1Gb DRAM Technology 2Gb DRAM Technology Single Rank UDIMM 4GB 8GB 4x 1GB DIMMs 4x 2GB DIMMs Dual Rank UDIMMs 8GB 16GB 4x 2GB DIMMs 4x 4GB DIMMs Server boards in Intel Server System SR1640TH have the following limitations on UDIMM Not support 800MHz ECC UDIMMs No support for LV DIMMs 256Mb technology x4 DRAM on UDIMM and quad rank UDIMM are NOT supported x16 DRAM is not supported on combo routing All channels in a system will run at the fastest common freque
125. r number E94847 001 Intel Server System SR1640TH TPS Power Sub System 3 7 1 Power supply management controller PSMC The PSMC device in the power supply shall derive its power of the 5Vsb output on the system side of the O ring device and shall be grounded to return It shall be located at the address set by the AO and A1 pins Refer to the specification posted on www ssiforum org and www pmbus org website for details on the power supply monitoring interface requirements and refer to followed section of supported features The below table reflect the power module addresses complying with the position in the housing PDB position and power module address PM1 BOh PM2 B2h PM3 B4h PM4 B6h 3 7 2 Power supply field replacement unit FRU signals The power supply shall support electronic access of FRU information over an IC bus Four pins at the power supply connector are allocated for this They are named SCL SDA AO A1 SCL is serial clock SDA is serial data These two bidirectional signals forms the basic communication lines over the DC bus AO A1 are input address lines to the power supply The backplane defines the state of these lines such that the address to the power supply is unique within the system The resulting 1 C address shall be per the table below The device used for this shall be powered from a 5V bias voltage derived from the 5 VSB output No pull up resistors shall be on SCL or SDA insi
126. rable lower critical lower non critical uc Ic upper critical lower critical Event Triggers are supported event generating offsets for discrete type sensors The offsets can be found in the Generic Event Reading Type Codes or Sensor Type Codes tables in the IPMI specification depending on whether the sensor event reading type is generic or a sensor specific response Assertion De assertion Enables Assertion and de assertion indicators reveal the type of events the sensor generates As Assertions De De assertion Readable Value Offsets Readable Value indicates the type of value returned for threshold and other non discrete type sensors Readable Offsets indicate the offsets for discrete sensors that are readable with the Get Sensor Reading command Unless otherwise indicated all event triggers are readable Readable Offsets consist of the reading type offsets that do not generate events Event Data Event data is the data that is included in an event message generated by the sensor For threshold based sensors the following abbreviations are used R Reading value TT Threshold value Revision 1 0 Intel order number E94847 001 Intel Server System SR1640TH TPS 95 Intel Server System SR1640TH TPS Appendix B Integrated BMC Sensor Tables Rearm Sensors The rearm is a request for the event status for a sensor to be rechecked and updated upon a transition between good and bad states Rearmi
127. rce update 2 7 3 Board LED Port 80 LED Displays Diagnositc LED This Port 80 LEDs provide on board decoding and display of software debug information The Port 80 interface for the LPC bus is implemented as shown in the table below Table 49 Port 80 81 Display Interface on LPC Bus G TL ms aaa eee eee asas os mme RED aa IS as Teaser 58 Revision 1 0 Intel order number E94847 001 Intel Server System SR1640TH TPS Functional Architecture 0000000 200000 os KN LSB a r a J pe en OS wey L gO Map WE o SCT Node LSB ale fikan E Ls eh eg we e BR Ok mt Samisi ES Sr en POST LED O E 08 mi SE le EC OO Oo e DD E DC Es La h Map JO E Gu N Nodel a e POST LED BH yo Figure 35 Board diagnostic LED locations 2 8 System IO feature Intel Server System SR1640TH has two identical trays in the chassis Each tray contains one 2 node computing board S3420TH inside powered by a single 450W power supply unit The two trays have identical IO ports on front and rear panel The two trays are installed horizontally in the chassis but they are not right left swappable Below picture shows the IO ports on the rear panel Only IO ports on left tray are presented IO ports on right tray are identical to left ones Revision 1 0 59 Intel order number E94847 001 Functional Architecture PSU Tray Left In
128. rder number E94847 001 Intel Server System SR1640TH TPS Functional Architecture Table 19 Setup Utility PCI Configuration Screen Fields Setup Item Help Text Maximize Memory Enabled If enabled the BIOS maximizes usage of memory below 4GB Disabled below 4 GB for OS without PAE by limiting PCIE Extended Configuration Space to 64 buses Memory Mapped UO Enabled Enable or disable memory mapped UO of 64 bit above 4GB Disabled PCI devices to 4 GB or greater address space Onboard NIC1 ROM Enabled If enabled loads the embedded option ROM for Disabled the onboard network controllers Warning If Disabled is selected NIC1 cannot be used to boot or wake the system Onboard NIC2 ROM Enabled If enabled loads the embedded option ROM for Disabled the onboard network controllers Warning If Disabled is selected NIC2 cannot be used to boot or wake the system Onboard NIC iSCSI Enabled If enabled loads the embedded option ROM for This option is grayed out ROM Disabled the onboard network controllers and not accessible if either the NIC1 or NIC2 ROMs Warning If Disabled is selected NIC1 and NIC2 are enabled cannot be used to boot or wake the system Note This option is not available on some models NIC 1 MAC Address No entry Information only 12 hex allowed digits of the MAC address NIC 2 MAC Address No entry Information only 12 hex allowed digits of the MAC address 2 6 5 2 6 System Acoustic and Perfo
129. rformance criteria B defined in Annex B of CISPR 24 3 4 6 AC Line Fast Transient EFT Specification The power supply meets the EN61000 4 5 directive and any additional requirements in 1EC1000 4 5 and the Level 3 requirements for surge withstand capability with the following conditions and exceptions These input transients must not cause any out of regulation conditions such as overshoot and undershoot nor must it cause any nuisance trips of any of the power supply protection circuits The surge withstand test must not produce damage to the power supply The power supply shall meet surge withstand test conditions under maximum and minimum DC output load conditions 3 4 7 AC Line Dropout Holdup An AC line dropout is defined to be when the AC input drops to OVAC at any phase of the AC line for any length of time During an AC dropout the power supply must meet dynamic voltage regulation requirements An AC line dropout of any duration shall not cause tripping of control signals or protection circuits If the AC dropout lasts longer than the holdup time the power supply should recover and meet all turn on requirements The power supply shall meet the AC dropout requirement over rated AC voltages and frequencies A dropout of the AC line for any duration shall not cause damage to the power supply 64 Revision 1 0 Intel order number E94847 001 Intel Server System SR1640TH TPS Power Sub System 3 4 8 AC Line Leakage Current
130. ription Example California CA Lithium Perchlorate insert Special handling may California Code of Regulations Title 22 Division japply See 4 5 Chapter 33 Best Management Practices for dtsc ca gov hazardo Perchlorate Materials uswaste perchlorate his notice is required by California Code of Regulations Title 22 Division 4 5 Chapter Perchlorate Materials his product part includes a battery which contains Perchlorate material China RoHS MII Measure 39 Product marked with the Environmental Friendly o Usage Period EFUP label of 20yrs substance able in Simplified Chinese either placed with the product documentation or separate insert Mark requires to be applied to be retail product fei only Marking applied to bulk packaging and single packages Not applied to internal Cun packaging such as plastics foams etc Revision 1 0 91 Intel order number E94847 001 Intel Server System SR1640TH TPS Environmental and Regulatory Specification Compliance Regional Compliance Reference Marking ne Compliance Reference Description Example Intel Internal All materials parts and subassemblies must not Specification contain restricted materials as defined in Intel s Environmental Product Content Specification of Suppliers and Outsourced Manufacturers http supplier intel com ehs environmental htm None Required Waste Electrical and Electronic Equipment WEEE Directive 2002 96 E
131. rmance Configuration The System Acoustic and Performance Configuration screen allows the user to configure the thermal characteristics of the system To access this screen from the Main screen select Advanced gt System Acoustic and Performance Configuration Advanced System Acoustic and Performance Configuration Set Throttling Mode Auto CLTT OLTT Altitude 300m or less 301m 900m 901m 1500m Higher than 1500m Set Fan Profile Performance Acoustic Figure 16 Setup Utility System Acoustic and Performance Configuration Screen Display Revision 1 0 37 Intel order number E94847 001 Functional Architecture Intel Server System SR1640TH TPS Table 20 Setup Utility System Acoustic and Performance Configuration Screen Fields Setup Item Help Text Set Throttling Auto Auto Throttling mode Note The OLTT Mode CLTT Closed Loop Thermal Throttling Mode option is shown for OLTT Open Loop Thermal Throttling Mode informational purposes only If the user selects OLTT the BIOS overrides that selection if the system can support CLTT OLTT is configured only when UDIMMs without Thermal Sensors are installed Altitude 300m or less 300m or less 980ft or less 301m 900m Optimal performance setting near sea level 901m 1500m 301m 900m 980ft 2950ft Higher than 1500m Optimal performance setting at moderate elevation 901m 1500m 2950ft 4920ft Optimal performance sett
132. rrent type for the 12V The power supply shall latch off The latch will be cleared by togging the PSON signal or by an AC power interruption The power supply shall not be damaged power cycling in this condition Table 64 Over current Protection OCP Voltage Over current limit 110 min 150 max 3 6 2 Over voltage Protection OVP An over voltage condition shall be measured on the 12V output of the power supply DC connector The power supply must shutdown and latch off when the 12V reaches the voltage shown in below table The latch can be cleared by togging the PSON signal or by an AC cycle off Revision 1 0 67 Intel order number E94847 001 Power Sub System Intel Server System SR1640TH TPS Table 65 12V Over Voltage Protection OVP requirement 3 6 3 Over temperature Protection OTP The power supply shall be protected against over temperature conditions caused by loss of fan cooling or excessive ambient temperature In an over temperature condition the PSU shall be shutdown with the exception of the 5VSB output The power supply shall alert the system of the OTP condition via the power supply the fail LED indicator The power supply will auto recover from this condition when the temperature is within specification again In case of a fan fail the power supply will latch off Warning 80 C 6 Critical shut down 90 C 6 Re start PSU 75 C 6 3 6 4 Thermal Fan Speed Control External Control
133. s headers and jumpers on the server board It lists all connector types available on the board and the corresponding reference designators printed on the silkscreen Table 36 Board Connector Matrix Name Ref on MB Connector Type Pin Count RMM3 Lite V internal header J1G1 J7E1 Header 8 Front USB connector J7K1 Connector 24 Front Panel header J8K1 Header 34 SAS 4i connector J9J2 Connector 32 IPMB header J6K1 header 4 System Power connector J9H1 connector 44 Board Identity LED connector J3B1 connector 3 FAN connector J4K1 J6K2 J4K2 connector Power connector to HDD J7K2 connector Revision 1 0 51 Intel order number E94847 001 Functional Architecture J3B1 Node2 DIMM Slot 52 Node2 Rear Connector Nodel Rear Connector Intel Server System SR1640TH TPS aya d H 1 Ze D Hl E Zu Zem tae E Somme ZE D ris bt e E FE oy A 5o mia argo Rann H ZP de E d ZE y 50 EBB ds wooo 3 DR GC el TICE E an a O WE 56 es b D ot 4 gt Ee wan wn Defi Ep J 2 deer FAR teasing npg amuna 33 R TE re bai oo a ERP E Soorm d Dese 2006 D CPRPAPPA poomamm Ki s dipem m SCH 2925 00 oe y CJ D SS A et E 23 o n nl al Omg opge S o o0 o0 G IE Sek E s g 284 z E 73 o ah yg ts CEH J6K2 J6K1 J7K2 J4K1 J4K2 2 A SC BOS CO C
134. s connector is not compatible with the Intel Remote Management Module 3 Intel RMM3 or Intel Remote Management Module 3 Lite Intel RMM3 Lite Table 38 RMM3 Lite V Internal header pin out J1G1 J7E1 Pink gong Png Signal 7 EC CN ELE Ca sree ek DO CN EC 2 7 1 2 2 IPMB Header Table 39 IPMB header pin out J6K1 Ping Signal Pins Signal SMB_IPMB_5VSB_DAT_node1 SMB_IPMB_5VSB_CLK_node1 SMB_IPMB_5VSB_DAT_node2 SMB_IPMB_5VSB_CLK_node2 Revision 1 0 53 Intel order number E94847 001 Functional Architecture Intel Server System SR1640TH TPS 2 7 1 3 Front Control Panel Connector The server board S3420TH provides a 34 pin front panel connector J8K1 The following table provides the pin out for this connector Table 40 Front Control Panel header pin out J8K1 Ping Signal Pas Sga P3V3_AUX P5V_STBY_SYS FP_ID_N_LED_node1 aa ER IDN LED node 8 LED Giatus Green N LED_Status_Green_N_node2 LED Status Amber N LED Status Amber N node LED NICI ACT BUE N LED_NIC1_ACT_BUF_N_node2 17 SMB_SENS_3V3SB_DAT 18 SMB_SENS_3V3SB_DAT_node2 19 SMB_SENS_3V3SB_CLK 20 SMB_SENS_3V3SB_CLK_node2 LED_NIC2_ACT_BUF_N LED_NIC2_ACT_BUF_N_node2 FP_PWR_LED_N FP_PWR_LED_N node2 FP_PWR_BTN_N FP_PWR_BTN_N_node2 RST_FP_BTN_N RST_FP_BTN_N _node2 FP_ID_BTN_N ER ID BTN_N_node2 2 7 1 4 Front Panel USB Connector The server board S3420TH provides a 24 pin front panel USB connector J7K1 The
135. s the Platform ID as S3420TH System BIOS o SOS System BIOS Version Information only Displays the current BIOS version xx major version yy minor version 2zzz build number Build Date Information only Displays the current BIOS build date Memory Size Information only Displays the total physical memory installed in the system in MB or GB The term physical memory indicates the total memory discovered in the form of installed DDR3 DIMMs Quiet Boot Enabled Enabled Display the logo screen Disabled during POST Disabled Display the diagnostic screen during POST POST Error Pause Enabled Enabled Go to the Error If enabled the POST Error Pause Disabled Manager for critical POST errors option takes the system to the error Disabled Attempt to boot and do manager to review the errors when not go to the Error Manager for major errors occur Minor and fatal critical POST errors error displays are not affected by this setting System Date Day of week System Date has configurable MM DD YYYY fields for Month Day and Year Use Enter or Tab key to select the next field Use or key to modify the selected field System Time HH MM SS System Time has configurable fields for Hours Minutes and Seconds Hours are in 24 hour format Use Enter or Tab key to select the next field Use or key to modify the selected field 2 6 5 2 Advanced Screen The Advanced screen pr
136. stem spends in Turbo Boost operation depends on workload operating environment and platform design If the processor supports the Intel Turbo Boost Technology feature the BIOS Setup provides an option to enable or disable this feature The default state is enabled 2 4 2 4 Simultaneous Multithreading SMT Most Intel Xeon processors support Simultaneous Multithreading SMT The BIOS detects processors that support this feature and enables the feature during POST If the processor supports this feature the BIOS Setup provides an option to enable or disable this feature The default is enabled 2 4 2 5 Enhanced Intel SpeedStep Technology Intel Xeon processors support the Geyserville3 feature of the Enhanced Intel SpeedStep technology This feature changes the processor operating ratio and voltage similar to the Thermal Monitor 1 TM1 feature The BIOS implements the Geyserville3 feature in conjunction with the TM1 feature The BIOS enables a combination of TM1 and TM2 according to the processor BIOS writer s guide 2 4 3 Memory Subsystem The Intel Xeon 3400 series processor has an Integrated Memory Controller IMC in its package Each Intel Xeon 3400 series processor produces up to two DDR3 channels of Revision 1 0 9 Intel order number E94847 001 Functional Architecture Intel Server System SR1640TH TPS memory Each DDR3 channel in the IMC supports up to two DDR3 RDIMM UDIMM slots The DDR3 RDIMM frequen
137. system BIOS from flash corruption in the main BIOS and Boot Block This 3 pin jumper is used to reload the BIOS when the image is suspected to be corrupted For instructions on how to recover the BIOS refer to the specific BIOS release notes Table 76 BIOS Recovery Mode Jumper Jumper Position Mode of Operation Note 1 2 Normal 2 3 Recovery 7 3 Clearing the CMOS J1G2 J9J1 This jumper is used to clean the current BIOS settings and reset to factory default Table 77 Clear CMOS Jumper Jumper Position Mode of Operation Note 1 2 Normal 2 3 Reset BIOS Configuration 82 Revision 1 0 Intel order number E94847 001 Configuration Jumpers Intel Server System SR1640TH TPS Steps for clearing the CMOS Power down server Pull out the tray and PSU Connect tray and PSU outside chassis Plug in the power cord to PSU Move the jumper J1B4 from the default operating position covering pins 1 and 2 to the reset clear position covering pins 2 and 3 Wait five seconds Remove AC power Move the jumper back to default position covering pins 1 and 2 Close the server chassis Power up the server The CMOS settings are now cleared E ae COND Note Removing AC Power before performing the CMOS Clear operation causes the system to automatically power up and immediately power down after the procedure is followed and AC power is re applied If this happens remove the AC power
138. t IPMI User Management Limited access based on IPMI user privilege The web server is available on all enabled LAN channels See Appendix B for Integrated BMC core sensors 2 5 3 Management Engine ME Intel Management Engine is tied to essential platform functionality This Management Engine firmware includes the following applications Platform Clocks Tune PCH clock silicon to the parameters of a specific board configure clocks at run time power management clocks Thermal Report ME FW reports thermal and power information available only on PECI to host accessible registers Embedded Controller via SMBus 2 5 4 SMBIOS 2 5 4 1 Data Storage BIOS retrieve the SMBIOS data from flash during POST and it builds the SMBIOS type 1 2 3 into SMBIOS table and then transfers the control to operating system Operating system and system management software can use the SMBIOS table for system management purpose 2 5 5 Event log and Viewer 2 5 5 1 Event Log Viewer in Setup On Intel Server System SR1640TH there is a dedicated utility to view the event log There is one page in BIOS setup for event log viewer It is located in Error Manager Page 24 Revision 1 0 Intel order number E94847 001 Intel Server System SR1640TH TPS Error Manager Event Info M BIT MEM ECC Error CPUO Ch 0 Dimm0 S BIT MEM ECC Error CPUO Ch 0 Dimm0 PCIE UNCOR ERR Bus Dev IC Fun0 Functional Architecture Time 10 15 09 15 12 23
139. t was pressed without affecting any existing values 2 6 4 4 Menu Selection Bar The Menu Selection Bar is located at the top of the BIOS Setup Utility screen It displays the major menu selections available to the user By using the left and right arrow keys the user Revision 1 0 27 Intel order number E94847 001 Functional Architecture Intel Server System SR1640TH TPS can select the menus listed here Some menus are hidden and become available by scrolling off the left or right of the current selections 2 6 5 Server Platform Setup Utility Screens The following sections describe the screens available for the configuration of a server platform In these sections tables are used to describe the contents of each screen These tables follow the following guidelines e The Setup Item Options and Help Text columns in the tables document the text and values displayed on the BIOS Setup screens e Inthe Options column the default values display in bold These values are not displayed in bold on the BIOS Setup screen the bold text in this document serves as a reference point e The Comments column provides additional information where it may be helpful This information does not display on the BIOS Setup screens e Information enclosed in angular brackets lt gt in the screen shots identifies text that can vary depending on the option s installed For example lt Current Date gt is replaced by
140. t connector definition eee 61 Output signal definition scx eeben nde et ege dde id 62 POWSIS UPDIyETICIS GY EE 62 FAN Power OSS iine aa aaa 62 Rated output power for each input voltage range ooccccccccnnccnncnnncnnnncnnnnnnnenonenonininens 62 Maximum input Current c cceceseceeeeeeeeeeeeeeeeeeeeeeeeeeeeeeseeaeeeeeesseesseeseeeeeeeseeeseeeees 63 AC Line Sag Transient Performance ccccccceecseecnceeeeeeseeedseeneeeeeeeteeeeeeeeeeneneeeenevensee 63 AC Line Surge Transient Performance cccceeeeeeeeeedeeeeceeeeeeeeeeeeeeeeeeeeeeeeeeeneee 63 Performance Criteria oooooooooooncconcconoconcnnonnnnnnnnnnnononononnnnnnnnnnnnnnnnnnnnn nan nnn nn nnmnnn nnne 63 Mo sek sas eae as aie iat cer S Ded wre aise alot nai bo eo tT dah elt ite goal hares waa anal aoa eh tend 65 Output voltage regla ci ti a 66 RIPple ANA MOSCA A dada cid 66 Transient loading sorsien e aa A a aa a AENA EA aaaea 66 Capacitive load WE 67 Over current Protection OCP isis 67 12V Over Voltage Protection OVP requirement eee ceeeeeeeeeeeeeeeteeneteeeeeeeees 68 Ran Rei ge EE 68 Power SUPDIY status ek cnica iia dae 69 FRU device information ccocccccccnnccnnncnnnnnnncnnnononnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnos 70 Product INTOrMatlOn EE 71 Front Control Button Function ssesesesssessrersrrrrerrrerrretrrtrrtttertrertrerttrrttertenerennrenereet 77 Front LED Indicator Functions sssseseeesess
141. tel Server System SR1640TH TPS PSU Tray Right AC Power Receptacle F Node1 RMM3 Lite V management port Node 2 RMM3 Lite management port G Node 1 USB ports Node 2 USB ports H Node 1 NIC1 lower and NIC2 upper connectors Node 2 NIC1 lower and NIC2 upper connectors Node 1 Video connector Node 2 Video connector J Tray Identification LED Figure 36 Back Panel Feature Overview left tray Important Note The Intel Server System SR1640TH requires the use of shielded LAN cable to comply with Emission Immunity regulatory requirements Use of non shield cables may result in product non compliance 2 9 Rack and Cabinet Mounting Options The Intel Server System SR1640TH is designed to support 19 inches wide by up to 30 inches deep server cabinets The system is shipped with customized fix mount kit to support installation in standard ElA 310 D racks 60 Revision 1 0 Intel order number E94847 001 Intel Server System SR1640TH TPS Power Sub System 3 Power Sub System The system includes two 450 W power supply units which are 80 plus energy efficiency demonstrating climate saver with silver rating 3 1 Mechanism overview The casing dimension is W 50 5 mm x L 300 mm x H 40 2 mm This mechanism shall withstand the specified mechanical shock and vibration requirements Figure 37 Power Supply Mechanical Drawing 3 2 Output connec
142. the PCI Express architecture and provides a single port implementation in a relatively small area so it can be used for server and client configurations as a LAN on Motherboard LOM design External interfaces provided on the 82574 PCle Rev 2 0 2 5 GHz x1 MDI Copper standard IEEE 802 3 Ethernet interface for 1000BASE T 100BASETX and 10BASE T applications 802 3 802 3u and 802 3ab NC SI or SMBus connection to a Manageability Controller MC EEE 1149 1 JTAG note that BSDL testing is NOT supported 2 4 8 2 Dedicated 10 100Mbps management port The KSZ8041NL network PHY is connected to BMC through RMMII interface as dedicated management port This port can only work with Intel RMM3 Lite V module installed 2 4 8 3 MAC Address Definition Each computing node in Intel Server System SR1640HT has the following four MAC addresses assigned to it at the Intel factory NIC 1 MAC address NIC 2 MAC address Assigned the NIC 1 MAC address 1 Integrated BMC LAN Channel MAC address Assigned the NIC 1 MAC address 2 e Intel Remote Management Module 3 Intel RMM3 Lite V MAC address Assigned the NIC 1 MAC address 3 2 4 9 Intel Virtualization Technology for Directed I O Intel VT d The Intel 3420 PCH provides hardware support for implementation of Intel Virtualization Technology with Directed I O Intel VT d Intel VT d Technology consists of technology components that support the virtualization of platf
143. the actual current date e Information enclosed in square brackets in the tables identifies areas where the user must type in text instead of selecting from a provided option e Whenever information is changed except Date and Time the system requires a save and reboot to take place Pressing lt ESC gt discards the changes and boots the system according to the boot order set from the last boot 2 6 5 1 Main Screen The Main screen is the first screen displayed when the BIOS Setup is entered unless an error occurred If an error occurred the Error Manager screen displays instead Advanced Security Server Management Boot Options Boot Manager Logged in as lt Administrator or User gt Platform ID lt Platform Identification String System BIOS Version SXXXX 86B XX yy ZZZZ Build Date lt MM DD YYYY gt Memory Total Memo lt How much memory is installed ry y Quiet Boot Enabled Disabled POST Error Pause Enabled Disabled System Date lt Current Date gt System Time lt Current Time gt Figure 9 Setup Utility Main Screen Display 28 Revision 1 0 Intel order number E94847 001 Intel Server System SR1640TH TPS Functional Architecture Table 13 Setup Utility Main Screen Fields Setup Item Help Text Logged in as Information only Displays password level that setup is running in Administrator or User With no passwords set Administrator is the default mode Platform ID Information only Display
144. tors The power supply unit provides a cable free with connectors to the system board each You can find the connectors explained in the following table and connectors pin definitions in the power supply specification The DC output connector is compliant with FCl 51731 042LF or equivalent Table 50 Output connector definition tf E P oo D 0 CH KH CH KE CH YAA za a gt D 0O 0o00 o ON L FAIL A KILL A A 5VSB mM y Revision 1 0 61 Intel order number E94847 001 Power Sub System Intel Server System SR1640TH TPS Note Signals that can be defined as low true or high true use the following convention Signal low true Table 51 Output signal definition Signal Description Signal Description 12VLS 12V load share bus PWOK Power OK output 5 VSB 5V standby output 12 VRS 12V remote sense F PS Supply fast shutdown I2C PSON Power enable input KILL JA1 address bt B P FAIL B P fail input SCL 12C clock signal AO DC address bit 0 SDA DC data signal 15VCC B P VCC 3 3 Efficiency The Efficiency should meet at least Climate Saver 2 80Plus Silver rating specified in below table The efficiency should be measured at 230VAC and with external fan power source at specified loading according to Climate Saver 80Plus efficiency measurement specifications Table 52 Po
145. ulate the air flow and air pressure needed to maintain the system s thermals when operating at or below the maximum specified thermal limits In order to maintain the necessary airflow within the system you must properly install the air duct in each tray The chassis uses a variable fan speed control engine to provide adequate cooling for the system at various ambient temperature conditions under various server workloads and with the least amount of acoustic noise possible The fans operate at the lowest speed for any given condition to minimize acoustics Note The server system does not support redundant cooling fans If any of the fans fail you must power down the system as soon as possible to replace the fan 4 1 CPU Heatsink Four heatsinks are included in the system package These heatsinks are designed for optimal cooling and performance Each processor is cooled by a passive heatsink To achieve better cooling performance you must properly attach the heatsink bottom base with TIM thermal interface material ShinEtsu G 751 or 7783D or Honeywell PCM45F TIM is recommended The mechanical performance of the heatsink must satisfy mechanical requirement of Intel Xeon processors To keep chipsets and VR temperature at or below maximum temperature limit the heatsink is required if necessary Figure 39 CPU Heatsink Overview Note The passive heatsink is the third part thermal solution for 1U rack chassis 72 Re
146. ut These conditions are defined as the AC line voltage dropping below nominal voltage conditions Surge refers to conditions when the AC line voltage rises above nominal voltage The power supply meets the requirements under the following AC line sag and surge conditions Table 56 AC Line Sag Transient Performance AC Line Sag Operating AC Voltage Nominal AC Voltage 50 60 Hz No loss of function or performance ranges Oto 1 AC 100 Nominal AC Voltage 60 Hz Loss of function acceptable self cycle ranges recoverable gt 1 AC cycle Nominal AC Voltage 50 60 Hz Loss of function acceptable self ranges recoverable 0 to 1 2 AC 30 Mid point of Nominal AC 50 60 Hz Loss of function acceptable self cycle Voltage recoverable Table 57 AC Line Surge Transient Performance AC Line Surge Operating AC Voltage Performance Criteria Continuous EH Nominal AC Ge E eevee Hz No loss of function or GEES 0 to ZAC GE E point of nominal AC al Hz E loss of function or performance cycle Voltages 3 4 5 Susceptibility Requirements The power supply meets the following electrical immunity requirements Table 58 Performance Criteria Level Description A The apparatus shall continue to operate as intended No degradation of performance B The apparatus shall continue to operate as intended No degradation of performance beyond spec limits C Temporary loss of function is allowed provided the function is self recoverable
147. valent typ som rekommenderas av apparattillverkaren Kassera anvant batteri enligt fabrikantens instruktion A VAROITUS Paristo voi rajahtaa jos se on virheellisesti asennettu Vaihda paristo ainoastaan laitevalmistajan suosittelemaan tyyppiin Havita kaytetty paristo valmistajan ohjeiden mukaisesti 8 4 Product Regulatory Compliance The server chassis product when correctly integrated per this guide complies with the following safety and electromagnetic compatibility EMC regulations Intended Application This product was evaluated as Information Technology Equipment ITE which may be installed in offices schools computer rooms and similar commercial type locations The suitability of this product for other product categories and environments such as medical industrial telecommunications NEBS residential alarm systems test equipment etc other than an ITE application may require further evaluation Notifications to Users on Product Regulatory Compliance and Maintaining Compliance To ensure regulatory compliance you must adhere to the assembly instructions in this guide to ensure and maintain compliance with existing product certifications and approvals Use only the described regulated components specified in this guide Use of other products components will void the UL listing and other regulatory approvals of the product and will most likely result in noncompliance with product regulations in the regi
148. vision 1 0 Intel order number E94847 001 Intel Server System SR1640TH TPS Cooling Sub System 4 2 Three Fan Module The system tray includes a fan assembly consisting of three managed 40x40x48 mm dual rotor multi speed fans Three fans are using the same 8 pin fan connectors They provide the primary cooling for the processors memory and the hard drive bays on the front panel Each fan is designed for tool less insertion to or removal from the fan module housing The system fan module is designed for ease of use and supports several management features that the server board management system can use Note The fans are NOT hot swappable You must turn off the system to replace a failed fan Each fan within the module is capable of supporting multiple speeds Fan speed changes automatically when internal ambient temperature of the system or processor temperature changes The fan speed control algorithm is programmed into the server board s BIOS Each fan connector within the module supplies a tachometer signal that allows the BMC to monitor the status of each fan If one of the fans should fail the system fault LED on front panel will light Note There is a spare fan kit that contains six system cooling fans The fan connector pin out definition is in chapter 2 7 1 7 4 3 Power Supply Fan Each power supply module supports one non redundant 40 mm fan The fans control the cooling of the power supply and some drive bays These f
149. wer Supply Efficiency Input 20 of maximum 50 of maximum 100 of maximum 230 VAC gt 85 gt 89 gt 85 Table 53 FAN power loss Input230VAC LOAD 100 FAN POWER LOSS The minimum efficiency at 100 264VAC for the Max load shall be at least 83 3 4 AC Input Voltage Specification 3 4 1 Input voltage and frequency The power supply can auto sense the input voltage and operate in the range between 90VAC to 264VAC It shall be capable of supplying the rated power as specified in Table 1 in the voltage range of 9OVAC to 264VAC Table 54 Rated output power for each input voltage range Input voltage range Nominal voltage 90 132 VAC 115 VAC 450 Watts 180 264 VAC 230 VAC 450 Watts The power supply shall operate at any input frequency between 47 Hz and 63 Hz 62 Revision 1 0 Intel order number E94847 001 Intel Server System SR1640TH TPS Power Sub System 3 4 2 Input current The maximum input current shall be 15A for each input voltage range as in below table Table 55 Maximum input current Input voltage Input current 100 132 VAC 450 Watts 180 264 VAC 450 Watts 3 4 3 Input current harmonics The input current drawn on the power line shall not exceed the limits set by IEC 61000 3 2 and JEIDA MIT1 standards 3 4 4 AC Line Transient Specification AC line transient conditions are defined as sag and surge conditions Sag conditions are also commonly referred to as a brown o
150. which they belong For example DIMM_A1 is the first slot on channel A 2 4 3 4 3 Memory Upgrade Rules Upgrading the system memory requires careful positioning of the DDR3 DIMMs based on the following factors Existing DDR3 DIMM population DDR3 DIMM characteristics Optimization techniques used by the Intel Xeon 3400 processor to maximize memory bandwidth In the Independent Channel mode all DDR3 channels operate independently Slot to slot DIMM matching is not required across channels for example A1 and B1 do not have to match each other in terms of size organization and timing DIMMs within a channel do not have to match in terms of size and organization but they operate in the minimal common frequency Also Independent Channel mode can be used to support single DIMM configuration in channel A and in the Single Channel mode You must observe the following general rules when selecting and configuring memory to obtain the best performance from the system DDR3 RDIMMs must always be populated using a fill farthest method DDR3 UDIMMs must always be populated on DIMM A1 A2 B1 B2 Intel Xeon 3400 Series Processors support either RDIMMs or UDIMMs RDIMM and UDIMM CANNOT be mixed The minimal memory set is DIMMA1 6 DDR3 DIMMs on adjacent slots on the same channel do not need to be identical Intel Server Systems SR1640TH that use the Intel 3420 chipset support two slots per DDR3 channel two DDR3 channels per
151. work Device BEV Boot Entry Vector Device EFI Shell and EFI Boot paths oe ee Pes 2 6 5 7 1 Add New Boot Option Screen The Add New Boot Option screen allows the user to add boot option to the boot order To access this screen from the Main screen select Boot Options gt Add New Boot Options Boot Options Add New Boot Option Add boot option label Select Filesystem lt Available File systems gt Path for boot option Save Figure 22 Setup Utility Add New Boot Options Screen Display Revision 1 0 Intel order number E94847 001 45 Functional Architecture Intel Server System SR1640TH TPS Table 26 Setup Utility Add New Boot Options Screen Fields Setup Item Help Text Add boot option label Create the label for the new boot option Select Filesystem Select one from list Select one filesystem from the list provided Path for boot option Enter the path to boot option in the format path filename efi 2 6 5 7 2 Delete Boot Option Screen The Delete Boot Option screen allows the user to remove an EFI boot option from the boot order To access this screen from the Main screen select Boot Options gt Delete Boot Options Boot Options Delete Boot Option Delete Boot Option Select one to Delete Internal EFI Shell Figure 23 Setup Utility Delete Boot Option Screen Display Table 27 Setup Utility Delete Boot Option Fields Help Text Delete Boot Option Select one to Delete Remove
152. yboard video and mouse redirection over LAN USB Media Redirection Remote USB media access over LAN WS MAN Full SMASH profiles for WS MAN based consoles 2 4 6 3 Serial Ports The server board S3420TH does not support serial port 2 4 6 4 Floppy Disk Controller The server board does not support a floppy disk controller interface However the system BIOS recognizes USB floppy devices 2 4 6 5 Keyboard and Mouse Support The server board does not support PS 2 interface keyboards and mouse However the system BIOS recognizes USB specification compliant keyboard and mouse 2 4 6 6 Wake up Control The super I O contains functionality that allows various events to power on and power off the system 2 4 7 Video Support The server board includes video controllers for each node in an on board Server Engines Integrated Baseboard Management Controller along with 64 MB of video DDR2 memory 8MB is usable accessible for iBMC video graphic display functions The graphics controller internally has access to larger memory for the internal operation The SVGA subsystem supports a variety of modes up to 1600 x 1200 resolution in 8 16 32 bpp modes under 2D It also supports both CRT and LCD monitors up to a 100 Hz vertical refresh rate The video is accessed using a standard 15 pin VGA connector found on the back edge of the server board The on board video controller can be disabled using the BIOS Setup utility or when an add in video card is

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