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Transcend TS16MED3260V memory module
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1. Transcend Information Inc 64 72 PIN EDO TS1 6M ED3260V DRAM SIMM With 16Mx4 3 3VOLT Pinouts Transcend Information Inc 64 72 PIN EDO TS1 6M ED3260V DRAM SIMM With 16Mx4 3 3VOLT TS16MED3260V Block Diagram 0 11 DQ0 DQ31 RASO IWE RAS2 This technical information is based on industry standard data and tests believed to be reliable However Transcend makes no warranties either expressed or implied as to its accuracy and assumes no liability in connection with the use of this product Transcend reserves the right to make changes in specifications at any time without prior notice Transcend Information Inc 64 72 PIN EDO TS1 6M ED3260V DRAM SIMM With 16Mx4 3 3VOLT ABSOLUTE MAXIMUM RATINGS Vec 1 to 7 0 55 to 125 Power dissipation Short circuit output current los mA Mean time between failure MTBF Note Permanent device damage may occur if ABSOLUTE MAXIMUM RATINGS are exceeded Functional operation should be restricted to the conditions as detailed in the operational sections of this data sheet Exposure to absolute maximum rating conditions for intended periods may affect device reliablilty RECOMMENDED OPERATION CONDITIONS Voltage referenced to Vss TA 0 to 70 symbol Min Typ Max Unt Supply Voltage
2. RENE Access time from CAS precharge te 3 ns 3 dh 51 pd ns ons 9 _ 3 4 MEN 5 71 HER NES NEM _ E 5 ms Transcend Information Inc 64 72 PIN EDO TS1 6M ED3260V DRAM SIMM With 16Mx4 3 3VOLT RAS pulse width Hyper page cycle Eme 60 200 ns L to RAS hold time C B Rrettesh we t ns NOTES 1 An initial pause of 200us is required after power up followed by any 8 RAS only or CAS before RAS refresh cycles before proper device operation is achieved 2 Input voltage levels are ViH ViL and are reference levels for measuring timing of input signals Transition times are measured between Viu min and and are assumed to be 5ns for all inputs 3 Measured with a load equivalent to 2 TTL loads and 100pF 4 Operation within the limit insures that trac max can be met trcp max is specified as a reference point only If tRcp is greater than the specified limit then access time is controlled exclusively by tcac 5 Assumes that 1 6 This parameter defines the time at which the output achieves the open circuit condition and is not referenced to VoL 7 twcs is non restrictive operating parameter It is in
3. 45 so 55 V Ground Input High Voltage Input Low Voltage Note 1 Vcc 2 0V at pulse width lt 20s witch is measured at Vcc 2 2 0V at pulse width lt 20ns witch is measured at Vss Transcend Information Inc 64 72 PIN EDO TS1 6M ED3260V DRAM SIMM With 16Mx4 3 3VOLT DC AND OPERATION CHARACTERISTICS Recommended operationg conditions unless otherwise noted TS16MED3260V 1120 16 1120 880 5 0 4 lcc1 Operation Current RAS CAS Address cycling 2 Standby Current RAS CAS W Vih Icc3 RAS Only Refresh Current CAS Vin RAS cycling tRc min Icc4 Hyper Page Mode Current RAS ViL CAS cycling tec min 5 Standby Current RAS CAS W Vcc 0 2V Icce CAS Before RAS Refresh Current RAS and CAS cycling trc min iL Input Leakage Current Any input 0 Vcc 0 5V all other pins not under test 0 V Output Leakage Current Data Out is disabled OV X Vour Vcc Output High Voltage Level 5mA Output Low Voltage Level lo 4 2mA Note lcc1 Icc4 and are dependent on output loading and cycle rates Specified values are obtained with the output open specified as an average current In and address be changed maximum once while RAS Vi In lcc4 address be changed maximum once while RAS Vu In Icc4 address can b
4. L Transcend Information Inc 64 72 PIN EDO TS1 6M ED3260V DRAM SIMM With 16Mx4 3 3VOLT HIDDEN REFRESH CYCLE WRITE NOTE Dour OPEN RAS ViH VIL Vi CAS VI V Ww ViH ViL VIH Da VIL Don t care Undefined Transcen d Information Inc 64 72 PIN EDO TS1 6M ED3260V DRAM SIMM With 16Mx4 3 3VOLT CAS BEFORE RAS REFRESH COUNTER TEST CYCLE a ay ae 4 gd UME porte RCH ves tREZ DATA OUT E m i cx MC tps to VIH Don t care a Undefined Transcend Information Inc 64 72 PIN EDO TS1 6M ED3260V DRAM SIMM With 16Mx4 3 3VOLT CAS BEFORE RAS SELF REFRESH CYCLE NOTE A Don t care MN mt san RAS T twrs tH ut tcez DQ 3 b OPEN ES c c Transcen d Information Inc
5. TS16MED3260V Description The TS16MED3260V is a 16M by 32 bit dynamic RAM module with 8pcs of 16Mx4 DRAMs assembled on the printed circuit board The TS16MED3260V is optimized for application to systems which require high density and large capacity along with compact sizing Features e 16 777 216 word by 32 bit organization e Fast Page Mode with Extended Data Out e Single 3 3V 10 power supply 4 096 cycles refresh e Lower power consumption e CAS before RAS refresh RAS only refresh Hidden refresh Fast Page Mode with EDO Read Modify Write capability TS16MED3260V tRAC tCAC Random read write cycle tome Hyper page mode cycle time 25ns tHPC PRESENCE DETECT PINS Optional Transcend Information Inc 64MB 72 PIN EDO DRAM SIMM With 16Mx4 3 3VOLT Dimensions Side Millimeters Inches A 107 95 0 40 4 250 0 016 B 101 19 3 984 C 44 45 1 750 D 6 35 0 250 E 2 03 0 080 F 6 35 0 250 G 29 20 0 20 1 150 0 008 H 10 16 0 400 6 35 0 250 J 1 27 0 10 0 050 x 0 004 Refer Placement Pin Identification Symbol Function 0 11 System Address inputs DO D31 Common data inputs outputs RASO RAS2 System Row address strobes CAS0 CAS3 System column address strobes ANE System Write enable Vss Ground VDD 5 voltage power supply NC No Connection PD1 PD4 Presence detection pin Refer Block Diagram 64 72 PIN EDO DRAM SIMM With 16Mx4 3 3VOLT TS16MED3260V Placement
6. cluded in the data sheet as electrical characteristics only If twcs twcs min the cycle is an early write cycle and the data out pin will remain high impedance for the duration of the cycle 8 Either tRcH or tRRH must be satisfied for a read cycle 9 These parameters are referenced to the CAS leading edge in early write cycle 10 Operation within the tRAbD max limit insures that trac max can be met tRAp max is specified as reference point only If tRAp is greater than the specified trap max limit then access time is controlled by taa Transcend Information Inc 64 72 PIN EDO TS1 6M ED3260V DRAM SIMM With 16Mx4 3 3VOLT hk tRAD 4 tRAL c BEES H EN CE 2 DATA OUT o own Don t care Undefined Transcend Information Inc 64 72 PIN EDO TS1 6M ED3260V DRAM SIMM With 16Mx4 3 3VOLT WRITE CYCLE EARLY WRITE NOTE Dour OPEN Don t care Undefined Transcend Information Inc 64 72 PIN EDO TS1 6M ED3260V DRAM SIMM With 16Mx4 3 3VOLT HYPER PAGE READ CYCLE un lt p am ASH VIH VIL Oo gt tnEz 1 tase tasc tcan asc tasc tcaH
7. e changed maximum once within one EDO mode cycle time tec Transcend Information Inc 64 72 PIN EDO TS1 6M ED3260V DRAM SIMM With 16Mx4 3 3VOLT CAPACITANCE TA 25 C Vcc 3 3V f 1MHz Input capacitance 0 11 Input capacitance WE Input capacitance RASO RAS2 Input capacitance CASO CAS3 Data input output capacitance 00 031 Transcend Information Inc 64 72 PIN EDO TS1 6M ED3260V DRAM SIMM With 16Mx4 3 3VOLT AC CHARACTERISTICS 0 C TAx70 C 3 3 10 See notes 1 2 Test condition Vih Vil 2 2 0 7V Voh Vol 2 0 0 8V output loading CL 100pF symbol Mim Mex Unt ICAS hold time p CAS pulse width 10K RAS to ICAS delay time RAS to column address delay time CAS to RAS precharge time Row address set up time Row address hold time Column address set up time 0 10 0 3 Read command hold referenced to CAS NN Lr Column adaress to RAS lead time 30 Read command hold referenced o RAS 0 Read command set up time pons MEE MES ns 8 Write command pulsewidth we 10 _ 4 Write command to RAS lead ime tem 15 __ ns BEES i Datesetuptime 410 oig os Refreshperiod ter Write command set uptime ws 0 IRAS to CAS prechargetime tmo 5
8. tase 7 tcAH RE 2 ees CUN o LUMRR COLUMN iA fRRH tRcs k tRCH ww _ t 522 cT IL 22202005 Soc tCACP gt Eu heij ue 2 9 MY t M VoL DATA OUT DATA OUT DATA OUTJ DATA OUT tcuz Don t care Undefined Transcend Information Inc 12 64 72 PIN EDO TS1 6M ED3260V DRAM SIMM With 16Mx4 3 3VOLT HYPER PAGE WRITE CYCLE EARLY WRITE NOTE DOUT OPEN tRAsP Ecl uu cs RO tran tcsH tasc VH 2 ROW COLUMN VIL we CX bec twcs E VIL tew tcw hi VIH VALID gt y Don t care E Undefined Transcend Information Inc 13 64 72 PIN EDO TS1 6M ED3260V DRAM SIMM With 16Mx4 3 3VOLT RAS ONLY REFRESH CYCLE NOTE W OE Din Don t care Dour OPEN CAS BEFORE RAS REFRESH CYCLE NOTE OE Don t care Transcend Information Inc 64 72 PIN EDO TS1 6M ED3260V DRAM SIMM With 16Mx4 3 3VOLT HIDDEN REFRESH CYCLE READ US E Bd x ES aa ax teiz Rac 2 O
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