Kingston Technology HyperX 8GB DDR3 1333MHz Kit
Contents
1. 7 8us at lower then TCASE 85 C 3 9us at 85 C lt TCASE 95 C Asynchronous Reset PCB Height 1 180 30 00mm double sided component KARAKRBRK KRRKRKEKEKEEEEB PERFORMANCE CL IDD 9 cvcles Row Cvcle Time tRCmin 49 5ns min Refresh to Active Refresh Command Time tRFCmin 110ns Row Active Time tRASmin 36ns min Power 1 800 W operating per module UL Rating 94V 0 Operating Temperature 0 C to 85 C KRARKRKREEIE Storage Temperature 55 C to 100 C Document No 4805342 001 A00 10 07 09 Page 1 ValueRAM MODULE DIMENSIONS its milli 133 35 30 00 Units millimeters 18 80 15 80 11 00 8 00 0 00 KOAALAD TATA aaa A 0 00 o a st b w Heat Sink Assembly Document No 4805342 001 A00 Page 22. Memory Module Specification KHX1333C7D3K4 8GX 8GB 2GB 256M x 64 Bit x 4 pcs DDR3 1333MHz CL7 240 Pin DIMM Kit Core inside DESCRIPTION Kingston s KHX1333C7D3K4 8GX is a kit of four 256M x 64 bit 2GB 2048MB DDR3 1333MHz CL7 SDRAM Synchronous DRAM memory modules based on sixteen 128M x 8 bit DDR3 FBGA components per module Each module kit supports Intel XMP Extreme Memory Profiles Total kit capacity is 8GB Each module pair has been tested to run at DDR3 1333MHz at a low latency timing of 7 7 7 20 at 1 65V The SPDs are programmed to JEDEC standard latency DDR3 1333MHz timing of 9 9 9 at 1 5V Each 240 pin DIMM uses gold contact fingers and requires 1 5V The JEDEC standard electrical and mechanical specifications are as follows FEATURES JEDEC standard 1 5V 0 075V Power Supply VDDQ 1 5V 0 075V 667MHz fCK for 1333Mb sec pin 8 independent internal bank Programmable CAS Latency 5 6 7 8 9 10 Posted CAS Programmable Additive Latency 0 CL 2 or CL 1 clock Programmable CAS Write Latency CWL 7 DDR3 1333 8 bit pre fetch Burst Length 8 Interleave without any limit sequential with starting address 000 only 4 with tCCD 4 which does not allow seamless read or write either on the fly using A12 or MRS Bi directional Differential Data Strobe Internal self calibration Internal self calibration through ZQ pin RZQ 240 ohm 1 On Die Termination using ODT pin Average Refresh Period
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