Intel AXXRPCM3 memory module
Contents
1. On die termination ODT 2K page size for x16 VDD VDDQ 1 8 V 0 1 V 7 8 us maximum average periodic refresh interval Serial presence detect SPD SSTL18 compatible inputs and outputs One external bank Four internal memory banks Pure power and ground planes Gold PCB connector The battery pack is rated at a nominal voltage of 3 7 V with a typical capacity of 1850 mAH Revision 1 1 3 Intel order number E20184 002 Intel RAID Portable Cache Module AXXRPCM3 Technical Product Specification Hardware 2 1 Electrical and Mechanical Details Table 1 Electrical and Mechanical Details Operating temperature 10 to 45 degrees Celsius the maximum dry bulb temperature shall be derated by 3 3 C per 1000 m above 500 m Operating humidity 2096 to 8096 non condensing Storage temperature Greater than 90 days at 0 to 30 degrees Celsius 30 to 90 days at 0 to 40 degrees Celsius Less than 30 days at 0 to 50 degrees Celsius 2096 to 8096 non condensing Battery charge time Typical 6 hours to charge from 3 6 V OCV to 4 2 V OCV MD Worst case 8 hours if pack is completely depleted of charge Date retention times 72 hours for 256 MB standard cache using 256 Mbit x 16 DDR2 MTBF Electrical Components 1 187 012 hours at 40 degrees Celsius 4 Revision 1 1 Intel order number E20184 002 Hardware Intel RAID Portable Cache Module AXXRPCM3 Technical Product Specification 2 2 Functional Block Diagram Int2. n VS DQ54 DQ55 VS DQ60 DQ61 VSS DM7 Zz O lt n S DQ62 DQ63 VSS SDA SCL VDDSPD Hardware Revision 1 1 Hardware Pin CK CK ODT 1 0 S 1 0 CKE AO A13 BAO BA1 Type Input Input Input Input Input Input Intel RAID Portable Cache Module AXXRPCM3 Technical Product Specification Table 3 Pin Descriptions Function Clock CK and CK are differential system clock inputs All address and control inputs are sampled on the crossing of the positive edge of CK and negative edge of CK Output read data is referenced to the crossing of CK and CK both direction of crossing On Die Termination ODT registered HIGH enables termination resistance internal to the DDR2 SDRAM When enabled ODT is applied to each DQ DQS DQS and DM signal for x4 and DQ DQS DQS RDQS RDQS and DM for x8 configurations For x16 configuration ODT is applied to each DQ UDQS UDQS LDQS LDQS UDM and LDM signal The ODT pin will be ignored if the EMRS 1 is programmed to disable ODT Chip Select Enables the associated SDRAM command decoder when low and disables decoder when high When decoder is disabled new commands are ignored and previous operations continue These input signals also disable all outputs except CKE and ODT of the register s on the DIMM when both inputs are high When both S 0 1 are high all register outputs except CKE ODT and Chip select remain in the previous state C
3. 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 Symbol DQ32 DQ33 VSS DQS4 DQS4 VSS DQ34 DQ35 VSS DQ40 DQ41 VSS DQS5 DQS5 VSS DQ42 DQ43 VSS DQ48 DQ49 VSS SA2 NC VSS DQS6 DQS6 VSS DQ50 DQ51 VSS DQ56 DQ57 VSS DQS7 DQS7 VSS DQ58 DQ59 VSS SAO SA1 Pindt 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 fare 72 173 174 175 176 77 11 178 179 180 181 182 183 Symbol DQ15 vss DQ20 DQ vss DM2 INC VSS DQ22 DQ23 vss DQ28 DQ29 vss DM3 NC vss DQ30 DQ31 VSS CB4 CB5 vss DM8 NC vss CB6 CB7 vss INC VDDQ CKET VDD INC INC VDDQ A12 A9 VDD A8 A6 Intel order number E20184 002 Pin 204 205 206 207 208 209 210 211 212 213 214 215 216 217 218 219 220 221 222 223 224 225 226 227 228 229 230 231 232 233 234 235 236 237 238 239 240 241 242 243 244 Symbol DQ37 lt n CD M Zz O RK VSS DQ38 DQ39 lt n n DQ44 DQ45 VSS DM NC VSS DQ46 DQ47 VSS DQ52 DQ53 VS RFU RFU VSS DM6 TH Zz O
4. Relearn pending Battery is under charge Relearn postponed Relearn will start in four days Relearn will start in two days Relearn will start in one day Relearn will start in five hours Revision 1 1 11 Intel order number E20184 002 Intel RAID Portable Cache Module AXXRPCM3 Technical Product Specification Intel RAID Smart Battery Software 4 Intel RAID Smart Battery Software 4 1 Intel RAID BIOS Console 2 The system BIOS loads the RAID option ROM that is resident on the RAID controller flash This utility is initiated by pressing lt Ctrl gt lt G gt when prompted during POST Power On Self Test The option ROM checks for the presence of the battery and informs the user if the battery is missing or not fully charged The Intel RAID BIOS Console2 utility can be used to monitor the charge cycle count and voltage levels It will display the number for fast charges and discharges on a battery 4 2 Intel RAID Web Console 2 This is an operating system based utility for the Microsoft Windows and Linux operating systems that are supported by the installed RAID controller This utility can be used to monitor battery status charge level and the number of recharge cycles 43 Intel RAID Command Line Utility 2 This text based utility is available for Microsoft Windows and Linux operating systems It can be use to view battery status and to initiate a relearn 12 Revision 1 1 Intel order number E20184 002
5. Revision 1 1 Intel order number E20184 002 Intel RAID Portable Cache Module AXXRPCM3 Technical Product Specification Introduction Portable Cache Module and the associated hard disk drives to a replacement Intel RAID Controller SRCSASJV the Intel RAID Portable Cache Module AXXRPCMG flushes the unwritten data preserved in the cache to the disks through the new adapter Figure 1 Intel RAID Portable Cache Module AXXRPCM3 2 Revision 1 1 Intel order number E20184 002 Hardware Intel RAID Portable Cache Module AXXRPCM3 Technical Product Specification 2 Hardware The Intel RAID Portable Cache Module AXXRPCM3 is a 32 M x 72 bit 8 chip 244 pin Mini DIMM module consisting of the following Five 32M x16 FBGA DDR2 SDRAM modules Universal bus driver register PLL clock driver 256x8 EEPROM for serial presence detect The Intel RAID Portable Cache Module AXXRPCMG conforms to JEDEC Joint Electron Device Engineering Council specifications and has battery backup circuitry The Intel RAID Portable Cache Module AXXRPCMG has the following features RoHS compliant Restriction of Hazardous Substances Directive compliant PC2 5300 compliant JEDEC Standard 244 pin Mini Dual Inline Memory Module Mini DIMM Registered Basedon 32M x 8 DDR2 FBGA SDRAM components Programmable CAS latency Programmable additive latency Write latency read latency minus 1 Off chip driver impedance adjustment OCD
6. ID Firmware Interaction see 11 Intel RAID Smart Battery Software 12 4 1 Intel RAID BIOS Console 2 rea ro I I HI a OUR Sn 12 4 2 Intel RAID Web Console 8 ao uenis sere otf ae io Dei oett 12 4 3 Intel RAID Command Eine Utility 9 ect tai ms te t ett vene 12 List of Figures Figure 1 Intel RAID Portable Cache Module AXXRPOMSG eee 2 Figure 2 Block Diagrami irte tt D De Mo nitrate Mata icu cde 5 List of Tables Table 1 Electrical and Mechanical Details ii meer 4 Table 2 PCB Connector Pin Assignment ssesssssssseseeeeeeee nennen nnne 5 Table 3 Pins D SCriptilOns e Em 7 Table 4 Interface Connector Pin out seeesesssesesee em e em mene nrnn nnne rent rn erri nennen 8 Revision 1 1 ii Intel order number E20184 002 List of Tables Intel RAID Portable Cache Module AXXRPCM3 Technical Product Specification lt This page intentionally left blank gt iv Revision 1 1 Intel order number E20184 002 Introduction Intel RAID Portable Cache Module AXXRPCM3 Technical Product Specification 1 Introduction This document specifies the key hardware components firmware and software utility requirements for the Intel RAID Portable Cache Module AXXRPCMS The Portable Cache Module is available as an accessory for the Intel RAID Controller SRCSASJV to provide data integrity for the RAID solution by ensuring that the data passing through the cache is written to the hard drives Intel RAID P
7. Intel RAID Portable Cache Module AXXRPCM3 Technical Product Specification Intel order number E20184 002 Revision 1 1 July 2008 Enterprise Platforms and Services Marketing Revision History Intel RAID Portable Cache Module AXXRPCM3 Technical Product Specification Revision History Revision Modifications Number July 2007 Initial Release July 2008 Update Battery pack information Disclaimers INFORMATION IN THIS DOCUMENT IS PROVIDED IN CONNECTION WITH INTEL PRODUCTS NO LICENSE EXPRESS OR IMPLIED BY ESTOPPEL OR OTHERWISE TO ANY INTELLECTUAL PROPERTY RIGHTS IS GRANTED BY THIS DOCUMENT EXCEPT AS PROVIDED IN INTEL S TERMS AND CONDITIONS OF SALE FOR SUCH PRODUCTS INTEL ASSUMES NO LIABILITY WHATSOEVER AND INTEL DISCLAIMS ANY EXPRESS OR IMPLIED WARRANTY RELATING TO SALE AND OR USE OF INTEL PRODUCTS INCLUDING LIABILITY OR WARRANTIES RELATING TO FITNESS FOR A PARTICULAR PURPOSE MERCHANTABILITY OR INFRINGEMENT OF ANY PATENT COPYRIGHT OR OTHER INTELLECTUAL PROPERTY RIGHT Intel products are not intended for use in medical life saving life sustaining critical control or safety systems or in nuclear facility applications Intel might change specifications and product descriptions at any time without notice Designers must not rely on the absence or characteristics of any features or instructions marked reserved or undefined Intel reserves these for future definition and shall have no responsibility whatsoever for co
8. el RAID Portable Cache Module AXXRPCM3 Basic Functional Block Diagram i Cache Memory Comparator Regulators Charging Circuitry Memory Bus Battery pack LION Charger Gas Gauge Intel RAID Controller SRCSASJV Figure 2 Block Diagram 2 3 Gold PCB Connector Pin Assignment Table 2 PCB Connector Pin Assignment Revision 1 1 Symbol Pin Symbol Pin A4 123 VSS 184 VDDQ 124 DQ4 185 A2 125 DQ5 186 VDD 126 VSS 187 VSS 127 DMO 188 VSS 128 NC 189 NC 129 VSS 190 VDD 130 Das 1e1 A10 AP 131 DQ7 192 BAO 132 VSS 193 VDD 133 DQ12 194 WE 134 DQ13 195 VDDQ 135 VSS 196 CAS 136 DM1 197 VDDQ 137 NC 198 NC 138 VSS 199 ODT1 139 RFU 200 VDDQ 140 IRFU 201 NC 141 VSS 202 VSS 142 DQ1i4 203 Intel order number E20184 002 Intel RAID Portable Cache Module AXXRPCM3 Technical Product Specification Note Active Low Pin Symbol DQ10 2 DQ11 VSS DQ16 DQ17 VSS 7 DQS2 DQS2 VSS DQ18 DQ19 VSS DQ24 DQ25 VSS DQS3 DQS3 VSS DQ26 DQ27 VSS C0 43 CB1 44 VSS 5 DQS8 46 DQS8 VSS 48 CB2 49 CB3 50 VSS NC 52 VDDQ 53 CKEO 54 VDD BA2 NC VDDQ A11 A7 VDD A5 N D K A A j oj ojl GW GW jl ol N YINI N N n2 N OO CO N aj 5 j N O CO o oO O1 Co AR AB N o A o Oi oy oy oy on o 0 oO O1 Pin 82 83 84 85 86 87 88 89 90 91
9. g Instantaneous voltage current and temperature Battery charge percentage remaining and at rate information Broadcasts event alarms to the host Out of temperature Terminate charge Terminate discharge Low capacity Manufacturing information Smart Charger Protocol for improved battery maintenance calibration and charging performance 2 5 2 Battery States The battery pack includes battery sensing logic that senses the battery voltage levels and recognizes the battery state Revision 1 1 9 Intel order number E20184 002 Intel RAID Portable Cache Module AXXRPCM3 Technical Product Specification Hardware 2 5 2 1 Initialized State The battery is in the initialized state during a normal power up sequence In RAID firmware there are two levels of initialization During boot loader execution During RAID firmware boot 2 5 2 2 Discharging State The battery voltage is drained as part of a relearn cycle 2 5 2 3 Fully Charged State A battery that is not fully charged has a low voltage level that indicates the level of charge Charging begins when the battery logic detects low voltage and power is supplied Once a new battery is fully charged a relearn cycle is initiated Relearn is the process of taking a fully charged battery through the discharge charge cycle to update the gas gauge capacity parameters The relearn cycle takes up to 24 hours to fully discharge and recharge the battery pack After the relear
10. lock Enable CKE high activates and CKE low deactivate internal clock signals and device input buffers and output drivers Taking CKE low provides Precharge Power Down and Self Refresh operation all banks idle or Active Power Down row Active in any bank CKE is synchronous for power down entry and exit and or Self Refresh entry CKE is asynchronous for Self Refresh exit CKE must be maintained high throughout read and write accesses Input buffers excluding CK CK ODT and CKE are disabled during power down Input buffers excluding CKE are disabled during Self Refresh Address Inputs Provides the row address for Activate commands and the column address and Auto Pre charge bit A10 AP for Read Write commands to select one location out of the memory array in the respective bank A10 AP is sampled during a Precharge command to determine whether the Precharge applies to one bank A10 low or all banks A10 high If only one bank will be precharged the bank is selected by BAO and BA1 The address inputs also provide the op code during Mode Register Set commands Row address A13 is used on x4 and x8 components only Bank Address Inputs BAO and BA1 define which bank the Activate Read Write or Precharge command is applied to BAO and BA1 also determine if the mode register or extended mode register will be accessed during a MRS or EMRS cycle RAS Input Row Address Strobe When sampled at the positive rising edge of the clock RAS this co
11. mmand defines the operation to be executed by the SDRAM CAS Input Column Address Strobe When sampled at the positive rising edge of the clock CAS defines the operation to be executed by the SDRAM WE Input Write Enable When sampled at the positive rising edge of the clock WE defines the operation to be executed by the SDRAM DM 8 0 Data Mask Masks write data when high and they are issued concurrently with input data DQS 8 0 Input Output Data Strobe Positive line of the differential data strobe for input and output data DQS 8 0 Input Output Data Strobe Negative line of the differential data strobe for input and output data DQ 63 0 Input Output Data Lines Data input output pins CB 7 0 ERE Check Bit input output lines used for ECC VDDQ SUPPLY DQ Power Supply 1 8 V 0 1 V VDDSPD VSS SUPPLY SUPPLY SUPPLY Serial EEPROM Positive power supply wired to a separate power pin at the connector which supports from 1 7 V to 3 6 V nominal 1 8 V 2 5 V and 3 3 V operations Power Supply 1 8 V 0 1 V Ground VREF SUPPLY Reference voltage For SSTL18 inputs Revision 1 1 Intel order number E20184 002 Intel RAID Portable Cache Module AXXRPCM3 Technical Product Specification Hardware Function SCL SPD Clock Lines This signal is used to clock data into and out of the SPD EEPROM A resistor may be connected from the SCL bus time to VDDSPD on the system planar to act as a pull up SDA SPD Da
12. n cycle is complete information from the battery accurately provides the state of charge capacity and other parameters These parameters determine the health of the battery The relearn cycle can be set at a user definable interval The default is a one month 30 days interval A relearn cycle initiates on a newly inserted battery even if the battery was previously fully charged Some applications can start a relearn or a relearn can be manually started 2 5 2 4 Fully discharged State The fully discharged state is detected as a low voltage parameter The charger detects a fully discharged battery state and starts charging the cells when sufficient power is available and when the firmware has completed the pack s initialization 10 Revision 1 1 Intel order number E20184 002 RAID Firmware Interaction Intel RAID Portable Cache Module AXXRPCM3 Technical Product Specification 3 RAID Firmware Interaction The RAID firmware detects the battery status and logs the following events Battery is present Battery is not present New battery is detected Battery has been replaced Battery temperature is high Battery voltage is low Battery is charging Battery is discharging Battery voltage is normal Battery needs replacement SOH bad Battery needs replacement Battery is three years old Battery needs replacement Charger is not working Relearn started Relearn in progress Relearn is complete Relearn timed out
13. nflicts or incompatibilities arising from future changes to them The Intel RAID Portable Cache Module AXXRPCM3 may contain design defects or errors known as errata which may cause the product to deviate from published specifications Current characterized errata are available on request Intel is a trademark or registered trademark of Intel Corporation or its subsidiaries in the United States and other countries Other names and brands may be claimed as the property of others Copyright 2007 2008 Intel Corporation Portions Copyright LSI Logic Inc i Revision 1 1 Intel order number E20184 002 Intel RAID Portable Cache Module AXXRPCM3 Technical Product Specification Table of Contents Table of Contents 1 IntrodUctlOR cesicsecedicssscccssceccececsearccectectecestieceventeoaecestecteteencceaucceasceteetetesceces cect ececceevscexrecrsesvsis 1 LAM HAP AWANE E ceds bendie se tandem annee soaacugdi ste ann rm ent age tent IST enr den at ent tre RS ages 3 2 1 Electrical and Mechanical Details 4 2 2 Functional Block DISOFBITIS s 22 M teen dde 5 2 3 Gold PCB Connector Pin ASSIOUI meri occ tote eee 5 2 4 Connecting Cable oe tote Rr et eR RP RO ven BEER Ded dla Bede data ra e debe d ent 8 2 5 Battery PACK sic eb te the a Bi seat ats Pu Oe EEUU edu cto Ed MER 8 2 5 1 Smart Battery CITOHIT s ice i e een orgie ree near eee Rodeo Bede 8 2 5 2 EEJ AAE E IES ES AM okie er 9 RA
14. ortable Cache Module AXXRPCMG is a compact package that contains the following components Battery pack Includes a circuit logic board and attached LiON Lithium lon batteries The logic board provides sensing and management logic to support the battery charge discharge and monitoring functionality The battery includes a small cable that connects the battery to the battery logic board Smart Battery Circuit Smart Battery Circuit Ensures that the battery is maintained at optimal performance and charge levels This circuit is based on the Texas Instruments bq2060A SBS v1 1 Compliant Gas Gauge IC Software to monitor inform the user of issues and actions for the Intel RAID Portable Cache Module Monitoring is accomplished through the Intel RAID BIOS Console 2 Intel RAID Web Console 2 or Intel RAID Command Line Utility 2 utilities The Intel RAID Portable Cache Module AXXRPCM3 provides the Intel RAID Controller SRCSASJV adapter with battery backed cache memory Writing data to the controller s cache memory is much faster than writing it to a storage device The write operation is completed when data is transferred to the RAID Redundant Array of Inexpensive Disks cache After data is written to the cached memory the Intel RAID Controller SRCSASJV writes the cached data to the storage device when system activity is low or when the cache is getting full One risk of using a write back cache is the cached data can be lost if
15. ta This bidirectional pin is used to transfer data into or out of the SPD EEPROM A resistor must be connected from the SDA bus line to VDDSPD on the system planar to act as a pull up ee pec SPD Address Lines These signals are tied at the system planar to either VSS or VDD e SOPP I to configure the serial SPD EEPROM address range RESET The RESET Pin is connected to the RST pin on the register and to the OE pin on the PLL When low all register outputs will be driven low and the PLL clocks to the DRAMs and register s will be set to low level the PLL will remain synchronized with the input clock NC SUPPLY No Connection A line is unconnected in the DIMM Note 2 Active Low 24 Connecting Cable A 5 pin connector cable is pre installed in the battery pack 2 5 Table 4 Interface Connector Pin out Color SMBus data Green wh Battery Pack The cache memory hold time depends on the size and configuration of the RAID controller memory Battery backup retention time is estimated at 72 hours three days but the retention time varies depending on memory capacity and the number of memory components used on the DIMM to support that capacity 2 5 1 Smart Battery Circuit The Intel RAID Portable Cache Module AXXRPCM3 is based on the Texas Instruments bq2060A SBS v1 1 compliant Gas Gauge IC The key features of the SBS v1 1 IC are Provides accurate measurement of available charge Supports SBS Smart Batter
16. the AC power fails before it is written to the storage device The Portable Cache Module mitigates this risk by providing a battery as a backup source of power Users can adjust options for the highest performance without increasing the risk of data loss The Intel RAID Portable Cache Module AXXRPCM3 provides additional fault tolerance when used in conjunction with a UPS Uninterruptible Power Supply The Intel RAID Portable Cache Module AXXRPCMS monitors the voltage level of the DRAM modules installed on the Intel RAID Controller SRCSASJV If the voltage level drops below a predefined level the battery backup module portion of the Portable Cache Module switches the memory power source from the Intel RAID Controller SRCSASJV to the battery pack on the Portable Cache Module When the voltage level returns to an acceptable level the battery backup circuitry switches the power source back to the Intel RAID Controller SRCSASJV and all pending writes to storage devices are completed with no data loss The Intel RAID Portable Cache Module AXXRPCM3 has built in functionality to charge the battery pack automatically and to communicate battery status information such as voltage temperature and current to the host computer system The Portable Cache Module will cache data to a replacement controller if that data has not been written to a disk This could be necessary if the RAID controller fails after an unexpected power failure After moving the
17. y Data Specification v1 1 Reports voltages Provides voltage temperature and current measurements Revision 1 1 Intel order number E20184 002 Hardware Intel RAID Portable Cache Module AXXRPCM3 Technical Product Specification Measures charge flow using a V to F converter with offset of less than 16 uV after calibration The Texas Instruments bq2060A SBS compliant Gas Gauge IC for the battery pack maintains an accurate record of the available charge It determines battery capacity by monitoring the amount of charge input or removed from the smart battery The bq2060A measures battery voltage temperature and current estimates battery self discharge and monitors the battery for low voltage thresholds It measures charge and discharge activity by monitoring the voltage across a small value series sense resistor between the battery s negative terminal and the negative terminal of the battery pack The available battery charge is determined by monitoring this voltage and correcting the measurement for environmental and operating conditions For more information about the Texas Instruments bq2060A SBS compliant Gas Gauge IC see the manufacturer website The Intel RAID Smart Battery features include Integrated into battery pack Reduced host CPU intervention Shares l C bus with the onboard EEPROM Electronically Erasable Programmable Read Only Memory for memory Real time battery status information Low charge warnin
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