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Supermicro MBD-H8DMR-82-B

1. gt NEM gt Notes X indicates a populated DIMM slot If adding at least four DIMMs with two CPUs installed the configurations with DIMMs spread over both CPUs and not like the con figuration in row 5 will result in optimized performance Note that the first two DIMMs must be installed in the CPU1 memory slots Populating Memory Banks for 64 bit Operation CPU1 CPU1 CPU1 CPU1 CPU2 CPU2 CPU2 CPU2 DIMM1A DIMM1B DIMM2A DIMM2B DIMM1A DIMM1B DIMM2A DIMM2B 2 7 H8DMR 82 H8DMR i2 User s Manual 2 5 Port and Control Panel Connections The I O ports are color coded in conformance with the PC99 specification to make setting up your system easier See Figure 2 3 below for the colors and locations of the various ports Figure 2 3 Port Locations and Definitions UN EUN ILC 6 2 Keyboard Mouse USBO USB1 COM Port LAN1 LAN2 VGA Port External SCSI Port Purple Green Ports Turquoise Port Port Blue Note the external SCSI port is on the H8DMR 82 only Front Control Panel JF1 contains header pins for various front control panel connectors See Figure 2 4 for the pin definitions of the various connectors Refer to Section 2 6 for details Figure 2 4 JF1 Front Control Panel Header JF1 Ground 20 19 NMI x key Power LED Vcc HDD LED Vcc Ground Power 2 1 2 8 2 6 Conn
2. Pins Definition 1 through 4 Ground 5 through 8 12V Required Connection Auxiliary Power Connector Pin Definitions J32 Pins Definition 1 amp 2 Ground 3 amp 4 12 Required Connection NMI Button Pin Definitions JF1 Pin Definition 19 Control Ground H8DMR 82 H8DMR i2 User s Manual Power LED Power LED Pin Definitions JF1 The Power LED connection is located Pin Definition on pins 15 and 16 of JF1 Refer to the 15 Vcc table on the right for pin definitions Control HDD LED The HDD IDE Hard Disk Drive LED Bin Befinf cna 05 connection is located on pins 13 and 14 of JF1 Attach the IDE hard drive LED cable to display disk activity Refer to the table on the right for pin definitions Pin Definition 19 Vcc HD Active NIC1 LED The NIC1 Network Interface Control Pin Bei hons GED ler LED connection is located on pins 11 and 12 of JF1 Attach the NIC1 LED cable to display network activity Refer to the table on the right for pin definitions Pin Definition 11 Vcc 12 NIC1 Active NIC2 LED NIC2 LED The NIC2 Network Interface Control ler LED connection is located on pins ae Pin Definition 9 and 10 of JF1 Attach the NIC2 7 vm LED cable to display network activity Refer to the table on the right for pin NIC2 Active definitions Overheat Fan Fail LED OH Fan Fail LED OH Fan Fail Pin Definitions JF1
3. H8DMR 82 H8DMR i2 User s Manual Notes Chapter 2 Installation Chapter 2 Installation 2 1 Static Sensitive Devices Electrostatic Discharge ESD can damage electronic components To prevent dam age to your system board it is important to handle it very carefully The following measures are generally sufficient to protect your equipment from ESD Precautions Use a grounded wrist strap designed to prevent static discharge Touch a grounded metal object before removing the board from the antistatic bag Handle the board by its edges only do not touch its components peripheral chips memory modules or gold contacts When handling chips or modules avoid touching their pins Put the serverboard and peripherals back into their antistatic bags when not in use For grounding purposes make sure your computer chassis provides excellent conductivity between the power supply the case the mounting fasteners and the serverboard Use only the correct type of CMOS onboard battery as specified by the manufac turer Do not install the CMOS onboard battery upside down which may result in a possible explosion Unpacking The serverboard is shipped in antistatic packaging to avoid static damage When unpacking the board make sure the person handling it is static protected Installation Procedures Follow the procedures as listed below to install the serverboard into a chassis 1 Install the proce
4. Populating two adjacent slots at a time with memory modules of the same size and type will result in interleaved 128 bit memory which is faster than non interleaved 64 bit memory See charts on following page Optimizing memory performance If two processors are installed it is better to stagger pairs of DIMMs across both sets of CPU DIMM slots e g first populate CPU1 slots 1A and 1B then CPU slots 1A and 1B then the next two CPU1 slots etc This balances the load over both CPUs to optimize performance Maximum memory two CPUS 64 GB if only one CPU is installed maximum supported memory is halved Figure 2 2 Side and Top Views of DDR Installation Notch gt lt Notch To Install Insert module vertically and press down until it snaps into place The release tabs should Release Release close if they do not you should close them yourself should align with its receptive point on the slot Note the notch in the slot and on the bottom of the DIMM These prevent the DIMM from being installed incorrectly To Remove Top View of DDR2 Slot Use your thumbs to gently push each re lease tab outward to release the DIMM from the slot Release Tab Release Tab 2 6 Chapter 2 Installation Populating Memory Banks for 128 bit Operation CPU1 CPU1 CPU1 CPU1 CPU2 CPU2 CPU2 CPU2 DIMM1A DIMM1B DIMM2A DIMM2B DIMM1A DIMM1B DIMM2A DIMM2B X X x lt EN gt gt
5. Initialization after E000 option ROM control has completed Displaying the system configuration next Uncompressing the DMI data and executing DMI POST initialization next The system configuration is displayed Copying any code to specific areas Code copying to specific areas is done Passing control to INT 19h boot loader next B 7 H8DMR 82 H8DMR i2 User s Manual continued from front The products sold by Supermicro are not intended for and will not be used in life support systems medical equipment nuclear facilities or systems aircraft aircraft devices aircraft emergency com munication devices or other critical systems whose failure to perform be reasonably expected to result in significant injury or loss of life or catastrophic property damage Accordingly Supermicro dis claims any and all liability and should buyer use or sell such products for use in such ultra hazardous applications it does so entirely at its own risk Furthermore buyer agrees to fully indemnify defend and hold Supermicro harmless for and against any and all claims demands actions litigation and proceedings of any kind arising out of or related to such ultra hazardous use or sale B 8
6. Pin Definition 3 Reset Ground Power Button Pin Definitions JF1 Pin Definition 1 Pw ON 2 Ground Universal Serial Bus Ports Pin Definitions USBO 1 USBO USB1 Pin Definition Pin 4 Definition 1 45V 1 45V 2 2 PO 3 4 4 Ground H8DMR 82 H8DMR i2 User s Manual USB Headers Four additional USB2 0 head ers USB2 3 are included on the serverboard These may be con nected to provide front side access A USB cable not included is needed for the connection See the table on the right for pin definitions Serial Ports The COM port is located on the backplane 2 is a header see layout diagram for location Refer to the table on the right for pin defini tions Fan Headers The H8DMR 82 H8DMR i2 has five fan headers which are designated FAN1 through FAN5 See the table on the right for pin definitions Note when using active heatsinks those with fans connect the heatsink fans to the nearest fan header JLAN1 2 Ethernet Ports Two Gigabit Ethernet ports desig nated LAN1 and LAN are located on the I O backplane These Ethernet ports accept RJ45 type cables Universal Serial Bus Headers Pin Definitions USB2 3 USB2 USB3 4 Pin Definition Pins Definition 1 5V 1 5V 2 2 3 3 4 Ground 4 Ground 5 5 No connection Serial Port Pin Definitions COM1 COM2 Pin
7. This option is near the bottom of the Security Setup screen Select Disabled to deactivate the Boot Sector Virus Protection Select Enabled to enable boot sector protection When Enabled AMI BIOS displays a warning when any program or virus issues a Disk Format command or attempts to write to the boot sector of the hard disk drive The options are Enabled and Disabled 4 17 H8DMR 82 H8DMR i2 User s Manual 4 6 Exit Menu Select the Exit tab from AMI BIOS Setup Utility screen to enter the Exit BIOS Setup Screen Save Changes and Exit When you have completed the system configuration changes select this option to leave BIOS Setup and reboot the computer so the new system configuration parameters can take effect Select Save Changes and Exit from the Exit menu and press Enter Discard Changes and Exit Select this option to quit BIOS Setup without making any permanent changes to the system configuration and reboot the computer Select Discard Changes and Exit from the Exit menu and press Enter Discard Changes Select this option and press Enter to discard all the changes and return to AMI BIOS Utility Program Load Optimal Defaults To set this feature select Load Optimal Defaults from the Exit menu and press Enter Then Select OK to allow BIOS to automatically load the Optimal Defaults as the BIOS Settings The Optimal settings are designed for maximum system performance but may not work best for al
8. PWR Fail 4 Gnd 5 SMBus Header Pin Definitions IPMB Pin Definition 5 Data Ground Clock No Connection Chapter 2 Installation 3rd Power Supply Alarm PS Alarm Reset Header Reset Header Pin Definitions JAR Pin Definition Connect JAR to the alarm reset but mE 1 Ground ton on your chassis if available or to 8 Reset Signal a microswitch to allow you to turn off the alarm that sounds when a power supply module fails See the table on the right for pin definitions Compact Flash Card PWR Compact Flash Connector Power Header Pin Definitions JWF1 A Compact Flash Card Power Connector Pin Definition is located at JWF1 For the Compact 5 Flash Card to work properly you will first Ground needto connectthe device s power cable to JWF1 and correctly set the Compact Flash Jumper JCF1 SGPIO SGPIO Header The two headers labeled SGPIO1 and Pin Definitions SGPIO1 SGPIO2 SGPIO2 are for SGPIO Serial General Purpose Input Output SGPIO pro Pin Definition Pin Definition 1 2 vides a bus between the SATA control 3 Ground 4 Data ler and the SATA drive backplane to 5 Load 6 Ground provide SATA enclosure management 7 8 functions Connect the appropriate cables from the backplane to the Note NC indicates no connection SGPIO1 and SGPIO2 headers to utilize SAS SATA management functions on your system 2
9. keyboard and mouse 5 Remove all add on cards 6 Install a CPU and heatsink making sure it is fully seated and connect the in ternal chassis speaker and the power LED to the serverboard Check all jumper settings as well 7 Use the correct type of onboard CMOS battery as recommended by the manufac turer To avoid possible explosion do not install the CMOS battery upside down No Power 1 Make sure that no short circuits exist between the serverboard and the chas sis 2 Verify that all jumpers are set to their default positions 3 Check that the 115V 230V switch on the power supply is properly set 4 Turn the power switch on and off to test the system 5 The battery on your serverboard may be old Check to verify that it still supplies 9VDC If it does not replace it with new one No Video 1 If the power is on but you have no video remove all the add on cards and cables 2 Use the speaker to determine if any beep codes exist Refer to Appendix A for details on beep codes 3 1 H8DMR 82 H8DMR i2 User s Manual NOTE If you are a system integrator VAR or OEM a POST diagnostics card is recommended For I O port 80h codes refer to App B Memory Errors 1 Make sure that the DIMM modules are properly and fully installed 2 You should be using registered ECC DDR2 memory see next page Also it is recommended that you use the same memory type and speed for all DIMMs in the System See Section
10. nate display memory read write test next 32h The alternate display memory read write test passed Looking for alternate display retrace checking next 37h The display mode is set Displaying the power on message next 34h Video display checking is over Setting the display mode next 38h Initializing the bus input IPL general devices next if present See the last page of this chapter for additional information 39h Displaying bus initialization error messages See the last page of this chapter for additional information 3Ah The new cursor position has been read and saved Displaying the Hit DEL mes sage next 3Bh The Hit DEL message is displayed The protected mode memory test is about to start 40h Preparing the descriptor tables next 42h The descriptor tables are prepared Entering protected mode for the memory test next 43h Entered protected mode Enabling interrupts for diagnostics mode next 44h Interrupts enabled if the diagnostics switch is on Initializing data to check memory wraparound at 0 0 next 45h Data initialized Checking for memory wraparound at 0 0 and finding the total sys tem memory size next 46h The memory wraparound test is done Memory size calculation has been done Writing patterns to test memory next 47h The memory pattern has been written to extended memory Writing patterns to the base 640 KB memory next 48h Patterns written in base memory Determining the amount of
11. 0 Drivers amp Tools nVidia MCPSSPro Graphics driver Chipset H8DMR 82 i2 Adaptec Storage Manager Supero Doctor Build driver diskettes and manuals Browse CD Auto Start Up Nest Time Click the icons showing a hand writing on paper to view the readme files for each item Click the computer icons to the right of these items to install each item from top to the bottom one at a time After installing each item you should reboot the system before moving on to the next item on the list The bottom icon with a CD on it allows you to view the entire contents of the CD 2 26 Chapter 3 Troubleshooting Chapter 3 Troubleshooting 3 1 Troubleshooting Procedures Use the following procedures to troubleshoot your system If you have followed all of the procedures below and still need assistance refer to the Technical Support Procedures and or Returning Merchandise for Service section s in this chapter Always disconnect the AC power cord before adding changing or installing any hardware components Before Power On 1 Check that the 5V standby power LED is lit DA4 on the serverboard 2 Make sure that the main ATX power connector at JPW1 the 8 pin connector at JPW2 and the 4 pin connecor at J32 are all connected to your power supply 3 Make sure that no short circuits exist between the serverboard and chassis 4 Disconnect all ribbon wire cables from the serverboard including those for the
12. 11 11 Host Data 3 12 Host Data 12 13 Host Data 2 14 Host Data 13 15 Host Data 1 16 Host Data 14 17 Host Data 0 18 Host Data 15 19 Ground 20 Key 21 DRQ3 22 Ground 23 Write 24 Ground 25 Read 26 Ground 27 IOCHRDY 28 BALE 29 DACK3 30 Ground 31 IRQ14 32 00516 33 34 Ground 35 36 Addr2 37 Chip Select 0 38 Chip Select 1 39 Activity 40 Ground SATA Drive Ports Pin Definitions SATAO SATA5 SATA Ports Pin Definition 1 Ground There are no jumpers to con TXP figure the SATA ports which 7 N are designated SATAO through 4 Ground SATA5 See the table on the ww 5 RXN right for pin definitions 6 RXP 7 Ground 2 22 SCSI Connectors H8DMR 82 only Refer to the table at right for pin definitions for the Ultra320 SCSI connectors located at JA1 and JB1 Chapter 2 Installation Ultra320 SCSI Drive Connectors Pin Definitions JA1 JB1 o N A C PD NOM Boom Bee EB e Ci gt o o a FP 2 23 Definition DB 12 DB 13 DB 14 DB 15 DB P1 DB 0 DB 1 DB 2 DB 3 DB 4 DB 5 DB 6 DB 7 DB P Ground DIFFSENS TERMPWR TERMPWR Reserved Ground ATN Ground BSY ACK RST MSG SEL C D REQ DB 8 DB 9 DB 10 DB 11 Definition DB 12 DB 13 DB 14 DB
13. 15 DB P1 DB 0 DB 1 DB 2 DB 3 DB 4 DB 5 DB 6 DB 7 DB P Ground Ground TERMPWR TERMPWR Reserved Ground ATN Ground BSY ACK RST MSG SEL C D REQ I O DB 8 DB 9 DB 10 DB 11 H8DMR 82 H8DMR i2 User s Manual 2 10 Enabling SATA RAID Now that the hardware is set up you must now install the operating system and the SATA RAID drivers if you wish to use RAID with your SATA drives The installation procedure differs depending on whether you wish to have the operating system installed on a RAID array or on a separate non RAID drive See the instructions below for details Serial ATA SATA Serial ATA SATA is a physical storage interface that employs a single cable with a minimum of four wires to create a point to point connection between devices This connection is a serial link that supports a SATA transfer rate from 150 MBps The serial cables used in SATA are thinner than the traditional cables used in Parallel ATA PATA and can extend up to one meter in length compared to only 40 cm for PATA cables Overall SATA provides better functionality than PATA Installing the OS SATA Driver Before installing the OS operating system and SATA RAID driver you must decide if you wish to have the operating system installed as part of a bootable RAID array or installed to a separate non RAID hard drive If on a separate drive you may install the driver either during or after
14. 15 H8DMR 82 H8DMR i2 User s Manual Power Fail Header Power Fail Header Pin Definitions JPWF Connect a cable from your power sup Pin Definition ply to the Power Fail header to provide 1 P S 1 Fail Signal you with warning of a power supply 2 P S 2 Fail Signal failure The warning signal is passed P S 3 Fail Signal through the PWR LED pin to indicate 4 EU a power failure See the table on the right for pin definitions Note This feature is only available when using redundant Supermicro power supplies 2 7 Jumper Settings Explanation of Jumpers To modify the operation of the serverboard jumpers can be usedto choose between optional settings Jumpers create shorts betweentwo pins to change the function of the connector Pin 1 is identified with a square solder pad on the printed circuit board See the diagram at Bains right example of jumping pins 1 and 2 Refer to the serverboard layout page for jumper locations Pins Jumper Note Ontwo pinjumpers Closed means the jumperis on and Open means the jumper is off the pins 2 16 Chapter 2 Installation CMOS Clear JBT1 is used to clear CMOS and will also clear any passwords Instead of pins this jumper consists of contact pads to prevent accidentally clearing the contents of CMOS To clear CMOS 1 First power down the system and unplug the power cord s 2 With the power discon
15. 2 4 for memory details and limitations 3 Check for bad DIMM modules or slots by swapping modules between slots and noting the results 4 Check the power supply voltage 115V 230V switch Losing the System s Setup Configuration 1 Make sure that you are using a high quality power supply A poor quality power supply may cause the system to lose the CMOS setup information Refer to Sec tion 1 6 for details on recommended power supplies 2 The battery on your serverboard may be old Check to verify that it still supplies 9VDC If it does not replace it with new one 3 If the above steps do not fix the setup configuration problem contact your vendor for repairs 3 2 Technical Support Procedures Before contacting Technical Support please take the following steps Also note that as a serverboard manufacturer we do not sell directly to end users so it is best to first check with your distributor or reseller for troubleshooting services They should know of any possible problem s with the specific system configuration that was sold to you 1 Please review the Troubleshooting Procedures and Frequently Asked Questions FAQs sections in this chapter or see the FAQs on our web site before contacting Technical Support 2 BIOS upgrades can be downloaded from our web site Note Not all BIOS can be flashed depending on the modifications to the boot block code Chapter 3 Troubleshooting 3 If you still cannot resolve
16. 4 Definition Pin 4 Definition 1 DCD 6 DSR 2 RXD 7 RTS 3 TXD 8 CTS 4 DTR 9 5 Ground 10 NC Note NC indicates no connection Fan Header Pin Definitions FAN1 5 Pin Definition 1 Ground Black 2 12V Red Tachometer Power LED Speaker On JD1 pins 1 2 and 3 are for the power LED and pins 4 through 7 are for the speaker See the tables on the right for pin definitions Note The speaker connector pins are for use with an external speaker you wish to use the onboard speaker you should close pins 6 and 7 with a jumper ATX PS 2 Keyboard and PS 2 Mouse Ports The ATX PS 2 keyboard and the PS 2 mouse ports are located on the I O backplane see Figure 2 3 Refer to the table on the right for pin definitions Chassis Intrusion A Chassis Intrusion header is located at JL1 Attach the appropriate cable to inform you of a chassis intrusion Overheat LED Connect an LED to the JOH1 header to provide warning of chassis over heating See the table on the right for pin definitions 2 13 Chapter 2 Installation PWR LED Connector Pin Definitions JD1 Pin Definition 1 2 Control 3 Control Speaker Connector Pin Definitions JD1 Pin Definition 4 Red wire 5 No connection 5 6 Buzzer signal 7 Speaker data PS 2 Keyboard and Mouse Port Pin Definitions Pin Definition 1 Data Ground vec Clo
17. ACPI 2 0 Plug and Play PnP PC Health Monitoring Onboard voltage monitors for two CPU cores Hyper Transport 1 2V memory banks 1 8V chipset 1 5V e Fan status monitor with firmware software on off and speed control Watch Dog Environmental temperature monitoring via BIOS Power up mode control for recovery from AC power loss System resource alert via included utility program Auto switching voltage regulator for the CPU core 1 6 Chapter 1 Introduction ACPI Features Slow blinking LED for suspend state indicator BIOS support for USB keyboard Main switch override mechanism Internal external modem ring on Onboard I O On chip SATA controller supporting six 6 SATA ports RAID 0 1 0 1 and 5 Adaptec AIC 7902W SCSI controller RAID 0 1 and 10 H8DMR 82 only One 1 UltraDMA ATA 133 100 IDE port One 1 floppy port interface up to 2 88 MB Two 2 Fast UART 16550 compatible serial ports On chip nVidia MCP55 Ethernet controller supports two Gigabit LAN ports ATI RN50 ES1000 onboard graphics controller PS 2 mouse and PS 2 keyboard ports Four 4 USB Universal Serial Bus 2 0 ports headers Other Wake on Ring Wake on LAN Onboard 5 power LED DA4 SCSI channel activity LEDs DA2 H83DMR 82 only Chassis intrusion detection CD Utilities BIOS flash upgrade utility Dimensions Extended ATX form factor 12 x 13 05 305 x 332 mm 1 7 H8DMR 82 H8DMR i2 User
18. Appendices Appendix A BIOS Error Beep Codes eese A 1 Appendix B BIOS POST Checkpoint Codes B 1 vi Chapter 1 Introduction 1 1 Chapter 1 Introduction Overview Checklist Congratulations on purchasing your computer serverboard from an acknowledged leader in the industry Our boards are designed with the utmost attention to detail to provide you with the highest standards in quality and performance Please check that the following items have all been included with your serverboard If anything listed here is damaged or missing contact your retailer Included with retail box only 1 HSDMR 82 H8DMR i2 serverboard One 1 IDE cable CBL 036L 02 One 1 floppy cable CBL 022L Two 2 heatsink retention modules with four 4 screws BKT 0012L One 1 CD containing drivers and utilities j H8DMR 82 H8DMR i2 User s Manual Contacting Supermicro Headquarters Address Super Micro Computer Inc 980 Rock Ave San Jose CA 95131 U S A Tel 1 408 503 8000 Fax 1 408 503 8008 Email marketing supermicro com General Information support supermicro com Technical Support Web Site www supermicro com Europe Address Super Micro Computer B V Het Sterrenbeeld 28 5215 ML s Hertogenbosch The Netherlands Tel 31 0 73 6400390 Fax 31 0 73 6416525 Email sales supermicro nl General Information support s
19. Onboard Indicators 2 20 E DE A MIR TP 2 20 5V Standby Power EBD etica 2 20 ec Activity LEDS C 2 20 2 9 Floppy IDE SATA and SCSI Drive Connections 2 21 Floppy CONNECtON MN 2 21 IDE Connectors 2 22 SATA PONS 2 22 SCSll COMNECIOMS x5 reset ise rai e 2 23 H8DMR 82 H8DMR i2 User s Manual 2 10 Enabling SATA AID Rn taa 2 24 2 11 Installing Additional Drivers 2 26 Chapter 3 Troubleshooting 3 1 Troubleshooting Procedures 3 1 Before Power M 3 1 No roD 3 1 e 3 1 Memoiy P 3 2 Losing the System s Setup Configuration oiii 3 2 3 2 Technical Support Procedures 3 2 3 3 Frequently Asked Questions rera 3 3 3 4 Returning Merchandise for Service 3 4 Chapter 4 BIOS SMEs eio NNUS 4 1 4 2 MENU 4 2 4 3 Advanced Settings 4 2 Boot VN eer ccs tea LE 4 16 4 5 od dica emer err UK 4 17 dui e UR 4 18
20. RAID Function setting which will cause the SATAO 1 2 Primary Secondary settings to appear Enable the SATA devices and channels you will be using 3 Hit the lt Esc gt key twice and scroll to the Exit menu Select Save Changes and Exit and hit lt enter gt then hit lt Enter gt again to verify 4 After exiting the BIOS Setup Utility the system will reboot When prompted during the startup press the lt F10 gt key when prompted to run the nVidia RAID Utility program Using the nVidia RAID Utility The nVidia RAID Utility program is where you can define the drives you want to include in the RAID array and the mode and type of RAID Two main windows are shown in the utility The Free Disks window on the left will list all available drives Use the arrow keys to select and move drives to the window on the right which lists all drives that are to become part of the RAID array Once you have finished selecting the drives and type of RAID you wish to use for your RAID array press the lt F7 gt key You will be prompted to verify your choice if you want to continue with your choices select Yes Note that selecting Yes will clear all previous data from the drives you selected to be part of the array You are then given the choice of making the RAID array bootable by pressing the the B key After you have finshed press the Ctrl and X keys simultaneously Installing the OS and Drivers With the Windows OS installat
21. VBAT 4 5 gt Configuration gt View BMC System Event Log Pressing the Enter key willopenthe following settings Usethe and keys to navigate through the system event log Clear BMC System Event Log Selecting this and pressing the Enter key will clear the BMC system event log gt Set LAN Configuration Use the and keys to choose the desired channel number gt IP Address Use the and keys to select the parameter The IP address and current IP address in the BMC are shown gt MAC Address Use the and keys to select the parameter The MAC address and cur rent MAC address in the BMC are shown gt Subnet Address Use the and keys to select the parameter The subnet address and current subnet address in the BMC are shown gt Set PEF Configuration PEF Support Use this setting to Enable or Disable PEF support PEF Action Global Control Options are Alert Power Down Reset Sysytem Power Cycle OEM Action and Diagnostic Int Alert Startup Delay Use this setting to Enable or Disable the alert startup delay 4 15 H8DMR 82 H8DMR i2 User s Manual Startup Delay Use this setting to Enable or Disable the startup delay Event Message for PEF Action Use this setting to Enable or Disable event messages for a PEF action BMC Watch Dog Timer Action This setting is used to set the Watch Dog function The options are Disabled Reset System Po
22. connector with twisted wires always connects to drive A and the connector that does not have twisted wires always connects to drive B e The 80 wire ATA133 IDE hard disk drive cable that came with your system has two connectors to support two drives This special cable should be used to take advantage of the speed this new technology offers The blue connector connects to the onboard IDE connector interface and the other connector s to your hard drive s Consult the documentation that came with your disk drive for details on actual jumper locations and settings for the hard disk drive Floppy Connector Floppy Drive Connector The floppy connector is located eee beside the JIDE1 connector See the table on the right for pin definitions Definition i Definition FDHDIN Reserved 2 FDEDIN Index Motor Enable Drive Select B Drive Select A Motor Enable DIR STEP Write Data Write Gate Track 00 Write Protect Read Data G G G G G G G G G G G G G Side 1 Select Diskette 2 21 H8DMR 82 H8DMR i2 User s Manual IDE Connector IDE Drive Connector Pin Definitions JIDE1 There are no jumpers to config Pin Definition Pinf Definition ure the onboard JIDE1 connec 1 Reset IDE 2 Ground tor See the table on the right 3 Host Data 7 4 Host Data 8 for pin definitions 5 Host Data 6 6 Host Data 9 7 Host Data 5 8 Host Data 10 9 Host Data 4 10 Host Data
23. latency in PCI clock cycles Options are 32 64 96 128 160 192 224 and 248 Allocate IRQ to PCI VGA Set this value to allow or restrict the system from giving the VGA adapter card an interrupt address The options are Yes and No Palette Snooping Select Enabled to inform the PCI devices that an ISA graphics device is installed in the system in order for the graphics card to function properly The options are Enabled and Disabled PCI IDE BusMaster Set this value to allow or prevent the use of PCI IDE busmastering Select Enabled to allow AMI BIOS to use PCI busmaster for reading and writing to IDE drives The options are Disabled and Enabled Offboard PCI ISA IDE Card This option allows the user to assign a PCI slot number to an Off board PCI ISA IDE card in order for it to function properly The options are Auto PCI Slot1 PCI Slot2 PCI 51013 PCI Slot4 PCI 5105 and PCI 51016 4 8 4 5 Advanced Chipset Control gt NorthBridge Configuration gt Memory Configuration Memclock Mode This setting determines how the memory clock is set Auto has the memory clock by code and Limit allows the user to set a standard value MCT Timing Mode Sets the timing mode for memory Options are Auto and Manual Bank Interleaving Select Auto to automatically enable interleaving memory scheme when this function is supported by the processor The options are Auto and Disabled Enable Clock t
24. memory below 1 MB next 49h The amount of memory below 1 MB has been found and verified 4Bh The amount of memory above 1 MB has been found and verified Checking for a soft reset and clearing the memory below 1 MB for the soft reset next If this is a power on situation going to checkpoint 4Eh next B 4 Appendix BIOS POST Checkpoint Codes Checkpoint 4Ch 4Dh 4Eh 4Fh 50h 51h 52h 53h 54h 57h 58h 59h 60h 62h 65h 66h 67h 7Fh 80h 81 82h 83h 84h 85h Code Description The memory below 1 MB has been cleared via a soft reset Clearing the memory above 1 MB next The memory above 1 MB has been cleared via a soft reset Saving the memory size next Going to checkpoint 52h next The memory test started but not as the result of a soft reset Displaying the first 64 KB memory size next The memory size display has started The display is updated during the memory test Performing the sequential and random memory test next The memory below 1 MB has been tested and initialized Adjusting the displayed memory size for relocation and shadowing next The memory size display was adjusted for relocation and shadowing The memory above 1 MB has been tested and initialized Saving the memory size information next The memory size information and the CPU registers are saved Entering real mode next Shutdown was successful The CPU is in real mode Disabling the Gate A20 line
25. system The available op tions are Other and 64 bit Linux 2 6 9 ACPI Mode Use this setting to determine whether ACPI mode will be used The options are Yes and No 4 2 Chapter 4 BIOS gt Advanced ACPI Configuration ACPI Version Features Use this setting the determine which ACPI version to use Options are ACPI v1 0 ACPI v2 0 and ACPI v3 0 ACPI APIC Support Determines whether to include the ACPI APIC table pointer in the RSDT pointer list The available options are Enabled and Disabled ACPI OEMB Table Determines whether to include the ACPI APIC table pointer in the RSDT pointer list The available options are Enabled and Disabled Headless Mode Use this setting to Enable or Disable headless operation mode through ACPI Power Button Mode Allows the user to change the function of the power button Options are On Off and Suspend Watch Dog Timer Select This setting is used to Enable or Disable the Watch Dog Timer function It must be used in conjunction with the Watch Dog jumper see Chapter 2 for details To enable choose from 1 2 3 4 8 15 or 30 min Restore on AC Power Loss This setting allows you to choose how the system will react when power returns after an unexpected loss of power The options are Power Off Power On and Last State MPS Revision This setting allows the user to select the MPS revision level The options are 1 1 and 1 4 4 3 H8DMR 82 H8DMR i2 User s Manual gt Floppy IDE SATA Config
26. B Headers 4 2 1 1 enne nennen 2 12 Sonah POS 5 2 12 Fan Headers E 2 12 JLAN1 2 Ethernet Ports tud 2 12 Power Reet 2 13 ATX PS 2 Keyboard Mouse POLIS 2 13 Chassis Intrusion 4 100 000000 01 0000 2 13 Overhe at 2 13 ir 2e MR 2 14 2 14 PET LEE NUN Li 2 14 mille RUPES 2 14 3rd Power Supply Alarm nadie 2 15 Compact Flash Gard PWR Connector 2 15 me 2 15 Power Fail Header 2 2 16 2 Jumper Sounds ues eie tape ee ere ee meer eer 2 16 Explan tion of JUMPErS T 2 16 CMOS Clear sse nennen nennen 2 17 3rd Power Supply Fail Detect Enable Disable 2 17 VGA Enable Disable 2 17 Watch Dog Enable Disable 2 18 Slot Freg Em 2 18 12 to PCI Enable Disable 2 18 Compact Flash 2 19 SCSI Controller Enable Disable 4422442 21 2 19 SCSI Termination Enable DISable 2 19 2 8
27. LED Status Connect an LED to the OH connection Pin Definition State Indication on pins 7 and 8 of JF1 to provide ad 7 Solid Overheat vanced warning of chassis overheat Control Blinking Fan fail ing Refer to the table on the right for pin definitions and status indicators 2 10 Power Fail LED The Power Fail LED connection is located on pins 5 and 6 of JF1 Refer to the table on the right for pin defini tions This feature is only available for systems with redundant power supplies Reset Button The Reset Button connection is lo cated on pins 3 and 4 of JF1 Attach it to the hardware reset switch on the computer case Refer to the table on the right for pin definitions Power Button The Power Button connection is located on pins 1 and 2 of JF1 Mo mentarily contacting both pins will power on off the system This button can also be configured to function as a suspend button see the Power Button Mode setting in BIOS To turn off the power when set to suspend mode depress the button for at least 4 seconds Refer to the table on the right for pin definitions Universal Serial Bus Ports 05 0 1 Two Universal Serial Bus ports USB2 0 are located beside the mouse port See the table on the right for pin definitions 2 11 Chapter 2 Installation Power Fail LED Pin Definitions JF1 Pin Definition Vcc Control Reset Button Pin Definitions JF1
28. O SWDMA1 SWDMA2 MWDMAO MDWDMA1 MWDMA2 UDMAO UDMA1 UDMA2 UDMAS UDMA4 and UDMAS SWDMA Single Word MWDMA Multi Word UDMA UltraDMA S M A R T Self Monitoring Analysis and Reporting Technology SMART can help predict impending drive failures Select Auto to allow BIOS to auto detect hard disk drive support Select Disabled to prevent AMI BIOS from using the S M A R T Select Enabled to allow AMI BIOS to use the S M A R T to support hard drive disk The options are Disabled Enabled and Auto 32 Bit Data Transfer Select Enabled to activate the function of 32 Bit data transfer Select Disabled to deactivate the function The options are Enabled and Disabled Serial 0 1 2 Primary Secondary Channel Highlight one of the items above and press lt Enter gt to access the submenu for that item If a drive is present information on that drive will be displayed here Type Select the type of device connected to the system The options are Not Installed Auto CDROM and ARMD LBA Large Mode LBA Logical Block Addressing is a method of addressing data on a disk drive The options are Disabled and Auto Block Multi Sector Transfer Block mode boosts IDE drive performance by increasing the amount of data transferred Only 512 bytes of data can be transferred per interrupt if block mode is not used Block mode allows transfers of up to 64 KB per interrupt Select Disabled to allow the data to b
29. Power Configuration Settings eects 1 11 1 5 Power Supply eee nen ncc eee ae eel eee ee 1 12 1 13 Chapter 2 Installation 2 1 Static Sensitive Devices 2 1 2 2 Processor Heatsink Installation 2 2 2 2 3 Mounting the Serverboard into a Chassis 2 5 29 Installing ede ee 2 5 2 5 I O Port and Control Panel Connections 2 8 2 6 Connecting Cables c 2 9 Power Connector eeo aari 2 9 Processor Power Connector 10 11 1 0 000 1000000000000 00 2 9 Auxiliary Power ees 2 9 MNFBUROD Ss io Sears 2 9 Power LED 2 10 ADD LE Dh te dean 2 10 ese es Sac Co c 2 10 PILED E 2 10 Overheat Fan Fail LED 0 1 0 000000000 0000000000000 2 10 Power Ral LED ceto pP 2 11 Reset Button 2 11 Power nnne n nnn nn nnn nnns nenne nns 2 11 Table of Contents USB PONS msi 2 11 US
30. SUPERG H8DMR 82 12 USER S MANUAL The information in this User s Manual has been carefully reviewed and is believed to be accurate The vendor assumes no responsibility for any inaccuracies that may be contained in this document makes no commitment to update or to keep current the information in this manual or to notify any person or organization of the updates Please Note For the most up to date version of this manual please see our web site at www supermicro com Super Micro Computer Inc Supermicro reserves the right to make changes to the product described in this manual at any time and without notice This product including software if any and documentation may not in whole or in part be copied photocopied reproduced translated or reduced to any medium or machine without prior written consent IN EVENT WILL SUPERMICRO BE LIABLE FOR DIRECT INDIRECT SPECIAL INCIDENTAL SPECULATIVE OR CONSEQUENTIAL DAMAGES ARISING FROM THE USE OR INABILITY TO USE THIS PRODUCT OR DOCUMENTATION EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGES IN PARTICULAR SUPERMICRO SHALL NOT HAVE LIABILITY FOR ANY HARDWARE SOFTWARE OR DATA STORED OR USED WITH THE PRODUCT INCLUDING THE COSTS OF REPAIRING REPLACING INTEGRATING INSTALLING OR RECOVERING SUCH HARDWARE SOFTWARE OR DATA Any disputes arising between manufacturer and customer shall be governed by the laws of Santa Clara County in the State of California USA The St
31. T can help predict impending drive failures Select Auto to allow BIOS to auto detect hard disk drive support Select Disabled to prevent AMI BIOS from using the S M A R T Select Enabled to allow AMI BIOS to use the S M A R T to support hard drive disk The options are Disabled Enabled and Auto 32 Bit Data Transfer Select Enabled to activate the function of 32 Bit data transfer Select Disabled to deactivate the function The options are Enabled and Disabled Hard Disk Write Protect Select Enabled to enable the function of Hard Disk Write Protect to prevent data from being written to HDD The options are Enabled or Disabled IDE Detect Time Out Sec This feature allows the user to set the time out value for detecting ATA ATA PI devices installed in the system The options are 0 sec 5 10 15 20 25 30 and 4 7 H8DMR 82 H8DMR i2 User s Manual Configuration Load Onboard LAN Option ROM Use this setting to Enable or Disable the onboard option ROM Clear NVRAM Select Yes to clear NVRAM during boot up The options are Yes and No Plug amp Play OS Select Yes to allow the OS to configure Plug amp Play devices This is not required for system boot if your system has an OS that supports Plug amp Play Select No to allow AMIBIOS to configure all devices in the system PCI Latency Timer This option sets the latency of all PCI devices on the PCI bus Select a value to set the PCI
32. Timing Parameters Allows the user to select which CPU Node s timing parameters memory clock etc to display Options are CPU Node 0 and CPU 1 SouthBridge Configuration USB 1 1 Controller Enable or disable the USB 1 1 controller USB 2 0 Controller Enable or disable the USB 2 0 controller MACO LANO Settings are Auto and Disabled for MACO LANO MACO LANO Bridge Settings are Enabled and Disabled for MACO LANO bridge 4 10 Chapter 4 BIOS MAC1 LAN1 Settings are Auto and Disabled for MAC1 LAN1 LAN1 Bridge Settings are Enabled and Disabled for MAC1 LAN1 bridge Legacy USB Support Select Enabled to enable the support for USB Legacy Disable Legacy support if there are no USB devices installed in the system Auto disabled Legacy support if no USB devices are connected The options are Disabled Enabled and Auto Processor Clock Options This submenu lists CPU information and the following settings MTRR Mapping This determines the method used for programming CPU MTRRs when 4 GB or more memory is present The options are Continuous which makes the PCI hole non cacheable and Discrete which places the PCI hole below the 4 GB boundary Power Now This setting is used to Enable or Disable the AMD Power Now feature gt I O Device Configuration Serial Port1 Address This option specifies the base port address and Interrupt Request address of serial port 1 Select Disabled t
33. adapter missing or with faulty memory A 1 H8DMR 82 H8DMR i2 User s Manual Notes A 2 Appendix BIOS POST Checkpoint Codes Appendix B BIOS POST Checkpoint Codes When AMIBIOS performs the Power On Self Test it writes checkpoint codes to I O port 0080h Ifthe computer cannot complete the boot process diagnostic equipment can be attached to the computer to read I O port 0080h B 1 Uncompressed Initialization Codes The uncompressed initialization checkpoint codes are listed in order of execution Checkpoint Code Description DOh The NMI is disabled Power on delay is starting Next the initialization code check sum will be verified Initializing the DMA controller performing the keyboard controller BAT test starting memory refresh and entering 4 GB flat mode next Starting memory sizing next Returning to real mode Executing any OEM patches and setting the Stack next Passing control to the uncompressed code in shadow RAM at E000 0000h The initialization code is copied to segment 0 and control will be transferred to segment 0 1 H8DMR 82 H8DMR i2 User s Manual B 2 Bootblock Recovery Codes The bootblock recovery checkpoint codes are listed in order of execution Checkpoint Code Description EOh The onboard floppy controller if available is initialized Next beginning the base 512 KB memory test Eth Initializing the interrupt vector table next E2h Initializing the DMA a
34. after the option ROM test has completed Configuring the timer data area and printer base address next Set the timer and printer base addresses Setting the RS 232 base address next Returned after setting the RS 232 base address Performing any required initializa tion before the Coprocessor test next Required initialization before the Coprocessor test is over Initializing the Coproces sor next Coprocessor initialized Performing any required initialization after the Coproces sor test next Initialization after the Coprocessor testis complete Checking the extended keyboard keyboard ID and Num Lock key next Issuing the keyboard ID command next Displaying any soft errors next The soft error display has completed Setting the keyboard typematic rate next The keyboard typematic rate is set Programming the memory wait states next Memory wait state programming is over Clearing the screen and enabling parity and the NMI next NMI and parity enabled Performing any initialization required before passing control to the adaptor ROM at E000 next Initialization before passing control to the adaptor ROM at E000h completed Passing control to the adaptor ROM at 000 next B 6 Checkpoint 9 Abh BOh 1 00h Appendix B BIOS POST Checkpoint Codes Code Description Returned from adaptor ROM at E000h control Performing any initialization required after the E000 option ROM had control next
35. ate the speed of the connection See the table on the right for the func tions associated with the connection speed LED Amber 1 GHz Off 10 100 MHz 5V Standby Power LED When illuminated the DA4 LED indi 5 a LED cates that 5V standby power from the power supply is being supplied to the A er ae eT serverboard DA4 should normally be illuminated when the system is con Off No power connected nected to AC power whether turned on or not DA4 will flash on and off when the system is in an S1 S3 Suspend to RAM or S4 Suspend to Disk state See the table on the right for DA4 LED states State System Status Flashing System in standby state SCSI Activity LEDs H8DMR 82 only SCSI Activity LEDs When illuminated the DA1 and DA2 eee LEDs indicate activity on SCSI chan nels A and B respectively These LEDs are located near the SCSI con troller chip See the table on the right for LED states State On System Status SCSI channel active Off SCSI channel inactive 2 20 Chapter 2 Installation 2 9 Floppy IDE SATA and SCSI Drive Connections Use the following information to connect the floppy and hard disk drive cables e The floppy disk drive cable has seven twisted wires e Ared mark on a wire typically designates the location of pin 1 e Asingle floppy disk drive ribbon cable has 34 wires and two connectors to provide for two floppy disk drives The
36. ate of California County of Santa Clara shall be the exclusive venue for the resolution of any such disputes Super Micro s total liability for all claims will not exceed the price paid for the hardware product FCC Statement This equipment has been tested and found to comply with the limits for a Class A digital device pursuant to Part 15 of the FCC Rules These limits are designed to provide reasonable protection against harmful interference when the equipment is operated in a commercial environment This equipment generates uses and can radiate radio frequency energy and if not installed and used in accordance with the manufacturer s instruction manual may cause harmful interference with radio communications Operation of this equipment in a residential area is likely to cause harmful interference in which case you will be required to correct the interference at your own expense California Best Management Practices Regulations for Perchlorate Materials This Perchlorate warning applies only to products containing CR Manganese Dioxide Lithium coin cells Perchlorate Material special handling may apply See www dtsc ca gov hazardouswaste perchlorate WARNING Handling of lead solder materials used in this product may expose you to lead a chemical known to the State of California to cause birth defects and other reproductive harm Manual Revision 1 0d Release Date March 13 2009 Unless you request and receive written permission f
37. ave Compact Flash Master Slave Jumper Settings JCF1 The JCF1 jumper allows you to as sign either master or slave status to a compact flash card populating the JIDE1 slot See the table on the right for jumper settings Jumper Setting Definition Closed Master Open SCSI Controller Enable Disable H8DMR 82 only Jumper Setting Definition Jumper 1 is used to enable or dis able the onboard SCSI controller The default setting is on pins 1 2 to enable SCSI See the table on right for jumper settings Pins 1 2 Enabled Pins 2 3 Disabled SCSI Termination Enable Disable H8DMR 82 only SCSI Term Enable Disable Jumper Settings JPA2 JPA3 Jumper Setting Definition Jumpers JPA2 and are used to enable or disable termination for the SCSI Channel A and B connector re spectively The default setting is open to enable termination See the table on right for jumper settings Open Enabled Closed Disabled Note In order for the SCSI drives to function properly please do not change the default setting enabled set by the manufacturer 2 19 H8DMR 82 H8DMR i2 User s Manual 2 8 Onboard Indicators LAN1 LAN2 LEDs The Ethernet ports located beside LAN LED the VGA port have two LEDs On Connection Speed Indicator each Gb LAN port one LED indicates LED Color Definition activity when blinking while the other LED may be amber or off to indic
38. ck Chassis Intrusion Pin Definitions JL1 Pin Definition 1 Battery voltage Intrusion signal Overheat LED Pin Definitions JOH1 Pin Definition 1 3 3V 2 OH Active H8DMR 82 H8DMR i2 User s Manual Wake On LAN The Wake On LAN header is desig nated JWOL See the table on the right for pin definitions You must have a LAN card with a Wake On LAN connector and cable to use the Wake On LAN feature Note Wake On LAN from S3 S4 S5 are supported by LAN1 LAN2 sup ports Wake On LAN from 51 only Wake On Ring The Wake On Ring header is desig nated JWOR This function allows your computer to receive and wake up by an incoming call to the modem when in suspend state See the table on the right for pin definitions You must have a Wake On Ring card and cable to use this feature PWR The PWR I C header may be used to monitor the status of the power supply fans and system temperature See the table on the right for pin definitions IPMB The IPMB header is for the System Management Bus Connect the ap propriate cable here to utilize SMB on the system See the table on the right for pin definitions Wake On LAN Pin Definitions JWOL Pin Definition 1 5V Standby 2 Ground Wake up Wake On Ring Pin Definitions JWOR Pin Definition 1 Ground Black Header Pin Definitions PWR PC Pin Definition 1 Clock 2 Data 3
39. culation is done next OAh The CMOS checksum calculation is done Initializing the CMOS status register for date and time next OBh The CMOS status register is initialized Next performing any required initialization before the keyboard BAT command is issued OCh The keyboard controller input buffer is free Next issuing the BAT command to the keyboard controller OEh The keyboard controller BAT command result has been verified Next performing any necessary initialization after the keyboard controller BAT command test OFh The initialization after the keyboard controller BAT command test is done The key board command byte is written next 10h The keyboard controller command byte is written Next issuing the Pin 23 and 24 blocking and unblocking command 11h Next checking if lt End or lt Ins gt keys were pressed during power on Initializing CMOS if the Initialize CMOS RAM in every boot AMIBIOS POST option was set in AMIBCP or the lt End gt key was pressed Next disabling DMA controllers 1 and 2 and interrupt controllers 1 and 2 The video display has been disabled Port B has been initialized Next initializing the chipset The 8254 timer test will begin next Next programming the flash ROM The memory refresh line is toggling Checking the 15 second on off time next Passing control to the video ROM to perform any required configuration before the video ROM test All necessary processing before pass
40. data next The memory size check 15 done Displaying a soft error and checking for a password or bypassing WINBIOS Setup next B 5 H8DMR 82 H8DMR i2 User s Manual Checkpoint 86h 87h Code Description The password was checked Performing any required programming before WIN BIOS Setup next The programming before WINBIOS Setup has completed Uncompressing the WINBIOS Setup code and executing the AMIBIOS Setup or WINBIOS Setup utility next Returned from WINBIOS Setup and cleared the screen Performing any necessary programming after WINBIOS Setup next The programming after WINBIOS Setup has completed Displaying the power on Screen message next Programming the WINBIOS Setup options next The WINBIOS Setup options are programmed Resetting the hard disk controller next The hard disk controller has been reset Configuring the floppy drive controller next The floppy drive controller has been configured Configuring the hard disk drive controller next Initializing the bus option ROMs from C800 next See the last page of this chapter for additional information Initializing before passing control to the adaptor ROM at C800 Initialization before the C800 adaptor ROM gains control has completed The adap tor ROM check is next The adaptor ROM had control and has now returned control to BIOS POST Perform ing any required processing after the option ROM returned control Any initialization required
41. e On Ring Header JWOR Wake up events can be triggered by a device such as the external modem ringing when the system is in the SoftOff state Note that external modem ring on can only be used with an ATX 2 01 or above compliant power supply H8DMR 82 H8DMR i2 User s Manual 1 5 Power Supply As with all computer products a stable power source is necessary for proper and reliable operation It is even more important for processors that have high CPU clock rates The H8DMR 82 H8DMR i2 accommodates 12V power supplies Although most power supplies generally meet the specifications required by the CPU some are inadequate A 2 amp current supply on a 5V Standby rail is strongly recom mended It is strongly recommended that you use a high quality power supply that meets 12V ATX power supply Specification 1 1 or above Additionally in areas where noisy power transmission is present you may choose to install a line filter to shield the computer from noise It is recommended that you also install a power surge protector to help avoid problems caused by power surges Warning To prevent the possibility of explosion do not use the wrong type of onboard CMOS battery or install it upside down Chapter 1 Introduction 1 6 Super The disk drive adapter functions of the Super I O chip include a floppy disk drive controller that is compatible with industry standard 82077 765 a data separator write pre compensation ci
42. e mainboard tray tighten until just snug if too tight you might strip the threads Metal screws provide an electrical contact to the serverboard ground to provide a continuous ground for the system 2 4 Installing Memory CAUTION Exercise extreme care when installing or removing memory modules to prevent any possible damage 1 Insert each memory module vertically into its slot paying attention to the notch along the bottom of the module to prevent inserting the module incorrectly see Figure 2 2 See support information below 2 Gently press down on the memory module until it snaps into place Note each processor has its own built in memory controller so the CPU2 DIMMs cannot be addressed if only a single CPU is installed 128 MB 256 MB 512 MB 1 GB and 2 GB memory modules are supported It is highly recommended that you remove the power cord from the system before installing or changing any memory modules Using DIMMs of the same type and speed is recommended 2 5 H8DMR 82 H8DMR i2 User s Manual Support The H8DMR 82 H8DMR i2 supports single or dual channel registered ECC DDR2 667 533 400 SDRAM Both interleaved and non interleaved memory are supported so you may populate any number of DIMM slots see note on previous page and charts on following page The CPU2 DIMM slots can only be accessed when two CPUs are installed however the CPU2 DIMM slots are not required to be populated when two CPUs are installed
43. e transferred from and to the device one sec tor at a time Select Auto to allows the data transfer from and to the device occur multiple sectors at a time if the device supports it The options are Auto and Disabled 4 6 Chapter 4 BIOS PIO Mode PIO Programmable mode programs timing cycles between the IDE drive and the programmable IDE controller As the PIO mode increases the cycle time decreases The options are Auto 0 1 2 3 and 4 Select Auto to allow AMI BIOS to auto detect the PIO mode Use this value if the IDE disk drive support cannot be determined Select 0 to allow AMI BIOS to use PIO mode 0 It has a data transfer rate of 3 3 MBs Select 1 to allow AMI BIOS to use PIO mode 1 It has a data transfer rate of 5 2 MBs Select 2 to allow AMI BIOS to use PIO mode 2 It has a data transfer rate of 8 3 MBs Select 3 to allow AMI BIOS to use PIO mode 3 It has a data transfer rate of 11 1 MBs Select 4 to allow AMI BIOS to use PIO mode 4 It has a data transfer rate of 16 6 MBs This setting generally works with all hard disk drives manufactured after 1999 For other disk drives such as IDE CD ROM drives check the specifications of the drive DMA Mode Selects the Mode Options are SWDMAO SWDMA1 SWDMA2 MWDMAO MDWDMA1 MWDMA2 UDMAO UDMA1 UDMA2 UDMAS UDMA4 and UDMAS SWDMA Single Word MWDMA Multi Word UDMA UltraDMA S M A R T Self Monitoring Analysis and Reporting Technology SMAR
44. ecting Cables ATX Power Connector The primary ATX power supply con nector JPW1 meets the SSI Super set ATX 20 pin specification Refer to the table on the right for the pin definitions of the ATX power connec tor This connection supplies power to the chipset fans and memory Note You must also connect the 8 pin JPW2 and 4 pin J32 power connectors to your power supply see below Processor Power Connector In addition to the primary ATX power connector above the 12v 8 pin processor power connector at JPW2 must also be connected to your power supply This connection supplies power to the CPUs See the table on the right for pin definitions Auxiliary Power Connector The 4 pin auxiliary power connector at J32 must also be connected to your power supply This connection sup plies extra power that may be needed for high loads See the table on the right for pin definitions NMI Button The non maskable interrupt button header is located on pins 19 and 20 of JF1 Refer to the table on the right for pin definitions 2 9 Chapter 2 Installation ATX Power 20 pin Connector Pin Defintions JPW1 Pin Definition Pin 4 Definition no 33 12 12V a 13 COM 3 4 PSON 4 5v 15 5 16 6 17 7 18 Res NC 8 19 45V 20 io Hav Processor Power Connector Pin Definitions JPW2
45. eq Select Open Auto PCI X Slots 7 Freq Select Open Auto Watch Dog Pins 1 2 Reset Description COM1 COM2 Serial Port Header System Fan Headers System Management Bus Header 4 pin Auxiliary Power Connector U320 SCSI Channel A Connector 3rd Power Supply Alarm Reset Header U320 SCSI Channel B Connector Onboard Speaker Keylock Power LED Front Panel Connector Floppy Disk Drive Connector IDE Drive Connector Chassis Intrusion Header Overheat Warning Header 20 Pin ATX Power Connector 8 Pin Processor Power Connector Power Fail Header Compact Flash Card Power Connector Wake On LAN Header Wake On Ring Header Gigabit Ethernet RJ45 Ports Power Supply Header Serial ATA Ports SGPIO Headers IPMI Card Slot Universal Serial Bus USB Ports 0 1 Additional USB Headers 1 5 H8DMR 82 H8DMR i2 User s Manual Serverboard Features CPU Single or dual AMD Opteron 2000 Series Socket F type 64 bit processors Memory Eight dual single channel DIMM slots supporting up to 64 GB of DDR2 667 533 400 registered ECC SDRAM Note Memory capacities are halved for single CPU systems Refer to Section 2 4 before installing Chipset e nVidia MCP55 Pro NEC uPD720400 Expansion Slots One 1 Universal PCI X 133 MHz slot e One 1 Universal PCI X 100 MHz slot supports ZCR on H8DMR 82 only Two 2 PCI Express x8 slots One 1 SIM1U slot for IPMI card BIOS 8Mb AMIBIOS LPC Flash ROM DMI 2 3 PCI 2 2
46. er to this chapter to connect the floppy and hard disk drives the serial ports the mouse and keyboard and the twisted wires for the power and reset buttons and the system LEDs If you encounter any problems see Chapter 3 which describes troubleshooting procedures for the video the memory and the setup configuration stored in CMOS For quick reference a general FAQ Frequently Asked Questions section is pro vided Instructions are also included for contacting technical support In addition you can visit our web site for more detailed information Chapter 4 includes an introduction to BIOS and provides detailed information on running the CMOS Setup utility Appendix A provides BIOS Error Beep Code Messages Appendix B lists BIOS POST Checkpoint Codes H8DMR 82 H8DMR i2 User s Manual Table of Contents Preface About This Manual iii Manual Organization MR iii Chapter 1 Introduction TA ER NEUE 1 1 uci CI 1 1 HSDNMEB B2Z HBDMRB 2 1 3 H8DMR 82 H8DMR i2 Serverboard Layout 1 4 H8DMR 82 H8DMR i2 Quick Reference 2 2 2 2 1 5 Sarvenpgard Features eee 1 6 nVidia MCP55 Pro Chipset System Block Diagram 1 8 1 9 1 3 PC Health MOnitoring t 1 10 1 4
47. four corners of the CPU to make sure that it is properly in stalled and flush with the socket Then gently lower the silver CPU retention plate into place 5 Carefully press the CPU socket lever down until it locks into its reten tion tab For a dual processor system repeat these steps to install another CPU into the CPU 2 socket Note if using a single processor only the CPU1 DIMM slots are addressable for a maximum of 8 GB memory 2 3 Chapter 2 Installation H8DMR 82 H8DMR i2 User s Manual Installing the Heatsink Retention Modules Two heatsink retention modules BKT 0012L and four screws are included in the retail box Once installed these are used to help attach the heatsinks to the CPUs To install align the module with the standoffs of the preinstalled CPU backplate and with the four feet on the module contacting the serverboard Secure the retention module to the backplate with two of the screws provided See Figure 2 1 Repeat for the second CPU socket Note BKT 0012L is included for use with non proprietary heatsinks only When installing proprietary heatsinks only BKT 0011L the CPU backplate is needed The BKT 0012L retention module was designed to provide compatibility with clip and cam type heatsinks from third parties Figure 2 1 CPU Heatsink Retention Module Installation Mounting screw Mounting screw 1 1 Heatsink retention module CPU socket Installing the Heatsin
48. ill control the speed of the onboard fans Select Workstation if your system is used as a Workstation Select Server if your system is used as a Server Select Disable to disable the fan speed control function to allow the onboard fans to continuously run at full speed 12V The options are 1 Full Speed 12V 2 Optimized Server w 3 pin 3 Optimized Workstation w 3 pin 4 Optimized Server w 4 pin 5 Optimized Workstation w 4 pin and 6 Optimized Quiet 4 13 H8DMR 82 H8DMR i2 User s Manual FAN1 Speed through FAN5 Speed The speeds of the onboard fans in rpm are displayed here FAN1 Speed Down Time Use the and keys to set the fan speed time interval of the ramp down FAN1 Speed Up Time Use the and keys to set the fan speed time interval of the ramp up Tolerance for Fan Control Set the fan control tolerance Options are Disabled 6 C 7 C 8 9 C and 10 C Level1 Temperature Set the reference point to transfer to the next fan speed Level2 Temperature Set the reference point to transfer to the next fan speed Level1 Level2 Level3 Fan Speed Three settings for the level 1 2 and 3 fan speeds Other items in the submenu are systems monitor displays for the following information CPU1 Temperature CPU2 Temperature for 2U systems System Temperature VCoreA VCoreB for 2U systems CPU1 Mem VTT CPU2 Mem VTT CPU1 Mem CPU2 Mem VDD 1 5V MCP55 VCcore 3 3V 12V 12V 5V VSB and
49. ing control to the video ROM is done Look ing for the video ROM next and passing control to it The video ROM has returned control to BIOS POST Performing any required pro cessing after the video ROM had control Reading the 8042 input port and disabling the MEGAKEY Green PC feature next Making the BIOS code segment writable and performing any necessary configura tion before initializing the interrupt vectors The configuration required before interrupt vector initialization has completed In terrupt vector initialization is about to begin B 3 H8DMR 82 H8DMR i2 User s Manual Checkpoint Code Description 25h Interrupt vector initialization is done Clearing the password if the POST DIAG Switch is on 27h Any initialization before setting video mode will be done next 28h Initialization before setting the video mode is complete Configuring the mono chrome mode and color mode settings next 2Ah Bus initialization system static output devices will be done next if present See the last page for additional information 2Eh Completed post video ROM test processing If the EGA VGA controller is not found performing the display memory read write test next 2Fh The EGA VGA controller was not found The display memory read write test is about to begin 30h The display memory read write test passed Look for retrace checking next 31h The display memory read write test or retrace checking failed Performing the alter
50. ion CD in the CD ROM drive restart the system When you see the prompt hit the F6 key to enter Windows setup Eventually a blue screen will appear with a message that begins Windows could not determine the type of one or more storage devices When you see the screen hit the lt S gt key to Specify Additional Device then insert the driver diskette you just created into the floppy drive Highlight Manufuacturer Supplied Hardware Support Disk and hit the Enter key Highlight the first nVidia RAID driver shown and press the Enter key to install it Soon a similar blue screen will appear again Again hit the S key then highlight the second item nForce Storage Controller and press the Enter key then lt Enter gt again to continue with the Windows setup 2 25 H8DMR 82 H8DMR i2 User s Manual 2 11 Installing Additional Drivers The CD that came bundled with the system contains software drivers some of which must be installed such as the chipset driver After inserting this CD into your CD ROM drive the display shown in Figure 2 5 should appear If this display does not appear click on the My Computer icon and then on the icon representing your CD ROM drive Finally double click on the S Setup icon Figure 2 5 Driver Tool Installation Display Screen H8DMR 82 Server Board Drivers amp Tools WinXP nVidia MCP55 Chipset Driver g SUPERMICR Microsoft Direct lt 9
51. ipset 1 5V The onboard voltage monitor will scan these voltages continuously Once a voltage becomes unstable it will give a warning or send an error message to the screen Users can adjust the voltage thresholds to define the sensitivity of the voltage moni tor Real time readings of these voltage levels are all displayed in BIOS Fan Status Monitor with Firmware Software Speed Control The PC health monitor can check the RPM status of the cooling fans The onboard fans are controlled by thermal management via BIOS CPU Overheat Fan Fail LED and Control This feature is available when the user enables the CPU overheat Fan Fail warning function in the BIOS This allows the user to define an overheat temperature When this temperature is exceeded or when a fan failure occurs then the Overheat Fan Fail warning LED is triggered Auto Switching Voltage Regulator for the CPU Core The 3 phase switching voltage regulator for the CPU core can support up to 80A and auto sense voltage IDs ranging from 0 8 V to 1 55V This will allow the regulator to run cooler and thus make the system more stable Chapter 1 Introduction 1 4 Power Configuration Settings This section describes the features of your serverboard that deal with power and power settings Slow Blinking LED for Suspend State Indicator When the CPU goes into a suspend state the chassis power LED will start blinking to indicate that the CPU is in suspend mode When the user
52. k The use of active type heatsinks except for 1U systems are recommended Con nect the heatsink fans to the appropriate fan headers on the serverboard To install the heatsinks please follow the installation instructions included with your heatsink package not included 2 4 Chapter 2 Installation 2 3 Mounting the Serverboard into a Chassis All serverboards and motherboards have standard mounting holes to fit different types of chassis Make sure that the locations of all the mounting holes for both the serverboard and the chassis match Although a chassis may have both plastic and metal mounting fasteners metal ones are highly recommended because they ground the serverboard to the chassis Make sure that the metal standoffs click in or are screwed in tightly 1 Check the compatibility of the serverboard ports and the I O shield H8DMR 82 H8DMR i2 serverboard requires a chassis that can support ex tended ATX boards of 12 x 13 05 in size Make sure that the I O ports on the serverboard align with their respective holes in the I O shield at the rear of the chassis 2 Mounting the serverboard onto the mainboard tray in the chassis Carefully mount the serverboard onto the mainboard tray by aligning the serverboard mounting holes with the raised metal standoffs in the tray Insert screws into all the mounting holes in the serverboard that line up with the standoffs Then use a screwdriver to secure the serverboard to th
53. l computer applications Load Fail Safe Defaults To set this feature select Load Fail Safe Defaults from the Exit menu and press Enter The Fail Safe settings are designed for maximum system stability but not maximum performance 4 18 Appendix A BIOS Error Beep Codes Appendix A BIOS Error Beep Codes During the POST Power On Self Test routines which are performed each time the system is powered on errors may occur Non fatal errors are those which in most cases allow the system to continue the boot up process The error messages normally appear on the screen Fatal errors are those which will not allow the system to continue the boot up pro cedure a fatal error occurs you should consult with your system manufacturer for possible repairs These fatal errors are usually communicated through a series of audible beeps The numbers on the fatal error list on the following page correspond to the number of beeps for the corresponding error All errors listed with the exception of Beep Code 8 are fatal errors POST codes may be read on the debug LEDs located beside the LAN port on the serverboard backplane See the description of the Debug LEDs LED1 and LED2 in Chapter 5 1 AMIBIOS Error Beep Codes Beep Code Error Message Description 1 beep Refresh Circuits have been reset Ready to power up 5 short 1 long Memory error No memory detected in system 8 beeps Display memory read write error Video
54. loppy disk based program Note Due to periodic changes to the BIOS some settings may have been added or deleted and might not yet be recorded in this manual Please refer to the Manual Download area of our web site for any changes to BIOS that may not be reflected in this manual Starting the Setup Utility To enter the BIOS Setup Utility hit the lt Delete gt key while the system is booting up In most cases the lt Delete gt key is used to invoke the BIOS setup screen There are a few cases when other keys are used such as lt F1 gt lt F2 gt etc Each main BIOS menu option is described in this manual The Main BIOS screen has two main frames The left frame displays all the options that can be configured Grayed out options cannot be configured The right frame displays the key legend Above the key legend is an area reserved for a text mes sage When an option is selected in the left frame it is highlighted in white Often a text message will accompany it Note that BIOS has default text messages built in We retain the option to include omit or change any of these text messages Set tings printed in Bold are the default values indicates submenu Highlighting such an item and pressing the lt Enter gt key will open the list of settings within that submenu The BIOS setup utility uses a key based navigation system called hot keys Most of these hot keys lt F1 gt lt F10 gt lt Enter gt lt ESC g
55. nd Interrupt controllers next E6h Enabling the floppy drive controller and Timer IRQs Enabling internal cache mem ory Edh Initializing the floppy drive Eeh Looking for a floppy diskette in drive A Reading the first sector of the diskette Efh A read error occurred while reading the floppy drive in drive A Next searching for AMIBOOT ROM file the root directory Eih AMIBOOT ROM file is not in the root directory by the AMIBOOT ROM file F3h Next reading the AMIBOOT ROM file cluster by cluster F4h The AMIBOOT ROM file is not the correct size F2h Next reading and analyzing the floppy diskette FAT to find the clusters occupied F5h Next disabling internal cache memory FBh Next detecting the type of flash ROM FCh Next erasing the flash ROM FDh Next programming the flash ROM FFh Flash ROM programming was successful Next restarting the system BIOS B 2 Appendix BIOS POST Checkpoint Codes B 3 Uncompressed Initialization Codes The following runtime checkpoint codes are listed in order of execution These codes are uncompressed in F0000h shadow RAM Checkpoint Code Description 03h The NMI is disabled Next checking for a soft reset or a power on condition 05 The BIOS stack has been built Next disabling cache memory Uncompressing the POST code next 07h Next initializing the CPU and the CPU data area 08h The CMOS checksum cal
56. nected short the CMOS pads with a metal object such as a small screwdriver for at least four seconds 3 Remove the screwdriver or shorting device 4 Reconnect the power cord s and power on the system Notes Do not use the PW ON connector to clear CMOS The onboard battery does not need to be removed when clearing CMOS however you must short JBT1 for at least four seconds JBT1 contact pads 3rd Power Supply Fail Detect Enable Disable The system can notify you in the event of a power supply failure This feature assumes that three redundant power supply units are installed in the chas sis If you only have one or two power supplies installed you should disable the function with the J3P header to pre vent false alarms See the table on the right for jumper settings 3rd Power Supply Fail Signal Jumper Settings J3P Jumper Setting Definition Open Disabled Closed Enabled VGA Enable Disable VGA Enable Disable JPG1 allows you to enable or disable Jumper Settings JPG1 the VGA port The default position Jumper Setting Definition is on pins 1 and 2 to enable VGA Pins 1 2 Enabled See the table on the right for jumper Pins 2 3 Disabled settings 2 17 H8DMR 82 H8DMR i2 User s Manual Watch Dog JWD controls Watch Dog a system monitor that takes action when a soft ware application freezes the system Jumping pins 1 2 will cause WD to reset the system if an application is hung up Jumpi
57. ng pins 2 3 will gen erate a non maskable interrupt signal for the application that is hung up See the table on the right for jumper settings Watch Dog can also be enabled via BIOS PCI X Slot Freq Select Jumpers JPX1A and JPX1B on the H8DMR 82 H8DMR i2 can be used to change the speed of PCI X slots 6 and PCI X slot 7 respectively See the table on the right for jumper settings Watch Dog Jumper Settings JWD Jumper Setting Definition Pins 1 2 Reset Pins 2 3 NMI Open Disabled Note When enabled the user needs to write their own application software in or der to disable the Watch Dog timer PCI X Slot Frequency Select Jumper Settings JPX1A JPX1B Jumper Setting Definition Open Auto Pins 1 2 PCI X 66 MHz Pins 2 3 PCI 66 MHz Note JPX1A controls the speed for PCI X slot 6 and JPX1B controls the speed for PCI X slot 7 The default setting for both is Auto 12 to PCI Enable Disable The JI C1 2 pair of jumpers allows you to connect the System Manage to PCI Enable Disable ment Bus to the PCI expansion slots udi robe The default setting is closed on for both jumpers to enable the connec tion Both connectors must be set the same JI C1 is for data and JI C2 is for the clock See the table on right for jumper settings Jumper Setting Definition Closed Enabled Open Disabled 2 18 Chapter 2 Installation Compact Flash Master Sl
58. o All Dimms Use this setting to enable unused clocks to all DIMMSs even if some DIMM slots are unpopulated Options are Enabled and Disabled Mem Clk Tristate C3 ALTVID Use this setting to Enable or Disable memory clock tristate during C3 and ALT VID Memory Hole Remapping When Enabled this feature enables hardware memory remapping around the memory hole Options are Enabled and Disabled gt Configuration DRAM ECC Enable DRAM ECC allows hardware to report and correct memory errors automati cally Options are Enabled and Disabled 4 Bit ECC Mode Allows the user to enabled 4 bit ECC mode also known as ECC Chipkill Options are Enabled and Disabled 4 9 H8DMR 82 H8DMR i2 User s Manual DRAM Scrub Redirect Allows system to correct DRAM ECC errors immediately even with background scrubbing on Options are Enabled and Disabled DRAM BG Scrub Corrects memory errors so later reads are correct Options are Dis abled and various times in nanoseconds and microseconds L2 Cache BG Scrub Allows L2 cache RAM to be corrected when idle Options are Disabled and various times in nanoseconds and microseconds Data Cache BG Scrub Allows L1 cache RAM to be corrected when idle Options are Disabled and various times in nanoseconds and microseconds Power Down Control Allows DIMMs to enter power down mode by deasserting the clock enable signal when DIMMs not in use Options are Auto and Disabled Memory
59. o prevent the serial port from accessing any system resources When this option is set to Disabled the serial port physically becomes unavailable Select 3F8 IRQ4 to allow the serial port to use 3F8 as its I O port address and IRQ 4 for the interrupt address The options are Disabled 3F8 IRQA 3E8 IRQ4 and 2E8 IRQ3 Serial Port2 Address This option specifies the base I O port address and Interrupt Request address of serial port 2 Select Disabled to prevent the serial port from accessing any system resources When this option is set to Disabled the serial port physically becomes unavailable Select 2F8 IRQ3 to allow the serial port to use 2F8 as its I O port address and IRQ 3 for the interrupt address The options are Disabled 2F8 IRQ3 3E8 IRQ4 and 2E8 IRQ3 4 11 H8DMR 82 H8DMR i2 User s Manual Serial Port 2 Mode Tells BIOS which mode to select for serial port 2 The options are Normal IrDA and ASKIR gt DMI Event Logging View Event Log Highlight this item and press Enter to view the contents of the event log Mark All Events as Read Highlight this item and press Enter to mark all events as read Clear Event Log Select Yes and press Enter to clear all event logs The options are Yes and No to verify gt Console Redirection Remote Access Allows you to Enable or Disable remote access If enabled the settings below will appear Serial Port Number Selects the serial port to use for con
60. parity and the NMI next The A20 address line parity and the NMI are disabled Adjusting the memory size depending on relocation and shadowing next The memory size was adjusted for relocation and shadowing Clearing the Hit lt DEL gt message next The Hit lt DEL gt message is cleared The lt WAIT gt message is displayed Starting the DMA and interrupt controller test next The DMA page register test passed Performing the DMA Controller 1 base register test next The DMA controller 1 base register test passed Performing the DMA controller 2 base register test next The DMA controller 2 base register test passed Programming DMA controllers 1 and 2 next Completed programming DMA controllers 1 and 2 Initializing the 8259 interrupt controller next Completed 8259 interrupt controller initialization Extended NMI source enabling is in progress The keyboard test has started Clearing the output buffer and checking for stuck keys Issuing the keyboard reset command next A keyboard reset error or stuck key was found Issuing the keyboard controller interface test command next The keyboard controller interface test completed Writing the command byte and initializing the circular buffer next The command byte was written and global data initialization has completed Check ing for a locked key next Locked key checking is over Checking for a memory size mismatch with CMOS RAM
61. presses any key the CPU will wake up and the LED will automatically stop blinking and remain on BIOS Support for USB Keyboard If a USB keyboard is the only keyboard in the system it will function like a normal keyboard during system boot up Main Switch Override Mechanism When an ATX power supply is used the power button can function as a system suspend button When the user depresses the power button the system will enter a SoftOff state The monitor will be suspended and the hard drive will spin down Depressing the power button again will cause the whole system to wake up Dur ing the SoftOff state the ATX power supply provides power to keep the required circuitry in the system alive In case the system malfunctions and you want to turn off the power just depress and hold the power button for 4 seconds The power will turn off and no power will be provided to the serverboard Wake On LAN JWOL Wake On LAN is defined as the ability of management application to remotely power up a computer that is powered off Remote PC setup up dates and access tracking can occur after hours and on weekends so that daily LAN traffic is kept to a minimum and users are not interrupted The serverboard has a 3 pin header JWOL to connect to the 3 pin header on a Network Interface Card NIC that has WOL capability Wake On LAN must be enabled in BIOS Note that Wake On LAN can only be used with an ATX 2 01 or above compliant power supply Wak
62. rcuitry decode logic data rate selection a clock genera tor drive interface control logic and interrupt and DMA logic The wide range of functions integrated onto the Super I O greatly reduces the number of components required for interfacing with floppy disk drives The Super I O supports two 360 K 720 K 1 2 M 1 44 M or 2 88 M disk drives and data transfer rates of 250 Kb s 500 Kb s or 1 Mb s It also provides two high speed 16550 compatible serial communication ports UARTs one of which supports serial infrared communication Each UART in cludes a 16 byte send receive FIFO a programmable baud rate generator complete modem control capability and a processor interrupt system Both UARTs provide legacy speed with baud rate of up to 115 2 Kbps as well as an advanced speed with baud rates of 250 K 500 K or 1 Mb s which support higher speed modems The Super I O supports one PC compatible printer port SPP Bi directional Printer Port BPP Enhanced Parallel Port EPP or Extended Capabilities Port ECP The Super provides functions that comply with ACPI Advanced Configuration and Power Interface which includes support of legacy and ACPI power manage ment through a SMI or SCI function pin It also features auto power management to reduce power consumption The IRQs DMAs and space resources of the Super can be flexibly adjusted to meet ISA PnP requirements which support ACPI and APM Advanced Power Management
63. rom Super Micro Computer Inc you may not copy any part of this document Information in this document is subject to change without notice Other products and companies referred to herein are trademarks or registered trademarks of their respective companies or mark holders Copyright 2009 by Super Micro Computer Inc All rights reserved Printed in the United States of America Preface Preface About This Manual This manual is written for system integrators PC technicians and knowledgeable PC users It provides information for the installation and use of the H8DMR 82 H8DMR i2 serverboard The H8DMR 82 H8DMR i2 is based on the nVidia amp MCP55 Pro NEC uPD720400 chipset and supports single or dual AMD Opteron 2000 Series Socket F type processors and up to 64 GB of DDR2 667 533 400 registered ECC SDRAM Please refer to the serverboard specifications pages on our web site for updates on supported processors http www supermicro com aplus This product is intended to be professionally installed Manual Organization Chapter 1 includes a checklist of what should be included in your serverboard box describes the features specifications and performance of the serverboard and provides detailed information about the chipset Chapter 2 begins with instructions on handling static sensitive devices Read this chapter when installing the processor s and memory modules and when installing the serverboard in a chassis Also ref
64. s Manual DDR2 667 533 400 128 bit data 16 bit ECC 128 bit data 16 bit ECC DIMM1B DIMM 1 DDR2 667 533400 DIMM2A AMD Opteron AMD Opteron 2 2 Processor CPU2 Processor CPU1 DIMMTA DIMM 2A DIMM1B 16 x 16 HT link 1 GHz IDE 133 PCI X 100 MHz Slot uPD720400 9589 MCP55 Pro PCI X 133 MHz Slot SATA Ports 6 USB Ports 4 AIC 7902W ATI RN50 GLAN Ports 2 8 Slot SCSI Ports 2 LPC x8 Slot Y Y SI O BIOS Y Serial Ports Mouse 2 Figure 1 3 nVidia MCP55 Pro NEC uPD720400 Chipset System Block Diagram Note This is a general block diagram and may not exactly represent the features on your serverboard See the previous pages for the actual specifications of your serverboard Chapter 1 Introduction 1 2 Chipset Overview The H8DMR 82 H8DMR i2 serverboard is based on the nVidia MCP55 Pro NEC uPD720400 chipset The nVidia MCP55 Pro functions as Media and Communica tions Processor MCP and the NEC chip as a PCI X Tunnel Controllers for the system memory are integrated directly into the AMD Opteron processors MCP55 Pro Media and Comm
65. sole redirection Options are COM1 and 2 Serial Port Mode Selects the serial port settings to use Options are 115200 8 n 1 57600 8 1 38400 8 1 19200 8 1 and 09600 8 1 Flow Control Selects the flow control to be used for console redirection Options are None Hardware and Software Redirection After BIOS POST Chapter 4 BIOS Options are Disable no redirection after BIOS POST Boot Loader redirection during POST and during boot loader and Always redirection always active Note that some OS s may not work with this set to Always Terminal Type Selects the type of the target terminal Options are ANSI VT100 and VT UTF8 VT UTF8 Combo Key Support Allows you to Enable or Disable VT UTF8 combination key support for ANSI VT100 terminals Sredir Memory Display Delay Use this setting to set the delay in seconds to display memory information Op tions are No Delay 1 sec 2 secs and 4 secs Hardware Health Configuration CPU Overheat Alarm Use the and keys to set the CPU temperature threshold to between 65 and 90 C When this threshold is exceeded the overheat LED on the chas sis will light up and an alarm will sound The LED and alarm will turn off once the CPU temperature has dropped to 5 degrees below the threshold set The default setting is 72 C System Fan Monitor Fan Speed Control This feature allows the user to determine how the system w
66. ssor s and the heatsink s 2 Install the serverboard in the chassis 3 Install the memory and add on cards 4 Finally connect the cables and install the drivers 2 1 H8DMR 82 H8DMR i2 User s Manual 2 2 Processor and Heatsink Installation sor Always connect the power cord last and always remove it be Exercise extreme caution when handling and installing the proces fore adding removing or changing any hardware components Installing the CPU Backplates Two CPU backplates BKT 0011L have been preinstalled to the serverboard to prevent the CPU area of the serverboard from bending and to provide a base for attaching the heatsink retention modules Installing the Processor install to the CPU 1 socket first 1 Begin by removing the cover plate that protects the CPU Lift the lever on CPU socket 1 until it points straight up With the lever raised lift open the silver CPU retention plate Triangles 2 Use your thumb and your index finger to hold the CPU Locate and align pin 1 of the CPU socket with pin 1 of the CPU Both are marked with a triangle 2 2 3 Align pin 1 of the CPU with pin 1 of the socket Once aligned carefully place the CPU into the socket Do not drop the CPU on the socket move the CPU horizontally or vertically or rub the CPU against the socket or against any pins of the socket which may damage the CPU and or the socket 4 With the CPU inserted into the socket inspect the
67. t lt Arrow gt keys etc can be used at any time during the setup navigation process 4 1 H8DMR 82 H8DMR i2 User s Manual 4 2 Main Menu When you first enter AMI BIOS Setup Utility you will see the Main Menu screen You can always return to the Main Menu by selecting the Main tab on the top of the screen with the arrow keys The Main Menu screen provides you with a system overview which includes the version built date and ID of the AMIBIOS the type speed and number of the processors in the system and the amount of memory installed in the system System Time System Date You can edit this field to change the system time and date Highlight System Time or System Date using the Arrow keys Enter new values through the keyboard Press the lt Tab gt key or the Arrow keys to move between fields The date must be entered in DAY MM DD YYYY format The time is entered in HH MM SS format Please note that time is in a 24 hour format For example 5 30 A M appears as 05 30 00 and 5 30 P M as 17 30 00 4 3 Advanced Settings Menu gt BOOT Features Quick Boot If Enabled this option will skip certain tests during POST to reduce the time needed for the system to boot up The options are Enabled and Disabled Quiet Boot If Disabled normal POST messages will be displayed on boot up If Enabled this display the OEM logo instead of POST messages OS Installation Change this setting if using a 64 bit Linux operating
68. the OS installation If you wish to have the OS on a SATA RAID array you must follow the procedure below and install the driver during the OS installation Building a Driver Diskette You must first build a driver diskette from the Supermicro CD ROM that was included with the system You will have to create this disk on a computer that is already running and with the OS installed Insert the CD into your CD ROM drive and start the system A display as shown in Figure 2 5 will appear Click on the icon labeled Build Driver Diskettes and Manuals and follow the instructions to create a floppy disk with the driver on it Once it s been created remove the floppy and insert the installation CD for the Windows Operating System you wish to install into the CD ROM drive of the new system you are about to configure Enabling SATA RAID in the BIOS Before installing the Windows Operating System you must change some settings in BIOS Boot up the system and hit the Del key to enter the BIOS Setup Utlility After the Setup Utility loads 1 Use the arrow keys to move to the Exit menu Scroll down with the arrow keys to the Load Optimal Defaults setting and press Enter Select OK to confirm then Enter to load the default settings 2 24 Chapter 2 Installation 2 Use the arrow keys to move to Advanced gt Floppy IDE SATA Configuration gt nVidia RAID Setup and press the lt Enter gt key Once in the submenu enable the nVidia
69. the amount of data transferred Only 512 bytes of data can be transferred per interrupt if block mode is not used Block mode allows transfers of up to 64 KB per interrupt Select Disabled to allow the data to be transferred from and to the device one sec tor at a time Select Auto to allows the data transfer from and to the device occur multiple sectors at a time if the device supports it The options are Auto and Disabled PIO Mode PIO Programmable mode programs timing cycles between the IDE drive and the programmable IDE controller As the PIO mode increases the cycle time decreases The options are Auto 0 1 2 3 and 4 Select Auto to allow AMI BIOS to auto detect the PIO mode Use this value if the IDE disk drive support cannot be determined Select 0 to allow AMI BIOS to use PIO mode 0 It has a data transfer rate of 3 3 MBs Select 1 to allow AMI BIOS to use PIO mode 1 It has a data transfer rate of 5 2 MBs Select 2 to allow AMI BIOS to use PIO mode 2 It has a data transfer rate of 8 3 MBs Select 3 to allow AMI BIOS to use PIO mode 3 It has a data transfer rate of 11 1 MBs Select 4 to allow AMI BIOS to use PIO mode 4 It has a data transfer rate of 16 6 MBs This setting generally works with all hard disk drives manufactured after 1999 For other disk drives such as IDE CD ROM drives check the specifications of the drive 4 5 H8DMR 82 H8DMR i2 User s Manual DMA Mode Selects the Mode Options are SWDMA
70. the problem include the following information when contacting us for technical support e model and PCB revision number e BIOS release date version this be seen on the initial display when your system first boots up e System configuration An example of a Technical Support form is posted on our web site 4 Distributors For immediate assistance please have your account number ready when contacting our technical support department by e mail 3 3 Frequently Asked Questions Question What type of memory does my serverboard support Answer The H8DMR 82 H8DMR i2 supports up to 64 GB of DDR2 667 533 400 registered ECC SDRAM with two CPUs installed With only one CPU installed the maximum memory support is halved See Section 2 4 for details on installing memory Question How do update my BIOS Answer It is recommended that you not upgrade your BIOS if you are not experi encing problems with your system Updated BIOS files are located on our web site Please check our BIOS warning message and the information on how to update your BIOS on our web site Also check the current BIOS revision and make sure itis newer than your current BIOS before downloading Select your mainboard model on the web page and download the corresponding BIOS file to your computer Unzip the BIOS update file in which you will find the readme txt flash instructions the afudos exe BIOS flash utility and the BIOS image xx
71. to support two drives This special cable must be used to take advantage of the speed the ATA133 technology offers Connect the blue connector to the onboard IDE header and the other connector s to your hard drive s Consult the documentation that came with your disk drive for details on actual jumper locations and settings 3 4 Returning Merchandise for Service A receipt or copy of your invoice marked with the date of purchase is required be fore any warranty service will be rendered You can obtain service by calling your vendor for a Returned Merchandise Authorization RMA number When returning to the manufacturer the RMA number should be prominently displayed on the outside of the shipping carton and mailed prepaid or hand carried Shipping and handling charges will be applied for all orders that must be mailed when service is complete For faster service RMA authorizations may be requested online http www supermicro com support rma This warranty only covers normal consumer use and does not cover damages in curred in shipping or from failure due to the alteration misuse abuse or improper maintenance of products During the warranty period contact your distributor first for any product problems 3 4 Chapter 4 BIOS Chapter 4 BIOS 4 1 Introduction This chapter describes the AMIBIOS Setup utility for the HEDMR 82 H8DMR i2 The AMI ROM BIOS is stored in a flash chip and can be easily upgraded using a f
72. tors or jumpers 1 4 za JRWE J32 JPW1 ES 595 om JPW2 5 DIMM 1B o Bie DIMM 1 a DIMM 2B 5 2 DIMM 2A SIM1U FAN1 JBT1 9 DA4 N Battery JPX1A JPX1B JFC1 JEC2 FANE CPU2 FANS 51000 uPD720400 tc nos FAN4 a Slot 7 100 MHz PCI X ZCR PCI Exp x8 d Slot 6 133 MHz PCI X PCI Exp x8 E a CPU1 nVidia gt MCP55 FANS JPA2 DIMM 2A D AIC 7902W Speaker q B yes p 58 DIMM 2B DA2 _ DIMM 1 spat DA1 5 2401 DIMM 1B USB2 3 JCF1 JFDD1 1 0320 SCSI 2 4 JIDE1 Notes Chapter 1 Introduction H8DMR 82 H8DMR i2 Quick Reference Jumpers J3P JBT1 JCF1 2 1 2 1 JPA2 JPA3 JPG1 JPX1A JPX1B JWD Connectors COM1 COM2 FAN 1 5 IPMB J32 JA1 JAR JB1 JD1 JFDD1 JIDE1 JL1 JPW1 JPW2 JPWF JWF1 JWOL JWOR LAN1 2 PWR lC SATAO 5 5 SGPIO1 SGPIO2 SIM1U USBO 1 USB2 3 H8DMHR 82 only Description Default Setting 3rd Power Fail Detect En Dis Closed Enabled CMOS Clear See Section 2 7 Compact Flash Master Slave Closed Master to PCI Enable Disable Closed Enabled SCSI Enable Disable Pins 1 2 Enabled SCSI Channel A B Term Open Enabled VGA Enable Disable Pins 1 2 Enabled PCI X Slot 6 Fr
73. unications Processor The MCP55 Pro is a single chip high performance HyperTransport peripheral con troller It includes a 28 lane PCI Express interface an AMD Opteron 16 bit Hyper Transport interface link a six port Serial ATA interface a dual port Gb Ethernet interface an ATA133 100 bus master interface and a USB 2 0 interface This hub connects directly to CPU 1 and through that to CPU 2 NEC uPD720400 This I O bridge chip provides two PCI X domains Each bridge supports masters that include clock request and grant signals This hub connects to the MCP55 Pro through a PCI Express x8 Bus It also interfaces directly with the Adaptec SCSI controller HyperTransport Technology HyperTransport technology is a high speed low latency point to point link that was designed to increase the communication speed by a factor of up to 48x between integrated circuits This is done partly by reducing the number of buses in the chipset to reduce bottlenecks and by enabling a more efficient use of memory in multi processor systems The end result is a significant increase in bandwidth within the chipset 1 9 H8DMR 82 H8DMR i2 User s Manual 1 3 PC Health Monitoring This section describes the PC health monitoring features of the HGaDMR 82 H8DMR i2 The serverboard has an onboard System Hardware Monitor chip that supports PC health monitoring Onboard Voltage Monitors for two CPU cores Hyper Transport 1 2V memory banks 1 8V ch
74. upermicro nl Technical Support rma supermicro nl Customer Support Asia Pacific Address Super Micro Computer Inc 4F No 232 1 Liancheng Rd Chung Ho 235 Taipei County Taiwan R O C Tel 886 2 8226 3990 Fax 886 2 8226 3991 Web Site www supermicro com tw Technical Support Email support supermicro com tw Tel 886 2 8228 1366 ext 132 or 139 1 2 Chapter 1 Introduction Figure 1 1 H3DMR 82 H8DMR i2 Image D S WA wee fe LP re 1 8 The H8DMR 82 is pictured The 8 12 shares the same layout but with no SCSI components connectors or jumpers 1 3 H8DMR 82 H8DMR i2 User s Manual Figure 1 2 H3DMR 82 H8DMR i2 Serverboard Layout not drawn to scale IPMB Co PWR 1 Jumpers not indicated are for test purposes only 2 H8DMR i2 has the same layout as the 8 82 but with no SCSI compo nents connec
75. uration Onboard Floppy Controller Use this setting to Enable or Disable the onboard floppy controller Floppy A Move the cursor to these fields via up and down lt arrow gt keys to select the floppy type The options are Disabled 360 KB 5 1 4 1 2 5 1 4 720 KB 3 1 44 3 and 2 88 MB 37 Onboard IDE Controller There is a single floppy controller on the motherboard which may be Enabled or Disabled with this setting Serial ATA Devices This setting is used to determine if SATA drives will be used and how many Op tions are Disabled Device 0 Device 0 1 and Device 0 1 2 gt nVidia RAID Setup nVidia RAID Function This setting is used to Enable or Disable the nVidia ROM If Enabled the set ting below will appear 5 0 1 2 Primary Secondary Channel This setting is used to Enable or Disable the SATAO Primary SATAO Second ary SATA1 Primary SATA1 Secondary SATA2 Primary and SATA2 Secondary channels six settings total 4 4 Chapter 4 BIOS Primary IDE Master Slave Highlight one of the items above and press lt Enter gt to access the submenu for that item Type Select the type of device connected to the system The options are Not Installed Auto CDROM and ARMD LBA Large Mode LBA Logical Block Addressing is a method of addressing data on a disk drive The options are Disabled and Auto Block Multi Sector Transfer Block mode boosts IDE drive performance by increasing
76. wer Down and Power Cycle 4 4 Boot Menu This feature allows the user to configure the following items gt Boot Device Priority This feature allows the user to prioritize the boot sequence from the available de vices The devices to set are 1st Boot Device 2nd Boot Device 3rd Boot Device 4th Boot Device gt Disk Drives This feature allows the user to specify the boot sequence from available hard disk drives 1st Drive Specifies the boot sequence for the 1st Hard Drive gt Removable Drives This feature allows the user to specify the Boot sequence from available remov able drives 1st Drive Specifies the boot sequence for the 1st Removable Drive The options are 1st Floppy Drive and Disabled 4 16 4 5 gt CD DVD Drives This feature allows the user to specify the Boot sequence from available CD DVD drives OS Installation Change this setting if using a 64 bit Linux operating system The available options are Other and 64 bit Linux 2 6 9 4 5 Security Menu AMI BIOS provides a Supervisor and a User password If you use both passwords the Supervisor password must be set first Change Supervisor Password Select this option and press lt Enter gt to access the sub menu and then type in the password Change User Password Select this option and press lt Enter gt to access the sub menu and then type in the password Boot Sector Virus Protection
77. x rom files Copy these files to a bootable floppy disk insert the disk into drive A and reboot the system At the DOS prompt after rebooting enter the command flash without quotation marks then type in the BIOS file that you want to update with xxxx rom Question What s on the CD that came with my serverboard Answer The supplied compact disc has quite a few drivers and programs that will greatly enhance your system We recommend that you review the CD and install the applications you need Applications on the CD include chipset drivers for Windows and security and audio drivers 3 3 H8DMR 82 H8DMR i2 User s Manual Question Why can t I turn off the power using the momentary power on off switch Answer The instant power off function is controlled in BIOS by the Power But ton Mode setting When the On Off feature is enabled the serverboard will have instant off capabilities as long as the BIOS has control of the system When the Standby or Suspend feature is enabled or when the BIOS is not in control such as during memory count the first screen that appears when the system is turned on the momentary on off switch must be held for more than four seconds to shut down the system This feature is required to implement the ACPI features on the serverboard Question How do connect the ATA133 cable to my IDE device s Answer The 80 wire 40 pin high density ATA133 IDE cable that came with your system has two connectors

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