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Supermicro MBD-H8DAR-E-O motherboard

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1. C JWD J22 124 J32 ATX Power J1B4 J101 Ca JP ap ES Winona CPU2 DIMM 1B JPW2 J132 Super CPU2 DIMM CPU2 DIMM 2B 1U IPMI 5 CPU2 DIMM 2A 0 5 9 JPG1 BIOS Rage XL Graphics FAN2 Broadcom BCM5704 PCI X 133 MHz 7 JLAN1 FAN3 PCI X 133 MHz 6 CECI PU1 JLAN2 JFC2 CPU PL VGA 885 6081 FAN4 AMD 8132 8111 CPU1 DIMM 2A CPU1 DIMM 2B SPKR JPS2 CPU1 DIMM 1A L2 PST CPU1 DIMM 1B 00 2 59 JIDE 2 USB2 3 FANS 4 JFDD1 JIDE 1 JS10 won gt M SATA0 M SATA1 M SATA2 M SATA3 Notes Jumpers not indicated are for test purposes only Serial ATA components connectors and jumpers are for the H8DAR T only Chapter 1 Introduction H8DAR T H8DAR E Quick Reference Jumpers J3P JBT1 Jl C1 2 JPG1 JPL JPS1 JPS2 JWD Connectors 1U IPMI COM1 COM2 FAN 1 5 J22 J32 J101 J132 J1B4 JAR JD1 JF1 JFDD1 JIDE 1 JIDE 2 JK1 JL1 JLAN1 2 JOH1 JP10 JPW2 M SATA0 3 JS9 JS10 JWOL JWOR SPKR USB0 1 USB2 3 4 VGA H8DAR T only De
2. 2 16 SATA Controller 2 16 Onboard Speaker Enable Disable i rina ie ruinae 2 17 3rd Power Supply Fail Signal Enable Disable 2 17 Watch Dog Enable Disable 2 17 SATA Firmware F ashi uu u eiit ricette rena re 2 18 2 8 Onboard Indicators 2 18 2 18 Power D umu uum uu u NE Nias kasus 2 18 2 9 Floppy IDE and SATA Drive Connections 2 19 Floppy ge Ty lg etc a au eee ene eer 2 19 2 20 SATA Connectors 11 2 2 16 60 01 0000000000000000 2 20 2 10 Enabling SATA RAID or 2 21 Chapter 3 Troubleshooting 3 1 Troubleshooting Procedures esses cei eto qr iriad enii ane 3 1 3 1 H8DAR T H8DAR E User s Manual alguno Ha esd becca 3 1 3 1 c 3 2 Losing the System s Setup Configuration 3 2 3 2 Technical Support Procedures pesa oe 3 2 3 3 Frequently Asked Quest
3. Note Notch Sea should align with the receptive point on the slot Note the notch in the slot and on the bottom of the DIMM These prevent the DIMM from being installed incorrectly Top View of DDR Slot Release Tab Release Tab 2 5 H8DAR T H8DAR E User s Manual Populating Memory Banks for 128 bit Operation CPU1 CPU1 CPU1 CPU1 CPU2 CPU2 CPU2 CPU2 DIMM1A DIMM1B DIMM2A DIMM2B DIMM1A DIMM1B DIMM2A DIMM2B x x x x x x x x x x x x x x x x x x x x x x x x x x x x X x x x amp x x x x x x x x x x X x x x X Notes X indicates a populated DIMM slot If adding at least four DIMMs with two CPUs installed the configurations with DIMMs spread over both CPUs and not like the con figuration in row 5 will result in optimized performance Note that the first two DIMMs must be installed in the CPU1 memory slots Populating Memory Banks for 64 bit Operation CPU1 CPU1 CPU1 CPU1 CPU2 CPU2 CPU2 CPU2 DIMM1A DIMM1B DIMM2A DIMM2B DIMM1A DIMM1B DIMM2A DIMM2B 2 6 Chapter 2 Installation 2 5 Port and Control Panel Connections The I O ports are color coded in conformance with the PC99 specification to make setting up your system easier See Figure 2 3 below for the colors and locations of the
4. Watch Dog Watch Dog is a system monitor that Jumper Settings JWD can reboot the system when a software Jumper Setting Definition application hangs Pins 1 2 will cause Pins 1 2 Reset WD to reset the system if an applica Pins 2 3 NMI tion has frozen Pins 2 3 will generate CERE Disabled a non maskable interrupt signal for the application that is frozen See the table Note Wien enabled the user needs to on the right for jumper settings Watch write their own application software in or Dog must also be enabled in BIOS der to disable the Watch Dog Timer 2 17 H8DAR T H8DAR E User s Manual SATA Firmware Flash H8DAR T SATA Firmware Flash Jumper Settings JPS2 Jumper JPS2 is used to flash the firm ware for the SATA controller The de fault setting is open See the table on right for jumper settings Jumper Setting Definition Open Normal Closed Flash Firmware Note this jumper is intended for manu facturing purposes only 2 8 Onboard Indicators JLAN1 JLAN2 LEDs The Ethernet ports located beside the VGA port have two LEDs On each Gb LAN port the yellow right LED indicates activity while the left LED may be green amber or off to indicate the speed of the connection See the table on the right for the func tions associated with the left activity speed LED JLAN Left LED Connection Speed Indicator LED Color Off 10 Mb s Definition
5. 2 4 Chapter 2 Installation Support The H8DAR T H8DAR E supports single or dual channel registered ECC DDR400 333 266 SDRAM Both interleaved and non interleaved memory are supported so you may populate any number of DIMM slots see note on previous page and charts on following page The CPU2 DIMM slots can only be accessed when two CPUs are installed however the CPU2 DIMM slots are not required to be populated when two CPUs are installed Populating two adjacent slots at a time with memory modules of the same size and type will result in interleaved 128 bit memory which is faster than non interleaved 64 bit memory Optimizing memory performance If two processors are installed it is better to stagger pairs of DIMMs across both sets of CPU DIMM slots e g first populate CPU1 slots 1A and 1B then CPU2 slots 1A and 1B then the next two CPU1 slots etc This balances the load over both CPUs to optimize performance Maximum memory two CPUs 32 GB for DDR333 266 and 16 GB for DDR400 If only one CPU is installed maximum supported memory is halved 16 GB for DDR266 and 8 GB for DDR400 333 Figure 2 2 Side and Top Views of DDR Installation To Install Insert module vertically and press down until it snaps into place The release tabs should close if they do not you should close them yourself To Remove Use your thumbs to gently push each re lease tab outward to release the DIMM from the slot
6. Note The speaker connector pins are for use with an external speaker you wish to use the onboard speaker you should close pins 6 and 7 with a jumper ATX PS 2 Keyboard and PS 2 Mouse Ports The ATX PS 2 keyboard and the PS 2 mouse ports are located at J101 and J132 respectively See the table on the right for pin definitions Wake On Ring The Wake On Ring header is desig nated JWOR This function allows your computer to receive and wake up by an incoming call to the modem when in suspend state See the table on the right for pin definitions You must have a Wake On Ring card and cable to use this feature Wake On LAN The Wake On LAN header is desig nated JWOL See the table on the right for pin definitions You must have a LAN card with a Wake On LAN connector and cable to use the Wake On LAN feature 2 12 PWR LED Connector Pin Definitions JD1 Pin Definition 1 2 Vcc Speaker Connector Pin Definitions JD1 Pin Definition 4 Red wire Speaker data No connection 5 6 Buzzer signal 7 Speaker data PS 2 Keyboard and Mouse Port Pin Definitions J101 J132 Pin Definition Pin Definition 1 Data 2 NC 5 Clock Wake On Ring Pin Definitions JWOR Pin Definition 1 Ground Black Wake up Wake On LAN Pin Definitions JWOL Pin Definition 5V Standby Ground Wake up Chassis Intrusion A Chassis I
7. Parallel Port Address This option specifies the I O address used by the parallel port Select Disabled to prevent the parallel port from accessing any system resources When the value of this option is set to Disabled the printer port becomes unavailable Select 378 to allow the parallel port to use 378 as its I O port address The majority of parallel ports on computer systems use 7 and Port 378H as the standard setting Select 278 to allow the parallel port to use 278 as its I O port address Select 3BC to allow the parallel port to use 3BC as its I O port address Parallel Port Mode Specify the parallel port mode The options are Normal Bi directional EPP and ECP Parallel Port IRQ Select the IRQ interrupt request for the parallel port The options are IRQ5 and IRQ7 gt ACPI Configuration ACPI Aware OS Use this setting to tell BIOS if the operating system recognizes ACPI functions The options are Yes and No p Advanced ACPI Configuration ACPI 2 0 Support Select Yes if your system supports ACPI 2 0 which will add additional tables as per ACPI 2 0 specifications Options are Yes and No ACPI APIC Support Select Enabled to allow the ACPI APIC Table Pointer to be included in the RSDT pointer list The options are Enabled and Disabled ACPI SRAT Table This setting allows you to enable or disable the building of an ACPI SRAT table Options are Enabled and Disabled 4 6 Chapter 4 BIOS
8. 57h 58h 59h 60h 62h 65h 66h 67h 7Fh 80h 81 82h 83h 84h 85h Code Description The memory below 1 MB has been cleared via a soft reset Clearing the memory above 1 MB next The memory above 1 MB has been cleared via a soft reset Saving the memory size next Going to checkpoint 52h next The memory test started but not as the result of a soft reset Displaying the first 64 KB memory size next The memory size display has started The display is updated during the memory test Performing the sequential and random memory test next The memory below 1 MB has been tested and initialized Adjusting the displayed memory size for relocation and shadowing next The memory size display was adjusted for relocation and shadowing The memory above 1 MB has been tested and initialized Saving the memory size information next The memory size information and the CPU registers are saved Entering real mode next Shutdown was successful The CPU is in real mode Disabling the Gate A20 line parity and the NMI next The A20 address line parity and the NMI are disabled Adjusting the memory size depending on relocation and shadowing next The memory size was adjusted for relocation and shadowing Clearing the Hit lt DEL gt message next The Hit lt DEL gt message is cleared The lt WAIT gt message is displayed Starting the DMA and interrupt controller test next The DMA page register
9. If not contact your manufacturer or install an ATA 133 IDE controller card that supports 48 bit LBA mode The options are Disabled and Auto Block Multi Sector Transfer Block mode boosts IDE drive performance by increasing the amount of data transferred Only 512 bytes of data can be transferred per interrupt if block mode is not used Block mode allows transfers of up to 64 KB per interrupt Select Disabled to allow the data to be transferred from and to the device one sec tor at a time Select Auto to allows the data transfer from and to the device occur multiple sectors at a time if the device supports it The options are Auto and Disabled PIO Mode PIO Programmable mode programs timing cycles between the IDE drive and the programmable IDE controller As the PIO mode increases the cycle time decreases The options are Auto 0 1 2 3 and 4 Select Auto to allow AMI BIOS to auto detect the PIO mode Use this value if the IDE disk drive support cannot be determined Select 0 to allow AMI BIOS to use PIO mode 0 It has a 4 3 H8DAR T H8DAR E User s Manual data transfer rate of 3 3 MBs Select 1 to allow AMI BIOS to use PIO mode 1 for a data transfer rate of 5 2 MBs Select 2 to allow AMI BIOS to use PIO mode 2 for a data transfer rate of 8 3 MBs Select 3 to allow AMI BIOS to use PIO mode 3 for a data transfer rate of 11 1 MBs Select 4 to allow AMI BIOS to use PIO mode 4 for a data transfer rate of 16 6 MBs This sett
10. If you stop the build or clear process on RAID 1 from ACU you can restart it by pressing lt Ctrl gt lt R gt 3 A RAID 1 created using the Quick Init option may return some data mis com pares if you later run a consistency check This is normal and is not a cause for concern 4 The ACU allows you to use drives of different sizes in a RAID However during a build operation only the smaller drive can be selected as the source or first drive 5 When migrating from single volume to RAID 0 migrating from a larger drive to a smaller drive is allowed However the destination drive must be at least half the capacity of the source drive 6 Adaptec does not recommend that you migrate or build an array on Windows dynamic disks volumes as it will result in data loss Warning Do not interrupt the creation of RAID 0 using the Migrate option If you do you will not be able to restart or to recover the data that was on the source drive Adding a Bootable Array 1 From the Main menu select Manage Arrays 2 From the list of arrays select the array you want to make bootable and press Ctrl lt B gt 3 Enter to create a bootable array when the following message is displayed This will make all other existing bootable array non bootable Do you want to make this array bootable Yes No A bootable array will then be created An asterisk will appear next to the bootable array Deleting a Bootable Array 1 Fro
11. Table of Contents Universal Serial Bus Ports USB0 1 2 10 Extra USB H aderssix 2 11 Serial 2 11 Fan Headers 2 11 Power Fail and Alarm Reset Header 2 11 Power 2 12 ATX PS 2 Keyboard Mouse Ports 2 12 RESO NOME 2 12 Ci uo E 2 12 Chassis 1 1 2 2 1 0000006 000000000000 2 13 JLAN1 2 Ethernet Ports is ehe 2 13 SATA Head6r u a eden eR rra e nei tine Pent E ONES 2 13 SMB 2 13 Overheat WED 2 14 Seral ATA Activity LE 2 14 42 2 14 2 7 2 15 Explanation rae oi ces 2 15 GMOS Cleat Rp 2 15 JLAN1 2 Enable Disable 222 2 1 1 01 00000000 2 16 VGA Enable Disable 2 16 12 to PCI
12. 5 1 4 720 312 1 44 37 and 2 88 MB 37 Floppy B Move the cursor to these fields via up and down arrow keys to select the floppy type The options are Disabled 360 KB 5 1 4 1 2 MB 5 1 4 720 KB 31 1 44 MB 377 2 88 MB 37 Onboard Floppy Controller Use this setting to Enable or Disable the onboard floppy controller gt Super IO Configuration Serial Port1 Address This option specifies the base I O port address and Interrupt Request address of serial port 1 Select Disabled to prevent the serial port from accessing any system resources When this option is set to Disabled the serial port physically becomes unavailable Select 3F8 IRQ4 to allow the serial port to use 3F8 as its port address and IRQ 4 for the interrupt address The options are Disabled 3F8 IRQA 3E8 IRQ4 and 2E8 IRQ3 Serial Port2 Address This option specifies the base I O port address and Interrupt Request address of serial port 2 Select Disabled to prevent the serial port from accessing any system resources When this option is set to Disabled the serial port physically becomes unavailable Select 2F8 IRQ3 to allow the serial port to use 2F8 as its I O port address and IRQ 3 for the interrupt address The options are Disabled 2F8 IRQ3 3E8 IRQ4 and 2E8 IRQ3 Serial Port 2 Mode Tells BIOS which mode to select for serial port 2 The options are Normal IrDA and ASKIR 4 5 H8DAR T H8DAR E User s Manual
13. Above the key legend is an area reserved for a text mes sage When an option is selected in the left frame it is highlighted in white Often a text message will accompany it Note that BIOS has default text messages built in We retain the option to include omit or change any of these text messages Set tings printed in Bold are the default values p indicates submenu Highlighting such an item and pressing the lt Enter gt key will open the list of settings within that submenu The BIOS setup utility uses a key based navigation system called hot keys Most of these hot keys lt F1 gt lt F10 gt lt Enter gt lt ESC gt lt Arrow gt keys etc can be used at any time during the setup navigation process 4 1 H8DAR T H8DAR E User s Manual 4 2 Main Setup When you first enter AMI BIOS Setup Utility you will see the Main setup screen You can always return to the Main setup screen by selecting the Main tab on the top of the screen The Main Setup screen provides you with a system overview which includes the version built date and ID of the AMIBIOS the type speed and number of the processors in the system and the amount of memory installed in the system System Time System Date You can edit this field to change the system time and date Highlight System Time or System Date using the Arrow keys Enter new values through the keyboard Press the lt Tab gt key or the Arrow keys to move between fields
14. BIOS gt AML ACPI Table When Enabled BIOS gt AML exchange table pointer to be included in X REDT pointer list Options are Enabled and Disabled Headless Mode Select Enabled to activate the Headless Operation Mode through ACPI The options are Enabled and Disabled OS Console Redirection When Enabled BIOS provides additional options to select remote access type The options are Enabled and Disabled PME R1 55 Wake Up The options are Enabled and Disabled p Event Log Configuration View Event Log Highlight this item and press lt Enter gt to view the contents of the event log Mark All Events as Read Highlight this item and press lt Enter gt to mark the DMI events as read Clear Event Log This setting will clear all event logs when set to OK The options are OK and Cancel Event Log Statistics Highlight this item and press lt Enter gt to view details on the count of total unread events gt Hyper Transport Configuration CPUO CPU1 HT Link1 Speed The HT link will run at the speed specified in this setting if it is slower than or equal to the system clock and if the board is capable Options are Auto 200 MHz 400 MHz and 600 MHz 4 7 H8DAR T H8DAR E User s Manual CPUO CPU1 HT Link1 Width The HT link will run at the width specified in this setting Options are Auto 2 bit 4 bit 8 bit and 16 bit CPUO HT Link1 Speed The HT link will run at the speed specified
15. Tempera ture CPU1 Vcore CPU2 Vcore for dual CPU systems 3 3V Vcc 5 Vin 12Vin 12V Vcc and battery voltage gt System Fan Monitor Fan Speed Control Modes This feature allows the user to determine how the system will control the speed of the onboard fans If the option is set to 3 pin fan the fan speed is controlled based upon the CPU die temperature When the CPU die temperature is higher the fan speed will be higher as well Select 3 pin if your chassis came with 3 pin fan headers Select Workstation if your system is used as a Workstation Select Server if your system is used as a Server Select Disable to disable the fan speed control function to allow the onboard fans to continuously run at full speed 12V The options 1 Disable Full Speed 2 3 pin Server and 3 3 pin Workstation FAN1 Speed through FAN5 Speed The speeds of the onboard fans in rpm are displayed here 4 9 H8DAR T H8DAR E User s Manual 4 4 PCI PnP Menu Plug amp Play OS Select Yes to allow the OS to configure Plug amp Play devices This is not required for system boot if your system has an OS that supports Plug amp Play Select No to allow AMIBIOS to configure all devices in the system PCI Latency Timer This option sets the latency of all PCI devices on the PCI bus Select a value to set the PCI latency in PCI clock cycles Options 32 64 96 128 160 192 224 and 248 Allocate IRQ to PCI VGA
16. The date must be entered in DAY MM DD YYYY format The time is entered in HH MM SS format Please note that time is in a 24 hour format For example 5 30 A M appears as 05 30 00 and 5 30 P M as 17 30 00 4 3 Advanced Settings Menu gt CPU Configuration Sub Menu GART Error Reporting This setting is used for testing only MTRR Mapping This determines the method used for programming CPU MTRRs when 4 GB or more memory is present The options are Continuous which makes the PCI hole non cacheable and Discrete which places the PCI hole below the 4 GB boundary 4 2 Chapter 4 BIOS gt IDE Configuration Onboard PCI IDE Controller The following options are available to set the IDE controller status Disabled will dis able the controller Primary will enable the primary IDE controller only Secondary will enable the secondary IDE controller only Both will enable both the primary and the secondary IDE controllers Primary IDE Master Slave Secondary IDE Master Slave Highlight one of the four items above and press lt Enter gt to access the submenu for that item Type Select the type of device connected to the system The options are Not Installed Auto CDROM and ARMD LBA Large Mode LBA Logical Block Addressing is a method of addressing data on a disk drive In the LBA mode the maximum drive capacity is 137 GB For drive capacities of over 137 GB your system must be equipped with 48 bit LBA mode addressing
17. be initialized before they can be used in an array Caution Initializing a disk overwrites the partition table on the disk and makes any data on the disk inaccessible If the drive is used in an array you may not be able to use the array again Do not initialize a disk that is part of a boot array To determine which disks are associated with a particular array please refer to Viewing Array Properties 1 Turn on your computer and press Ctrl lt A gt when prompted to access the ARC utility 2 From the ARC menu select Array Configuration Utility ACU 3 Select Initialize Drives 4 Use the up and down arrow keys to highlight the disk you wish to initialize and press Insert as shown on the following screen 5 Repeat Step 4 so that both drives to be initialized are selected 6 Press Enter 2 26 Chapter 2 Installation 7 Read the warning message as shown on the screen below 8 Make sure that you have selected the correct disk drives to initialize If cor rect type to continue Rebuilding Arrays Note 1 Rebuilding applies to Fault Tolerant arrays RAID 1 only If an array build process or initialization is interrupted or critical with one member missing you must perform a rebuild to optimized its functionality For a critical array rebuild operation the optimal drive is the source drive Note 2 If no spare array exists and a hard disk drive fails you need to create a spare before you can reb
18. describes the PC health monitoring features of the HEDAR T H8DAR E The serverboard has an onboard System Hardware Monitor chip that supports PC health monitoring Onboard Voltage Monitors for the CPU core voltages 3 3V 5V 12V and Battery Voltage The onboard voltage monitor will scan these voltages continuously Once a voltage becomes unstable it will give a warning or send an error message to the screen Users can adjust the voltage thresholds to define the sensitivity of the voltage monitor Real time readings of these voltage levels are all displayed in the System Health Monitor section of BIOS Fan Status Monitor with Firmware Software Speed Control The PC health monitor can check the RPM status of the cooling fans The onboard fans are controlled by thermal management via BIOS CPU Overheat Fan Fail LED and Control This feature is available when the user enables the CPU overheat Fan Fail warning function in the BIOS This allows the user to define an overheat temperature When this temperature is exceeded or when a fan failure occurs then the Overheat Fan Fail warning LED is triggered Auto Switching Voltage Regulator for the CPU Core The 3 phase switching voltage regulator for the CPU core can support up to 80A and auto sense voltage IDs ranging from 0 875 V to 1 6V This will allow the regulator to run cooler and thus make the system more stable Chapter 1 Introduction 1 4 Power Configuration Settings This se
19. in this setting if it is slower than or equal to the system clock and if the board is capable Options are Auto 200 MHz 400 MHz and 600 MHz CPUO HT Link Width The HT link will run at the width specified in this setting Options are Auto 2 bit 4 bit 8 bit and 16 bit gt MPS Configuration MPS Revision This setting allows the user to select the MPS revision level The options are 1 1 and 1 4 gt Remote Access Configuration Remote Access Use this setting to Enable or Disable remote access If Enabled is selected you can select a Remote Access type gt USB Configuration This screen will display the module version and all USB enabled devices Legacy USB Support Select Enabled to enable the support for USB Legacy Disable Legacy support if there are no USB devices installed in the system The options are Disabled Enabled and Auto 4 8 Chapter 4 BIOS gt System Health Monitor CPU Overheat Temperature Use the and keys to set the CPU temperature threshold to between 65 and 90 C When this threshold is exceeded the overheat LED on the chassis will light up and an alarm will sound The LED and alarm will turn off once the CPU temperature has dropped to 5 degrees below the threshold set The default setting is 78 C The other items in the submenu are all systems monitor displays for the following information CPU1 Temperature CPU2 Temperature for dual CPU systems System
20. initialization checkpoint codes are listed in order of execution Checkpoint Code Description DOh The NMI is disabled Power on delay is starting Next the initialization code check sum will be verified Initializing the DMA controller performing the keyboard controller BAT test starting memory refresh and entering 4 GB flat mode next Starting memory sizing next Returning to real mode Executing any OEM patches and setting the Stack next Passing control to the uncompressed code in shadow RAM at E000 0000h The initialization code is copied to segment 0 and control will be transferred to segment 0 1 H8DAR T H8DAR E User s Manual B 2 Bootblock Recovery Codes The bootblock recovery checkpoint codes are listed in order of execution Checkpoint Code Description EOh The onboard floppy controller if available is initialized Next beginning the base 512 KB memory test Eth Initializing the interrupt vector table next E2h E6h Enabling the floppy drive controller and Timer IRQs Enabling internal cache mem ory Initializing the DMA and Interrupt controllers next Edh Initializing the floppy drive Eeh Looking for a floppy diskette in drive A Reading the first sector of the diskette Efh A read error occurred while reading the floppy drive in drive A Next searching for AMIBOOT ROM file in the root directory Eih The AMIBOOT ROM file is not in the root directory F2
21. speed is controlled via Thermal Management with a BIOS setting See the table on the right for pin definitions Power Fail and Alarm Reset Header Connect a cable from your power sup ply to the JP10 header to provide you with warning of a power supply failure The warning signal is passed through the PWR_LED pin to indicate a power failure See the table on the right for pin definitions 2 11 Chapter 2 Installation Extra Universal Serial Bus Headers Pin Definitions USB2 3 4 USB2 USB3 4 Pin Definition Pins Definition 1 5V 1 5V 2 2 3 4 Ground 4 Ground 5 5 No connection Serial Port Pin Definitions COM1 COM2 Pin Definition Pin Definition 1 CD 6 DSR 2 RD RTS 3 TD 8 CTS 4 DTR 9 5 Ground 10 NC Note Pin 10 is included on the header but not on the port NC indicates no connection Fan Header Pin Definitions FAN1 5 Pin Definition 1 Ground Black 2 12V Red Tachometer Power Fail Alarm Reset Header Pin Definitions JP10 Pin Definition 1 P S 1 Fail Signal 2 P S 2 Fail Signal 3 P S 3 Fail Signal Reset from MB Note This feature is only available when using redundant power supplies H8DAR T H8DAR E User s Manual Power LED Speaker On JD1 pins 1 2 and 3 are for the power LED and pins 4 through 7 are for the speaker See the tables on the right for pin definitions
22. the I O ports on the serverboard align with their respective holes in the I O shield at the rear of the chassis 2 Mounting the serverboard onto the mainboard tray in the chassis Carefully mount the serverboard onto the mainboard tray by aligning the serverboard mounting holes with the raised metal standoffs in the tray Insert screws into all the mounting holes in the serverboard that line up with the standoffs Then use a screwdriver to secure the serverboard to the mainboard tray tighten until just snug if too tight you might strip the threads Metal screws provide an electrical contact to the serverboard ground to provide a continuous ground for the system 2 4 Installing Memory CAUTION Exercise extreme care when installing or removing memory modules to prevent any possible damage 1 Insert each memory module vertically into its slot paying attention to the notch along the bottom of the module to prevent inserting the module incorrectly see Figure 2 2 See support information below 2 Gently press down on the memory module until it snaps into place Notes each processor has its own built in memory controller so CPU2 DIMMs cannot be addressed if only a single CPU is installed 128 MB 256 MB 512 MB 1 GB 2 GB and 4 GB memory modules are supported With Opteron 246 C stepping CPUs and above It is highly recommended that you remove the power cord from the system before installing or changing any memory modules
23. the serial ports the mouse and keyboard and the twisted wires for the power and reset buttons and the system LEDs If you encounter any problems see Chapter 3 which describes troubleshooting procedures for the video the memory and the setup configuration stored in CMOS For quick reference a general FAQ Frequently Asked Questions section is pro vided Instructions are also included for contacting technical support In addition you can visit our web site for more detailed information Chapter 4 includes an introduction to BIOS and provides detailed information on running the CMOS Setup utility Appendix A provides BIOS Error Beep Code Messages Appendix B lists BIOS POST Checkpoint Codes H8DAR T H8DAR E User s Manual Table of Contents Preface About This Manual us ss iii Manual Organization iii Chapter 1 Introduction TA OV SIVISW e Sem 1 1 e nr 1 1 HSDAR L HSDAR E 1 1 3 H8DAR T H8DAR E Serverboard 1 4 H8DAR T H8DAR E Quick Reference 1 5 Serverb ard Features mH 1 6 AMD 8132 8111 Chipset System Block 1 8 1 2 Chipset Overview 1 9 b PG H
24. various I O ports Figure 2 3 I O Port Locations and Definitions Keyboard Port Mouse Port COM1 Port VGA Port 05 0 1 Ports Green Turquoise JLAN2 Blue ini 005005 6 9 9 9 o mam 92200 Front Control Panel JF1 contains header pins for various front control panel connectors See Figure 2 4 for the pin definitions of the various connectors Refer to Section 2 6 for details Figure 2 4 JF1 Front Control Panel Header JF1 20 19 Ground NMI x key x key Vcc Vcc Power LED HDD LED NIC1 NIC2 Ground Power Button 2 1 2 7 H8DAR T H8DAR E User s Manual 2 6 Connecting Cables ATX Power 24 pin Connector Pin Definitions J1B4 Primary ATX Power Supply Pin Definition Definition Connector DNE CONDE The primary power supply connector d aay J1B4 the H8DAR T H8DAR E 5 com meets the SSI Superset ATX 24 pin 6 PSON 4 5 specification Refer to the table on the 17 6 right for the pin definitions of the ATX 18 COM 6 T9V 24 pin power connector 19 7 20 NC 8 PWROK Note You must also connect the 8 21 45V JPW2 power connector to your 20 45V 10 12V power supply see below 23 11 02V 24 12 43 3V Secondary Power Connector In add
25. with four 4 screws BKT 0005 One 1 I O backpanel shield for chassis CSE PT7 One 1 CD containing drivers and utilities 14 H8DAR T H8DAR E User s Manual Contacting Supermicro Headquarters Address Super Micro Computer Inc 980 Rock Ave San Jose CA 95131 U S A Tel 1 408 503 8000 Fax 1 408 503 8008 Email marketing supermicro com General Information support supermicro com Technical Support Web Site www supermicro com Europe Address Super Micro Computer B V Het Sterrenbeeld 28 5215 ML s Hertogenbosch The Netherlands Tel 31 0 73 6400390 Fax 31 0 73 6416525 Email sales supermicro nl General Information support supermicro nl Technical Support rma supermicro nl Customer Support Asia Pacific Address Super Micro Computer Inc 4F No 232 1 Liancheng Rd Chung Ho 235 Taipei County Taiwan R O C Tel 886 2 8226 3990 Fax 886 2 8226 3991 Web Site www supermicro com tw Technical Support Email support supermicro com tw Tel 886 2 8228 1366 ext 132 or 139 1 2 Chapter 1 Introduction Figure 1 1 H3DAR T H8DAR E Image Wn qunm A MILL di Lu L 4 1 3 H8DAR T H8DAR E User s Manual Figure 1 2 H3DAR T H8DAR E Serverboard Layout not drawn to scale
26. DP5 CD Utilities BIOS flash upgrade utility Dimensions Extended ATX form factor 12 x 13 05 305 x 332 mm Although the controller chip on the board is labeled AIC 8130 it is a Marvell 88SX6081 SATA controller not an Adaptec controller 1 7 H8DAR T H8DAR E User s Manual 184 pin DIMMs 16 x 16 Hyper Transport 2000 MT s 184 pin DIMMs AMD AMD Opteron Opteron Processor 2 Processor 1 144 bit 200 400 MT s 144 bit 200 400 MT s 16 x 16 Hyper Transport 1200 MT s 133 MHz PCI X Slot Marvell Broadcom 133 MHz PCI X Slot 88SX6041 BC5704C AMD 8132 X 8x8 ncHyper Transport 400 MT s 8111 USB 1 1 ATA133 LPC Link Floppy Disk Drive gt Winbond W83627HF PS 2 Kybd Mouse Serial Ports lt gt Super 1 0 Figure 1 5 AMD 8132 8111 Chipset System Block Diagram Note This is a general block diagram and may not exactly represent the features on your serverboard See the previous pages for the actual specifications of your serverboard Chapter 1 Introduction 1 2 Chipset Overview The H8DAR T H8DAR E serverboard is based on the AMD 8132 chipset This chipset is composed of two main components the AMD 8132 HyperTransport PC
27. Green 100 Mb s Amber 1 Gb s 3 3V Power LED When illuminated the DP5 LED indicates that power from the pow er supply is being supplied to the serverboard DP5 indicates the pres ence of 3 3V See the table on the right for DP5 LED states Color System Status Green Power present on serverboard Off No power present on serverboard 2 18 Chapter 2 Installation 2 9 Floppy IDE and SATA Drive Connections Use the following information to connect the floppy and hard disk drive cables e The floppy disk drive cable has seven twisted wires e Ared mark on a wire typically designates the location of pin 1 e Asingle floppy disk drive ribbon cable has 34 wires and two connectors to provide for two floppy disk drives The connector with twisted wires always connects to drive A and the connector that does not have twisted wires always connects to drive B e The 80 wire ATA133 IDE hard disk drive cable that came with your system has two connectors to support two drives This special cable should be used to take advantage of the speed this new technology offers The blue connector connects to the onboard IDE connector interface and the other connector s to your hard drive s Consult the documentation that came with your disk drive for details on actual jumper locations and settings for the hard disk drive Floppy Connector Floppy Drive Connector The floppy connector is located eee beside the IDE 2 connecto
28. I X Tunnel and the AMD 8111 HyperTransport I O Hub The AMD 8132 chipset provides high performance and an excellent feature set for multi proces sor server solutions Controllers for the system memory are built directly into the processors 8132 HyperTransport PCI X Tunnel This hub includes AMD specific technology that provides two PCI X bridges with each bridge supporting a 64 bit data bus as well as separate PCI X operational modes and independent transfer rates Each bridge supports up to five PCI masters that include clock request and grant signals This hub connects to the processors and through them to system memory It also interfaces directly with the Serial ATA and Ethernet controllers 8111 HyperTransport I O Hub The 8111 I O hub provides the interface between the 8132 hub and various sub systems including the Winbond Super I O functions the onboard graphics the IDE controller and the USB ports HyperTransport Technology HyperTransport technology is a high speed low latency point to point link that was designed to increase the communication speed by a factor of up to 48x between integrated circuits This is done partly by reducing the number of buses in the chipset to reduce bottlenecks and by enabling a more efficient use of memory in multi processor systems The end result is a significant increase in bandwidth within the chipset 1 9 H8DAR T H8DAR E User s Manual 1 3 Health Monitoring This section
29. PER MICRO COMPUTER you may not copy any part of this document Information in this document is subject to change without notice Other products and companies referred to herein are trademarks or registered trademarks of their respective companies or mark holders Copyright 2009 by SUPER MICRO COMPUTER INC All rights reserved Printed in the United States of America Preface Preface About This Manual This manual is written for system integrators PC technicians and knowledgeable PC users It provides information for the installation and use of the H8DAR T H8DAR E serverboard The H8DAR T H8DAR E is based on the AMD 8132 8111 chipset and supports single or dual AMD Opteron 200 series type processors in a 940 pin microPGA ZIF socket and up to 32 GB of DDR333 266 or 16 GB of DDR400 Please refer to the serverboard specifications pages on our web site for updates on supported processors This product is intended to be professionally installed Manual Organization Chapter 1 includes a checklist of what should be included in your serverboard box describes the features specifications and performance of the serverboard and provides detailed information about the chipset Chapter 2 begins with instructions on handling static sensitive devices Read this chapter when installing the processor s and memory modules and when installing the serverboard in a chassis Also refer to this chapter to connect the floppy and hard disk drives
30. S Setup or WINBIOS Setup utility next Returned from WINBIOS Setup and cleared the screen Performing any necessary programming after WINBIOS Setup next The programming after WINBIOS Setup has completed Displaying the power on screen message next Programming the WINBIOS Setup options next The WINBIOS Setup options are programmed Resetting the hard disk controller next The hard disk controller has been reset Configuring the floppy drive controller next The floppy drive controller has been configured Configuring the hard disk drive controller next Initializing the bus option ROMs from C800 next See the last page of this chapter for additional information Initializing before passing control to the adaptor ROM at C800 Initialization before the C800 adaptor ROM gains control has completed The adap tor ROM check is next The adaptor ROM had control and has now returned control to BIOS POST Perform ing any required processing after the option ROM returned control Any initialization required after the option ROM test has completed Configuring the timer data area and printer base address next Set the timer and printer base addresses Setting the RS 232 base address next Returned after setting the RS 232 base address Performing any required initializa tion before the Coprocessor test next Required initialization before the Coprocessor test is over Initializing the Coproces sor next Coprocessor initi
31. SUPER H8DAR T H8DAR E USER S MANUAL Revision 1 1a The information in this User s Manual has been carefully reviewed and is believed to be accurate The vendor assumes no responsibility for any inaccuracies that may be contained in this document makes no commitment to update or to keep current the information in this manual or to notify any person or organization of the updates Please Note For the most up to date version of this manual please see our web site at www supermicro com SUPERMICRO COMPUTER reserves the right to make changes to the product described in this manual at any time and without notice This product including software if any and documenta tion may not in whole or in part be copied photocopied reproduced translated or reduced to any medium or machine without prior written consent NO EVENT WILL SUPERMICRO COMPUTER BE LIABLE FOR DIRECT INDIRECT SPECIAL INCIDENTAL SPECULATIVE OR CONSEQUENTIAL DAMAGES ARISING FROM THE USE OR INABILITY TO USE THIS PRODUCT OR DOCUMENTATION EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGES IN PARTICULAR THE VENDOR SHALL NOT HAVE LIABILITY FOR ANY HARDWARE SOFTWARE OR DATA STORED OR USED WITH THE PRODUCT INCLUDING THE COSTS OF REPAIRING REPLACING INTEGRATING INSTALLING OR RECOVERING SUCH HARDWARE SOFTWARE OR DATA Any disputes arising between manufacturer and customer shall be governed by the laws of Santa Clara County in the State of California USA The Sta
32. Set this value to allow or restrict the system from giving the VGA adapter card an interrupt address The options are Yes and No Palette Snooping Select Enabled to inform the PCI devices that an ISA graphics device is installed in the system in order for the graphics card to function properly The options are Enabled and Disabled PCI IDE BusMaster Set this value to allow or prevent the use of PCI IDE busmastering Select Enabled to allow AMI BIOS to use PCI busmaster for reading and writing to IDE drives The options are Disabled and Enabled Offboard PCI ISA IDE Card This option allows the user to assign a PCI slot number to an Off board PCI ISA IDE card in order for it to function properly The options are Auto PCI Slot1 PCI Slot2 PCI 51013 PCI Slot4 PCI Slot5 and PCI 51016 IRQ3 IRQ4 IRQ5 IRQ7 IRQ9 IRQ10 IRQ11 IRQ14 IRQ15 This feature specifies the availability of an IRQ to be used by a PCI PnP device Select Reserved for the IRQ to be used by a Legacy ISA device The options are Available and Reserved 4 10 Chapter 4 BIOS DMA Channel 0 Channel 1 Channel 3 Channel 5 Channel 6 Channel 7 Select Available to indicate that a specific DMA channel is available to be used by a PCI PnP device Select Reserved if the DMA channel specified is reserved for a Legacy ISA device The options are Available and Reserved Reserved Memory Size This feature specifies the size of memory block to be reserved for Legacy ISA d
33. abled and Disabled Pwr Dwn Ctl The options for the Power Down Control setting are Auto Disabled Alternating Same and Independant Chapter 4 BIOS p ECC Configuration DRAM ECC Enable DRAM ECC allows hardware to report and correct memory errors automatically Options are Enabled and Disabled MCA DRAM ECC Logging When Enabled MCA DRAM ECC logging and reporting is enabled Options are Enabled and Disabled ECC Chip Kill Allows the user to Enable or Disable ECC Chip Kill DRAM Scrub Redirect Allows system to correct DRAM ECC errors immediately even with back ground scrubbing on Options are Enabled and Disabled DRAM BG Scrub Corrects memory errors so later reads are correct Options are Disabled and various times in nanoseconds and microseconds L2 Cache BG Scrub Allows L2 cache RAM to be corrected when idle Options are Disabled and various times in nanoseconds and microseconds Data Cache BG Scrub Allows L1 cache RAM to be corrected when idle Options are Disabled and various times in nanoseconds and microseconds gt IOMMU Option Menu IOMMU Mode IOMMU is supported on Linux based systems to convert 32 bit I O addresses to 64 bit Options are Disabled Best Fit and Absolute Selecting the Best Fit or Absolute settings allows the user to select aperture size 4 15 H8DAR T H8DAR E User s Manual gt South Bridge Configuration 2 0 SMBus Controller Allows the user to Enable or Disable the SMBu
34. alized Performing any required initialization after the Coproces sor test next Initialization after the Coprocessor testis complete Checking the extended keyboard keyboard ID and Num Lock key next Issuing the keyboard ID command next Displaying any soft errors next The soft error display has completed Setting the keyboard typematic rate next The keyboard typematic rate is set Programming the memory wait states next Memory wait state programming is over Clearing the screen and enabling parity and the NMI next NMI and parity enabled Performing any initialization required before passing control to the adaptor ROM at E000 next Initialization before passing control to the adaptor ROM at E000h completed Passing control to the adaptor ROM at E000h next B 6 Checkpoint A9h Aah Abh BOh Bih 00h Appendix B BIOS POST Checkpoint Codes Code Description Returned from adaptor ROM at E000h control Performing any initialization required after the E000 option ROM had control next Initialization after E000 option ROM control has completed Displaying the system configuration next Uncompressing the DMI data and executing DMI POST initialization next The system configuration is displayed Copying any code to specific areas Code copying to specific areas is done Passing control to INT 19h boot loader next B 7 H8DAR T H8DAR E User s Manual continued from front The products sol
35. all a line filter to shield the computer from noise It is recommended that you also install a power surge protector to help avoid problems caused by power surges Warning To prevent the possibility of explosion do not use the wrong type of onboard CMOS battery or install it upside down Chapter 1 Introduction 1 6 Super The disk drive adapter functions of the Super I O chip include a floppy disk drive controller that is compatible with industry standard 82077 765 a data separator write pre compensation circuitry decode logic data rate selection a clock genera tor drive interface control logic and interrupt and DMA logic The wide range of functions integrated onto the Super I O greatly reduces the number of components required for interfacing with floppy disk drives The Super I O supports two 360 K 720 K 1 2 M 1 44 M or 2 88 M disk drives and data transfer rates of 250 Kb s 500 Kb s or 1 Mb s It also provides two high speed 16550 compatible serial communication ports UARTs one of which supports serial infrared communication Each UART in cludes a 16 byte send receive FIFO a programmable baud rate generator complete modem control capability and a processor interrupt system Both UARTs provide legacy speed with baud rate of up to 115 2 Kbps as well as an advanced speed with baud rates of 250 K 500 K or 1 Mb s which support higher speed modems The Super provides functions that comply with ACPI Advanced Con
36. and press Enter The label cannot be more than 15 characters 3 For RAID 0 select the desired stripe size Available stripe sizes are 16 32 and 64 KB default It is recommended that you do not change the default setting 4 The item Create RAID via allows you to select between the different meth ods of creating RAID 0 and RAID 1 The following table gives examples of when each is appropriate RAID Level Create Via When Appropriate RAID 0 No Init Creating a RAID 0 on new drives RAID 0 Migrate Creating a RAID 0 from one new drive and one drive with data you wish to preserve RAID 1 Build 1 Any time you wish to create a RAID 1 but especially if you have data on one drive that you wish to preserve RAID 1 Clear Creating a RAID 1 on new drives or when you want to ensure that the array contains no data after creation RAID 1 Quick Fastest way to create a RAID 1 Appropriate when using new drives RAID 1 Init Fastest way to create a RAID 1 Appropriate when using new drives If you select Migrate for RAID 0 or Build for RAID 1 you will be asked to select the source drive The contents of the source drive will be preserved However the data on the new drive will be lost 2 24 Chapter 2 Installation 5 When finished press Done as shown on the following screen Notes 1 Before adding a new drive to an array back up any data contained on the new drive Otherwise all data will be lost 2
37. as the ability of a management application to remotely power up a computer that is powered off Remote PC setup up dates and access tracking can occur after hours and on weekends so that daily LAN traffic is kept to a minimum and users are not interrupted The serverboard has a 3 pin header JWOL to connect to the 3 pin header on a Network Interface Card NIC that has H8DAR T H8DAR E User s Manual WOL capability Wake On LAN must be enabled in BIOS Note that Wake On LAN can only be used with an ATX 2 01 or above compliant power supply Wake On Ring Header JWOR Wake up events can be triggered by a device such as the external modem ringing when the system is in the SoftOff state Note that external modem ring on can only be used with an ATX 2 01 or above compliant power supply 1 5 Power Supply As with all computer products a stable power source is necessary for proper and reliable operation It is even more important for processors that have high CPU clock rates of 1 GHz and faster The H8DAR T H8DAR E accommodates 12V ATX power supplies Although most power supplies generally meet the specifications required by the CPU some are inadequate A 2 amp current supply on a 5V Standby rail is strongly recom mended It is strongly recommended that you use a high quality power supply that meets 12V ATX power supply Specification 1 1 or above Additionally in areas where noisy power transmission is present you may choose to inst
38. ction describes the features of your serverboard that deal with power and power settings Microsoft OnNow The OnNow design initiative is a comprehensive system wide approach to system and device power control OnNow is a term for a PC that is always on but appears to be off and responds immediately to user or other requests Slow Blinking LED for Suspend State Indicator When the CPU goes into a suspend state the chassis power LED will start blinking to indicate that the CPU is in suspend mode When the user presses any key the CPU will wake up and the LED will automatically stop blinking and remain on BIOS Support for USB Keyboard If a USB keyboard is the only keyboard in the system it will function like a normal keyboard during system boot up Main Switch Override Mechanism When an ATX power supply is used the power button can function as a system suspend button When the user depresses the power button the system will enter a SoftOff state The monitor will be suspended and the hard drive will spin down Depressing the power button again will cause the whole system to wake up Dur ing the SoftOff state the ATX power supply provides power to keep the required circuitry in the system alive In case the system malfunctions and you want to turn off the power just depress and hold the power button for 4 seconds The power will turn off and no power will be provided to the serverboard Wake On LAN JWOL Wake On LAN is defined
39. d PC to PCI Enable Disable Jumper Settings JC1 2 Jumper Setting Definition Pins 1 2 Enabled Pins 2 3 Disabled SATA Enable Disable Jumper Settings JPS1 Both Jumpers Definition Pins 1 2 Enabled Pins 2 3 Disabled Chapter 2 Installation Onboard Speaker Enable Disable The JD1 header allows you to use either an external speaker or the internal onboard speaker To use the internal onboard speaker close pins 6 and 7 with a jumper To use an external speaker connect the speaker wires to pins 4 through 7 of JD1 See the table on the right for settings and the table associated with the Power LED Speaker connection previous section for pin definitions Onboard Speaker Enable Disable Pin Definitions JD1 Pins Definition 6 7 Jump for onboard speaker 4 7 Attach external speaker wires 3rd Power Supply Fail Signal Enable Disable The system can notify you in the event of a power supply failure This feature 3rd Power Supply Fail Signal Jumper Settings J3P assumes that three redundant power supply units are installed in the chas Jumper Setting Definition Open Enabled sis If you only have or two power Closed Disabled supplies installed you should disable the function with the J3P header to pre vent false alarms See the table on the right for jumper settings Watch Dog Enable Disable JWD controls the Watch Dog function
40. d by Supermicro are not intended for and will not be used in life support systems medical equipment nuclear facilities or systems aircraft aircraft devices aircraft emergency com munication devices or other critical systems whose failure to perform be reasonably expected to result in significant injury or loss of life or catastrophic property damage Accordingly Supermicro dis claims any and all liability and should buyer use or sell such products for use in such ultra hazardous applications it does so entirely at its own risk Furthermore buyer agrees to fully indemnify defend and hold Supermicro harmless for and against any and all claims demands actions litigation and proceedings of any kind arising out of or related to such ultra hazardous use or sale B 8
41. ealth MOnitoring Lu upto iieii pape Hu ESO ctu RES 1 10 1 4 Power Configuration Settings eects 1 11 1 5 Power Supply eee nen ncc sa testet a 1 12 16 DIR M EI LO USE 1 13 Chapter 2 Installation 2 1 Static Sensitive 2 1 2 2 Processor and Heatsink Installation 4 2 2 2 3 Mounting the Serverboard into a Chassis 2 4 29 Installing Memory aa a 2 4 2 5 I O Port and Control Panel Connections 22 2 7 2 6 Connecting Cables seeds een ny ee eT rte Ar Pe 2 8 Primary ATX Power Supply Connector 2 8 Secondary Power 2 0 0 2 8 Auxiliary Power Connector 2 8 Mx EMT 2 8 Power LED 2 9 ADD LED M 2 9 n 2 9 NCZ 2 9 Overheat Fan Fail LED 0 2 9 Power LED a a 2 10 Reset 2 10 Power 2 10
42. efore installing Chipset AMD 8132 8111 Expansion Slots Two 2 64 bit 133 MHz PCI X 3 3V BIOS 4 Firmware Hub AMIBIOS Flash ROM APM 1 2 DMI 2 3 PCI 2 2 ACPI 1 0 ACPI 2 0 is BIOS supported Plug and Play PnP PC Health Monitoring Onboard monitors for CPU core voltage 3 3V 5Vin 12V and battery volt age Fan status monitor with firmware software speed control in BIOS Watch Dog NMI Environmental temperature monitoring via BIOS Power up mode control for recovery from AC power loss System resource alert Hardware BIOS virus protection Auto switching voltage regulator for the CPU core 1 6 Chapter 1 Introduction ACPI Features Microsoft OnNow Slow blinking LED for suspend state indicator BIOS support for USB keyboard Main switch override mechanism nternal external modem ring on Onboard I O Marvell 88SX6081 Serial ATA controller supports four SATA ports RAIDO 1 and JBOD supported H8DAR T only Two 2 ATA133 IDE ports One 1 floppy port interface up to 2 88 MB Two 2 Fast UART 16550 compatible serial connectors 1 header 1 port Broadcom BCM5704 Ethernet controller supports two Gigabit LAN ports e PS 2 mouse and PS 2 keyboard ports Five 5 USB 1 1 ports two ports three headers ATI Rage 8 MB XL graphics chip VGA port Other Wake on Ring JWOR Wake on LAN JWOL Onboard 3 3V power LED
43. est to first check with your distributor or reseller for troubleshooting services They should know of any possible problem s with the specific system configuration that was sold to you 1 Please review the Troubleshooting Procedures and Frequently Asked Questions FAQs sections in this chapter or see the FAQs on our web site before contacting Technical Support 2 BIOS upgrades can be downloaded from our web site Note Not all BIOS can be flashed depending on the modifications to the boot block code Chapter 3 Troubleshooting 3 If you still cannot resolve the problem include the following information when contacting us for technical support e model and PCB revision number e BIOS release date version this be seen on the initial display when your system first boots up e System configuration An example of a Technical Support form is posted on our web site 4 Distributors For immediate assistance please have your account number ready when contacting our technical support department by e mail 3 3 Frequently Asked Questions Question What type of memory does my serverboard support Answer The H8DAR T H8DAR E supports up to 32 GB of registered ECC DDR333 266 or to 16 GB of registered ECC DDR400 interleaved or non inter leaved SDRAM with two CPUs installed With only one CPU installed the maximum memory support is halved See Section 2 4 for details on installing memory Q
44. etting When the Instant Off setting is enabled the serverboard will have in stant off capabilities as long as the BIOS has control of the system When the 4 Sec Delay setting is enabled or when the BIOS is not in control such as during memory count the first screen that appears when the system is turned on the momentary on off switch must be held for more than four seconds to shut down the system This feature is required to implement the ACPI features on the serverboard Question How do connect the ATA133 cable to my IDE device s Answer The 80 wire 40 pin high density ATA133 IDE cable that came with your system has two connectors to support two drives This special cable must be used to take advantage of the speed the ATA133 technology offers Connect the blue connector to the onboard IDE header and the other connector s to your hard drive s Consult the documentation that came with your disk drive for details on actual jumper locations and settings 3 4 Returning Merchandise for Service A receipt or copy of your invoice marked with the date of purchase is required be fore any warranty service will be rendered You can obtain service by calling your vendor for a Returned Merchandise Authorization RMA number When returning to the manufacturer the RMA number should be prominently displayed on the outside of the shipping carton and mailed prepaid or hand carried Shipping and handling charges will be applied for all orders that m
45. evices The options are Disabled 16K 32K and 64K 4 5 Boot Menu The Boot menu contains several sub menus p Boot Settings Configuration Quick Boot If Enabled this option will skip certain tests during POST to reduce the time needed for the system to boot up The options are Enabled and Disabled Quiet Boot If Disabled normal POST messages will be displayed on boot up If Enabled this display the OEM logo instead of POST messages Add On ROM Display Mode This setting controls the display of add on ROM read only memory messages Select Force BIOS to allow the computer system to force a third party BIOS to display during system boot Select Keep Current to allow the computer system to display the BIOS information during system boot Boot up Num Lock Set this to On to allow the Number Lock setting to be modified during boot up The options are On and Off PS 2 Mouse Support This setting is to specify PS 2 mouse support The options are Auto Enabled and Disabled 4 11 H8DAR T H8DAR E User s Manual Wait for F1 If Error Enable to activate the Wait for F1 if Error function The options are Enabled and Disabled Hit DEL Message Display Enable to display the message telling the user to hit the DEL key to enter the setup utility The options are Enabled and Disabled Interrupt 19 Capture Enable to allow ROMs to trap Interrupt 19 The options are Enabled and Dis abled gt Boot Device Pri
46. figuration and Power Interface which includes support of legacy and ACPI power manage ment through a SMI or SCI function pin It also features auto power management to reduce power consumption The IRQs DMAs and I O space resources of the Super I O can be flexibly adjusted to meet ISA PnP requirements which support ACPI and APM Advanced Power Management Chapter 2 Installation Chapter 2 Installation 2 1 Static Sensitive Devices Electrostatic Discharge ESD can damage electronic components To prevent dam age to your system board it is important to handle it very carefully The following measures are generally sufficient to protect your equipment from ESD Precautions Use a grounded wrist strap designed to prevent static discharge Touch a grounded metal object before removing the board from the antistatic bag Handle the board by its edges only do not touch its components peripheral chips memory modules or gold contacts When handling chips or modules avoid touching their pins Put the serverboard and peripherals back into their antistatic bags when not in use For grounding purposes make sure your computer chassis provides excellent conductivity between the power supply the case the mounting fasteners and the serverboard Use only the correct type of CMOS onboard battery as specified by the manufac turer Do not install the CMOS onboard battery upside down which may result in a poss
47. h Next reading and analyzing the floppy diskette FAT to find the clusters occupied by the AMIBOOT ROM file F3h Next reading the AMIBOOT ROM file cluster by cluster F4h The AMIBOOT ROM file is not the correct size F5h Next disabling internal cache memory FBh Next detecting the type of flash ROM FCh Next erasing the flash ROM FDh Next programming the flash ROM FFh Flash ROM programming was successful Next restarting the system BIOS B 2 Appendix B BIOS POST Checkpoint Codes B 3 Uncompressed Initialization Codes The following runtime checkpoint codes are listed in order of execution These codes are uncompressed in F0000h shadow RAM Checkpoint Code Description 03h The NMI is disabled Next checking for a soft reset or a power on condition 05 The BIOS stack has been built Next disabling cache memory Uncompressing the POST code next 07h Next initializing the CPU and the CPU data area 08h The CMOS checksum calculation is done next OAh The CMOS checksum calculation is done Initializing the CMOS status register for date and time next OBh The CMOS status register is initialized Next performing any required initialization before the keyboard BAT command is issued OCh The keyboard controller input buffer is free Next issuing the BAT command to the keyboard controller OEh The keyboard controller BAT command result has been verified Next performing any necessar
48. ible explosion Unpacking The serverboard is shipped in antistatic packaging to avoid static damage When unpacking the board make sure the person handling it is static protected Installation Procedures Follow the procedures as listed below to install the serverboard into a chassis 1 Install the processor s and the heatsink s 2 Install the serverboard in the chassis 3 Install the memory and add on cards 4 Finally connect the cables and install the drivers 2 1 H8DAR T H8DAR E User s Manual 2 2 Processor and Heatsink Installation sor Always connect the power cord last and always remove it be Exercise extreme caution when handling and installing the proces fore adding removing or changing any hardware components Installing the CPU Backplates Two CPU backplates BKT 0004 are included in the retail box The backplates prevent the CPU area of the serverboard from bending and provide a base for at taching the heatsink retention modules To install begin by peeling off the release paper to expose the adhesive On the underside of the serverboard locate the two holes on either side of the CPU socket Attach the adhesive side of the backplate to the board by inserting the standoffs into the two holes and applying light pressure so that the backplate sticks to the underside of the board Repeat for the second CPU socket See Figure 2 1 Installing the Processor install to the CPU 1 socket first 1 Lif
49. igured to function as a suspend button see the Power Button Mode setting in BIOS To turn off the power when set to suspend mode depress the button for at least 4 seconds Refer to the table on the right for pin definitions Universal Serial Bus Ports 05 0 1 Two Universal Serial Bus ports USB1 1 are located between the mouse port and the 1 port See the table on the right for pin defini tions 2 10 Power Fail LED Pin Definitions JF1 Pin Definition 5 Vcc Control Reset Button Pin Definitions JF1 Pin Definition 3 Reset Ground Power Button Pin Definitions JF1 Pin Definition 1 ON 2 Ground Universal Serial Bus Ports Pin Definitions USBO 1 Pin Definition 2 3 4 USBO USB1 Pin Definition 45V os PO 2 PO 4 Ground Extra USB Headers Three additional USB1 1 headers USB2 3 4 are included on the serverboard These may be con nected to provide front side access USB cables not included are needed for the connections See the table on the right for pin definitions Serial Ports 1 serial port is located beside the USB ports COM2 is a header on the serverboard located near the floppy drive connector see serverboard layout for location See the table on the right for pin defini tions Fan Headers The H8DAR T H8DAR E has five headers FAN1 FAN5 Fan
50. ing generally works with all hard disk drives manufactured after 1999 For other disk drives such as IDE CD ROM drives check the specifications of the drive S M A R T For Hard disk drives Self Monitoring Analysis and Reporting Technology SMART can help predict impending drive failures Select Auto to allow BIOS to auto detect hard disk drive support Select Disabled to prevent AMI BIOS from using the S M A R T Select Enabled to allow AMI BIOS to use the S M A R T to support hard drive disk The options are Disabled Enabled and Auto 32 Bit Data Transfer Select Enabled to activate the function of 32 Bit data transfer Select Disabled to deactivate the function The options are Enabled and Disabled Hard Disk Write Protect Select Enabled to enable the function of Hard Disk Write Protect to prevent data from being written to HDD The options are Enabled or Disabled IDE Detect Time Out Sec This feature allows the user to set the time out value for detecting ATA ATA PI devices installed in the system The options are 0 sec 5 10 15 20 25 30 and 35 ATA PI 80Pin Cable Detection This setting allows AMI BIOS to auto detect the 80 Pin ATA PI cable The options are Host amp Device Host and Device 4 4 Chapter 4 BIOS gt Floppy Configuration Floppy A Move the cursor to these fields via up and down lt arrow gt keys to select the floppy type The options are Disabled 360 KB 5 1 4 1 2 MB
51. ions a 3 3 3 4 Returning Merchandise for Service a 3 4 Chapter 4 BIOS 4 1 Introduction n e bende erbe eec 4 1 4 2 Main Setup UM ou End usi cde Edu 4 2 4 3 Advanced Settings Menu noce 4 2 4 A PUP INP eU t 4 10 6 Ot VIS ES 4 11 4 6 Securty MOn0 Pc em 4 13 4 7 Chipset MENU uu ER 4 14 4502 5 4 17 4 9 EIU 4 18 Appendices Appendix A BIOS Error Codes a A 1 Appendix B BIOS POST Checkpoint B 1 vi Chapter 1 Introduction 1 1 Chapter 1 Introduction Overview Checklist Congratulations on purchasing your computer serverboard from an acknowledged leader in the industry Supermicro boards are designed with the utmost attention to detail to provide you with the highest standards in quality and performance Please check that the following items have all been included with your serverboard If anything listed here is damaged or missing contact your retailer Included with retail box only One 1 H8DAR T H8DAR E serverboard One 1 IDE cable CBL 036 One 1 floppy cable CBL 022 Two 2 CPU backplates BKT 0004 Two 2 heatsink retention modules
52. ions SATA2 LED NC 2 3 4 SATA3 LED NC 5 Ground Key Note NC indicates no connection Keylock Keylock A keylock header is located at JK1 Pin Definitions JK1 Utilizing this header allows you to Pin Definition inhibit any actions made on the key 1 Ground board effectively locking it See the 2 Keylock R N table on the right for pin definitions Chapter 2 Installation 2 7 Jumper Settings Explanation of Jumpers To modify the operation of the serverboard jumpers can be used to choose between optional settings Jumpers create shorts between two pins to change the function of the connector Pin 1 is identified with a square solder pad on the printed circuit board See the diagram at right for an example of jumping pins 1 and 2 Refer to the serverboard layout page for jumper locations Pins Jumper Note 1 On two pin jumpers Closed means the jumper is on and Open means the jumper is off the pins CMOS Clear JBT1 is used to clear CMOS and will also clear any passwords Instead of pins this jumper consists of contact pads to prevent accidentally clearing the contents of CMOS To clear CMOS 1 First power down the system and unplug the power cord s 2 With the power disconnected short the CMOS pads with a metal object such as a small screwdriver for at least four seconds 3 Remove the screwdriver or shorting device 4 Reconnect the power cord s and
53. ition to the Primary ATX power connector above the Secondary 12v 8 pin power connector at JPW2 must also be connected to your power supply See the table on the right for pin definitions Auxiliary Power Connector The 4 pin auxiliary power connec Pins 1 through 4 5 through 8 Secondary Power Connector Pin Definitions JPW2 Definition Ground 12V Required Connection Auxiliary Power Connector Pin Definitions J32 tor at J32 supplies extra power that s Definition may be needed for systems with high leg Ground loads See the table on the right for 384 12V pin definitions Recommended Connection NMI Button NMI Button The non maskable interrupt button header is located on pins 19 and 20 of JF1 Refer to the table on the right for pin definitions 2 8 Pin Definitions JF1 Pin Definition 19 Control 20 Ground Chapter 2 Installation Power LED Power LED Pin Definitions JF1 The Power LED connection is located Pin Definition on pins 15 and 16 of JF1 Refer to the 15 vec table on the right for pin definitions 16 Control HDD LED The HDD IDE Hard Disk Drive LED POM ri connection is located on pins 13 and 14 of JF1 Attach the IDE hard drive LED cable to display disk activity Refer to the table on the right for pin definitions Pin Definition 13 Vcc 14 HD Active NIC1 LED The NIC1 Network In
54. l the add on cards and cables 2 Use the speaker to determine if any beep codes exist Refer to Appendix A for details on beep codes 3 1 H8DAR T H8DAR E User s Manual NOTE If you are a system integrator VAR or OEM a POST diagnostics is recommended For I O port 80h codes refer to App B Memory Errors 1 Make sure that the DIMM modules are properly and fully installed 2 You should be using registered ECC DDR memory see next page Also it is recommended that you use the same memory type and speed for all DIMMs in the system See Section 2 4 for memory details and limitations 3 Check for bad DIMM modules or slots by swapping modules between slots and noting the results 4 Check the power supply voltage 115V 230V switch Losing the System s Setup Configuration 1 Make sure that you are using a high quality power supply A poor quality power supply may cause the system to lose the CMOS setup information Refer to Sec tion 1 6 for details on recommended power supplies 2 The battery on your serverboard may be old Check to verify that it still supplies 9VDC If it does not replace it with a new one 3 If the above steps do not fix the setup configuration problem contact your vendor for repairs 3 2 Technical Support Procedures Before contacting Technical Support please take the following steps Also note that as a serverboard manufacturer we do not sell directly to end users so it is b
55. last page of this chapter for additional information Displaying bus initialization error messages See the last page of this chapter for additional information The new cursor position has been read and saved Displaying the Hit DEL mes sage next The Hit DEL message is displayed The protected mode memory test is about to start Preparing the descriptor tables next The descriptor tables are prepared Entering protected mode for the memory test next Entered protected mode Enabling interrupts for diagnostics mode next Interrupts enabled if the diagnostics switch is on Initializing data to check memory wraparound at 0 0 next Data initialized Checking for memory wraparound at 0 0 and finding the total sys tem memory size next The memory wraparound test is done Memory size calculation has been done Writing patterns to test memory next The memory pattern has been written to extended memory Writing patterns to the base 640 KB memory next Patterns written in base memory Determining the amount of memory below 1 MB next The amount of memory below 1 MB has been found and verified The amount of memory above 1 MB has been found and verified Checking for a soft reset and clearing the memory below 1 MB for the soft reset next If this is a power on situation going to checkpoint 4Eh next B 4 Appendix B BIOS POST Checkpoint Codes Checkpoint 4Ch 4Dh 4Eh 4Fh 50h 51h 52h 53h 54h
56. m the Main menu select Manage Arrays 2 From the List of Arrays select the bootable array you want to delete and press Ctrl lt B gt A bootable array is an array marked with an asterisk 3 Enter Y to delete a bootable array when the following message is displayed The array is already marked bootable Do you want to make this array as not 2 25 H8DAR T H8DAR E User s Manual bootable Yes No The bootable array will then be deleted and the asterisk will disappear Note do not use the delete key to delete a bootable array Adding Deleting Hotspares Note In order to rebuild a RAID RAID 0 or RAID 1 you need to add a new HDD as a hotspare 1 Turn on your computer and press Ctrl lt A gt as prompted to access the ARC Utility 2 From the ARC menu select Array Configuration Utility ACU 3 From the ACU menu select Add Delete Hotspares 4 Use the up and down arrow keys to highlight and select the disk you want to designate as a hotspare and press Insert then press Enters 5 Select Yes when the following prompt is displayed Do you want to create spare Yes No The spare you have selected will appear in the Select Drive Menu Initializing Disk Drives If an installed disk does not appear in the disk selection list for creating a new array or if it appears grayed out you may have to initialize it before you can use it as part of an array Drives attached to the controller must
57. menu 7 Press lt Esc gt to return to the previous menu Creating Arrays Before creating arrays make sure the disks for the array are connected and installed in your system Note that disks with no usable space or disks that are un initialized are shown in gray and cannot be used See Initializing Disk Drives To create an array 1 Turn on your computer and press Ctrl lt A gt when prompted to access the ARC utility 2 23 H8DAR T H8DAR E User s Manual 2 From the ARC menu select Array Configuration Utility Main Menu ACU 3 From the ACU menu select Create Array 4 Select the disks for the new array and press Insert Note To deselect any disk highlight the disk and press Delete 5 Press Enter when both disks for the new array are selected The Array Properties menu is then displayed Assigning Array Properties Once you ve create a new array you are ready to assign properties to the ar ray Caution Once the array is created and its properties are assigned you cannot change the array properties using the ACU You will need to use the Adaptec Storage Manager Browser Edition Refer to the Adaptec s User s Guide in the enclosed CD 1 In the Array Properties menu select an array type and press Enter Note that only the available array types RAID 0 and RAID 1 are displayed on the screen Using RAID 0 or RAID 1 requires two drives 2 Under the item Arrays Label type in a label
58. ntrusion header is located at JL1 Attach the appropriate cable to inform you of a chassis intrusion JLAN1 2 Ethernet Ports Two Gigabit Ethernet ports desig nated JLAN1 and JLAN2 are located beside the VGA port These ports accept RJ45 type cables SATA Header The header at JS10 is for SATA which may be used to monitor the status of the power supply fans and system temperature See the table on the right for pin definitions SMB Header The System Management Bus header is located at J22 Connect the appro priate cable here to utilize SMB on your system See the table on the right for pin definitions 2 13 Chapter 2 Installation Chassis Intrusion Pin Definitions JL1 Pin Definition 1 Intrusion Input 2 Ground SATA PC Pin Definitions JS10 Pin Definition 1 Data 2 Ground 3 Clock SMB Pin Definitions J22 Pin Definition SMB Data Ground SMB Clock H8DAR T H8DAR E User s Manual Overheat LED JOH1 Overheat LED Pin Definitions Connect an LED to the JOH1 header poe to provide warning of chassis over heating See the table on the right for pin definitions Pin Definition 1 45V 2 OH Active Serial ATA Activity LED 5 Pin Definition Pins Definition Connect an LED to the JS9 header to 1 SATAO LED NC provide indication of Serial ATA drive SATA1 LED NC activity See the table on the right for pin definit
59. o confirm the selection Press the lt Enter gt key to load the default settings to the BIOS 3 Tap the lt Esc gt key and scroll down to Exit Select Save and Exit from the Exit menu then press the lt Enter gt key to save the changes and exit the BIOS 4 Once you ve exited the BIOS Utility the system will re boot 5 During system startup press the lt Ctrl gt and the lt A gt keys simultaneously to run the Adaptec RAID Configuration Utility when prompted by the message Press lt Ctrl gt lt A gt for Adaptec RAID Configuration Utility 2521 H8DAR T H8DAR E User s Manual Adaptec HostRAID Controller Driver Adaptec s Embedded Serial ATA RAID with HostRAID controller adds RAID function ality to the SATA controller by supporting RAID 0 Striping or RAID 1 Mirroring to enhance the industry s pioneer PCI to e host controller products RAID striping RAID 0 can greatly improve hard disk I O performance because of its capability in striping data across multiple drives RAID mirroring RAID 1 allows the data to be simultaneously written to two drives so critical data is always available even if one hard disk fails Due to this built in functionality your serverboard is specially designed to keep pace with the increasing performance demands of today s computer systems by improv ing disk I O throughput and providing data accessibility regardless of a single disk failure Adaptec Embedded Serial ATA offers the u
60. om the main menu 2 22 Chapter 2 Installation Viewing Array Properties To view the properties of an existing array 1 At the BIOS prompt press lt Ctrl A gt 2 From the ARC menu select Array Configuration Utility ACU 3 From the ACU menu select Manage Arrays 4 From the List of Arrays dialog box select the array you want to view and press lt Enter gt The Array Properties dialog box appears showing detailed information on the array The physical disks associated with the array are displayed here 5 Press lt Esc gt to return to the previous menu Deleting Arrays Warning Back up the data on an array before you delete it to prevent the loss of data Deleted arrays cannot be restored 1 Turn on your computer and press lt Ctrl gt lt A gt when prompted to access the ARC utility 2 From the ARC main menu select Array Configuration Utility ACU 3 From the ACU menu select Manage Arrays 4 Select the array you wish to delete and press lt Delete gt 5 In the Array Properties dialog box select lt Delete gt and press lt Enter gt The following prompt is displayed Warning Deleting the array will render array unusable Do you want to delete the array Yes No RAID 1 only the following prompt is also displayed Deleting the partition will result in data loss Do you also want to delete the partition Yes No 6 Press Yes to delete the array or partition or No to return to the previous
61. or initialization has completed In terrupt vector initialization is about to begin B 3 H8DAR T H8DAR E User s Manual Checkpoint 25h 27h 28h 2Ah 2Eh 2Fh 30h 31h 32h 34h 37h 38h 39h 3Ah 3Bh 40h 42h 43h 44h 45h 46h 47h 48h 49h 4Bh Code Description Interrupt vector initialization is done Clearing the password if the POST DIAG Switch is on Any initialization before setting video mode will be done next Initialization before setting the video mode is complete Configuring the mono chrome mode and color mode settings next Bus initialization system static output devices will be done next if present See the last page for additional information Completed post video ROM test processing If the EGA VGA controller is not found performing the display memory read write test next The EGA VGA controller was not found The display memory read write test is about to begin The display memory read write test passed Look for retrace checking next The display memory read write test or retrace checking failed Performing the alter nate display memory read write test next The alternate display memory read write test passed Looking for alternate display retrace checking next The display mode is set Displaying the power on message next Video display checking is over Setting the display mode next Initializing the bus input IPL general devices next if present See the
62. ority This feature allows the user to prioritize the sequence for the Boot Device with the devices installed in the system The default settings with generic names are 1st Boot Device Removeable drive e g floppy drive 2nd Boot Device CD DVD 3rd Boot Device Hard drive 4th Boot Device LAN gt Disk Drives This feature allows the user to prioritize the Boot sequence from available hard drives 1st Drive 2nd Drive 3rd Drive 4th Drive Specify the boot sequence for the available hard drives on the system p Removable Drives This feature allows the user to specify the Boot sequence from available remov able drives 1st Drive Specifies the boot sequence for the 1st Removable Drive The options are 1st Floppy Drive and Disabled Chapter 4 BIOS p CD DVD Drives This feature allows the user to specify the boot sequence from available CDROM drives 1st Drive Specifies the boot sequence for the 1st Hard Drive 4 6 Security Menu AMI BIOS provides a Supervisor and a User password If you use both passwords the Supervisor password must be set first Change Supervisor Password Select this option and press lt Enter gt to access the sub menu and then type in the password Change User Password Select this option and press lt Enter gt to access the sub menu and then type in the password Clear User Password Select this option and press lt Enter gt to access the sub menu Y
63. ou can use the sub menu to clear the user password Boot Sector Virus Protection This option is near the bottom of the Security Setup screen Select Disabled to deactivate the Boot Sector Virus Protection Select Enabled to enable boot sector protection When Enabled AMI BIOS displays a warning when any program or virus issues a Disk Format command or attempts to write to the boot sector of the hard disk drive The options are Enabled and Disabled 4 13 H8DAR T H8DAR E User s Manual 4 7 Chipset Menu gt North Bridge Configuration Memory Configuration Memclock Mode This setting determines how the memory clock is set Auto has the memory clock set by the code and Limit allows the user to set a standard value MCT Timing Mode Sets the timing mode for memory Options are Auto and Manual User Configuration Mode Options are Auto and Manual Burst Length Use this setting to set the memory burst length 64 bit Dq must use 4 beats Options are 8 beats 4 beats and 2 beats Enable Clock to All DIMMs This setting allows the user to enable unused clocks to DIMMs even if DIMM slots are empty Options are Enabled and Disabled Software Memory Hole When Enabled allows software memory remapping around the memory hole Options are Enabled and Disabled Hardware Memory Hole When Enabled allows software memory remapping around the memory hole only supported by rev EO processors and above Options are En
64. ound 2 20 Chapter 2 Installation 2 10 Enabling SATA RAID Now that the hardware is set up you must now install the operating system and the SATA RAID drivers if you wish to use RAID with your SATA drives The installation procedure differs depending on whether you wish to have the operating system installed on a RAID array or on a separate non RAID drive See the instructions below for details Serial ATA SATA Serial ATA SATA is a physical storage interface that employs a single cable with a minimum of four wires to create a point to point connection between devices This connection is a serial link that supports a SATA transfer rate from 150 MBps The serial cables used in SATA are thinner than the traditional cables used in Parallel ATA PATA and can extend up to one meter in length compared to only 40 cm for PATA cables Overall SATA provides better functionality than PATA Configuring BIOS settings for SATA RAID To use SATA first enable the SATA controller with the JPS1 jumper 1 Press the Del key during system bootup to enter the BIOS Setup Utility Note If it is the first time to power on the system we recommend that you load the Optimized Default Settings If you have already done so please skip to Step 3 2 Use the arrow keys to select the Exit Menu Once in the Exit Menu scroll down the menu to select the item Load Optimized Default Settings and press the lt Enter gt key Select OK t
65. port Procedures and or Returning Merchandise for Service section s in this chapter Always disconnect the AC power cord before adding changing or installing any hardware components Before Power On 1 Check that the onboard Power LED is lit DP5 on the serverboard 2 Make sure that the 8 pin 12v power connector at JPW2 and the 24 pin processor power connector at J1B4 are both connected to your power supply 3 Make sure that no short circuits exist between the serverboard and chassis 4 Disconnect all ribbon wire cables from the serverboard including those for the keyboard and mouse 5 Remove all add on cards 6 Install a CPU and heatsink making sure it is fully seated and connect the chas sis speaker and the power LED to the serverboard Check all jumper settings as well 7 Use the correct type of onboard CMOS battery as recommended by the manufac turer To avoid possible explosion do not install the CMOS battery upside down No Power 1 Make sure that no short circuits exist between the serverboard and the chas sis 2 Verify that all jumpers are set to their default positions 3 Check that the 115V 230V switch on the power supply is properly set 4 Turn the power switch on and off to test the system 5 The battery on your serverboard may be old Check to verify that it still supplies If it does not replace it with a new one No Video 1 If the power is on but you have no video remove al
66. power on the system Notes Do not use PW ON connector to clear CMOS The onboard battery does not need to be removed when clearing CMOS however you must short JBT1 for at least four seconds JBT1 contact pads 2 15 H8DAR T H8DAR E User s Manual JLAN1 2 Enable Disable Change the setting of jumper JPL to enable or disable the JLAN1 and JLAN2 Gb Ethernet ports See the table on the right for jumper settings The default setting is enabled VGA Enable Disable JPG1 allows you to enable or disable the VGA port The default position is on pins 1 and 2 to enable VGA See the table on the right for jumper set tings 12 to PCI Enable Disable JI C1 2 pair of jumpers allow you to connect the System Management Bus to any one of the PCI slots The default setting is on pins 1 2 for both jumpers to enable the connection Both con nectors must have the same setting JI C1 is for data and JI C2 is for the clock See the table on right for jump er settings SATA Controller Enable Disable H8DAR T Jumper JPS1 is used to enable or dis able the Marvell 88SX6081 Serial ATA controller The default setting is on pins 1 2 to enable SATA See the table on right for jumper settings 2 16 JLAN1 2 Enable Disable Jumper Settings JPL Jumper Setting Definition Pins 1 2 Enabled Pins 2 3 Disabled VGA Enable Disable Jumper Settings JPG1 Jumper Setting Definition Pins 1 2 Enabled Pins 2 3 Disable
67. ppendix A BIOS Error Beep Codes During the POST Power On Self Test routines which are performed each time the system is powered on errors may occur Non fatal errors are those which in most cases allow the system to continue the boot up process The error messages normally appear on the screen Fatal errors are those which will not allow the system to continue the boot up pro cedure a fatal error occurs you should consult with your system manufacturer for possible repairs These fatal errors are usually communicated through a series of audible beeps The numbers on the fatal error list on the following page correspond to the number of beeps for the corresponding error All errors listed with the exception of Beep Code 8 are fatal errors 1 AMIBIOS Error Beep Codes Beep Code Error Message Description 1 beep Refresh Circuits have been reset Ready to power up 5 short 1 long Memory error No memory detected in system 8 beeps Display memory read write error Video adapter missing or with faulty memory A 1 H8DAR T H8DAR E User s Manual Notes A 2 Appendix B BIOS POST Checkpoint Codes Appendix B BIOS POST Checkpoint Codes When AMIBIOS performs the Power On Self Test it writes checkpoint codes to I O port 0080h Ifthe computer cannot complete the boot process diagnostic equipment can be attached to the computer to read I O port 0080h B 1 Uncompressed Initialization Codes The uncompressed
68. r See the table on the right for pin definitions Definition i Definition FDHDIN Reserved 2 FDEDIN Index Motor Enable Drive Select B Drive Select A Motor Enable DIR STEP Write Data Write Gate Track 00 Write Protect Read Data G G G G G G G G G G G G G Side 1 Select Diskette 2 19 H8DAR T H8DAR E User s Manual IDE Connectors IDE Drive Connectors Pin Definitions JIDE 1 JIDE 2 There are no jumpers to config Pin Definition Pin Definition ure the onboard IDE 1 and 2 1 Reset IDE Ground connectors See the table on 3 Host Data 7 4 Host Data 8 the right for pin definitions 5 Host Data 6 6 Host Data 9 7 Host Data 5 8 Host Data 10 9 Host Data 4 10 Host Data 11 11 Host Data 3 12 Host Data 12 13 Host Data 2 14 Host Data 13 15 Host Data 1 16 Host Data 14 17 Host Data 0 18 Host Data 15 19 Ground 20 Key 21 DRQ3 22 Ground 23 Write 24 Ground 25 Read 26 Ground 27 IOCHRDY 28 BALE 29 DACK3 30 Ground 31 IRQ14 32 00516 33 34 Ground 35 36 Addr2 37 Chip Select 0 38 Chip Select 1 39 Activity 40 Ground SATA Ports SATA Ports Pin Definitions M SATA0 3 There are no jumpers to con Pin Definition figure the SATA ports which 1 Ground are designated M SATAO 2 TXP M SATA1 M SATA2 and M 3 TXN SATA3 See the table on the 4 Ground right for pin definitions 5 RXN 6 RXP 7 Gr
69. s controller P Comp Mode Allows user to set values for this mode Options are Auto hardware compensa tion values Data allows user to override auto values with an absolute value CalComp Data allows user to add to the generated value and CalComp Data allows user to subtract from the generated value LinkO N Comp Mode Allows user to set values for this mode Options are Auto hardware compensa tion values Data allows user to override auto values with an absolute value CalComp Data allows user to add to the generated value and CalComp Data allows user to subtract from the generated value HT LinkO RZ Comp Mode Allows user to set values for this mode Options are Auto hardware compensa tion values Data allows user to override auto values with an absolute value CalComp Data allows user to add to the generated value and CalComp Data allows user to subtract from the generated value 4 16 Chapter 4 BIOS 4 8 Power Menu Power Button Mode Allows the user to change the function of the power button Options are Instant Off and 4 Sec Delay Restore on AC Power Loss This setting allows you to choose how the system will react when power returns after an unexpected loss of power The options are Power Off Power On and Last State Watch Dog Timer This setting is used to enable or disabled the Watch Dog Timer function It must be used in conjunction with the Watch Dog j
70. scription Default Setting 3rd Power Fail Signal En Dis Open Disabled CMOS Clear See Section 2 7 to PCI Enable Disable Pins 1 2 Enabled VGA Enable Disable Pins 1 2 Enabled JLAN1 JLAN2 En Disable Pins 1 2 Enabled SATA Enable Disable Pins 1 2 Enabled SATA Firmware Flash Open No Flash Watch Dog Pins 1 2 Reset 2 2 Description IPMI 2 0 Socket 1 2 Serial Port Header System Fan Headers System Management Bus Header 4 Pin Auxiliary Power Connector PS 2 Keyboard Port PS 2 Mouse Port 24 Pin ATX Power Connector Power Supply Alarm Reset Header Internal Speaker Buzzer Enable Power LED Header Front Panel Connector Floppy Disk Drive Connector IDE 1 IDE 2 Connectors Keylock Header Chassis Intrusion Header Gigabit Ethernet RJ45 Ports Overheat Warning Header Power Fail and Alarm Reset Header 8 Pin Power Connector Serial ATA Ports Serial ATA Activity LED Header SATA Header Wake On LAN Header Wake On Ring Header Onboard Speaker Buzzer Universal Serial 0 1 USB Headers Video Port 1 5 H8DAR T H8DAR E User s Manual Serverboard Features CPU Single or dual AMD dual core Opteron 200 series 64 bit processors in 940 pin microPGA ZIF sockets Memory Eight dual single channel DIMM slots supporting up to 32 GB of registered ECC DDR333 266 or up to 16 GB of registered ECC DDR400 SDRAM Note Memory capacities are halved for single CPU systems Refer to Section 2 4 b
71. ser the benefits of SATA RAID without the high costs associated with RAID hardware Note For Adaptec s RAID Driver Installation Instructions please refer to the Adapt ec RAID Controller User s Guide Emb SA UG pdf which is located in the CD that came with this serverboard You can also download a copy of Adaptec s User s Guide from our website Adaptec RAID Configuration Utility ARC To run the Adaptec RAID Configuration Utility you will need to enable the RAID function in the system BIOS refer to Chapter 4 for System BIOS configurations and then press the Ctrl and A keys simultaneously when prompted to do so during the system startup Refer to the previous page for detailed instructions Note To select an option use the arrow keys to highlight the item and then press the Enter key to select it To return to the previous menu press the Esc key Using the Array Configuration Utility ACU The Array Configuration Utility ACU enables you to create manage and delete arrays from the controller s BIOS add and delete spare drives and initialize drives During the system startup press the Ctrl and A keys simultaneously and the main menu will appear Managing Arrays Select this option to view array properties and delete arrays The following sec tions describe the operations of managing arrays To select this option use the arrow keys and the lt Enter gt key to select Manag ing Arrays fr
72. socket Note BKT 0005 is included for use with non proprietary heatsinks only When installing proprietary heatsinks only BKT 0004 CPU backplate is needed The BKT 0005 retention module was designed to provide compatibility with clip and cam type heatsinks from third parties Figure 2 1 CPU Backplate Heatsink Retention Module Installation Mounting screw Mounting screw 1 Heatsink retention module r CPU socket Serverboard t t Peel off release paper CPU backplate Installing the Heatsink We recommend the use of active type heatsinks except for 1U systems Connect the heatsink fans to a fan header near the CPU To install the heatsinks please follow the instructions included with your heatsink package not included 2 3 H8DAR T H8DAR E User s Manual 2 3 Mounting the Serverboard into a Chassis All serverboards and motherboards have standard mounting holes to fit different types of chassis Make sure that the locations of all the mounting holes for both the serverboard and the chassis match Although a chassis may have both plastic and metal mounting fasteners metal ones are highly recommended because they ground the serverboard to the chassis Make sure that the metal standoffs click in or are screwed in tightly 1 Check the compatibility of the serverboard ports and the I O shield The H8DAR T H8DAR E serverboard requires a chassis that can support extended ATX boards of 12 x 13 05 in size Make sure that
73. t the lever on CPU socket 1 until it points straight up 2 Use your thumb and your index fin ger to hold the CPU Locate pin 1 on the CPU socket and pin 1 on the CPU Both are marked with a triangle Triangles 3 Align pin 1 of the CPU with pin 1 of the socket Once aligned carefully place the CPU into the socket Do not drop the CPU on the socket move the CPU horizontally or vertically or rub the CPU against the socket or against any pins of the socket which may damage the CPU and or the socket 2 2 Chapter 2 Installation 4 With the CPU inserted into the socket inspect the four corners of the CPU to make sure that it is properly installed and flush with the socket 5 Gently press the CPU socket lever down until it locks in the plastic tab For a dual processor system repeat these steps to install another CPU into the CPU 2 socket Note if using a single processor only CPU 1 DIMM slots are addressable Installing the Heatsink Retention Modules Two heatsink retention modules BKT 0005 and four screws are included in the retail box Once installed these are used to help attach the heatsinks to the CPUs To install position the module so that the CPU backplate standoffs insert through the holes on the heatsink retention module and the four feet on the module contact the serverboard Secure the retention module to the backplate with two of the screws provided See Figure 2 1 Repeat for the second CPU
74. te of California County of Santa Clara shall be the exclusive venue for the resolution of any such disputes Supermicro s total liability for all claims will not exceed the price paid for the hardware product FCC Statement This equipment has been tested and found to comply with the limits for a Class A digital device pursuant to Part 15 of the FCC Rules These limits are designed to provide reasonable protection against harmful interference when the equipment is operated in a commercial environment This equipment generates uses and can radiate radio frequency energy and if not installed and used in accordance with the manufacturer s instruction manual may cause harmful interference with radio communications Operation of this equipment in a residential area is likely to cause harmful interference in which case you will be required to correct the interference at your own expense California Best Management Practices Regulations for Perchlorate Materials This Perchlorate warning applies only to products containing CR Manganese Dioxide Lithium coin cells Perchlorate Material special handling may apply See www dtsc ca gov hazardouswaste perchlorate WARNING Handling of lead solder materials used in this product may expose you to lead a chemical known to the State of California to cause birth defects and other reproductive harm Manual Revision 1 1a Release Date March 19 2009 Unless you request and receive written permission from SU
75. terface Control Pin Genoitions Orb ler LED connection is located on pins ori 11 and 12 of JF1 Attach the NIC1 LED cable to display network activity Refer to the table on the right for pin definitions Pin Definition 1 12 NIC1 Active 2 LED The NIC2 Network Interface Control Pn COE ler LED connection is located on pins 9 and 10 of JF1 Attach the NIC2 LED cable to display network activity Refer to the table on the right for pin definitions Pin Definition 9 Vcc 10 NIC2 Active Overheat Fan Fail LED OH Fan Fail LED Pin Definitions JF1 Connect an LED to the OH connection on pins 7 and 8 of JF1 to provide ad Pin Definition vanced warning of chassis overheat ing Refer to the table on the right for Control pin definitions 2 9 H8DAR T H8DAR E User s Manual Power Fail LED The Power Fail LED connection is located on pins 5 and 6 of JF1 Refer to the table on the right for pin defini tions This feature is only available for systems with redundant power supplies Reset Button The Reset Button connection is lo cated on pins 3 and 4 of JF1 Attach it to the hardware reset switch on the computer case Refer to the table on the right for pin definitions Power Button The Power Button connection is located on pins 1 and 2 of JF1 Mo mentarily contacting both pins will power on off the system This button can also be conf
76. test passed Performing the DMA Controller 1 base register test next The DMA controller 1 base register test passed Performing the DMA controller 2 base register test next The DMA controller 2 base register test passed Programming DMA controllers 1 and 2 next Completed programming DMA controllers 1 and 2 Initializing the 8259 interrupt controller next Completed 8259 interrupt controller initialization Extended NMI source enabling is in progress The keyboard test has started Clearing the output buffer and checking for stuck keys Issuing the keyboard reset command next A keyboard reset error or stuck key was found Issuing the keyboard controller interface test command next The keyboard controller interface test completed Writing the command byte and initializing the circular buffer next The command byte was written and global data initialization has completed Check ing for a locked key next Locked key checking is over Checking for a memory size mismatch with CMOS RAM data next The memory size check 15 done Displaying a soft error and checking for a password or bypassing WINBIOS Setup next B 5 H8DAR T H8DAR E User s Manual Checkpoint 86h 87h Code Description The password was checked Performing any required programming before WIN BIOS Setup next The programming before WINBIOS Setup has completed Uncompressing the WINBIOS Setup code and executing the AMIBIO
77. uestion How do update my BIOS Answer It is recommended that you not upgrade your BIOS if you are not experi encing problems with your system Updated BIOS files are located on our web site Please check our BIOS warning message and the information on how to update your BIOS on our web site Also check the current BIOS revision and make sure it is newer than your current BIOS before downloading Select your serverboard model on the web page and download the corresponding BIOS file to your computer Unzip the BIOS update file in which you will find the readme txt flash instructions the afudos exe BIOS flash utility and the BIOS image xxx rom files Copy these files to a bootable floppy disk insert the disk into drive A and reboot the system At the DOS prompt after rebooting enter the command flash without quotation marks then type in the BIOS file that you want to update with xxxx rom Question What s on the CD that came with my serverboard Answer The supplied compact disc has quite a few drivers and programs that will greatly enhance your system We recommend that you review the CD and install the applications you need Applications on the CD include chipset drivers for Windows and security and audio drivers 3 3 H8DAR T H8DAR E User s Manual Question Why can t I turn off the power using the momentary power on off switch Answer The instant power off function is controlled in BIOS by the Power Button Mode s
78. uild an array 1 From the Main Menu select Manage Arrays From the list of arrays select the array you want to rebuild 2 Press lt Ctrl gt lt R gt to rebuild Using the Disk Utilities The Disk Utilities enable you to format or verify the media of your SATA hard disks To access the disk utilities 1 Turn on your computer and press lt Ctrl gt lt A gt when prompted to access the ARC utility 2 From the ARC menu select Disk Utilities 3 Select the desired disk and press lt Enter gt You can choose from the following options 1 Format Disk Simulates a low level format of the hard drive by writing zeros to the entire disk Serial ATA drives are low level formatted at the factory and do not need to be low level formatted again Caution Formatting destroys all data on the drive Be sure to back up your data before performing this operation 2 Verify Disk Media Scans the media of a disk drive for defects To Exit the Adaptec RAID Configuration Utility Once you have completed RAID array configurations press lt Esc gt to exit On the following screen select Yes to exit the utility 2 27 H8DAR T H8DAR E User s Manual Notes 2 28 Chapter 3 Troubleshooting 3 1 Chapter 3 Troubleshooting Troubleshooting Procedures Use the following procedures to troubleshoot your system If you have followed all of the procedures below and still need assistance refer to the Technical Sup
79. umper see Chapter 2 for details The options are Disabled and Enabled 4 17 H8DAR T H8DAR E User s Manual 4 9 Exit Menu Select the Exit tab from AMI BIOS Setup Utility screen to enter the Exit BIOS Setup screen Save Changes and Exit When you have completed the system configuration changes select this option to leave BIOS Setup and reboot the computer so the new system configuration parameters can take effect Select Save Changes and Exit from the Exit menu and press lt Enter gt Discard Changes and Exit Select this option to quit BIOS Setup without making any permanent changes to the system configuration and reboot the computer Select Discard Changes and Exit from the Exit menu and press lt Enter gt Discard Changes Select this option and press lt Enter gt to discard all the changes and return to AMI BIOS Utility Program Load Optimal Defaults To set this feature select Load Optimal Defaults from the Exit menu and press lt Enter gt Then Select OK to allow BIOS to automatically load the Optimal Defaults as the BIOS Settings The Optimal settings are designed for maximum system performance but may not work best for all computer applications Load Fail Safe Defaults To set this feature select Load Fail Safe Defaults from the Exit menu and press lt Enter gt The Fail Safe settings are designed for maximum system stability but not maximum performance 4 18 Appendix A BIOS Error Beep Codes A
80. ust be mailed when service is complete For faster service RMA authorizations may be requested online http www supermicro com support rma This warranty only covers normal consumer use and does not cover damages in curred in shipping or from failure due to the alteration misuse abuse or improper maintenance of products During the warranty period contact your distributor first for any product problems 3 4 Chapter 4 BIOS Chapter 4 BIOS 4 1 Introduction This chapter describes the AMIBIOS Setup utility for the HBDAR T H8DAR E The AMI ROM BIOS is stored in a flash chip and can be easily upgraded using a floppy disk based program Note Due to periodic changes to the BIOS some settings may have been added or deleted and might not yet be recorded in this manual Please refer to the Manual Download area of our web site for any changes to BIOS that may not be reflected in this manual Starting the Setup Utility To enter the BIOS Setup Utility hit the lt Delete gt key while the system is booting up In most cases the lt Delete gt key is used to invoke the BIOS setup screen There are a few cases when other keys are used such as lt F1 gt lt F2 gt etc Each main BIOS menu option is described in this manual The Main BIOS screen has two main frames The left frame displays all the options that can be configured Grayed out options cannot be configured The right frame displays the key legend
81. y initialization after the keyboard controller BAT command test OFh The initialization after the keyboard controller BAT command test is done The key board command byte is written next 10h The keyboard controller command byte is written Next issuing the Pin 23 and 24 blocking and unblocking command 11h Next checking if lt End or lt Ins gt keys were pressed during power on Initializing CMOS if the Initialize CMOS RAM in every boot AMIBIOS POST option was set in AMIBCP or the lt End gt key was pressed Next disabling DMA controllers 1 and 2 and interrupt controllers 1 and 2 The video display has been disabled Port B has been initialized Next initializing the chipset The 8254 timer test will begin next Next programming the flash ROM The memory refresh line is toggling Checking the 15 second on off time next Passing control to the video ROM to perform any required configuration before the video ROM test All necessary processing before passing control to the video ROM is done Look ing for the video ROM next and passing control to it The video ROM has returned control to BIOS POST Performing any required pro cessing after the video ROM had control Reading the 8042 input port and disabling the MEGAKEY Green PC feature next Making the BIOS code segment writable and performing any necessary configura tion before initializing the interrupt vectors The configuration required before interrupt vect

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