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ADSP-BF527 EZ-KIT Lite® Evaluation System Manual

1. 3 3V o sere ic NEN 0 L_UNREG_IN 6 S 10 a L3 LCD DENMI __ LCD i INDO14 T R175 KEY PEN CS e VY 0 0402 8307 DTOPRIA_PPIFS3 D13 FER21 4 7K C185 C176 DFLS240 600 SPISEL2 CDG 0402 22UF 0 1UF POWER_DI123 0805 1210 0603 LCD BACKLIGHT R305 5V e gt FONE ENON C paa 1 10 O VR5 0402 o R300 i SPISEL5 HOSTDSI IKEY PEN CS 1 7 SPISELS _HOSTD9 MIKEY PEN CS 0603 miis sini IERXD1 HOSTD8 IC ED TRT FB ge FP 2 SWT020 9 3 8 SD ss 3 3V O C175 C174 SW18 selects SPISEL2 default or SPISEL4 10UF 0 1UF 2 0805 0603 0 Note SPISEL4 conflicts with Ethernet ERXD1 set SW1 to default ADPT6TT R298 C244 C195 C251 MSOP8 47 5K 10UF OUF O 1UF 0603 C246 1210 0603 0805 C 3 3V C190 0 1UF R299 423 U16 01UF T 0603 10 0K R93 R92 0603 T 0603 0603 0402 lt 0402 BUSY gt KEYPAD BUSY 5 E C245 di
2. U3 3 3V din x R89 R87 R88 TP3 10K 1 2K 1 2K 0402 0402 0402 U2 L AY L DSP R28 XTALI B7 20 1 ss PJO PPIFS1 TMRO gt IPPIFS1 1 P23 oris LPPIFST __ 1 0402 PJ1 PPICLK TMRCLK 46 PPICLK PJ2 SCL 822 por ISPA I DSP g U RTXI PJ3 SDA 222 ISDA i L DSP RIXO 29 PPIDO lt gt A pFOJPPIDO DROPRI ND PHO ND DO MIICRS RMIICRSDV HOST DO V PPIDII 4 2 PI PPIDI RFSO ND PH1 ND_D1 ERXER HOST_D1 PPID2I lt gt pEajPPIDZ RSCLKO ND D2A PH2 ND D2 MDIO HOST 02 E PPbS lt gt E pFa PPIDS DTOPRIND PH3 ND_D3 ETXEN HOST_D3 PPID4I lt gt PF4 PPID4 TFSO ND_D4A TACLKO PH4 ND_D4 MIITXCLK RMIIREF_CLK HOST_D4 ME PPS 9810 PF5 PPIDS TSCLKO ND_DSA TACLK1 PH5 ND D5 ETXDO HOST 05 i PPIDel lt gt pFe PPIDe DTOSEC ND DeA TACIO PH6 ND D6 ERXDO HOST 06 PPID7I lt gt BIS pEzIPPIDZ IDROSEC ND D7ATACH PH7 ND D7 ETXD1 HOST D7 r Ebo lt 816 PF8 PPID8 DR1PRI PH8 SPISEL4 ERXD1 HOST_D8 TACLK2 gt A20 pEg pPID9 RSCLK1 SPISEL6 PH9 SPISEL5 ETXD2 HOST_D9 TACLK3 ABE1 SDOM1 4 gt IABEIESDOMi 7777 77777 UARTIRTS_PENIRGH lt gt PF10 PPID10 RFS1 SPISEL7 010 22 INDCE HOSTDi0 777711 5 89 gt ABEO
3. 1000PF 2avDD DOUT gt ISPIMISO MEUM e e 28 ____ CSIM 5 xP Ep e e e WO jee Ses IX KEYPAD 7 r scLx Ll SPISCKI 5 1 R94 gt R95 gt R96 R97 CD 3 tence 1 26 XX i 10K 2 gt 10 gt 10K 10K L___SPIMoS gt DIN vat nca 040252 0402 0402 lt 0402 ENABLE a 1 n sul SW5 po L_______UARTIRTS_PENIRQ lt CNET 4 CO 5 2 cs p HOSTWR LEDI 5834 P cal 3 Eg ee i RESET M 5 1 IHRE i 118 4 L 4 12 oe eee 24 mU REF 14 5 SWT018 10 R4 3 3V AUX1 15 6 O 11 R3 AUX2 16 7 8 R2 e 17 8 U33 9 R1 e e BAT2 9 VCCIIO DACOUTIS IDE PPK 5 o C138 C137 7 l _ LCD 0 01UF 77 0 01UF 440 acke 0402 0402 MAXT253 1 R188 QFN28 On nnn 1 0805 L __ L D PPIFS2I gt 40 36 e lO GTS1 oi v 3 0 GTS2 olal8 RESET gt 4o csh 01499 U16 ol1588 016 SW5 Keypad LCD enable i i a E EU 40100 01722 LCD BACKLIGHT ore TGS s sss ii 2401 182 1 1 POS FROM TO DEFAULT FUNCTIONS BACKLIGHT 42 o 196 191 POWER 13 DEN E 0 01UF 10K P eoi Qoo SW1 1 DSP U2 PF10 Keypad IC U16 ON OFF SW10 3 used a
4. 3 3V O 3 3V 3 3V e FA R178 R177 R176 10K 10K 10K R121 0402 0402 0402 10K 0402 U22 PB1 R124 R127 C163 1 2 18 3 3V 100 10 0 01UF L LEDO p Di Q nets 1 2 nets 0402 RUND HOSTWR LED1I 41A2 1 216 1 5 3 6 14 SW15 b oli HOSTACK LED2j e 1Y3 C164 4UF 11 9 LED3 LED2 LED1 LED4 m T 0805 U22 9 Pal 21 YELLO YELLOW YELLOW W GREEN POWER ia oval 16000 y E20 ge e 5 A3 2Y35 e om 24 R113 R112 R115 R111 GPIO ENABLE U 330 330 330 330 OF 0603 0603 0603 0603 un os 0402 IDT74FCT3244APY PB2 R122 R128 SW13 SSOP20 100 19 1 H2 I 0805 U17 0603 gt QIWAIT PUSHBUTTONT _____ e O O 8 x 2 IHOSTADDR PUSHBUTTON2 1 NA SW14 3 10 MOMENTARY ta gt C165 HOSTACK 4 gr 2 gt PPICSELI 0805 LL KEYPAB BUSY 0 W gt IHWAT PUSHBUTTONi USB VRSELI C WW gt J iHOSTADDR PUSHBUTTONZ 771 e SWTO17 2 SW13 GPIO enable POS FROM TO DEFAULT FUNCTIONS HOST SW13 1 push button 1 DSP U2 ON ON PB1 OFF UART 1 CTS U25 HOST connector P13 12 Keypad busy SW13 8 Expansion Interface J1 84 SW13 2 push button 2 DSP U2 PG13 ON ON PB2 OFF HOST connector P13 8 OTG voltage select SW13 7 Expansion Interface J1 85 P13 SW13 3 OFF NC 3 4
5. HIyDDINT8 oe into 44 1 H16 P14 NDDINT10 GND45 e J8 P15 aii to STUF STOF ur J16 R9 10UF O 0 0 ems _ 0 0 0 0 cm 0 wNWDDINTI2 GND47 9 0805 71 0400 77 0402 77 0402 77 002 77 0400 7 0402 77 0402 77 0402 77 0402 0402 oe rsvppNT13 GNpag 9 e e e e e e e e e e pnts LI6DDINT16 N Z e MByDDINT17 GND52pl4 LOSSEN oe M ybpINT18 15 m e NDDINT19 N ybpINT20 P8 e e e e e e e e e e e e e e e e e NVDDINT 1 P16 2 5V e VDDINT22 O C52 C43 C50 C49 C48 C47 C41 C40 C39 C38 C54 C53 C55 C51 C45 C44 C46 C42 R8 10UF 10UF 0UF 0UF 01UF 041UF 01UF 0UF 01UF 0UF 00IUF 0 01UF 0 01UF 0 01UF 0 01UF 0 01UF 0 01UF 001UF MDDNTI23 0805 0805 77 0402 002 77 0402 002 77 002 77 0402 77 002 77 002 77 0402 77 0400 77042 77 0402 002 77 0402 77 0402 77 0402 e RIDDINT24 e l8yppiNr25 e e e e e e e e e e e e e e e e e TSppINT26 Tid R180 NDDINT27 RTC BATTERY ns T oJ 0
6. 12 MHz 7V Power Oscillator 5 Connector Regulation Figure 2 1 System Architecture The EZ KIT Lite is designed to demonstrate the capabilities of the ADSP BF527 processors The processor has an I O voltage of 3 3V The core voltage of the processor is controlled by the internal voltage regulator ADSP BF527 EZ KIT Lite Evaluation System Manual ADSP BF527 EZ KIT Lite Hardware Reference The core voltage and clock rate can be set on the fly by the processor The input clock is 25 MHz A 32 768 kHz crystal supplies the real time clock RTC inputs of the processor The default boot mode for the processor is external parallel flash boot See Boot Mode Select Switch SW2 on page 2 11 for information on how to change the default boot mode Programmable Flags The processor has 50 general purpose input output GPIO signals spread across four ports PF PG PH and PJ The pins are multi functional and depend on the ADSP BF527 processor setup The following tables show how the programmable flag pins are used on the EZ KIT Lite PF programmable flag pins Table 2 1 PG programmable flag pins Table 2 2 PH programmable flag pins Table 2 3 PJ programmable flag pins Table 2 4 Table 2 1 PF Port Programmable Flag Connections Processor Pin Other Processor Function EZ KIT Lite Function
7. 77 7 SW1 1 DSP U2 PH2 PHY U14 OFF ON MDIO PHY U14 OFF NAND U4 HOST connector P13 27 Expansion Interface J3 42 SW9 4 discconnects SPISEL1 for use on expansion interface J2 11 3 6 meu eom ine ee 006 ERXDO HOSTDe 1 SW1 2 DSP 02 PG14 PHY U14 OFF ON MDC PHY 1 14 OFF HOST connector P13 2 Expansion Interface J3 41 4 5 v mum WR 1 gt a n gt 15 1 FLASH CS m RU Em DP ACTIVITYLED SW1 3 GND RMII CLK U24 ON ON RMII CLK disabled OFF CLK enabled SWTO18 SW1 4 RESET IC 027 PHY U14 OFF ON PHY not held in reset OFF PHY held in reset VDDIO 1 VDD33 I m m m ANALOG 20 Road e e e e e e 03063 4 DEVICES 1 00 C128 C121 C120 C127 C122 C129 C126 C125 C124 C123 pe AU AUS PH 1 800 ANALOGD 10UF 0 01UF 3 3UF 0 01UF 0 010 3 3UF 0 01UF 0 01UF 0 01UF 0 01UF 0805 0402 0805 0402 0402 0805 0402017 0402 71 0402 0402 Title ADSP 527 EZ KIT Lite RMII PHY SHGND2 Size Board No AO 208 2006 Rev Date 4 28 2009 15 57 Sheet 7 of 13 A B C D
8. __ USB_VRSEL 580 GND FB C148 GND Fo Wa 1 VR4 4 ADP3336ARMZ R146 C177 R117 1UF T 0805 1 MSOP8 210 0K 4 7UF 1K 0805 SOIC8 FER19 N Z INI OUTI 0805 T 0805 0603 C179 600 8 C178 DNP 1000 1206 N OUT2 1UF 4 SD FB FER20 4 ADP3336ARMZ R137 C143 N Z 600 MSOP8 1050 4 7UF R145 1206 0603 T 0805 64 9K e CN Y YN e ems rs 0805 F T 0805 SHGN l 4 4 N Z R136 SHGN 95K 0603 N Z Unpopulate P14 when measuring VDDINT 519 SHORTING eee JUMPER L_UNREGN i N lt DEFAULT INSTALLLED C184 C181 Unpopulate P15 when measuring VDDINT 10UF 10UF VROUT 1 TP5 po4210 805 3 3V O DNP SJ8 SHORTING P14 o 3 3V 2A JUMPER DEFAULT INSTALLLED M 2 R149 0 021 L1 R143 0402 10UH 0 05 PGND INDOO1 1000 eee TP6 33V VDDEXT 1 b IIS IVDDINT TP15 4 77 lt 41 5 1 R150 VR1 2 6 24 9 15 0603 5 3 7 1 T cT10 IDC2XT 1 VDDEXT 4 B D9 100UF 4 5 3 ZHCS1000 5 12 R142 SOT23 312 C182 C183 6 2 5UH 0 05 TP17 470PF 68PF 6 IND013 1206 T 0603 T 0603 PGATE 7 SOIC8 GND C170 C169 R151 2 ADPT864AUJZ 8 100UF 10UF 0 1UF 80 6K SOT23 6 ING 0805 0603 0603 a T cT12 C171 SMATIDY MBRSS40T3G 220UF 22UF 47UF
9. clock and SW1 position 4 holds the PHY in reset set to OFF or connects the PHY reset to the EZ KIT Lite reset set to ON 2 10 ADSP BF527 EZ KIT Lite Evaluation System Manual ADSP BF527 EZ KIT Lite Hardware Reference Table 2 5 ETH Enable Switch SW1 SW1 Switch Setting Ethernet Mode OFE ON OFF OFF default ON ON OFF ON ON Boot Mode Select Switch SW2 The rotary switch SW2 determines the boot mode of the processor Table 2 6 shows the available boot mode settings By default the ADSP BF527 processor boots from the on board parallel flash memory The selected position of SW2 is marked by the notch down the entire rotating portion of the switch not the small arrow Table 2 6 Boot Mode Select Switch SW2 SW2 Position Processor Boot Mode 0 Reserved 1 Boot from 8 bit external flash memory default 2 Boot from 16 bit asynchronous FIFO 3 Boot from serial SPI memory 4 Boot from SPI host device 5 Boot from serial TWI memory 6 Boot from TWI host 7 Boot from UARTO host 8 Boot from UARTI host 9 Reserved A Boot from SDRAM B C D Reserved ADSP BF527 EZ KIT Lite Evaluation System Manual Push Buttons and Switches Table 2 6 Boot Mode Select Switch SW2 Cont d SW2 Position Processor Boot Mode E Boot from 16 bit host DMA F Boot from 8 bit host DMA Rotary Encoder with Momentary Switch SW3
10. 4 7K 1 16W 590 0402 R23 R212 R307 VISHAY CRCW04024K70JNED ADSP BF527 EZ KIT Lite Evaluation System Manual ADSP BF527 EZ KIT Lite Bill Of Materials Ref Qty Description Reference Manufacturer Part Number Designator 77 15 0 1 16W 596 R6 R35 R49 R56 PANASONIC ERJ 2GEOR00X 0402 R110 R116 R149 R172 R175 R180 183 R192 R215 78 2 1 2K 1 16W 5 R87 88 PANASONIC ERJ 2GEJ122X 0402 79 3 22 1 16W 5 R193 195 PANASONIC ERJ 2GEJ220X 0402 80 19 33 1 16W 596 R1 R7 10 R31 R46 VISHAY CRCW040233ROJNEA 0402 R139 R167 81 2 18PF 50 5 C1 C3 AVX 08055A180JAT2A 0805 82 13 100UF 10V CT6 CT9 10 AVX TPSC107K010R0075 10 C 83 1 64 9K 1 10W 1 R145 VISHAY CRCW080564K9FKEA 0805 84 1 210 0K 1 4W 1 R146 VISHAY CRCW0805210KFKEA 0805 85 2 1 5K 1 10W 5 R71 72 PANASONIC ERJ 3GEYJ152V 0603 86 5 0 1UF 16V 10 C169 C174 C176 AVX 0603YC104KAT2A 0603 C195 C246 87 3 1UF 16V 10 C96 C104 C109 PANASONIC ECJ 1VB1C105K 0603 88 1 10UF 25V C244 AVX 1210YD106KAT2A 80 20 1210 89 2 68 50 5 141 183 06035A680 AT2A 0603 90 1 4 7UF 6 3V 20 C131 PANASONIC ECJ 1VB0J475M 0603 91 2 470PF 50V 5 C140 C182 AVX 06033 471 2 0603 ADSP BF527 EZ KIT Lite Evaluation System Manual A 7 Ref Qty Description Reference Manufacturer
11. C117 0402 C113 C116 10K D TIN Rc UN ES 3 3UF 0 01UF 3 3UF 0 01UF DNE C osod YDD33 4 0603L VDDA93 0805 0402 0808 paraman sS S 1 Lo e R60 R61 R62 R63 R64 ETHERNET 49 9 49 9 49 9 49 9 10 R73 R71 R72 0603 0603 0603 0603 0805 10K 1 5K 1 5K 0402 0603 0603 9 c gu qw U26 J9 2 5 8989 a e 2 8 9 9 1 16 1 TD TX gt gt gt 2 m 4 MDIO 2 2 7777 15PF 3 3 i 14 3 I MDC NI MDC 0402 e TD TX 15 RXDS NINTSEL be TXN TETIGI TCM 15 4 e e e m 16 TXN e 5 MODE21 B RXD2 MODE2 ____ ERXD1_HOSTD8 C 17 RxD1 MODE1 RD 11 6 iT ______NDD6_ERXD0_HOSTD6 18 RXDOMODEO 82 4 ReT g 19 RXP 3 9 8 RX_DV RD RX eee ERXER HOSTD lt 21 RX ER RXD4 PS UE 2 222 22 Tx RXN 9 e HXTT88 T e Tasche CE 1 8 ICS007 Y NDD3_ETXEN_HOSTD3 X EN R82 R81 R84 R85 gt R83 R80 eee l HI ed 23 1x00 SPEED100 PHYADO P 0803 0603 lt 06085 080352 0603 0603 007 ETXDi HOSTD7I 24 LNKPHYAD1 10 1 C112 26 ACTIVITY PHYAD2 1 FADIMITVEED Gas 21 FDUPLEX PHYADS 12 C133 122221222 000 RMIICRSDV HOSTDOI lt 1 55 DV U VDO 3 12 409 499 3
12. PFO PPIDO DROPRI ND_DOA Default LCD via U31 buffer Expansion interface J1 72 PPI connector P8 8 PF1 PPID1 RFSO ND_D1A Default LCD via U31 buffer Expansion interface J1 73 PPI connector P8 9 PF2 PPID2 RSCLKO ND_D2 Default LCD via U31 buffer Expansion interface J1 74 PPI connector P8 10 PPID3 DTOPRI ND_D3A Default LCD via U31 buffer Expansion interface J1 75 PPI connector 8 11 PF4 PPID4 TFSO ND_D4A TAC Default LCD via U31 buffer LKO Expansion interface J2 43 PPI connector P8 12 ADSP BF527 EZ KIT Lite Evaluation System Manual 2 3 Programmable 5 Table 2 1 PF Port Programmable Flag Connections Cont d Processor Pin Other Processor Function EZ KIT Lite Function PES PPID5 TSCLKO ND_D5A T Default LCD via U31 buffer Expansion interface 22 44 PPI connector P8 13 PF6 PPID6 DTOSEC ND_D6A T Default LCD via U31 buffer ACIO Expansion interface J2 45 PPI connector P8 14 PET PPID7 DROSEC ND_D7A T Default LCD via U31 buffer ACI1 Expansion interface J2 46 PPI connector P8 15 PF8 PPID8 DRIPRI Default LEDO Expansion interface J1 79 J2 29 J2 47 via quick switch U34 to the following connectors VPP board P4 2 SPORTO P6 25 SPORTI P7 8 SPI P9 14 TWI P10 10 and PPI P8 24 PF9 PPID9 RSCLK1 SPISEL6 Default KEYIRQ 016 via SW5 2 Expansion interface J2 48 J2 33 SPORTI connec tor P7 16 and PPI connector P8
13. rF 2 R70 R59 gt R65 R66 0603 0603 CRS PHYAD4 10K 10K 1 0402 _ 0402 lt 0402 0402 3 3V 5 NINT TX_ER TX4 DNP PHY ADDRESS 0x01 O i RESET NRST R69 2 22221222 NDD4 RMIREFCLK 4 14 CLKINIXTALI 0402 foooPr XTAL2 5 5 155 5 1 2 0 01UF x 9 2 QIFSOA RMIMDINT amp HOSTCE 1 0402 L 5 QFN36 3 3V CX C131 C132 47UF 04UF N Z R158 R157 R76 R67 0603 0402 ETH ENABLE 10K 10K 10K 12 4K 3 3V U24 0402 0402 0402 0603 O CLK 166 SW1 10K Nope HOSTE CO WL 2 1 i R167 MDG HOSTRDEI O 0402 P AAA BMIREFGLKCHOSTD4 77 L RESETI 5 PHY RESET 7 DP 08 003 3 3V SWTO18 3 SWS9 Ethernet Mode Select SW9 1 SW9 2 SW9 3 gt MODE 2 0 MODE DEFINITIONS R169 10K 111 All Capable Auto Negotiation DEFAULT 0402 110 Power Down Mode 101 Repeater Mode Auto Negotiation 100 100Base TX Half duplex Advertised Auto Negotiaion LED6 LED7 ETH MODE R75 YELLOW GREEN N 011 100Base TX Full Duplex ELASH CS 10K 1 0001 x LEDOO1 0402 3 1 010 100Base TX Half Duplex SW1 ETH Enable 001 10Base T Full Duplex R68 R77 Sw9 330 0 330 0 POS FROM TO DEFAULT FUNCTIONS 000 10Base T Half Duplex Eee 0402 0402 2 2
14. Xvi 1 xvi Whats New in This Manual eM xvii Techies ar Customer Support xvii Supported Processors ura fates erased Product Marmati xviii Analog Devices o Si PTT xviii VisualDSP Online Documentation xix Ji Le Notation 0 USING ADSP BF527 EZ KIT LITE Te 1 3 i o HE irri Me 1 4 TS 1 5 ADSP BF527 EZ KIT Lite Evaluation System Manual CONTENTS Evaluation License Restrictions 1 7 La khos s EPI 1 8 gH co ee oda endear 1 8 SDRAM tT mmm 1 11 Parallel Flash Memory Intetface 1 13 KAND 45 0 1 13 ral icri e MN e 1 15 ITT Im a nae uum Edi pp tid Los dE HO 1 16 LED Modulle DARE 1 17 Touchscreen and Keypad Interface J 1 18 Rotaiy Encoder net Due 1 19 rhet Tmerr a u l luu eee initi dE 1 20 Audie lorade uuu s enema eee ene 1 21 ey ree aetna 1 22 em 1 23 eae cee 1 24 RD 1 25 TO 1 20 lj n oM o M 1 26 1 27 ER 1 27 En 1 28 Background Telemetry Channel
15. S SSOP20 C192 C191 0 1UF 0 1UF T 0402 T 0402 3 3V O 3 3V U31 U32 F R105 lt R106 lt R104 10K 10K gt gt 10K 040252 0402 0402 C158 0 1UF U25 0402 C160 1 0 1UF J4 3 Populate JP1 to control UART CTS C1 I 1 flow control by HWAIT_PUSHBUTTON1 4 e 157 02 A HWAIT ENABLE GIUE 2 UARTPL S WtO not 180 707 AWA PUSHBUTTON lt 1 P DGX UARTIRX 2 1 OUT RIN 4 UARTIATS PENIRGH ome maOUT 4 5 5 SHORTING MW SOIC16 C161 Q JUMPER DIP4 Q4UF d DEFAULT NOT INSTALLLED SWTO18 M 0402 CON038 DNP UART ENABLE JP5 3 3V 1 T SERIAL PORT lt 7 1 UART 1 88e ERO ANALOG 200010 T 0402 DEFAULT NOT INSTALLED Nashua NH 03063 ICES PH 1 800 ANALOGD UART LPBK Title ADSP 527 EZ KIT Lite 025 ROTARY SWITCH RS232 Size Board No 02 08 2006 Date 4 28 2009 15 56 Sheet 9 of 13 A B C D
16. Table 2 10 ETH Mode Flash CS Switch SW9 SW9 Switch MODE 2 0 Mode Definitions Setting Setting ON ON ON 111 All capable auto negotiation default ON ON OFF 110 Power down mode ON OFF 0 10 Repeater mode auto negotiation ON OFF OFF 100 100Base TX half duplex advertised auto negotiation OFF ON 0 01 100Base TX duplex OFF ON OFF 010 100Base TX half duplex OFF OFF ON 00 10Base T full duplex OFF OFF OFF 000 10Base T half duplex UART Enable Switch SW10 The UART enable switch 5810 disconnects the UART1 signals from the GPIO pins of the processor When SW10 is OFF its associated GPIO signals can be used for other functions on the board SW10 default is OFF ON OFF ON Flow control is not implemented in POST so 5110 positions 1 and 3 are OFF Refer to the ADM3202 datasheet for more information about the UART interface ADSP BF527 EZ KIT Lite Evaluation System Manual 2 15 Push Buttons and Switches Rotary NAND Enable Switch SW11 The rotary NAND enable switch 5811 disconnects the rotary encoder signals from the GPIO pins of the processor When SW11 is OFF its associ ated GPIO signals can be used on the host interface see Table 2 11 Position 4 of SW11 disconnects the chip enable NAND flash memory U4 Table 2 11 Rotary NAND Enable Switch SW11 SW11 Position From To Alternate Function OF
17. O e 040252 0402 10K 0402 3 3V 80 1 5 77 7 i 0 01UF L___SPIMOSI 5 gt ISPIMISO T 0402 10K lt 10K SPISCKI 0402 0402 0402 aera S PI FLASH CS e 155 U4 o 3 3V BN WP J 99 by sni Nee ets Ho v NDCE D07 gt 000 1 GND U8 i URE Boe pie O NDD ERER HOSTDT 707 sowo e ty 48 b1 rini R25 RU NDWR amp HOSTD11 WE D27 gt 14002 2 10K C78 C79 NDALE HOSTDI5I D gt iNDDG_ETXEN_AOSTD3 777 as 0 1UF 0 01UF 16 0402 0402 L NDCLE HOSTD14 CL AN ALO I 20 Cotton Road 19 WP N Z Nashua NH 03063 MR NDBUSY HOSTDI3i lt 1 RI B dedican PH 1 800 ANALOGD aa 22 OO X NANDOS e Title ADSP 527 EZ KIT Lite MEMORY Size Board No Rev C A0208 2006 20 Date 4 28 2009 15 57 Sheet 4 of 13 B C D 3 3V O 3 3V _ ca C89 IBV U8B 71 0 1UF 0 ses 0402 T 0805 m LU es sm o i 0402 5 J DNP E T 0805 R36 R31 m THERM 33
18. Package Contents Your ADSP BF527 EZ KIT Lite evaluation system package contains the following items ADSP BF527 EZ KIT Lite board VisualDSP Installation Quick Reference Card CD containing v VisualDSP software v ADSP BF527 EZ KIT Lite debug software v USB driver files v Example programs v ADSP BF527 EZ KIT Lite Evaluation System Manual Universal 7 0V DC power supply 7 foot Ethernet patch cable Three 6 foot 3 5 mm male to male audio cables 3 5 mm headphones 10 foot USB male cable for USB debug agent 5 in Icable and connectors for USB on the go applications Ethernet loopback connector If any item is missing contact the vendor where you purchased your EZ KIT Lite or contact Analog Devices Inc ADSP BF527 EZ KIT Lite Evaluation System Manual 1 3 Default Configuration Default Configuration The ADSP BF527 EZ KIT Lite board is designed to run outside your per sonal computer as a stand alone unit You do not have to open your computer case The EZ KIT Lite evaluation system contains ESD electrostatic discharge sensitive devices Electrostatic charges readily accumulate on the human body and equipment and can discharge without detection Permanent damage may occur on devices subjected to high energy discharges Proper ESD precautions are recommended to avoid performance degradation or loss of functionality Store unused EZ KIT Lite boards in the protective shipping pack
19. The rotary encoder SW3 can be turned clockwise for an up count or counter clockwise for a down count The encoder also features a momen tary switch activated by pushing down the switch and setting the counter to zero The rotary encoder is a two bit quadrature Gray code encoder Refer to the Rotary Counter section of the ADSP BF52x Hardware Ref erence Manual for additional information about interfacing with this style rotary encoder The rotary encoder can be disconnected from the processor by setting the rotary enable switch 5811 positions 1 2 and 3 to OFF See Rotary NAND Enable Switch SW11 on page 2 16 for more information MIC Gain Switch SW4 The microphone gain switch SW4 sets the gain of the MIC signal which is connected to the top 3 5 mm jack J7 The gain can be set to 14 dB 0 dB or 6 dB by turning ON position 1 2 or 3 of the switch see Table 2 7 When the corresponding position for the desired gain is ON the remaining positions should be OFF Refer to Audio Interface on page 1 21 for more information on the audio codec Table 2 7 MIC Gain Switch SW4 Gain SW4 Switch Settings 5 14 dB ON OFF OFF OFF 1 0 dB OFF ON OFF OFF 2 12 ADSP BF527 EZ KIT Lite Evaluation System Manual ADSP BF527 EZ KIT Lite Hardware Reference Table 2 7 MIC Gain Switch 55 4 Contd Gain SW4 Switch Settings 0 5 6 dB OFF OFF ON OFF default Unuse
20. 1 28 Reference Design 1 29 ADSP BF527 EZ KIT Lite Evaluation System Manual vi CONTENTS ADSP BF527 EZ KIT LITE HARDWARE REFERENCE t mgumu uu eee ees 2 2 lg rct Al M 2 3 Pusk Buttons abd tiie 2 10 ETH Enable Switch SWI 2 10 Boot Mode Select Switch SW2 es 2 11 Rotary Encoder with Momentary Switch 55 3 2 12 Gain Switeh SWA 2 12 Keypad Enable Switch 2 13 Flash Enable Switch SW7 aaa 2 14 Mic HP LPBK Audio Mode Switch SW8 2 14 ETH Mode Flash CS Switeh SW9 2000 2 15 Enable 8 2 15 Rotary NAND Enable Switch 2 16 GPIO Enable Switch SW13 assassssawarqusacqskasqausa 2 16 Programmable Flag Push Buttons SW14 15 2 18 Reset Push Button 5 2 18 SPORTOA Switches 55 17 and SW20 2 19 KEY PEN CS Switch SWIS tices einen 2 19 2 19 TFS0A HOSTCE Enable Switch SW21 2 19 2 20 HWAIT Enable P I 2 20 PCO PPL Jumper LIE uu usa 2 21 vii ADSP BF527 EZ KIT Lite Evaluation System Manual STAMP Enable Jumper JP3 ss Loopback Jamper ppt 2 22 M
21. 2 13 I 2 ADSP BF527 EZ KIT Lite Evaluation System Manual keypad_busy signal 1 25 LCD module See also touchscreen interface xiv 1 16 1 17 backlight connector P19 2 33 data connector P12 2 32 data enable DEN 1 17 PPI connect jumper JP2 1 17 2 21 touchscreen connector P18 2 33 LEDs diagram of locations 2 23 LED 1 3 PF8 PG11 12 1 25 1 28 2 24 LED4 power 2 24 LEDS reset 2 24 LED6 7 Ethernet 2 24 ZLED3 USB monitor 1 5 license restrictions xii 1 7 lockbox key 1 8 M MAC address 1 20 MAX1233 touchscreen controller See touchscreen media independent interface MII 1 20 Media Instruction Set Computing MISC xi memory map of this EZ KIT Lite 1 8 microphone gain switch SW4 2 12 loopback switch 55 8 1 21 1 22 2 14 select jumper JP6 1 22 2 22 Micro Signal Architecture MSA xi N NAND chip enable NDCE _HOSTD10 1 13 flash memory interface xiii 1 13 INDEX notation conventions xxi O oscillator 1 16 oscilloscope 1 27 OTG interface 1 22 package contents 1 3 parallel flash memory 1 13 parallel peripheral interface PPI See PPI interface pen interrupt PENIRQ signal 1 18 PFO 7 signals 2 3 PF8 signal 2 3 PF9 15 signals 2 3 0 10 signals 2 5 PG11 12 IO signals 2 5 2 24 PG13 15 signals 2 5 PG8 IO signal 2 24 9 signals 2 7 10 signal 2 7 11 15 signals 2 7 PJ0 3 signals 2 9 PLL_CT
22. 62 61 d cr 62 61 64 63 IAMS2 Gomme 64 63 anne 64 63 2 4 Soas 66 65 1 DA EMULATOR eee TMS L TMs _ eee E LEE 66 65 oe 66 65 68 67 ABE0 SDQMO0I IAMS0 1 3 4 cooo TCK gt aed 68 67 85 68 67 DA_EMULATOR_EMU p c 70 69 gt IARDY 5 6 D EMULATOR TMS TRST e gt TP TAWE 70 69 DE 70 69 1 L SENE a ml RB 72 n IPPIGUK 1 Loos EMULATOR Laco 72 71 72 71 TD 7557 kesel 74 73 SPDT 74 zi s e 3 DA_EMULATOR_TRST s 76 75 2 SMS 11 12 EMU IEMU IPPID3 771 DA EMULATOR es i el 78 5 4 76 75 7 78 77 _ 78 v7 78 v7 EMULATOR DA_GP0 ov i 7 HOS TWA EDT 0 EDO T Pass ss R 80 i 80 79 r R SER 10K 82 81 en ee 41 ABEO SDQMO IABE1 SDQM1 RESET RESET 0402 IHOSTACK LED2 artem T seme 82 81 a QE 82 81 Enc DA 2 lt 84 83 6 L SM ISCKE L __ _ SOFT RESET C DA SOFT RESET HWAIT PUSHBUTTON1 OC 4 84 84 B3 a DA GP3 Tool 86 85 10 ISCAS 2 IHOSTADDR PUSHBUTTON2 ka 86 85 K s rs 86 85 2 SSeS CS WE CLKOUT 88 87 SWE 1 5 R168 88 8 4j 4 59 B DEBUG AGENT 0 90 B9 i I t NN NN DSP JTAG HEADER v CONOTS CONOTS SHGN ANALOG 2 9eton Road Nashua NH
23. ON OFF For more information about the NAND04 device refer to the ST Micro electronics Web site at http www st com stonline products families memories mem ory index htm An example program is included in the EZ KIT Lite installation directory to demonstrate how to setup and access the NAND flash interface SPI Interface The ADSP BF527 processor has one serial peripheral interface SPI port with multiple chip select lines The SPI port connects directly to serial flash memory MAX1233 touchscreen and keypad controller audio codec and expansion interface Serial flash memory is a 16 Mb ST Micro M25P16 device which is selected using the SPISEL1 line of the processor SPI flash memory is pre loaded with boot code for the blink and POST programs For more information refer to Power On Self Test on page 1 27 By default the EZ KIT Lite boots from the 16 bit flash parallel memory SPI flash can be selected as the boot source by setting the boot mode select switch 512 to position 3 see Boot Mode Select Switch SW2 on page 2 11 SPI flash code can be modified For instructions refer to the VisualDSP online Help and example program included in the EZ KIT Lite installa tion directory By default the EZ KIT Lite is set to use the SPISEL2 pin as the chip select for the MAX1233 touchscreen and keypad controller see KEY PEN CS Switch SW18 on page 2 19 SPISEL2 is shared with the CDG signal which is connected
24. T12 0402 VDDEXT 1 9 VDDINT29 P4 e TsvppNrso 1 dus A eR Lid ee 2 NDDINT31 X EVDD VREG STAMP LEDO Missi 2 EVDD VREG 3 DIO005 HG DDINTSa um 4 ANAI Oo 20 Cotton Road AVDD_OTP e E 5 J waa sparc ore e Nashua NH 03063 2 8 DEVICES 1 00 u ADSP BF527 PH 1 800 ANALOGD MBGA289 C4 C111 C146 C136 C135 0 01UF 0 1UF 0 1UF 0 1UF 0 1UF 8 i T 0402 0402 0402 0402 0402 Title ADSP 527 EZ KIT Lite IDC8X1_SMT BATTHOLDER DNP DSP POWER N X V Size Board No Rev T Z VPP BOARD 0208 2006 20 Date 4 28 2009 15 57 Sheet 3 of 13 A B C D 4 MB FLASH sx 2M x 16 64MB SDRAM 32M x 16 5 SW7 FLASH Enable gt POS FROM TO DEFAULT ALTERNATE FUNCTION OFF MODE SW7 1 DSP U2 FLASH U5 ON J2 65 Expansion Interface SW7 2 DSP U2 FLASH U5 ON J2 63 Expansion Interface SW7 3 DSP U2 FLASH U5 ON J2 61 E
25. This is a 3 5 landscape display with a resolution of 320 x 240 and a color depth of 24 bits The interface is an RGB 888 serial parallel interface eight bits of red followed by eight bits of green and then eight bits of blue To configure the PPI interface refer to the LCD software example located in the Blackfin Examples ADSP BF527 EZ KIT Lite POST subdirectory of the VisualDSP installation directory The values are obtained from the timing characteristics section of the VL_PS_COG_T350MCQB datasheet The interface is set to control frame sync 1 and 2 PPIFS1 PPIFS2 natively from the ADSP BF527 processor The LCD data enable DEN is controlled by a Xilinx CPLD XC9536XL You do not need to change CPLD code which should work for the VL_PS_COG_T350MCQB dis play The verilog source code for the CPLD can be found in the reference resource zip file in the insta path NBlackfinNVExamplesVADSP BF527 EZ KIT Lite XC9536XL_ConfigFiles directory of VisualDSP The LCD module can be disconnected from PPI by removing the jumper on JP2 Refer to LCD PPI Jumper JP2 on page 2 21 for more information 1 16 ADSP BF527 EZ KIT Lite Evaluation System Manual Using ADSP BF527 EZ KIT Lite Touchscreen and Keypad Interface The MAX1233 touchscreen and keypad controller connects to the SPI interface of the ADSP BF527 processor and uses the SPISEL2 signal The controller provides the X and Y positions as well as a measurement for the pres
26. information 1 22 ADSP BF527 EZ KIT Lite Evaluation System Manual Using ADSP BF527 EZ KIT Lite UARTO and UART1 are connected to the expansion interface UARTO of the processor also is available a STAMP connector P5 See UARTO Connector P5 on page 2 29 Example programs are included in the EZ KIT Lite installation directory to demonstrate UART and RS 232 operations For more information on the UART interface refer to the ADSP BF52x Blackfin Processor Hardware Reference RIC Interface The ADSP BF527 processor has a real time clock RTC and a watchlog timer Typically the interface is used to implement a real time watchlog or life counter of the time elapsed since the last system reset The EZ KIT Lite is equipped with a Sanyo CR2430 lithium coin 3V battery supplying 280 mAh The 3V battery and the 3 3V supply of the board connect to the RTC power pin of the processor When the EZ KIT Lite is powered the RTC circuit uses the board power to supply voltage to the RTC pin When the EZ KIT Lite is not powered the RTC circuit uses the lithium battery to maintain the power to the RTC pin After removing the mylar the battery will last for about 1 year with the EZ KIT Lite unpowered Example programs are included in the EZ KIT Lite installation directory to demonstrate the RTC features The EZ KIT Lite is shipped with a protective Mylar sheet placed between the coin battery and the positive pin of the battery ho
27. v Maxim MAX1233 touchscreen and keypad controller Ethernet interface v SMSC LAN8700 PHY device v 10 BaseT and 100 BaseTX Ethernet controller v Auto MDIX Keypad v components 4 x 4 keypad assembly Thumbwheel v CTS Corp rotary encoder Universal asynchronous receiver transmitter UART v ADM3202 RS 232 line driver receiver v DB9 female connector LEDs v Eight LEDs one power green one board reset red three general purpose amber and one USB monitor amber PHY link amber PHY activity green Push buttons v Three push buttons one reset two programmable flags with debounce logic xiv ADSP BF527 EZ KIT Lite Evaluation System Manual Preface Expansion interface Provides access to all ADSP BF527 processor signals Other features ICE 14 pin header USB OTG connector HOST interface connector Power measurement jumpers PPI IDC connector SPORTO SPORT1 IDC connectors TWI SPI timers and UARTO IDC connectors For information about the hardware components of the EZ KIT Lite refer to ADSP BF527 EZ KIT Lite Hardware Reference on page 2 1 Purpose of This Manual The ADSP BF527 EZ KIT Lite Evaluation System Manual provides instructions for installing the product hardware board The text describes operation and configuration of the board components and pro vides guidelines for running your own code on the ADSP BF527 EZ K
28. 03063 DEVICES 1 0 Title ADSP 527 EZ KIT Lite Size Board No A0208 2006 Rev Date 4 28 2009 15 57 Sheet 11 of 13 B C D 5V 33V Q s PUE 2 33V UNREG IN O TT I IN 1 Sees se HR SPORT 0 L UNE ae ISCL lt 21A1 8 5 SCL SPORT 1 53 EDAD na STAVE SOK 72 ava 5 SPISCK 7777 SPISELT gt aa 1742 SPISELiS 77 4 B 2 llll lt tl Ifl0O I E eden M e S NET 1 J mE J gt ov mS ANF SASE 700777 El IRESET i ___ STAMP aval r SPIMISO E 1 D m LUARTIRTS ______ ISPIMOST 2 3 paa 5 1 H 12 11 10 9 1 Tona 2Y48 u 5 E STAMP 16 15 14 13 i SJ4 m
29. 1 23 2 15 SW11 NAND enable switch 1 19 2 16 SW13 push button enable DIP switch 1 23 1 25 2 16 2 18 SW14 15 PF push buttons 2 18 SW16 reset push button 2 18 SW17 audio and SPORT enable switch 1 21 2 19 SW19 SPI config switch 1 21 2 19 SW1 Ethernet enable switch 1 20 2 10 SW20 audio and SPORT enable switch 1 21 2 19 SW21 TFSOA HOSTCE enable switch 1 21 2 19 SW2 boot mode select switch 1 13 1 15 2 11 SW3 rotary switch 1 19 2 12 SW mic gain switch 1 21 2 12 SW5 keypad LCD enable switch 1 18 1 25 2 13 SW7 flash enable switch 2 14 SW8 mic loopback switch 1 21 1 22 2 14 SW9 Ethernet mode switch 1 20 2 15 switches See also switches by name SWXx diagram of locations 2 10 synchronous dynamic random access memory See SDRAM system architecture of this EZ KIT Lite 2 2 T TFSOA HOSTCE enable switch SW21 1 21 2 19 TFSOA signal 1 21 thumbwheel control xiv timers connector P11 2 31 I 4 ADSP BF527 EZ KIT Lite Evaluation System Manual touchscreen interface 1 18 MAX1233 controller 1 15 TWI connector P10 2 31 two wire interface TWI 1 21 U UARTO interface connector P5 1 24 2 29 UART interface enable switch SW10 1 23 2 15 loopback jumper JP5 1 23 2 21 2 22 UARTI signal 2 22 UART1_TX signal 2 20 2 21 2 22 universal asynchronous receiver transmitter See UART up signal CUD 1 19 USB debug agent connector ZJ1 2
30. 10UF 1 Pon LOUT RDIV 4 f C261 C260 C262 C263 SSK AUDIO 22 C_MODE 0402 7 lt oia lt GE 08 mo ASKO r SDN C23 SDIN ROUT_RDIV 5 Skim soe J wo mvo gt 289 R R44 FER6 AGND 100 600 AGND 0402 0603 AUDIO CLK R45 FER7 R46 100 600 33 0402 0603 32v 8 AUDIO_CLK e AN 4 OUT 3 R52 R38 pne 47 0K 47 0K C264 C265 C266 C267 SPISEL24 C97 0402 0402 100PF 100PF 100PF 100PF EE 0 01UF 0603 0603 0603 T 0603 _______SPISEL5 HOSTDSI ICSB U13 Wi SPORT COPPER C186 C105 OA 10UF 0 1UF ENBL 0805 0402 C268 1000PF SW20 0805 7777117 TFS0A RMIIMDINT HOSTCE I lt T p P DACLRC I EIE SSS sss sns LM DTOPRIA PRIFSS lt 2 MI C MCODEC DACDAT DROPRIAL 9 3 5 IGODEC ADCDAT 77771 SPI TWI TOO0PF C RESON P swig im 7 785035 m tr CO PW 2 W7 SS 1 T LL iss 1 L__SPISCHKI gt l E e ANALOG 20 Goron Poad SS E CER ear 41 urge 92 Nashua NH 03063 Re es SCL gt e H scik asnua 4 COTRA gt MI P DEVICES DIP2 SWTO018 PH 1 800 ANALOGD SWTO20 Title ADSP 527 EZ KIT
31. 10UF 16V 20 5 8 PANASONIC EEE1CA100SR CAP002 66 1 10UH 20 L1 TDK 445 2014 1 ND INDOO1 67 2 0 1 10W 5 R58 R188 VISHAY CRCW08050000Z0EA 0805 68 1 190 100MHZ 5A 17 MURATA DLW5BSN191SQ2 2 69 2 1A ZHCS1000 D7 D9 ZETEX ZHCS1000TA pb free SOT23 312 70 2 10 10 164 165 0805ZC105KAT2A 0805 71 13 10UF 6 3V 10 C7 C22 C33 C43 AVX 08056D106KAT2A 0805 C52 C59 C68 C99 C101 102 C186 C254 255 72 4 4 7UF 6 3V 10 94 143 171 AVX 08056D475KAT2A 0805 C177 ADSP BF527 EZ KIT Lite Evaluation System Manual A 5 Ref Quy Description Reference Designator Manufacturer Part Number 73 74 47 78 0 1UF 10V 10 0402 0 01UF 16V 10 0402 C12 19 C27 30 C38 41 C47 50 C56 57 C64 66 C78 C81 C83 C88 C98 C100 C103 105 111 132 135 136 146 157 158 160 161 191 194 249 C2 C4 6 C8 11 C20 21 C23 26 C31 32 C34 37 42 44 46 51 C53 55 C58 C60 63 C67 C69 77 C79 80 C82 C84 87 C90 91 C93 C97 C116 117 121 127 137 138 155 156 C163 C166 168 C187 188 C247 248 C250 C252 253 AVX AVX 0402ZD104KAT2A 0402YC103KAT2A 75 65 10K 1 16W 5 0402 R2 3 R11 14 R16 22 R24 27 R34 R53 55 R59 R65 R69 70 R73 76 R89 R91 93 R104 107 R118 121 125 126 129 131 140 R144 R157 158 R160 R164 R166 R169 R173 R176 178 R184 R196 R198 R213 R301 302 R305 VISHAY CRCWO040210K0FKED 76
32. 18 17 20 19 77 20 19 22 22 L PPIFS21 24 IDTOPRIA_PPIFSS IEXPANSION_PPICLIK L 26 25 26 25 e LL UARTITX C i E ARTE RESET i _____ SPISEL2 lt J 1 L CZMI E LUARTIRTS PENIRG NDALE HOSTD15j 32 E punc y CUD E __ ERXDi_HOSTDa 34 a ES EE All USB interface circuitry is considered proprietary and has SPIMOSI lt 36 35 36 35 y proprietary incase ea E been omitted from this schematic TTD 40 89 Do 1 PPIFS3 lt 1 38 39 d Lou oe m bo 40 hg 03 42 41 D2 Mes TFSOA_RMIIMDINT _HOSTCE When designing your JTAG interface please refer to the foe 42 41 42 41 D5 44 43 154 p TSCLKOA Engineer to Engineer Note EE 68 which can be found at puni 155 r PPS Y e 4 D7 46 45 106 3 3V http www analog com 755 48 47 n 5871 I PPID7 X 46 5 46 45 pe Em 48 47 48 47 biu 7 50 49 010 1 LXI A m NH zi i 83V im ri CZ 013 52 51 ID12 cani b 2 E rien pisi GUD 1 1 L 015 54 ES p 8 ee ne j su wer dd e 4 R215 3 3V UARTIAX 54 p3 ARTIT 5 53 n E 56 55 LUARIIRX 1 ZZ Ss a 0402 uu CURRERE s P UART P R212 60 59 SCLI 5 ISDA 2 4 7K 60 59 TUTO 60 59 JTAG 0402 62 61 IAMS3 1
33. 2 1 H 16 15 71 4 4 U34 030 18 IKEYIRQ __ STAMP SDA MI P STAMP SCL L L MISO EB STAMP ___1 E 20 19 STAMP CZM 3 RESET 1 _____5 SPISCKI 3 RESET 1 E STAMP STAMP STAMP_HOSTWR LED1 ST MP HE 19 STAMP _SPISEL2 CDG e IUARTIRX 1 ISTAMP_HOSTACK 7 7 12 u L SIAMP CUD W E E 26 STAMP 4 nz L ___STAMP_ LEDO 14 18 28 EF es do es 16 16 1 ISTAMP_SPISEL 0 02 1 LED2 i STAMP HOSTWR LEDI 1 E 30 p9 IDTOPHIA PPIFSS 777 777 18 17 18 17 i a H 32 81 IEPiFS1 1 20 19 e 20 19 m 34 B3 RF 27771 IDC10X2 IDC10X2 m 36 35 H 38 37 7 40 89 DOES TFSOA HOSTCE ENABLE SW21 HOST TES0A HRMIIMDINTE O m e gt FFSOA RMIMDINTEHOSTCER 1 COO STAMP HOSTCEA g m LO ITFSOA_RMIIMDINT 5 _________ 1 DIP2 SWT020 5V 33V SW21 disconnects TFSOA_RMIIMDINT HOSTCE 3 3V 5V DOE ry 0 from SPORT conn P6 11 and HOST conn 13 6 5 5 2 1 11 3 MISTAMP LEDO 1 4 HOSTWRRlEDi 777 P ISTAVP HOSTWR LEDI _______i 1 STAMP_DR0PRIA 5 STAMP HOSTACK LED2I C777 T BIBURCORSPRAE t EII ANB HOSTA
34. CDG 1 19 E EBIU_DDRCTLO 2 registers 1 11 ERXD1_HOSTD8 signal 1 15 ERXDI signal 2 19 Ethernet interface xiv 1 20 connector J9 1 20 2 28 enable switch SW1 1 20 2 10 LEDs LED6 7 2 24 mode switch SW9 1 20 2 15 PHY IC 014 1 13 example programs 1 28 expansion interface 1 13 1 15 1 16 1 19 1 26 2 14 2 15 2 21 2 26 external memory 1 9 1 10 F features of this EZ KIT Lite xiii FET switch U28 1 22 flag pins See programmable flags by name PFx PGs PHx PJx flash memory See also parallel flash memory enable switch SW7 2 14 G general purpose IO pins 1 25 2 10 2 15 2 16 2 18 2 24 H HOSTACK LED2 signal 1 16 HOSTACK signal 1 25 HOSTADDR signal 1 23 1 25 HOSTCE signals 1 21 HOSTD8 signal 2 19 HOSTD9 signal 1 16 host interface connector P13 1 13 2 32 HOSTWR signals 1 25 HWAIT enable jumper JP1 2 20 port 1 23 1 25 I installation of this EZ KIT Lite 1 4 1 5 IO voltage 2 2 J JTAG interface 1 26 connector ZP4 1 26 2 33 CPLD connector P17 2 32 jumpers diagram of locations 2 20 JP1 HWAIT enable 2 20 JP2 LCD PPI connect 1 17 2 21 JP3 STAMP enable 2 21 JP5 UARTI loopback 1 23 2 21 2 22 JP6 mic select 1 22 2 22 P14 VDDINT power 1 27 2 22 P15 VDDEXT power 1 27 2 22 P16 VDDDDR power 1 27 2 23 K key interrupt KEYIRQ signal 1 18 keypad interface connector P2 2 29 LCD enable switch SW5 1 18 1 25
35. For more information see Reset Push Button SW16 on page 2 18 Ethemet LEDs LED6 7 When LED6 is lit solid it indicates that the SMSC LAN8700 chip U14 detects a valid link When transmit or receive activity is sensed LED7 flashes as an activity indicator For more information on the LEDs refer to the LAN8700 chip datasheet provided by the product manufacturer 2 24 ADSP BF527 EZ KIT Lite Evaluation System Manual ADSP BF527 EZ KIT Lite Hardware Reference Connectors This section describes connector functionality and provides information about mating connectors The connector locations are shown in Figure 2 5 UART 0 SPI TWI TIMERS SPORT I Ps 5 P P7 HOST UART 1 2 KEYPAD POWER la z g z s ji s ETHERNET 9 A m S NO 2 eee BATTERY HDPHONE jg LPR LINE OUT USB DEBUG m P19 pis GENT F1 USB LI Li JTAG Ps i P6 MIC 5 5 BACKLIGHT TOUCHSCREEN PPI SPORT 0 mee DASHED LINES INDICATE PART IS LOCATED ON BACK OF BOARD Figure 2 5 Connector Locations ADSP BF527 EZ KIT Lite Evaluation System Manual 2 25 Connectors Expansion Interface Connectors 1 3 Three board to board connector footprints
36. HWAIT Enable J umper J P1 The HWAIT enable jumper JP1 connects processor signal HWAIT_PUSHBUTTON1 PF PGO to SW10 position 1 SW10 position 1 then con nects to the transmit 2 input of the UART1 IC U25 This allows the implementation of flow control functionality CTS through the HWAIT signal of the processor Install JP1 if implementing flow control JP1 is unin stalled by default 2 20 ADSP BF527 EZ KIT Lite Evaluation System Manual ADSP BF527 EZ KIT Lite Hardware Reference LCD PPI J umper J P2 The PPI port connects to the LCD through two buffers U31 32 JP2 enables both buffers when installed and drives PPI signals to LCD connec tor P12 Removing JP2 is useful when using the PPI at the PPI connector P8 or expansion interface JP2 is installed by default STAMP Enable J umper P3 The STAMP connectors have a number of nets connected by enabling quick switches at locations U30 and U34 When installed the STAMP enable jumper JP3 enables the quick switches Table 2 13 lists the sig nals that are connected when JP3 is installed JP3 is uninstalled by default Table 2 13 STAMP Enable Jumper JP3 STAMP Signals Connected through Quick Switches U30 and U34 SCL DROPRIA SDA RFSOA SPISCK CZM SPISEL1 CUD SPISEL2 _CDG LEDO SPIMISO HOSTWR _LED1 SPIMOSI HOSTACK_LED2 RSCLKOA ADSP BF527 EZ KIT Lite Evaluation System Manual 2 21 Jumpers UARTI Loopba
37. IDC socket DIGI KEY 54205 2 32 ADSP BF527 EZ KIT Lite Evaluation System Manual ADSP BF527 EZ KIT Lite Hardware Reference LCD Touchscreen Connector P18 There is no connector for the touchscreen the flex cable is soldered directly to the board LCD Backlight Connector P19 There is no connector for the backlight the flex cable is soldered directly to the board USB Debug Agent Connector J 1 The USB debug agent connector is the connecting point for the JTAG USB debug agent interface The JTAG header ZP4 should not be used whenever ZJ1 and its mating cable are used to communicate to the proces sor via VisualDSP TAG Connector 2 4 The JTAG header is the connecting point for a JTAG in circuit emulator pod When an emulator connects to the JTAG header the USB debug interface is disabled Pin 3 is missing to provide keying Pin 3 in the mating connector should have a plug When using an emulator with the EZ KIT Lite board follow the connec tion instructions provided with the emulator ADSP BF527 EZ KIT Lite Evaluation System Manual 2 33 Connectors 2 34 ADSP BF527 EZ KIT Lite Evaluation System Manual ADSP BF527 EZ KIT LITE BILL OF MATERIALS The bill of materials corresponds to matic on page B 1 ADSP BF527 EZ KIT Lite Sche Ref Qty Description Reference Manufacturer Part Number Designator 1 1 74LVC
38. J3 42 PH3 ND_D3 ETXEN HOST_D3 Default NAND Data 3 U4 PHY transmit enable U14 6 host connector data 3 P13 25 and expansion interface J3 15 PH4 ND_D4 MIITX Default NAND Data 4 U4 CLK RMIIREF_CLK HOST_ PHY RMII ref clock 014 14 via SW1 3 OFF oscillator D4 output U24 host connector data 4 P13 23 and expansion interface J3 16 PH5 ND_D5 ETXDO HOST_D5 Default NAND Data 5 U4 PHY RMII transmit data 0 U14 23 host connector data 5 P13 21 and expansion interface J3 11 ADSP BF527 EZ KIT Lite Evaluation System Manual 2 7 Programmable 5 Table 2 3 PH Port Programmable Flag Connections Contd Processor Pin Other Processor Function EZ KIT Lite Function PH6 ND_D6 ERXDO HOST_D6 Default NAND Data 6 U4 PHY RMII receive data 0 U14 18 PHY mode via SW9 3 host connector data 6 P13 19 and expansion interface 23 33 PH7 PH8 ND D7 ETXD1 HOST D7 SPISEL4 ERXD1 HOST_D 8 TACLK2 Default NAND Data 7 U4 PHY RMII transmit data 1 U14 24 host connector data 7 P13 17 and expansion interface J3 12 Default NAND Data 7 U4 PHY RMII transmit data 1 U14 24 keypad touch screen chip select via SW18 2 host connector data 8 P13 17 and expansion interface J3 12 PHY SPISEL5 ETXD2 HOST_D 9 TACLK3 Default SPI SEL5 audio codec U2 Chip select keypad touchscreen controller via resistors U16 host connector data 9 P13 13 and
39. KEY S9001 ND 2PIN_JUMPER_ SHORT 44 1 5A RESETABLE F2 MOUSER 650 RGEF500 FUS005 45 1 SW2 DIGI KEY 563 1047 ND SWT023 46 1 ROTARY ENCO SW3 CTS 290UABOR201B2 DER SWTO022 47 2 3 5MM 17 8 SWITCH 35RAPC7JS DUAL_STEREO CRAFT CONO050 48 1 IDC 16x2 P13 SAMTEC TSW 116 26 T D IDC16x2 49 1 USB_MINI AB P1 MOLEX 56579 0576 5PIN CON052 50 1 RJ45 8PIN J9 DIGI KEY 380 1022 ND CON RjA5 12 51 3 MOMENTARY SW14 16 PANASONIC EVQ Q2K03W SWT024 52 1 16PIN P12 HIROSE FH12 16S 1SH 55 CON056 53 1 IDC 9X1 P2 SAMTEC SSW 109 01 TM S IDC9X1 54 1 BATT_HOLDER J5 KEYSTONE 105 24MM CON054 ELEC 55 4 YELLOW LED1 3 LED6 PANASONIC LN1461C LED001 56 1 0 01UF 100V C196 AVX 08051C103KAT2A 10 0805 57 1 0 22UF 25V 1090 C112 AVX 08053C224KAT2A 0805 A 4 ADSP BF527 EZ KIT Lite Evaluation System Manual 5 527 EZ KIT Lite Bill Of Materials Ref Qty Description Reference Manufacturer Part Number Designator 58 1 0 1UF 50V 10 C251 AVX 08055C104KAT 0805 59 2 1 10W 590 190 191 VISHAY CRCW0805 10KOJNEA 0805 60 2 100 1 10W 5 R122 R124 VISHAY CRCW0805100RJNEA 0805 61 16 600 100MHZ FER2 16 FER18 DIGI KEY 490 1014 2 ND 200MA 0603 62 3 600 100MHZ 1 19 20 STEWARD HZ1206B601R 10 500MA 1206 63 5 1UF 16V 10 C92 C144 C148 KEMET C0805C105K4RAC TU 0805 C159 C178 64 1 10 1 10W 5 R64 VISHAY CRCW080510ROFKEA 0805 65 2
40. LED5 PANASONIC LNI261CTR 112 2 1000 50 5 179 180 12065A102JAT2A 1206 113 1 255 0K 1 10W R152 VISHAY CRCW06032553FK 1 0603 114 2 80 6K 1 10W 1 99 151 311 80 6KHRCT ND 0603 115 1 600 100 7 FER21 DIGI KEY 240 2390 2 ND 1 5A 0805 116 4 5 D5 D10 12 ON SEMI MBRS540T3G MBRS540T3G SMC 117 3 15 02 4 LIT PGB1010603MR PGB1010603 TLEFUSE 0603 118 1 VARISTOR R37 LIT V5 5MLA0603 V5 5MLA 30A TLEFUSE 0603 119 1 THERM 0 5A R36 LIT 1206L050 C 0 4 1206 TLEFUSE 120 1 20MA D1 PANASONIC MA3X717E MA3X717E DIO005 121 2 2 5UH 3096 L2 L4 COILCRAFT MSS1038 252NLB IND013 ADSP BF527 EZ KIT Lite Evaluation System Manual A 9 Ref Qty Description Reference Manufacturer Part Number Designator 122 2 330 0 1 16W 1 R68 R77 DIGI KEY 541 330LCT ND 0402 123 5 47 0K 1 16W 1 R38 39 R50 52 ROHM MCRO1MZPF4702 0402 124 3 1 0K 1 16W 190 R197 R199 200 PANASONIC ERJ 2RKF1001X 0402 125 2 1000PF 2000V C133 134 AVX 1206GC102KAT1A 1096 1206 126 2 0 027 1 2W 1 R101 R103 SUSUMU RL1632T R027 F N 1206 127 4 5 6K 1 16W R40 43 SUSUMU RR0510P 562 D 0 596 0402 128 1 680 1 16W 196 R47 BC COMPO 2312 275 16801 0402 NENTS 129 1 90 9K 1 16W 590 R90 DIGI KEY 541 90 9KLCT ND 0402 130 1 40 2K 1 16W 596 R57 DIGI KEY 541 40 2KLCT ND 0402 131 4 3 3UF 16V 10 C113 C118 C120 DI
41. N S 1206 USB CLK AB23 2 E AB20 USBVBUS z N 8 82 AA23 USBXO USBID 722 Bi VBUS Ave USBRSET USBDM 21 4 USB_OTG_GM 2 22 AA22 USB_OTG_GP 3 e USBVREF USBDP D ADSP BF527 4 USB MBGA289 ID R28 C92 C91 SSHELL 10K 1UF 0 01UF CON052 0402 0805 0402 0 01UF VARISTOR T 0402 e V5 5MLA PGB1010603 Me PGB1010603 10603 0603 lt gt Cem L ot C ion 0603 0402 U12 N ANALOG 2009 Nashua NH 03063 DEVICES PH 1 800 ANALOGD Title ADSP 527 EZ KIT Lite Size Board No A0208 2006 Rev Date 4 28 2009 15 57 Sheet 5 of 13 A B D B D J7 J8 MIC GAIN 5 4 MIC GAIN ALTERNATE FUNCTION OFF MODE 3 3V MIC IN HP OUT 3 3V POS GAIN R57 SW4 o Oddo g P 1 5 1498 J J 0402 4149B MIC HP LPBK 90 9K bi 3 5 2 1 0dB AUDIO MODE 1 4 L M R109 4 5 O rE 0603 3 0 5 6dB 10K swe 4 ee 3 FER9 84 7 MRHPOUT RON 7777 C109 600 3 6 1 DW 1UF 0603 EM E LINE IN LINE OUT TE em iw 15 on DP SWT018 99 C98 C101 C100 10UF 0 1UF U2 10UF 0 1UF R160 _ 08085 77 0402 0805 0402 10K 220 H17 56 avon 222 0402 SHO
42. Power J J umper P16 The VDDMEM power jumper P16 is used to measure the voltage and current supplied to the memory interface of the processor P16 is ON by default and the power flows through the two pin IDC header To measure power remove the jumper and measure the voltage across the 0 05 ohm resistor Once the voltage is measured the power can be calculated LEDs This section describes the on board LEDs Figure 2 3 shows the LED locations LEDS 3 1 w 1 04 X LEDI 2 4145162 SLEDS 8 0 F LED6 9 w LED7 HELP ENTER LCD mZLED3 Figure 2 4 LED Locations ADSP BF527 EZ KIT Lite Evaluation System Manual 2 23 LEDs User LEDs LED1 3 Three LEDs connect to three general purpose I O pins of the processor see Table 2 14 The LEDs are active high and are lit by writing a 1 to the correct PF signal Table 2 14 User LEDs LED Reference Designator Processor Programmable Flag Pin LEDI PF8 LED2 PG11 LED3 PG12 Power LED LED4 When LED4 is lit green it indicates that power is being properly supplied to the board Reset LED 5 When LED5 is lit it indicates that the master reset of all major ICs is active The reset LED is controlled by the Analog Devices ADM708 supervisory reset circuit You can assert the reset push button SW16 to assert a master reset and to activate LED5
43. SO 8 DE T 0805 DNP R141 0 05 TP16 1206 Z Iv pes LDOMEM PGND SZ P16 C 1 P PGND Fd Wa VDDMEM COPPER a SJ7 3 Mm SHORTING ICDNREG IN TI JUMPER MH1 MH2 MH3 MH4 MH6 MH7 MH14 MH15 Paca ne E pem DEFAULT INSTALLLED a AN AAA N N a BENE Z ee 142 C139 22UF 22UF Unpopulate P16 when measuring VDDMEM L 41210 T 1210 1 M2 M3 MH5 MHO MH11 M2 MH3 RUBBERFOOT RUBBER FOOT RUBBER FOOT C C C C C C C 5 009 5 009 5 009 DNP DNP DNP PGND2 M4 M5 R98 VR2 TP14 5V 24 9K 5 C 0603 N U23 RUBBER FOOT RUBBER FOOT d sh 5 009 5 009 5V Q 1A DNP DNP cs 14 C140 C141 6 2 5UH 470PF 68PF 3 INDO13 0603 0603 FB PGATE 7 Pues GND R99 2 ADPT854AUJZ 8 80 6K T23 6 0603 Ds p GND T6 145 T14 SH4TIDY 100UF 22UF 47UF SO 8 C T 1210 T D DNP 12 TP8 TP7 4 TP9 5 TTTTS ANALOG 2 eds _ e Nashua NH 03063 E E 4 Ed DEVICES 1 00 COPPER PGND2 m Title ADSP 527 EZ KIT Lite PGND2 Size Board No Rev 0208 2006 20 Date 4 28 2009 15 57 Sheet 13 of 13 A B C D INDEX A configuration of this EZ KIT Lite 1 4 ADM3202 U25 line driver receiver 1 23 PE AMS0 3 select lines 1 13 diagram ot locations 2 29 analog audio interface See audio interface J1 3 exp
44. connector P8 and expansion interface The PPI interface can be disconnected from the LCD module by remov ing jumper on JP2 The JP2 jumper enables the U31 and U32 buffer ICs For more information on the LCD module refer to LCD Module Inter face on page 1 17 For information on how to enable the PPI connection to the LCD module see LCD PPI Jumper JP2 on page 2 21 The PPI signals connect to multi function pins the upper eight data bit signals are configured for the rotary SPI UART1 and LEDO interfaces See Touchscreen and Keypad Interface on page 1 18 for more information ADSP BF527 EZ KIT Lite Evaluation System Manual 1 15 LC D Module Interface The PPI interface has a dedicated clock generated from an on board oscil lator default or the expansion interface The source of the PPI clock can be configured by software via the PPI_SEL signal The signal connects to the processor s flag pin P612 by setting 5413 position 4 ON Flag pin PG12 is shared with the HOSTACK_LED2 signal When the clock select line is used HOSTACK and LED2 are not available The PPISEL signal does not need to be driven if the default on board oscillator is used PPISEL 15 driven when the expansion interface is used as the clocking source Refer to GPIO Enable Switch SW13 on page 2 16 for more information LC D Module Interface The EZ KIT Lite features a Varitronix VL 5 T350MCQB TFT LCD module with touchscreen overlay
45. expansion interface J3 13 ND_CE _ERXD2 HOST_D10 Default NAND chip enable via SW11 4 ON Host connector data 10 P13 17 and expansion inter face 03 35 11 ND WE ETXD3 HOST 011 Default NAND write enable U4 Host connector data 11 P13 9 and expansion inter face 03 14 PH12 ND 05 012 Default NAND output enable U4 Host connector data 12 P13 7 expansion interface 3 36 PH13 D BUSY ERXCLK HOST D13 Default NAND busy U4 Host connector data 13 P13 5 expansion interface 03 38 14 D_CLE ERXDV HOST_D14 Default NAND command latch enable U4 Host connector data 14 P13 3 expansion interface 03 37 PH15 D_ALE COL HOST_D15 Default NAND address latch enable U4 Host connector data 15 P13 1 expansion interface 23 32 ADSP BF527 EZ KIT Lite Evaluation System Manual ADSP BF527 EZ KIT Lite Hardware Reference Table 2 4 PJ Port Programmable Flag Connections Processor Pin Other Processor EZ KIT Lite Function Function 20 PPIFS1 TMRO Default PPI frame sync 1 via buffer U32 to LCD conn P12 and CPLD 033 PPI connector P8 31 and expansion interface 22 25 PJ1 PPICLK TMRCLK Default PPI clock via buffer U32 to LCD conn P12 and CPLD U33 Output of switch U20 PPI connector 8 6 and expansion interface 01 71 PJ2 SCL Default not used
46. keypad busy SW13 8 expansion interface J1 84 2 ON Push DSP ON PB2 OFF host connector P13 8 OTG volt button 2 U2 PG13 age select SW13 7 expansion interface J1 85 3 OFF NC 4 OFF DSP PPI CLK OFF LED2 host connector P13 10 expansion 02 PG12 020 interface 01 81 STAMP buffer 034 ON PPI CLK 020 5 OFF Keypad BUSY DSP OFF PB1 UART1 CTS U25 host conn P13 12 U16 U2 0 expansion interface 01 84 ON GPIO keypad busy U16 SW13 1 6 OFF OTG PWR DSP OFF host connector P13 8 expansion interface VR3 U28 U2 PG13 21 85 ON PB2 SW13 11 power 028 The USB VRSEL signal is used to provide 5V to a device connected over the USB OTG interface when running in host mode Signal USB VRSEL is con nected by setting 5813 position 2 OFF and position 6 ON Then the P613 programmable flag pin of the processor can be used to control the 5V reg ulator VR3 Refer to USB OTG Interface on page 1 22 for more information The P60 PF pin of the processor can be used as GPIO or other functions if 5113 position 1 is turned OFF Turning SW13 position 1 OFF and position 5 ON allows the keypad busy signal to connect to the processor from the key pad and touchscreen controller U16 SW13 default settings are ON ON OFF OFF OFF OFF ADSP BF527 EZ KIT Lite Evaluation System Manual 2 17 Push Buttons and Switches Programmable Push Buttons SW14 15 Two momentary push but
47. memory is 0x2000 0000 to 0x203F FFFF Flash memory is pre loaded with boot code for the blink LCD images and power on self test POST programs For more information refer to Power On Self Test on page 1 27 By default the EZ KIT Lite boots from the 16 bit parallel flash memory The processor boots from flash memory if the boot mode select switch SW2 is set to a position of 1 see Boot Mode Select Switch SW2 on page 2 11 Flash memory code can be modified For instructions refer to the online Help and example program included in the EZ KIT Lite installation directory NAND Flash Interface The ADSP BF527 processor is equipped with an internal NAND flash controller which allows the 4 Gbit ST Micro s NAND04 device to be attached gluelessly to the processor NAND flash is attached via the pro cessor s specific NAND flash control and data lines NAND flash shares pins with the Ethernet PHY host connector and expansion interface The NAND chip enable signal NDCE _HOSTD10 can be disconnected from flash by turning OFF SW11 4 switch 11 position 4 This ensures that the NAND will not be driving data when H0STD10 changes state See Rotary NAND Enable Switch SW11 on page 2 16 for more information ADSP BF527 EZ KIT Lite Evaluation System Manual 1 13 SPI Interface The Ethernet PHY U14 must be disabled in order for NAND flash to function properly This is accomplished by setting SW1 to OFF OFF
48. provide signals for most of the processor s peripheral interfaces The connectors are located at the bottom of the board For more information see Expansion Interface on page 1 26 For availability and pricing of the J1 3 connectors contact Samtec Part Description Manufacturer Part Number 90 position 0 05 spacing SMT SAMTEC SFC 145 T2 F D A Mating Connector 90 position 0 05 spacing SAMTEC 145 1 series through hole 90 position 0 05 spacing SAMTEC 145 2 series surface mount 90 position 0 05 spacing SAMTEC TFC 145 series low cost 2 26 ADSP BF527 EZ KIT Lite Evaluation System Manual ADSP BF527 EZ KIT Lite Hardware Reference RS 232 Connector J 4 Part Description Manufacturer Part Number DB9 female vertical mount NORCOMP 191 009 213 L 571 Mating Cable 2m female to female cable DIGI KEY AE1020 ND Battery Holder J 5 Part Description Manufacturer Part Number 24 mm battery holder KEYSTONE 105 Mating Battery shipped with EZ KIT Lite 280 24 mm LI COIN SANYO CR2430 Power Connector J 6 The power connector J6 provides all of the power necessary to operate the EZ KIT Lite board Part Description Manufacturer Part Number 2 5 mm power jack SWITCHCRAFT RAPC712X Mating Power Supply shipped with EZ KIT Lite 7 0VDC 2 14A power supp
49. to the rotary encoder It is important not to use the 1 14 ADSP BF527 EZ KIT Lite Evaluation System Manual Using ADSP BF527 EZ KIT Lite rotary encoder while trying to access the MAX1233 controller Shutting OFF SW11 2 disables the rotary encoder See Rotary Encoder Interface on page 1 19 for more information There are also provisions to use the SPISEL4 signal as the MAX1233 chip select by setting SW18 to OFF ON SPISEL4 signal is shared with the ERXD1_HOSTDS8 signal Using signal SPISEL4 will interfere with the ability to use Ethernet but will allow the use of rotary keypad and touchscreen all at the same time The appropri ate port function needs to be set up to use programmable flag PF PH8 of the processor as SPISEL4 refer to the hardware reference manual for details For more information refer to Touchscreen and Keypad Inter face on page 1 18 By default the audio codec is setup to use the SPISEL5 signal as the SPI chip select when configuring the codec The chip select is shared with the HOSTD9 signal For more information refer to see Audio Interface on page 1 21 PPI Interface The ADSP BF527 processor provides a parallel peripheral interface PPI supporting data widths up to 16 bits The PPI interface provides three multiplexed frame syncs a dedicated clock input and 16 data lines The EZ KIT Lite uses an eight bit data connection to the TFT LCD module The full PPI port is accessible on the PPI
50. turn SW17 5020 all OFF The SW17 or SW20 switches are all 0N by default KEY PEN CS Switch SW18 The KEY PEN CS switch 5118 enables the chip select for the MAX1233 touchscreen controller to be connected to either signal SPISEL2 ON OFF or SPISEL4 OFF ON SPISEL4 is one function on a multiplexed pin of PF PH8 When using the PH8 programmable flag pin as SPISEL4 signals ERXD1 and H0STD8 do not operate as Ethernet and host data pins SPI Switch SW19 The SPI TWI switch 5019 selects the control interface for the audio codec SW19 default is ON OFF ON OFF which selects SPI interface TWI is selected by setting the SW19 switch to OFF ON OFF ON See Mic HP LPBK Audio Mode Switch SW8 on page 2 14 for more information on how to setup the audio mode TFSOA HOSTC E Enable Switch SW21 The TFSOA HOSTCE enable switch 5121 disconnects the P615 programma ble flag signal TFSOA_RMIIMDINT _HOSTCE from the SPORTO position 1 connector P6 pin 11 and the host connector position 2 P13 pin 6 SW21 is OFF OFF by default ADSP BF527 EZ KIT Lite Evaluation System Manual 2 19 Jumpers Jumpers This section describes functionality of the configuration jumpers Figure 2 3 shows the jumper locations HWAIT gps UART JP3 ENABLE LOOPBACK STAMP ENABLE P16 PIS VDDINT 8 P14 VDDMEM VDDEXT JP2 JP6 LCD C PPI MIC SELECT Figure 2 3 Configuration Jumper Locations
51. 009 15 57 Sheet 2 of 13 B C D 1 VDDEXT iE VDDEXT 1 VEMM LL LL LT m S yppexri 8 G9 A23 ur i we Sm LE E 1 L 10 Ac1 10UF 0 0 0 0 0 0 GND3 17 0805 002 77 0402 0402 77 0402 77 0402 77 042 77 0402 0402 9 yppExrs 4 C 0 G12 B6 GND5 e lt 13 GND e WT e QHl4yppEXT8 GND e lt 15 _ enpo 5 6 MESS RUNE Ms is i I GND107 4 m e 2 4 e GND e yppExri4 GNpi3 0 N17 k11 C59 C57 C56 C61 C60 C62 C58 C63 WDDEXTIS 7 7 10UF 0 1UF 0 1UF 0 01UF 0 01UF 0 01UF 0 01UF 77 0 01UF cae 0805 0402 0402 0402 0402 0402 0402 0402 Ce ee m DDEXT17 47 GND NDDMEM1 15 K7 GND18 e NVDDMEM
52. 14A 017 74LVC14AD SOIC14 2 3 IDT74FCT3244 U22 U31 32 IDT IDT74FCT3244APYG APY SSOP20 1 SN74AHC1G00 U6 TI SN74AHCIGOODBVR SOT23 5 4 1 32 768KHZ U1 EPSON 156 32 7680 0 OSC008 ROHS 5 1 25MHZ OSCO003 U3 EPSON SG 8002CA MP 6 4 SN74LVC1G08 U9 11 U29 TI SN741VCIG08DBVR SOT23 5 7 1 FDS9431A 021 FAIRCHILD FDS9431A SOIC8 8 1 MT48LC32M16 U7 MICRON MT48LC32M16A2P 75 A2TG 75 TSOP54 9 1 20MHz 5 003 U19 DIGI KEY SG 8002CA PCC ND 20 000M 10 2 SI4411DY 50 8 U18 U23 VISHAY Si4411DY T1 E3 11 1 HX1188 1 5007 U26 DIGI KEY 553 1340 ND 12 1 24MHZ OSC003 U12 EPSON SG 8002CA MP ADSP BF527 EZ KIT Lite Evaluation System Manual Ref Qty Description Reference Manufacturer Part Number Designator 13 1 LAN8700 U14 SMSC LAN8700 AEZG QFN36 14 1 MAX1233 U16 MAXIM MAX1233 QFN28 15 1 527 25 16 U8 ST MICRO M25P16 VMW6G Ug 16 1 BF527 05 ST MICRO M29W320EB70ZEGE M29W320EB Us 17 1 NANDO04 U4 ST MICRO NANDO04GWS3B2BNGE TSOP48 18 1 527 033 XILINX XC9536XL 5VQG44C XC9536XL 033 19 1 MIC2025 1 U28 DIGI KEY 576 1057 ND SOIC8 20 1 12MHZ OSCO003 U13 EPSON SG 8002CA MP 21 2 74CBTLV3244 U30 U34 IDT IDT74CBTLV3244PGG TSSOP20 22 1 50MHZ OSC003 U24 DIGI KEY SG 8002CA PCB ND 50 000M 23 1 ADM708SARZ U27 ANALOG ADM708SARZ SOIC8 DEVICES 24 2 ADP3336ARMZ VR3 4 ANALOG ADP3336ARMZ REEL7 MSOP8
53. 17 PF10 PPID10 PRFS1 SPISEL7 Default PENIRQ 016 via SW5 1 RTS UARTI U25 via SW10 3 expansion interface J2 31 92 49 SPORTI connector P7 7 and PPI connector P8 18 PF11 PPID11 TFS1 CZM Default CZM rotary SW3 via SW11 3 Expansion interface J2 32 02 50 via quick switch U34 to the following connectors PPI P8 19 SPORT1 PZ LL PF12 PPID12 DTIPRI SPISEL2 Default CDG rotary SW3 via SW11 2 1 CDG SPISEL2 keypad touchscreen controller via SW18 1 expansion interface J2 30 J2 51 via quick switch U30 to the following connectors SPI P9 9 SPORTI P7 14 and P7 19 PPI P8 20 and P8 26 SPORTO P6 19 PF13 PPIDI3 TSCLK1 SPISEL3 Default CUD rotary SW3 via SW11 1 CUD Expansion interface 22 34 02 52 via quick switch U34 to the following connectors SPORTI P7 6 and P7 21 SPORTO P6 21 PPI P8 21 and P8 25 SPI P9 12 2 4 ADSP BF527 EZ KIT Lite Evaluation System Manual ADSP BF527 EZ KIT Lite Hardware Reference Table 2 1 PF Port Programmable Flag Connections Contd Processor Pin Other Processor Function EZ KIT Lite Function PF14 PPID14 DT1SEC UARTITX Default UARTI 025 TX Expansion interface 02 28 02 53 02 55 J3 8 SPORT connector P7 12 and PPI connector P8 22 PRIS PPID15 DRISEC UARTIRX Default UARTI 025 RX via SW10 2 Expansion interface J2 27 J2 54 02 56 J3 7 SPORT 1 connector P7 10 and PPI connector P8 23 Table 2 2 PG Port Programmable Flag Co
54. 2 L9 N Z 17 GND19 9 VDDMEMS3 L10 GND20F e PINTO 1 111 Ld N7 GND21 m 2 5 L12 P7 GND22 V DDMEM6 L13 R7 GND23 e e 14 T7 GND24 C33 C30 C29 C28 C27 C35 C34 C36 C32 C37 C31 VDDMEM8 L15 10UF 0 1UF 0 1UF 0 1UF 0 1UF 0 01UF 0 01UF 0 01UF 0 01UF 0 01UF 0 01UF GND25 0805 0402 0402 0402 0402 0402 0402 0402 0402 0402207 0402 GND 9 1 M10 09 GND27 e M11 NDDMEM12 M12 N A U11 GND29 e DDMEM13 M13 e UI2yDDMEM14 black I n U13 9 15 M15 U14 GND32 o VDDMEM16 015 GND33 VDDINT VDDMEM 17 N10 e e e e e e e e e e L SL ENT GND34 e m VDDMEM18 N11 toe ten 8e S L Blur te B5 N12 10UF 0 22 710 0 10 0 0 0i 510 VDDINT1 GND36 T 0805 71 0402 77 0402 1 0402 77 0402 0400 002 77 002 77 0402 0402 0402 e apone e int 4 5 e e e e e e e e e e 4 boon GNpa9 9 ep ints N P AyppiNre GND4 P oS nT 42 11
55. 20 Date 4 28 2009 15 57 Sheet 10 of 13 3 3V QN 3 3V US R198 10K 0402 EXPANSION INTERFACE TYPE B U20 5V r 3 O 3 3V 5V 3 3V ___ 1 _ EXPANSION gt v v 0402 et a IPPICLK 71 B 6 OMHZ PB r r 4 1 PPI 4 4 e SOT23 6 3 3V 3 3V CN Na J2 J3 4 2 1 i 2 1 4 8 4 B 0 01UF 0 5 __ 1 0402 T 0402 l d pa 1 SPINS deer deser Hun 14 13 14 13 N Z N Z 16 15 16 15 U19 U20 18 17
56. 3 3V aiii PG12 DMAR1 UART1TXA HOST_ACK R196 E 10K MBGA289 PG13 DMARO UART1RXA HOST ADDR TACI2 0402 PG14 TSCLK0A1 MDC HOST_RD sw PG15 TFS0A MIIPHYINT RMIIMDINT HOST_CE 22 1 6543 S ex BMODE1 F 2 T 8 10 L gt 4 TRST 1 4 8 D I L2 BMODE2 A TMS gt Tus 3 2 8 J2 BMODE3 R192 EMU 0 Li ROTARY 0402 L gt Kt L TDO lt DO R14 R11 R12 R13 J 10K 10K 10K 10K L 2 Tol 0402 0402 0402 0402 MBGA289 SW2 Boot Mode Select Switch U DSP RTQ 1 i 5SP RDO 1 POSITION BOOT MODE Cc m R15 m 0 Reserved 0605 Default 1 Boot from 8 or 16 bit external flash memory ecc e AAA A o 2 Boot from 16 bit asynchronous FIFO 3 Boot from serial SPI memory Ut 4 Boot from SPI host device TERMI TERM2 e 5 Boot from serial TWI memory R1 2 3 C95 33 NC1 NC2 L 6 Boot from TWI host 0402 220PF mms 0402 3 AK A A MIDSPCUKN 71 32768 2 cf DNP 7 Boot from UARTO host ANAI OG 20 Cotton Road EP nes 8 Boot from UART1Host ata 0805 0805 Nashua NH 03063 05 003 9 Reserved DE V IC ES PH 1 800 ANALOGD 4 C2 A Boot from SDRAM 0 01UF EE B Reserved Title ADSP 527 EZ KIT Lite eserve D Reserved DSP EBIU Boot from 16 Bit Host Size Board No Rev RTC F Boot from 8 Bit Host DMA C A0208 2006 2 0 Date 4 28 2
57. 33 interface USB OTG P1 1 5 2 33 OTG interface connector P1 1 23 2 28 voltage regulators 1 22 USB_VRSEL signal 1 23 1 25 INDEX V VDDDDR pin 1 27 power jumper P16 1 27 2 23 VDDEXT pin 1 27 power jumper P15 1 27 2 22 VDDINT pin 1 27 power jumper P14 1 27 2 22 very long instruction word VLIW xi VisualDSP environment 1 5 voltage planes 1 24 1 26 2 17 VPP board connector P4 2 29 VR3 USB voltage regulator 1 22 watchdog timer 1 24 ADSP BF527 EZ KIT Lite Evaluation System Manual 1 5
58. 5 6 SW13 4 DSP U2 PG12 PPI CLK U20 OFF OFF LED2 Host connector P13 10 Expansion Interface J1 81 STAMP buffer U34 ON PPI CLK U20 7 8 SW13 5 Keypad BUSY 016 DSP U2 PGO OFF OFF PB1 UART 1 CTS U25 Host conn P13 12 Expansion Interface J1 84 ON GPIO Keypad busy U16 SW13 1 e 9 10 11 12 SW13 6 OTG PWR VR3 U28 DSP U2 PG13 OFF OFF HOST connector P13 8 Expansion Interface J1 85 ON PB2 SW13 11 OTG power VR3 U28 13 14 15 16 17 18 P 19 20 3 3V 21 22 4 23 24 4 25 26 4 27 28 29 80 3 LED5 RESET RED b2 s LEDOO IDCT6X2 3 3V O R130 R131 R193 10K 10K 22 0402 R123 0402 0402 330 lt 0603 R194 22 R129 U27 0402 10K R195 RESET 0402 1 8 C197 22 R118 R125 R126 R119 5 15PF 0402 10K 10K 10K 10K 4 7 r 0402 0402 0402 0402 0402 PFI RESET L gt IRESET__ TN DA SOFT RESET 5 3 PFO me U17 U17 U17 UZ essnee nm eas 1 029 0402 9 8 3 4 5 6 11 10 EX ADM708SARZ_ C199 N 2 MEE SOIC8 NT 4 7 7 15PF 74 VC14A 74 VC14A 74 VC14A 74 VC14A sWe SN74LVC1G08 0402 SOIC14 SOIC14 SOIC14 SOIC14 MOMENTARY SOT23 5 SWT024 N 3 3V O 3 3V 3 3V ANALOG Coton Road Nashua NH 03063 0 01UF C168 C166 DE ICES 24 4 Bae See DINE V PH 1 800 ANALOGD T 0402 T 0402 Title ADSP 527 EZ KIT Lite N Z LEDS PUSHBUTTONS RESET HOST PORT U17 z U29 U27 Board No A0208 2006
59. 527 Blackfin embedded processors Product Information Product information can be obtained from the Analog Devices Web site VisualDSP online Help system and a technical library CD Analog Devices Web Site The Analog Devices Web site www analog com provides information about a broad range of products analog integrated circuits amplifiers converters and digital signal processors To access a complete technical library for each processor family go to http www analog com processors technical_library The manuals selection opens a list of current manuals related to the product as well as a link to the previous revisions of the manuals When locating your manual title note a possible errata check mark next to the title that leads to the current correction report against the manual Also note MyAnalog com is a free feature of the Analog Devices Web site that allows customization of a Web page to display only the latest infor mation about products you are interested in You can choose to receive weekly e mail notifications containing updates to the Web pages that meet your interests including documentation errata against all manuals MyAnalog com provides access to books application notes data sheets code examples and more Visit MyAnalog com to sign up If you are a registered user just log on Your user name is your e mail address xviii ADSP BF527 EZ KIT Lite Evaluation System Manual Preface VisualIDSP Online
60. ADSP BF527 EZ KIT Lite Evaluation System Manual Revision 1 4 August 2009 Part Number 82 000208 01 Analog Devices Inc ANALOG One Technology Way Norwood Mass 02062 9106 DEVICES Copynght Information 2009 Analog Devices Inc ALL RIGHTS RESERVED This docu ment may not be reproduced in any form without prior express written consent from Analog Devices Inc Printed in the USA Disclaimer Analog Devices Inc reserves the right to change this product without prior notice Information furnished by Analog Devices is believed to be accurate and reliable However no responsibility is assumed by Analog Devices for its use nor for any infringement of patents or other rights of third parties which may result from its use No license is granted by impli cation or otherwise under the patent rights of Analog Devices Inc Trademark and Service Mark Notice The Analog Devices logo VisualDSP Blackfin SHARC Tiger SHARC EZ KIT Lite and EZ Extender are registered trademarks of Analog Devices Inc EZ Board is a trademark of Analog Devices Inc other brand and product names are trademarks or service marks of their respective owners Regulatory Compliance The ADSP BF527 EZ KIT Lite is designed to be used solely in a labora tory environment The board is not intended for use as a consumer end product or as a portion of a consumer end product The board is an open system design which does not include a shielde
61. B VRSEL by setting 5113 position 2 OFF and position 6 ON USB VRSEL allows the USB OTG to power an external USB device with 5V See USB OTG Interface on page 1 22 and GPIO Enable Switch SW13 on page 2 16 for more information An example program is included in the EZ KIT Lite installation directory to demonstrate functionality of the LEDs and push buttons 1 24 ADSP BF527 EZ KIT Lite Evaluation System Manual Using ADSP BF527 EZ KIT Lite J TAG Interface The JTAG emulation port allows an emulator to access the processor s internal and external memory through a six pin interface The JTAG emu lator port of the processor can be accessed via the on board USB debug agent or with an external emulator via the JTAG connector 2 4 When an external emulator connects to the board the on board USB debug agent is disabled See JTAG Connector ZP4 on page 2 33 for more information For more information about emulators contact Analog Devices or go to http www analog com processors blackfin evaluationDevelop ment crosscore Expansion Interface The expansion interface consists of three 90 pin connectors 01 3 These connectors contain a majority of the ADSP BF527 processor s signals For the pinout of the connectors go to ADSP BF527 EZ KIT Lite Sche matic on page B 1 The expansion interface allows an EZ Extender or a custom design daughter board to be tested across various hardware plat forms The mechanica
62. CK LEDA ERN ANALOG 20 Road L STAMP_RFSOAI 3 L STAMP RFSOAUME n P e Nashua NH 03063 7 STAMP 9 4 Dese DEVICES 1 800 anatoap IDC5X2 x Z Title ADSP 527 EZ KIT Lite Size Board No A 0 2 0 8 2 0 0 6 Date 4 28 2009 15 57 Sheet 12 of 13 A B C D C D USB i D12 p D F2 FER17 MBRS540T3G ZHCS1000 5A 190 5A SOT23 312 FUS005 002 SMC DNP 5V USB e e SCOR 4 M UNREG IN _ U UNREG IN 7 0 2 UM o 4 m MEER 0402 0805 _ USB_VRSEL gt AA ley USE 1 C147 DP LL ZHCS1000 mi C180 D11 IE SOT23 312 1000PF 1210 3 3V VR3 U28 2 1206 MBRSS40T3G 7 4 4 8 ais gt IN1 OUT1 IN1 OUT1 e 2 5V 23 R110 8 2 OUT2 our 9 OV GON005 w oura EN
63. Codec via SW19 4 expansion interface 02 57 the fol lowing connectors via quick switch U30 TWI P10 5 PPI P8 38 SPORTO P6 26 and 5 P7 26 PJ3 SDA Default not used Codec via SW19 4 expansion interface 02 58 the fol lowing connectors via quick switch U30 TWI P10 6 PPI P8 36 SPORTO P6 24 and SPORTI P7 24 ADSP BF527 EZ KIT Lite Evaluation System Manual 2 9 Push Buttons and Switches Push Buttons and Switches This section describes operation of the push buttons and switches The push button and switch locations are shown in Figure 2 2 SW16 4 RESET SW2 SWI swig ma kun L sw13 SW fa UB TRO SW3 SW10 ENCODER 1 89 21 sw Tm 8 sws m B sw 1 r sw20 amp SWI swi7L e l swo amp swe m m SW4 DASHED LINES INDICATE PART IS LOCATED ON BACK OF BOARD Figure 2 2 Push Button and Switch Locations ETH Enable Switch SW1 The Ethernet enable switch 581 allows the Ethernet to operate Ethernet and NAND flash share the same lines and cannot operate at the same time The SW1 default settings are OFF OFF ON OFF see Table 2 5 Ether net is enabled by setting the switch to ON ON OFF ON SW1 positions 1 and 2 connect the management bus 010 and MDC SW1 position 3 enables the 50 MHz
64. DEVICES 25 1 ADG752BRTZ U20 ANALOG ADG752BRTZ REEL SOT23 6 DEVICES 26 1 ADM3202ARNZ 025 ANALOG ADM3202ARNZ SOICIG DEVICES 27 1 ADSPBF527KBC U2 ANALOG ADSPBF527KBCZENGCI ZENGCI DEVICES MBGA28 A 2 ADSP BF527 EZ KIT Lite Evaluation System Manual ADSP BF527 EZ KIT Lite Bill Of Materials Ref Qty Description Reference Manufacturer Part Number Designator 28 2 ADP1864AUJZ VRI 2 ANALOG ADP1864AUJZ R7 SOT23 6 DEVICES 29 1 ADP1611 VR5 ANALOG ADP1611ARMZ R7 MSOP8 DEVICES 30 1 PWR J6 SWITCH RAPC712X 2 5MM_JACK CRAFT CON005 31 13 05 45X2 J1 3 SAMTEC SFC 145 T2 F D A CON019 32 1 DIP6 SWT017 SW13 CTS 218 6LPST 35 10 DIP4 SWT018 SW1 SW4 5 SW7 ITT TDA04HOSB1 11 SW19 20 34 1 DB9 9PIN 74 191 009 213 1 571 CON038 35 3 DIP2 SWT020 SW17 18 SW21 C amp K CKN9064 ND 36 3 IDC 2X1 P14 16 FCI 90726 402HLF IDC2X1 37 4 IDC 2X1 JP1 3 P5 FCI 90726 402HLF IDC2X1 38 1 IDC 3X1 90726 403HLF IDC3X1 39 2 IDC 5X2 P5 P11 FCI 68737 410HLF IDC5X2 40 2 IDC 10X2 P9 10 BURG FCI 54102 T08 10LF IDC10X2 41 2 IDC 17X2 P6 7 BURG FCI 54102 T08 17LF IDC17X2 42 1 IDC 20X2 P8 BURG FCI 54102 T08 20LF IDC20X2 ADSP BF527 EZ KIT Lite Evaluation System Manual A 3 Ref Qty Description Reference Manufacturer Part Number Designator 43 6 IDC SJ1 2 SJ7 10 DIGI
65. Documentation Online documentation comprises the VisualDSP Help system software tools manuals hardware tools manuals processor manuals Dinkum Abridged library and FLEXnet License Tools software documenta tion You can search easily across the entire VisualDSP documentation set for any topic of interest For easy printing supplementary Portable Documentation Format pdf files for all manuals are provided on the VisualDSP installation CD Each documentation file type is described as follows File Description chm Help system files and manuals in Microsoft help format htmor Dinkum Abridged library and FLEXnet License Tools software documenta html tion Viewing and printing the htm files requires a browser such as Internet Explorer 6 0 or higher pdf VisualDSP and processor manuals in PDF format Viewing and printing the pdf files requires a PDF reader such as Adobe Acrobat Reader 4 0 or higher Technical Library CD The technical library CD contains seminar materials product highlights a selection guide and documentation files of processor manuals Visu alDSP software manuals and hardware tools manuals for the following processor families Blackfin SHARC TigerSHARC ADSP 218x and ADSP 219x To order the technical library CD go to http www analog com proces sors technical library navigate to the manuals page for your processor click the request CD check
66. E 19 SHORTING 18 17 16 15 JP3 E2 JUMPER m e 1 DEFAULT NOT INSTALLLED E 2 2 E 18 STAMP SPISELI 1 2 TSSOP20 d a 22 p1 8 20 19 m 1STAMP _SPISEL2 CDG U 1 24 23 22 21 ee Populating JP3 enables signals from U33 m E ISTAMP CUD L STAMP ENABLE i 26 25 24 23 034 to connectors on this page 28 27 E 26 p5 N U34 E 30 ES EH 28 er MoISTAMPLEDO bn 2 d E 32 bi 30 bg ee eat ind i STAMP RSCLKOA gt RSCLKOA m m B 15 HOSTWR _LED1 S ss sss 4 16 s e STAMP_DROPRIA 1A2 1Y2 gt IDROPRIA 1 34 B3 32 B1 Re cava N 1 m L STAMP_HOSTACK_LED2 6 _ er TDCT7X2 34 NR CA EQ L STAMP RFSOAIMI A3 1Y37 P gt 1557 8 020246 wo 4 IDC17X2 L 2 L 0 1M 1Y42 m E ISTAMP CZM 1 Mara 11 9 IT L CUD 2 2 1 21 ___ gt HOSTWA 5 as MIISTAVP HOSTWR IEDI U v IHOSTACK ED2 5 1 baa 2v4 STAMP HOSTACK I JNRBEG IN TI 1 A a t 6 19 P P 2 3 3V 3 3V TSSOP20 8 2 1 e 4 5 17 UNREG IN 6 5 3 3V s M I UNREG IN C194 C193 O4UF 0 1UF 7 3V V 0402 T 0402 eR i TWI a m is IPPID1 1 12 u PPS 3 P10 P9 14 13 IPP 105 7 1 2 1
67. EFF FFFF Reserved 1 10 ADSP BF527 EZ KIT Lite Evaluation System Manual Using ADSP BF527 EZ KIT Lite SDRAM Interface The ADSP BF527 processor connects to a 64 MB Micron MT48LC32M16A2TG 75 chip through the external bus interface unit EBIU The SDRAM chip can operate at a maximum clock frequency of 133 MHz With a VisualDSP session running and connected to the EZ KIT Lite board via the USB debug agent the SDRAM registers are configured automatically with values listed in Table 1 3 each time the processor is reset The values are used whenever SDRAM is accessed through the debugger for example when viewing memory windows or loading a program To disable the automatic setting of the SDRAM registers select Target Options from the Settings menu in VisualDSP and uncheck Use XML reset values For more information on changing the reset values refer to the online Help Table 1 3 SDRAM Default Settings with a 133 MHz SCLK Register Value Function pEBIU SDRRC 0x0407 Calculated with SCLK 133 MHz fSCLK 133 MHz tREF 64 ms NRA 8192 row addresses tRAS 6 clock cycles tRP 2 clock cycles RDIV 0x407 pEBIU_SDBCTL 0x0025 EBCAW 10 bits BSZ 64M byte BE enabled m m ADSP BF527 EZ KIT Lite Evaluation System Manual 1 11 SDRAM Interface Table 1 3 SDRAM Default Settings with a 133 MHz SCLK Contd Register Valu
68. F Mode Default 1 ON Encoder DSP Expansion interface J2 34 J2 52 STAMP SW3 U2 PF13 buffer U34 2 ON Encoder DSP CS audio codec U2 CS keypad touch controller SW3 U2 PF12 U16 expansion interface J2 30 J2 51 STAMP buffer U30 3 ON Encoder DSP Expansion interface J2 32 J2 50 STAMP SW3 U2 PF11 buffer U34 4 ON DSP NAND Host connector P13 11 expansion interface U2 PH10 U4 03 35 Enable Switch SW13 The general purpose input output GPIO switch 5013 disconnects the associated push buttons and LED circuits from the GPIO pins of the pro cessor and allows the signals to be used for other functions Depending on the switch configuration the signals can be used as PPI clock select keypad_busy or OTG host mode 5 select see Table 2 12 To select an on board or external PPI clock through software set SW13 position 4 ON Drive the PG12 programmable flag to low 0 to connect an external expansion interface clock Drive 612 high to select the on board PPI oscillator By default SW13 position 4 is OFF and the PPI clock source is on board 2 16 ADSP BF527 EZ KIT Lite Evaluation System Manual ADSP BF527 EZ KIT Lite Hardware Reference Table 2 12 GPIO Enable Switch SW13 85 13 Position From To Function Default 1 ON Push DSP ON PB1 OFF UART1 CTS 1 25 host connector button 1 U2 PGO P13 12
69. GI KEY 490 3337 2 ND 0805 C129 132 1 0 1 16W 596 RN5 PANASONIC 2 000 RNS003 133 4 22UF 10V 10 C139 C142 C145 DIGI KEY 490 1876 2 ND 1210 C185 134 1 95K 1 10W 1 R136 DIGI KEY 311 95 3KHRTR ND 0603 135 5 15PF 50V 5 C119 C130 C197 DIGI KEY 399 1014 2 ND 0402 199 136 1 8 2UH 20 L3 COILCRAFT LPS3010 822ML IND014 A 10 ADSP BF527 EZ KIT Lite Evaluation System Manual ADSP BF527 EZ KIT Lite Bill Of Materials Ref Qty Description Reference Manufacturer Part Number Designator 137 1 422K 1 10W 1 R100 PANASONIC ERJ 3EKF4223V 0603 138 1 2A DFLS240 D13 DIODES DFLS240 POWER DI12 INC 139 1 40 2 1 8W 190 R189 ROHM MCRIOEZPF40R2 0805 140 1 MMSZ12T1G D6 ON SEMI MMSZ12T1G SOD 123 ADSP BF527 EZ KIT Lite Evaluation System Manual 11 ADSP BF527 EZ KIT Lite Evaluation System Manual ADSP BF527 EZ KIT LITE SCHEMATIC ANALOG 20 Cotton Road Nashua NH 03063 DEVICES PH 1 800 ANALOGD Title ADSP 527 EZ KIT Lite TITLE Size Board No 0208 2006 20 Date 4 28 2009 15 57 Sheet 1 of 13
70. IC Select Jumper 2 22 yVDDINT Power Jumper uu k 2 22 VDDEZXI Power Je 2 22 Power Jumper PIG 2 23 EEDE cies 2 23 LEDs 2 24 Power LEDU EEDI a 2 24 Rene LED LEDS u UL u u u us 2 24 Fibernet LEL 2 24 ur vr A 2 25 Expansion Interface Connectors J 1 3 auc pror te 2 26 IA TP ances 2 27 Battery Holder JS LLL 2 27 Power 16 Dad pde idem 2 27 Dual Audio Connectors 178 iced RI EM dr ida 2 28 Ethernet Connector JI uuu uuu k usus dini Horn dans 2 28 USB OTG Connector P ace u u u RS 2 28 Keypad Connector ws 2 29 VPP Board Connector PI 2 29 Connector P5 PURI IH Rx 2 29 SPORTO Connector PO 2 30 SPORTI Connector cnan 2 30 vili ADSP BF527 EZ KIT Lite Evaluation System Manual Se 2 30 SPL Connector PI ann 2 31 Two Wire Interface Connector P10 2 31 TIMERS Connector PIII uu u uyu u iat 2 31 LCD Data Connector 2 32 Host Interface Con
71. IT Lite Finally a schematic and a bill of materials are provided as a reference guide for future designs The product software installation is detailed in the VisualDSP Installa tion Quick Reference Card ADSP BF527 EZ KIT Lite Evaluation System Manual xv Intended Audience Intended Audience The primary audience for this manual is a programmer who is familiar with Analog Devices processors This manual assumes that the audience has a working knowledge of the appropriate processor architecture and instruction set Programmers who are unfamiliar with Analog Devices processors can use this manual but should supplement it with other texts such as the ADSP BF52x Blackfin Processor Hardware Reference and Blackfin Processor Instruction Set Reference that describe your target architecture Programmers who are unfamiliar with VisualDSP should refer to the VisualDSP online Help and user s or getting started guides For the locations of these documents see Related Documents Manual Contents The manual consists of Chapter 1 Using ADSP BF527 EZ KIT Lite on page 1 1 Describes EZ KIT Lite operation from a programmer s perspective and provides an easy to access memory map Chapter 2 ADSP BF527 EZ KIT Lite Hardware Reference on page 2 1 Provides information on the EZ KIT Lite hardware components Appendix A ADSP BF527 EZ KIT Lite Bill Of Materials on page A 1 Provides a list of compone
72. L register 1 12 PLL DIV register 1 12 POST power on self test program 1 13 1 15 1 23 1 27 2 22 power connector J6 2 27 LED LED4 2 24 measurements 1 27 supply 1 3 PPIFS1 2 frame sync signals 1 17 PPI interface config for LCD module 1 17 connections 1 16 connector P8 2 30 PPI SEL signal 1 16 1 25 ADSP BF527 EZ KIT Lite Evaluation System Manual I 3 INDEX push buttons SW14 15 2 18 R real time clock RTC interface 1 24 2 3 Reduced Instruction Set Computing RISC xi reduced media independent interface 1 20 reset LED LEDS 2 24 push button 55 16 2 18 restrictions of evaluation license 1 7 RMIIMDINT signals 1 21 rotary encoder interface 1 19 enable switch SW11 1 19 2 16 switch SW3 1 19 2 12 RS 232 connector J4 2 27 RTS signal 1 23 S schematic of ADSP BF527 EZ KIT Lite B 1 SDRAM interface 1 10 1 11 serial peripheral interconnect SPI ports See SPI SPI interface codec control 1 21 config switch SW19 1 21 2 19 connections 1 18 connector P9 2 31 SPISELI signal 1 15 SPISEL2 signal 1 15 1 18 1 19 2 19 SPISEL signal 1 15 2 19 SPISELS signal 1 16 SPORTOA enable switch SW17 1 21 2 19 enable switch SW20 1 21 2 19 SPORTO connector 2 30 SPORT connector P7 2 30 SRAM memory 1 8 STAMP connectors enable jumper JP3 2 21 UARTO P5 1 24 2 29 startup of this EZ KIT Lite 1 5 SW10 enable switch
73. Lite SW20 and SW17 disconnect DSP from AUDIO CODEC AUDIO CODEC MODE INTERFACE SPI MODE ON OFF ON OFF INTERNAL AUDIO CODEC TWI MODE OFF ON OFF ON Size Board No A0208 5006 Rev Date 4 28 2009 15 57 Sheet 6 of 13 A B C D B C D 3 3V CY e e id C FER14 C FER13 C 600 C 600 C 0603 C 0603 s R91 10K R86
74. OxFF61 0000 OxFF61 4000 OxFF70 0000 1000 T m OxFF80 0000 DATA BANKA SRAM 16K BYTE OxFF80 4000 L1 DATA BANKA SRAM CACHE 16K BYTE OxFF80 8000 Reserved OxFF90 0000 L1 DATA BANKB SRAM 16K BYTE OxFF90 4000 L1 DATA BANKB SRAM CACHE 16K BYTE OxFF90 8000 Reserved OxFFAO 0000 L1 INSTRUCTION BANKA LOWER SRAM 16K BYTE OxFFAO 4000 L1 INSTRUCTION BANKA UPPER SRAM 16K BYTE ADSP BF527 EZ KIT Lite Evaluation System Manual 1 9 Table 1 1 EZ KIT Lite Internal Memory Contd Start Address Content OxFFAO 8000 L1 INSTRUCTION BANKB LOWER SRAM 16 BYTE OxFFAO C000 Reserved OxFFA1 0000 L1 INSTRUCTION SRAM CACHE 16K BYTE 4000 OxFFA1 8000 Reserved 000 OxFFA2 0000 OxFFA2 4000 OxFFBO 0000 11 SCRATCHPAD SRAM 4K BYTE OxFFBO 1000 Reserved OxFFCO 0000 SYSTEM MMR REGISTERS OxFFEO 0000 CORE MMR REGISTERS Table 1 2 EZ KIT Lite External Memory Map Start Address End Address Content 0 0000 0000 0 03 FFFF SDRAM bank 0 SDRAM 0 2000 0000 Ox200F FFFF ASYNC memory bank 0 flash 0x2010 0000 Ox201F FFFF ASYNC memory bank 1 flash 0 2020 0000 0 202 FFFF ASYNC memory bank 2 flash 0x2030 0000 0x203F FFFF ASYNC memory bank 3 flash 0x2040 0000 OxE
75. Part Number Designator 92 3 220UF 6 3V 20 CT1 CT7 CT11 SANYO 10TPE220ML D2E 93 1 10M 1 10W 5 R15 VISHAY CRCWO060310M0FNEA 0603 94 5 330 1 10W 596 R111 113 R115 VISHAY CRCW0603330RJNEA 0603 R123 95 1 1M 1 10W 5 R33 VISHAY CRCWO6031M00FNEA 0603 96 6 0 1 10W 596 R102 R109 R133 PHYCOMP 232270296001L 0603 R168 R308 309 97 10 49 9 1 16W 196 R60 63 R78 80 R83 VISHAY CRCWO60349R9FNEA 0603 85 98 2 10 1 10W 596 R127 128 VISHAY CRCWO60310R0JNEA 0603 99 1 47 5K 1 10W 1 R298 VISHAY CRCW060347K5FKEA 0603 100 8 100 50 5 260 267 06035 101 2 0603 101 1 12 4K 1 10W 1 R67 DIGI KEY 311 12 4KHRTR ND 0603 102 1 1000PF 50V 5 C245 PANASONIC ECJ 1VC1H102J 0603 103 2 75 0 1 10W 1 R81 82 DALE CRCW060375ROFKEA 0603 104 2 100 1 16W 5 R44 45 DIGI KEY 311 100JRTR ND 0402 105 2 24 9K 1 10W 1 R98 R150 DIGI KEY 311 24 9KHTR ND 0603 106 4 10UF 10V 10 C89 C128 C170 PANASONIC ECJ 2FB1A106K 0805 C175 A 8 ADSP BF527 EZ KIT Lite Evaluation System Manual ADSP BF527 EZ KIT Lite Bill Of Materials Ref Qty Description Reference Manufacturer Part Number Designator 107 1 105 0K 1 16W R137 PANASONIC ERJ 3EKF1053V 196 0603 108 4 0 05 1 2W 196 R134 R141 143 SEI CSF 1 2 0 05 1 R 1206 109 2 10UF 16V 1096 C147 C184 AVX 1210YD106KAT2A 1210 110 2 GREEN LED001 LED4 LED7 PANASONIC LN1361CTR 111 1 RED LED001
76. RTING DNP cenn Keni H22 i i DEFAULT 283 i SW8 allows the MICIN signal to be looped back FER3 N Z lt for test purposes to the Left and Right headphone 600 5 FER10 i na 0603 MICIN RDIV J23 600 DO NOT switch positions 1 amp 2 ON the same time X 0603 YN e AGND MICBIAS Z H23 MICBIAS TEES HPVDD e s Ensure that JP6 is on 2 amp 3 or OFF when using SW8 n 680 HPGND 917 C102 C103 FER4 1 0402 10UF 0 1UF AUDIO CODEC INTERFACE MODE 600 0805 0402 0603 SW8 3 ON and SW8 4 OFF SPI MODE 3 202 LLINEIN_RDIV E23 SW8 3 OFF and SW8 4 ON TWI MODE IDC3X1 C108 LLINEIN 220PF RLINEIN F23 oy 222222222422 MIC SELECT pas iMICIN I 4 S Conve R308 FERS ib 0603 0603 M 1 N Z LHPOUT 820 puc S HPDUT aad 5 MICBIAS B21 RHPOUT FER2 R43 C96 RHPOUT Sane 2 6603 0405 0603 17 D2E 2 48 4 PEINEIN CODEC_DACLRCI DACLRC CTs ESI Z m See ee Ps 11 777 CODEC_DACDAT Eg A DACDAT 10UF R309 FER11 FER8 R42 C104 16 2 0 600 Ec DS 600 5 6K IUF LL CODEC ADCDAT Lour F22 LOUT 0603 0603 IBRESUT HOW T S IRIGHT LPBK 1 0603 0402 0608 rt A15 HPOUT HDIV gt 5 RLINEIN PIS LL otn CODEC ADCLRC urlea ROUT cvs AN 6 E 49
77. SDGMO 77771 L 2 9 81 pF11 PPID11 TFS1 CZM PHi ND WE ETXD3 HOST 011 25 INDWRE HOSTDII 7 is SPISEL2 CDG lt gt B PF12 PPIDI12 DT1PRI SPISEL24 CDG PH12 ND_RE ERXD3 HOST D12 YZ INDRE amp HOSTDi2 0 1 SCKE P scke amsa 4815 gt Cup CoPI pr13 PPID13 TSCLK1 SPISEL3 CUD PH13 ND_BUSY ERXCLK HOST_p13 28 lt gt iNDBUSY HOSTDIS 1 SWE lt AB10SWE 52 16 gt 52 1 UARTITX lt AS PF14 PPID14 DTISEC UART1TX PH14 ND_CLE ERXDV HosT_p14 2 HOSTDi4 1 2 SA10 816 gt AAMST UABTIRXI gt A PF15 PPID1S DRISEC UARTIRX TACIS PH15 ND ALE COLIHOST 015 22 lt gt INDALEHOSTDI 77 SS 5 SRASI lt ABI RAS ACIS PGO HWAIT aes AOE gt I SMS 2196 ecl PG1 SPISS SPISEL1 TP2 L SMS 17 MRE AB14 ae PG2 SPISCK AWE AWE 25 PG3 SPIMISO DROSECA arpy C 7 51 AB18 Saas 0402 PG4 SPIMOSI DTOSECA CLKOUT PG5 TMR1 PPIFS2 TFSOA 10K PG6 DTOPRIA TMR2 PPIFS3 DNP PG7 TMR3 DROPRIA UARTOTX T22 te 5 PG8 TMR4 RFSOA UARTORX TACI4 GND54 VROUT gt IVROUT 1 wasa U22 Pia e RA PG9 TMR5 RSCLKOA TAGI5 L 1 MI SS PG O IVREFFLT __ 0 BOO O Es 22 acig TFI 0402 PG10 TMR6 TSCLKOA TACI6 VRSEL WAKEUP OUT O DNP PG11 TMR7 HOST_WR RESENI RESET 819
78. age When removing the EZ KIT Lite board from the package handle the board carefully to avoid the discharge of static electricity which can dam age some components Figure 1 1 shows the default jumper settings switches connector locations and LEDs used in installation Confirm that your board is in the default configuration before using the board O ENCODER LOOPBACK W SW10 P16 P15 LCD PPI VDDINT STAMP ENABLE L MODE SW2 ro S B SW18 1 SW11 zs 1 sw9 GS 1 sws GB sw SW20 SWI7 5 19 SW16 O RESET HWAIT ENABLE SW1 bwg SW13 SW21 r sw LE x 8 sws Ix MIC SELECT NN SW4 Figure 1 1 EZ KIT Lite Hardware Setup DASHED LINES INDICATE PART IS LOCATED ON BACK OF BOARD 1 4 ADSP BF527 EZ KIT Lite Evaluation System Manual Using ADSP BF527 EZ KIT Lite Installation and Session Startup For correct operation install the software and hardware in the order pre sented in the VisualDSP Installation Quick Reference Card There are two USB interfaces on the ADSP BF527 EZ KIT Lite Be sure to use the debugger s interface 721 when connecting your computer to the board with provide
79. al to be connected to either the left or right headphone Do not connect both left and right to the MICIN signal at the same time only position 1 or 2 of SW8 should be ON at the same time Refer to Mic HP LPBK Audio Mode Switch SW8 on page 2 14 for more information For more information see Dual Audio Connectors J7 8 on page 2 28 The EZ KIT Lite is shipped with a headphone and multiple 3 5 mm cables which allow you to run the example programs provided in the EZ KIT Lite installation directory and learn about the audio interface USB OTG Interface The ADSP BF527 processor has a built in high speed USB on the go OTG interface and integrated PHY The interface connects to a 24 MHz clock U12 has surge protection and can be configured as a host or device When in device mode the USB 5V regulator VR3 and FET switch U28 are turned OFF When in host mode the USB 5V regulator and FET are turned 0N and can supply 5V at 500 mA ADSP BF527 EZ KIT Lite Evaluation System Manual 1 21 UART Interface The control mechanism to turn the two devices on and off are via the PG13 flag pin of the processor and must be connected on the board to signal USB VRSEL through switch 5013 By default USB_VRSEL is held low or a logic 0 via a pull down resistor and both devices are turned off To use host mode and provide 5V to a device 5113 position 2 needs to be turned OFF and position 6 ON This disables push button 2 Note that s
80. ansion 1 26 2 26 architecture of this EZ KIT Lite 2 2 J4 RS 232 2 27 J5 battery 2 27 power 2 27 J7 8 dual audio 1 22 2 28 interface xiii 1 21 19 Ethernet 1 20 2 28 codec SPORT connect SW17 55 20 2 19 P10 TWD 2 31 ASYNC asynchronous memory control external memory banks 0 3 1 10 audio dual connectors J7 8 1 22 2 28 P11 timers 2 31 switch SW17 1 21 2 19 p12 LCD data 2 98 switch SW20 1 21 2 19 P13 host interface 1 13 2 32 P17 CPLD 2 32 P18 LCD touchscreen 2 33 B P19 LCD backlight 2 33 background telemetry channel BTC 1 28 P1 USB OTG 1 23 2 28 battery holder J5 2 27 P2 keypad 1 18 2 29 bill of materials A 1 P4 VPP board 2 29 board schematic ADSP BF527 B 1 P5 UARTO STAMD 1 24 2 29 boot P6 SPORTO 2 30 modes 2 11 P7 SPORT1 2 30 mode select switch SW2 1 13 1 15 2 11 P8 PPI 2 30 burst flash memory xiii P9 SPI 2 31 ZJ1 USB 2 33 ZP4 JTAG 1 26 2 33 contents of this EZ KIT Lite package 1 3 core voltage 2 2 CTS signal 1 23 customer support xvii CCLK register 1 12 CDG signal 1 15 clock in CLK IN signal 2 3 audio codec See audio interface code security 1 8 ADSP BF527 EZ KIT Lite Evaluation System Manual I 1 INDEX D debugger interface ZJ1 1 5 default configuration of this EZ KIT Lite 1 4 design reference info 1 29 DIP switch SW13 1 23 1 25 2 16 2 18 down signal
81. ck J umper J P5 The UART1 loopback jumper JP5 is used to place the UART1 port of the processor in a loopback condition The jumper connects the UART1_TX line of the processor to the UART1_RX signal of the processor The jumper is required when the power on self test POST is run to test the serial port interface The default setting is uninstalled MIC Select Jumper P6 The MIC select jumper JP6 connects the MICBIAS signal to the MICIN JP6 on 1 and 2 or connects MICBIAS to the 3 5 mm connector J7 JP6 on 2 and 3 The default setting is JP6 installed on 2 and 3 VDDINT Power J umper P14 The VDDINT power jumper P14 is used to measure the core voltage and current supplied to the processor core P14 is ON by default and the power flows through the two pin IDC header To measure power remove the jumper and measure the voltage across the 0 05 ohm resistor Once the voltage is measured the power can be calculated For more information refer to Power Measurements on page 1 27 VDDEXT Power J umper P15 The VDDEXT power jumper P15 is used to measure the processor s I O voltage and current JP15 is ON by default and the power flows through the two pin IDC header To measure power remove the jumper and mea sure the voltage across the 0 05 ohm resistor Once the voltage is measured the power can be calculated 2 22 ADSP BF527 EZ KIT Lite Evaluation System Manual ADSP BF527 EZ KIT Lite Hardware Reference VDDMEM
82. d OFF OFF OFF OFF Keypad LCD Enable Switch SW5 The keypad LCD enable switch 515 connects the interrupt request sig nals and KEYIRQ to the MAX1233 keypad and touchscreen controller U16 on positions 1 and 2 see Table 2 8 Positions 3 and 4 of SW5 control the LCD reset line connection selecting between GPIO SW5 position 3 ON position 4 OFF the board reset SW5 position 3 OFF position 4 0N Note that the GPIO reset line shares the pin with the HOSTWR and LED1 signals The default setting is ON ON OFF ON Table 2 8 Keypad LCD Enable Switch SW5 SW5 Position From Function Default 1 ON DSP Keypad OFF SW10 3 used as GPIO RTS of UART1 expan U2 PF10 U16 sion interface J2 31 J2 49 SPORT1 conn P7 7 PPI conn P8 18 2 ON DSP Keypad IC OFF expansion interface pins J2 33 J2 48 U2 PF9 U16 SPORT1 conn P7 16 PPI conn P8 17 3 OFF DSP LCD conn ON GPIO control of LCD_RESET U2 PG11 P12 OFF host conn P13 4 LED1 expansion interface J1 80 STAMP buffer U34 15 4 ON RESET IC LCD conn OFF LCD not connected to board reset U27 P12 ADSP BF527 EZ KIT Lite Evaluation System Manual 2 13 Push Buttons and Switches Flash Enable Switch SW7 The flash enable switch 517 disconnects AMS signals from flash mem ory allowing other devices to utilize the signals via the expansion interface For
83. d USB cable The other USB interface labelled 058 076 P1 is for applications use 1 Verify that the yellow USB monitor LED ZLED3 located near the USB connector is lit This signifies that the board is communicat ing properly with the host PC and is ready to run VisualDSP 2 If you are running VisualDSP for the first time navigate to the VisualDSP environment via the Start Programs menu The main window appears Note that VisualDSP does not connect to any session Skip the rest of this step to step 3 If you have run VisualDSP previously the last opened session appears on the screen You can override the default behavior and force VisualDSP to start a new session by pressing and holding down the Ctrl key while starting VisualDSP Do not release the Ctrl key until the Session Wizard appears on the screen Go to step 4 3 To connect to a new EZ KIT Lite session start Session Wizard by selecting one of the following From the Session menu New Session From the Session menu Session List Then click New Ses sion from the Session List dialog box From the Session menu Connect to Target ADSP BF527 EZ KIT Lite Evaluation System Manual 1 5 Installation and Session Startup The Select Processor page of the wizard appears on the screen Ensure Blackfin is selected in Processor family In Choose a target processor select ADSP BF527 Click Next The Select Connection Type page of the wizar
84. d appears on the screen Select EZ KIT Lite and click Next The Select Platform page of the wizard appears on the screen Ensure that the selected platform is ADSP BF527 EZ KIT Lite via Debug Agent Specify your own Session name for the session or accept the default name The session name can be a string of any length although the box displays approximately 32 characters The session name can include space characters If you do not specify a session name VisualDSP creates a session name by combining the name of the selected platform with the selected processor The only way to change a session name later is to delete the session and open a new session Click Next The Finish page of the wizard appears on the screen The page dis plays your selections Check the selections If you are not satisfied click Back to make changes otherwise click Finish VisualDSP creates the new session and connects to the EZ KIT Lite Once connected the main window s title is changed to include the ses sion name set in step 6 disconnect from a session click the disconnect button or select Session gt Disconnect from Target To delete a session select Session gt Session List Select the ses sion name from the list and click Delete Click OK 1 6 ADSP BF527 EZ KIT Lite Evaluation System Manual Using ADSP BF527 EZ KIT Lite Evaluation License Restrictions The ADSP BF527 EZ KIT Lite installation is part of t
85. d enclosure and therefore may cause interference to other electrical devices in close proximity This board should not be used in or near any medical equipment or RF devices The ADSP BF527 EZ KIT Lite has been certified to comply with the essential requirements of the European EMC directive 2004 108 EC and therefore carries the CE mark The ADSP BF527 EZ KIT Lite has been appended to Analog Devices Inc EMC Technical File EMC TF referenced DSPTOOLSI issue 2 dated June 4 2008 and was declared CE compliant by an appointed Noti fied Body No 0673 as listed below Notified Body Statement of Compliance Z600ANA2 031 dated November 7 2008 Issued by Technology International Europe Limited 60 Shrivenham Hundred Business Park Shrivenham Swindon SN6 8TY UK The EZ KIT Lite evaluation system contains ESD electrostatic discharge sensitive devices Electrostatic charges readily accumulate on the human body and equipment and can discharge without detection Permanent y damage may occur on devices subjected to high energy discharges Proper ESD precautions are recommended to avoid performance degradation or 4 loss of functionality Store unused EZ KIT Lite boards in the protective shipping package iv ADSP BF527 EZ KIT Lite Evaluation System Manual CONTENTS PREFACE Product xiii Papos er Tins Manual eee u u
86. e Function pEBIU SDGCTL 0x0091998d TSCSR 45 degrees C EMREN disabled FBBRW disabled PSSE enables SDRAM powerup sequence on next SDRAM access PSM precharge 8 BCBR refresh cycles mode register set PUPSD no extra delay added before first precharge command TWR 2 cycles TRCD 3 cycles TRP 3 cycles TRAS 6 cycles PASR all 4 banks refreshed CL CAS latency 3 cycles SCTLE CLOUT disabled Table 1 4 shows configuration of the PLL registers using a 400 MHz CCLK and 133 MHz SCLK The PLL_CTL and PLL_DIV registers are initialized in the user code to achieve maximum performance Table 1 4 PLL Register Settings Register SCLK 133 MHz CCLK 400 MHz 16 PLL_DIV 3 An example program is included in the EZ KIT Lite installation directory to demonstrate how to setup and access the SDRAM interface For more information on how to initialize the registers after a reset search the Visu alDSP online Help for reset values ADSP BF527 EZ KIT Lite Evaluation System Manual Using ADSP BF527 EZ KIT Lite Parallel Hash Memory Interface The parallel flash memory interface of the ADSP BF527 EZ KIT Lite contains a 4 MB 2M x 16 bits ST Micro M29W320EB chip Flash memory connects to the 16 bit data bus and address lines 1 through 19 Chip enable is decoded by using 50 3 select lines through NAND and AND gates The address range for flash
87. e As a result there is no confidentiality associated with the Lockbox key on EZ KIT Lites To demonstrate Lockbox features using an EZ KIT Lite you must use the keys that are provided pre programmed on your EZ KIT Lite Use the EZ KIT Lite key pair to generate a demo and then provide the keys to the demo users Note that the EZ KIT Lite cannot be used to secure any confidential information If you wish to create a demo with confidential keys you must build your own Blackfin board and personalize it with your own keys Memory Map The ADSP BF527 processor has internal static random access memory SRAM used for instructions or data storage See Table 1 1 The internal memory details can be found in the ADSP BF2x Blackfin Processor Hard ware Reference 1 8 ADSP BF527 EZ KIT Lite Evaluation System Manual Using 5 527 EZ KIT Lite The ADSP BF527 EZ KIT Lite board includes four types of external memory synchronous dynamic random access memory SDRAM serial peripheral interconnect SPI parallel flash and NAND flash See Table 1 2 For more information about a specific memory type go the respective section in this chapter Table 1 1 EZ KIT Lite Internal Memory Map Start Address Content 0000 BOOT ROM 32K BYTE 8000 0000 000 OxFF40 0000 OxFF40 4000 OxFF40 8000 OxFF50 0000 Reserved OxFF50 4000 OxFF50 8000 OxFF60 0000 OxFF60 4000 OxFF60 8000 OxFF60 000
88. e program is included in the EZ KIT Lite installation directory to demonstrate how to setup and access the rotary encoder interface 1 18 ADSP BF527 EZ KIT Lite Evaluation System Manual Using ADSP BF527 EZ KIT Lite Ethemet Interface The ADSP BF527 processor has an integrated Ethernet MAC with media independent interface and reduced media independent interface which connects to an external PHY The EZ KIT Lite provides SMSC LAN8700 RMII Ethernet PHY with Auto MDIX fully compliant with IEEE 802 2 802 2u standards The SMSC LAN8700 chip supports 10 5 and 100BASE TX operations The part is attached gluelessly to the processor The Ethernet signals are shared with NAND flash and the Ethernet is by default turned off SW1 OFF OFF ON OFF See ETH Enable Switch SW1 on page 2 10 for more information It is important not to run code that accesses the NAND while using the Ethernet interface The Ethernet mode is set by the SW9 switch and defaults to all capable auto negotiation with settings OFF OFF OFF ON See ETH Mode Flash CS Switch SW9 on page 2 15 for more information The Ethernet chip is pre loaded with a MAC address for the EZ KIT Lite The MAC address is stored in the public one time programmable OTP memory of the processor and can be found on a sticker on the bottom side of the EZ KIT Lite The PHY portion of the Ethernet chip connects to a Pulse HX1188 U26 magnetics then
89. each switch listed in Table 2 9 that is turned OFF the size of available flash memory is reduced by 1 MB Table 2 9 Flash Enable Switch SW7 SW7 Switch Position Default Processor Signal 1 ON AMSO 2 ON AMS1 3 ON AMS2 4 ON AMS3 Mic HP LPBK Audio Mode Switch SW8 The 508 switch allows the EZ KIT Lite to be placed in loopback mode to test for signal circuit continuity and functionality see Power On Self Test on page 1 27 SW8 positions 1 and 2 connect the MICIN signal to the headphone left and right outputs for audio loopback Do not turn 518 positions 1 and 2 ON at the same time SW8 positions 3 and 4 select the control interface for the audio codec SW8 position 3 ON and 4 OFF select SPI interface while position 3 OFF and position 4 ON select TWI mode The 5 8 default settings are OFF OFF ON OFF See SPI TWI Switch SW19 on page 2 19 for more information 2 14 ADSP BF527 EZ KIT Lite Evaluation System Manual ADSP BF527 EZ KIT Lite Hardware Reference ETH Mode Flash CS Switch SW9 The Ethernet mode flash CS switch 599 sets the bootstrapping options for the LAN8700 PHY chip 014 Table 2 10 shows the SN9 default as well as the alternate switch settings SW9 position 4 disconnects SPISEL1 from the SPI flash chip U8 Setting SW9 position 4 OFF is useful when using SPISEL1 on the expansion inter face at connector J2 pin 11 SW9 position 4 is ON by default
90. fault LCD via buffer 032 PPI connector 8 33 expansion interface 92 24 PG6 DTOPRIA TMR2 PPIFS3 Default SPORTO audio codec U2 via SW20 2 PPI connector P8 29 SPORTO connector P6 14 Expansion interface 92 38 02 23 PG7 TMR3 DROPRIA UARTOTX Default SPORT0 audio codec U2 via SW20 3 Via quick switch U34 to the following connectors UARTO P5 6 SPORTO P6 8 and P6 28 SPORTI 7 28 Timers P11 6 and expansion interface J2 37 J3 6 PG8 TMRA RFSOA UARTORX T ACI4 Default SPORTO audio codec U2 SW20 4 Via quick switch U34 to the following connectors SPORTO P6 7 and P6 30 SPORT1 P7 30 Timers P11 8 UARTO P5 10 and expansion interface 92 39 43 5 PG9 TMR5 RSCLKOA TACI5 Default SPORTO audio codec U2 via SW17 2 Via quick switch U34 to the following connectors SPORTO P6 32 and P6 16 SPORTI P7 32 Timers P11 10 and expansion interface J2 41 PG10 TMR6 TSCLKOA TACI Default SPORTO audio codec U2 via SW17 1 SPORTO connector P6 6 expansion interface 92 42 PG11 TMR7 HOST_WR Default LED1 LCD GPIO reset via SW5 3 host connector P13 4 via quick switch to the following connectors SPORTO P6 27 UARTO P5 3 SPORTI P7 29 TWI P10 9 Timers P11 3 SPI P9 15 and expansion interface J1 80 12 DMARl UARTITXA HOST ACK Default LED2 PPI SEL via SW13 4 host connector P13 10 via quick switch U34 to the following co
91. ge Contents on page 1 3 Default Configuration on page 1 4 Installation and Session Startup on page 1 5 Evaluation License Restrictions on page 1 7 Memory Map on page 1 8 SDRAM Interface on page 1 11 Parallel Flash Memory Interface on page 1 13 NAND Flash Interface on page 1 13 SPI Interface on page 1 15 PPI Interface on page 1 16 LCD Module Interface on page 1 17 Touchscreen and Keypad Interface on page 1 18 Rotary Encoder Interface on page 1 19 Ethernet Interface on page 1 20 ADSP BF527 EZ KIT Lite Evaluation System Manual 1 1 Audio Interface on page 1 21 USB Interface on page 1 22 UART Interface on page 1 23 RTC Interface on page 1 24 LEDs and Push Buttons on page 1 25 JTAG Interface on page 1 26 Expansion Interface on page 1 26 Power Measurements on page 1 27 Power On Self Test page 1 27 Example Programs on page 1 28 Background Telemetry Channel on page 1 28 Reference Design Information on page 1 29 For information about VisualDSP including the boot loading target options and other facilities of the EZ KIT Lite system refer to the online Help For more detailed information about the ADSP BF527 Blackfin proces sor see documents referred to as Related Documents 1 2 ADSP BF527 EZ KIT Lite Evaluation System Manual Using ADSP BF527 EZ KIT Lite
92. he VisualDSP installation The EZ KIT Lite is a licensed product that offers an unre stricted evaluation license for the first 90 days Once the initial unrestricted 90 day evaluation license expires VisualDSP restricts a connection to the ADSP BF527 EZ KIT Lite via the USB debug agent interface only Connections to simu lators and emulation products are no longer allowed The linker restricts a user program to 20 KB of memory for code space with no restrictions for data space The EZ KIT Lite hardware must be connected and powered up use VisualDSP with a valid evaluation or permanent license Refer to the VisualDSP Installation Quick Reference Card for details ADSP BF527 EZ KIT Lite Evaluation System Manual 1 7 Lockbox Key The ADSP BF527 Blackfin processors feature Lockbox secure technol ogy hardware enabled code security and content protection for one time programmable OTP memory Customers purchasing the ADSP BF527 processors can program their own customer public key in OTP memory The ADSP BF527 EZ KIT Lites are special cases evaluation boards with the Lockbox keys pre programmed and publicly documented the burden of key generation and OTP programming is removed from the customer For EZ KIT Lites Analog Devices publicly document the public and pri vate key pair for customer evaluation and support of the Lockbox feature all while avoiding any keys information exchang
93. ignal USB_VRSEL is shared with HOSTADDR The default for positions 2 and 6 of SW13 are ON and OFF which shuts off the VR3 regulator and U28 FET For more information see GPIO Enable Switch SW13 on page 2 16 The USB OTG interface has a mini AB connector P1 cables that plug into 1 are shipped with the EZ KIT Lite Use the example programs in the EZ KIT Lite installation directory to learn about the ADSP BF527 processor s device and host modes For more information about the USB interface refer to the ADSP BF52x Blackfin Processor Hardware Reference UART Interface The ADSP BF527 processor has two built in universal asynchronous receiver transmitters UARTs UART1 0 share the processor pins with other peripherals on the EZ KIT Lite UART1 has full RS 232 functionality via the Analog Devices 3 3V ADM3202 025 line driver and receiver The UART can be disconnected from the ADM3202 by turning OFF all positions of SW10 See UART Enable Switch SW10 on page 2 15 When using UART1 jumpers JP5 should not be installed JP5 15 UART loopback jumper and should be installed only when running the POST program If signals RTS and CTS are needed for flow control the UARTIRTS_PENIRQ port pin 10 can be con figured as a GPIO for RTS The HWAIT port pin PGO can be used for CTS setting up the pin accordingly See UART1 Loopback Jumper 5 page 2 22 and UART Enable Switch SW10 on page 2 15 for more
94. l dimensions of the expansion connectors can be obtained by contacting Technical or Customer Support Analog Devices offers many EZ Extender products For more information about EZ Extenders visit the Analog Devices Web site at http www analog com processors blackfin evaluationDevelop ment crosscore Limits to current and interface speed must be taken into consideration when using the expansion interface Current for the expansion interface is sourced from the EZ KIT Lite therefore the current should be limited to 1A for both the 5V and 3 3V planes If more current is required then a ADSP BF527 EZ KIT Lite Evaluation System Manual 1 25 Power Measurements separate power connector and a regulator must be designed on a daughter card Additional circuitry can add extra loading to signals decreasing their maximum effective speed Analog Devices does not support and is not responsible for the effects of additional circuitry Power Measurements Several locations are provided for measuring the current draw from vari ous power planes Precision 0 05 ohm shunt resistors are available on the VDDINT VDDEXT and VDDMEM pins For current draw measuments the asso ciated jumper P14 P15 or P16 should be removed Once the jumper is removed voltage across the resistor can be measured using an oscilloscope Once voltage is measured current can be calculated by dividing the volt age by 0 05 For the highest accuracy a differential p
95. lder Please remember to remove the Mylar sheet before trying to use RTC functionality of the processor For more information on the RTC and watchdog timer refer to the ADSP BF52x Blackfin Processor Hardware Reference ADSP BF527 EZ KIT Lite Evaluation System Manual 1 23 LEDs and Push Buttons LEDs and Push Buttons The EZ KIT Lite provides two push buttons and three LEDs for gen eral purpose I O The three LEDs labeled LED1 through LED3 are accessed via the PF8 PG11 and PG12 pins of the processor respectively For information on how to program the pins refer to the ADSP BF52x Blackfin Processor Hardware Reference is shared with signal HOSTWR while LED2 is shared with signal HOS TACK The LED1 signal can be used for the LCD reset by turning 515 positions 3 ON and 4 OFF LED2 is shared with PPI_SEL turn SW13 position 4 OFF to use the LED The two general purpose push buttons are labeled PB1 and P82 The status of each individual button can be read through programmable flag inputs PGO and PG13 The flag reads 1 when a corresponding switch is being pressed When the switch is released the flag reads 0 A connection between the push button and processor input is established through the 5 13 DIP switch Push button 1 is shared with HWAIT and alternatively can be connected to signal keypad busy by setting SW13 position 1 OFF and position 5 ON Push button 2 is shared with HOSTADDR and also can con nected to US
96. ly CUI INC DMS070214 P6P SZ ADSP BF527 EZ KIT Lite Evaluation System Manual 2 27 Connectors Dual Audio Connectors 7 8 Part Description Manufacturer Part Number 3 5 mm dual stereo jack 3 5 mm male male 6 cable SWITCHCRAFT Mating Cable shipped with EZ KIT Lite RANDOM 35RAPC7JS 10A3 01106 Mating Headphone shipped with EZ KIT Lite 3 5 mm stereo headphones KOSS 151225 URS Ethemet Connector 9 Part Description Manufacturer Part Number RJ 45 Ethernet jack STEWART SS 6488 NF Cat 5E patch cable RANDOM Mating Cable shipped with EZ KIT Lite PC10 100T 007 USB OTG Connector P1 The pinout of the P1 connector can be found in ADSP BF527 EZ KIT Lite Schematic on page B 1 Part Description Manufacturer Part Number USB 5 pin mini AB MOLEX 56579 0576 Mating Cables shipped with EZ KIT Lite 5 in 1 USB 2 0 cable JO DAN INTERNAT GXQU 06 2 28 ADSP BF527 EZ KIT Lite Evaluation System Manual ADSP BF527 EZ KIT Lite Hardware Reference Keypad Connector P2 Part Description Manufacturer Part Number IDC header female SAMTEC SSW 109 01 TM S Mating Keypad shipped with EZ KIT Lite 4 x keypad ACT COMPONENTS ACT 07 30008 000 R VPP Board Connector P4 The VPP board connector P4 is not populated and is for testing purposes only not intended for use UARTO C
97. mark and fill out the order form ADSP BF527 EZ KIT Lite Evaluation System Manual xix Product Information Data sheets which can be downloaded from the Analog Devices Web site change rapidly and therefore are not included on the technical library CD Technical manuals change periodically Check the Web site for the latest manual revisions and associated documentation errata Related Documents For information on product related development software see the follow ing publications Table 1 Related Processor Publications Title Description ADSP BF522 ADSP BF525 ADSP BF527 Blackfin Embedded Processor Data Sheet General functional description pinout and timing ADSP BF2x Blackfin Processor Hardware Reference Description of the internal processor archi tecture and all register functions Blackfin Processor Programming Reference Description of all allowed processor assem bly instructions Table 2 Related VisualDSP Publications Title Description ADSP BF527 EZ KIT Lite Evaluation System Manual Description of the hardware capabilities of the evaluation system description of how to access these capabilities in the VisualDSP environment VisualDSP Users Guide Description of the VisualDSP features and usage VisualDSP Assembler and Preprocessor Manuals Description of the assembler function and commands VisualDSP C C Complier and Libra
98. n 11 Wr n 1 E popen aiam 3 Tow AN A 0 Cotton Roa 3 3V L _ _ _ _LCD_PPID6I Z Nc at CONDS Nashua NH 03063 FF ion O C247 DEVICES eu 1 800 anatoap Pr 14 P12 P12 C259 C258 C257 C256 0 01UF L __ LCD RESET 0 1UF 0 1UF 0 1UF 0 1UF T 0402 15 0402 0402 0402 0402 Title ADSP 527 EZ KIT Lite Size Board No Rev P17 C A0208 2006 20 Date 4 28 2009 15 57 Sheet 8 of 13 B D 3 3V O ROTARY 031 RN5 NAND BAGG Oa m e E rphar tor Stor ENABLE 33 Oia 12 Upon R2A LOG PPID ____ ENCODER PPD Oin Rag gt PPID2 783 wd naa gt nem b 12RsB R5AP gt LCD PPIDA 1 SW3 SW11 based 1 RAP ESD PIDE AH mE gt ICUD 1 C PPIDS 9 2 eyo 10 b s ss TI IILIZIICI 1 3 2 7 r
99. nd keypad interface ADSP BF527 EZ KIT Lite Evaluation System Manual 1 17 Rotary Encoder Interface Rotary Enc oder Interface The ADSP BF527 processor has a built in up down counter with support for a rotary encoder The three wire rotary encoder interface connects to the rotary switch SW3 and expansion interface connector The rotary encoder can be turned clockwise for the up function counter clockwise for the down function or can be used as a push button for clearing the counter The rotary switch is a two bit quadrature Gray code counter with detent meaning that both the down signal CDG and up signal CUD will toggle when the count register increases on a rotation to the right Upon rotating to the left both CDG and CUD will toggle and the over all count decreases If the processor pins are needed for the expansion interface disconnect the rotary encoder switch via the four position rotary NAND enable switch SW11 For more information see Rotary NAND Enable Switch SW11 on page 2 16 The CDG signal is shared with the SPISEL2 signal care must be taken not to rotate the switch while issuing SPI commands to the keypad and touch screen controller To ensure that there is no interference from the rotary encoder on SPISEL2 turn SW1 position 2 OFF Shutting off connection to CDG causes the rotary switch not to operate correctly Both CDG and CUD are necessary for the switch to output accurate counts An exampl
100. nector P13 2 32 CPLD TTAG tonnecrar IPTE ees eens 2 32 LCD Touchscreen Connector P18 2 33 2 33 UNB Connector DE 2 33 lr ede c o APE T eid aside 2 33 ADSP BF527 EZ KIT LITE BILL OF MATERIALS ADSP BF527 EZ KIT LITE SCHEMATIC Processor EBIU and Control Rotary aH d LEDs Push Buttons Reset Host Port eee ADSP BF527 EZ KIT Lite Evaluation System Manual intence and JTAG cco eens B 11 Efe plici t Gn Rd RATER B 12 noc MEME M M d B 13 INDEX x ADSP BF527 EZ KIT Lite Evaluation System Manual Thank you for purchasing the ADSP BF527 EZ KIT Lite Analog Devices Inc evaluation system for the ADSP BF523 ADSP BF525 and ADSP BF527 Blackfin processors Blackfin processors embody a new type of embedded processor designed specifically to meet the computational demands and power constraints of today s embedded audio video and communications applications They deliver breakthrough signal processing performance and power efficiency within a reduced instruction set computing RISC programming model Blackfin processors support a media instruction set computing MISC architecture This architecture is the natural merging of RISC media functions and digi
101. nnections Processor Pin Other Processor Function EZ KIT Lite Function PGO HWAIT Default PB1 via SW13 1 UARTI CTS HWAIT via JP1 SW10 1 BUSY via SW13 1 OFF and SW13 5 ON Host connector P13 12 and expansion interface J1 84 SPISS SPISEL1 Default SPI flash U8 CS via SW9 4 Expansion interface J2 11 via quick switch U30 to the following connectors SPI P9 10 PPI P8 27 SPORTO P6 17 and SPORTI P7 17 PG2 SPISCK Default SPI flash U8 codec U2 via SW19 3 key pad touch screen controller U16 Expansion interface J2 9 via quick switch U30 to the following connectors SPI P9 8 SPORTO P6 22 SPORTI P7 22 and PPI P8 34 PG3 SPIMISO DROSECA Default SPI flash U8 keypad touchscreen controller U16 Via quick switch U30 to the following connectors SPI P9 6 SPORTO P6 10 and 6 20 5 P7 20 and PPI P8 32 and expansion interface J2 12 J2 35 PG4 SPIMOSI DTOSECA Default SPI flash U8 codec U2 via SW19 1 key pad touchscreen controller U16 Via quick switch U30 to the following connectors SPORTO P6 12 and P6 18 SPORT1 P7 18 SPI P9 5 PPI P8 30 and expansion interface 92 10 J2 36 ADSP BF527 EZ KIT Lite Evaluation System Manual 2 5 Programmable 5 Table 2 2 PG Port Programmable Flag Connections Contd Processor Pin Other Processor Function EZ KIT Lite Function PG5 52 5 De
102. nnectors UARTO P5 5 Timers P11 5 TWI P10 12 SPORTO P6 29 SPORTI P7 31 SPI P9 16 and expansion interface J1 81 ADSP BF527 EZ KIT Lite Evaluation System Manual ADSP BF527 EZ KIT Lite Hardware Reference Table 2 2 PG Port Programmable Flag Connections Contd Processor Pin Other Processor Function EZ KIT Lite Function PG13 DMARO UARTIRXA HOST Default PB2 via SW13 2 ADDR TACI2 OTG USB_VRSEL via SW13 6 ON and SW13 2 OFF host connector P13 8 and expansion interface 21 85 PG14 TSCLKOA MDC HOST_RD Default host connector P13 2 13 6 MDIO PHY 014 SW1 2 expansion interface 23 41 PG15 TFSOA MIIPHY Default SPORTO audio codec U2 via SW20 1 INT RMIIM RMIIMDINT PHY 014 host connector P13 6 DINT HOST_CE SPORTO connector P6 11 and expansion interface 92 40 93 31 Table 2 3 PH Port Programmable Flag Connections Processor Pin Other Processor Function EZ KIT Lite Function PHO ND DO MIICRS RMII Default NAND Data 0 U4 CRSDV HOST DO RMII carrier sense receive data valid 014 36 host connector data 0 P13 31 and expansion interface 03 40 PHI ND_D1 ERXER HOST_D1 Default NAND Data 1 U4 PHY receive error U14 21 host connector data 1 P13 29 expansion interface J3 39 PH2 ND_D2 MDIO HOST_D2 Default NAND Data 2 U4 PHY management bus MDI0 via SW1 1 host connector data 2 P13 27 and expansion interface
103. nts used to manufacture the EZ KIT Lite board Appendix ADSP BF527 EZ KIT Lite Schematic on page B 1 Provides the resources to allow board level debugging or to use as a reference guide Appendix B is part of the online Help xvi ADSP BF527 EZ KIT Lite Evaluation System Manual Preface Whats New in This Manual The ADSP BF527 EZ KIT Lite Evaluation System Manual has been updated to reflect the latest board revision In addition modifications and corrections based on errata reports against the previous manual revision have been made Technical or Customer Support You can reach Analog Devices Inc Customer Support in the following ways Visit the Embedded Processing and DSP products Web site at http www analog com processors technical Support E mail tools questions to processor tools support analog con E mail processor questions to processor support analog com World wide support processor europe analog com Europe support processor china analog com China support Phone questions to 1 800 ANALOGD Contact your Analog Devices Inc local sales office or authorized distributor Send questions by mail to Analog Devices Inc One Technology Way P O Box 9106 Norwood MA 02062 9106 USA ADSP BF527 EZ KIT Lite Evaluation System Manual xvii Supported Processors Supported Processors This evaluation system supports Analog Devices ADSP BF523 ADSP BF525 and ADSP BF
104. o learn more about Analog Devices emulators and processor development tools go to http www analog com dsp tools The ADSP BF527 EZ KIT Lite provides example programs to demon strate the evaluation board capabilities The ADSP BF527 EZ KIT Lite installation is part of the Visu alDSP installation The EZ KIT Lite is a licensed product that offers an unrestricted evaluation license for the first 90 days For details about evaluation license restrictions after the 90 days refer to Evaluation License Restrictions on page 1 7 and the Visu alDSP Installation Quick Reference Card xii ADSP BF527 EZ KIT Lite Evaluation System Manual Preface Product Overview The board features Analog Devices ADSP BF527 Blackfin processor v Core performance up to 600 MHz v External bus performance up to 133 MHz 289 mini BGA package 25 MHz crystal Synchronous dynamic random access memory SDRAM v Micron MT48LC32M16A2TG 64 MB 8M x 16 bits x 4 banks Parallel flash memory v ST Micro M29W320EB 32 Mb 2M x 16 bits NAND flash memory v ST Micro NAND04 4 Gb SPI flash memory v ST Micro M25P16 16 Mb Analog audio interface v Low power audio codec v lstereo LINE OUT jack linput MIC jack v 1 input stereo LINE IN jack ADSP BF527 EZ KIT Lite Evaluation System Manual Xiii Product Overview TFT LCD display with touchscreen Varitronix VLGT 6272 01 320 x 240 3 5 touchscreen LCD
105. oduct The programs are installed with the VisualDSP software and can be found in the lt install_path gt Blackfin Examples ADSP BF527 EZ KIT Lite directory Refer to a readme file provided with each example for more information Background Telemetry Channel The USB debug agent supports the background telemetry channel BTC which facilitates data exchange between VisualDSP and the processor without interrupting processor execution The BTC allows you to read and write data in real time while the proces sor continues to execute For increased performance of the BTC including faster reading and writing please check our latest line of proces sor emulators at http www analog com processors blackfin evaluationDevelop ment crosscore For more information about BTC see the online Help ADSP BF527 EZ KIT Lite Evaluation System Manual 1 27 Reference Design Information Reference Design Information A reference design info package is available for download on the Analog Devices Web site The package provides information on the design lay out fabrication and assembly of the EZ KIT Lite and EZ Board products The information can be found at http www analog com en embedded processing dsp con tent reference_designs fca html 1 28 ADSP BF527 EZ KIT Lite Evaluation System Manual 2 ADSP BF527 EZ KIT LITE HARDWARE REFERENCE This chapter describes the hardware design of the ADSP BF527 EZ KIT Lite board The follo
106. onnector IDC socket DIGI KEY 4210 ND Two Wire Interface Connector P10 The pinout of the P10 connector can be found in ADSP BF527 EZ KIT Lite Schematic on page B 1 Part Description Manufacturer Part Number IDC header FCI 68737 420HLF Mating Connector IDC socket DIGI KEY 4210 ND TIMERS Connector P11 The pinout of the P11 connector can be found in ADSP BF527 EZ KIT Lite Schematic on page B 1 Part Description Manufacturer Part Number IDC header FCI 68737 410HLF Mating Connector IDC socket DIGI KEY 4205 ND ADSP BF527 EZ KIT Lite Evaluation System Manual 2 31 Connectors LCD Data Connector P12 Part Description Manufacturer Part Number FPC 16 pin 1 mm 3 5 TFT LCD with touchscreen HIROSE Varitronix FH12 16S 1SH 55 Mating LCD Display Module shipped with EZ KIT Lite COG T350MCQB 01 Host Interface Connector P13 The pinout of the P13 connector can be found in ADSP BF527 EZ KIT Lite Schematic on page B 1 Part Description Manufacturer Part Number IDC header SAMTEC TSW 116 26 T D Mating Connector IDC socket SAMTEC TSW 116 01 T D CPLD J TAG Connector P17 The CPLD JTAG connector P17 is not populated the CPLD code should not be altered for LCD operations Part Description Manufacturer Part Number IDC header FCI 68737 410HLF Mating Connector
107. onnector P5 The pinout of the P5 connector can be found in ADSP BF527 EZ KIT Lite Schematic on page B 1 Part Description Manufacturer Part Number IDC header FCI 68737 410HLF Mating Connector IDC socket DIGI KEY 4205 ND ADSP BF527 EZ KIT Lite Evaluation System Manual 2 29 Connectors SPO RTO Connector The pinout of the P6 connector can be found in ADSP BF527 EZ KIT Lite Schematic on page B 1 Part Description Manufacturer Part Number IDC header FCI 68737 434HLF Mating Connector IDC socket DIGI KEY S4217 ND SPORT1 Connector P7 The pinout of the P7 connector can be found in ADSP BF527 EZ KIT Lite Schematic on page B 1 PPI Connector P8 The pinout of the P8 connector can be found in ADSP BF527 EZ KIT DIGI KEY Lite Schematic on page B 1 Part Description Manufacturer Part Number IDC header FCI 68737 434HLF Mating Connector IDC socket 4217 ND Part Description Manufacturer Part Number IDC header FCI 68737 A40HLF Mating Connector IDC socket DIGI KEY S4220 ND 2 30 ADSP BF527 EZ KIT Lite Evaluation System Manual ADSP BF527 EZ KIT Lite Hardware Reference SPI Connector P9 The pinout of the P9 connector can be found in ADSP BF527 EZ KIT Lite Schematic on page B 1 Part Description Manufacturer Part Number IDC header FCI 68737 420HLF Mating C
108. r 0402 rT TT 15 5 R7B R7A gt LCD_PPID6____ B L E gt ISPISEL2 CDG______ L __PpPiDe _ gt 2A3 2Y3 g B mue l 3 b r 17 3 R8B R8A gt LCD PPID7 V swi M ICZM i PPD7 gt 2Y4 e swe 7 7 L 2 LN P gt INDCE 1 1 RNS003 Spa OE1 COMMON 2 SWT018 m f ROT 4 1 SWT022 2 SSOP20 SJ2 N Z IDC2XI SHORTING Populate JP2 when using LCD JUMPER DEFAULT INSTALLED Connects PPI bus to LCD connector P12 N Z LCD PPI R181 SW11 Rotary NAND enable U32 0 0402 1 55 1 2 8 AAAA 0 EPATAAMT 4 POS FROM TO DEFAULT ALTERNATE FUNCTION OFF MODE L__PPICLG 2 7 1 1Y1 2 iLCD 1 1y SW11 1 Encoder SW3 DSP U2 PF13 ON Expansion Interface J2 34 J2 52 Stamp buffer U34 PPIFS11 6 A3 1y3 4 0402 3 8 12 gt LCD 51 ____ SW11 2 Encoder SW3 DSP U2 12 ON CS audio codec U2 CS keypad touch controller 016 Expansion Interface 2 30 J2 51 Stamp buffer 030 t PPIFS21 gt 4 1 4 R182 0 11 9 0402 SW11 3 Encoder SW3 DSP U2 11 ON Expansion Interface J2 32 J2 50 Stamp buffer 034 AR A A AA PPIFSE 77771 Se SW11 4 DSP U2 PH10 NAND U4 ON Host connector P13 11 Expansion Interface J3 35 19 2Y35_ _ on 2Y48 199E2 3 3V 3 3V
109. robe should be used for measuring the voltage across the resistor For more information see VDDINT Power Jumper P14 VDDEXT Power Jumper P15 and VDDMEM Power Jumper P16 on page 2 23 Power On Self Test The power on self program POST tests all EZ KIT Lite peripherals val idates functionality as well as connectivity to the processor Once assembled each EZ KIT Lite is fully tested for an extended period of time with a POST boards are shipped with the POST pre loaded into par allel flash 05 and SPI flash U8 memories The POST is executed by resetting the board and pressing the proper push button s The POST also can be used for reference in a custom software design or hardware troubleshooting 1 26 ADSP BF527 EZ KIT Lite Evaluation System Manual Using ADSP BF527 EZ KIT Lite When running the POST you may need to place switches and jumpers in specific test modes In some instances such as Ethernet you may need to plug in an Ethernet loopback connector provided with the EZ KIT Lite to run the POST The user LEDs LED1 3 will convey whether the spe cific tests have passed or failed The source code for the POST program is included in the EZ KIT Lite installation directory of VisualDSP along with the readme file which describes how the board is configured to run a POST Example Programs Example programs are provided with the ADSP BF527 EZ KIT Lite to demonstrate various capabilities of the pr
110. ry Man ual for Blackfin Processors Description of the complier function and commands for Blackfin processors VisualDSP Linker and Utilities Manual Description of the linker function and com mands ADSP BF527 EZ KIT Lite Evaluation System Manual Preface Table 2 Related VisualDSP Publications Cont d Title Description VisualDSP Loader and Utilities Manual Description of the loader splitter function and commands VisualDSP Device Drivers and System Services Description of the device drivers and system Manual for Blackfin Processors services functions and commands Notation Conventions Text conventions used in this manual are identified and described as follows Example Description Close command File menu Titles in reference sections indicate the location of an item within the VisualDSP environment s menu system for example the Close com mand appears on the File menu this that Alternative required items in syntax descriptions appear within curly brackets and separated by vertical bars read the example as this or that One or the other is required this that Optional items in syntax descriptions appear within brackets and sepa rated by vertical bars read the example as an optional this or that this Optional item lists in syntax descriptions appear within brackets delim ited by comma
111. s GPIO RTS of UART1 expansion interface J2 31 J2 49 SPORT 1 conn P7 7 PPI conn P8 18 0805 0805 AAA 4 12 SW1 2 DSP U2 PF9 Keypad IC U16 ON OFF Expansion Interface pins J2 33 J2 48 SPORT 1 conn P7 16 PPI conn P8 17 D6 3 3V 5105 02227 SOD 1 23 O IK MMSZ12T1 6 SW1 3 DSP U2 PG11 LCD conn P12 OFF ON GPIO control of LCD_RESET OFF HOST conn P13 4 LED1 Expansion Interface J1 80 STAMP buffer U34 15 106 023 gt No7z 0242 SW1 4 RESET IC U27 LCD conn P12 ON OFF LCD not connected to board reset i 9 O252 2 I 12 20 J 4 Bago 3os 0260 R190 Fd 10K 13 19 10K CONOSS 0402 010 a 0805 DNP 14011 LCD ae LCD 1611_ e ae 5V T T CPLD JTAG R189 B LCD_TCK He 0805 4 LCD_TDO 24rpo 12 5 LCD_TDI 4 6 LCD_TMS i LCD DEN MI IDC6X1 249 C250 C248 4 3 DNP 0 1UF 0 01UF 0 01UF L ____ LeD_PPIFs21 gt 5V XC9536XL 0402 0402 0402 VQ44 160 PPIESTi C E L LCD lt SSS SS SS 6 1 LCD PPIDO eae 7 9 9 LCD PPID1 pL 8 C255 C253 C254 C252 TOUCHSCREEN U 3 L ____LCD_pPiDa gt 40UF 0 01UF 10UF 0 01UF poe ce 9 T 0805 0402 0805 0402 10 18 5 LCD PPID41 e e o
112. s and terminated with an ellipse read the example as an optional comma separated list of this SECTION Commands directives keywords and feature names are in text with letter gothic font filename Non keyword placeholders appear in text with italic style format ADSP BF527 EZ KIT Lite Evaluation System Manual xxi Notation Conventions Example Description Note For correct operation A Note provides supplementary information on a related topic In the online version of this book the word Note appears instead of this symbol Caution Incorrect device operation may result if Caution Device damage may result if A Caution identifies conditions or inappropriate usage of the product that could lead to undesirable results or product damage In the online version of this book the word Caution appears instead of this symbol Warning Injury to device users may result if A Warning identifies conditions or inappropriate usage of the product that could lead to conditions that are potentially hazardous for the devices users In the online version of this book the word Warning appears instead of this symbol 2 ADSP BF527 EZ KIT Lite Evaluation System Manual 1 USING ADSP BF527 EZ KIT LITE This chapter provides information to assist you with development of pro grams for the ADSP BF527 EZ KIT Lite evaluation system The following topics are covered Packa
113. sure applied to the touchscreen The touchscreen can be used with either a stylus or a finger Two interrupt signals connect to the device The key interrupt KEYIRQ signal is mapped to PF9 and used to notify the processor that a key on the keypad has been pressed The pen interrupt PENIRQ signal is mapped to PF10 and used to notify the processor that the screen has been touched The PENIRQ signal is shared with UARTIRTS SW5 positions 1 and 2 are ON by default and allow the MAX1233 controller to be disconnected from PF pins PF9 and PF10 of the processor SW5 positions 3 and 4 are OFF ON by default and select the board reset as the reset input to the LCD module The GPIO function of PF P611 also can be used to control the LCD reset SW5 positions 3 and 4 0N and OFF however PG11 is used to control LED1 by default The EZ KIT Lite features a 4 x 4 keypad assembly connected to the MAX1233 touchscreen controller U16 The keypad interface connects to the EZ KIT Lite via a nine pin connector P2 The ADSP BF527 proces sor receives input from the keypad through the SPI interface after a KEYIRQ interrupt The row column pull ups and pull downs handled internally by the MAX1233 controller For more options on the MAX1233 controller refer to Keypad LCD Enable Switch SW5 on page 2 13 An example program is included in the EZ KIT Lite installation directory to demonstrate how to setup and access the touchscreen a
114. tal signal processing DSP characteristics Blackfin processors deliver signal processing performance in a microprocessor like environment Based on the Micro Signal Architecture MSA Blackfin processors com bine a 32 bit RISC instruction set dual 16 bit multiply accumulate MAC DSP functionality and eight bit video processing performance that had previously been the exclusive domain of very long instruction word VLIW media processors ADSP BF527 EZ KIT Lite Evaluation System Manual xi The evaluation board is designed to be used in conjunction with the Visu alDSP development environment to test capabilities of the ADSP BF523 BF525 BF527 Blackfin processors The VisualDSP development environment aids advanced application code development and debug such as Create compile assemble and link application programs written in C C and ADSP BF527 assembly Load run step halt and set breakpoints in application programs Read and write data and program memory Read and write core and peripheral registers Plot memory Access to the processor from a personal computer PC is achieved through a USB port or an external JTAG emulator The USB interface provides unrestricted access to the ADSP BF527 processor and evaluation board peripherals Analog Devices JTAG emulators offer faster communi cation between the host PC and target hardware Analog Devices carries a wide range of in circuit emulation products T
115. the 518 and 5119 switches between the two wire interface TWI and SPI The board default is SPI mode set by the SW19 switch ON OFF ON OFF and by the SW8 switch positions ON and 4 OFF To select TWI mode turn 508 positions 3 OFF and 4 ON as well as 5119 OFF ON OFF ON Refer to Mic HP LPBK Audio Mode Switch SW8 on page 2 14 and SPI TWI Switch SW19 on page 2 19 for more information Mic gain is selectable through the SW4 switch with values of 14 dB 0 dB or 6 dB by turning ON position 1 2 or 3 respectively All other positions must be OFF to achieve the desired gain Refer to MIC Gain Switch SW4 on page 2 12 for more information 1 20 ADSP BF527 EZ KIT Lite Evaluation System Manual Using ADSP BF527 EZ KIT Lite Microphone bias is provided through a low noise reference voltage A jumper on position 2 and 3 of JP6 connects the MICBIAS to the audio jack Placing the jumper on positions 1 and 2 of JP6 connects the bias directly to the mic signal Refer to MIC Select Jumper JP6 on page 2 22 for more information J7 and J8 are 3 5 mm connectors for the audio portion of the board J7 connects the mic on the top portion and line in on the bottom J8 con nects the headphone on the top portion and line out on the bottom If there is no 3 5 mm cable plugged into the bottom of J7 or J8 the signals are looped back inside the connector For testing purposes SW8 positions 1 and 2 allow the MICIN sign
116. to a standard RJ 45 Ethernet connector J9 For more information see Ethernet Connector J9 on page 2 28 Example programs are included in the EZ KIT Lite installation directory to demonstrate how to use the Ethernet interface ADSP BF527 EZ KIT Lite Evaluation System Manual 1 19 Audio Interface Audio Interface The audio interface of the EZ KIT Lite consists of a low power stereo codec with integrated headphone driver and its associated passive compo nents There are two inputs stereo line in and mono microphone as well as two outputs headphone and stereo line out The codec has integrated stereo analog to digital converters ADCs and digital to analog convert ers DACs and requires minimal external circuitry The codec connects to the ADSP BF527 processor via the processor s serial port OA alternate The SPORTOA port is disconnected from the codec by turning SW17 and SW20 This allows SPORTOA to be used on the expansion interface The TFSOA signal is shared with the Ethernet and host connectors as well as the RMIIMDINT and HOSTCE signals SW21 allows this signal to be dis connected from the host connector by setting position 1 0FF and STAMP connectors position 2 OFF To connect signal TFSOA_RMIIMDINT _HOSTCE to either interface turn the corresponding switch position ON Refer to TFSOA HOSTCE Enable Switch SW21 on page 2 19 for more information The control interface for the codec is selectable by
117. tons SW14 15 are provided for general purpose user input The buttons connect to the PGO and P613 GPIO pins of the processor The push buttons are active high and when pressed send a high 1 to the processor The GPIO enable switch SW13 disconnects the push buttons from the corresponding PB signal Refer to GPIO Enable Switch SW13 on page 2 16 for more information Reset Push Button SW16 The reset push button 5116 resets the following ICs processor U2 parallel flash U5 PHY 014 if SW1 position 4 is ON LCD P12 if SW5 position 3 is OFF and 4 is ON CPLD 033 The reset push button does not reset the following ICs SDRAM 07 NAND flash 04 SPI flash 08 audio codec U2 keypad touchscreen controller 016 UART1 025 The reset push button does not reset the debug agent once it has been connected to a PC The USB chip is not reset when the push button is pressed after the USB cable has been plugged in and communication with the PC has been initialized correctly After USB communication has been initialized the only way to reset the USB chip is by powering down the board 2 18 ADSP BF527 EZ KIT Lite Evaluation System Manual ADSP BF527 EZ KIT Lite Hardware Reference SPORTOA Switches SW17 and SW20 The SPORTOA enable switches SW17 and SW20 connect the SPORTOA inter face of the processor to the audio codec When the SPORTOA interface is needed at the expansion interface
118. wing topics are covered System Architecture on page 2 2 Describes the ADSP BF527 EZ KIT Lite board configuration and explains how the board components interface with the processor Programmable Flags on page 2 3 Shows the locations and describes the programming flags PFs Push Buttons and Switches on page 2 10 Shows the locations and describes the on board push buttons and switches Jumpers on page 2 20 Shows the locations and describes the on board configuration jumpers LEDs on page 2 23 Shows the locations and describes the on board LEDs Connectors on page 2 25 Shows the locations and provides part numbers for the on board connectors In addition the manufacturer and part number infor mation is provided for the mating parts ADSP BF527 EZ KIT Lite Evaluation System Manual 2 1 System Arc hitec ture System Architecture This section describes the processor s configuration on the EZ KIT Lite board Figure 2 1 JTAG 32 768 KHz 25 MHz Header Oscillator Oscillator 3 0 LI ION RTC Battery USB Expansion Conn Connectors 3 USB OTG Conn CNTR UP DOWN 24 MHz Oscillator LEDs 3 PBs 2 RJ11 IDC Conn mom m IDC Conn IDC Conn
119. xpansion Interface SW7 4 DSP U2 FLASH U5 ON J2 59 Expansion Interface 3 3V Ne R20 R19 R18 R17 R16 10K 10K 10K 0402 04025 0402 lt _ 0402 0402 2 RAS A FLASH ENABLE ba s E ial 1 010 RESET L____ ABE0 SDQMo1 _ gt DQML 7 oe s 39 4 2 27 BYTE 122 ABE1 SDQM1 7 DQMH Ja 4 VC1G08 U9 IRY BY 501 gt SOT23 5 4 2 MT48LC32MT6A2TGE75 2 TSOP54 AMS1 5 M 1 J 3 1216 C1G08 _ Jag L_AMS2 gt gt M 4 chanel CSUE 3 3V ro J O e 2 DA a ja 5574 HC1G00 VPP WP SWT018 3 5 25 M29W320EB ne TFBGA63 80 N 4 2 C83 C81 C82 C84 C86 C85 C87 CM ADDRESS RANGE SELECT LINE TYPE 0 1UF 0 1UF 0 01UF 0 01UF 0 01UF 0 01UF 0 01UF SOT23 5 0402 0402 0402 0402 0402 0402 0402 RESET 0x2030 0000 0x203F FFFF ASYNC BANK 3 FLASH 0x2020 0000 0x202F FFFF ASYNC BANK 2 FLASH 0x2010 0000 0x201F FFFF ASYNC BANK 1 FLASH 0x2000 0000 0x200F FFFF ASYNC BANK 0 FLASH 3 LARE 0x0000 0000 0x03FF FFFF NONE SDRAM U7 L AWE 3 3V Fur m Ig m D a T 0402 0402 0402 0402 T 0402 h 1 6 Mb SPI FLASH e e 4Gb NAND FLASH mw U5 06 U9 010 011 33V 33 33 10K 10K R27

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