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SuperMicro P3TDLR Motherboard

1. Connector Connector Contact Contact Number Signal Names Number Signal Names 1 DB 12 35 DB 12 2 DB 13 36 DB 13 3 DB 14 37 DB 14 4 DB 15 38 DB 15 5 DB P1 39 DB P1 6 DB 0 40 DB 0 7 DB 1 41 DB 1 8 DB 2 42 DB 2 9 DB 3 43 DB 3 10 DB 4 44 DB 4 11 DB 5 45 DB 5 12 DB 6 46 DB 6 13 DB 7 47 DB 7 14 DB P 48 DB P 15 GROUND 49 GROUND 16 DIFFSENS 50 GROUND 17 TERMPWR 51 TERMPWR 18 TERMPWR 52 TERMPWR 19 RESERVED 53 RESERVED 20 GROUND 54 GROUND 21 ATN 55 ATN 22 GROUND 56 GROUND 23 BSY 57 BSY 24 ACK 58 ACK 25 RST 59 RST 26 MSG 60 MSG 27 SEL 61 SEL 28 C D 62 C D 29 REQ 63 REQ 30 1 0 64 0 31 DB 8 65 DB 8 32 DB 9 66 DB 9 33 DB 10 67 DB 10 34 DB 11 68 DB 11 2 19 SUPER PSTDLR User s Manual 2 11 Installing Software Drivers After the OS Operating System has been installed you must install the software drivers The necessary drivers are all included on the Supermicro CD that came packaged with your motherboard After inserting this CD into your CDROM drive the display shown in Figure 2 6 should appear If this display does not appear click on the My Computer icon and then on the icon representing your CDROM drive Finally double click on the S Setup icon S SUPERMICRO ServerWorks ServerSet III HE amp LE Chipset Win2000 x Video driver ATI p SUPERMICR Build Network Card disk Inte
2. 3 If you still cannot resolve the problem include the following information when contacting Super Micro for technical support Motherboard model and PCB revision number BIOS release date version this can be seen on the initial display when your system first boots up System configuration An example of a Technical Support form is on our web site at http www supermicro com techsupport contact_support htm 4 Distributors For immediate assistance please have your account number ready when placing a call to our technical support department We can be reached by e mail at lt support supermicro com gt or by fax at 408 503 8019 3 3 Frequently Asked Questions Question What are the various types of memory that the SUPER P3TDLR motherboard can support Answer The SUPER P3TDLR has four DIMM slots that support 168 pin registered DIMMs with ECC only Note that since the motherboard has a 133 MHz memory bus both PC133 and PC100 memory are fully supported How ever since the memory bus is synchronized to the front side bus speed you cannot use PC100 with a 133 MHz FSB Also using PC133 with a 100 MHz FSB will result in 100 MHz memory speed operation Note Unbuf fered SDRAM and non ECC memory are not supported Question How do update my BIOS Answer It is recommended that you do not upgrade your BIOS if you are experiencing no problems with your system Updated BIOS files are located on our web site a
3. The floppy connector is located Pin Number Function Pin Number Function i i i 1 GND 2 FDHDIN on J26 and requires a 34 pin rib H GND Rana bon cable for operation See 5 Key 6 FDEDIN n NON 7 GND 8 Index Table 2 28 for pin definitions 9 GND 10 Motor Enable 11 GND 12 Drive Select B 13 GND 14 Drive Select A 15 GND 16 Motor Enable 17 GND 18 DIR 19 GND 20 STEP 21 GND 22 Write Data 23 GND 24 Write Gate 25 GND 26 Track 00 27 GND 28 Write Protect 29 GND 30 Read Data 31 GND 32 Side 1 Select 33 GND 34 Diskette Table 2 29 IDE Connectors IDE Connector Pin Definitions J23 J24 Pin Number Function Pin Number Function There are no jumpers to config 1 Reset IDE 2 GND 3 Host Data 7 Host Data 8 ure the onboard IDE connectors 3 HostDetas lt 8 Host Data J23 and J24 Refer to Table 2 7 Host Data 5 8 Host Data 10 9 Host Data 4 10 Host Data 11 29 for pin definitions 11 Host Data 3 12 Host Data 12 13 Host Data 2 14 Host Data 13 15 Host Data 1 16 Host Data 14 17 Host Data 0 18 Host Data 15 19 GND 20 Key 21 DRQ3 22 GND 23 O Write 24 GND 25 I O Read 26 GND 27 IOCHRDY 28 BALE 29 DACK3 30 GND 31 IRQ14 32 lOCS16 33 Addr 1 34 GND 35 Addr 0 36 Addr 2 37 Chip Select 0 38 Chip Select 1 39 Activity 40 GND 2 18 Chapter 2 Installation Ultra160 SCSI Connector Refer to Table 2 30 for pin definitions for the Ultra160 SCSI connector located at JA1 Table 2 30 68 pin Ultra160 SCSI Connectors JA1
4. 6 Check the power supply voltage 115V 230V switch Losing the System s Setup Configuration 1 Check the setting of jumper JBT1 Ensure that you are using a high quality power supply A poor quality power supply may cause the System to lose the CMOS setup information Refer to page 1 13 for details on recommended power supplies 2 The battery on your motherboard may be old Check to verify that it still supplies 3VDC If it does not replace it with a new one 3 If the above steps do not fix the Setup Configuration problem contact your vendor for repairs 3 2 Technical Support Procedures Before contacting Technical Support please take the following steps Also note that as a motherboard manufacturer Super Micro does not sell directly to end users so it is best to first check with your distributor or reseller for troubleshooting services They should know of any possible problem s with the specific system configuration that was sold to you 1 Please go through the Troubleshooting Procedures and Frequently Asked Question FAQ sections in this chapter or see the FAQs on our 32 Chapter 3 Troubleshooting web site lt http www supermicro com techsupport htm gt before con tacting Technical Support 2 BIOS upgrades can be downloaded from our web site at lt http www supermicro com techsupport download htm gt Note Not all BIOS can be flashed depending on the modifica tions to the boot block code
5. Onboard SCSI This option allows you to enable the onboard SCSI The settings are En abled and Disabled Power Lost Control This option determines how the system will respond when power is reap plied after a power loss condition Always On means the system will automatically start up when power is reapplied Always Off means you must push the main power button to restart the system after power is restored Processor Configuration This option enables or disables the AMIBIOS to detect the serial number s of the processor s The settings are Disabled and Enabled System Health Monitor The BIOS continuously monitors the health of your system by measuring certain voltage levels and temperatures System Overheat Warning This option allows you to Enable or Disable a system overheat warning signal used to notify you in the event of a dangerous rise in heat levels Overheat Warning Temperature This option allows you to specify the temperature threshold that when exceeded will trigger the overheat warning alarm The rest of the Health Monitor menu lists various voltages and temperatures as they are currently being measured These include CPU temperature CPU voltage the roms of the fans CPU chassis and thermal control as well as the primary voltage levels used by the system 3 3V 5V 12V and 12V 4 14 Chapter 7 BIOS Setup 4 5 Chipset Setup Choose Chipset Setup from the AMIBIOS Setup Utility m
6. speed meaning you can not use PC100 with a 133 MHz FSB Using PC133 with a 100 MHz FSB will result in 100 MHz memory operation 2 Memory Slots The P3TDLR has four DIMM slots There is no need to install the DIMM modules in pairs The P3TDLR is not sensitive to the installed position of the memory DIMMs in the DIMM slots 3 Installing memory modules Insert each DIMM module parallel to its slot s guide rails Pay attention to the orientation of the two notches along the bottom of the module to prevent inserting a DIMM module incorrectly Gently press down on the DIMM module until it snaps into place in the slot see Figure 5 4 4 Memory Position The capacity of the memory modules can be mixed however the memory speeds should all be the same for best results Figure 2 4 Side View of DIMM Installation into Slot Note Notch should align rece i To Install Insert module vertically and press down until it snaps into place Pay attention to the bottom notches To Remove Use your thumbs to gently push each release tab outward to free the DIMM from the slot 2 7 SUPER PSTDLR User s Manual Figure 2 5 Side View of DIMM Installation into Slot Top View of DIMM Slot Release Tab IL IL Release Tab To Remove Use your thumbs to gently push each release tab outward This should release the DIMM from the slot 2 8 Chapter 2 Installation 2 7 Connector Definitions Power Su
7. Enable Disable 3b for pin definitions Jumper Settings JP12 Jumper Definition Position Closed Enabled Open Disabled SUPER P3TDLR User s Manual Power LED Table 2 4a Overheat LED Pin Definitions The Power LED connection is lo JF1 cated on pins 15 and 16 of JF1 Pin m When illuminated this LED indi TIRES cates that power is applied to the 1 z Table 2 4b system There is also a 3 pin PWR_LED Pin header for the Power LED located Pe HORE JES at JP61 See Tables 2 4a and 2 Pin A Is Number Definition 4b for pin definitions and Figure 2 1 25V 2 for pin locations s E HDD LED Table 2 5 IDE Hard Disk Drive LED Pin Definitions The Hard Disk Drive LED connec JF1 tion is located on pins 13 and 14 Pin Definition of JF1 This provides an indica ee tion of IDE disk activity on the con 14 trol panel See Table 2 5 for pin definitions and Figure 2 2 for pin locations NIC1 LED Table 2 6 NIC1 LED The Network Interface Controller 1 iV RET LED connection is located on pins Pin 11 and 12 of JF1 This header is TUE Gein lon used to indicate network activity 12 on LAN Ethernet port 1 See Table 2 6 for pin definitions and Figure 2 2 for pin locations NIC2 LED Table 2 7 NIC2 The Network Interface Controller 2 Ru d LED connection is located on pins 5m 9 and 10 of JF1 This header is Number De
8. JF1 Figure 2 1 Control Panel Header Pins JP61 Power LED pins 1 3 WS Power LED pins 15 16 HDD LED pins 13 14 NIC1 LED pins 11 12 NIC2 LED pins 9 10 Overheat LED pins 7 8 X Key Reset Button pins 3 4 Power Button pins 1 2 2 1 JF1 Chapter 2 Installation 2 4 I O Ports The I O ports are color coded in conformance with the PC 99 specification See Figure 2 2 below for the colors and locations of the various I O ports Mouse Green LAN1 LAN2 ms mu AAA SF DEF Keyboard USB COM Port VGA Graphics Purple Ports Turquoise Port Blue Black Note The COM2 Port is a header on the motherboard located next to the mounting hole between the Super I O chip and the RAGE XL chip Figure 2 2 1 O Ports 2 5 Installing Processors Avoid placing direct pressure to the top of the pro cessor package Always connect the power cord last and always remove it before adding removing or changing any hardware components 1 Installing the FCPGA processors The P3TDLR has two 370 pin sockets which support single or dual Intel Pentium Ill FCPGA 500 MHz 1 26 GHz processors and single or dual low power Pentium Ill processors at front bus speeds of 133 and 100 MHz Lift the lever on the FCPGA socket and insert the processor with the heat sink attached keeping the notched corner oriented toward pin one on the socket Make sure the processor is fully seated in the socket and then close
9. PC Health Monitoring Seven onboard voltage monitors for CPU core chipset voltage 5V and 12V Fan status monitor with firmware software on off control Environmental temperature monitor and control CPU fan auto off in sleep mode Power up mode control for recovery from AC power loss System overheat LED and control System resource alert 1 7 SUPER P3TDLR User s Manual ACPI PC 98 Features Microsoft OnNow Slow blinking LED for suspend state indicator Main switch override mechanism External modem ring on Onboard 1 O AIC 7892 for single channel Ultra160 SCSI 66 MHz SCSI supported Integrated ATI Rage XL Graphics Controller Intel 82559 for integrated onboard Ethernet 2 EIDE bus master interfaces support Ultra DMA 33 1 floppy port interface up to 2 88 MB 2 Fast UART 16550A compatible serial ports 1 EPP Enhanced Parallel Port and ECP Extended Capabilities Port supported parallel port PS 2 mouse and PS 2 keyboard ports 4 USB Universal Serial Bus ports Other Selectable CPU and chassis fan speed control set in BIOS Internal external modem ring on Recovery from AC power loss control Wake on LAN WOL Multiple FSB clock frequency selections set in BIOS CD Diskette Utilities BIOS flash upgrade utility Device Drivers Dimensions SUPER PSTDLR Full ATX 12 x 10 5 305 x 267 mm Chapter 1 Introduction 1 2 Chipset Overview The ServerWorks ServerSet III LE is a high
10. Port2 IRQ Parallel Port Address Parallel Port IRQ Parallel Port Mode ECP Mode DMA Channel Select Screen Select Item Change Option General Help F10 Save and Exit ESC Exit V02 03 C Copyright 1985 2000 American Megatrends Inc The Super IO Configuration includes the following items Serial Port 1 Address This option specifies the base I O port address of serial port 1 The set tings for this item include Disabled 3F8 and 3E8 and 2E8 Select the de sired setting and then press Enter Serial Port 1 IRQ This option specifies the Interrupt Request address of serial port 1 The settings for this item include Disabled 4 and 3 Select the desired setting and then press Enter Serial Port 2 Address This option specifies the base I O port address of serial port 2 The settings for this item include Disabled 2F8 3E8 and 2E8 Select the desired setting and then press Enter 4 5 SUPER P3TDLR User s Manual Serial Port 2 IRQ This option specifies the Interrupt Request address of serial port 2 The settings for this item include Disabled 4 and 3 Select the desired setting and then press Enter Parallel Port Address This option specifies the I O address used by the parallel port The settings for this item include Disabled 378 278 and 3BC Select your setting and then press Enter Parallel Port IRQ This option allows the user to set the Parallel Port IRQ The settings for this item incl
11. Setup options are described in this section The Main BIOS Setup screen is displayed below BIOS SETUP UTILITY Main Advanced Chipset PCIPnP Power Boot Security Exit AMIBIOS Version 07 00xx BIOS Build Date xXx XX XX BIOS ID SSM70626 Processor Type 1 PentiumIII Processor Speed 933MHz System Memory 256MB System Time 10 10 00 System Date Thu 08 24 00 Select Screen Select Item Change Field Select Field General Help Save and Exit Exit V02 03 C Copyright 1985 2000 American Megatrends Inc Use the lt Up Down gt arrow keys or the Tab key to move between the different settings in the above menu When the items System Time and System Date are highlighted type in the correct time date in the time field and then press Enter The date must be entered in MM DD YY format The time is entered in HH MM SS format The time is in also 24 hour format For example 5 30 a m appears as 05 30 00 and 5 30 p m as 17 30 00 Press the lt ESC gt key to exit the Main Menu and use the lt Left Right gt arrow keys to enter the other categories of BIOS settings The next section is describs in detail how to navigate through the menus Note Items displayed in gray are preset and cannot be selected Items with a blue arrow are commands not options i e Discard Changes 4 3 SUPER P3TDLR User s Manual 4 4 Advanced BIOS Setup Choose Advanced BIOS Setup from the AMIBIOS Setup Utility main
12. been properly installed by looking for it in the Device Manager which is located in the Control Panel in Windows Microsoft OnNow The OnNow design initiative is a comprehensive system wide approach to system and device power control OnNow is a term for a PC that is always on but appears to be off and responds immediately to user or other re quests Slow Blinking LED for Suspend State Indicator When the CPU goes into a suspend state the chassis power LED will start blinking to indicate that the CPU is in suspend mode When the user presses any key the CPU will wake up and the LED will automatically stop blinking and remain on Main Switch Override Mechanism When an ATX power supply is used the power button can function as a system suspend button When the user depresses the power button the system will enter a SoftOff state The monitor will be suspended and the hard drive will spin down Depressing the power button again will cause the whole system to wake up During the SoftOff state the ATX power supply provides power to keep the required circuitry in the system alive In case the system malfunctions and you want to turn off the power just depress and hold the power button for 4 seconds The power will turn off and no power will be provided to the motherboard External Modem Ring On Wake up events can be triggered by a device such as the external modem ringing when the system is in the SoftOff state Note that external mode
13. circuitry runs independently from the CPU It can continue to monitor for overheat conditions even when the CPU is in sleep mode Once it detects that the CPU temperature is too high it will automatically turn on the thermal control fan to prevent any overheat damage to the CPU The onboard chassis thermal circuitry can monitor the overall system temperature and alert users when the chassis temperature is too high CPU Fan Auto Off in Sleep Mode The CPU fan activates when the power is turned on It can be turned off when the CPU is in sleep mode When in sleep mode the CPU will not run at full power thereby generating less heat Chapter 1 Introduction CPU Overheat LED and Control This feature is available when the user enables the CPU overheat warning function in the BIOS This allows the user to define an overheat tempera ture When this temperature is exceeded both the overheat fan and the warning LED are triggered System Resource Alert This feature is available when used with Intel s LANDesk Client Manager op tional It is used to notify the user of certain system events For example if the system is running low on virtual memory and there is insufficient hard drive space for saving the data you can be alerted of the potential problem Hardware BIOS Virus Protection The system BIOS is protected by hardware so that no virus can infect the BIOS area The user can only change the BIOS content through the flash utilit
14. enter Setup and the BIOS setting can be adjusted to fix the problem This normally happens when upgrading the hardware and not setting the BIOS to recognize it Press lt Delete gt Message Display This option tells the system to display or not display the Hit Delete to Enter Setup message The settings are Enabled and Disabled Internal Cache This option is for enabling or disabling the internal CPU L1 cache Settings include Disabled Write Thru and Write Back and Reserved Disabled This option prevents the system from using the internal CPU L1 cache This setting should be used to slow the computer system down or to trouble shoot error messages Write Thru This option allows the computer system to use the internal CPU L1 cache as Write Though cache Write Through cache is slower than Write Back cache It performs write operations to the internal L1 CPU cache and system memory simultaneously Write Back This option allows the computer system to use the internal CPU L1 cache as Write Back cache Write Back cache is faster than Write Through cache Write Back cache is a caching method in which modifications to data in the cache aren t copied to the cache source until absolutely necessary Write back caching is available on all CPUs supported by this BIOS With these CPUs write operations stored in the L1 cache aren t copied to main memory until absolutely necessary Write Back cache is the default setting External Cache This opt
15. l O shield The P3TDLR requires a chassis big enough to support a 12 x 10 motherboard such as Supermicro s SC810 1U rackmount Make sure that the I O ports on the motherboard properly align with their respective holes in the I O shield at the back of the chassis 2 Mounting the motherboard onto the motherboard tray Carefully mount the motherboard to the motherboard tray by aligning the board holes with the raised metal standoffs that are visible on the bottom of the chassis Insert screws into all the mounting holes on your motherboard that line up with the standoffs and tighten until snug if you screw them in too tight you might strip the threads Metal screws provide an electrical contact to the motherboard ground to provide a continuous ground for the system 2 2 Chapter 2 Installation 2 3 Connecting Cables Now that the motherboard is installed the next step is to connect the cables to the board These include the data ribbon cables for the peripherals and control panel and the power cables Connecting Data Cables The ribbon cables used to transfer data from the peripheral devices have been carefully routed to prevent them from blocking the flow of cooling air that moves through the system from front to back If you need to disconnect any of these cables you should take care to keep them routed as they were originally after reconnecting them make sure the red wires connect to the pin 1 locations The following d
16. might not yet be recorded in this manual Refer to the Manual Download area of our web site for any changes to BIOS that are not reflected in this manual System BIOS The BIOS is the Basic Input Output System used in all IBM PC XT AT and PS 2 compatible computers The BIOS ROM stores the system param eters such as amount of memory type of disk drives and video displays etc BIOS ROM requires very little power When the computer is turned off a back up battery provides power to the BIOS ROM enabling it to retain the system parameters Each time the computer is powered on the computer is then configured with the values stored in the BIOS ROM by the system BIOS which gains control when the computer is powered on How To Change the Configuration Data The configuration data that determines the system parameters may be changed by entering the BIOS Setup utility This Setup utility can be ac cessed by pressing lt Delete gt at the appropriate time during system boot Starting the Setup Utility Normally the only visible POST Power On Self Test routine is the memory test As the memory is being tested press the lt Delete gt key to enter the main menu of the BIOS Setup utility From the main menu you can access the other setup screens such as the Chipset and Power menus Section 4 3 gives detailed descriptions of each parameter setting in the Setup utility An AMIBIOS identification string is displayed at the left bott
17. prevent any writing to your floppy diskette The settings are Enabled and Disabled The Enabled setting is effective only if the device is accessed through BIOS Floppy Drive Seek Use this option to Enable or Disable the floppy seek routine on bootup Boot Settings Configuration Quick Boot This option allows the BIOS to skip certain tests that are normally performed on boot up You can disable the option to speed up boot time The settings are Disabled and Enabled Quiet Boot If Disabled this option will cause the normal POST messages to be dis played upon setup When Enabled the OEM logo is displayed instead of the POST messages The default setting is Disabled Add On ROM Display Mode Set this option to display add on ROM read only memory messages The settings for this option are Force BIOS and Keep Current Force BIOS allows the computer to force a third party BIOS to display during system boot Keep Current has the system display AMIBIOS information on bootup 4 10 Chapter 7 BIOS Setup BootUp Num Lock This option is used to select the status of the Number Lock function on your keyboard on bootup The settings are On and Off BootUp CPU Speed This option is used set the CPU speed to either High or Low PS 2 Mouse Support This option specifies whether a PS 2 Mouse will be supported Settings are Enabled and Disabled Typematic Rate Set this option to select the rate at which the computer repea
18. 10 11 12 14 and 15 The Auto setting lets the BIOS assign the IRQ PCI Slot 2 IRQ Preference This option allows you to change the IRQ for PCI slot 2 The settings are Auto 3 4 5 7 9 10 11 12 14 and 15 The Auto setting lets the BIOS assign the IRQ Onboard VGA IRQ Preference This option allows you to change the IRQ for the onboard VGA The set tings are Auto 3 4 5 7 9 10 11 12 14 and 15 The Auto setting lets the BIOS assign the IRQ Onboard LAN1 IRQ Preference This option allows you to change the IRQ for the onboard LAN1 The settings are Auto 3 4 5 7 9 10 11 12 14 and 15 The Auto setting lets the BIOS assign the IRQ Onboard LAN2 IRQ Preference This option allows you to change the IRQ for the onboard LAN2 The settings are Auto 3 4 5 7 9 10 11 12 14 and 15 The Auto setting lets the BIOS assign the IRQ PCI Slot 3 IRQ Preference This option allows you to change the IRQ for PCI slot 3 The settings are Auto 3 4 5 7 9 10 11 12 14 and 15 The Auto setting lets the BIOS assign the IRQ PCI Slot 4 IRQ Preference This option allows you to change the IRQ for PCI slot 4 The settings are Auto 3 4 5 7 9 10 11 12 14 and 15 The Auto setting lets the BIOS assign the IRQ 4 19 SUPER P3TDLR User s Manual Onboard SCSI IRQ Preference This option allows you to change the IRQ for the onboard SCSI The set tings are Auto 3 4 5 7 9 10 11 12 14 and 15 The
19. Auto setting lets the BIOS assign the IRQ IRQ3 IRQ 4 IRQ5 IRQ 7 IRQ 9 IRQ 10 IRQ 11 IRQ 14 IRQ 15 4 20 Chapter 7 BIOS Setup 4 7 Power Setup Choose Power Setup from the AMIBIOS Setup main menu All Power Setup options are described in this section The Power Setup screen is shown below BIOS SETUP UTILITY Main Advanced Chipset PCIPnP Power Boot Security Exit ACPI Aware O S Yes Power Management Enabled Power Button Mode On Off Sleep Button Enable Suspend Green PC Monitor Power State StandBy Video Power Down Mode Suspend Hard Disk Power Down Mode Disabled Inactivity Timer Off Suspend Timeout Minutes OEE IRQ1 Monitor IRQ3 Ignore IRQ4 Ignore amp Select Screen IRQS Ignore TL Select Item IRO6 Ignore Change Option IRQ7 Ignore Fl General Help IRQ9 Ignore F10 Save and Exit IRQ1O Ignore ESC Exit IRQ11 Ignore IRQ12 Monitor IRO14 Monitor IRQ15 Ignore V02 03 C Copyright 1985 2000 American Megatrends Inc ACPI Aware O S This option allows the system to utilize Intel s ACPI Advanced Configuration and Power Interface specification Settings are No and Yes DOS Windows 3 x and Windows NT are examples of non ACPI aware oper ating systems Windows 958 Windows 98 and Windows 200060 are examples of ACPI aware operating systems Power Management This option allows you to select using APM Advanced Power Manage ment The settings are Disabled and Enabled
20. BIOS is not in control such as during memory count the first screen that appears when the system is turned on the momentary on off switch must be held for more than four seconds to shut down the system This feature is required to implement the ACPI features on the motherboard 3 4 Returning Merchandise for Service A receipt or copy of your invoice marked with the date of purchase is required before any warranty service will be rendered You can obtain service by calling your vendor for a Returned Merchandise Authorization RMA number When returning to the manufacturer the RMA number should be prominently displayed on the outside of the shipping carton and mailed prepaid or hand carried Shipping and handling charges will be ap plied for all orders that must be mailed when service is complete This warranty only covers normal consumer use and does not cover dam ages incurred in shipping or from failure due to the alteration misuse abuse or improper maintenance of products During the warranty period contact your distributor first for any product problems SUPER P3TDLR User s Manual NOTES 3 6 Chapter 7 BIOS Setup Chapter 4 BIOS 4 1 Introduction This chapter describes the AMIBIOS for the SUPER P3TDLR The AMI ROM BIOS is stored in a Flash EEPROM and can be easily upgraded using a floppy disk based application Note Due to periodic changes to the BIOS some settings may have been added or deleted and
21. County of Santa Clara shall be the exclusive venue for the resolution of any such disputes Supermicro s total liability for all claims will not exceed the price paid for the hardware product Unless you request and receive written permission from SUPER MICRO COMPUTER you may not copy any part of this document Information in this document is subject to change without notice Other products and companies referred to herein are trademarks or registered trademarks of their respective companies or mark holders Copyright 2001 by SUPER MICRO COMPUTER INC All rights reserved Printed in the United States of America Preface Preface About This Manual This manual is written for system integrators PC technicians and knowledgeable PC users It provides information for the installation and use of the SUPER P3TDLR motherboard The SUPER P3TDLR supports single or dual Pentium Ill FCPGA 500 MHz 1 26 GHz processors including low power Pentium III processors at front side bus speeds of 133 and 100 MHz Please refer to the support section of our web site http www supermicro com TechSupport htm for a complete listing of supported processors Intel FCPGA processors are housed in a 370 pin package Manual Organization Chapter 1 includes a checklist of what should be included in your mainboard box describes the features specifications and performance of the SUPER P3TDLR mainboard and provides detailed information about the chipse
22. Enabled allows the drive to be used normally read write and erase functions can all be performed Disabled prevents the hard disk from being erased This function is effective only when the device can be accessed through BIOS ATA PI Detect Timeout Set this option to stop the system search for ATAPI devices within the specified number of seconds The options are 0 5 10 15 20 25 30 and 35 seconds Most ATA disk drives can be detected within 5 seconds ATA PI 80Pin Cable Detection This option selects the mechanism for detecting the 80 pin ATA PI cable Options include Host amp Device Host and Device Host This option uses the motherboard onboard IDE controller to detect the type of IDE cable used Device This option uses the IDE disk drive to detect the type of IDE cable used Host amp Device This option uses both the motherboard onboard IDE controller and IDE disk drive to detect the type of IDE cable used 4 9 SUPER P3TDLR User s Manual Floppy Configuration Floppy A Use this option to specify which of floppy drive you have installed in the A drive The settings are Disabled 360 KB 5 1 4 1 2 MB 5 1 4 720 KB 3 1 2 1 44 MB 3 1 2 and 2 88 MB 3 1 2 Floppy B Use this option to specify which of floppy drive you have installed in the B drive The settings are Disabled 360 KB 5 1 4 1 2 MB 5 1 4 720 KB 3 1 2 1 44 MB 3 1 2 and 2 88 MB 3 1 2 Diskette Write Protect This option allows you to
23. I operation See Table 2 25 for jumper settings Onboard VGA Enable Disable Jumper JP62 allows you to enable or disable the onboard VGA The normal default position is open to enable VGA operation See Table 2 26 for jumper settings Watchdog Reset Enable Disable Jumper JP210 allows you to en able or disable the Watchdog func tion The normal default position is open to disable Watchdog See Table 2 27 for jumper settings 2 17 Table 2 25 SCSI Enable Disable Jumper Settings JP1 Jumper Position Definition Pin 1 2 Enabled Pin 2 3 Disabled Table 2 26 Onboard VGA Enable Disable Jumper Settings JP62 Jumper Position Definition Closed Enabled Open Disabled Table 2 27 Watchdog Reset Enable Disable Jumper Settings JP62 Jumper Position Definition Closed Enabled Open Disabled SUPER PSTDLR User s Manual 2 10 Floppy Hard Disk and SCSI Connections Be aware of the following when connecting the floppy and hard disk drive cables A red mark on a wire typically designates the location of pin 1 A single floppy disk drive ribbon cable has 34 wires and two connectors to provide for two floppy disk drives The connector with the twisted wires always connects to drive A and the connector that does not have twisted wires always connects to drive B Floppy Connector Table 2 28 Floppy Connector Pin Definitions J26
24. M gains control has been completed The adaptor ROM check is next 98 The adaptor ROM had control and has now returned control to BIOS POST Performing any required processing after the option ROM returned control B 7 SUPER P3TDLR User s Manual Check Point 99 9A 9B 9D 9E A3 A4 A5 A7 A8 Description Any initialization required after the option ROM test has been completed Configuring the timer data area and printer base address next Set the timer and printer base addresses Setting the RS 232 base address next Returned after setting the RS 232 base address Performing any required initialization before the Coprocessor test next Required initialization before the Coprocessor test is over Initializing the Coprocessor next Coprocessor initialized Performing any required initialization after the Coprocessor test next Initialization after the Coprocessor test is complete Checking the extended keyboard keyboard ID and Num Lock key next Issuing the keyboard ID command next Displaying any soft errors next The soft error display has completed Setting the keyboard typematic rate next The keyboard typematic rate is set Programming the memory wait states next Memory wait state programming is over Clearing the Screen and enabling parity and the NMI next NMI and parity enabled Performing any initialization required before passing control to the adaptor ROM at E000 n
25. Note The Auto setting allows the CPU to set the speed Table 2 20 PCI 64 Speed Setting Jumper Settings JP13 Jumper Position Definition Open 66 MHz Closed 33 MHz SUPER P3TDLR User s Manual CMOS Clear Table 2 21 CMOS Clear Jumper Settings Refer to Table 2 21 for setting JBT1 JBT1 to clear CMOS Always re Jumper m Position Definition move the AC power cord from the 1 2 Normal system before clearing CMOS zm sled Over Heat Alarm Table 2 22 Over Heat Alarm Jumper JP7 allows you to enable Jumper Settings JP7 or disable the over heat alarm ane Refer to Table 2 22 for jumper set Position Definition A Open Disabled tings Closed Enabled LAN 1 Enable Disable Table 2 23 LAN 1 Enable Disable Jumper Settings JP8 Use jumper JP8 to enable or disable the onboard LAN 1 Ethernet port si a eee The default setting is enabled See had od Table 2 23 for jumper settings LAN 2 Enable Disable Tabia LAN 2 Enable Disable T t Jumper Settings JP24 Use jumper JP24 to enable or disable the onboard LAN 2 Ethernet port Jumper Um Position Definition The default setting is enabled See Open Enabled Closed Disabled Table 2 24 for jumper settings 2 16 Chapter 2 Installation SCSI Enable Disable Jumper JP1 allows you to enable or disable all onboard SCSI The normal default position is open to enable SCS
26. Patterns written in base memory Determining the amount of memory below 1 MB next The amount of memory below 1 MB has been found and verified Determining the amount of memory above 1 MB memory next The amount of memory above 1 MB has been found and verified Checking for a soft reset and clearing the memory below 1 MB for the soft reset next If this is a power on situation going to checkpoint 4Eh next B 4 Appendix B AMIBIOS POST Diagnostic Error Messages Check Point 4C 4D 4E 4F 50 51 52 57 59 Description The memory below 1 MB has been cleared via a soft reset Clearing the memory above 1 MB next The memory above 1 MB has been cleared via a soft reset Saving the memory size next Going to checkpoint 52h next The memory test started but not as the result of a soft reset Displaying the first 64 KB memory size next The memory size display has started The display is updated during the memory test Performing the sequential and random memory test next The memory below 1 MB has been tested and initialized Adjusting the displayed memory size for relocation and shadowing next The memory size display was adjusted for relocation and shadowing Testing the memory above 1 MB next The memory above 1 MB has been tested and initialized Saving the memory size information next The memory size information and the CPU registers are saved Entering real mode next Shutdown was succe
27. PnP configuration data in the BIOS to be cleared on the next boot up Choosing the No setting does not force PnP data to be cleared on the next boot PCI Latency Timer This option specifies the latency timing of the PCI clocks for all PCI devices Settings include 32 64 96 128 160 192 224 and 248 PCI clocks Allocate IRQ to PCI VGA This option lets you allocate an interrupt request IRQ to the PCI VGA adapter card if used The settings are Yes and No Palette Snooping When enabled this option informs PCI devices that an ISA graphics device is installed The settings are Disabled and Enabled This does not neces sarily indicate a physical ISA adapter card The graphics chipset can be mounted on a PCI card Always check with your adapter card manuals first before modifying the default settings in the BIOS PCI IDE BusMaster The settings for this option are Disabled and Enabled Enable to specify that the IDE controller on the PCI bus has bus mastering capabilities OffBoard PCI ISA IDE Card The settings for this option are Auto PCI Slot 1 PCI Slot 2 PCI Slot 3 PCI Slot 4 PCI Slot 5 and PCI Slot 6 USB Function The settings for this option are Disabled and Enabled Disabled prevents the use of the USB ports and Enabled allows the use of the USB ports 4 18 Chapter 7 BIOS Setup PCI Slot 1 IRQ Preference This option allows you to change the IRQ for PCI slot 1 The settings are Auto 3 4 5 7 9
28. Power Button Mode This option specifies how the external power button on the computer chas sis functions When set to On Off depressing the power button turns the computer on or off When set to Suspend depressing the power button places the computer in Suspend mode or Full On power mode The Standby setting places the computer in Standby or Full On mode 4 21 SUPER P3TDLR User s Manual Sleep Button Enable This option is to enable the use of the sleep button The settings are Suspend and Disabled Green PC Monitor Power State This option specifies the power state that a green PC compliant monitor enters when BIOS places it in a power saving state after the specified period of display inactivity has expired The settings include Standby Sus pend and Off Video Power Down Mode This option specifies the power state that the VGA video subsystem enters after the specified period of display inactivity has expired The settings include Disabled Standby and Suspend Hard Disk Power Down Mode This option specifies the power conserving state that the hard disk drive s enters after the specified period of inactivity has expired The settings include Disabled Standby and Suspend Inactivity Timer This option specifies the length of hard disk inactivity time that should expire before entering the power conserving state The settings include Off 1 5 10 20 30 60 and 120 minutes Suspend Timeout This option speci
29. SUPER SUPER P3TDLR USER S MANUAL Revision 1 0a The information in this User s Manual has been carefully reviewed and is believed to be accurate The vendor assumes no responsibility for any inaccuracies that may be contained in this document makes no commitment to update or to keep current the information in this manual or to notify any person or organization of the updates Please Note For the most up to date version of this manual please see our web site at www supermicro com SUPERMICRO COMPUTER reserves the right to make changes to the product described in this manual at any time and without notice This product including software if any and documentation may not in whole or in part be copied photocopied reproduced translated or reduced to any medium or machine without prior written consent IN NO EVENT WILL SUPERMICRO COMPUTER BE LIABLE FOR DIRECT INDIRECT SPECIAL INCIDENTAL OR CONSEQUENTIAL DAMAGES ARISING FROM THE USE OR INABILITY TO USE THIS PRODUCT OR DOCUMENTATION EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGES IN PARTICULAR THE VENDOR SHALL NOT HAVE LIABILITY FOR ANY HARDWARE SOFTWARE OR DATA STORED OR USED WITH THE PRODUCT INCLUDING THE COSTS OF REPAIRING REPLACING INTEGRATING INSTALLING OR RECOVERING SUCH HARDWARE SOFTWARE OR DATA Any disputes arising between manufacturer and customer shall be governed by the laws of Santa Clara County in the State of California USA The State of California
30. The settings for the 3rd Boot Device are Removable Device ATAPI CDROM Hard Drive and Disabled Hard Disk Drives Use this screen to view the hard drives that have been auto detected or entered manually on your system Removable Devices Use this screen to view the removable devices that have been auto de tected or entered manually on your system ATAPI CDROM Drives Use this screen to view the ATAPI CDROM drives that have been auto detected or entered manually on your system 4 25 SUPER P3TDLR User s Manual 4 9 Security Setup Choose Security Setup from the AMIBIOS Setup main menu All Security Setup options are described in this section The Security Setup screen is shown below BIOS SETUP UTILITY Main Advanced Chipset PCIPnP Power Boot Security Install or Change the Supervisor Password Not Installed password User Password Not Installed Change Supervisor Password Change User Password Clear User Password Boot Sector Virus Protection Disabled Select Screen Select Item Go to Sub Scree General Help Save and Exit Exit V02 03 C Copyright 1985 2000 American Megatrends Inc Supervisor Password User Password AMIBIOS provides both Supervisor and User password functions If you use both passwords the Supervisor password must be set first The system can be configured so that all users must enter a password every time the system boots or when AMIBIOS Setup is
31. UPER P3TDLR User s Manual Pentium Ill Pentium III FCPGA FCPGA CPU CPU 133 100 MHz Host Bus PC133 PC100 Registered 64 bit 66 33 MHz PCI sil H DIMMS CNB30LE 133 100 MHz Host North Bridge Ultra160 SCSI Slot 33 MHz HHH OSB4 OSB5 32 bit USB 1 5 Mb sec South Bridge PCI Slots Ports ATA33 IDE Ports BIOS 4Mb Flash ROM Figure 1 9 ServerWorks LE Chipset System Block Diagram Note This is a general block diagram See next page for details on actual processor support and PCI slots for your motherboard 1 6 Chapter 1 Introduction Features of the SUPER P3TDLR CPU Single or dual Intel Pentium III FCPGA 500 MHz 1 26 GHz processors and single or dual low power Pentium III processors at front bus speeds of 133 and 100 MHz Note Please refer to the support section of our web site for a complete listing of supported processors http www supermicro com TechSupport htm Memory Four 168 pin DIMM sockets supporting up to 4 GB registered ECC DIMMs Note The memory and front side bus speeds are synchronized If PC133 memory is used with a 100 MHz FSB the memory will run at 100 MHz See page 3 3 for details Chipset ServerWorks ServerSet Ill LE see page 1 19 for details Expansion Slots Two 64 bit 66 33 MHz PCI slots Two 32 bit 33 MHz PCI slots BIOS 4 Mb AMI Flash BIOS APM 1 2 DMI 2 1 PCI 2 2 ACPI 1 0 Plug and Play PnP
32. XitS STUP Aaa a SCRI UP 4 28 Appendices Appendix A BIOS Error Beep Codes and Messages eeees A 1 Appendix B AMIBIOS Post Checkpoint Codes eee B 1 vi Chapter 1 Introduction Chapter 1 Introduction 1 1 Overview Checklist Congratulations on purchasing your computer motherboard from an ac knowledged leader in the industry Supermicro boards are designed with the utmost attention to detail to provide you with the highest standards in quality and performance Please check that the following items have all been included with your motherboard If anything listed here is damaged or missing contact your retailer One 1 Supermicro Mainboard Two 2 Supermicro Heatsinks Retail Only One 1 ribbon cable for IDE devices One 1 floppy ribbon cable for 1 5 25 inch floppy and 2 3 5 inch floppy drives One 1 I O backpanel shield SCSI Accessories depending on motherboard One 1 68 pin LVD SCSI cable One 1 set of SCSI driver diskettes One 1 SCSI manual One 1 Supermicro CD or diskettes containing drivers and utilities One 1 BIOS User s Manual 1 1 SUPER P3TDLR User s Manual CONTACTING SUPERMICRO Headquarters Address Super Micro Computer Inc 980 Rock Avenue San Jose CA 95131 U S A Tel 1 408 503 8000 Fax 1 408 503 8008 E mail marketing supermicro com General Information support supermicro com Technical Support Web site www superm
33. a SUPER P3TDLR Layout eese enne SUPER P3TDLR Quick Reference sese 1 5 Server Works LE Chipset System Block Diagram 1 6 SUPER P3TDLR Motherboard Features a 1 7 1 2 Chipset Overview sissano cece eis ee etate ne n aa audae wdi 1 9 1 3 Special Features 0 eee eese nenne nnne nennen nnne nennen 1 9 ATI Graphics Controller eeeseseeeeeeeneeneennenene 1 9 BIOS Recovery EC eeepc te ed Ee dvi 1 9 Recovery from AC Power LOSS sesseeee 1 9 1 4 PC Health Monitoring eseesseeeeeeeeeeeneenenennenne nennen nennen 1 10 155 AGPI PG 98 Features emn ir reden 1 11 1 6 Power Supply nnne te ee cete T gea tre e pared 1 13 1 7 Super I O Chapter 2 Installation 2 1 Handling the PS3TDLR Motherboard sese 2 1 Precautlons oer eee ined piede reiner ote ye pde deus 2 1 UD ACK ING eR HERPES 2 2 2 2 Motherboard Installation occ eee eee cesses seaeseeeseeseaeseeeseeeeeaeeneeees 2 2 2 83 Connecting Cables oe eeeeeeeseeeeseeeeeseeeeeeeeeaecseeaessesseeaeeaeeaeeaeeaecseeeeeaeeates 2 3 Connecting Data Cables essen 2 3 Connecting Power Cables sseeeeee 2 3 Connecting the Control Panel ssssssssseeeeeneeeenenne 274 VO POrtS ii eter eee ict de cre exis De eO rr EE ER Ene ve 2 5 Installing Processors 2 6 Installing Memory seseseeeenennen
34. a locked key next Locked key checking is over Checking for a memory size mismatch with CMOS RAM data next The memory size check is done Displaying a soft error and checking for a password or bypassing WINBIOS Setup next The password was checked Performing any required programming before WINBIOS Setup next B 6 Appendix B AMIBIOS POST Diagnostic Error Messages Check Point Description 87 The programming before WINBIOS Setup has been completed Uncompressing the WINBIOS Setup code and executing the AMIBIOS Setup or WINBIOS Setup utility next 88 Returned from WINBIOS Setup and cleared the screen Performing any necessary programming after WINBIOS Setup next 89 The programming after WINBIOS Setup has been completed Displaying the power on screen message next 8B The first screen message has been displayed The WAIT message is displayed Performing the PS 2 mouse check and extended BIOS data area allocation check next 8C Programming the WINBIOS Setup options next 8D The WINBIOS Setup options are programmed Resetting the hard disk controller next 8F The hard disk controller has been reset Configuring the floppy drive controller next 91 The floppy drive controller has been configured Configuring the hard disk drive controller next 95 Initializing the bus option ROMs from C800 next 96 Initializing before passing control to the adaptor ROM at C800 97 Initialization before the C800 adaptor RO
35. ading the 8042 input port and disabling the MEGAKEY Green PC feature next Making the BIOS code segment writable and performing any necessary configuration before initializing the interrupt vectors The configuration required before interrupt vector initialization has completed Interrupt vector initialization is done Clearing the password if the POST DIAG switch is on Interrupt vector initialization is done Clearing the password if the POST DIAG Switch is on Any initialization before setting video mode will be done next B 2 Appendix B AMIBIOS POST Diagnostic Error Messages Check Point 28 2A 2B 2D 2E 2F 30 31 32 37 Description Initialization before setting the video mode is complete Configuring the monochrome mode and color mode settings next Bus initialization system static output devices will be done next if present Passing control to the video ROM to perform any required configuration before the video ROM test All necessary processing before passing control to the video ROM is done Looking for the video ROM next and passing control to it The video ROM has returned control to BIOS POST Performing any required processing after the video ROM had control Completed post video ROM test processing If the EGA VGA controller is not found performing the display memory read write test next The EGA VGA controller was not found The display memory read write test is ab
36. ain menu The screen is shown below All Chipset Setup options are described following the screen You can use this screen to select options for the main controller hub MCH or North Bridge configuration BIOS SETUP UTILITY Main Advanced Chipset PCIPnP Power Boot Security Exit Options for MCH C000 16k Shadow Cached WP C400 16k Shadow Cached WP C800 16k Shadow Disabled CC00 16k Shadow Disabled D000 16k Shadow Disabled D400 16k Shadow Disabled D800 16k Shadow Disabled DC00 16k Shadow Disabled Act to Deact 6 CLKS Act to Read Write 3 CLKS RAS Precharge Time 3 CLKS amp Select Screen RA Cycle Time 8 Tl Select Item M Write to Deact 3 CLKS 4 Change Option SDRAM CAS Latency ISA IO Cycle Delay MPS 1 4 Support 3 F1 General Help 1 5 BCLK F10 Save and Exit Enabled ESC Exit V02 03 C Copyright 1985 2000 American Megatrends Inc C000 16k Shadow C400 16k Shadow C800 16k Shadow CCO00 16k Shadow D000 16k Shadow D400 16k Shadow D800 16k Shadow 4 15 SUPER P3TDLR User s Manual DCOO 16k Shadow These options specify how the 16 KB of video ROM at each of the above addresses is treated When Disabled the contents of the video ROM are not copied to RAM When Enabled the contents of 16 KB of video ROM beginning at the above address are copied shadowed from ROM to RAM for faster application When set to Cached WP the contents of 16 KB of video ROM beginning at th
37. ata cables with their locations noted should be con nected See the layout on page 5 10 for connector locations IDE Device Cables J23 and J24 Floppy Drive Cable J26 Ultra 160 LVD SCSI Connector JA1 Control Panel Cable JF1 Supplied with Supermicro Servers see next page Connecting Power Cables The PSTDLR has a 24 pin primary power supply connector desig nated ATX Power for connection to the ATX power supply The ATX Power connector also is keyed to accept 20 pin power connec tors if the power supply you are using has that type See Section 5 8 for power connector pin definitions 2 3 SUPER P3TDLR User s Manual Connecting the Control Panel JF1 contains header pins for various front control panel connectors See Figure 5 1 for the pin locations of the various front control panel buttons and LED indicators Please note that even and odd numbered pins are on opposite sides All JF1 wires have been bundled into a single ribbon cable to simplify this connection Make sure the red wire plugs into pin 1 as marked on the board The other end connects to JP4 of the Control Panel PCB board located just behind the system status LEDs on the chassis The control signals are all on the even numbered pins See pages 5 12 to 5 14 for details and pin descriptions In addition to the 2 pin Power LED header on JF1 there is a 3 pin header for the same function at JP61 on the motherboard which is located near
38. cedure failed To remedy this first clear CMOS per the instructions in this manual and retry the BIOS flashing procedure If you still do not have video please use the following BIOS Recovery Procedure First make sure jumper JPWAKE is set to pins 1 2 Then turn your system off and place the floppy disk with the saved BIOS image file see above FAQ in drive A Press and hold lt CTRL gt and lt Home gt at the same time then turn on the power with these keys pressed until your floppy drive starts reading Your screen will remain blank until the BIOS program is done f the system reboots correctly then the recovery was successful The BIOS Recovery Procedure will not update the boot block in your BIOS Question Do I need the CD that came with your motherboard Answer The supplied compact disc has quite a few drivers and programs that will greatly enhance your system We recommend that you review the CD and install the applications you need Applications on the CD include chipset drivers for Windows and security and audio drivers Question Why can t turn off the power using the momentary power on off switch Answer The instant power off function is controlled in BIOS by the Power Button Mode setting When the On Off feature is enabled the motherboard 84 Chapter 3 Troubleshooting will have instant off capabilities as long as the BIOS has control of the system When the Standby or Suspend feature is enabled or when the
39. e above address are copied shadowed from ROM to RAM and can be written to or read from cache memory The settings for this option are Disabled Enabled and Cached WP The optimal settings are Cached WP for C000 and C400 and Disabled for all the other settings Act to Deact This settings for this option are 6 CLKS and 5 CLKS Act to Read Write This settings for this option are 3 CLKS and 2 CLKS RAS Precharge Time The precharge time is the number of cycles it takes for the RAS to accumulate a charge before a DRAM refresh Insufficient recharge time may cause the DRAM to lose data The settings are 3 CLKS which is more stable and 2 CLKS RAS stands for Row Address Strobe RAS Cycle Time This option defines the RAS cycle time Settings include 10 CLKS 9 CLKS 8 CLKS and 7 CLKS Write to Deact This settings for this option are 3 CLKS and 2 CLKS SDRAM CAS Latency This settings for this option are CAS Latency 3 and CAS Latency 2 CAS stands for Column Address Strobe 4 16 Chapter 7 BIOS Setup ISA IO Cycle Delay This settings for this option are Full Delay 1 5 BCLK 2 5 BLCK and 3 5 BLCK MPS 1 4 Support The settings for this option are Enabled and Disabled 4 6 PCI PnP Setup Choose PCI PnP Setup from the AMIBIOS Setup main menu All PCI PnP options are described in this section The PCI PnP Setup screen is shown below BIOS SETUP UTILITY Main Advanced Chipset PCIPnP Power Boot Security Exit No
40. e power LED to the motherboard Check all jumper settings as well No Power Make sure no short circuits exist between the motherboard and the chassis Verify that all jumpers are set to their default positions Check that the 115V 230V switch on the power supply is properly set Turn the power switch on and off to test the system The battery on your motherboard may be old Check to verify that it still supplies 3VDC If it does not replace it with a new one No Video If the power is on but you have no video remove all the add on cards and cables Use the speaker to determine if any beep codes exist Refer to Appendix A for details on beep codes 3 1 SUPER P3TDLR User s Manual NOTE If you are a system integrator VAR or OEM a POST diagnostics card is recommended For I O port 80h codes refer to App B Memory Errors 1 Make sure the DIMM modules are properly and fully installed 2 Determine if different speeds of DIMMs have been installed and verify that the BIOS setup is configured for the fastest speed of RAM used It is recommended to use the same RAM speed for all DIMMs in the system 3 Make sure you are using PC133 or PC100 compliant registered ECC SDRAM EDO and unbuffered SDRAM are not supported 4 Check for bad DIMM modules or slots by swapping a single module between two slots and noting the results 5 Make sure all memory modules are fully seated in their slots
41. enenneen ener nennen rennen rennen 2 7 Connector Definitions m Power Supply Connectors sse 2 9 Power Supply Fail Enable Disable se 2 9 iv Table of Contents Power LED arenan a eee Ran ee E 2 10 HDD LED irii erouet cantevencdeies alvecctestsevivewstvs cde acuvedgestdentedercoeieedteeds 2 10 exo DRE 2 10 NIG 2 zip 2 10 Overheat BED sa ted veh hain aetna 2 11 Fan OAC eM Sin recon ferrocene IMS UBI ED UEM estate 2 12 Serial Potts niihi enr n isd HT Parr 2 12 Universial Serial BUS iet terree tene nane 2 13 Extra USB Gorinectors erected needs 2 13 EANT EAN2 ROIS erri Rr Rs 2 13 SLED1 SCSI LED Indicator 2 13 Wake On Modem eiie rear ene n ii eaaa nae 2 14 Wake QnzLAN secti tette e ee Th e ME Le EA 2 14 2 8 DIP Switch Settings eret esi 2 14 DIP Switch 1 Core Bus Ratio 2 14 2 9 Jumper Settings n leere hene eee i PER re FEES 2 15 Explaination Of Jumpers sssseeneene eene 2 15 Front Side Bus Speed esee 2 15 PCI64 Speed Setting eese 2 15 CMOS Clear secet amines T ev D E Le VO LE e ds 2 16 Over Heat Ala eter eR Fett e Dri en eite nee 2 16 LAN1 Enable Disable seseeseessesssesssseeeeeeennneeennene nnns 2 16 LAN2 Enable Disable sssssssssseeeeenenneeeeneen nenne 2 16 SCSI Enable Disable 4 7 S A e RERO e HTC e 2 17 Onboard VGA E
42. executed using either or both the Supervisor password or User password The Supervisor and User passwords activate two different levels of password security If you select password support you are prompted for a 1 6 character password Type the password on the keyboard The password does not appear on the screen when typed Make sure you write it down If you forget it you must clear CMOS and reconfigure Remember your Pass word Keep a record of the new password when the password is changed If you forget the password you must erase the system configu ration information in CMOS 4 26 Chapter 7 BIOS Setup Change Supervisor Password This option allows you to change supervisor password that was entered previously Change User Password This option allows you to change a user password that was entered previ ously Clear User Password Use this option to clear the user password so that it is not required to be entered when the system boots up Boot Sector Virus Protection This option allows you to enable or disable a virus detection program to protect the boot sector of your hard disk drive The settings for this option Disabled and Enabled If Enabled AMIBIOS will display a warning when any program or virus issues a Disk Format command or attempts to write to the boot sector of the hard disk drive 4 27 SUPER P3TDLR User s Manual 4 10 Exit Setup Choose Exit Setup from the AMIBIOS Set
43. exit the BIOS Setup pro gram 4 29 SUPER P3TDLR User s Manual NOTES 4 30 Appendix A BIOS Error Beep Codes Appendix A BIOS Error Beep Codes amp Messages During the POST Power On Self Test routines which are performed each time the system is powered on errors may occur Non fatal errors are those which in most cases allow the system to continue the boot up process The error messages normally appear on the screen Fatal errors are those which will not allow the system to continue the boot up procedure f a fatal error occurs you should consult with your system manufacturer for possible repairs These fatal errors are usually communicated through a series of audible beeps The numbers on the following page correspond to the number of beeps for the error described A 1 SUPER P3TDLR User s Manual AMIBIOS Error Beep Codes POST Error Beep Codes 1 beep Refresh failure the memory refresh circuitry on the motherboard is faulty Fatal error 3 beeps Base 64KB memory failure memory failure occurred in the first 64KB of memory Fatal error 6 beeps Keyboard controller Gate A20 failure The keyboard controller may be bad The BIOS cannot switch to protected mode Fatal error 7 beeps Processor exception interrupt error The CPU generated an exception interrupt Fatal error 8 beeps Display memory read write error The system video adapter is either missing or its memory i
44. ext Initialization before passing control to the adaptor ROM at E000h completed Passing control to the adaptor ROM at E000h next B 8 Appendix B AMIBIOS POST Diagnostic Error Messages Check Point Description A9 Returned from adaptor ROM at EO000h control Next performing any initialization required after the E000 option ROM had control AA Initialization after E000 option ROM control has completed Displaying the system configuration next AB Building the multiprocessor table if necessary POST next BO The system configuration is displayed AC Uncompressing the DMI data and initializing DMI B1 Copying any code to specific areas DOh The NMI is disabled Power on delay is starting Next the initialization cade checksum will be verified Dih Initializing the DMA controller Performing the keyboard controller BAT test Starting memory refresh and entering 4 GB flat mode next D3h Starting memory sizing next D4h Returning to real mode Executing any OEM patches and setting the stack next D5h Passing control to the uncompressed code in shadow RAM at E000 0000h The initialization code is copied to segment 0 and control will be transferred to segment 0 D6h Control is in segment 0 Next checking if Ctrl Home was pressed and verifying the system BIOS checksum If either lt Ctrl gt lt Home gt was pressed or the system BIOS checksum is bad next the system will go to checkpoint code EOh Otherw
45. fies if BIOS is to monitor for display activity when in a power saving state The settings include Off 1 2 3 4 5 6 7 8 9 and 10 minutes IRQ1 IRQ3 IRQ4 IRQ5 IRQ6 4 22 Chapter 7 BIOS Setup IRQ7 IRQ9 IRQ10 IRQ11 IRQ12 IRQ14 IRQ15 With the above options you can monitor each interrupt request and resume the system s normal power up state when activated Settings are Ignore and Monitor All IRQs are defaulted to Ignore except for IRQ 1 12 and 14 which default to Monitor 4 23 SUPER P3TDLR User s Manual 4 8 Boot Setup Choose Boot Setup from the AMIBIOS Setup main menu All Boot Setup options are described in this section The Boot Setup screen is shown below BIOS SETUP UTILITY Main Advanced Chipset PCIPnP Power Boot Security Exit Boot Device Priority Hard Disk Drives Removable Devices ATAPI CDROM Drives Select Screen Select Item Go to Sub Scree General Help Save and Exit Exit V02 03 C Copyright 1985 2000 American Megatrends Inc Boot Device Priority 1st Boot Device This option is used to specify the order of the boot sequence that will be followed from the available system devices The settings for the 1st Boot Device are Removable Device ATAPI CDROM Hard Drive and Disabled 2nd Boot Device The settings for the 2nd Boot Device are Removable Device ATAPI CDROM Hard Drive and Disabled 4 24 Chapter 7 BIOS Setup 3rd Boot Device
46. finition 9 used to indicate network activity 10 on LAN Ethernet port 2 See Table 2 7 for pin definitions and Figure 2 2 for pin locations 2 10 Chapter 2 Installation Overheat LED Table 2 8 Overheat LED Pins 7 and 8 of JF1 are for the Rin CAI Overheat LED which provides you aS with advanced warning of chas Number Definition sis overheating This LED will also i 5 illuminate if the blower fan fails which will cause the chassis tem perature to rise Refer to Table 2 8 for pin definitions and Figure 2 2 for pin locations Reset Table 2 9 Reset Button Pin Definitions The Reset connection is located JF1 on pins 3 and 4 of JF1 This con Pin nector attaches to the Reset but E EE SRL ton on the control panel which al 4 Ground lows you to reboot the system See Table 2 9 for pin definitions and Figure 2 2 for pin locations PWR ON Table 2 10 x PWR Button Pin Definitions The PWR ON connection is lo JF1 cated on pins 1 and 2 of JF1 This NLR ene connector attaches to the Power 1 PW ON button on the control panel which Pr ARE allows you to turn the power to the system on and off The user can also configure this button to function as a suspend button See the Power Button Mode set ting in BIOS To turn off the power when set to suspend mode hold down the power button for at least 4 seconds See Table 2 10 for pin def
47. icro com European Office Address Super Micro Computer B V Het Sterrenbeeld 28 5215 ML s Hertogenbosch The Netherlands Tel 31 0 73 6400390 Fax 31 0 73 6416525 E mail sales supermicro nl General Infor mation support supermicro nl Technical Support rma supermicro nl Customer Support Asia Pacific Address F3 753 Chung Cheng Road Chung Ho City Taipei Hsien Taiwan R O C Tel 886 2 8221 1690 Fax 886 2 8221 2790 WWW www supermicro com tw Email support supermicro com tw Technical Support Tel 886 2 8228 1366 ext 132 Chapter 1 Introduction SUPER P3TDLR Figure 1 4A SUPER P3TDLR Image SUPER P3TDLR User s Manual Figure 1 8A SUPER P3TDLR Layout not drawn to scale ATX POWER FCPGA J27 Processor Paralle Port CHASSIS FAN BLOWER FAN CPU FAN J23 NORTH BRIDGE BATTERY FCPGA Processor 6 CHFAN J105 THRM FAN e S S R PCI64 1 FLOPPY PCI64 2 c T o ULTRA160LVD SCSI JBT1 L p WOL JA2 SUPERO P3TDLR Also see the figure on page 2 7 for the locations of the I O ports and 2 8 for the Front Control Panel JF1 co
48. initions and Figure 2 1 for pin locations 2 11 SUPER P3TDLR User s Manual Fan Headers There are several fan headers on the P3TDLR that provide cooling In addi tion to one fan header for each processor there are two over heat and two chassis fan head ers If used a blower fan should be connected to the chassis fan header located near the JF1 header See the motherboard lay out on page 2 9 for locations Refer to Table 2 11 for pin defini for various components tions Note The maximum current limita tion for the onboard fans is 0 6 amps for each not to exceed 1 25 amps for any two fans l e both CPU fans both chassis fans or both over heat fans Serial Ports Two connectors for the COM1 and COM2 serial ports are located on the P3TDLR board see Figure 2 8 COMI is located near USB1 connectors COM 2 is located near the AMIBIOS U33 See the mother board layout on page 2 9 for locations See Table 2 12 for pin definitions Table 2 11 Fan Header Pin Definitions CPU CHASSIS and OH FANs Pin Number Definition 1 Ground black 2 12V red 3 Tachometer Caution These fan headers are DC power Table 2 12 Serial Port Pin Definitions COM1 COM2 Pin Number Definition Pin Number Definition 1 CD 6 DSR 2 RXD 7 RTS 3 TXD 8 CTS 4 DTR 9 ARI 5 Ground 2 12 Chapter 2 Installation ATX PS 2 Keyboard and PS 2 Mouse Ports The ATX PS 2 ke
49. ion is for enabling or disabling the internal CPU L2 cache Settings include Disabled Write Thru and Write Back See description above 4 12 Chapter 7 BIOS Setup System BIOS Cacheable This option enables you to move the system BIOS to the memory cache to improve performance Settings are Enabled and Disabled Event Log Configuration Event Logging This option Enables or Disables the logging of events You can use this screen to select options for the Event Log Configuration Settings You can access sub screens to view the event log and mark all events as read Use the up and down arrow keys to select an item and the lt gt plus and lt gt minus keys to change the option setting The settings are described on the following pages The screen is shown below ECC Event Logging This option Enables or Disables the logging of ECC events The events logged by AMIBIOS are post errors such as a bad BIOS floppy errors or hard drive errors Clear All Event Logs This option can be used to tell the system to clear the event log on the next boot up The settings are No and Yes View Event Log Highlighting this and pressing lt Enter gt will allow you to view the unread events from the event log area View All Events as Read Highlighting this and pressing lt Enter gt will mark all events in the log area as having already been read 4 13 SUPER P3TDLR User s Manual Peripheral Device Configuration
50. ise going to checkpoint code D7h B 9 SUPER P3TDLR User s Manual Notes
51. itions Pin Number Definition 1 2 2 3 4 SUPER PSTDLR User s Manual Wake On Modem Table 2 16 Wake on modem Pin Definitions WOM The Wake on Modem WOM header allows your computer to Pin a Number Definition receive and be awakened by an 1 1 Ground incoming call when in the suspend E Wake up state Refer to Table 2 16 for pin definitions You must also have a WOM card and cable to use WOM Wake On LAN Table 2 17 Wake On LAN Pin Definitions WOL The Wake On LAN WOL header allows the system to be woken up DN Definition upon receiving an appropriate sig 3 T nal via the LAN You must enable 3 Wake up the LAN Wake Up setting in BIOS to use this feature and have a LAN card with a Wake on LAN connector and cable Refer to Table 2 17 for pin definitions 2 8 DIP Switch Settings Table 2 18 CPU Core Bus Ratio Selection DIP Switch 1 DIP Switch 1 M 133 100 SW1lsSW1 SW 1l5W 1 Core Bus Ratio CPU si 2 3 4 600 450 ON ON f 667 500 ON ON One DIP switch labeled SW1 is lo 733 550 ON 800 600 ON ON ON cated on the P3TDLR motherboard 566 660 ONTON The switch housing has four indi 933 700 ON ON 1G 750 ON vidual switches They are used to 1 06G 800 ON ON set the CPU core bus ratio The 1 19 0 859 ON ONION 1 20G 900 ON ON table on the right will show you 1 26G 950 ON ON JON 1 4G 1G ON ON ON h
52. l82559 Drivers amp Tools ServerWorks ServerSet III HE amp Build SCA disk Qlogic GEM 354 LE Chipset Build SCSI disk Adaptec Ultra 160 Lo gm e le e rs r3 P Browse this CD For more information please visit SUPERMICRO s web site Figure 2 6 Driver Tool Installation Display Screen Click the icons showing a hand writing on paper to view the readme files for each item The bottom icon with a CD on it allows you to view the entire contents of the CD Video driver ATI Build Netword Card disk Build SCA disk QLogic GEM 354 For integration with the SuperServer SC850 and SC860 chassis Build SCSI disk Ultra160 2 20 Chapter 3 Troubleshooting 3 1 Chapter 3 Troubleshooting Troubleshooting Procedures Use the following procedures to troubleshoot your system If you have followed all of the procedures below and still need assistance refer to the Technical Support Procedures and or Returning Merchandise for Service section s in this chapter Note Always disconnect the power cord before adding changing or installing any hardware components a A OMN Before Power On Make sure no short circuits exist between the motherboard and chassis Disconnect all ribbon wire cables from the motherboard including those for the keyboard and mouse Remove all add on cards Install one CPU making sure it is fully seated and connect the chassis speaker and th
53. lets the BIOS Plug amp Play 0 S No configure all the Reset Config Data No devices in the system PCI Latency Timer 64 Yes lets the Allocate IRQ to VGA Yes operating system Palette Snooping Disabled configure Plug and PCI IDE BusMaster Disabled Play PnP devices not OffBoard PCI ISA IDE Card Auto required for boot if your system has a Plug USB Controller Enabled and Play operating system PCI Slot 1 IRQ preference Auto PCI Slot 2 IRQ preference Auto Onboard VGA IRQ preference Auto Select Screen Onboard LAN1 IRQ preference Auto Select Item Onboard LAN2 IRQ preference Auto PCI Slot 3 IRQ preference Auto General Help PCI Slot 4 IRQ preference Auto Save and Exit Onboard SCSI IRQ preference Auto Exit Change Option V02 03 C Copyright 1985 2000 American Megatrends Inc Plug amp Play OS Choose the No setting for computers that do not meet the Plug and Play specifications which will allow the BIOS to configure all the devices in the system Choosing the Yes setting lets the operating system configure PnP devices that are not required for boot up if the system has a PnP operating System The operating system would have the ability to change interrupt 4 17 SUPER P3TDLR User s Manual I O and DMA settings Set this option if the system is running Windows 958 Windows 98 or Windows 2000 Several other operating systems are also PnP aware Reset Configuration Data Choosing the Yes setting will cause the
54. m ring on can only be used with an ATX 2 01 or above compliant power supply Wake On LAN WOL Wake On LAN is defined as the ability of a management application to remotely power up a computer that is powered off Remote PC setup updates and Chapter 1 Introduction asset tracking can occur after hours and on weekends so that daily LAN traffic is kept to a minimum and users are not interrupted The motherboards have a 3 pin header WOL to connect to the 3 pin header on a Network Interface Card NIC that has WOL capability Wake On LAN must be en abled in BIOS Note that Wake On Lan can only be used with an ATX 2 01 or above compliant power supply 1 6 Power Supply As with all computer products a stable power source is necessary for proper and reliable operation It is even more important for processors that have high CPU clock rates The SUPER P3TDLR accommodates ATX power supplies Although most power supplies generally meet the specifications required by the CPU some are inadequate You should use one that will supply at least 300W of power or even higher wattage power supply is recommended for high load configurations Also your power supply must provide a 5V standby voltage that supplies at least 1 5A of current It is strongly recommended that you use a high quality power supply that meets ATX power supply Specification 2 02 or above Additionally in ar eas where noisy power transmission is present you may cho
55. menu with the lt Left Right gt arrow keys You should see the following display Select one of the items in the left frame of the screen such as SuperlO Configuration to go to the sub screen for that item Advanced BIOS Setup options are displayed by highlighting the option using the arrow keys All Advanced BIOS Setup options are described in this section BIOS SETUP UTILITY Main Advanced Chipset PCIPnP Power Boot Security Exit Setup Warning Configure SuperIO Setting items on this screen to incorrect Chipset Winbond627F values may cause the system to malfunction gt SuperIO Configuration gt IDE Configuration gt Floppy Configuration gt Boot Settings Configuration gt Event Log Configuration gt gt gt Peripheral Device Configuration Processor Configuration System Health Monitoring Hardware Select Screen TL Select Item Enter Go to Sub Screen Fl General Help F10 Save and Exit ESC Exit V02 03 C Copyright 1985 2000 American Megatrends Inc Use the lt Up Down gt arrow keys to select the Super I O Configuration line When the Super IO Configuration line is highlighted Press ENTER to display its menu The following Super IO Configuration screen will appear Here you can select your options for your computer s I O Input Output devices 4 4 Chapter 7 BIOS Setup Super IO Configuration BIOS SETUP UTILITY Portl Address Serial Portl IRQ Serial Port2 Address Serial
56. nable Disable s 2 17 Watchdog Reset Enable Disable sese 2 17 2 10 Floppy Hard Disk and SCSI Connections ssessssee 2 18 Floppy Connector niece net reto tte Leda edu 2 18 IDE Connectors Ultra160 SCSI Connector ansin n d 2 19 2 11 Installing Software Drivers sseeeneeeneeenenn 2 20 SUPER P3TDLR User s Manual Chapter 3 Troubleshooting 3 1 Troubleshooting Procedures Betore POWE On itid ottiene Denuo aie NOs ITo To ge Memory Errors eurer teen nid n nee de re tds Losing the System s Setup Configuration sss 3 2 3 2 Technical Support Procedures esee 3 2 3 3 Frequently Asked Questions esssseeeeneneeeee nene 3 3 3 4 Returning Merchandise for Service ssssseeee 3 5 Chapter 4 BIOS Ba uireelTeilel I 4 1 4 2 BIOS EeatUr6e8 orn peine a Pa id Doe eee et dl 4 2 4 3 Running Setup eese nennen nnne nnne enne 4 2 Main BIOS Setup Menu esee 4 3 4 4 Advanced BIOS Setup nennen enne 4 4 4 5 Chipset Setup nur epe demere aee rr ee a p edo diede 4 15 4 6 PCI PnP Setup oo cece eeeeeceeseeeeeeeeceeeeeeeaeeaeeneeaeseeeaeeaeeaesaeseeeeeeeaseaeeaeeaeeeeeeeeees 4 17 4 7 Power Setup ient n iere e a en es 4 21 4 8 Boot Setup 4 9 Security Setup cia nettes eee dae tgp ec ee e ee dp dap ded 4 26 4510 E
57. ne how the system will respond when AC power is lost and then restored to the system You can choose for the system to remain powered off in which case you must press the 1 9 SUPER P3TDLR User s Manual power switch to turn it back on or for it to automatically return to a power on state See the Power Lost Control setting in the BIOS chapter of this manual to change this setting The default setting is Always OFF 1 4 PC Health Monitoring This section describes the PC health monitoring features of the SUPER P3TDLR All have an onboard System Hardware Monitor chip that supports PC health monitoring Seven Onboard Voltage Monitors for the CPU Core Chipset Voltage 5V and 12V The onboard voltage monitor will scan these seven voltages continuously Once a voltage becomes unstable it will give a warning or send an error message to the screen Users can adjust the voltage thresholds to define the sensitivity of the voltage monitor Fan Status Monitor with Firmware Software On Off Control The PC health monitor can check the RPM status of the cooling fans The onboard 3 pin CPU and chassis fans are controlled by the power management functions The thermal fan is controlled by the overheat detection logic Environmental Temperature Control The thermal control sensor monitors the CPU temperature in real time and will turn on the thermal control fan whenever the CPU temperature exceeds a user defined threshold The overheat
58. nnectors 1 4 Chapter 1 Introduction P3TDLR Quick Reference Jumpers Description Default Setting JBT1 CMOS Clear p 2 18 Pins 1 2 Normal JP1 SCSI p 2 19 Pins 1 2 Enabled JP2 Front Side Bus Speed p 2 17 Pins 1 2 Auto JP7 Overheat Alarm p 2 18 Closed Enabled JP8 LAN1 Enable Disable p 2 18 Open Enabled JP11 Power Supply Fail p 2 11 Pin 4 Reset JP12 Power Supply Fail p 2 11 Closed Enabled JP13 Speed for 64 bit PCI 2 17 Closed 33 MHz JP24 LAN2 Enable Disable p 2 18 Open Enabled JP62 Onboard VGA p 2 19 Pins 1 2 Enabled J210 Watchdog Reset p 2 19 Open Disabled DIP Switches Description Default Setting SW1 1 4 CPU Core Bus Ratio see p 2 16 Connectors Description ATX Power 24 pin ATX Power Connector p 2 11 DIMMO0 DIMM3 Memory SDRAM Slots p 2 9 COM1 2 COM1 COM2 Serial Port Connector p 2 14 CPU FAN 2 ea Fan Headers 5 ea J23 J24 J26 J28 J105 106 JA1 JF1 JP61 LAN1 2 SLED1 USB 1 2 WOL WOM CPU1 CPU2 Fan Header p 2 14 Chassis thermal and blower p 2 14 IDE Hard Disk Drive 1 2 Connectors p 2 20 Floppy Disk Drive Connector p 2 20 PS 2 Keyboard Mouse p 2 9 USB3 USB4 p 2 15 Ultra160 LVD SCSI Connector p 2 21 Front Control Panel p 2 4 PWR_LED p 2 4 Ethernet Ports 1 2 p 2 15 SCSI LED header p 2 15 Universal Serial Bus 1 2 Ports p 2 15 Wake on LAN Header p 2 16 Wake on Modem Header p 2 16 1 5 S
59. o bend if handled improperly which may result in damage To prevent the motherboard from bending keep one hand under the center of the board to support it when handling The fol lowing measures are generally sufficient to protect your equipment from static discharge Precautions Use a grounded wrist strap designed to prevent static discharge Touch a grounded metal object before removing any board from its anti static bag Handle a board by its edges only do not touch its components periph eral chips memory modules or gold contacts When handling chips or modules avoid touching their pins Put the motherboard add on cards and peripherals back into their anti static bags when not in use 2 1 SUPER PSTDLR User s Manual For grounding purposes make sure your computer chassis provides ex cellent conductivity between the power supply the case the mounting fasteners and the motherboard Unpacking The motherboard is shipped in antistatic packaging to avoid static electrical damage When unpacking the board make sure the person handling it is Static protected 2 2 Motherboard Installation This section explains the first step of physically mounting the PS3TDLR into a chassis Following the steps in the order given will eliminate the most common problems encountered in such an installation To remove the motherboard follow the procedure in reverse order 1 Check compatibility of motherboard ports and
60. om corner of the screen below the copyright message 4 1 SUPER P3TDLR User s Manual 4 2 BIOS Features Supports Plug and Play V1 0A and DMI 2 1 Supports Intel PCI Peripheral Component Interconnect PME local bus specification Supports Advanced Power Management APM specification v 1 1 Supports ACPI Supports Flash ROM AMIBIOS supports the LS120 drive made by Matsushita Kotobuki Electronics Industries Ltd The LS120 Can be used as a boot device Is accessible as the next available floppy drive AMIBIOS supports PC Health Monitoring chips When a failure occurs in a monitored activity AMIBIOS can sound an alarm and display a message The PC Health Monitoring chips monitor CPU temperature Additional temperature sensors Chassis intrusion detector Five positive voltage inputs Two negative voltage inputs Three fan speed monitor inputs 4 3 Running Setup Optimal default settings are in bold text unless otherwise noted The BIOS setup options described in this section are selected by choos ing the appropriate text from the Standard Setup screen All displayed text is described in this section although the screen display is often all you need to understand how to set the options see on next page 4 2 Chapter 7 BIOS Setup The Main BIOS Setup Menu Press the lt Delete gt key during the POST Power On Self Test to enter the Main Menu of the BIOS Setup Utility All Main
61. one PC compatible printer port SPP Bi directional Printer Port BPP Enhanced Parallel Port EPP or Extended Capabilities Port ECP The Super I O provides functions that comply with ACPI Advanced Configuration and Power Interface which includes support of legacy and ACPI power manage ment through an SMI or SCI function pin It also features auto power manage ment to reduce power consumption The IRQs DMAs and I O space resources of the Super I O can flexibly adjust to meet ISA PnP requirements which suppport ACP and APM Advanced Power Management Chapter 2 Installation Chapter 2 Installation This chapter covers the steps required to install the P3TDLR motherboard into a chassis connect the data and power cables and install add on cards All motherboard jumpers and connections are also described A layout and quick reference chart are on pages 1 4 and 1 5 Remember to completely close the chassis when you have finished working with the motherboard to better cool and protect the system Tools Required The only tools you will need to install the P3TDLR into the chassis are a long and a short Philips screwdriver 2 1 Handling the P3TDLR Motherboard Static electrical discharge can damage electronic components To prevent damage to any printed circuit boards PCBs it is important to handle them very carefully see previous chapter Also note that the size and weight of the motherboard can cause it t
62. ory 06 Uncompressing the post code unit next 07 Next initializing the CPU init and the CPU data area 08 The CMOS checksum calculation is done next 0B Next performing any required initialization before keyboard BAT command is issued 0C The keyboard controller I B is free Next issuing the BAT command to the keyboard controller 0E The keyboard controller BAT command result has been verified Next performing any necessary initialization after the keyboard controller BAT command test OF The initialization after the keyboard controller BAT command test is done The keyboard command byte is written next B 1 SUPER P3TDLR User s Manual Check Point 10 11 12 13 14 19 1A 23 24 25 27 Description The keyboard controller command byte is written Next issuing the pin 23 and 24 blocking and unblocking commands Next checking if the End or Ins keys were pressed during power on Initializing CMOS RAM if the Initialize CMOS RAM in every boot AMIBIOS POST option was set in AMIBCP or the End key was pressed Next disabling DMA controllers 1 and 2 and interrupt controllers 1 and 2 The video display has been disabled Port B has been initialized Next initializing the chipset The 8254 timer test will begin next The 8254 timer test is over Starting the memory refresh test next The memory refresh test line is toggling Checking the 15 second on off time next Re
63. ose to install a line filter to shield the computer from noise It is recommended that you also install a power surge protector to help avoid problems caused by power surges 1 7 Super I O The disk drive adapter functions of the Super I O chip include a floppy disk drive controller that is compatible with industry standard 82077 765 a data separator write pre compensation circuitry decode logic data rate selec tion a clock generator drive interface control logic and interrupt and DMA logic The wide range of functions integrated onto the Super I O greatly reduces the number of components required for interfacing with floppy disk drives The Super I O supports 360 K 720 K 1 2 M 1 44 M or 2 88 M disk drives and data transfer rates of 250 Kb s 500 Kb s or 1 Mb s It also provides two high speed 16550 compatible serial communication ports UARTs one of which supports serial infrared communication Each UART includes a 16 byte send receive FIFO a programmable baud rate generator complete modem control capability and a processor interrupt system Each UART includes a 16 byte send receive FIFO a programmable baud 1 13 SUPER P3TDLR User s Manual rate generator complete modem control capability and a processor inter rupt system Both UARTs provide legacy speed with baud rate of up to 115 2 Kbps as well as an advanced speed with baud rates of 250 K 500 K or 1 Mb s which support higher speed modems The Super I O supports
64. out to begin The display memory read write test passed Look for retrace checking next The display memory read write test or retrace checking failed Performing the alternate display memory read write test next The alternate display memory read write test passed Looking for alternate display retrace checking next Video display checking is over Setting the display mode next The display mode is set Displaying the power on message next B 3 SUPER P3TDLR User s Manual Check Point 38 39 3A 40 42 45 46 47 49 4B Description Initializing the bus input IPL and general devices next if present Displaying bus initialization error messages The new cursor position has been read and saved Displaying the Hit lt DEL gt message next Preparing the descriptor tables next The descriptor tables are prepared Entering protected mode for the memory test next Entered protected mode Enabling interrupts for diagnostics mode next Interrupts enabled if the diagnostics switch is on Initializing data to check memory wraparound at 0 0 next Data initialized Checking for memory wraparound at 0 0 and finding the total system memory size next The memory wraparound test has completed The memory size calculation has been completed Writing patterns to test memory next The memory pattern has been written to extended memory Writing patterns to the base 640 KB memory next
65. ow to choose the proper CPU core bus ratio After determining Core bus ratio CPU speed front side bus the ratio refer to Table 2 18 for speed Example a 550 MHz CPU running at a the correct settings of DIP switch 100 MHz FSB speed 1 550 MHz 100 MHz 5 5 ratio 2 14 Chapter 2 Installation 2 9 Jumper Settings Explanation of Jumpers To modify the operation of the motherboard jumpers can be used to choose between optional set tings Jumpers create shorts be tween two pins to change the function of the connector Pin 1 is identified with a square solder pad on the printed circuit board See the motherboard layout pages for jumper locations Note Closed refers to the jumper being set over both pins on a two pin jumper header Open refers to the jumper being set over a single pin of a two pin jumper Front Side Bus Speed JP2 sets the FSB speed CPU speed FSB x Core Bus ratio Core Bus Ratio settings are de scribed in Section 2 9 See Table 2 19 for jumper settings PCI 64 Speed Setting JP13 sets the speed PCI 64 When JP13 is set to open the PCI speed is set 66MHz and when the JP13 is closed the PCI speed is set to 33 MHz See Table 2 20 for jumper settings 2 15 Connector re Jumper Cap 3 2 1 Pin 1 2 short Table 2 19 Front Side Bus Speed Jumper Settings JP2 Jumper Position Definition 1 2 Auto 2 8 100 MHz Open 133 MHz
66. performance core logic chipset that consists of a North Bridge and a South Bridge The North Bridge includes an integrated main memory subsystem and a dual channel PCI bus that bridges the processor bus to a 64 bit PCI bus and a 32 bit PCI bus The North Bridge also packs and unpacks data for PCI accesses which reserves more processor bandwidth for multiprocessor motherboards The South Bridge provides various integrated functions including the PCI to ISA bridge and support for UDMA33 security passwords and system pro tection Plug amp Play USBs power management interrupt controllers and the SMBus The North and South Bridges communicate over a serial bus that uses the PCI clock as a timing reference This serial bus uses a single pin on both bridges to send a 4 bit word for transmitting commands back and forth 1 3 Special Features ATI Graphics Controller The P3TDLR has an integrated ATI video controller based on the Rage XL graphics chip The Rage XL fully supports sideband addressing and AGP texturing An 8 MB graphics memory chip has been integrated aboard the P3TDLR to provide graphics memory This onboard graphics package can provide a bandwidth of up to 512 MB sec over a 32 bit graphics memory bus BIOS Recovery The BIOS Recovery function allows you to use an image file to recover your BIOS if the BIOS flashing procedure fails see Section 3 3 Recovery from AC Power Loss BIOS provides a setting for you to determi
67. pply Connectors Table 2 1 ATX Power Supply 24 pin Connector Pin Definitions ATX POWER The primary power supply connec Pin Number Definition Pin Number Definition P Y 1 43 3V 13 43 3V tor on the PSTDLR is designated 2 43 3V 14 12V ie j ni 3 Ground 15 Ground as ATX POWER This is a 24 pin s EV PE Ons connector which will also accept 5 Ground 17 Ground e 6 5V 18 Ground 20 pin power connectors which 7 Ground 19 Ground 8 PWR OK 20 Res are used with some power sup 5 yee 3 rey plies If a 24 pin connector is 10 12V 22 5V 11 12V 23 5V used please refer to Table 2 1 for 12 43 3V 24 Ground pin definitions If a 20 pin con nector is used please refer to Table 2 2 for pin definitions Table 2 2 ATX Power Supply 20 pin Connector Pin Definitions ATX PWR 1 ATX PWR 2 Pin Number Definition Pin Number Definition 1 3 3V 11 3 3V 2 3 3V 12 12V 3 Ground 13 Ground 4 5V 14 PS ON 5 Ground 15 Ground 6 45V 16 Ground vd Ground 17 Ground 8 PW OK 18 5V 9 5VSB 19 5V 10 12V 20 5V Power Supply Fail AA i Power Fail Header Pi Enable Disable wer Eal Header Pim JP11 Header JP11 and jumper JP12 al MD DOSE low you to enable or disable the 1 P S 1 Fail Signal 2 P S 2 Fail Signal 3 P S 3 Fail Signal 4 Reset from MB power supply fail annunciator LEDs The normal default posi tion is closed to enable power fail indications See Table 2 3a and 2 Table 2 3b em Onboard VGA
68. s faulty This is not a fatal error Bootblock Error Beep Codes 2 beeps BIOS ROM file absent the BIOS was unable to find the specific file name required to flash the BIOS 4 beeps Flash program successful 5 beeps Media read error The floppy or ATAPI media is not present or cannot be read 7 beeps Flash not present The BIOS was unable to detect the presence of a flash device 10 beeps Flash erase error the flash device could not be properly erased 11 beeps Flash program error 12 beeps BIOS ROM file incorrect size 13 beeps BIOS ROM image mismatch The BIOS ROM file layout configu ration does not match the image present in the flash device A2 Appendix A BIOS Error Beep Codes If you hear it s because 5 short and 1 long beeps 6 short and 1 long beeps 7 short and 1 long beeps no memory detected in system EDO memory detected in system SMBUS System Management Bus error A 3 SUPER P3TDLR User s Manual Notes A4 Appendix B AMIBIOS POST Diagnostic Error Messages Appendix B AMIBIOS POST Diagnostic Error Messages This section describes the power on self tests POST port 80 codes for the AMIBIOS Check Point Description 00 Code copying to specific areas is done Passing control to INT 19h boot loader next 03 NMI is Disabled Next checking for a soft reset or a power on condition 05 The BIOS stack has been built Next disabling cache mem
69. ssful The CPU is in real mode Disabling the Gate A20 line parity and the NMI next The A20 address line parity and the NMI are disabled Adjusting the memory size depending on relocation and shadowing next The memory size was adjusted for relocation and shadowing Clearing the Hit DEL message next The Hit DEL message is cleared The WAIT message is displayed Starting the DMA and interrupt controller test next B 5 SUPER P3TDLR User s Manual Check Point 60 62 65 66 7F 80 81 82 85 86 Description The DMA page register test passed Performing the DMA Controller 1 base register test next The DMA controller 1 base register test passed Performing the DMA controller 2 base register test next The DMA controller 2 base register test passed Programming DMA controllers 1 and 2 next Completed programming DMA controllers 1 and 2 Initializing the 8259 interrupt controller next Extended NMI source enabling is in progress The keyboard test has started Clearing the output buffer and checking for stuck keys Issuing the keyboard reset command next A keyboard reset error or stuck key was found Issuing the keyboard controller interface test command next The keyboard controller interface test completed Writing the command byte and initializing the circular buffer next The command byte was written and global data initialization has been completed Checking for
70. t Chapter 2 begins with instructions on handling static sensitive devices Read this chapter when you want to install the processor and DIMM memory modules and when mounting the mainboard in the chassis Also refer to this chapter to connect the floppy and hard disk drives SCSI drives the IDE interfaces the parallel and serial ports and the twisted wires for the power supply the reset button the keylock power LED the speaker and the key board If you encounter any problems read Chapter 3 which describes trouble shooting procedures for the video the memory and the setup configuration stored in CMOS For quick reference a general FAQ Frequently Asked Questions section is provided Instructions are also included for contact ing technical support In addition you can visit our web site at lt www supermicro com techsupport htm gt for more detailed information Chapter 4 includes an introduction to BIOS and provides detailed informa tion on running the CMOS Setup utility Appendix A gives information on BIOS error beep codes and messages Appendix B provides post diagnostic error messages SUPER P3TDLR User s Manual Table of Contents Preface About This Manual reco exe aE SE RE MEE iii Manual Organization ener e e eH pec eda o EC ER EP EHE a dd iii Chapter 1 Introduction T T OVOrvView ain et eee ee enm eie e erede Contacting Supermicro SUPER PSTDER Iiage sarios ore itte racer etg cit
71. t http www supermicro com Please check our BIOS warning message and the info on how to update your BIOS on our web site Also check the current BIOS revision and make sure it is newer than 3 3 SUPER P3TDLR User s Manual your BIOS before downloading Select your motherboard model and down load the BIOS file to your computer Unzip the BIOS update file and you will find the readme txt flash instructions the flash com BIOS flash utility and the BIOS image xxxxxx rom files Copy these files onto a bootable floppy and reboot your system It is not necessary to set BIOS boot block protec tion jumpers on the motherboard At the DOS prompt enter the command flash This will start the flash utility and give you an opportunity to save your current BIOS image Flash the boot block and enter the name of the update BIOS image file Note It is important to save your current BIOS and rename it super rom in case you need to recover from a failed BIOS update Select flash boot block then enter the update BIOS image Select Y to start the BIOS flash procedure and do not disturb your system until the flash utility displays that the procedure is complete After updating your BIOS please clear the CMOS then load Optimal Values in the BIOS Question After flashing the BIOS my system does not have video How can correct this Answer lf the system does not have video after flashing your new BIOS it indicates that the flashing pro
72. the lever You can also install a single processor on the motherboard without changing any jumper settings See Figure 5 4 for views of a 370 pin FCPGA socket before and after processor installa tion 2 5 SUPER PSTDLR User s Manual 2 Attaching heat sinks to the processors Two passive heat sinks one for each processor have been included with your SUPER P3TDLR Secure a heat sink to each processor with a suitable thermal compound to best conduct the heat from the processor to the heat sink Make sure that you apply the compound evenly and that good contact is made between the CPU chip the die and the heat sink Insufficient contact or improper types of heat sinks and thermal com pounds can cause the processor to overheat which may crash the system 4 Removing the processors To remove the processors from the motherboard simply follow the installation process in reverse order Figure 2 3 FCPGA Socket Empty and with Processor Installed low power Pentium lll shown Chapter 2 Installation 2 6 Installing Memory CAUTION Exercise extreme care when install AN ing or removing DIMM modules to prevent any possible damage The MEC must be populated in the manner described in Step 2 below 1 Memory support The P3TDLR supports 128 256 512 MB and 1 GB registered ECC SDRAM DIMMs PC133 and PC100 memory are both supported at their respective speeds However the memory bus is synchronized to the front side bus
73. ti word DMAO through DMA2 Select UDMAO trhough UDMAA to set Ultra DMAO through Ultra DMA4 S M A R T S M A R T stands for Self Monitoring Analysis and Reporting Technology a feature that can help predict impending drive failures The settings are Auto Disabled and Enabled Select Enabled or Disabled to enable or disable the S M A R T Select Auto to auto detect S M A R T 32Bit Data Transfer The settings are Disabled and Enabled Select En abled or Disabled to enable or disable the 32 bit Data Transfer function ARMD Emulation Type This option is used to select the emulation used when config uring an LS120 MO Magneto Optical or lomega Zip drive The settings are Auto Floppy and HardDisk 4 8 Chapter 7 BIOS Setup Primary IDE Slave When the system enters Setup BIOS automatically detects the presence of IDE devices This option displays the auto detection status of IDE de vices The settings for Primary IDE Slave are the same as those for the Primary IDE Master The default setting for this option is ATAPI CDROM Secondary IDE Master Secondary IDE Slave This displays the status of auto detection of IDE devices The settings for Secondary IDE Slave are the same as those for the Primary IDE Master The default setting for this option is Not Detected Hard Disk Write Protect This item allows the user to prevent the hard disk from being overwritten The options are Enabled or Disabled
74. ts a key that is held down Settings are Fast and Slow Fast This sets the rate the computer repeats a key to over 20 times per second Under normal opera tions this setting should not be changed Slow This sets the rate the computer repeats a key to under 8 times per second System Keyboard This option is to let the system know if a keyboard is Present or Absent Primary Display This option specifies the type of monitor display you have installed on the system The settings are Absent VGA EGA Color 40 x 25 Color 80 x 25 and monochrome Parity Check Use this option to either Enable or Disable the use of memory parity check ing Boot to OS 2 This option can be used to boot the system to an OS 2 operating system The settings are No and Yes 4 11 SUPER P3TDLR User s Manual Wait for F1 if Error This settings for this option are Enabled and Disabled Disabled This prevents the AMIBIOS to wait on an error for user intervention This setting should be used if there is a known reason for a BIOS error to appear An example would be a system administrator must remote boot the system when the computer system does not have a keyboard currently attached If this setting is set the system will continue to bootup into the operating system f F1 is enabled the system will wait until the BIOS setup is entered Enabled This option configures the system BIOS to wait for any error If an error is detected pressing F1 will
75. ude 5 and 7 Parallel Port Mode This option specifies the parallel port mode The settings for this item include Normal Bi directional EPP and ECP ECP Mode DMA Channel This option allows the user to set the setting for the ECP Mode of the DMA Channel The settings for this item include 0 1 and 3 IDE Configuration Onboard PCI IDE Controller This option allows the user to enable or disable the integrated IDE Control ler The settings include Disabled and Both Select Disabled to disable the Integrated IDE Controller Select Both to enable both Primary and Sec ondary IDE Controllers 4 6 Chapter 7 BIOS Setup Primary IDE Master When entering Setup BIOS automatically detects the presence of IDE devices This displays the auto detection status of the IDE de vices You can also manually configure the IDE drives by providing the following information This option allows the user to configure the IDE devices When the desired item is highlighted selected press lt Enter gt and the following screen will be displayed Type This option sets the type of device that the AMIBIOS attempts to boot from after AMIBIOS POST is completed The settings include Not installed Auto CDROM and ARMD The Auto setting allows BIOS to automatically detect the presence of the IDE controller LBA Large Mode LBA Logical Block Addressing is a method of addressing data on a disk drive In LBA mode the maximum dri
76. up main menu All Exit Setup options are described in this section The Exit Setup screen is shown below BIOS SETUP UTILITY Main Advanced Chipset PCIPnP Power Boot Security Exit Exit system setup with Exit Saving Changes saving the changes Exit Discarding Changes Load Optimal Defaults Load Fail Safe Defaults Discard Changes Select Screen Select Item Go to Sub Scree General Help Save and Exit Exit V02 03 C Copyright 1985 2000 American Megatrends Inc Exit Saving Changes Highlighting this setting and then pressing lt Enter gt will save any changes you made in the BIOS Setup program and then exit Your system should then continue with the boot up procedure Exit Discarding Changes Highlighting this setting and then pressing lt Enter gt will ignore any changes you made in the BIOS Setup program and then exit Your system should then continue with the boot up procedure 4 28 Chapter 7 BIOS Setup Load Optimal Defaults Highlighting this setting and then pressing lt Enter gt provides the optimum performance settings for all devices and system features Load Failsafe Defaults Highlighting this setting and then pressing lt Enter gt provides the safest set of parameters for the system Use them if the system is behaving errati cally Discard Changes Highlighting this setting and then pressing lt Enter gt will ignore any changes you made in the BIOS Setup program but will not
77. ve capac ity is 137 GB The settings are Disabled and Auto Select Disabled to disable LBA mode Select Auto to enable LBA mode if your device supports it and is not already formatted with the LBA mode Block Multi Sector Transfer Mode This option sets the block mode multi sector transfers option The settings include Disabled and Auto Disabled This op tion prevents the BIOS from using Multi Sector Transfer on the specified channel The data to and from the device will occur one sector at a time Auto This option allows the BIOS to auto detect device support for Multi Sector Trans fers on the specified channel If supported this option al lows the BIOS to auto detect the number of sectors per block for transfer from the hard disk drive to memory The data transfer to and from the device will occur multiple sectors at a time if the device supports it 4 7 SUPER P3TDLR User s Manual PIO Mode IDE PIO Programmable I O mode programs timing cycles be tween the IDE drive and the programmable IDE controller As the PIO mode increases the cycle time decreases The settings are Auto 0 1 2 3 and 4 DMA Mode This item allows the users to select the DMA mode The settings are Auto SWDMAO SWDMA1 SWDMA2 MWDMAO MWDMA1 MWDM2 UWDMAO UWDMAt UWDMA2 UWDMA3 and UWDMA4 Select Auto to auto de tect the DMA Mode Select SWDMAO through SWDMA to set single word DMAO through DMA2 Select MWDMAO through MWDMA to set Mul
78. y provided by SUPERMICRO This feature can prevent viruses from infecting the BIOS area and destroying valuable data Auto Switching Voltage Regulator for the CPU Core The auto switching voltage regulator for the CPU core can support up to 20A current and auto sense voltage IDs ranging from 1 4V to 3 5V This will allow the regulator to run cooler and thus make the system more stable 1 5 ACPI PC 98 Features ACPI stands for Advanced Configuration and Power Interface The ACPI speci fication defines a flexible and abstract hardware interface that provides a stan dard way to integrate power management features throughout a PC system including its hardware operating system and application software This enables the system to automatically turn on and off peripherals such as CD ROMs network cards hard disk drives and printers This also includes consumer devices connected to the PC such as VCRs TVs telephones and stereos In addition to enabling operating system directed power management ACPI pro vides a generic system event mechanism for Plug and Play and an operating system independent interface for configuration control ACPI leverages the Plug and Play BIOS data structures while providing a processor architecture indepen dent implementation that is compatible with both Windows 98 and Windows NT 1 11 SUPER P3TDLR User s Manual 5 0 Note To utilize ACPI you must reinstall Windows 98 2000 You can check to see if ACPI has
79. yboard and the PS 2 mouse are located on J28 See Table 2 13 for pin definitions The mouse port is above the key board port See Figure 2 12 Universal Serial Bus USB Two Universal Serial Bus connec tors are located on U38 USB1 is the bottom connector and USB2 is the top connector Refer to Table 2 14 for pin definitions Extra USB Connectors J105 J106 J105 is USB3 and J106 is USB4 You will need a USB cable not in cluded to use this connection Re fer to Table 2 14 for pin definitions LAN1 LAN2 Ports Two Ethernet ports designated NIC1 and NIC2 are located beside the VGA port on the I O backplane These ports accept RJ45 type cables There are two jumpers for the LAN1 LAN2 ports JP8 NIC 1 Enable Disable Open enable JP24 NIC2 Enable Disable Open enable Each indicate a success ful connection yellow and activ ity green SLED1 SCSI LED Indicator The SLED connector is used to pro vide an LED indication of SCSI ac tivity Refer to Table 2 15 for con necting the SCSI LED 2 13 Table 2 13 PS 2 Keyboard and Mouse Port Pin Definitions J28 Pin Number Definition 1 Data 2 NC 3 Ground 4 VCC 5 Clock 6 NC Table 2 14 Universal Serial Bus Pin Definitions USB1 USB2 Pin Pin Number Definition Number Definition 1 5V 1 5V 2 Po 2 Po 3 PO 3 PO 4 Ground 4 Ground 5 N A 5 Key RJ45 Ethernet Port Table 2 15 SLED1 SCSI LED Pin Defin

SuperMicro P3TDLR Motherboard

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