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Motorola APCO25 Scanner User Manual

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1. Figure 27 P30 Backplane Connector Pinout Rows to PENT ATCA 717 On Board Connectors Controls Indicators and Connectors Bee ed ef gh Be 26 PMC1_IO 28 PMCi IO 25 IO 30 1 2 PMC1 34 PMC1 IO 36 PMC1 IO 37 PMC1 IO 39 2 IO 42 PMC1 IO 44 PMC1 45 PMC1 IO 47 3 4 PMC1 52 PMC1 IO 54 1 53 PMC1 IO 55 4 5 PMC1 IO 61 PMC1 IO 63 PMC1 IO 62 PMC1 IO 64 5 6 PMC2 IO 29 PMC2 IO 31 2 33 2 IO 35 6 7 PMC2 IO 38 PMC2 IO 40 PMC2 41 PMC2 IO 43 7 8 PMC2 IO 46 PMC2 IO 48 PMC2 IO 49 PMC2 IO 51 8 9 PMC2 IO 58 PMC2 IO 60 PMC2 57 2 IO 59 9 j 12 VCC_RTM V3P3 RTM nc 1 0 Figure 28 P31 Backplane Connector Pinout Rows to D Jab cd ef gh T PMc 10 29 10 es PMCi IO 33 PMC1_10_35 1 2 PMC1 10 38 PMCI IO 40 PMCi 10 41 PMC IO 43 2 3 PMC1 IO 46 PMC1 IO 48 PMC1 IO 49 PMC1 IO 51 3 4 PMC1 IO 58 PMC1 IO 60 PMCi 57 PMC IO 59 4 5 2 10 26 2 IO 28 PMC2 10 25 PMC2 30 5 6 PMC2 10 34 PMC2 IO 36 PMC2 10 37 PMC2 10 39 6 7 PMC2 10 42 2 IO 44 PMC2 10 45 2 IO 47 7 8 PMC2 I0 52 PMC2 IO 54 PMC2 10 53 2 10 55 8 9 PMC2 IO 61 PMC2 IO 63 PMC2 10 62 PMC2 10 64 9 10 n c n c n c 10 Figure 29 P31 Backplane Connector Pinout Rows E to gt 10lvP12_RTM Figure 30 P32 Backplane Conne
2. 147 Serial PROM Update 147 Version Register bia erg Ata tetas Sead ea ha eed aide 147 Access Control Register sai ct sk ee are a a idles dade eU QS 148 PENT ATCA 717 I O and Memory Maps Maps and Registers and Memory Maps The following table shows the blade s main address map Table 14 Memory Address Map Base Address Size Device 0 000016 1 MByte Boot Flash FFE0 000016 1 MByte User Flash 0000 000016 Up to 4GByte Main Memory The I O addresses of all on board functional units are listed below Table 15 I O Address Map Device Base Address DMA Controller 1 00016 01F16 and 08016 09F16 Interrupt Controller 1 02016 03F16 Timer 04016 05F16 Keyboard Mouse 06016 06F16 Real Time Clock 07016 07F16 Port 80 08016 Interrupt Controller 2 0A04 6 0BF 16 DMA Controller 2 0C016 0DF16 IPMI Block Transfer Interface 1 0E4165 0E6416 IPMI Block Transfer Interface 2 0E8165 Glue Logic FPGA Index Register 10016 10116 Ethernet Switch Management Interface 15016 15516 Secondary Parallel 17046 17816 or 37616 37716 Primary Parallel ATA 1 016 1 816 3F616 716 Floppy Disk 3F046 3F516 COM 1 2F816 2FF16 or 2E816 2EF16 or 3E816 3EF 6 or 816 16 COM 2 2 816 2 16 or 2E816 2EF16 or 3E816 3EF16 816
3. 138 Buffer Register 3 2 44 lieu 2204 23 Deeb ean re 138 Interrupt Mask Register ie tede A bb GU RUE a ee ERR ERR 138 Port 80 Heglster ope DE EI 138 Ethernet Switch Management Registers 138 Command and Status Register 139 Data Heglsters eee evi ARE Baa RR b eg 139 Glock Divider here er a A ORG eh aren 139 I2C Control and Status Register 139 Reset Registers IIT RUE EIS 139 Flash Control and Status Register 141 EED Control Register alias alle 142 PMG Stat s Register 143 Shut Down Register Hals er area 143 Clock Synchronization Interface Registers 144 SPI Interface Registers 144 DPLL Input Select and Control Register 145 Reference Clock Source 5 145 Reference Clock Divider Registers 146 Reference Clock Pulse Width Register
4. 138 Table 22 Command and Status Register 139 Table 23 Reset Source 5 140 Table 24 Reset Mask Register pier ERO REA ML Eire M UE 140 Table 25 Miscellaneous Switch Status Register 141 Table 26 LED Control Register 142 Table 27 Status Register rane e ARA dae RR ARR 143 Table 28 Clock Synchronisation Interface Registers 144 Table 29 DPLL Input Select and Control Register 145 Table 30 Reference Clock Source Register 145 Table 31 Examples of Division Factors Between Recovered and Reference Clock 146 Table 32 Lower Divider Register 2 leise bh na i beg x REL 147 8 PENT ATCA 717 Table 33 Upper Divider 147 Table 34 Reference Clock Pulse Width Register 147 Table 35 Version Register 24 4 ut era lay ee ey peta EXTRA 148 Table 36 Access Control Register 148 PENT ATCA 717 9 Installation
5. 5 1 ss xia 1 ss TERM es TERM 1 3333353 Figure 21 P20 Backplane Connector Pinout Rows E to H 1 n c 2 FAB7 TX FAB7 TX 4 FAB6 TX 6 TX 5 n c 6 FAB5 TX 5 TX 7 n c 8 4_ 4_ 9 10 FAB3 TX FAB3 TX cd ef Em fnm en a TERM 2 FAB7 RX TERM RX6 2 FAB6 RX TERM RX5 2 5 RX TERM RX4 24 FAB4_RX TERM_RX3_2 FAB3_RX Figure 22 P22 Backplane Connector Pinout Rows A to D 76 CLK_2B CLK_3B TERM_RX3_UP TERM_RX1_UP TERM RX15 3 TERM RX15 1 TERM RX14 3 TERM RX14 1 TERM RX13 3 TERM RX13 1 TERM 2 FAB7 RX TERM RX6 2 6 RX TERM 5 2 5 RX TERM RX4 2 FAB4 RX TERM RX3 2 FAB3 RX _ 1 2 3 4 5 6 7 8 9 o 4 oo 10 4444 717 On Board Connectors Controls Indicators and Connectors cd ef gh 1 n c m RX7 34 2 TERM 7 14 3 n c TERM RX6 34 4 E ES Es 9 TERM_RXx6_1 5 n c Dale TERM_RX5_3 6 9 TERM 1 7 n c ES S E s Term na 3 8 lo ES 14 9 9 4 TERM_RX3_3 10 n c ES 9 Eee Term 14 Figure 23 P22 Backplane Connector Pinout
6. fect connect N dO oO are Started to pinter Connected 000035 E Free Viewer ART Procomm Plus Terminal QO aO Qe sum 2 Select Boot Device Priority A menu similar to the one shown in the following figure appears Note that the layout may vary slightly with new BIOS versions 88 PENT ATCA 717 Selecting The Boot Device BIOS x Eile Edit Setup Control Window Help PhoenixBIOS Betue Utilit Main Advanced ecurit it OO Removable Devices re Bee ee RE SanD lak PR SM e Add ards MHT2OGOBH 51 GE Slot 0120 v1226 OBETH GE Slot 8121 v1226 OBETH Keys used to view or conf igure devices lt Enter gt expands o collapses devices ih la ctrisEntero expands a lt Shift 1 gt enables or D CD IBA IBA Ne disables a device lt gt and lt gt moves the device up or down lt n gt May move removable device between Hard Disk or Removable Disk lt d gt Remove a device that is not installed Exit Select Menu Select gt Sub Menu Save and Exil X ROO EA E MES JE E N ES 3 Select the order of the devices from which BIOS attempts to boot the operating system If BIOS is not successful at booting from one device it tries to boot from the next device on the list If there is more than one device of the same type e g several hard disks the
7. 16 PENT ATCA 717 133 Maps and Registers I O and Memory Maps Device Base Address COM 3 2 816 2 16 or 2E816 2EF16 or 3E816 3EF16 or 816 16 4 2 816 2 16 or 2E816 2EF16 or 3E81 3EF16 or 816 16 134 717 Hardware Interrupts Hardware Interrupts Maps and Registers The following table lists the blade s hardware interrupts and the corresponding interrupt Sources Note All interrupts marked with an asterisk must not be used for PCI interrupt routing Table 16 Hardware Interrupts Interrupt IRQO IRQ1 IRQ2 IRQ3 IRO4 5 IRQ6 IRQ7 IRQ8 IRQ9 IRQ10 IRO11 IRO12 IRO13 IRO14 IRQ15 PENT ATCA 717 Interrupt Source Timer Keyboard Input of interrupt controller 2 COM 2 or COM 4 COM 1 COM 3 IPMI Block Transfer interface PCI Real time clock PCI PCI PCI Reserved or Mouse PS 2 Coprocessor Reserved or primary parallel ATA Reserved or secondary parallel ATA 135 Maps and Registers PCI Devices PCI Devices The following figure shows the on board PCI device structure PMC 1 Dev No 3 PMC 2 Dev No 2 PCI I O Bridge Dev No 1 Host Bridge Dev No 2 South Bridge Dev No 4 Dev No 30 Intel Bus 2 _82540EM Dev No 4 Bus 1 Intel 82546EB GB ETH 0 1 Dev No 28 Dev No 4 ETH 0 1 Figu
8. CBE Rd BE ENTIRE id dus 84 Connecting to the Blade 85 BIOS Crisis Recovery Mode 86 Changing Configuration Settings 87 Selecting The Boot Device 88 Via Boot Selection Men ess seers e Rer ep LU KU RS ORAN S odas 89 PENT ATCA 717 Restoring BIOS Default Settings 91 Updating BIOS nn een 92 BIOS Messages ran ee an 93 BIOS P st Codes san a ea 96 5 Devices Features and Data Paths BIOCK und 105 ee er re ee aa 106 Host Bridge iio digi Ra ran 107 FIOSEEINLELTACE inana piain Te aet tend 107 Memory Interface ueri teure Sb ee 107 H b Int rfaees 512 134 tL a re 107 South BRAGS einen 108 Interrupt Controller uer reb ee gd 108 RealsTime Glock 2 ha a 109 Watchdog eid Ae Bene 109 PGl X Interface si ee rar iae ba ib X rad CIUS AAAR d a OA 109 Parallel ATA Interfaces a ea e CIR ao RR aet og atat gob RON d 109 P
9. 43 91 Serial Console Redirection 84 Update Aut 92 Blade accessories 33 Blade installation Into non powered shelves 55 Into powered shelves 54 Blade removal From non powered shelves 56 From powered shelves 55 Blade revisions 33 Blade variants 33 Boot flashes Backup boot flash 113 Boot flash Selection 113 Control registers 141 Default bootflash 113 C Cable accessory 5 57 Clock synchronization interface Control registers 144 154 PENT ATCA 717 Main features 124 Compact flash disk 50 COM ports 110 112 Configuration switches 42 D Debug module 52 E Environmental Requirements 37 Ethernet switching unit Main features 128 Management interface 128 Switch management registers 138 F FPGA Main features 115 Redundancy feature 115 Registers un 137 H Hard disks Parallel ATA connector pinout 67 Serial ATA connector pinout 69 Supported types 49 Host Bridge rere RR IE ERAS IEEE 107
10. 46 PMC 48 n c PMC IO 52 PMC 54 n c PMC 58 PMC 60 PMC IO 62 PMC 64 Figure 13 PMC Sites 1 and 4 Pn4 Connector Pinout Diff Pair 4 Diff Pair Diff Pair Diff Pair Diff Pair Diff Pair Diff Pair Diff Pair Diff Pair Diff Pair 60 Diff Pair Diff Pair PENT ATCA 717 On Board Connectors Controls Indicators and Connectors r 1 ETHA ETHA_DC Diff Pair ETHA DA ETHA DC Pair GND GND ETHA DB ETHA DD Diff Pair DB DD Pair GND GND ETHB DA ETHB DC Diff Pair ETHB DA ETHB DC Pair GND GND ETHB_DB ETHB_DD Diff Pair ETHB DB ETHB DD Pair NETREF n C PMC IO 25 PMC IO 26 PMC 28 Pair PMC IO 29 8 Aor PMC IO 30 CLK8 B or PMC IO 31 33 IO 34 Diff Pair 35 36 Pair 37 PMC 38 Diff Pair 39 40 Pair 41 42 Diff Pair PMC_IO_43 PMC IO 44 Pair 45 46 Diff Pair PMC IO 47 PMC IO 48 Pair 49 n c Diff Pair PMC 51 PMC IO 52 iff Pair Diff Pair 53 54 55 57 58 Diff Pair 59 60 Pair 6t 62 Diff Pair PMC 10 63 PMC IO 64 Pair Fig
11. 66 PMC Sites 2 and Pn4 Connector Pinout 67 Location of Parallel ATA Connector 68 Parallel ATA Connector Pinout 69 Location of Serial ATA 70 Location of CMC Connector 72 P10 Backplane Connector Pinout 75 P20 Backplane Connector Pinout Rows Ato D 76 P20 Backplane Connector Pinout Rows E to H 76 P22 Backplane Connector Pinout Rows Ato D 76 P22 Backplane Connector Pinout Rows EtOH 77 P23 Backplane Connector Pinout Rows Ato D 77 P23 Backplane Connector Pinout Rows E to H 77 P30 Backplane Connector Pinout Rows Ato D 78 P30 Backplane Connector Pinout Rows E to H 78 P31 Backplane Connector Pinout Rows Ato D 79 P31 Backplane Connector Pinout Rows E to H 79 P32 Backplane Connector Pinout Rows Ato D 79 P32 Backplane Connector P
12. Allnumbers are decimal numbers except when used with the notations described below Typical notation for hexadecimal numbers digits 0 through F e g used for addresses and offsets Same for binary numbers digits are 0 and 1 Generic use of a letter Generic use of numbers Decimal number Used to emphasize a word Used for on screen output Used to characterize user input For references table and figure descriptions Notation for variables and keys Notation for buttons and optional parameters Repeated item example A1 A2 A3 A12 No danger encountered Pay attention to important information Possibly dangerous situation slight injuries to people or damage to objects possible PENT ATCA 717 Notation Danger gt Abbreviations Abbreviation A AC ANSI API APIC ATA ATCA BIOS BMC CMC CMOS CPU DDR DMA DPLL DRAM ECC EMC EN ESCD ESD FAE PENT ATCA 717 Description Dangerous situation injuries to people or severe damage to objects possible Description Alternating Current American National Standards Institute Application Programming Interface Advanced Programmable Interrupt Controller Advanced Technology Attachment Advanced Telecommunications Computing Architecture Basic Input Output System Base Board Management Controller Common Mezzanine Card Complementary Metal Oxide Semiconductor Central Processing Unit Double Data Rate Direct Memory Access
13. Changing Configuration Settings BIOS Changing Configuration Settings When the system is turned on or rebooted the presence and functionality of the system components is tested by POST Power On Self Test Press lt F2 gt when requested The main menu appears It looks similar to the menu shown in the following figure Note that the layout may slightly vary with new BIOS versions Mere Tem atit Eile Edit Options Data Tools Window Help al ef eid lev Advanced _ Security Boot Exit DDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDD DDB un 00000 ecific RTCR 717 8 8 6 lele onp 85 28 84 Tab lt Shift Tab gt or 3 yste Iss 3 Enter selects field Systen Date 72872084 Legacy Diskette A 1 4471 25 3 IDE Channel Master None ID annel 8 Slave IDE Channel 1 Master IDE Removable IUE Channel 1 Slave Hone IDE Channel 2 Master IDE Channel 3 Master Mone Systen llenory 648 KB Extended Memory 1047848 KB I Enter Alt Host Chat Logoriwiz WinLink Mode Send Fax Explorer DOS Prmpt vri00 Asc direct connect Comt 9600 N84 4 cts 326PM File Menu Connected 00 01 22 Mitar 4 Free viewer Procomm Plus Terminal QU am Figure 32 Main Menu Note Make sure that BIOS is properly configured prior to installing the operat
14. Devices Features and Data Paths Block Diagram u ae a u REA EE RR ERE ERR Hn 105 CPU docu clic ML ELI 106 HOSE BEIdGE ee ER 107 Host Interface uo oni p RE ua S Eu wih Yer 107 Memory Interface u de ee CL 107 Hubilnterfaces aa Na Cw CC otn da v a d e d n 107 South Bridge iier 236 C Cres ucc ne eoa ACER a RACIO 108 Interrupt Controller 2 4 ET ELDER nest er qe t Ka CE DX REEL 108 Reals Time rendered tat dei PAL OT haeret edt aed rg te 109 Watchdog tese nce ntes Ded eie hate Tr e ET DERE DG ERES ae te PES 109 PGISX Interface ii sire red 109 Parallel ATA Interfaces oui ek Re y ana ana ann CAE GC De YT 109 Primary Parallel ATA Interface sues ues e e xe pex 109 Secondary Parallel ATA Interface 110 USB Interfaces 22 C Re ade dd E asse s MOT ues a A 110 PGLInterface an rsa ea DR Se a Mr a LR 110 Serial ATA Interfaces a RUN E RON I Red Ea rra ed 110 Serial RS232 Interfaces ora ev ee ARE AR Eae a A 110 LG LCT ACCS rx ee cet eat hoe A 110 SMBus Interface 1 eee a bdo tle abdo ep cO Ped eo oA oci ed e 111 SUDOF T G una eii
15. IDE1_RST GND IDE1_D7 IDE1_D8 IDE1_D6 IDE1_D9 IDE1_D5 IDE1_D10 IDE1 04 IDE1 D11 IDE1 D3 IDE1 D12 IDE1 D2 IDE1 D13 IDE1 D1 IDE1 014 IDE1 DO IDE1 D15 GND KEY IDE1 DREQ GND IDE1 GND IDE1_lOR GND IDE1 IORDY IDE1 CSEL IDE1_DACK GND IDE1_INT IDE1_A1 IDE1_CBLID IDE1_AO IDE1_A2 IDE1_CSO IDE1_CS1 IDE1_DASP GND 5V 5V GND n C Figure 16 Parallel ATA Connector Pinout Serial ATA Connector The blade provides one Serial Advanced Technology Attachment SATA connector which allows to connect a hard disk to the blade The location of the SATA connector is shown in the following figure PENT ATCA 717 69 On Board Connectors Controls Indicators and Connectors Serial ATA Connector ATENA PRs M e Figure 17 Location of Serial ATA Connector The pinout of the SATA connector is given in the following figure 70 PENT ATCA 717 On Board Connectors Controls Indicators and Connectors GND 1 SATAO_TX SATAO_TX GND SATAO_RX SATAO_RX GND 7 NOoRON 1 2 3 4 5 6 7 8 9 CMC Module Connector The blade provides one CMC connector which allows to connect a CMC debug module to the blade A CMC debug module is available as accessory kit for the blade The CMC module uses the same mounting holes as PMC slot 4 P
16. 62 PENT ATCA 717 Face Plate USB 1 Figure 10 Location of USB Connectors Their pinout is given below 5V USB X D USB X n c GND Figure 11 Face Plate USB Connector Pinout PENT ATCA 717 Controls Indicators and Connectors 63 Controls Indicators and Connectors On Board Connectors On Board Connectors The blade provides the following on board connectors CompactFlash PMC Parallel ATA Serial ATA CMC ATCA backplane connectors Note The blade may provide further on board connectors These are used for debug purposes only and are therefore not documented in this guide CompactFlash The CompactFlash connector is standard and is therefore not further described in this guide PMC The blade provides the four PMC sites PMC 1 to PMC 4 For each PMC site the four PMC connectors 1 to Pn4 are provided See the following figure 64 PENT ATCA 717 On Board Connectors Controls Indicators and Connectors EAM WES NN 2 Amin Cannan Figure 12 Location of PMC Connectors Pn1 to Pn4 The connectors Pn1 to Pn3 implement the PMC pinouts as specified by the IEEE P1386 1 standard Therefore they are not documented in this guide The connector Pn4 contains PMC I O signals and is described in the following Pn4 carries the following types of signals
17. Figure 1 Figure 2 Figure 3 Figure 4 Figure 5 Figure 6 Figures Location of Critical Blade Temperature Spots Blade Top Side 39 Location of Critical Blade Temperature Spots Blade Bottom Side 40 Location of On board Switches 42 Location Of PMC SIOIS as einer eben e bn e T Lee aC o wie 47 Location of On Board Hard Disk 49 Location of CompactFlash Disk Connector 51 Controls Indicators and Connectors Figure 7 Figure 8 Figure 9 Figure 10 Figure 11 Figure 12 Figure 13 Figure 14 Figure 15 Figure 16 Figure 17 Figure 18 Figure 19 Figure 20 Figure 21 Figure 22 Figure 23 Figure 24 Figure 25 Figure 26 Figure 27 Figure 28 Figure 29 Figure 30 Figure 31 BIOS Figure 32 Figure 33 Face Plate eb RSV eder Po wea LR ee ee e s 59 Location of Face Plate LEDs 60 Location of Reset Key ede dis enii E RERUM a eR 62 Location of USB Connectors 63 Face Plate USB Connector 63 Location of PMC Connectors Pn1 to Pn4 65 PMC Sites 1 and 4 Pn4 Connector Pinout
18. NETREF A YNC 1 SYNC 1 Clock SYS CLK_A SYNC 2 Buffer SYNC 3 1111 RCVD CLK 0 RCVD CLK 1 RCVD CLK 2 RCVD CLK 3 NET REF v wv wv Figure 38 Clock Synchronization Building Block The key component of the clock synchronization building block is the DPLL device ACS8525 from Semtech Its main features include Software programmable output clock synthesis CLK 0 1 2 3 PENT ATCA 717 Clock Synchronization Interface Devices Features and Data Paths 8kHz frame clock pulse with programmable pulse width and polarity SYNC 0 1 2 3 e Automatic hit less switch over if one system clock fails e Activity monitor for system clocks Phase build out for output clock phase continuity during switch over Meets jitter requirements up to OC 3 line rates Programmable reference clock divider The DPLL is clocked by an external oscillator running at 12 8 MHz Two clock buffers provide a separate clock and synchronization signal for each of the four on board PMC sites The FPGA contains extensions which are related to the clock synchronization building block Some of these extensions include registers that are accessible via the host and which allow to control and monitor the functionality of the clock synchronization building block For details refer to section Clock Synchronization Int
19. e Power signals GND e Clock signals NETREF Signals routed to on board Ethernet switch e Signals routed to RTM IO 7 Part of the signals that are routed to the on board switch and RTM with the exception of PMC IO 25 26 28 29 30 and 31 are grouped into length matched differential pairs of 100 impedance PENT ATCA 717 65 Controls Indicators and Connectors 66 On Board Connectors On the PMC sites 1 and 4 two Ethernet ports signals named ETH _ are routed to the on board switch On the PMC sites 2 and 3 only one port is routed to the on board switch The following two figures show the connector pinouts Diff Diff Diff Diff Diff Diff Diff Diff Diff Diff Diff Diff Pair Pair Pair Pair Pair Pair Pair Pair Pair Pair Pair Pair n c n c n c n c n c GND ETHB DA ETHB DA GND ETHB DB ETHB DB NETREF PMC IO 25 n c PMC IO 29 CLK8 Bor PMC IO 31 33 35 37 PMC IO 39 PMC IO 41 43 45 47 PMC IO 49 PMC 51 PMC 53 55 57 59 61 63 n c n c n c n c n c GND ETHB DC ETHB DC GND ETHB DD ETHB DD n c PMC IO 26 PMC 28 CLK8 Aor IO 30 n c PMC IO 34 PMC IO 36 PMC 38 PMC 40 PMC 42 PMC IO 44 PMC
20. 15 PENT ATCA 717 145 Maps and Registers FPGA Registers Bit Description Default Access 4 Enable reference clock CLK3_A 05 r w 0 Disabled 1 Enabled 5 Enable reference clock CLK3 B 05 r w 0 Disabled 1 Enabled 6 Selects if clock divider is bypassed 15 r w 0 Divide clock 1 Bypass divider 7 Selection between pulse clock on 12 r w REF CLK output signal 0 Pulse enabled 1 Pulse disabled Reference Clock Divider Registers 146 The FPGA contains a clock divider which can be used in systems where the reference clock frequency does not match the recovered clock frequency The clock divider is able to scale down a recovered clock frequency to the desired reference clock frequency The scale down grade can be controlled via the upper and lower reference clock divider registers described in this section Both registers correspond to the upper and lower divider of the division factor between recovered and reference clock The division factor can be changed by software at any time The new division factor becomes active with any new clock cycle avoiding spikes or truncated clock cycles A plausibility check of register values is not required Examples of recovered and reference clock frequencies and the corresponding division factors are given in the following table Table 31 Examples of Division Factors Between Recovered and Reference Clock Recovered Clock Frequency Reference Clock Frequency Division Factor 8 KHz 8 KHz 1 1 544 M
21. 44 Switch SW4 1 SW4 2 SW4 3 SW4 4 SW7 1 SW7 2 Switch Settings Description Note the routing described above is only applicable to BIOS versions 2 0 0 Earlier BIOS versions used a different routing For further information refer to the PENT ATCA 715 717 7105 7107 BIOS Information Sheet which can be downloaded from the former Force Computers S M A R T server or the Motorola literature catalog web site Note The COM port swapping can also be enabled via a System Boot Option IPMI command COM port swapping is enabled if either the switch or the IPMI command or both enable it For further details about the System Boot Option IPMI command refer to the PENT ATCA 715 717 7105 7107 Control via IPMI Programmer 5 Guide Backup boot flash boot block write protection OFF Write enabled default ON Write disabled For details on the flash devices and the blade s redundant BIOS feature refer to section Flash Devices on page 113 Default boot flash boot block write protection OFF Write enabled default ON Write disabled For details on the flash devices and the blade s redundant BIOS feature refer to section Flash Devices on page 113 Reserved default OFF Backup boot flash data instruction block write protection OFF Write enabled default ON Write disabled For details on the flash devices and the blade s redundant BIOS feature refer to section Flash Devices on page 113 Routing of PMC slot
22. Clock Synchronization Interface on page 124 and section Clock Synchronization Interface Registers on page 144 Reset Controller The FPGA contains part of the blade s reset logic Furthermore it provides two registers which allow to determine the source of the last reset issued and to mask resets Reset Types Two different types of resets are possible hard resets and soft resets 116 PENT ATCA 717 FPGA Devices Features and Data Paths During a hard reset all internal registers state machines and caches of the CPU are reset Furthermore all on board PCI devices as well as the host bridge are reset During a soft reset the CPU is reset with the exception of the internal caches and state machines Reset Sources The following table lists all possible reset sources and the corresponding reset types Table 10 Reset Sources Reset Source Hard Reset Soft Reset Software reset x x Watchdog inside Southbridge x Power up reset x Face plate reset key x RTM reset x IPMC reset x Keyboard reset x Interrupt Routing Unit The FPGA is used for fixed interrupt routing on the blade All interrupts from PCI devices are routed via the FPGA to the South Bridge All other interrupts are routed to the Super I O device from where they are routed to the South Bridge Miscellaneous Glue Logic The miscellaneous glue logic includes e Serial interface e Reset mask and source register Flash control register PMC status regis
23. address map 133 IPMI Blade Structure 119 Block transfer interface registers 138 Block Transfer Interfaces 116 Sensors cssc ee 120 L LEDs Control registers 142 Hotswap LED 61 Out Of Service LED 60 Payload power status 60 Redundancy status 60 Serial parallel ATA activity 61 M Main features 31 PENT ATCA 717 155 N Non maskable interrupts 108 On board Battery 152 Order 5 33 P PCI devices 136 PCI Structure vu ans ied area 136 PMC modules Performance limitations 47 PMC connector pinout 64 PMC I O routing 66 Status registers 143 Power consumption 40 Power requirements 40 Power supply module 126 Product name nomenclature 33 R Real time clock 109 Rear transition modules 53 Reset mask register 139 Reset source register 139 S Serial 110 112 SMBus Device Addresses 111 SM
24. und umgekehrt Pr fen Sie deshalb immer ob die Leitung spannungsfrei ist bevor Sie Ihre Arbeit fortsetzen um Sch den oder Verletzungen zu vermeiden PENT ATCA 717 25 Schaltereinstellungen Fehlfunktion des Blades Schalter die mit Reserved gekennzeichnet sind k nnen mit produktionsrelevanten Funktionen belegt sein Das ndern dieser Schalter kann im normalen Betrieb St rungen ausl sen Verstellen Sie nur solche Schalter die nicht mit Reserved gekennzeichnet sind Pr fen und ndern Sie die Einstellungen der nicht mit Reserved gekennzeichneten Schalter bevor Sie das Blade installieren Besch digung der Blade Das Verstellen von Schaltern w hrend des laufenden Betriebes kann zur Besch digung des Blades f hren Pr fen und ndern Sie die Schaltereinstellungen bevor Sie das Blade installieren Umweltschutz Entsorgen Sie alte Batterien und oder Blades stets gem der in Ihrem Land g ltigen Gesetzgebung wenn m glich immer umweltfreundlich PMC Module 26 Begrenzte Leistung auf dem PMC Modul und RTM Das Blade verfuegt ueber keine Sicherung fuer PMC Module und RTMs PMC Module und RTMs die zusammen mit dem Blade eingesetzt werden muessen gemaess den folgenden Standards qualifiziert sein IEC 60950 1 EN 60950 1 UL 60950 1 CAN CSA C22 2 No 60950 1 Ueberschreitung der zulaessigen Leistungsaufnahme des Blades Wird die maximal zulaessige Leistungsaufnahme fuer alle installierten PMC Module zusammen u
25. 83 84 Description Test keyboard Set key click if enabled Enable USB devices Test for unexpected interrupts Initialize POST display service Display prompt Press F2 to enter SETUP Disable CPU cache Test RAM between 512KB and 640KB Test extended memory Test extended memory address lines Jump to UserPatch1 Configure advanced cache registers Initialize Multi Processor APIC Enable external and CPU caches Setup system management mode SMM area Display external L2 cache size Load custom defaults optional Display shadow area message Display possible high address for UMB recovery Display error messages Check for configuration errors Check for keyboard errors Set up hardware interrupt vectors Initialize Intelligent System Monitoring Initialize coprocessor if present Disable onboard super I O ports and IRQ s Late POST device initialization Detect and install external RS232 ports Configure non MCD IDE controllers Detect and install external parallel ports BIOS Post Codes PENT ATCA 717 BIOS Post Codes BIOS Post Code 85 86 87 88 89 8A 8B 8C 8F 90 91 92 93 95 96 97 98 99 9A 9C 9D 9E 9F A0 A2 A4 8 Description Initialize PC compatible PnP ISA devices Reinitialize onboard I O ports Configure motherboard configurable devices optional Initialize BIOS data area Enable non maskable interrupts NMI s Initialize extended BIOS data area Test and initialize
26. Control via IPMI Programmer s Guide which can be downloaded from the Motorola literature catalog PENT ATCA 717 119 Devices Features and Data Paths Intelligent Platform Management Controller Sensors The blade provides various sensors which are accessible via IPMI Some of these sensors measure on board temperatures Their names and locations are shown in the following figure Memory Temp CPU Board Temp other side of PCB CPU Die Temp 12V DCDC Temp Ambient Temp Figure 37 IPMI Temperature Sensors Other sensors available on board include voltage sensors and sensors which provide particular status information A summary of all sensors is given in the following table 120 PENT ATCA 717 Intelligent Platform Management Controller Devices Features and Data Paths Table 11 On board Sensors Accessible via IPMI Sensor Name Type of What Does It Measure Sensor Type Availability Measurement Ambient Temp Temperature Ambient temperature near Compact Analog Always flash connector Memory Temp Temperature Temperature of on board memory Analog Always CPU Board Temp Temperature Board temperature near the CPU Analog Always CPU Die Temp Temperature CPU temperature Analog Always Voltage 1 8V Voltage 1 8V voltage level Analog While Payload power
27. FPGA The initial value is and is counted down with each new release PENT ATCA 717 147 Maps and Registers FPGA Registers Table 35 Version Register Bit Description Default Access 7 0 FPGA version at the time of r writing this guide Access Control Register This register determines the current owner of the following interfaces Clock synchronisation building block interface e Ethernet switch management interface e SPROM update interface The current owner of each interface is either the IPMC or the host CPU Only the current owner has write access to the corresponding registers The non proprietor has only read access If the non proprietor wants to become owner it has to request ownership from the current owner The current owner then has to grant ownership by inverting the bit corresponding to the interface Table 36 Access Control Register Bit Description Default Access 0 Indicates the current owner of the clock 05 r w synchronisation building block interface 0 Host 1 IPMC 1 Indicates current owner of Ethernet switch 15 r w management interface 0 Host 1 IPMC 2 Indicates the current owner of the SPROM 02 r w update interface 0 Host 1 IPMC 7 Reserved 000005 148 717 A Troubleshooting PENT ATCA 717 149 Troubleshooting Error List Error List A typical ATCA system is highly sophisticated This chapter can be taken as an error list for detecting erro
28. POST status PCI bus status Sensor Type Availability Analog Analog Discrete Discrete Discrete Analog Discrete Discrete Discrete Discrete Discrete Discrete While Payload powered ON While Payload powered ON While Payload powered ON While Payload powered ON While Payload powered ON While Payload powered ON While Payload powered ON Always Always Always While Payload powered ON While Payload powered ON PENT ATCA 717 Intelligent Platform Management Controller Sensor Name 715 FPGA Version FW Revision ISCO FW Revision ISC1 715 IPMC SYS FW PROGRESS Boot Error Supply Current 12V DCDC Temp Type of Measurement Version Revision Revision Status Status Status Current Temperature What Does It Measure FPGA version of ATCA 715 Revision of the Intelligent Slave Controller 0 ISCO firmware Revision of the Intelligent Slave Controller 1 ISC1 firmware IPMC status BIOS boot progress BOOT error 12V payload current Devices Features and Data Paths Sensor Type Availability Discrete Discrete Discrete Discrete Discrete Discrete Analog Temperature at 12V DC DC converter Analog Always after payload has first been powered ON Always Always Always While Payload powered ON While Payload powered ON While payload powered ON While payload powered ON For
29. PS 2 mouse Initialize floppy controller Determine number of ATA drives optional Initialize hard disk controllers Initialize local bus hard disk controllers Jump to UserPatch2 Build MPTABLE for multi processor boards Install CD ROM for boot Clear huge ES segment register Fixup multi processor table Search for option ROM s Check for SMART drive optional Shadow option ROM s Set up power management Initialize security engine optional Enable hardware interrupts Determine number of ATA and SCSI drives Set time of day Check key lock Initialize typematic rate Erase F2 prompt Scan for F2 key stroke Enter setup Clear boot flag PENT ATCA 717 99 BIOS BIOS Post Codes Post Code Description BO Check for errors Bl Inform RomPilot about the end of POST B2 POST done prepare to boot operating system B4 One short beep B5 Terminate QuietBoot optional B6 Check password B7 Initialize ACPI BIOS B9 Prepare boot BA Initialize DMI parameters BB Initialize PnP option ROM s BC Clear parity checkers BD Display multiboot menu BE Clear screen BF Check virus and backup reminders C0 Try to boot with interrupt 19 C1 Initialize POST Error Manager PEM C2 Initialize error logging C3 Initialize error display function C4 Initialize system error handler C5 PnP dual CMOS optional C6 Initialize notebook docking optional C7 Initialize notebook docking late C8 Motorola check optional C9 Extended
30. Powered Shelves 54 Installation in Nonpowered Shelves 55 Cable Accessory Kits coureurs nn nn weed 57 AGG CABEE PMCO RJU 45 1X Ara a oe aes ae ebur mori ded en Regu 57 AGG CABLE RJ45 DSUB Habe tetto deu e e Ed tee T 57 AGG CABLE USB zn see Eee a o ete o ION DP ODDO ERR duree TIR a 57 Controls Indicators and Connectors Plate rs ec 59 Hp cT 59 KeyS Date a ster eg SE tea e ga sax aM UM ear sehe 61 Connec S sa risa sa t ean Ua isa Ta NUS Tu a TE 62 On Board Connectors ouis veros RE RE Ro ERR Urat a acd nie Roe BR 64 GompaciFlash ea ee 64 PMG xxu Iq ue xb EE V dae Re ie Ee E ed 64 Parallel ATA Connector i ar ova a a APR ARRA 67 Serial ALA CONECO a eot sei anu ergehen 69 2 er aet A eO CIE br br ed de 71 AdvancedTCA Backplane Connectors 73 BIOS Introductlon 82 Serial Console Redirection 84 Requirements ru aaa siete bela ni ore 84 Default Configuration tasna
31. and Datapaths gt FPGA in switch setting description and Flashes section renamed boot flash to default flash and user flash to backup flash extended description of redundant flash feature in standard compliances section added note on NEBS compliance and grounding adapted figures showing the blade face plate to new Motorola face plate added note to section Updating BIOS updated list of IPMI sensors in section Intelligent Plattorm Management Controller in section Switch Settings extended description of Clear CMOS RAM and Serial COM port swapping switch extended section BIOS gt Serial Console Redirect gt Default Configuration added section About this Manual PENT ATCA 717 Order No 6806800A15A PENT ATCA 717 Rev Date April 2006 Description Created separate manual for blade used in AXP systems Changed parallel ATA connector pinout modified description of on board switches SW4 1 SW4 2 SW4 4 default settings were changed updated description of Ethernet switch configuration new routing updated PMC Pn4 pinout description extended description of face plate LEDs updated description of P23 backplane connector pinout added section BIOS gt Crisis Recovery Mode updated on board switch description crisis recovery switch no more reserved changed location of two temperature sensors and adapted list of IPMI sensors removed references to full mesh routing no longer an availab
32. are Intel compatible firmware hubs that are connected to the LPC interface of the South Bridge Each flash device has a unique four bit LPC device ID Bit 1 to 3 of the device ID are fixed to 0 Bit 0 is controlled by a boot flash select signal provided by the IPMC in such a way that bit 0 of one flash is set to 0 while bit 0 of the other flash is set to 1 and vice versa The following figure shows the implementation on hardware level Default Boot Boot Flash Select Signal Figure 35 Boot Flash LPC Device ID Control The blade s CPU always boots from the boot flash with the LPC device ID 0 Thus the boot flash select signal of the IPMC allows to select the flash device that the CPU is to boot from An IPMI Set System Boot Options command allows to control the boot flash select signal and thus select between the default and backup boot flash as device to boot from For details refer to the PENT ATCA 715 717 7105 7107 Control via IPMI Programmer 5 Guide which can be downloaded from the former Force Computers S M A R T server or the Motorola literature catalog By default the data instruction areas of the default and backup boot flash are writable This is necessary because during booting the BIOS writes some configuration data back to PENT ATCA 717 113 Devices Features and Data Paths Flash Devices some reserved spaces in the data instruction area The boot block of default and backup boot flash are writeable per default too
33. connected to the South Bridge and provides a maximum data transfer rate of 266MByte s Parity protection is provided for hub interface A Any parity errors are detected by the host bridge and reported to the South Bridge which in turn generates an NMI The hub interfaces B C and D are octal pumped 16 bit wide and run at 66 MHz The maximum data transfer rate provided by each hub interface is 1 066 GByte s ECC protection is provided for hub interfaces B C and D Any ECC errors are detected by the host bridge and reported to the South Bridge which in turn generates an NMI PENT ATCA 717 107 Devices Features and Data Paths South Bridge South Bridge The used South Bridge is an Intel 6300ESB 1 O controller hub device It provides the interface between the Host Bridge and the legacy I O Integrated into the South Bridge are e Two 8237 DMA controllers One 8254 counter timer Interrupt controller Real time clock Watchdog The interfaces provided by the South Bridge include interface 1 5 e PCI2 2 interface e PCI X 1 0 interface Two parallel ATA interfaces Two serial ATA interfaces Two serial RS 232 interfaces e Four USB interfaces LPC interface SMBus interface Interrupt Controller The interrupt controller residing in the South Bridge is 8259A compliant and runs in PIC mode The interrupts of the four PMC slots are merged and are routed through an FPGA to the interrupt
34. controller where they are mapped to ISA compatible interrupts The interrupt controller is also able to generate CPU Non Maskable Interrupts NMIS Possible sources of NMIS are Memory ECC and parity errors 108 PENT ATCA 717 South Bridge Devices Features and Data Paths e Hub interface ECC and parity errors e PCI bus parity errors Real Time Clock The Real Time Clock RTC resides inside the South Bridge and is sourced by an external 32 768 crystal providing a frequency tolerance of 20 ppm The RTC provides 242 bytes backed up CMOS RAM and is fully compliant to 051287 MC14618 e Y2K e PC87911 Watchdog The Southbridge incorporates a two stage watchdog timer For details refer to the Intel 6300ESB I O controller documentation On expiry the watchdog is able to issue a blade reset PCI X Interface The PCI X interface is 64 bit wide and runs at 66 MHz It is compliant to the PCI X 1 0 specification On the board 3 3V signalling level is used and an 82546EB GB dual Ethernet controller is connected to the PCI X interface Parallel ATA Interfaces The South Bridge provides two separate parallel Advanced Technology Attachment ATA interfaces one primary and one secondary parallel ATA interface Both interfaces support all Programmed I O PIO modes as well as all Direct Memory Access DMA modes up to Ultra ATA 100 The combined parallel and serial ATA interface traffic is indicated by a face plate LED P
35. e PXE2 0 PENT ATCA 717 BIOS 83 BIOS Serial Console Redirection Serial Console Redirection The firmware of the blade provides a serial console redirection feature This allows remote blade configuration by connecting a terminal to the blade via a serial communication link The terminal can be connected to display VGA text information Terminal keyboard input is redirected and treated as a normal PC keyboard input The serial console redirection feature can be configured via setup utility Note If serial console redirection is enabled the terminal represents an option and is not necessarily required for boot up procedure Requirements For serial console redirection the following is required Terminal which supports a VT100 or ANSI mode e NULL modem cable Terminal emulation programs such as TeraTermPro can be used In order to use TeraTermPro via the function keys the keyboard configuration file of TeraTermPro has to be modified as follows Table 8 Key Codes for Terminal Emulation Program Function Key Key Code PF1 59 PF2 60 Default Configuration By default the blade can be accessed via the serial interface COMI This interface is by default accessible via an installed RTM through an RJ 45 connector If no RTM is present or you wish to access COMI from the blade s face plate COMI can alternatively be made accessible at an installed module Whether COMI is available via or module depends on
36. for PMC modules and RTMs PMC modules and RTMs used together with the blade have to be qualified according to the following standards IEC 60950 1 EN 60950 1 UL 60950 1 CAN CSA C22 2 No 60950 1 Excession of blade s power consumption Exceeding the maximum combined power dissipation of installed PMC modules may damage the blade Make sure that the combined power dissipation of installed PMC modules on the 3 3V and 5V rail does not exceed 60W PMC Module Malfunctioning Processor PMC modules as defined in ANSI VITA 32 2003 can be operated in two different modes monarch and non monarch mode Make sure to operate any installed processor PMC modules as defined in ANSI VITA 32 2003 only in non monarch mode Damage of Installed Hard Disk If PPMC 270 or PPMC 280 modules are installed into PMC slot 1 or 2 the heat radiated by the heat sink of theses PMC modules heats up an installed hard disk that may be installed at the same time If PPMC 270 or PPMC 280 modules are installed into PMC slot 1 or 2 make sure not to have a hard disk installed at the same time Battery 22 Blade System damage Incorrect exchange of lithium batteries can result in a hazardous explosion Therefore exchange the battery as described in this manual Data loss If the battery does not provide enough power anymore the RTC is initialized and the data in the NVRAM is lost Therefore exchange the battery before seven years of actual battery use have elaps
37. measures the CPU temperature It is connected to the blade s Intelligent Peripheral Management Controller IPMC This way software can monitor the CPU temperature via IPMI 106 PENT ATCA 717 Host Bridge Devices Features and Data Paths Host Bridge The used host bridge is an Intel E7501 Memory Controller Hub MCH device It is part of the Intel Plumas chipset and provides bus control signals address and data paths for transfers between the CPU front side bus main memory and the four hub interfaces provided by the host bridge Host Interface The host interface supports a 64 bit wide data bus and a 32 bit wide address bus The data bus is quadpumped and runs at 100 MHz resulting in a total bandwidth of 3 2 GB s The memory bus is double pumped and supports an address range of up to 4 GByte Its bandwidth is 200 Mb s per data line resulting in a total bandwidth of 128 x 200MB S 3 2GB s Memory Interface The memory interface is a 144 bit wide SDRAM interface supporting 64 128 256 and 512 MBit DDR SDRAM technology The bus speed is 100 MHz running synchronously to the front side bus Additionally ECC is supported Although theoretically up to 16 GByte are supported by the memory interface the actual maximum memory size is limited to 4 GByte due to the CPU s 32 bit address bus Hub Interfaces The Host Bridge provides the four hub interfaces A B C and D Hub interface A is quad pumped 8 bit wide and runs at 66 MHz It is
38. s Guide which can be downloaded from the former Force Computers S M A R T server or the Motorola literature catalog PENT ATCA 717 53 Installation Blade Installation Blade Installation The blade is fully compatible to the AdvancedTCA standard and is designed to be used in AdvancedTCA shelfs Since the installation and removal procedures are different for powered and nonpowered shelfs they are described in separate sections Caution Damage of Circuits Electrostatic discharge and incorrect blade installation and removal can damage circuits or shorten their life Before touching the blade or electronic components make sure that you are working in an ESD safe environment Installation into Powered Shelves Installation Procedure 1 2 Ensure that the top and bottom ejector handles are in the outward position Insert blade into the shelf by placing the top and bottom edges of the blade in the card guides of the shelf Ensure that the guiding module of shelf and blade are aligned properly Carefully slide the blade into the shelf until you feel resistance If an RTM is already installed in the same slot be careful not to bend any pins of the P30 to P32 backplane connectors Hook the lower and the upper handle into the shelf rail recesses 5 Fully insert the blade and lock it to the shelf by pressing the two components of the lower and the upper handles together and turning the handles towards the face plate As soon as t
39. shelf Installation in Nonpowered Shelves Installation Procedure 1 2 3 Power down the shelf Ensure that the top and botton ejector handles are in the outward position Insert blade into the shelf by placing the top and bottom edges of the blade in the card guides of the shelf Ensure that the guiding module of shelf and blade are aligned properly Slide the blade into the shelf until you feel resistance If an RTM is already installed in the same slot be careful not to bend any pins of the P30 to P32 backplane connectors Hook the lower and upper handle into the shelf rail recessed Fully insert the blade and lock it to the shelf by pressing the two components of the lower and upper handles together and turning the handles towards the face plate PENT ATCA 717 55 Installation 7 8 Blade Installation Tighten the face plate screws which secure the blade to the shelf Connect cables to the face plate if applicable Removal Procedure 56 1 2 3 Remove face plate cables if applicable Unfasten the screws of the face plate until the blade is detached from the shelf Open the lower and the upper handle by pressing the two handle components together and turning the handles outward Remove the blade from the shelf PENT ATCA 717 Cable Accessory Kits Installation Cable Accessory Kits At the time of writing this manual the following cable accessory kits are available e ACC CABLE PMC RJ 45 e ACC CAB
40. the setting of the on board switch SW3 4 which enables disables COM port swapping The following table provides details Setting of SW3 4 COMI is accessible via OFF default RTM upper serial connector ON CMC module upper serial connector 84 PENT ATCA 717 Serial Console Redirection BIOS Note The COM port routing described above is only applicable to BIOS versions gt 2 0 0 Earlier BIOS versions used a different routing For details refer to the PENT ATCA 715 717 7105 7107 BIOS Information Sheet which can be downloaded from the Motorola literature catalog web site COM port swapping can also be enabled via an IPMI System Boot Options command COM port swapping is enabled if either the on board switch 3 4 the IPMI System Boot Options command or both enable it A NULL Modem cable is available as accessory kit for the blade It converts the RJ 45 connector to a standard DSUB connector which can be connected to a remote terminal The following communication parameters are used by default Baud rate 9600 No handshake PC ANSI 8 data bits No parity 1 stop bit All configuration parameters listed above can be modified via the BIOS Connecting to the Blade In order to connect to the blade using the serial console redirect feature proceed as follows Procedure 1 Configure terminal to communicate using the same parameters as in BIOS setup Connect terminal to NULL modem cable Connect NULL modem cable to COM
41. to the Index Address Register and then perform either a read or write access on the Index Data Register All registers that can be accessed this way are listed in the following table Table 19 Index Addresses of Registers Accessible from CPU via LPC Bus Index Address 0x00 0x01 0x02 0x03 0x04 0x05 0x30 Ox3F 0x40 0x41 OxFF All other PENT ATCA 717 Data Description Width 8 bit Reset Source Register 8 bit Reset Mask Register 8 bit Flash Control and Status Register 8 bit LED Control Register 8 bit PMC Status Register 8 bit Shut Down Register 8 bit Clock synchronization interface 8 bit Serial PROM Update Register 8 bit Access Control Register 8 bit Version Register 8 bit Reserved 137 Maps and Registers FPGA Registers IPMI Block Transfer Interface Registers The host can access the IPMC via the two Block Transfer BT Interfaces 0 and1 Both are fully compliant to the IPMI specification V1 5 Each BT interface provides the following registers Table 20 IPMI Block Transfer Interface Registers Address Offset Data Width Description 0x00 8 bit Control and status register 0x01 8 bit Buffer Register 0x02 8 bit Interrupt mask register Control and Status Register This register is used by the IPMC and the host CPU for various control functions Buffer Register This register provides access to an IPMC to Host and Host to IPMC buffer The buffer has a size of 64 bytes and contains command streams betwee
42. 0 4800 9600 19200 38400 and 115200 kb s Both serial interfaces are 15 KV ESD protected Both interfaces correspond to the blade s serial interface ports 1 and 3 Serial interface port 1 is routed via a zone 3 connector to an installed RTM Serial interface port 3 is accessible via an installed CMC module The BIOS maps the serial interfaces ports to the desired I O addresses COM ports and interrupts LPC Interface The South Bridge provides a 4 bit wide Low Pin Count LPC interface running at 33 MEZ It has the following devices attached to it e SuperI O 110 PENT ATCA 717 South Bridge Devices Features and Data Paths Boot flash e User flash Glue Logic FPGA SMBus Interface The following table lists all devices which are connected to the South Bridge via its SMBus interface Device Name Device Type SMBus Address SPD EEPROM contains memory 24C02 OxAO configuration data of memory module used by BIOS SPD EEPROM contains memory 24C02 OxA1 configuration data of memory module used by BIOS Host Bridge Intel E7501 0x60 PCI bridge P64H2 0xC0 South Bridge 6300ESB 0x44 PENT ATCA 717 111 Devices Features and Data Paths Super I O Super I O The used Super I O is a Standard Microsystems Corporation LPC475422 device It provides the following interfaces Two serial interfaces Floppy disk interface e Keyboard Mouse interface e Parallel interface Serial Interfaces The Super I O device prov
43. 1 Legacy PCI bus reset 7 IPMI RES 0 No reset 05 r w 1 IPMC building block reset The reset mask register allows to enable disable particular resets If a bit is set the corresponding reset is enabled otherwise it is disabled Note IPMC legacy PCI and power on reset cannot be enabled disabled via this register Table 24 Reset Mask Register Bit Signal Description Default Access 0 Reserved 05 r 1 WDG RES Watchdog reset 12 r w 0 Disabled 1 Enabled 140 PENT ATCA 717 FPGA Registers Maps and Registers Bit Signal Description Default Access 2 PB_RES Face plate push button Reset 12 r w 0 Disabled 1 Enabled 3 DB RES ITP debug reset 12 r w 0 Disabled 1 Enabled 4 RTM RES RTM reset 12 r w 0 Disabled 1 Enabled 5 PMC RST PMC slots reset 12 r w 0 Disabled 1 Enabled 6 Reserved 05 r 7 Reserved 05 Flash Control and Status Register This register which is accessible via the index address 0x02 indicates the status of the default and backup boot flash regarding write protection crisis recovery and booting Additionally this register allows to set the write protection of the default boot flash data instruction area Table 25 Miscellaneous Switch Status Register Bit Description Default Access 0 Default boot flash boot block write 05 r protection 0 Write protected 1 Write enabled 1 Default boot flash data instruction block 1 r w write protection provided that bit 4 is set software can se
44. 1 Parallel serial ATA status indication mode 3 General purpose output on connector P30 pin A3 15 r w 0 O P is low 1 O P is open 6 Serial COM interface swapping 12 r 05 No swapping 12 COM 1 is swapped with COM3 and COM 2 is swapped with COM 4 7 5 Reserved 0005 r 142 PENT ATCA 717 FPGA Registers PMC Status Register Maps and Registers This register which is accessible via the index address 0x04 indicates the current status of all four on board PMC sites Table 27 PMC Status Register Bit Description 0 PMC slot 1 0 Empty 1 Populated 1 PMC slot 2 0 Empty 1 Populated 2 PMC slot 3 0 Empty 1 Populated 3 PMC slot 4 0 Empty 1 Populated 4 Routing of PCIX PMC INT N interrupts 0 Interrupts are routed to FPGA output signals PIROA D N 12 Interrupts are routed to FPGA output signals N0 3 6 5 Reserved 7 Indicates if PMC slots are ready for PCI enumeration 0 Not ready 1 Ready Shut Down Register Default 05 0005 Access r r w This write only register which is accessible via the index address 0x05 allows to pull down the FRU EN signal to GND and thus initiate a blade power down This register was introduced because the FRU EN signal is under normal operation controlled by the IPMC If the IPMC however is is not operating anymore for example during a firmware upgrade the FRU EN signal is released and remains in the state it previously had been in In this case
45. 1 Pn4 connector pins 30 and 31 OFF Pin 30 and 31 are routed to zone 3 backplane connector and are available as PMC I O signals default ON Pin 30 and 31 hold clock reference signals generated by clock synchronization building block Routing of PMC slot 2 Pn4 connector pins 30 and 31 OFF Pin 30 and 31 are routed to zone 3 backplane connector and are available as PMC I O signals default ON Pin 30 and 31 hold clock reference signals generated by clock synchronization building block PENT ATCA 717 Switch Settings Switch SW7 3 SW7 4 PENT ATCA 717 Installation Description Routing of PMC slot 3 Pn4 connector pins 30 and 31 OFF Pin 30 and 31 are routed to zone 3 backplane connector and are available as PMC 1 O signals default ON Pin 30 and 31 hold clock reference signals generated by clock synchronization building block Routing of PMC slot 4 Pn4 connector pins 30 and 31 OFF Pin 30 and 31 are routed to zone 3 backplane connector and are available as PMC 1 O signals default ON Pin 30 and 31 hold clock reference signals generated by clock synchronization building block 45 Installation On Board Hardware Accessories On Board Hardware Accessories The following hardware upgrades can be installed on the blade e modules Hard Disk CompactFlash card e CMC module PMC Modules The blade provides four PMC slots supporting PCI PCI X based PMC modules When operated in PCI mode PMC modules ru
46. 40 122241 121793 122242 121792 Accessory ACC ATCA 715 HDD SATA ACC ATCA CMC MODULE ACC CABLE RJ45 DSUB ACC CABLE PMC RJ45 ACC CABLE USB Ordering Information Description Serial ATA hard disk CMC module for debugging Adapter cable RJ 45 lt gt DSUB Splitter cable for accessing serial interfaces of installed PMC 8260 DS1 or PPMC 280 modules Adapter cable mini USB B male lt gt USB A female PENT ATCA 717 Action Plan Requirements Environmental Power Consumption Switch Settings On Board Hardware Accessories PMG Modules eye eR e eu ne Hard DISK zi esee Re een CompactFlash Disk Debug Module Rear Transition Modules Blade Installation Installation into Powered Shelves Installation in Nonpowered Shelves Cable Accessory Kits ACC CABLE PMC RJ 45 A te et ACC CABLE RJ45 DSUB AGG CABLE USB espe er HER PENT ATCA 717 Installation 35 Installation Action Plan Action Plan To install the blade the following steps are necessary and described in detail
47. 7 127 Devices Features and Data Paths Switching Unit Switching Unit The on board switching unit is based on the Marvell 98DX160 Ethernet layer 2 switch and provides switching functionality between on board Ethernet ports PMC sites and the backplane interfaces It provides 16 Ethernet switching ports as well as one Serial Management interface SMI and one additional Ethernet port for configuration Features Important features of the switching unit are e 2 MByte internal memory Host management interface e Support for 1000 GMII RGMII and 1000Base X e Manual and auto negotiation Support for jumbo frame length of 10KByte packets e On chip 4K MAC address table e 4K VLANs with 256 active VLANs e Flexible VLAN assignment for protocol port and tag based VLANs Management Interface The switching unit provides two management interfaces towards the host one slave Serial Management Interface SMI and one CPU Ethernet port The SMI interface is accessible via FPGA registers and supports read and write accesses to address mapped entities The CPU Ethernet port is constituted by an Intel 82540EM GBit Ethernet controller which is connected to the PCI interface of the blade s South Bridge Routing Options 128 The blade is designed to support dual dual star backplanes However the currently available blade variants support only dual star backplanes Ask your local Motorola representative for more information on availab
48. 717 Battery Exchange Battery Exchange e Data 1055 If the battery does not provide enough power anymore the RTC is initialized and the data in the NVRAM is lost Therefore exchange the battery before seven years of actual battery use have elapsed e Data 1055 Exchanging the battery always results in data loss of the devices which use the battery as power backup Therefore back up affected data before exchanging the battery e Data 1055 If installing another battery type than is mounted at board delivery may cause data loss since other battery types may be specified for other environments or may have a shorter lifetime Therefore only use the same type of lithium battery as is already installed Exchange Procedure 1 Remove old battery Caution PCB and battery holder damage Removing the battery with a screw driver may damage the PCB or the battery holder To prevent this damage do not use a screw driver to remove the battery from its holder 2 Locate the sign on the new battery It indicates the positive terminal of the battery 3 Insert the battery into the blade s battery holder in such a way that the on top of the battery is face up PENT ATCA 717 153 Index A ACCOSSOL OS eed ewe 33 B Backplane connectors 73 BIOS Boot device order 88 Main features 82 POST codes 96 Restore default settings
49. 8 Flash Control Register 118 PMG Status Register e Anl b e A EE RAUS EMI EA Den 118 Sh t Down Register usa ice E DRE UD Run 118 LEEDS Den iat eit eas ro dd ted ee e Qe ee een 118 Version Register oe ne uUi I gui tese Gea 118 Intelligent Platform Management Controller 119 Sensors ao ein Uia hat a C ee c AT nci dei LI LE 120 126 Addresses in ei I a RAD RR ES 123 Clock Synchronization Interface 124 Power Supply Module i2 osse 126 POI Bridge 2 aa ara 127 Switching Unit ice iae Y ESL QUE Ea Kane o 128 Features Es 128 Management Interface 22200 a a x ca 128 Routing Options s vsti ae ESSA Br E 128 PENT ATCA 717 Block Diagram Block Diagram RS 232 via CMC Module Puce ror PMC Devices Features and Data Paths Compact Flash Hard Disk iq South Bridge Intel 6300ESB Ethernet u Controller sen E Ethernet Controller Power Supply Module Figure 34 Base Board Block Diagram PENT ATCA 717 105 Devices Features and Data Paths CPU CPU The used Central Processing Unit CPU is a Pentium M processor The CPU provides 32 kBytes of on die data and instruction cache as well as two MByte L2 cache An on die temperature sensor
50. A Serial ATA SCSI Small Computer System Interface SDR Sensor Data Record SDRAM Synchronous Dynamic Random Access Memory SELV Safety Extra Low Voltages SMI Serial Management Interface SPD Serial Presence Detect SPI Serial Peripheral Interface SRAM Static Random Access Memory SROM Serial Read Only Memory U UL Underwriters Laboratory Inc USB Universal Serial Bus V VGA Video Graphics Array VLAN Virtual Local Area Network Revision History Order No Rev Date Description 222282 AA June 2004 Preliminary Reference Guide 222282 AB January 2005 Final release version 222282 AC February 2005 Corrected naming of Ethernet controllers Intel 82546EB GB and 82540EM 225444 AA March 2005 Corrected figure showing the switch PENT ATCA 717 locations corrected description of SW4 1 default setting enhanced description of redundant BIOS feature 15 Order No 226132 Rev AA Date May 2005 Description Changed logo copyright from Force Computers to Motorola generalized safety notes regarding maximum combined power dissipation of installed PMC modules in power requirements added exceptions applicable to US and Canada in standard compliances removed IEC60068 officially withdrawn and UL94V 0 1 already covered by 60950 and NEBS standard added section Restoring BIOS Default Settings added Restore BIOS Default Settings procedure added info on redundant FPGA feature section Devices Features
51. Bus Devices 111 South Bridge 108 Super l O 1 d sce x reve are 112 T Temperatures Critical hot spots 38 Non operating 37 U USB 5 62 156 PENT ATCA 717
52. CC ARTM 717 in conjunction with PPMC 270 or PPMC 280 modules Installation Procedure 1 2 Connect PMC module carefully to PMC slot Make sure that 15 mm standoffs of PMC module cover mounting holes of the blade 3 Place screws delivered with PMC module into mounting holes 4 Fasten screws Removal Procedure 1 2 48 Remove screws Disconnect PMC module carefully from slot PENT ATCA 717 On Board Hardware Accessories Installation Hard Disk The blade allows to install one 2 5 hard disk which may be connected to either an on board parallel or serial Advanced Technology Attachment ATA interface connector The hard disk can be mounted directly on the blade without the need for an additional wire Serial ATA Connector Parallel ATA Connector Figure 5 Location of On Board Hard Disk The serial ATA interface supports up to 150 MByte s data transfer rate and the parallel ATA supports all PIO and DMA modes up to Ultra ATA100 Hard disks which are connected to the parallel ATA interface act as master Two hard disk accessory kits are available for the blade One is called ACC ATCA 715 HDD and contains a parallel ATA hard disk drive The second is called ACC ATCA 715 HDD SATA and contains a serial ATA hard disk drive Installing a Hard Disk PENT ATCA 717 49 Installation On Board Hardwa
53. Digital Phase Locked Loop Dynamic Random Access Memory Error Correction Code Electromagnetic Compatibility European Norm Extended System Configuration Data Electrostatic Sensitive Device Field Application Engineers 13 14 Abbreviation FCC FIFO FPGA FRU G GND IDE IEC IPMB IPMC IPMI ISA ISO LCCB LED LFM LPC MAC NEBS NVRAM OEM OOS PCB PCI PEM PICMG PMC POST PROM Description Federal Communications Commission First In First Out Field Programmable Gate Array Field Replacable Unit Ground Integrated Device Electronics International Electric Code Intelligent Plattorm Management Bus Intelligent Plattorm Management Controller Intelligent Plattorm Management Interface Industry Standard Architecture International Organization for Standardization Line Card Clock Building Block Light Emitting Diode Linear Feet per Minute Low Pin Count Media Access Control Network Equipment Building System Nonvolatile Random Access Memory Original Equipment Manufacturer Out Of Service Printed Circuit Board Peripheral Component Interconnect Power Entry Module PCI Industrial Computer Manufacturers Group PCI Mezzanine Card Power On Self Test Programmable Read Only Memory PENT ATCA 717 Abbreviation R Description RAM Random Access Memory ROM Read Only Memory RTC Real Time Clock RTM Rear Transition Module S S M A R T Software Maintenance and Reference Tool SAT
54. ENT ATCA 717 71 Controls Indicators and Connectors 72 AAA NN Annona S 5 Figure 18 Location of Connector The pinout of the CMC connector is given in the following figure On Board Connectors PENT ATCA 717 On Board Connectors V3P3 RS232 1 DCD RS232 1 RXD RS232 1 TXD RS232 1 DTR RS232 3 DCD RS232 3 RXD RS232 3 TXD RS232 3 DTR GND KBD DATA KBD CLK VP5 KBD GND Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved GND Reserved Reserved Reserved Reserved n c Reserved n c Reserved V3P3 Controls Indicators and Connectors V3P3 RS232 1 DSR RS232 1 RTS RS232 1 CTS RS232 1 RI RS232 3 DSR RS232 3 RTS RS232 3 CTS RS232 3 RI GND MSE DATA MSE CLK GND Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved GND Reserved Reserved Reserved GND Reserved Reserved VP12 Reserved V3P3 For further information about the CMC module refer to the ACC ATCA CMC MODULE Installation Guide AdvancedTCA Backplane Connectors The AdvancedTCA backplane connectors reside in the three zones 1 to 3 as specified by the AdvancedTCA standard and are called P10 P20 P22 P23 P30 P31 and P32 The location of these connectors is show
55. Ea dcc m ew decanatu aa b QR a e CR cad e er C 112 Seral Interfaces iecit te RUD wu Ea an pde or berba named 112 Floppy DISK Interface u nn u eleg LERNTE PERIERE 112 Keyboard Mouse Controller 112 Parallel Iriterface v Sere eek a actam c enda IN da eA oS gar 112 Flash DEVICES sco sina ee eee eee KC CRGA ZR Rc a RC CR 113 FPGA ETC 115 EPG Interface 2 essa reb brad ad erac ras Hack Alea eA Ee ER RUE es wan MU 115 PENT ATCA 717 103 104 IPMC Interface 280576 denim 115 Block Transfer Interfaces ede ees 115 Port 80 Register iori ub e UR ae TE nba opea nb C bd Ee Xp CIE EA ene ne 116 PMO Extensions osito ia per LEMAR do ilg 116 Clock Synchronization Extensions 116 Reset Controller Re een pa ia a eR 116 Resat Types RIS RUECCORPGaHR GR NERA EGG GGG E Bg 116 Reset SOUICES os geek EA UVP hen Ri DE PAT ae at ae uN BREVE 117 Interrupt Routing 22 jag eG a BE Ar Ae eee eee ss 117 Miscellaneous Glue 117 Setial Interface eda ein WR m inc n enu pido c ae t Una 118 Reset Mask and Source Register 11
56. Hz 8 KHz 193 2 048 MHz 8 KHz 256 19 44 MHZ 8 KHz 2430 38 88 MHz 8 KHz 4860 77 76 MHz 8 KHz 9720 19 44 MHz 19 44 MHz 1 PENT ATCA 717 FPGA Registers Maps and Registers Recovered Clock Frequency Reference Clock Frequency Division Factor 38 88 MHz 19 44 MHz 2 77 76 MHz 19 44 MHz 4 Note If the division factor is 1 i e no clock division is done the clock divider should be bypassed This can be done via the reference clock source register Lower Divider Register Table 32 Lower Divider Register Bit Description Default Access 7 0 Divider lower byte 0116 r w Upper Divider Register Table 33 Upper Divider Register Bit Description Default Access 7 0 Divider upper byte 0016 r w Reference Clock Pulse Width Register This register determines the width of the reference clock high pulse in numbers of recovered clock cycles The minimum pulse width is 150ns If the clock divider is bypassed or the reference clock frequency is not 8 KHz no pulse is generated Table 34 Reference Clock Pulse Width Register Bit Description Default Access 7 0 Pulse width of reference clock signal 0116 r w Serial PROM Update Register The FPGA image is stored in two redundant PROMS This register is used by upper layer software to control the upgrade of the FPGA image Consult your local Motorola representative for the availability of new FPGA image versions and upgrade software Version Register This register indicates the version of the
57. LE RJ45 DSUB e ACC CABLE USB Note Check with your local Motorola representative for the availability of further accessory kits ACC CABLE PMC RJ 45 The ACC CABLE PMC RJ45 is an accessory kit compiled for the ACC ARTM 717 rear transition module It contains a splitter cable which allows to access the serial interfaces of PPMC 280 modules installed on the front blade via the ARTM 717 face plate ACC CABLE RJ45 DSUB The ACC CABLE RJ45 DSUB 5E is an accessory kit containing a shielded cable of 2m length and an RJ 45 DSUB adapter plug The cable provides Null modem functionality which enables you to connect a laptop to the serial interface of the blade The cable can be connected to either an installed CMC module or RTM ACC CABLE USB The ACC CABLE USB 5E is an USB adapter cable of 200 mm length which converts the mini USB face plate connectors to USB A female PENT ATCA 717 57 58 Controls Indicators and Connectors Face Plate esau Sew 59 BEDS ET 59 ie 61 i ern ra M ERE AU RE dr heine ER Uu 62 On Board Connectors re ae 64 CompactFlash 22 As ar Mah be d A Be ne 64 era NUI E et ede a 64 Parallel ATA Connector NEN IE RE Oe Rate een 67 Serial ATA Connecto
58. Q MOTOROLA PENT ATCA 717 Reference Guide P N 6806800A15A April 2006 Copyright Copyright 2006 Motorola GmbH All rights reserved Motorola and the stylized M logo are trademarks of Motorola Inc registered in the U S Patent and Trademark Office All other product or service names mentioned in this document are the property of their respective owners Notice While reasonable efforts have been made to assure the accuracy of this document Motorola GmbH assumes no liability resulting from any ommissions in this document or from the use of the information obtained herein Motorola reserves the right to revise this document and to make changes from time to time in the content hereof without obligation of Motorola to notify any person of such revision or changes Electronic versions of this material may be read online downloaded for personal use or referenced in another document as a URL to the Motorola Embedded Communications Computing Web site The text itself may not be published commercially in print or electronic form edited translated or otherwise altered without the permission of Motorola GmbH It is possible that this publication may contain reference to or information about Motorola products machines and programs programming or services that are not available in your country Such references or information must not be construed to mean that Motorola intends to announce such Motorola products programming or service
59. Rows E to H a TERM RX2 2 2 FAB2_TX FAB2_TX FAB2_RX TERM_RX1_2 A FABI_TX FAB1_TX FAB1_RX 5 BASE_DA1 BASE_DA1 BASE_DB1 6 BASE_DA2 BASE_DA2 BASE_DB2 7 n c n c 8 nc n c n c 9 n c n c po Er EE EM EFL Figure 24 P23 Backplane Connector Pinout Rows A to D Ee 1 n c TERM RX2 3 2 FAB2T_TX 2 TX FAB2T RX 3 n c TERM RX3 14 4 FABIT TX 1 TX FABIT RX 5 14 BASE DC1 BASE_DD1 6 BASE_DC2 BASE DC2 BASE DD2 7 nc Le 8 Ao 9 H o a mn mmm mmn n c 10 n c umm mmn n c Figure 25 P23 Backplane Connector Pinout Rows E to H PENT ATCA 717 TERM_RX7_3 TERM_RX7_1 TERM_RX6_3 TERM_RX6_1 TERM_RX5_3 TERM_RX5_1 TERM_RX4_3 TERM_RX4_1 TERM RX3 3 TERM RX3 1 TERM RX2 2 FAB2 RX TERM RX1 2 FAB1 RX BASE DB1 BASE DB2 n c n c n c n c TERM RX2 3 FAB2T RX TERM RX3 1 FAB1T RX BASE DD1 BASE DD2 n c n c n c n c m 2 3 4 5 6 7 8 9 ES ed ef gn qm oO oc c O 5 o Ww 10 7T Controls Indicators and Connectors On Board Connectors 78 Zone 3 contains the three connectors P30 to P32 They are used to connect an RTM t
60. The on board switches SW4 1 SW4 2 and SW4 4 allow to enable disable the write protection of both default and backup boot flash as well as the data instruction area of the backup boot flash 114 PENT ATCA 717 FPGA Devices Features and Data Paths FPGA The FPGA implements the following functions LPC interface e PMC interface Clock synchronization extensions e Reset controller Interrupt routing unit Miscellaneous glue logic e Ethernet switch interface The FPGA loads its configuration stream from one of two EEPROMs which are connected to the FPGA One EEPROM serves as default the second as backup EEPROM The IPMC controls which EEPROM the configuration stream is loaded from After IPMC startup the FPGA loads its configuration stream from the default EEPROM An IPMI System Boot Options command allows to select between default and backup EEPROM For details about switching between default and backup FPGA refer to the PENT ATCA 715 717 7105 7107 Control via IPMI Programmer s Guide which can be downloaded from the Motorola literature site LPC Interface The LPC interface is compliant to the Intel LPC specification 1 1 and connects the FPGA to the South Bridge IPMC Interface The FPGA is connected to the on board IPMC and implements the following IPMC related features e Two Block Transfer interfaces e Port 80 register IPMC extensions Block Transfer Interfaces Two Block Transfer interfaces BT reside i
61. allation Caution AN On Board Hardware Accessories Limited Power on PMC Modules and RTMs The blade does not provide an extra fuse for PMC modules and RTMs PMC modules and RTMs used together with the blade have to be qualified according to the following standards IEC 60950 1 EN 60950 1 UL 60950 1 CAN CSA C22 2 No 60950 1 Excession of blade s power consumption Exceeding the maximum combined power dissipation of installed PMC modules may damage the blade Make sure that the combined power dissipation of installed PMC modules on the 3 3V and 5V rail does not exceed 60W PMC Module Malfunctioning Processor PMC modules as defined in ANSI VITA 32 2003 can be operated in two different modes monarch and non monarch mode Make sure to operate any installed processor PMC modules as defined in ANSI VITA 32 2003 only in non monarch mode Damage of Installed Hard Disk If PPMC 270 or PPMC 280 modules are installed into PMC slot 1 or 2 the heat radiated by the heat sink of theses PMC modules heats up an installed hard disk that may be installed at the same time If PPMC 270 or PPMC 280 modules are installed into PMC slot 1 or 2 make sure not to have a hard disk installed at the same time Damage of Rear Transition Module and Blade The ACC ARTM 717 was designed to be used in conjunction with PPMC 270 or PPMC 280 modules modules installed on the blade at the same time In order to avoid damage of the blade or RTM only use the A
62. and displays scan code nn for stuck key Operating system cannot be located on either drive A or drive C Parity error found in system bus BIOS attempts to locate address nnnn and display it on screen If it cannot locate the address it displays Parity error found in system bus BIOS attempts to locate address nnnn and display it on the screen If it cannot locate the address it displays Displayed after any recoverable error message Previous POST did not complete successfully POST loads default values and offers to run setup If failure was caused by incorrect values and they are not corrected the next boot will likely fail Real time clock fails BIOS test Possible interrupt or interface resource conflict Shadow RAM failed at offset nnnn of the 64k block at which error was detected nnnn is amount of shadow RAM in KBytes successfully tested BIOS Messages Corrective Action Check for correct keyblade connection Replace keyblade check for stuck keys Enter setup and check if fixed disk and drive A are properly identified Check for correct memory module types Check for correct memory module types Press F1 to start boot process or F2 to enter setup and change any settings Run setup to restore original configuration This error is cleared the next time the system is booted May require blade repair Run ISA or EISA Configuration Utility to resolve re
63. and uses radio frequency energy and if not installed properly and used in accordance with this guide may cause harmful interference to radio communications Operating the system in a residential area is likely to cause harmful interference in which case the user will be required to correct the interference at his own expense Installation 20 Damage of Circuits Electrostatic discharge and incorrect blade installation and removal can damage circuits or shorten their life Before touching the blade or electronic components make sure that you are working in an ESD safe environment Data loss Removing the blade with the blue LED still blinking causes data loss Wait until the blue LED is permanently illuminated before removing the blade PENT ATCA 717 Damage of Blade and Additional Devices and Modules Incorrect installation of additional devices or modules may damage the blade or the additional devices or modules Before installing or removing an additional device or module read the respective documentation Operation Blade damage Blade surface High humidity and condensation on the blade surface causes short circuits Do not operate the blade outside the specified environmental limits Make sure the blade is completely dry and there is no moisture on any surface before applying power Do not operate the blade below 0 C Blade Overheating and Blade Damage Operating the blade without forced air cooling may lead to blade
64. ation into Powered Shelves on page 54 for the exact procedure Set switch 5W2 3 to OFF Now the BIOS default settings are restored PENT ATCA 717 91 BIOS Updating BIOS Updating BIOS For the blade a BIOS upgrade kit is offered It is available via the former Force Computers S M A R T web site or the Motorola web site Note When upgrading the BIOS all BIOS settings are reset to their default state 92 PENT ATCA 717 BIOS Messages BIOS Messages BIOS If your system fails after you made changes in the setup menus you may be able to correct the problem by entering setup and restoring the original values Message nnnn Cache SRAM Passed CD ROM Drive Identified Diskette drive A errorDiskette drive B error Entering SETUP Extended RAM Failed at offset nnnn nnnn Extended RAM Passed Failing Bits nnnn Fixed Disk 0 Failure Fixed Disk 1 Failure Fixed Disk Controller Failure Fixed Disk 0 3 Identified Incorrect Drive A type run SETUP Incorrect Drive B type run SETUP Keyblade controller error PENT ATCA 717 Explanation nnnn is amount of system cache in KBytes successfully tested Autotyping identified CD ROM Drive Drive A or B fails the BIOS POST disk tests Drive is selected via setup but either not present or defect Starting setup program Extended memory not working or not configured properly at offset nnnn nnnn is amount of RAM in MBytes successfully tested
65. attery Intel 82546EB GB Dual Gbit Ethernet controller Electrolytic capacitor CE9902 Electrolytic capacitor CE9903 Ericsson DC DC converter OMAST DC DC converter Power MOSFET IRF 6603 Temperature Limit 100 C 100 C 105 C 70 C 90 C 100 C 100 C 90 C 115 C 105 C coated blade variant 105 C D Temperature must be measured via on die sensor which can be accessed via IPMI 38 PENT ATCA 717 Requirements Figure 1 Location of Critical Blade Temperature Spots Blade Top Side PENT ATCA 717 Installation Installation Requirements Figure 2 Location of Critical Blade Temperature Spots Blade Bottom Side Power Consumption 40 The blade s power requirements depend on the installed hardware accessories If you want to install accessories on the board the load of the respective accessory has to be added to that of the blade In the following table you will find typical examples of power requirements with and without accessories installed For information on the accessories power requirements refer to the documentation delivered together with the respective accessory or consult your local Motorola representative for further details The blade must be connected to a TNV 2 or a safety extra low voltage SELV circuit A TNV 2 circuit is a circuit whose normal operating voltages exceed the limits for a SELV circuit under normal operating conditions and which is not subject to ove
66. checksum optional CA Redirect Int 15h to enable remote keyboard CB Redirect Int 13 to Memory Technologies Devices such as ROM RAM PCMCIA and serial disk Redirect Int 10h to enable remote serial video CD Re map I O and memory for PCMCIA CE Initialize digitizer and dispaly message 100 PENT ATCA 717 BIOS Post Codes Post Code D2 El E2 E3 E4 E5 E6 E7 E8 E9 EA EB EC ED EE EF F0 F1 F2 F3 F4 F5 F6 F7 E1 EZ E3 E4 E5 PENT ATCA 717 Description Unknown interrupt The following are for boot block in Flash ROM Initialize the bridge Initialize the CPU Initialize the system timer Initialize system I O Check recovery boot Checksum BIOS ROM Go to BIOS Set Huge Segment Initialize Multi Processor Initialize OEM special code Initialize PIC and DMA Initialize Memory type Initialize Memory size Shadow Boot Block System memory test Initialize interrupt vectors Initialize Run Time Clock Initialize video Initialize System Management Menager Output one beep Clear Huge Segement Boot to mini DOS Boot to Full DOS Initialize the bridge Initialize the CPU Initialize the system timer Initialize system I O Check recovery boot BIOS 101 BIOS BIOS Post Codes 102 Post Code E6 E7 E8 E9 EA EB EC Description Checksum BIOS ROM Go to BIOS Set Huge Segment Initialize Multi Processor Initialize OEM special code Initialize PIC and DMA Initialize Memory type PENT ATCA 717
67. chgehend leuchtet bevor Sie das Blade herausziehen Besch digung des Blades und von Zusatzmodulen Fehlerhafte Installation von Zusatzmodulen kann zur Besch digung des Blades und der Zusatzmodule f hren Lesen Sie daher vor der Installation von Zusatzmodulen die zugeh rige Dokumentation Betrieb Besch digung des Blades Hohe Luftfeuchtigkeit und Kondensat auf der Oberfl che des Blades k nnen zu Kurzschl ssen f hren Betreiben Sie das Blade nur innerhalb der angegebenen Grenzwerte f r die relative Luftfeuchtigkeit und Temperatur Stellen Sie vor dem Einschalten des Stroms sicher dass sich auf dem Blade kein Kondensat befindet und betreiben Sie das Blade nicht unter 0 C berhitzung und Besch digung des Blades Betreiben Sie das Blade ohne Zwangsbel ftung kann das Blade berhitzt und schlie lich besch digt werden Bevor Sie das Blade betreiben m ssen Sie sicher stellen dass das Shelf ber eine Zwangsk hlung verf gt Wenn Sie das Blade in Gebieten mit starker elektromagnetischer Strahlung betreiben stellen Sie sicher dass das Blade mit dem System verschraubt ist und das System durch ein Geh use abgeschirmt wird Verletzungen oder Kurzschl sse Blade oder Stromversorgung Falls die ORing Dioden des Blades durchbrennen kann das Blade einen Kurzschluss zwischen den Eingangsleitungen A und B verursachen In diesem Fall ist Leitung A immer noch unter Spannung auch wenn sie vom Versorgungskreislauf getrennt ist
68. ctor Pinout Rows A to D PENT ATCA 717 g ___ T PMC3 26 IO 28 qe 10 25 IO 1 2 PMC3 IO 34 PMC3 IO 36 PMC3 IO 37 PMC3 IO 39 2 IO 42 PMC3 IO 44 PMC3 IO 45 IO 47 4 PMC3 IO 52 PMC3 IO 54 PMC3 IO 53 PMC3 IO 55 4 5 PMC3 61 IO 63 PMC3 IO 62 PMC3 IO 64 5 6 PMC4 IO 29 PMCA IO 31 4 IO 33 4 IO 35 6 7 PMC4 IO 38 4 IO 40 PMC4 IO 41 4 IO 43 7 8 PMC4 IO 46 PMCA IO 48 4 IO 49 4 IO 51 8 9 PMC4 IO 58 PMCA IO 60 PMC4_10 57 4 IO 59 9 VP5 RTM 10 Controls Indicators and Connectors On Board Connectors 10 29 PMC3 10 31 Les PMC3 IO 33 35 38 PMC3 IO 40 PMC3 10 41 PMC3 IO 43 46 48 49 IO 51 58 IO 60 57 IO 59 PMC4 IO 26 4 IO 28 PMC4 IO 25 4 IO 30 PMC4 IO 34 PMC4 IO 36 PMC4 IO 37 PMCA IO 39 4 IO 42 PMCA IO 44 4 IO 45 PMCA IO 47 PMC4 52 PMCA4 IO 54 53 IO 55 PMC4 IO 61 PMC4 IO 63 PMC4 IO 62 PMC4_10 64 n c n c n c n c Figure 31 P32 Backplane Connector Pinout Rows E to H en 2 3 4 5 6 7 8 9 Lo 80 PENT ATCA 717 Introduction ws Serial Console Redirection Requirements e Dar int Defau
69. des a Serial Peripheral Interface SPI which provides external access for device setup and controlling Software that wishes to access the DPLL device has to first set the desired address in the SPI Address register followed by either a read or write access to the SPI data register For details about configuring the DPLL device refer to its data sheet PENT ATCA 717 FPGA Registers Maps and Registers DPLL Input Select and Control Register Table 29 DPLL Input Select and Control Register Bit Description Default Access 0 Selects DPLL clock source 05 r w 0 System clock 1 Reference clock 1 Selects system clock source CLK1 or CLK2 05 r w 0 CLK2 1 CLK1 2 Unused 05 r 3 SPI interface is ready for access 15 r 0 Wait 1 SPI Ready 4 Enabling of 2 KHz system clock interrupt 0 r w 0 Disabled 1 Enabled 5 2 kHz system clock interrupt status 05 r 0 Not active 1 Interrupt pending 6 Clear 2 kHz system clock interrupt r w Writing 0 clears the interrupt Read accesses always return 0 7 Reset signal for DPLL 05 r w 0 Reset asserted 1 Normal operation Reference Clock Source Register Table 30 Reference Clock Source Register Bit Description Default Access 1 0 Selects clock source for reference clock 005 r w 005 RCVD CLK 0 015 RCVD 1 105 RCVD CLK 2 112 RCVD 3 3 2 Selects interrupt rate for interrupt 005 r w LCCB INT N clocked by 2 kHz system clock reference 005 500 us 015 1 ms 105 10 ms 112
70. displayed entry represents the first of these devices as specified in the boot configuration via setup The same options determine the order in which POST installs the devices and the operating system assigns device letters BIOS supports up to two floppy devices to which the operating system may assign e g drive letters A and B The drives C D E etc are reserved for hard disk drives Note There is not always an exact correspondence between the order specified in setup and the letters assigned by the operating system Many devices such as legacy option ROMs support more than one device that can be assigned to several letters If the CD ROM drive should have a letter coming before the one assigned to the hard drive move it in front of the hard drive The group of bootable add in cards refers to devices with non multiboot compliant BIOS option ROM from which you can boot the operating system Via Boot Selection Menu To enter the boot menu press lt ESC gt during POST The menu that appears looks similar to the one shown in the following figure Note that the layout may vary slightly with new BIOS versions PENT ATCA 717 89 BIOS 90 363 33 3 ECC ECCE 3 9 3 2 Removable Devices 3 NETS x NET1 5 ATAPI CD ROM Dr
71. e 40 VLAN Configuration The following table summarizes the Ethernet switch configuration by listing Ethernet interfaces port numbers VLAN IDs and Ethernet types 130 PENT ATCA 717 Switching Unit Devices Features and Data Paths Note Only port 0 and 1 of the fabric channels are used Table 13 Ethernet Switching Unit Port Assignment Switching Unit Port Number 0 0 Ae m mM mA mE BP N 15 717 Destination PMC 1B PMC 2B PMC 3B PMC 4B Fabric channel 1T PMC 2A PMC3A Fabric channel 2T Fabric channel 1 Fabric channel 2 Fabric channel 3 Fabric channel 4 Base channel 1 Base channel 2 Primary base board 82546EB G B Ethernet controller Secondary base board 82546 Ethernet Interface Type 1000BaseT 1000BaseT 1000BaseT 1000BaseT 1000BaseBX 1000BaseT 1000BaseT 1000BaseBX 1000BaseBX 1000BaseBX 1000BaseBX 1000BaseBX 1000BaseT 1000BaseT 1000BaseBX 1000BaseBX ID of Untagged VLAN 3 3 3 3 ID of Tagged VLAN 5 Ui A UI Ul 131 132 Maps and Registers I O and Memory nenne ne 133 Hardware Interrupts u a nn 135 PCIDevices Ara a ea ee 136 FPGA Registers ee 137 Block Transfer Interface 5 138 Control and Status
72. e sure the blade is completely dry and there is no moisture on any surface before applying power Do not operate the blade below 0 C Blade Overheating and Blade Damage Operating the blade without forced air cooling may lead to blade overheating and thus blade damage When operating the blade make sure that forced air cooling is available in the shelf Table 4 Environmental Requirements Requirement Operating Non Operating Temperature 0 C to 55 C may be 40 C to 85 C may be further limited by further limited by installed installed accessories accessories Temp Change t 0 5 C min 1 C min PENT ATCA 717 37 Installation Requirement Rel Humidity Altitude Vibration 20 to 2000Hz Shock Free Fall Operating 5 to 95 non condensing at 40 300 m to 3 000 m 2 g RMS random 5 g 30 ms half sine Requirements Non Operating 5 to 95 non condensing at 40 C 300 m to 13 000 m 2 g RMS random 15 g 11 ms half sine 1 200 mm all edges and corners packed state 100 mm 3 axis unpacked To guarantee proper blade operation you have to make sure that the temperatures at the following locations are not exceeded If not stated otherwise the temperatures should be measured by placing a sensor exactly at the given locations Location No 1 N 0 10 Component Pentium M CPU D Intel 82540EM Gbit Ethernet controller Intel 6300ESB Southbridge Lithium b
73. ea ee ed 128 Management Interface 128 Routing OptlOns el ai sinne 128 Maps and Registers and Memory re 133 Hardware Interrupts 2 en el 135 PCLD6VICOS naar 136 FPGA Registers Ses 137 Block Transfer Interface 5 138 PENT ATCA 717 Control and Status Register 138 BufferRegister oou pube HH LED ee eee gta 138 Interrupt Mask Register Gee ene eee b exe pe dde X ROCA DR RN 138 Port GO0 Hegilster e IRR ID Ub ha e EI REDE I MED abate RT 138 Ethernet Switch Management Registers 138 Command and Status Register 139 Data Heglsters ra ae ee ee RS d 139 Glock Divider Register rx tn 139 2 Control and Status Register 139 Reset Registers a desde que quei etr du pu dI be eid 139 Flash Control and Status Register 141 EED Control Register 2 Be LR E ROC Pa 142 PMG Stat s Heglster 2022 rar a raus I e IRAN ND x LN 143 Shut Down R6gi
74. eberschritten so kann dies zu einer Beschaedigung des Blades fuehren Stellen Sie sicher dass die Leistungsaufnahme aller installierten PMC Module zusammen auf der 3 3V und 5V Schiene insgesamt 60W nicht ueberschreitet Fehlfunktion von PMC Modulen Prozessor PMC Module ANSI VITA 32 2003 koennen generell in zwei Modi betrieben werden Monarch und Nonmonarch Modus Betreiben Sie auf dem Blade installierte PMC Module ANSI VITA 32 2003 nur im Nonmonarch Modus PENT ATCA 717 Beschaedigung einer installierten Festplatte Falls PPMC 270 oder PPMC 280 PMC Module in PMC Slot 1 oder 2 installiert sind erhitzen die Kuehlkoerper dieser PMC Module eine moeglicherweise gleichzeitig installierte Festplatte Falls PPMC 270 oder PPMC 280 PMC Module in den PMC Slots 1 oder 2 installiert sind stellen Sie sicher dass keine Festplatte zur gleichen Zeit auf dem Blade installiert ist Batterie Beschaedigung des Blades des Systems Fehlerhafter Austausch von Lithium Batterien kann zu gef hrlichen Explosionen f hren Fuehren Sie den Austausch so durch wie er in diesem Manual beschrieben ist Datenverlust Wenn die Batterie nur noch ungen gend geladen ist wird der RTC zur ckgesetzt und Daten im NVRAM gehen verloren Tauschen Sie daher die Batterie innerhalb einer Zeit von sp testens sieben Jahren aus Datenverlust Der Austausch der Batterie f hrt unweigerlich zu Datenverlust bei Bauteilen die die Batterie als Backup verwenden Siche
75. ed PENT ATCA 717 Data loss Exchanging the battery always results in data loss of the devices which use the battery as power backup Therefore back up affected data before exchanging the battery Data loss If installing another battery type than is mounted at blade delivery may cause data loss since other battery types may be specified for other environments or may have a shorter lifetime Therefore only use the same type of lithium battery as is already installed PENT ATCA 717 23 Sicherheitshinweise Dieser Abschnitt enth lt Sicherheitshinweise die bei Installation Betrieb und Wartung des Produkts zu beachten sind Wir sind darauf bedacht alle notwendigen Informationen die f r die Installation und den Betrieb erforderlich sind in diesem Handbuch bereit zu stellen Da es sich jedoch um ein komplexes Produkt mit vielf ltigen Einsatzm glichkeiten handelt k nnen wir die Vollst ndigkeit der im Handbuch enthaltenen Informationen nicht garantieren Falls Sie weitere Informationen ben tigen sollten wenden Sie sich bitte an die f r Sie zust ndige Gesch ftsstelle von Motorola Das Produkt erf llt die f r die Industrie geforderten Sicherheitsvorschriften und darf ausschlie lich f r Anwendungen in der Telekommunikationsindustrie und im Zusammenhang mit Industriesteuerungen verwendet werden Installation Wartung und Betrieb d rfen nur von durch Motorola ausgebildetem oder im Bereich Elektronik oder Elektrotechnik qua
76. ed ON Voltage 1 5V Voltage 1 5V voltage level Analog While Payload powered ON Voltage 3 3V Voltage 3 3V voltage level Analog While Payload powered ON Voltage 5V Voltage 5V voltage level Analog While Payload powered ON Voltage 12V Voltage 1 2V voltage level Analog While Payload powered ON Voltage 1 05V Voltage 1 05V voltage level Analog While Payload powered ON Voltage 1 25V Voltage 1 25V voltage level Analog While Payload powered ON Mem Volt 1 2V Voltage 1 2V voltage level of the memory Analog While termination voltage Payload powered ON PENT ATCA 717 121 Sensor Name Mem Volt 2 5V Sw Volt 1 2V CPU THERM TRIP ICH PROC HOT FPGA PROGRAMMED Sw Volt 2 5V CPU CORE Volt 715 Watchdog 715 RTM HotSwap 715 IPMBO State 715 POST Code PCI BUS ERR Devices Features and Data Paths Type of Measurement Voltage Voltage Temperature Temperature Status Voltage Voltage Status Status IPMB status Status Status Intelligent Plattorm Management Controller What Does It Measure 2 5V voltage level of the memory supply voltage 1 2V voltage level of Ethernet switch chip CPU has stopped execution because CPU temperature has exceeded safe limits CPU temperature has reached maximum safe operating limit FPGA programming status 2 5V voltage level of Ethernet switch chip CPU core voltage level Watchdog status RTM presence ATCA IPMBO
77. ee ale SIS 43 Controls Indicators and Connectors Table 7 Face Plate LEDS be ERES REX ROME BRUN RI Laces E P BEER 60 BIOS Table 8 Key Codes for Terminal Emulation Program 84 Table 9 Standard BIOS Post Codes 96 Devices Features and Data Paths Table 10 Reset SOUICOS Herr cos aan Yaa des o OO iq e actore ce tes Pad RUE 117 Table 11 On board Sensors Accessible via 121 Table 12 Ethernet Switching Unit Ethernet Port Distribution 129 Table 13 Ethernet Switching Unit Port Assignment 131 Maps and Registers Table 14 Memory Address Map 4222442244 dba bbe ae Haren 133 Table 15 l O Addr ss Map ene ye REL IUBE ER 133 Table 16 Hardware Interrupts 135 Table 17 PCI Device Interrupts 136 Table 18 Registers Accessible from CPU via LPC Bus 137 Table 19 Index Addresses of Registers Accessible from CPU via LPC Bus 137 Table 20 IPMI Block Transfer Interface Registers 138 Table 21 Ethernet Switch Management 5 5
78. ensions integrated Its main functions are Hardware set up utility for setting configuration data e Multiboot for a flexible boot order Serial console redirection for remote blade configuration Software upgrade utility Note The BIOS contains on line documentation which provides detailed description of all BIOS functions Therefore the description in this manual is restricted to the main BIOS functions The BIOS set up program is required to configure the hardware of the blade This configuration is necessary for operating the blade and connected peripherals It is stored in the battery backed up CMOS memory as well as in the blade s boot flash Whenever you are not sure about configuration settings restore the default values They are provided in case a value has been changed and you wish to reset settings To restore the default values press F9 in setup Note Loading the BIOS default values will affect all set up items and will reset options previously altered Ifyou set the default values the displayed default values are not yet stored to be effective for the next boot They are just loaded to be displayed However they become effective if the BIOS setup is exited after changes have been saved 82 PENT ATCA 717 Introduction The BIOS complies to the following specifications Plug and Play BIOS Specification 1 0A e PCI BIOS Specification 2 1 e SMBIOS Specification 2 3 e BIOS Boot Specification 1 01
79. erface Registers on page 144 PENT ATCA 717 125 Devices Features and Data Paths Power Supply Module Power Supply Module The blade is fed via two redundant 48V inputs Both are converted via aDC DC converter to an intermediate voltage of 12V This voltage in turn is converted via further DC DC converters to on board voltages which are used by the on board devices A 48V 3 3V DC DC converter converts the 48V input voltage to 3 3V which is used to feed the IPMC and power up logic The blade s power up and power down cycles are under full control of the IPMC It controls both the 48V 12V DC DC converter as well as power up logic which controls the remaining on board DC DC converters If the IPMC detects a failure on any of the local on board voltages it shuts off the entire blade power The blade s power supply structure is shown in the following figure Power Good Figure 39 Blade Power Supply Structure 126 PENT ATCA 717 PCI Bridge P64H2 Devices Features and Data Paths PCI Bridge P64H2 The Intel P64H2 PCI bridge provides two PCI PCI X interfaces Each interface is connected to two PMC sites The P64H2 device supports peer to peer communication between the two PCI PCI X interfaces This way no host intervention is required when PMC sites connected to different PCI PCI X interfaces communicate with each other In PCI mode up to 533 MHz s transfer rate is possible in PCI X up to 800 MByte s PENT ATCA 71
80. errupt timer initialization 1A 8237 DMA controller initialization IC Reset programmable interrupt controller 20 Test DRAM refresh 22 Test 8742 keyboard controller 96 PENT ATCA 717 BIOS Post Codes Post Code 24 26 28 29 2A 2C 2E 2F 30 32 33 36 38 3A 3C 3D 41 42 45 46 47 48 49 4A 4B 4 4 4F 50 51 PENT ATCA 717 Description Set ES segment register to 4GB Enable gate A20 line Autosize DRAM Initialize POST memory manager Clear 512KB base RAM RAM failure on address line xxxx RAM failure on data bits xxxx of low byte of memory bus Enable cache before system BIOS shadow RAM failure on data bits xxxx of high byte of memory bus Test CPU bus clock frequency Initialize Phoenix Dispatch Manager Warm start shut down Shadow system BIOS ROM Autosize cache Advanced configuration of chipset registers Load alternate registers with CMOS values Initialize extended memory for RomPilot Initialize interrupt vectors POST device initialization Check ROM copyright notice Initialize I20 support Check video configuration against CMOS Initialize PCI bus and devices Initialize all video adapters in system QuietBoot start optional Shadow video BIOS ROM Display BIOS copyright notice Initialize MultiBoot Display CPU type and speed Initialize EISA board BIOS 97 BIOS 98 Post Code 52 54 55 58 59 5A 5B 5C 60 62 64 66 67 68 69 6A 6B ec 6E 70 72 76 7C 7D 7E 80 81 82
81. es RTMs CMC debug module Hard disk accessory kit Cable accessory kits PENT ATCA 717 31 Introduction Standard Compliances Standard Compliances Standard UL 60950 1 EN 60950 1 IEC 60950 1 CAN CSA C22 2 No 60950 1 EN 55022 EN 55024 EN 300386 FCC Part 15 ANSI IPC A610 Rev C Class 2 ANSI IPC 7711 ANSI IPC 7721 ANSI J 001 003 ISO 8601 NEBS Standard GR 63 CORE NEBS Standard GR 1089 CORE PICMG 3 0 R1 0 Description Legal safety requirements EMC requirements on system level predefined Motorola system Manufacturing Requirements Y2K compliance NEBS level three Product is designed to support NEBS level three The compliance tests must be done with the customer target system Defines mechanics blade dimensions power distribution power and data connectors and system management Note This blade contains an embedded power source rated gt 150W To achieve NEBS compliance on system level Shelf Ground chassis ground and Logic Ground logic signal return have to be connected The connection may be implemented inside the shelf e g at the backplane or the shelf has to provide a possibility to lead Logic Ground out of the shelf for external connection to Central Office Ground For further information refer to Telcordia GR 1089 CORE section 9 8 2 requirement R9 14 32 PENT ATCA 717 Ordering Information Introduction Ordering Information When ordering the board variants upgrade
82. further details refer to the PENT ATCA 715 717 7105 7107 Control via IPMI Programmer s Guide which can be downloaded from the Motorola literature catalog I2C Addresses The blade provides one IDROM which is attached to the IPMC via an I2C bus The I2C address of the IDROM is 0xAQO PENT ATCA 717 123 Devices Features and Data Paths Clock Synchronization Interface Clock Synchronization Interface 124 AdvancedTCA systems provide a telecom clock synchronization interface which allows to synchronize elements within a telecommunication network The telecom clock synchronization interface consists of three redundant clock buses CLK1 CLK2 and CLK3 which are available at the system backplane Each clock bus is implemented as a differential pair of MDS LDS signals which connects to each system slot In compliance with the AdvancedTCA PICMG 3 0 specification CLK1 and CLK2 are used as system clocks and CLK3 is used as reference clock The blade provides a clock synchronization building block which allows to synchronize the four on board PMC modules to the system clock and to derive a reference clock The main components of the clock synchronization building block as well as the main signal paths are shown in the following figure Blade Backplane _ Oscillator PMC Slots 0 1 2__ CLK 3 SYNCA LI NETREF SYS CLK B SYNC 0 1
83. he blade is connected to the backplane power pins the blue LED is illuminated When the blade is completely installed the blue LED starts to blink This indicates that the blade announces its presence to the shelf management controller Note If an ARTM is connected to the front blade make sure that the handles of both the ARTM and the front blade are closed in order to power up the blade s payload 6 54 Wait until the blue LED is switched OFF The switched off blue LED indicates that the blade s payload has been powered up and that the blade is active PENT ATCA 717 Blade Installation Installation 7 8 Tighten the face plate screws which secure the blade to the shelf Connect cables to the face plate if applicable Removal Procedure 1 2 3 Remove face plate cables if applicable Unfasten the screws of face plate until the blade is detached from shelf Open the lower and the upper handle by pressing the two handle components together and turning the handles outward The blue LED blinks indicating that the blade power down process is on going Wait until the blue LED is illuminated permanently Note if the LED continues to blink a possible reason may be that upper layer software rejects the blade extraction request Caution Data loss Removing the blade with the blue LED still blinking causes data loss Wait until the blue LED is permanently illuminated before removing the blade 5 Remove the blade from the
84. ides two serial full duplex RS232 interfaces Supported baud rates are 600 1200 2400 4800 9600 19200 38400 and 115200 kb s Both serial interfaces are 15 KV ESD protected Both interfaces correspond to the blade s serial interface ports 2 and 4 Serial interface port 2 is routed via a zone 3 connector to an installed RTM Serial interface port 4 is accessible via an installed CMC module The BIOS maps the serial interface ports to the desired I O addresses COM ports and interrupts Floppy Disk Interface The floppy disk interface is unused on the blade Keyboard Mouse Controller The Super I O integrates an 8042H compatible keyboard mouse controller The corresponding interfaces are accessible via RTM and CMC debug module Parallel Interface The parallel interface is unused on this blade 112 PENT ATCA 717 Flash Devices Devices Features and Data Paths Flash Devices The blade provides two redundant boot flash devices one default boot flash and one backup boot flash During blade production both flashes are programmed with identical BIOS images The presence of two redundant flash devices allows for remotely updating BIOS images from the operating level without interrupting running processes and without being affected by possibly corrupt BIOS images The backup boot flash furthermore can be used to store customized images Note that in this case the redundant BIOS feature is no longer available Both flash devices
85. in the sections of this chapter The installation takes about five minutes Start installation sure power and environmental requirements are met Set on board switches if applicable Install on board hardware accessories if applicable Install Rear Transition Module if applicable Install blade Install cable accessories if applicable Installation finished 36 PENT ATCA 717 Requirements Installation Requirements In order to meet the environmental requirements the blade has to be tested in the system in which it is to be installed Before you power up the blade calculate the power needed according to your combination of blade upgrades and accessories Environmental Requirements The environmental conditions must be tested and proven in the shelf configuration used The conditions refer to the surrounding of the blade within the user environment Caution Note The environmental requirements of the blade may be further limited down due to installed accessories such as hard disks or PMC modules with more restrictive environmental requirements Operating temperatures refer to the temperature of the air circulating around the blade and not to the actual component temperature Blade damage Blade surface High humidity and condensation on the blade surface causes short circuits Do not operate the blade outside the specified environmental limits Mak
86. ing system and its drivers e If you save changes in setup the next time the blade boots BIOS will configure the system according to the setup selections stored If those values cause the system boot to fail reboot and enter setup to get the default values or to change the selections that caused the failure If the boot fails or is interrupted three times in a row the default values are then loaded automatically In order to navigate in setup use the arrow keys on the keyblade to highlight items on the menu All other navigation possibilities are shown at the bottom of the menu Additionally an item specific help is displayed on the right side of the menu window PENT ATCA 717 87 BIOS Selecting The Boot Device Selecting The Boot Device There are two possibilities to determine the device from which BIOS attempts to boot Via setup to select a permanent order of boot devices e Via boot selection menu to select any device for the next boot up procedure only Via Setup 1 In the menu line select Boot A menu similar to the one shown in the following figure appears Note that the layout may vary slightly with new BIOS versions Options Data Tools Window 9 STARTUP PE Al EB TT Zel ul SECI Floppy check scree B onsole Redirection Boot Device Priority Cha tege
87. inout Rows E to H 80 Main Men wat ited abe Red cane en ead mos Aide sade ope eu dtd 87 Boot Menu 55 a Re coast TL C E 90 Devices Features and Data Paths Figure 34 Figure 35 Figure 36 Figure 37 Base Board Block Diagram 105 Boot Flash LPC Device ID Control 113 IPMI Str ct re iu acie aceto ed neh te UR 119 IPMI Temperature Sensors 120 PENT ATCA 717 Figure 38 Clock Synchronization Building Block 124 Figure 39 Blade Power Supply Structure 126 Figure 40 VEAN Configuration se era em nn ats 130 Maps and Registers Figure 41 PGI Structuren ui er d ee re herr 136 Battery Exchange Figure 42 Location of On board Battery 152 PENT ATCA 717 11 Using This Guide This Reference Guide is intended for users qualified in electronics or electrical engineering Users must have a working understanding of Peripheral Component Interconnect PCI AdvancedTCA and telecommunications Conventions 12 Notation 57 0000000016 or 0x00000000 00005 or 0b0000 x n 0 75 Bold Courier Courier Bold Italics lt text gt text Note Caution A Description
88. isters contain the data that is read from or sent to the Ethernet switch Clock Divider Register This register allows to program the frequency of the Ethernet Switch Management clock I2C Control and Status Register The Ethernet switch obtains its configuration data from a PROM device that is connected to it This register allows to access this PROM and is used for PROM updates Reset Registers The blade provides two registers which are related to blade resets e Reset source register index address 0x00 PENT ATCA 717 139 Maps and Registers FPGA Registers e Reset mask register index address 0x01 The reset source register stores the source of the most recent reset A write access clears this register Each bit is associated with one reset source If the bit is set to one the corresponding reset has occurred After a reset has occurred this register should be cleared Otherwise after the next reset of another source more than one bit is set and you may not be able to determine the most recent reset source Table 23 Reset Source Register Bit Signal Description Default Access 0 PWR ON 0 No reset 1 r w 1 Power on reset 1 WDG RES 0 No reset 05 r w 1 Watchdog reset 2 PB RES 0 No reset 05 r w 1 Face plate push button reset 3 PMC RST 0 No reset 05 r w 1 PMC slots reset 4 RTM RES 0 No reset 05 r w 1 RTM reset 5 CPU RST 0 No reset 05 r w 1 CPU reset issued by Host Bridge 6 PCI RES 0 No reset 05 r w
89. it may be necessary to explicitly pull down FRU EN via this register Bit Description Access 7 0 Pull down FRU EN signal w 001111005 Pull down FRU EN PENT ATCA 717 143 Maps and Registers FPGA Registers Clock Synchronization Interface Registers These registers are related to the clock synchronization building block of the blade These registers are primarily used to Select system clock 1 or 2 from back plane Select system or reference clock for DPLL input e Enable reference clocks A and B to the backplane e Select recovered clock source Determine programmable reference clock divider value Determine reference clock pulse width Note Motorola offers a device driver to access the clock synchronization interface Instead of directly accessing the clock synchronization interface via the registers described in this section it is strongly recommended to use this driver Ask your local Motorola representative for details The following clock synchronisation interface registers are available Table 28 Clock Synchronisation Interface Registers Index Address Register 3016 SPI Address register 3116 SPI Data register 3216 DPLL Input Select and Control register 3316 Reference Clock Divider register 3416 Lower Reference Clock Divder register 3516 Upper Reference clock Divider register 3616 Reference Clock Pulse Width register SPI Interface Registers 144 The used DPLL device 58525 from SEMTECH provi
90. ive lt Enter Setup 3 Figure 33 Boot Menu Continue with one of the following options Selecting The Boot Device a Override existing boot sequence by selecting another boot device from the boot order list or b Select Enter Setup to enter setup utility or c Press lt Esc gt to return to POST screen and continue with previous boot sequence Note If the selected device does not load the operating system BIOS reverts to the previous boot sequence PENT ATCA 717 Restoring BIOS Default Settings BIOS Restoring BIOS Default Settings The blade provides an on board configuration switch that allows to clear the blade s CMOS and thus to restore the BIOS default settings In order to restore the BIOS default settings using this switch you have to proceed as follows Procedure 1 Remove the blade from the system See section Installation into Powered Shelves on page 54 for the exact procedure Set the on board switch SW2 3 to ON See section Switch Settings on page 42 for the exact location of SW2 3 Install and power up the blade See section Installation into Powered Shelves on page 54 for the exact procedure Note that the blade will not boot because the Clear CMOS RAM switch 5W2 3 is set to ON Remove the blade from the system again See section Install
91. le option in blade installation removed warning regarding plastic handles new handles are used now updated ordering information 17 Other Sources of Information For further information refer to the following documents Note Check the Motorola literature catalog for errata sheets that may be applicable to the blade Company or www Document Organisation Motorola motorola com co ACC ARTM 717 Installation Guide mputing ACC CABLE RJ45 DSUB Installation Information ACC ATCA 715 HDD Installation Guide ACC ATCA 715 HDD SATA Installation Guide ACC CMC MODULE Installation Guide PENT ATCA 715 717 7105 7107 Control via IPMI Programmer s Guide Guide PENT ATCA 715 717 7105 7107 BIOS Information Sheet Intel intel com 6300ESB I O Controller Datasheet 82540EM Gigabit Ethernet Controller Documentation 82546 GB Gigabit Ethernet Controller Documentation 82802AC Firmware Hub FWH Datasheet 82870P2 PCI PCI X 64 bit Hub 2 P64H2 Datasheet E7501 Memory Controller Datasheet IPMI V1 5 Specifications Pentium M Processor Technical Documents Marvell marvell com Prestera DX160 16 Port Gigabit Ethernet Packet Processor Documentation PCI SIG pcisig com PCI Local Bus Specification Revision 2 2 PCI X Addendum to the PCI Local Bus Specification 1 0 18 PENT ATCA 717 Company or Organisation PICMG SMSC PENT ATCA 717 WWW picmg org smsc com Document PICMG 3 0 Revision 1 0 Advanced TCA Base S
92. le blade variants and switch options Starting with blade revision 1 2 the blade provides support for PICMG 3 1 Option 2 This is achieved by configuring two fabric interface ports as one 2 GBit Ethernet trunc Details are given below PENT ATCA 717 Switching Unit Devices Features and Data Paths At blade start up the Ethernet switch reads a serial PROM which contains switch configuration information such as predefined Virtual Local Area Networks VLANs The following table shows how the Ethernet interfaces are distributed across the 16 Ethernet switch ports Table 12 Ethernet Switching Unit Ethernet Port Distribution Interfaces Number of Ethernet Ports PMC sites 2xland2x2 Host Ethernet 2x1 Base interface 2x1 Fabric interface 2xland2x2 Update channel interface Total 16 Four VLANs are predefined Each backplane Ethernet interface is assigned to one separate VLAN On board Ethernet interfaces however belong to more than one VLAN The fabric interfaces are attached to tagged VLANS and the base interfaces to untagged VLANS The following figure illustrates the VLAN configuration PENT ATCA 717 129 Devices Features and Data Paths Switching Unit HostA 14 8 4 Fabric channel 1 HostB 154 f 0772 25A9 7 Fabric channel 2 10 Fabric channel 3 Fabric channel 4 6 2 12 Base channel 1 PMC4B 3 13 Base channel 2 oes Tagged VLAN Untagged VLAN Figur
93. lifiziertem Personal durchgef hrt werden Die in diesem Handbuch enthaltenen Informationen dienen ausschlie lich dazu das Wissen von Fachpersonal zu erg nzen k nnen es aber in keinem Fall ersetzen EMV Das Blade wurde in einem Motorola Standardsystem getestet Es erf llt die f r digitale Ger te der Klasse A g ltigen Grenzwerte in einem solchen System gem den FCC Richtlinien Abschnitt 15 bzw EN 55022 Klasse A Diese Grenzwerte sollen einen angemessenen Schutz vor St rstrahlung beim Betrieb des Blades in Gewerbe sowie Industriegebieten gew hrleisten Das Blade arbeitet im Hochfrequenzbereich und erzeugt St rstrahlung Bei unsachgem em Einbau und anderem als in diesem Handbuch beschriebenen Betrieb k nnen St rungen im Hochfrequenzbereich auftreten Warnung Dies ist eine Einrichtung der Klasse A Diese Einrichtung kann im Wohnbereich Funkst rungen verursachen In diesem Fall kann vom Betreiber verlangt werden angemessene Ma nahmen durchzuf hren Installation Besch digung von Schaltkreisen Elektrostatische Entladung und unsachgem er Ein und Ausbau von Blades kann Schaltkreise besch digen oder ihre Lebensdauer verk rzen Bevor Sie Blades oder elektronische Komponenten ber hren vergewissern Sie sich da Sie in einem ESD gesch tzten Bereich arbeiten 24 PENT ATCA 717 Datenverlust Wenn Sie das Blade aus dem Shelf herausziehen und die blaue LED blinkt noch gehen Daten verloren Warten Sie bis die blaue LED dur
94. ls Telecom clock signals CLKx e interface signals BASE e Fabric channel interfaces Some of the pins provided by P20 P21 and P23 are defined as optional in the AdvancedTCA specification and are unused on the blade If the AdvancedTCA specification defines these signals as input signals they are terminated on the blade and marked as TERM in the following pinouts In all other cases the pins are unconnected and consequently marked as n c The pinouts of P20 P21 and P23 are as follows PENT ATCA 717 75 Controls Indicators and Connectors 1A 2 4 FAB8 TX FAB8 TX 5 6 n c 7 8 n c n c 9 lo jab cd ef Ege a TERM_RX4_UP TERM_RX2_UP Jr 4 TERM RX15 2 TERM RX15 0 TERM RX14 24 TERM RX14 0 TERM RX13 2 On Board Connectors CLK1B TERM RX4 TERM RX2 UP FAB8 RX TERM RX15 2 TERM RX15 0 TERM RX14 2 TERM RX14 0 TERM RX13 2 TERM RX13 0 off oo ERM RX13_0 Figure 20 P20 Backplane Connector Pinout Rows A to D T CLK2A CLK_2A 2 CLK_3A CLK 3A 3 4 n c n c 5 6 n c 7 n c 8 9 n C n c n c 10 cd ef gh m CLK 2B 4 CLK TERM RX3 ss TERM_RX1_UP rein EH RX15 34 es
95. lt Configuration Connecting to the Blade BIOS Crisis Recovery Mode Changing Configuration Settings Selecting The Boot Device Via Boot Selection Restoring BIOS Default Settings Updating BIOS YR Rede BIOS Messages BIOS Post Codes PENT ATCA 717 81 BIOS Introduction Introduction BIOS Basic Input Output System provides an interface between the operating system and the hardware of the blade It is used for hardware configuration Before loading the operating system BIOS performs basic hardware tests and prepares the blade for the initial boot up procedure During blade production identical BIOS images are programmed into the blade s boot and user flash By default the blade boots from the boot flash It is possible to select between boot and user flash as device to boot from This is done via a OEM IPMI command For further details refer to the PENT ATCA 715 717 7105 7107 Control via IPMI Programmer s Guide which can be downloaded from the Motorola literature catalog The presence of two redundant flash devices also allows for updating the BIOS image without affecting running processes The BIOS used on the blade is based on the Phoenix 4 0 Release 6 0 BIOS with several Motorola ext
96. n at 33 66Mhz when operated in PCI X mode they run at 66 100MHz All four PMC slots use a signaling level of 3 3V The four PMC slots are numbered from 1 to 4 Their location is shown in the following figure 46 PENT ATCA 717 On Board Hardware Accessories Installation ANN Y WANES KY K fp i 4 7 N Gj 1 Un RE AN DE Ry N Figure 4 Location Slots PMC slots 1 and 2 belong to one PCI segment and slots 3 and 4 belong to another PCI segment Within the same PCI segment it is possible to install two PMC modules of different modes PCI PCI X and speeds 33 66 100 MHz The PMC module with the overall lower performance combination of speed and PCI mode determines the speed and PCI mode of the second PMC module Example A PMC module supporting PCI X 66MHz is installed into PMC slot 1 and a PMC module supporting PCI 66MHz is installed into PMC slot 2 In this case both PMC modules are operated in PCI 66 MHz mode because the PMC module with the overall less performance is the one supporting PCI 66 MHz and consequently the second PMC module is operated in this mode as well Before installing PMC modules the following general safety notes must be observed PENT ATCA 717 47 Inst
97. n host and IPMC Interrupt Mask Register The host uses this register to mask interrupts generated by the IPMC Port 80 Register This read only 8 bit wide register which is located at the I O address 8016 stores the results obtained from the POST Power On Self Test Ethernet Switch Management Registers The following registers consitute an Ethernet management interface accessible by the host The registers allow to configure and control the operation of the on board Ethernet switch The Ethernet management interface conforms to the IEEE 802 3 management draft standard The base address of these registers is 0x150 Table 21 Ethernet Switch Management Registers Address Offset Register 0016 Command and Status Register 0116 PHY address register 138 PENT ATCA 717 FPGA Registers Maps and Registers Address Offset Register 0216 Lower data register 0316 Upper data register 0416 Clock divider register 0516 I2C Control and Status Register Command and Status Register This register controls the transfer of configuration data to and from the Ethernet switch Table 22 Command and Status Register Bit Description Access 4 0 PHY internal register address r w 5 Command flag r w 0 Perform write access 1 Perform read access 6 Read Error Flag r wc 0 PHY responds to read access 1 Error occurred 7 Interface Status r 0 Ready 1 Busy wait until ready is indicated before initiating new access Data Registers These reg
98. n in the following figure PENT ATCA 717 73 Controls Indicators and Connectors On Board Connectors 74 P30 P31 P32 AN ANT 5 CY m NN P20 WA e Ir TAN ij P22 P23 OS hanno V Amen a P10 The pinouts of all these connectors are given in this section The connector residing in zone 1 is called P10 and carries the following signals Power feed for the blade ABP_VM48 x CON and ABP RTN A CON e Power enable ENABLE x e bus signals APMB P10 IPMBO x Geographic address signals ABP P10 HAx e Ground signals P10 SHELF GND and GND e Reserved signals PENT ATCA 717 On Board Connectors Controls Indicators and Connectors Reserved n c Reserved Reserved n Reserved ABP P10 HAO 10 HA1 10 2 ABP P10 ABP P10 SHELF GND ABP P10 HA4 GND ABP P10 5 ABP ENABLE B ABP P10 HA6 ABP RTN A CON ABP P10 HA7 ABP RTN B CON ABP P10 IPMBO A SCL P10 IPMBO A SDA ABP ENABLE A ABP VM48 A CON ABP VM48 B CON P10 B SCL ABP P10 B SDA n c Figure 19 P10 Backplane Connector Pinout Zone 2 contains the three connectors P20 P22 and P23 They carry the following types of signa
99. neous system configurations and strange behaviors It cannot replace a serious and sophisticated presales and postsales support during application development If it is not possible to fix a problem with the help of this chapter contact your local sales representative or Field Application Engineer FAE for further support Problem Possible Reason Solution Blade does not work Backplane voltage is too Check that all backplane low voltages are within their specific ranges Check that power supply is capable to drive the respective loads Blade does not start No valid BIOS was found Make sure a valid BIOS PROM is installed 150 PENT ATCA 717 Battery Exchange PENT ATCA 717 151 Battery Exchange Battery Exchange Battery Exchange The blade contains an on board battery Its location is shown in the following figure V Figure 42 Location of On board Battery The battery provides data retention of seven years summing up all periods of actual data use Motorola therefore assumes that there usually is no need to exchange the battery except for example in case of long term spare part handling Caution Board System damage Incorrect exchange of lithium batteries can result in a hazardous explosion Therefore exchange the battery as described in this chapter 152 PENT ATCA
100. nnnn is a map of the bits at the RAM address in system extended or shadow memory which failed the memory test Each 1 one in the map indicates a failed bit Fixed disk not working or not configured properly Autotyping identified specified fixed disk Type of floppy drive not correctly identified in setup Keyblade controller failed test Corrective Action None None Check that drive is defined with proper disk type in setup that disk drive is attached correctly and that controller is enabled None Check if memory modules are installed correctly Otherwise contact your local sales representative or FAE for further support None Check if memory modules are installed correctly Otherwise contact your local sales representative or FAE for further support Check if fixed disk is attached properly Run setup to be sure the fixed disk type is correctly identified None Check for correct floppy drive in setup Replace keyblade 93 BIOS 94 Message Keyblade error Keyblade error nnn Operating system not found Parity Check 1 nnnn Parity Check 2 nnnn Press F1 to resume lt F2 gt to setup Previous boot incomplete Default configuration used Real time clock error Resource allocation conflict on motherblade Run Configuration Utility Shadow RAM Failed at offset nnnn nnnn Shadow RAM Passed Explanation Keyblade not working BIOS discovered a stuck key
101. nside the FPGA Each provides one control and status register two 64 byte FIFOs and an interrupt mask register Both BT interfaces are PENT ATCA 717 115 Devices Features and Data Paths FPGA compliant to the IPMI specification V1 5 Rev 1 0 and share one Interrupt Source register The first BT interface is used as the only System Interface and uses IPMI channel The second BT interface uses IPMI channel 0x06 Port 80 Register The FPGA provides an 8 bit wide register to store POST codes The register is located at I O address 8046 It is only readable for the IPMC and read writeable for the host The IPMC polls this register to monitor the boot up sequence of the board The content of the port 80 register can also be obtained and read via IPMI IPMC Extensions The FPGA implements three registers which are only visible for the IPMC These registers reflect the following core voltage identifier e Frame signal on LPC bus System and parity errors on PCI buses e Enabling disabling of backplane signals used for electronic keying e Alert signals Clock Synchronization Extensions The FPGA contains extensions which are related to the AdvancedTCA clock synchronization feature These extensions include e Registers accessible via host and IPMC for controlling and monitoring clock synchronization SPlinterface for controlling DPLL device e Programmable clock divider For further details refer to section
102. nsions 116 Reset Controller oodd dus a Tbe o c LLL Gee 116 Reset TyDeS cesis ma a aan aden eta Wed iad go Mids Def ear cea te 116 Reset SourceS ur ates al te s even RR Pepe oa SPE PR 117 ae ee tie bane aa e e HERR HE ERE UE AE 117 Miscellaneous Glue 117 Serial Interface ie GARE re u Lu owe be ges tes 118 Reset Mask and Source Register 118 Flash Control Register 118 PMC Status Register rer EAT PRA AAA Web En 118 ShuUt DOWN Register 3 dd eR ec RU TU e RUE EI 118 uns EERE DUERME S PENES Du ERES ER Pr RULES 118 Version Registers esee tbe Rp betreut aa a eR ete eae Eda Aa ey QUEEN 118 Intelligent Platform Management Controller 119 SENSOTS 4 4 seo Head ay ei eres rene Honec are ard gs 120 l2G Addresses a obere pepper fud ae Da De 123 Clock Synchronization Interface 124 Power Supply Module rg na 126 PCI Bridge P6AH2 dew xr eid ex Es 127 Switching Unit u ex vs ae ein 128 up D ae
103. nual e reader comments mcg mot com In all your correspondence please list your name position and company Be sure to include the title part number and revision of the manual and tell how you used it 30 PENT ATCA 717 Features Introduction Features The PENT ATCA 717 is an AdvancedTCA compliant single blade computer offering high processing performance Four on board PMC sites GBit Ethernet connection to the AdvancedTCA Base and Fabric interface as well as standard I O interfaces make it ideal for telecommunication and datacom applications An on board 16 port Ethernet switch allows switching between PMC sites Base and Fabric interface and the base board Important features are Pentium M processor with up to 1 8 GHz speed Up to four GByte main memory DDR2 SDRAM with ECC protection Designed for PICMG 3 0 and 3 1 compliant systems 16 port Ethernet switch with host interface for configuration and management Redundant AdvancedTCA Base interface Up to eight AdvancedTCA Fabric Channel interfaces Four 64 bit 100MHz PCI X compliant PMC slots Two USB 2 0 interfaces at face plate Optional on board CompactFlash and 2 5 inch hard disk Support for Windows 2000 2003 and Carrier Grade Linux Ed 3 1 Intelligent Plattorm Management Controller IPMC compliant to IPMI V 1 5 with redundant IPMB support Support for four PMC Modules with Telecom clocking synchronization Different accessory kits for example Rear Transition Modul
104. o the blade and carry the following signals e Serial RS232_x_yyyy e Serial ATA SATAx_yyy e USB USBxy e Keyboard Mouse 5 xxx e xxx ISMB xxx Power VP12 RTM V3P3 RTM PMC user I O PMCx IO yy e General control signals BD PRESENTx PRSNT N RST KEY RTM RST NIMM 1 R232 2 R232 2 TXD Rs232 2 RTS RS232_2 ers 1 RS232 2 DCD RS232 2 DTR EB a RS232_ 2 DSR RS232 2 RI RTM GPO 4 USBO USB0 a USB1 USB1 5 n c 6 7 SATAO_TX _ SATO_RX SATAO RX 8 IPMB1 SCL IPMB1 SDA IPMB1 V3P3 ISMB ALERT N 40 VP12_RTM vPi2 RTM ef 2 V3P3_RTM Figure 26 P30 Backplane Connector Pinout Rows A to D WO Lo ab cd ef gh A T RS232 4 RXD RS232 4 TXD RS232 4 RTS RS232 4 CTS 1 2 Rs232 4 DCD Rs232 4 RS232_4 DSR RS232_4 Ri 2 3 KBD DAT KBD CLK MS_DAT MS_CLK 3 4 n c nic nmn Ho a mn H oa n c n c 4 5 nmn un mn n c n c 5 6 n c nmn mmn o umm 6 ZISATAI_TX 1 1 SATAI_RX 7 8 n c 8 9 PRESENT RTM PRSNT ol a s 9 HOVCC
105. on related functions and can cause the blade to malfunction if their setting is changed Therefore do not change settings of switches marked as reserved The setting of switches which are not marked as reserved has to be checked and changed before blade installation Blade Damage Setting resetting the switches during operation can cause blade damage Therefore check and change switch settings before you install the blade Table 6 Switch Settings Switch Description SW2 1 Reserved default OFF SW2 2 Reserved default OFF SW2 3 Clear CMOS RAM content OFF Normal operation default ON Clear CMOS RAM For the exact procedure of how to clear the CMOS RAM content i e restore the default BIOS settings refer to section Restoring BIOS Default Settings on page 91 SW2 4 BIOS crisis recovery mode OFF Disabled default ON Enabled For details refer to section BIOS Crisis Recovery Mode on page 86 SW3 1 Reserved default OFF SW3 2 Reserved default OFF SW3 3 Reserved default OFF SW3 4 Serial COM interface swapping at blade start up OFF No swapping default As a result COM1 and COM2 are accessible at an installed RTM CONO and are accessible at an installed CMC module ON COMI is swapped with COM 3 and COM 2 is swapped with COM 4 As a result COM1 and CONZ are accessible at an installed module and COM3 and COMA are accessible at an installed RTM PENT ATCA 717 43 Installation
106. overheating and thus blade damage When operating the blade make sure that forced air cooling is available in the shelf When operating the blade in areas of electromagnetic radiation ensure that the blade is bolted on the system and the system is shielded by enclosure Injuries or short circuits Blade or power supply In case the ORing diodes of the blade fail the blade may trigger a short circuit between input line A and input line B so that line A remains powered even if it is disconnected from the power supply circuit and vice versa To avoid damage or injuries always check that there is no more voltage on the line that has been disconnected before continuing your work Switch Settings Blade Malfunction Switches marked as reserved might carry production related functions and can cause the blade to malfunction if their setting is changed Therefore do not change settings of switches marked as reserved The setting of switches which are not marked as reserved has to be checked and changed before blade installation Blade Damage Setting resetting the switches during operation can cause blade damage Therefore check and change switch settings before you install the blade PENT ATCA 717 21 Environment Always dispose of used blades according to your country s legislation if possible in an environmentally acceptable way PMC Modules Limited Power on PMC Modules and RTMs The blade does not provide an extra fuse
107. page 86 During booting During booting this LED indicates the boot status For each task the BIOS POST executes the LED is toggled between red and green During normal blade operation Now the LED indicates the combined parallel serial ATA activity or is used as user LED Toggling between both modes is done via the LED control register In user mode Depending on the FPGA LED control register the LED is either red green or OFF In parallel serial ATA activity mode Green Combined activity of parallel and serial ATA interfaces OFF No activity FRU State Machine During blade installation Permanently blue On board IPMC powers up Blinking blue Blade communicates with shelf manager OFF Blade is active During blade removal Blinking blue Blade notifies shelf manager of its desire to deactivate Permanently blue Blade is ready to be extracted The blade provides one face plate reset key PENT ATCA 717 61 Controls Indicators and Connectors Face Plate Reset Key Figure 9 Location of Reset Key On pressing it a hard reset is triggered and all attached on board devices are reset Note The IPMC is not reset via this key Connectors The blade provides two mini USB 2 0 connectors of type AB at its face plate They correspond to the USB interfaces 1 and 2 An adapter cable accessory kit called ACC CABLE USB is available for the blade It converts the mini USB male face plate connectors to USB female connectors
108. pecification PICMG 3 1 Revision 1 0 Specification Ethernet Fiber Channel for AdvancedTCA Systems LPC475422 Enhanced Super I O Controller Datasheets and Application Notes 19 Safety Notes EMC This section provides safety precautions to follow when installing operating and maintaining the product We intend to provide all necessary information to install and handle the product in this manual However as the product is complex and its usage manifold we do not guarantee that the given information is complete If you need additional information ask your Motorola representative The product has been designed to meet the standard industrial safety requirements It must not be used except in its specific area of office telecommunication industry and industrial control Only personnel trained by Motorola or persons qualified in electronics or electrical engineering are authorized to install remove or maintain the product The information given in this manual is meant to complete the knowledge of a specialist and must not be taken as replacement for qualified personnel The blade has been tested in a standard Motorola system and found to comply with the limits for a Class A digital device in this system pursuant to part 15 of the FCC Rules EN 55022 Class A respectively These limits are designed to provide reasonable protection against harmful interference when the system is operated in a commercial environment The blade generates
109. port you have selected in BIOS setup Start up blade PENT ATCA 717 85 BIOS BIOS Crisis Recovery Mode BIOS Crisis Recovery Mode 86 Immediately after a reset or power up a routine in the boot flash boot block is invoked which checks whether a valid BIOS image is available If no valid image is found and consequently the blade is unable to boot the blade enters into BIOS crisis recovery mode In this mode a routine tries to load a BIOS crisis recovery image from a disk drive connected to the blade s USB interface The BIOS crisis recovery image is basically a mini DOS with minimum functionality which replaces the corrupted image A valid BIOS crisis recovery image can be downloaded from the former Force Computers SMART server or the Motorola website as part of the BIOS upgrade kit which which is available for this blade The image is accompanied by readme files which describe how to create the BIOS upgrade recovery disk and how to to replace a corrupted BIOS with the BIOS crisis recovery image If the blade has enterred BIOS crisis recovery mode the face plate LED HDD is lit ed After the BIOS recovery image has been successfully flashed the LED is lit green Note Flashing the BIOS crisis recovery image may take up to two minutes In order to avoid blade damage it is absolutely important not to interrupt the flashing process Therefore wait until the LED is lit green again which indicates a successful flashing PENT ATCA 717
110. r nn YS GUI hag RU 69 Module Connector 71 AdvancedTCA Backplane Connectors 73 PENT ATCA 717 Face Plate Controls Indicators and Connectors Face Plate The following figure shows the connectors keys and LEDs available on the face plate Figure 7 Face Plate LEDs The following figure shows all LEDs available at the face plate PENT ATCA 717 59 Controls Indicators and Connectors H S Figure 8 Location of Face Plate LEDs The meaning of these LEDs is described in the following table Table 7 Face Plate LEDs LED Description OOS Out Of Service Red Blade out of service OFF Blade working properly OK Payload power status Green Supply voltages are within threshold values OFF Supply voltages are outside threshold values ACT Redundancy status Amber Blade is active OFF Blade is stand by 60 Face Plate PENT ATCA 717 Face Plate LED HDD H S Keys Controls Indicators and Connectors Description After power up or reset If no valid BIOS image has been found the LED is lit red and the blade enters into BIOS crisis recovery mode Note that the enterring into BIOS crisis recovery mode can also be enforced via the on board switch SW2 4 For further details about the BIOS crisis recovery mode refer to section BIOS Crisis Recovery Mode on
111. re 41 PCI Structure The following table lists the PCI devices interrupt signals which are routed to the South Bridge BIOS allows to map these signals to standard ISA interrupts Table 17 PCI Device Interrupts PCI Device PCIIRQ Device IDSEL PCIBus No PMC 1 PIRQA_N PIRQB_N PIRQC_N PIRQD_N 3 19 5 PMC 2 PIRQA_N PIROB_N PIRQC_N PIRQD_N 1 17 5 PMC3 PIRQA_N PIROB_N PIRQC_N PIROD_N 2 18 4 PMC 4 PIRQA_N PIROB_N PIRQC_N PIROD_N 4 20 4 ETH2 PIROC_N 4 20 2 ETH 0 1 PIRQA_N PIROB_N 4 20 1 136 PENT ATCA 717 FPGA Registers Maps and Registers FPGA Registers The FPGA provides various control and status registers Some of these registers are accessible from the CPU host via the LPC bus some by the IPMC others by both In the following all registers will be described which are accessible from the CPU These registers are listed in the following table Table 18 Registers Accessible from CPU via LPC Bus Address Range OxE4 0xE6 OxE8 OxEA 0x80 0x100 0x101 0x150 0x155 Data Description Width 8 bit IPMI Block Transfer Interface 0 8 bit IPMI Block Transfer Interface 1 8 bit Port 80 8 bit Index Address Register used for accessing further FPGA registers 8 bit Index Data Register used for accessing further FPGA registers 8 bit Ethernet Switch Management Interface The FPGA provides further registers In order to access them first write the index address corresponding to the register
112. re Accessories Position hard disk above blade so that the blade s parallel ATA or serial ATA or SATA connector faces the hard disk s interface connector Connect hard disk with blade s connector 3 Turn blade to face its bottom side Fasten four screws to blade s bottom side Removing a Hard Disk 1 Removing Hard Disk Place blade on table with blade s bottom side facing you Remove four screws holding hard disk 2 3 4 5 Carefully remove hard disk from blades s parallel ATA or SATA connector Store hard disk and screws in a safe place in case you want to use the accessory kit components again CompactFlash Disk The blade provides a connector to install a CompactFlash card of type I and II 50 PENT ATCA 717 On Board Hardware Accessories Installation NEN KANN a e AN Ty p Te 1 NS um N ES CompactFlash Disk Connector Figure 6 Location of CompactFlash Disk Connector The CompactFlash card is operated in True IDE mode and is connected to the secondary IDE interface where it acts as IDE master CompactFlash Installation 1 Open locking bow 2 Check that disk s connectors face the CompactFlash socket PENT ATCA 717 51 Installation On Board Hardware Accessories 3 Pl
113. rimary Parallel ATA Interface 109 Secondary Parallel ATA Interface 110 SBInterfaces beer sean ac mr back en acl rd seat et eX Eh 110 PGLInterface eat ra drea Deco Ro 110 Serial ATA Interfaces Lk V I EN T e E rice 110 Serial RS232 5 oss en read aei aci OR 110 UPCGGUnterface ad utet c E ttd p bred Au NE di truc aod Mua 110 SMBuS Interface s victrix ru in Saar iE aa Eh Y DE C ce 111 Super u ua amr vera e DR 112 Serial Interfaces e rpg ee ached GANG d ui ibd CO Ded HE ea e CP 112 Floppy Disk Interface 112 Keyboard Mouse Controller 112 P rallelilnterface bres a uera de te dad ce 112 Flash DVIS SS oec coe owe a ACORN P CR a i RC 113 EPGA as aad cta D to A ac do etu e 115 EPG IMG ACE reb br dot Aa E ed C ER dede vedo es na UR 115 PENT ATCA 717 5 IPMC Interface ebbe Uis en dnt 115 Block Transfer Interfaces an 115 Register s Hinsehen 116 PMO Extensions a iw bp iieri duis Eu dae tee 116 Clock Synchronization Exte
114. rimary Parallel ATA Interface The primary parallel ATA interface is connected to an on board 2 5 hard disk which can be mounted on the blade The hard disk operates as IDE master PENT ATCA 717 109 Devices Features and Data Paths South Bridge Secondary Parallel ATA Interface The secondary parallel ATA interface is connected to an on board CompactFlash connector which supports CompactFlash cards of type I and II An inserted card runs in true IDE mode and is master on the secondary parallel ATA interface USB Interfaces The South Bridge provides four USB interfaces Two are routed to the blade s face plate and two to the rear transition module All interfaces are compliant to the USB 2 0 standard PCI Interface The South Bridge provides a 32 bit 33 MHz PCI interface that is compliant to the PCI 2 2 specification Up to four external PCIbus master devices are supported and a 3 3V signaling level is used Serial ATA Interfaces The South Bridge provides two Serial Advanced Technology Attachment SATA interfaces which are compliant to the SATA 1 0 specification and support a data transfer rate of up to 1 5GByte s One interface is routed to the Zone 3 connector and is accessable via an installed RTM One interface is routed to an on board SATA connector to which a SATA hard disk can be connected Serial RS232 Interfaces The South Bridge provides two serial full duplex RS232 interfaces Supported baud rates are 600 1200 240
115. rm Management Controller Devices Features and Data Paths Intelligent Platform Management Controller The blade provides an Intelligent Platform Management Controller IPMC unit based an the 8 bit Atmel ATmega AVR microcontrollers The IPMC is fully compliant to the IPMI V1 5 standard and provides the following interfaces e PMBOA and IPMBOB available via the backplane e PMB L connected to rear transition module 2C interfaces connected to on board PMCs slots and sensors e Analog to Digital Conversion ADC interfaces connected to on board sensors Digital I O interfaces connected to on board sensors One of the main tasks of the IPMC is to control the power up and power down of the blade For this purpose the IPMC is connected to the on board power supply module via control and status lines Various on board IPMI sensors provide detailed information on the current power status of the blade to any interested party connected to the IPMI network The following figure gives an overview of the IPMI structure used on board RTM EMBL Atmega 32L r4 __ atmega IEMIBUS 4 Backplane Atmega 8L IPMBOB Atmega 8L Power Supply Control and i Module Status Signals Figure 36 IPMI Structure For details about accessing the IPMC via IPMI commands as well as Sensor Data Records SDRs and Field Replacable Unit FRU information provided by the blade refer to the PENT ATCA 715 717 7105 7107
116. rn Sie daher alle Daten die bei Austausch der Batterie verloren gehen Datenverlust Wenn Sie einen anderen Batterietyp installieren als der der bei Auslieferung des Blades installiert war kann Datenverlust die Folge sein da die neu installierte Batterie f r andere Umgebungsbedingungen oder eine andere Lebenszeit ausgelegt sein k nnte Verwenden Sie daher den gleichen Batterietyp der bei Auslieferung des Blades installiert war PENT ATCA 717 27 28 Introduction About THIS wr qa cass arre 29 Organization of this Manual 29 Feedback rex inea IBN au eiae ee 29 Features irada aia A ia cda kasd ia wc ada ica qr da 31 Standard Compliances 32 Ordering Information ana Vor e m eor ER UR RC I m 33 Product Nomenclature eo alee ere cet me micis e eate nnd 33 Order Numbers 2 eats Ara nee CEN Ba M acd ERR RI One wee oe ae DAN dU RN RUD 33 PENT ATCA 717 About this Manual About this Manual Introduction This Reference Guide provides the information you need to install access and operate the blade Organization of this Manual The Reference Guide is organized as follows Table 1 Organization of this Manual Chapter Using this Guide Other Sources of Information Safety Notes Sicherheitshinweise Introduction In
117. rvoltages from telecommunication networks Table 5 Power Requirements Characteristic Value Rated Voltage 48VDC to 60VDC Exception in the US and Canada 48VDC Operating Voltage 40 5VDC to 72VDC Exception in the US and Canada 40 5VDC to 60VDC PENT ATCA 717 Requirements Installation Characteristic Value Max current 3 6A Max power consumption of blade equipped with 75W 4 GByte SDRAM without accessories Max total power consumption of all four PMC 60W sites Max total power consumption of all installed 65W blade accessories PMCs hard disk The blade provides two independent power inputs according to the AdvancedTCA Specification Each input has to be equipped with an additional fuse of max 90A located either in the shelf where the blade is installed or the power entry module PEM PENT ATCA 717 41 Installation Switch Settings Switch Settings The blade provides the on board switches SW2 SW3 SW4 and SW7 The following figure shows their location Note that in the switch drawings the switch handle is represented by a little white square and that the shown switch settings reflect the default switch settings s ci W Figure 3 Location of On board Switches 42 PENT ATCA 717 Switch Settings Installation Caution Blade Malfunction Switches marked as reserved might carry producti
118. s and accessories use the order numbers given below Product Nomenclature In the following you find the key for the product name extensions PENT ATCA 717 xx yyyy xx Main memory in GByte CPU frequency MHz Order Numbers The table below is an excerpt from the blade s ordering information Ask your local Motorola representative for the current ordering information Note This manual describes the blades listed below PCA revision 1 3 and is delivered with these blades For blades with other PCA revisions refer to the manuals that are delivered with those blades Table 2 Ordering Information Order Number PENT ATCA 717 Description 123065 2G 1800 Two GByte main memory 1800 MHz CPU frequency PCA revision 1 3 123066 4G 1800 Four GByte main memory 1800 MHz CPU frequency PCA revision 1 3 The table below is an excerpt from the blade s accessories ordering information Ask your local Motorola representative for the current ordering information Table 3 Accessories Ordering Information Order Number Accessory Description 123036 ACC ARTM 717 Rear transition module for PENT ATCA 717 blades Provides access to four serial interfaces deriving from PMCs as well as two USB 2 0 two serial two SATA and one keyboard mouse interface supports PPMC 280 modules installed on the PENT 717 120980 ACC ATCA 715 HDD Parallel ATA hard disk PENT ATCA 717 33 Introduction 34 Order Number 1222
119. s in your country PENT ATCA 717 Contents Using This Guide Other Sources of Information Safety Notes Sicherheitshinweise 1 Introduction About this Manual sur rer 29 Organization of this Manual 29 Feedback mp Gar aec ata iate e RE sei S iine 29 Features mer dus DUC adu CAII ID 31 Standard Compllances cirea een 32 Ordering Information u Ry Races sca TUA Qaa d ROC RR 33 Product Nomenclature 33 Order N imbers zc ee peti aces Rare e wc uA eri qd 33 2 Installation Aclon Plan 2 2 as ae EFE RR RSS ES 36 Requirements a u am chus een 37 Environmental 37 Power Consumption Kanaren DE Dre ees 40 SWICh SeUINGS 42 On Board Hardware Accessories 46 PMG Modu leS ius pee ea EVI 46 PENT ATCA 717 3 Hard Disk xu el RI RETREAT era 49 CompactFlash Disk D rar m tn a ira 50 CMG Bebug Module aan na ANN N N 52 Rear Transition Modules 53 Blade Installation s nalen 54 Installation into
120. sl r coo ret prit pe nb eb YE te ipe a the 143 Clock Synchronization Interface Registers 144 SPI Interface Registers 144 DPLL Input Select and Control Register 145 Reference Clock Source 145 Reference Clock Divider Registers 146 Reference Clock Pulse Width Register 147 Serial PROM Update 147 Version Register sima tated dew ee ee 147 Access Control Register ben ee ar 148 Appendix A Troubleshooting Appendix B Battery Exchange Index PENT ATCA 717 7 Tables Introduction Table 1 Organization of this Manual 29 Table 2 Ordering Information 1 e prune ua ERE CHE der rd i e gcn e 33 Table 3 Accessories Ordering Information 33 Installation Table 4 Environmental Requirements 37 Table 5 Power Requirements 1 2202 DS DEUM UA VAM E s 40 Table 6 Switch Settings x sce Tel ie Bet ar
121. source conflict Contact your local sales representative or FAE for further support None PENT ATCA 717 BIOS Messages Message System battery is dead Replace and run SETUP System BIOS shadowed System cache error Cache disabled System CMOS checksum bad run SETUP System RAM Failed at offset nnnn nnnn System RAM Passed System timer error UMB upper limit segment address nnnn Video BIOS shadowed Invalid System Configuration Data run configuration utility PENT ATCA 717 Explanation The NVRAM CMOS clock battery indicator shows the battery is dead System BIOS copied to shadow RAM RAM cache failed BIOS test BIOS disabled cache System NVRAM CMOS has been corrupted or modified incorrectly perhaps by an application program that changes data stored in NVRAM CMOS System RAM failed at offset nnnn in the 64k block at which the error was detected nnnn is amount of system RAM in KBytes successfully tested Timer test failed Address nnnn of the upper limit of upper memory blocks indicates released segments of BIOS which may be reclaimed by a virtual memory manager Video BIOS successfully copied to shadow RAM BIOS Corrective Action Replace battery and run setup to reconfigure system None Contact your local sales representative or FAE for further support Run setup and reconfigure system either by getting default values and or making your own selec
122. stallation Controls Indicators and Connectors BIOS Devices Features and Data Paths Maps and Registers Battery Exchange Feedback Description Lists all conventions and abbreviations used in this manual and outlines the revision history Lists related documentation and specifications Provides safety relevant information when handling the product German translation of the Safety Notes section Provides a basic overview of the features of the product and this manual Outlines the installation requirements hardware accessories switch settings installation and removal procedures Describes the LEDs keys and connectors of the product Describes the basic features of the blade s BIOS Also explains how to restore the BIOS default settings and how to connect to the blade using the serial console redirect feature Provides detailled information on the devices such as controllers CPU etc used on the blade and how they are interconnected Provides information that is relevant for programmers such as register reference and memory maps Describes how to exchange the blade s on board battery Motorola welcomes and appreciates your comments on its documentation We want to know what you think about our manuals and how we can make them better Mail comments to Motorola GmbH ECC Embedded Communication Computing Lilienthalstr 15 85579 Neubiberg Munich Germany PENT ATCA 717 29 Introduction About this Ma
123. t this status 0 Write protected 1 Write enabled 2 Backup boot flash boot block write 05 protection 0 Write protected 1 Write enabled 3 Backup boot flash data instruction block 0 r write protection 0 Write protected 1 Write enabled PENT ATCA 717 141 Maps and Registers FPGA Registers Bit Description Default Access 4 Select status of default and backup boot 05 r flash write protection 0 Write protection determined by on board switches 1 Write protection determined by this register 6 5 Indicates flash that is booted from 005 r 005 Default boot flash 012 Backup boot flash 7 Crisis recovery indicates status of crisis 12 r recovery switch 0 Crisis recovery 1 Normal operation LED Control Register This register which is accessible via the index address 0x03 allows to control the bicolor face plate HDD LED This LED can be operated in parallel serial ATA status indication mode and user mode Toggling between both modes is possible via this register In parallel serial ATA status indication mode the LED shines GREEN and indicates the combined activitiy of all serial and parallel ATA interfaces In user mode the LED can be controlled to be red green and OFF Table 26 LED Control Register Bit Description Default Access 1 0 Controls LED in user mode 015 r w 005 OFF 015 Red 105 Green 115 Reserved 2 Toggles between user mode and parallel serial ATA 0 r w status indication mode 0 User mode
124. ter e Shut down register PENT ATCA 717 117 Devices Features and Data Paths FPGA e LEDs e Version register Serial Interface The FPGA provides routing options of one of the two serial interfaces provided by the Southbridge This feature is intended for Motorola internal purposes and should be ignored Reset Mask and Source Register The FPGA provides two registers which allow to obtain the last reset source and to mask resets See section Reset Registers on page 139 Flash Control Register The FPGA provides one register which allows to monitor the boot and user flash write protection status as well as to control the write protection of the boot flash boot block See section Flash Control and Status Register on page 141 PMC Status Register The FPGA provides one register which allows to monitor the status of the four PMC sites See section PMC Status Register on page 143 Shut Down Register The FPGA provides one register which allows to control the blades FRU EN signal See section Shut Down Register on page 143 LEDs The FPGA provides a register to control the HDD LED available at the face plate This LED indicates the combined parallel and serial ATA activity or is operated in user LED mode See section LED Control Register on page 142 Version Register This register allows to obtain the current FPGA version See section Version Register on page 147 118 PENT ATCA 717 Intelligent Platfo
125. tions Check for correct memory modules Otherwise contact your local sales representative or FAE for further support None Requires repair of system blade None None Enter setup and use advanced configuration option to reset configuration data due to corrupted ESCD data 95 BIOS BIOS Post Codes BIOS Post Codes The following table lists BIOS post codes applicable to the used Phoenix 4 0 Release 6 0 BIOS The BIOS POST codes are stored in the blade s Port 80 register and can also be obtained by reading an on board IPMI sensor For details refer to the PENT ATCA 715 717 7105 7107 Control via IPMI Programmer s Guide which can be downloaded from the Motorola literature catalog Table 9 Standard BIOS Post Codes Post Code Description 02 Verify real mode 03 Disable non maskable interrupt NMI 04 Get CPU type 06 Initialize system hardware 07 Disable shadow and execute code from the ROM 08 Initialize chipset with initial POST values 09 Set IN POST flag 0A Initialize CPU registers OB Enable CPU cache 0C Initialize caches to initial POST values OE Initialize I O component OF Initialize the local bus IDE 10 initialize power management 11 Load alternate registers with initial POST values 12 Restore CPU control word during warm boot 13 Initialize PCI bus mastering devices 14 Initialize keyboard controller 16 BIOS ROM checksum 17 Initialize cache before memory autosize 18 8254 programmable int
126. ug CompactFlash into socket Note The locking bow must enclose the disk completely Removal Procedure 1 Open locking bow 2 Take CompactFlash disk s ends and pull CompactFlash disk carefully out of socket 3 Close locking bow again CMC Debug Module A CMC debug module is available as accessory kit for the blade It is called ACC ATCA CMC MODULE and provides two serial and one keyboard mouse interface at its face plate The CMC debug module is installed into PMC slot 4 For further details refer to the ACC ATCA CMC MODULE Installation Guide 52 PENT ATCA 717 Rear Transition Modules Installation Rear Transition Modules At the time of writing this manual the following Rear Transition Modules RTMs was available for the blade ACC ARTM 717 It provides the following interfaces Two USB 2 0 Two RS 232 Keyboard Mouse One serial ATA Four RS 232 interfaces routed from PMC modules installed on the base blade Note Refer to the RTM documentation for the RTM installation procedure Check the documentation of the system where you operate the blade and the RTM for any restrictions that may apply to the blade or the RTM No hot swap is supported for the RTMs The RTM furthermore incorporates an Intelligent Platform Management Interface Controller IPMC which enables you to monitor the RTM s temperature and voltage sensors For further information refer to the ACC ARTM 715 717 7105 7107 Control via IPMI Programmer
127. ure 14 PMC Sites 2 and 3 Pn4 Connector Pinout Note The signals available at pins 30 and 31 depend on the settings of the on board switches SW7 1 to SW7 4 See section Switch Settings on page 42 for further details By default the PMC I O Ethernet signals ETH xxx are routed to the on board switch via magnetics As an assembly option the magnetics can be by passed and the Ethernet signals can be accessed via an installed PMC uplink module from Motorola Consult your local Motorola representative for details By default the signals at pins 61 to 64 are routed the zone 3 connectors where they are available as PMC I O signals As an assembly option these signals can be routed to the on board Ethernet switch as further 100BaseTX interface Consult your local Motorola representative for details Parallel ATA Connector The blade provides one parallel Advanced Technology Attachment ATA connector which allows to connect a 2 5 hard disk to the blade The location of this connector is shown in the following figure PENT ATCA 717 67 Controls Indicators and Connectors Parallel ATA Connector mul OY e Figure 15 Location of Parallel ATA Connector The pinout of the connector is as follows 68 On Board Connectors PENT ATCA 717 On Board Connectors Controls Indicators and Connectors

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