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LG Electronics 70HA Flat Panel Television User Manual

1. A t3 3V NORMAL I NVRAM A Clock for LG1152 ati 0 luF EE EE EE a Ke ES for DiiVA China on o pETL Q 12C SDA2 Write Protection Cen 1 B9 j EPHY_INTL gt 12 sCL2 a Kl Il TO gt XIN MAIN Low Normal Operation B 7 Al High Write
2. 1 5V0O 0 75V_VREF_MO 1 5V0O 0 75V_VREF_M1 44 5 n61132 A A A A IC 9X 0 0 TO 9 30 0 DDR A 0 13 1 5VQ OTO 6 gt DE bbc 0 75V_VREF_MO LGC1132 A R9406 R9410 DORATO aj Ka tk T 0 75V_VREF_M1 DDR_A O M8 ALO A n v21 e e 6 e DDR_A 1 DDR 0 L9400 2 DDR All B22 BLM18SG121TNI1D DDR_A DD 1 DDR_A 2 v20 e T e R9407 R9411 DDR_A 3 H1 x DDR 2 TK C9413
3. RE SW CH CTE USE 2 C T C ATSC DTMB ISDB LNB TX CHB CVBS ERROR amp VALID PIN TU6504 TU6500 TU6501 TU6502 TU6503 LNB OUT CHB ERR L9 T2 C S TDSH T151F 3 3V TU ATV OUT CHB SYNC IC6500 3 3V_ TU TDSS G151D TDSN G351D TI SO HOBSCLE TDSO GO5D1D CHB_VAL 74LVC1G08GW a OPT CHB FOV TU eee 26511 CHB_CLK L6508 E BR_TW_CN_TUNER CHB_DATA TU_TS_VAL close to TUNER BLM18PG121SN1D PN C 520 TU RESET pri tio MAN 0 1uF etes mee d 1K 58 m SCH e Ls uL che TU_TS_ERR SR I E E TW_H NIM T2 C_F N CHB_ T C S2 V d CHB RF_SWITCH RF_SWITCH MT
4. A A em o em o o o a o a emm emm mm i mm M mm mm mm SS SS SS mm SS SS mm SS SS o mm o SO R109 R114 R117 R120 R122 R154 100 100 100 100 100 100 T ACI B2 c108 0 1uF EUN Bl J9 F6 a a A 2 RXAOP TXOP VSS 135 VDD33 1 e c gon mai Ae amm s est L t age 1 14 18 18 T 18 AC2 A2 C109 0 1uF c7 310 F20 gt RXB4P e RXAON TXON O TXON SS_2 VSS_136 VDD33_2 AB3 A3 c110 0 1uF Di J11 G6 f RXB3N e aca RXALP txir 5 TTE nm O TX1P p5 755 3 VSS_137 Sue vops33 3 p c 1 8V Power Separation 1 8VLVDS_RX Decaps RXB3P e apo ED TXIN Foz PITE T O TXIN Se 4 VSS 138 am vpp33 4 es 2 1 RXBCLKN gt RXA2P TX2P
5. A dau AA A A AA AA AA AA A AA A AA AA AA AA AA AA AA AA A AA AA AA AA AA GE O A 1 2 KS VV Normal l s SS SS SS mnt hey I A 5V NORMAL A MAX 1A gt gt ERROR OUT dup B 4 BLM18PG121SN1D S GE O DD i Lg VV 12V IN LG1152 Max 1728 mA C2322 KASO LG1132 Max 2000 mA 10uF POWER_ON OFPI 105 IC2304 3 12309 IC2306 BLM18PG121SN1D l 16v TPS54327DDAR EP GND EP PGND TPS54425PWPR POWER ON OFF2 1 OPT eMMC POWER Tuner 1 25V REG Dnpwet ers i d H R2348 10K EN VIN VIN2 E i VO 1 8 R2 3 3V_NORMAL p T i H 3 3V EMMC 41 8V NORMAL Suances 3 3V_TU_IN q z 55 A A A A VEB Za S c2345 VIN1 DS VFB 22K e e 2 E 7 LL C2354 7 E 2 e Ji T l E 0 1u L2313 i E 2 12319 VREG5 SH 16v 6 8uH VBST VREG5 BLM18PG1215N1D L2306 3 6 DIO e si e
6. DDRO_A 0 12 TR DDR1_A 0 12 H5TQ1G63DFR PBC 0 75V_VREFO_MO LG1122 H5TQ1G63DFR PBC 0 75V_VREF1_MO DDRO_A 0 12 lt gt DDR1_A 0 12 A 0 75V_VREFO_M1 0 75V_VREF1_M1 DDRO_A O N3 M8 A AE9 DDR1_A O M8 A AO VREFCA DDRO_A O DDR1_A O AO VREFCA DDRO_A 1 P7 AF25 ppR1 A 1 A1 DDRO A 1 DDR1_A 1 Al DDRO_A 2 P3 AD9 DDRI A 2 A2 DDRO A 2 DDR1_A 2 A2 DDRO_A 3 N2 H1 AD11 DDR1 A 3 H1 A3 VREFDQ DDRO_A 3 DDR1_A 3 A3 VREFDQ DDRO A 4 P8 AF24 DDR1_A 4 A4 e DDRO_A 4 DDR1_A 4 A4 DDRO_A 5 P2 AE11 DDR1_A 5 a A5 R202 DDRO_A 5 DDR1_A 5 E A5 R223 DDRO_A 6 R8 L8 1 5V00 AE24 DDRI Al6 L8 A6 J 240 12 K i DDRO_A 6 DDR1_A 6 2 A6 J 240 13 DDRO A 7 R2 AF11 DDRI A 7 1 5VQ1 ra a7 A y DDRO_A 7 DDR1_A 7 CY A7 A DDRO_A 8 A DDRO_A 9 GH Ka B2 DESDE CS AF10 SE d B2 DDR1 A 9 DDRO_A 10 al We M D9 T DBROEA 9 DRIAL9 Paros l A9 Se e A10 AP V DDRO_A 10 gt E A10 AP DDRO A 11 R7 G7 AE25 ppni A 11 67 DDRO A 12 xh x K2
7. 7UF uz a a a emm emm emm emm mmm emm om emm emm emm emm emm emm emm mmm emm emm emm emm emm emm D a a emm emm emm emm emm emm emm mmm emm emm emm emm emm emm mmm emm emm mmm 7UF 4 7uF 50V 50V Me I 0 1uF 50V 50V 50V PANEL VCC 412V m m a VCC_LCM 3 3V A R514 VL 0 1503 45V 22uH R533 A e e IT e 2 2A 9 C510 C514 D503 i San 10uF 10uF SMAB34 Ge e EE et R536 V uF uF uF lu 25V 25V SE 25V 10v 10v 50V 5 1K d C527 lu PANEL VCC 50v 12V VCORE A 1502 Eo LOM2HPN2R2MGOL R527 e II tus N ri 0 2 2uH a 2 NEN 10uF 10uF 10 A A a Wi 25V 25V ER E mim NI H N vL Ene amp Saga sss 5V luF a o S gt a of Als A 25V z Di al ol oi ol aj pj nja T VCC LCM VGL e EN1 i VLOGIC2 3 3V 5V TCOMP 2 SDA R522 3 A A TCoMP DX JL THERMAL SC T2C_SDA_S D50
8. P600 FI RESIS 1 M i E HF J R1500 3 3V 104060 8017 104060 8017 VCC_LCM d VDD L DIMO_SCLK Co 1 e 3 3V A ale gt vob A vO L DIMO_MOSI 0 1uF 4 LLVOP t 50V 3 pe 3 LVO L DIMO_VS 4 vec e e S SS LLVO 5 vec HVDD E LLV1P e 8V 5 I2C SDA S ele A C607 C610 LV2 SE 0600 gt HVDD 0 1uF 0 0luF v2 LLV2P 2N7002K dent e 50V 50V 1 a LLV2 SS 8 O LG1122 RST R600 AAA 33 END ven 8 OPT 9 5V 9 LVCLK o orre A EE LLVCLKP OPT_P 0 E var LLVCLKN OO FLASH WP Ee 1 2 3 LV3 PWM_BPL 3 coz Ge UR LLVAP GOE 3 va 4 ese 2 7V vat e GSC 4 V5P 3 3V 5 LGND 2 LV4 p LLV5 A 6 vsH 6 LV5 gt Tess SS LLV6P 7 LV5 O RXAON e Rvcom FE BENS C621 CONI gt VCOMFB 8 gt RXAOP S VCOMOUT 9 LERVOI 0 1uF 20 GND SES LRVOP OD RXAIN 50V ZOUT 20 E LRVO ae gt z OUT 2p pe RV1P 5 RXA1P 22 LEND 22 LRV1 23 LGMAL oe LRV1 gt RXA2N 5 I2C SCL S GMA2 GMAT 234 LRV2P 2d GMA2 24 LRV2 d gt RXA2P Q601 25 GMA3 L 2N7002K SUE GMA3 25 26 inti 26 LRVCLK R601 3 27 Lemas m
9. i WOOFER AMP TN DEE Rises i A WOOFER e FW25001 02 SPK 2P C5513 WOOFER 10000 L5500 50 HE WOOFER WOOFER e e WOOFER BLM18PG121SN1D R5505 a 2 e SCH 24V_AMP_WOOFER SPK WOOFER L Y o OPT 10K ES A AUD MASTER CLK ore R5506 Ge y SPK_WOOFER_L E E o o OPT z a e NOOFER NOOFER weess WOOFER dl eil roll al Leonie C5518 C5520 al 69922 WOOFER O Oo c Ko tur 0 1uF 10uF 0 01uf C5511 du C5512 Dos n abu 50V 0 GET 10uF FA H FH Ej ii a eil eil eil ell ec 16V ses T Ee ou Oil ei Diop et e e e e e SPK_WOOFER_L i l ol ol sel o CHEZ Ese E SE RCM D5500 WOOFER LWOOFER L5503 RA Bek CY aom c al fcm ee T 1NA4148W R5507 R5514 EE WOOFEE WOOFER 00V 12 12 0u WOOFER R5515 C5504 OPT WOOFER gt oO UO GI ni mjaloljlojajaja A on 05534 OPT 65506 C5508 QET LUQQERR NRS6045T100MMGK TO SEU 5 1K C5502 amet TUE 10uF 0 1uF E WOOFER 50V 10uF 10V 10V EE 22 ati WOOFER 10V 9 4270F e hd ue EO a SC ale 50V woo Es 10 0uH WOOFER WOOFER ai SH AGND_PLL OUT1B 2 e To T le IUS T R5503 E ZE 0 luF R5516 ce 3 3K 1 on WOOFER
10. GND 5V HDMI 4 103202 EP TPS2554 IC3201 1 HP DET HDMI HPD 4 eg HDMI 4 Ss SII9587CNUC 3 5y A ERU Er A Kri 5V_NORMAL m SNE D3206 E MBR230LSFT1G OUT 2 n IN 1 H DDC_DATA 0 Je 9 E E MIN DDC_SDA_4 30V D C3208 DDC_CLK 0 OUT 1 IN 2 0 luF 7 DDC SCL 4 8 3 NC sr HIE ILIMO a TEIM SEL S CEC_REMOTE P a CK 5 gt CK _HDMI4 M e ILIM1 E 1 16w CK GND D 6 5 e 4 AL m 10K ci o o MHL DET S SC 5J S 54 5 Ae kb wu R3245 Wi lO XO oo 4 cK HDMIA4 p Denn vp SS ES aS a X DO AH dy or prd arom Rp SED E gt DO _HDMI4 E BE z DO_GND dod Wal 5 H EE m zi DO D0 _HDMI4 pi 3 5V_ST gt D1 _HDMI4 A D1_GND VO DIA SI O O D1 _HDMI4 Sim E D2 E e emm emm ewe emm emm om lt E CD A GE GE A D S gt D2 _HDMI4 R3247 MMBT3906 NXP BEP P d B D2 GND M LOK 93201 S HDMI S W OUTPUT O i SC i B F ERES he SI 1 16w 3 E x gt E zi to N N a D2 HD 4 5 C3223 e C a e a a a a a d D EN X T e e e w h 2 i d m S SS i ke GE UE o gt 0 047uF B SEH ra CAD sp Sl gir pr cepe ee ET SER XE aa Fe H H H Ys say L wm DET iiti ike E E E E E E E E a cp 03200 a A A A A A V 0 3555388 RSD 105156 100 MMBT3904 NXP JE HDMI 4 With MHL f f
11. 5V_HDMI_1 BODY SHIELD A HP DET HDMI DEn 1 5V 4 GND DDC_DATA R3207 DDC_SDA_1 DDC CLK R3208 ppc SCL 1 ac CE_REMOTE CEC REMOTE wem a emm a a a a CK x ARC gt CK _HDM c EN CK_GND SEI H o 4 a CK 3202 4 gt CK _HDM 1 SPDIF_OUT_ARC e D0 hd A E gt DO _HDM 5 S oO tM DO_GND S GES 0 1uF pos 16v DO _HDM ae D1 p1 HDM Nt E D1_GND D1 C gt D1 _HDM D2 gt D2 _HDM D2_GND D2 D2 _HDM JK3202 Da ve HDMI1 With ARC du SS SS SS SS SS SS mee as BODY SHIELD SV_HDMI_2 A HP_DET HDMI_HPD_2 5V GND R3209 DDC_DATA 0 AAG DDC_SDA_2 DDC_CLK 0 gt ppc scr 2 NC CE_REMOTE CEC_REMOTE CK gt CK _HDMI2 CK_GND H E CK N E gt CK _HDMI2 VO x o DO gt DO _HDMI2 10 oA DO_GND Fi DO O D0 _HDMI2 D1 D1 _HDMI2 D1_GND Dit O D1 _HDM12 D2 gt D2 _HDMI2 D2_GND D2 gt D2 _HDMI2 JK3200 RSD 105156 100 D 12 BODY SHIELD 5V_HDMI_3 HP_DET HDMI_HPD_3 5V GND R3204 DDC_DATA 0 Adv DDC_SDA_3 DDC_CLK o CI ppc_scL_3 NC CE_REMOTE CEC_REMOTE CK gt CK _HDMI3 CK_GND H P CK N S gt CK _HDMI3 VO d so DO i C DO _HDMI3 o E DO_GND El DO DO DO _HDMI3 D1 gt D1 _HDMI3 D1_GND D1 D
12. 5V USB FOR USB1 ji R4327 10K R4323 I pu 10K MAX 2A POWER_ON OFF2_4 IC4303 R4328 EL S CL Wl TPS2554 EP 10K a C4327 0 1uF h ev so FAULT e o zd 16V LL mi A Y Y L4308 S 24V 0 1uF me C4329 IC4305 E Sh E A z i IN 1 ZS OUT 2 E TPS54331D e SU e 2 HU 9 e UJ S B m E H D E 14305 wa IN_2 P OUT 1 C4323 na gt C4333 C4336 simiepeizismin SEAS 22u S20 uF ds T DYR Ready n 10V 16V ILIM SEL z perme t i c MAX 1 8A o SE on w EN ILIMI Th 0 1uF S USB CTL1 e 5 6 V 50V oe NS oo m A x de ls lle 3AU048 305 ZC LG C4332 C4334 M T o o JK4303 VSENSE we ge S aes y E 47pF 1700pF SY lt Q EX Sn 50V 50V R1 4 OKNS d NS a GER O mm oo nn z R4336 m ORT E DTE OK SE C4338 S 50V 4 0 e 000pF USB_DM1 e E J 50V o N a E m O ss A USB_DP1 e EM A e m o a uN D Vout 0 8 1 R1 R2 2 Ge R2 X o do z NS Hum AA oot N J Oma R4332 V M ICA306 d Kl POWER ON OFF2 4 EP GND SN1104041 DC DC 2CH USB SW C4300 3 0 luF 16v 12V SR 3 3V_NORMAL A VIV EN 24 1 A d Ze T E R4342 AGND_ D 5 COMP 10K 314306 Ius 23 E lt 2 e o 6 BLM18PG121SN1D 3 O 5 SB DCDC SN1104041 x v Y x ui VIN 2 SS C4340 LL 04340 1 E t U S B p e Z 22 ST 3 C4342 4700pF OLDE E ES S 100pF 50V 50V S N nO
13. A HARPHONE AMP Sen 120 ohm BLM18PG121SN1D Place Near jack Side 0 D D D D sal C6405 10uF 0 1uF EH 10V dE 16V E E i R6406 i 10 i e gt HP_LOUT Close to the IC C6402 1 16W i 5 i C6408 o0 47ur i t3 3V NORMAL EC A l i C6400 ME Dis lur 2UF i 10V mune 10V HP LOUT MAIN o i CPP 1 ur SIDE HP MUTE i IC6400 C6407 MMBT 3904 NXP HP MUTE i 0 ai i C6401 gt luF es 10v e CPN o 0 i HP ROUT MAIN EAN60724701 I di E ON I sp i a v gt i R6407 i eg E 10 S amp S R6403 i ES HP_ROUT moe 4 7K UL C6404 1 16W i nr aE 5 CS li C6409 P 0 47uF i 16V i A Am ap GD GD GD 9 Low Pass Filter IHE AN SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES vue Cl RE MODEL DATE IET umm eee eee me nnt ss Spectre B ID ELECTRONICS Brock SHEET gt Copyright O 2012 LG Electronics Inc All rights reserved LGE Internal Use Only Only for training and service purposes T C S amp H NIM T2 C TUNER EU CHINA A
14. E o o MO MO eo CoO nu i 3 3V_NORMAL E E 12V MOTOR IC10001 R10008 A 100 en BD6222HFP N e MOTOR CLOSE SW BEER o Seo 5 S x Fa R10009 VREE 100 e o e gt OPT c10004 c10005 sai y y D OUT1 om o o ES L DIMO_VS SN SS o 1ur 0 1uF MOTOR X o wo gt o gt 16V 16V a ZA z UK R10029 N oo N aT o R10019 0 100 FIN 5 5 e GND R10028 R10017 0 SIGN100013 100 RIN m e OUT2 R10018 0 MOTOR XK A DIM OPT R10034 1 VCC P10000 SS j 12507WR 06L MOTOR_SENSOR CLOSE 7 R10027 0 JP10000 MOTOR SENSORK OPEN 2 MOTOR_SENSOR JP10001 L10000 JP10002 MLB 201209 0120P N2 d e TO MOTOR JP10003 L10001 e G TER MOTOR JP10004 MLB 201209 0120P N2 c100001 C10001 ORT 0 1uFIZO 1uF OPT SS JS MOTOR DRIVER Wh Q 12V 12V_MOTOR SS a a a S SE A A MAX 1500mA Close to C7406 MLB 201209 0120P N2 Tics 201998 01909cNP L10003 UU L10002 e DS e c10011 c10012 C10009 lOuF t LUF 7 ZZ 50V A EE A M m T 50v MOTOR Ground LL en o o o em om mm o emm Ed ii i M i Sl CC lE E 12V_MOTOR A i A 12V_MOTOR A y A e 9 o MOTOR SENSOR ES T 5 MOTOR SENSOR A e s uox e IC10000 A sr MOTOR_SENSOR e 0895 8 n M KA4558D o E N uN KO o D10000 tar ER OTOR_SENSOR e E US ES I a de a BAT54SWT1 25V di SEA a SNE M
15. 5V_CI_ON A e e K e C6200 C6201 LRE208 LRE209 CI DATA 0 7 0 luF 10uF To Lov 10K 10K CI OPT OPT P6200 10067972 000LF CI R6219 10K PCM CE1 GND 1 PEND OPT i c ON C1 CD1 4 R6214 100 CI DETI 2 5573 CI DATA 3 CI CI TS DATA 3 TS OUTS3 3 DATA CI_DATA 4 TS_OUT4 DATS CI_TS_DATA 4 lt 1 a 5V CI ON TS OUT5 5 DAT6 CI DATA 6 Ca od R6204 R6206 CI TS DATA 5 C S TS_OUT SE Se CI TS DATA 6 K Jl S 6 pare CI DATA T CI TS DATA 71C TS OUT 1 7 CARD ENI e CI R6224 22 Se CARD_EN2 ADDR10 CI_ADDR 10 K PCM_IORD PCM_CE2 m 7 8 1 C cri ADDR 10 OPT PCM_IOWR e CI VS1 CER e 3 9 Low PCM_OE E IORP 44 o RADDRI1 CI ADDR II C cri ADDR 11 45V CI ON CI IN T DATA 0 7 IOWR 5 1 JADDRI10 CI_ADDR 9 KA ci ADDRI9 A TS_IN_SYN B 7 TN 6 2 LADDR8 CI_ADDR 8 Cf ADR ES ER Gin CI_IN_TS_DATA O TS INO 49 3 JADDR13 SI ADDRU SII lt CI_ADDR 13 is 2 T K K CI_IN_TS_DATA 1 TS_IN1 8 4 JADDRI14 CI_ADDR 14 CI ADDRI14 em OB CI IN TS DATA 2 TS IN2 9 5 lD wR EN PCM_WE CI_IN_TS_DATA 3 TS_IN3 so 6 LZIRQA R6243 22 ee e VCC 51 7 vcc PL CI C6206 OPT 5V_CI_ON R621 0 VPP 52 e ver R6216 9 CI io A CI_IN_TS_DATA 4 OPT TS_IN4 53 o Ts IN var OPT ana e CI IN TS DATA 5 TS 5 54 20 rs IN CLK T CI_IN_TS_DATA 6 TS_IN6 R6211 R6205 R6207 29 21 JADDRIA CI ADDRII2 CI ADDR 12 10K 10K 10K CI IN TS DATA 7 TS IN7 56 22 ADDR7 CI
16. e PHY TD e PHY TD e PHY RD e PHY RD D5000 D5001 D5002 D5003 5 5V T 5 5V T 5 5v T 5 5V T OPT OPT OPT OPT e e e ESD for MTK BSD boe MG SA SHIELD ESD_LG1152 D5000 1 1 T ESD MIR a Y ADUC 5S 02 ORSL BSODUSH E 5 5V ADUC 5S 02 ORSL ESD 1G1152 D5001 1 E F ESD MIK ADUC 5S 02 ORSL D5001 2 5 5V ADUC 5S 02 ORSL ESD_LG1152 D5002 1 F ESD_MTK ADUC 5S 02 OR5L D5002 2 5 5V ADUC 5S 02 ORSL ESD LG1152 D5003 1 T ESD MIK D5003 2 ADUC 5S 02 ORSL 5 5V ADUC 5S 02 ORSL IHE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X RADIATION CI edo 4n PRA SECRET LG ELECTRONICS MODEL DATE THE CRITICAL COMPONENTS IN THE NN SYMBOL MARK OF THE SCHEMETIC LGElectronics BLOCK 5HEET v7 Copyright O 2012 LG Electronics Inc All rights reserved Only for training and service purposes LGE Internal Use Only Ethernet Block 3 3V_NORMAL A 3 3V NORMAL A C5200 4 7uF 10V HE LAN_JACK_POWER o0 ET COL SNI 0 1uF 0 1uF 16V 16V Toe LUI Place 0 luF close to each power pins Place this cap near IC C5208 TM 0 LuFa 10uF 16V 10V OPT L o o xi 2 n H LE a D E a BO B e H A I s x o 4 oy C5206 S Pu fu 15pF E H bi Wi 50V 3 3V NORMAL f on A f om N 2 now
17. U a m 03438 Job 5V_NORMAL 16V Q11002 A OPT IR_Bla R11021 10K IR_Bla i IR Bla IR Bla c11003 C11005 22pF 7 s 22pF 50V n 50V q SS V R Bis E A R11022 4 7K IR_Bla e e S IR_Bla R11001 1K IR B RESET B 011003 LL 611010 MMBT3904 NXP 0 1uF IR Bla IR Bla 16V 22 IR BI IRB SPI MOSI R11006 22 A IRB SPI MISOK R11007 IR Bl 22 IRB SPI SS R11008 IR Bl R11009 22 IR Bl I R B SPI CK IHE N SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X RADIATION FILRE AND ELECTRICAL SHOCK HAZARDS WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE AN SYMBOL MARK OF THE SCHEMETIC Copyright O 2012 LG Electronics Inc All rights reserved Only for training and service purposes SECRET GElectronics LG ELECTRONICS LR ES Mivcom Download BLOLK m H E E JK11001 KJA PH 0 0177 MODEL e sz a DATE TI se ZY o LGE Internal Use Only en Jee S et r eet Zeg All of OPT decaps must be placed on PCB Bottom side IC100 f Vxl HS Tx AC coupling Caps must be IC100 1c100 l 161122 placed near by LG1122 J LG1122 40 9VDC LG1122 3 3V_I0
18. A MO DDRAVREFDQ DDR3 LN K4 J9 ses EO 2Gbit yeerca EEN Al Lt as A2 K3 E2 Pa A3 VREFDO e L9 ge aa HE VCC1l Zu MAIN ta ta AS 25 3 M9 H9 Enzo N se 3 2 A6 5 M3 240 R o IS AT g a N9 1 E el A8 X N M4 A3 How IN a9 e m o H8 A10 A10 AP M8 D8 c706 0 1uF xe G3 t 0 1uF c707 1u A12 BC D I G9 c708 0 1uF A13 N8 K2 c709 0 1uF L A14 K10 cno 0 1uF M2 e711 oio 33 M10 b e712 H K9 VCC1 5V MAIN JA LN B10 MO_DDRAVREFDO F8 c2 LN G8 E3 io asa G10 E10 ES x S H3 Fu Fu G2 de 5 Di EI ad o Fa i rU sa WX ST ST H4 aes 5 Al 2 E N3 All N1 N11 ca al D4 B8 A2 DM TDOS AB 295 A9 NF TDOS TDO BZ D9 F3 F9 B4 J2 c8 J10 c3 L2 c9 L10 E4 N2 E9 N10 D3 E8 B3 a4 B9 F2 c10 F10 D2 H2 D10 H10 J8 IC701 MI DDRAVREFCA H5TO2G83BFR PBC a A VCCl 5V M1 DDRAVREFDQ A DDR3 A K4 2Gbi J9 lan TE VREFCA MI DOEAVREECA Al SE kj E2 mex A3 VREFDO E L9 A4 L3 VCCl 45V MAIN ba AS EN ta M9 H9 BU E 3 2 A6 nd M3 240 5 B rele AT 1 n Saz D I m S A8 o er m M4 A3 A zi A9 C o H8 A10 2 A10 AP M8 D8 c71i3 0 1uF All x K8 E G C714 0 1uF A12 BC nl G c715 o iur 4 we K2 ETE 0 1uF aL Al4
19. IC100 22 D B1 ROARC ROAMUTE ROALRCK ROABCK ROASDA ROASD3 ROASD2 ROASDI ROASDO P Ein Er P EJ Ji EN E _DAC1_LRCH DAC1_SCK _DAC1_LRCK D_FS25CL D_FS24CL D_FS23CL D_FS21CL D_FS20CL DCLK_OUT_SUB D_DACO_LRCK D_DACO_LRCH D_DACO_SCK D_ADC_LRCH D_ADC_SC D_ADC_LRCK D_MIC_LRCH D_MIC_SC D_MIC_LRCK _DATAO _DATA1 _DATA2 _DATA3 STPIO_SOP GP STPIO_VAL GP STPIO_ERR GP STPIO_ TPI_DVB_CLK GP TPI_DVB_SOP GP TPI_DVB_VAL GP TPI_DVB_D TP TP TP TP TP TP TP STPI CLK STPI SOP STPI VAL STPI_ERR STPI_DATA STPIO_CLK 043 042 041 DATA GPIO40 047 046 045 TPI_DVB_ERR ATAOJGPIO44 DVB DATA1 _DVB_DATA2 _DVB_DATA3 _DVB_DATA4 _DVB_DATA5 _DVB_DATA6 _DVB_DATA7 TPI_CLK TPI_SOP TPI_VAL TPI_ERR _DATAO _DATA1 _DATA2 _DATA3 _DATA4 _DATAS _DATA6 47CHB AR102 L1 AH2 05 f AG2 L3 AF2 K1 AH3 K2 AG3 32 AGA 33 AF4 K3 AF3 H R AH5 H2 AG5 H3 AF5 J i AH4 G AH6 G2 ij AG6 G3 AF6 B AH7 E AG7 AS AH10 B4 AG10 C4 AF10 A2 AH8
20. Ti THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X RADIATION FILRE AND ELECTRICAL SHOCK HAZARDS WHEN SERVICING IF 15 ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE NN SYMBOL MARK OF THE SCHEMETIC I Copyright O 2012 LG Electronics Inc All rights reserved Only for training and service purposes SECRET LGElectronics LG ELECTRONICS MODEL DATE BLOCK e SHEET LGE Internal Use Only IR BLASTER 3 3V NORMA A L IR Bla 3 3V_IR_Bla A IR_Bla 3 3V_IR_Bla A IC11002 MC96FR3128R IR Bla Pattern Width 0 5mm R11020 Pattern Width 0 5mm 0 e Pe mM m C IR Bla JA 111001 RI101R py 100 B 011001 H IP x ZEE e e BT2222A_AUK gt IR_Bla S S BLM18PG121SN1D E 65 IR_Bla E N al i A e R11019 E 0 e A IR_Bla H ES c11004 ci1008 C11006 i Jul 1 Out 0 1uF 0y 16v R_Bla IR_Bla OPT Close to JK11001 e P11001 DSCL DSDA
21. DTV MNT_R_OUT lt C 06001 B MMBT3904 NXP THE ZN SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X RADIATION CI edo 4n PRA SECRET LG ELECTRONICS MODEL IHE CRITICAL COMPONENTS IN THE N SYMBOL MARK OF THE SCHEMETIC LGElectronics BLU EK T IS SHEET EC Copyright O 2012 LG Electronics Inc All rights reserved LGE Internal Use Only Only for training and service purposes CI POWER ENABLE CONTROL 5V_CI_ON 5V_NORMAL A 06201 A03407A CI Y a I E N C6202 R6248 OP T 0 1uE SE 10K 16V o luF CI R6241 C6207 25V GI 22K 4 7uF f OPT R6221 10v 10K OPT E OPT e e R6242 2 2K CI C R6223 4 7K B 06200 PCM_5V_CTL e MMBT3904 NXP CE CI R6218 10K 7 CI a vo we Option FOR MTK OPE vom FOR LGLLSZ ae CE210 1 K 25V CI MTK IHE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X RADIATION ESSENTIAL TAAT OL MMPATURES SPECIED PATS BE USED fon SECRET L6 ELECTRONICS ELI JO E THE CRITICAL COMPONENTS IN THE NN SYMBOL MARK OF THE SCHEMETIC GElectronics BLOCK SHEET RA Copyright O 2012 LG Electronics Inc All rights reserved LGE Internal Use Only Only for training and service purposes 3 3V_NORMAL
22. Standard Repair Process Established Error A Video error B WT symptom ymp No video Normal audio Revised date 1 15 First of all Check whether all of cables between board is inserted properly or not Main B D gt Power B D LVDS Cable Speaker Cable IR B D Cable Geh CG AA No video Check Back Light Check Power Replace T con Normal audio On with naked eye Board Board or module 24V 12V 3 5V etc And Adjust VCOM AN x Precaution c A7 amp A3 Always check amp record S W Version and White Balance value before replacing the Main Board SIS ITANE 1 Copyright O 2012 LG Electronics Inc All rights reserved LGE Internal Use Only Only for training and service purposes Standard Repair Process LC D TV sym ptom ale ia AA Check various N Check and voltages of Power E S replace Board 3 5V 12V 20V N 7 MAIN B D or 24V No Video No audio Replace Power Board and repair parts Copyright O 2012 LG Electronics Inc All rights reserved LGE Internal Use Only Only for training and service purposes Standard Repair Process Picture broken Freezing Revised date 315 symptom A6 By using Digital signal level meter By using Diagnostics menu on OSD Setting Set up Manual Tuning Check the Signal Signal strength Normal over 5096 Signal Quality Normal over 5096 Check RF Signal level Check whether other equipments have problem or not By conn
23. xn 5 H N 25MHz CL 18pF ESR max 30 Ohm 30ppm P Ei N R5205 Ns 0 d Place this cap near IC C5207 0 gt a 15pF E a a x nj pl a I o ol aq l o x a T SZ A aj moi of tk ml Mu 5204 F el ala E C x a is F C5205 aj Si x aj al Hl aj moi a u 0 1uF Place this Res near IC Hl mj Ml gt gt x oj gi m of oj aj al OF oj A lov To SA erra reas OPT 16v Aa Lt c R5204 mock de 2 49K 1 RSET i ie il LEDO PHYAD 0 PMEB 3 3V_NORMAL A eo x x E Li B st sr o E H N D D na CD EPHY LINK CD EPHY ACTIVITY gt ET_RXER 174 7K R t3 3V NORMAL 7 EPHY LINK 1 16W R5212 1 5K 5 gt EPHY_MDIO RST_PHY ik C5212 THERMAL se AV DDI OOUT 33 MDIO Route Single 50 Ohm Differential 100 Ohm MDI 0 MDC EPHY MDC EPHY TDP aa MDI 0 IC5200 PHYRSTB EPHY TDN RTL8201F V MDI 1 TXEN EEE 3 3V_NORMAL UT T ee MDI 1 TXD 3 0 1uF EPHY_RDN ZN OPT e AVDD33 1 TXD 2 R5203 RXDV TXD 1 EPHY_TXD1 4 7K m dl oj nj of EA yel H H x lt m x lt o all allie 4 AJ t3 3V NORMAL x x x gt x al mj d a E A N o ES E x lt M a i um N N S a al X ail E i r C5211 VO si 2 D 0 1uF si sje o 16v mi D sl e A Oo alee
24. LO o m vd Q VO lo o I N I o 1 D Im e d Br plo EE ci a a gt x a e iy x D Ka I l e H I Loy 9 o xi Sh Zo Di Qi Sa A m ni N i o m Ay Ay a d Hei 5 H Do K m ud al gt I LI THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X RADIATION FILRE AND ELECTRICAL SHOCK HAZARDS WHEN SERVICING IF 15 ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE NN SYMBOL MARK OF THE SCHEMETIC Copyright 2012 LG Electronics Inc All rights reserved Only for training and service purposes SECRET LGElectronics LG ELECTRONICS c EPHY REFCLK WIELT ao DATE S BLICK prene SHEET LGE Internal Use Only L5404 10 0uH NRS6045T100MMGK L5405 10 0uH NRS6045T100MMGK L5402 10 0uH A NRS6045T100MMGK L5403 10 0uH DUAL COMPONENT 3 3V NORMAL AMP RESET H T aud 100 01801 1ST OTRIY80001A 2ND OTR387500AA 2 n S Se 15401 3 3 2 BLM
25. D D D D D D D D D D D D D D D D D Ge Ge Ge D GE c2301 S e c2313 L22315 SE gt En ee g TUF E SE we 10uUF om 0 1ur i 45V NORMAL A 2 fa 7 4 d 10v vec ss 10v 16v B S vec SS j py R2300 3 6 C2340 C2344 i 10K EN GND Le 02324 Li DA our 0 1uF 4 5 R2334 10uF ANA 10V END 9 10V 16V POWER ON OFF1 POWER ONJOFF2 2 Se qd E i 2200pF b i A y i VONE Ose SELA i i b 102305 FP i 7 R R i cD AO D AO AO A A A A A A A A A A A A A A A A A A A A AO A AO AO GP GE AA R2377 m t i 100K RT CLK i PWRGD i aL S DDR MAIN 1 5V SE z 2 A A ED Gea Ge Ge Ge Ge Ge AA AA AA Ge Gee A AA AA Gea age age AA A A A AA AA AA A A A DW o i L2315 E Be x C2349 0 9V_VDD S SS en o em em S CND 1 eoo BOOT 2 moo 3 MAX 4 7 A b 5 U b E 3 3V NORMAT xt 3 ma l v w IM e I l i x e POWER_ON OFF2_3 i 0 9V_VDD 3 2 i e OU EES A ER SES pss A P S eeng A iun if PVIN 1 PH 1 C2350 C2363 C2370 e t3 3V NORMAL i e 11 L i bd e i 22uF 22UF aml 0UF mee n 0 1uF C2347 10v 10v 10v E sie eae 16V C2327 1 5V DDR B s IVINS Zi i 0 1uF A e Gees E 0 UL b C2375 E o MM wo 180pF maga E VIN SS TR s N 20M t Zoe as IRI 6 9 12V B ria E i i L2308 lj b i Ay An i gt ER 3 SE i foe VSENSE COMP L2304 e nA 12312 7 8 R2357 1K H o t
26. K10 ox ow Q E M2 c718 0 1uF 33 M10 i c719 0 1uF 1 K9 VCC1 5V MAIN JA Bi e M1_DDRAVREFDO F8 c2 LN 68 E3 S D asa G10 E10 me x E H3 la lu G2 oe 3 Di St a o Fa S e al 64 Ka GE sT H4 o 2 Al S H N3 All N1 N11 c4 ale D4 zi B8 A2 DM TDQS AB anos A9 NF TDQS 9 B2 D9 F3 F9 B4 32 c8 J10 c3 L2 c9 L10 E4 N2 E9 N10 D3 E8 B3 vssQ_1 A4 9 1 Tao F2 vsso2 Pozo vSSQ 3 F10 D2 VSSQ A H2 D10 vsso_5 H10 2 J8 M2 DDR An AO b M2 DDR A1 Al M2_DDR_A2 A2 M2_DDR_A3 A3 M2_DDR_A4 A4 M2_DDR_AS AS M2 DDR A6 A6 M2 DDR A7 A7 M2_DDR_A8 A8 M2 DDR A9 A9 M2 DDR A10 A10 AP M2 DDR Ai All M2_DDR_A12 A12 BC M2_DDR_A13 A13 VCClJ6V DE M2 DDR CKE A15 Eres M2_DDR_BAO RITA HM M2 DDR BA1 TOR M2_DDR_BA2 gt M2_DDR_RESET_N M2_CLK M2 CLKN L M2 DDR CKE M2 CLK R715 M2 DDR opt 150 M2 DDR RASN 2 3 M2 DDR CASN 2 4 gt M2 CLKN M2 DDR WEN Ll M2_DDR_RESET_N E D M2_DDR_DOSL_P M2 DDR CLK ODHE AL M2_CLK M2 DDR DOSL N M2 DDR CLKN DRAMA 7 M2 CLKN M2_DDR_DOSU_P M2_DDR_DOSU_N M2_DDR_DML L_ M2 DDR DMU 2 M2 DDR Don M2 DDR DO M2 DDR DQ2 M2_DDR_DQ3 VCCL 5V_DE VCCL 5V_DE 5 M2 DDR DO M2 DDR Dos P dE DRM ARE M2 DDR DO6 NJ e co Los M2 DDR DQ7 asa aoa mex Pa D a M2 DDR DQ8 M2 DDR Do E fa ha he 5 a A E E M2 DDR DQ10 a ei E S ak E e M2 DDR DQ11 E c Seen M2 DDR DQ12 E d e m x 2 SG S 2
27. NTFFOe3 nK 8 CVBS Out y SCART lt DAC DATA Component gt A 2Ch gt C USB2 0x3 HDMI AAD DATA RMII 1 Ch GSS por Ethernet TXA B HSR P M 51Pin LVDS PC RGB Cem mmc 012295 Y WUXGA SS Keypad MICOM M Remote R TX IR Motion R Copyright O 2012 LG Electronics Inc All rights reserved LGE Internal Use Only Only for training and service purposes Jack Interface COMP_Y Pb Pr AV_CVBS_IN COMP_DET AV L R IN AV CVBS DET BER SPDIF_OUT O spor PC L R IN E PC_Audio seal HP_L ROUT e Earphone Block SC_CVBS_IN SC FB ID IN 2bit SC R G B 3bit SC L R IN EDID WP RGB DDC SCL SDA 2bit DSUB R G B 3bit DSUB DET RGB DTV MNT V OUT MUX SCART E ATV_OUT Tuner Copyright O 2012 LG Electronics Inc All rights reserved LGE Internal Use Only Only for training and service purposes L9 Block diagram DIF ATSC Half NIM SIF Audio L R 5 ch Sam Tuner_CVBS Cen CVBS 6ch ue i am A Component 2ch m PC RGB HDMI 1ch ee ARC 1ch Analog Chip GBB AFE 1ch 30MHz w PLL BTSC AFE 10b 18 432MHz w PLL 1ch mono Audio ADC 24b 48KHz 1ch L R Audio ADC 24b 48KHz Global Baseband V Q DVB T C 4 val err clk sop 8 data Parallel TS System Demux 10 data 1
28. SCART_Lout lt _ e SCART_Rout JJ PC LINI PC_R_IN SC_L_IN SC_R_IN AV1_L_IN AV1 R IN IHE C3625 5pF 50V OPT OP 12V 100K R552 75 R606 1 R605 1 75 R604 1 75 C gt DSUB_VSYNC T c3 R3633 EU Ww 100K R538 E 5pF ET OPT Lem N CY Qe EU 100K R554 AN e 100K R549 L506 EU N 0 L ON Qa U H N H Se gt DSUB_HSYNC R566 C540 1000pF R567 150 C541 0 047uF Near Place Scart AMP A 10K 25V1uF C6006 R6006 10K R6005 luF 25V C6001 EU EU IHH aw SCART_AMP_R_FB EU EU HA Hw SCART_AMP_L_FB N A SCART Lout SOC SCART Rout SOC IC101 LG1152AN B2 XIN_SUB XO_SUB VSB_AUX_XIN XTLIN_AAD XTLOUT_AAD OPM1 OPMO PORES_N L9A_SCL L9A_SDA CVBS_IN1 CVBS_IN2 CVBS_IN3 CVBS_VCM CVBS_IN4 CVBS_IN5 CVBS IN6 CB IN CB VCM BUF_OUT1 BUF_OUT2 Main clock for LG1152A yee C513 24MHz X500 R535 1M 8pF al gt XIN SUB XO SUB E AUAD_L_CH5 IN uF AUAD_R_CH5 IN R510 EU R602 470K uF EU CH4 IN R511 EU L508 R608 470K d it EU C588 330pF 50V
29. SOC RESET gt R571 0506 MMBT3904 NXP IC500 NLASB3157DFT2G EU EU R507 10K R592 220 t PONI DTV ATV SELECT EU 593 220 EU MMBT3906 EU 0504 d E L E 100 R576 R599 ee OPT L17 XIN SUB XO SUB lt R560 33 L18 R5 NS P17 K17 K18 M2 M1 RA 047uF R57 R57 047uF 047uF R559 68 047uF R574 R551 3 554 047uF 047uF R55 3233 0555 047uF R575 DSUB HSYNC DSUB VSYNC gt 10K R993 R555 R558 68 3 C556 047uF ojojojojojoljo olo 047uF 10K DTV MNT VOUT 33 C549 3 050 1 00 C 553 C552 100 C55 EU Cresc lt aja Sjalajlajslnlajalaj sjis R536 68 C516 047uF R539 33 C518 047uF R541 68 C523 047uF R546 33 ojojojo C526 047uF T R547 C527 1000pF R548 68 C531 0 047uF R550 33 C532 0 047uF R568 33 C542 0 047uF R569 33 C543 0 047uF SC SOG IN C544 10 O0pF R570 33 C545 0 047uF R564 150 C538 0 047uF R565 150 C539 0 047uF e 5 5Vp503 V D505 5 5Vn506 piq OPT OPT DE C580 10pF LO Ond OPT R3634 2K
30. SPI FLASH 4M Bit 3 3V NORMAL A e TC 930 1 W25X40BVSS R9334 R9335 I 0 1uF 4 7K 10K OPT cs T vcc SPI_CS om e R9337 DO IO1 E HOLD R9343 SPI DIK d 33 3 3K N CLK FLASH WP e 0 lt SPI_SCLK P ma o VO Io OO a H DI IOO0 md ge DO U SPI_DO H TEST MODE Configuration LG1132 Has Internal Pull up Default Setting All H Normal Operation Mode TMODE 3 0 0000 gt System PLL Test 0001 gt LVDS Rx Isolation Test 0010 gt LVDS Tx Isolation Test 00 gt LVDS Bypass Test 0100 gt ALL PLL Test R2338 100 OPT 1001 gt DDR PLL IsolationTest gt TMODEO 1010 gt Functional Test R9339 ann 100 OPT O TMODE1 10 gt BIST 1100 gt Scan Test Normal ILS vv HI OPT gt TMODE2 1101 Scan Test Adaptive R9341 AAA 100 OPT 1110 gt Display PLL Test L TMODES 11 Normal Operation System Configuration Default Setting 0 0 Boot From Ext Flash Normal Booting 1 Internal RAM Boot JTAG Booting gt SMODE o o H N IN 3 o o D 1 0V Power Separation 1 0VDC A e C9353 C9361 A up 4 7uF 10V 10V 1 0VDC Decaps 1 0VDC A e C9348 C9354 C9356 C9360 C9364 C9366 0 luF 0 1uF 10uF 10uF 0 1uF L0 1uF 16V 16V 10V 10V 16V 16V OPT OPT OPT OPT e 1 0V_XTAL DDR3 PLL SS PLL DIS PLL VDD 1 0VDC 1 0V_PLL_VDD A 1 0V_PLL_VDD A A L9309 BLM18SG121TN1D e TS e C9352 C9357 C9359 C9363 a4 7uF 4 7uF o0 1uF LA 0 1uF 10V 10V 16V 16V e LG1132 XTAL 24 75M
31. f JK3203 Do H GA A II IS S gt V AH CED aum GE A GP A 5V_NORMAL GE 5V_NORMAL A 5V HDMI 2 e e 2 la de 3 lt Pj Sie H N D32000 Y e a nodW Y iL e 16V O e 0 1uF 1 AN N A e C3224 AN R3217 R3219 IN ja I 0 1uF FE n Qioilada nmi zinmizini zinza na N 16V R3225 R3228 lolalalal a lolo ololalolzlalzla lz zlalzlan Cl ol eil eil Gil Gil oO aA J DDC_SDA_1 47K GALAX XIXI XI XIX x x gt Se ojlo 2 SDA l1 47K lol plolojojojojojojolalolxixixjijxixj ixjixixiamlia ida sd L lt DDC_SDA_2 gt a KI mic A LL mj mj we A A B Re Re Be B Be RY B a gt gt 3 3V_NORMAL ua eee A Ll AA DDt scn 2 A GP GP A a 5V_NORMAL E ss RIXCN A PO 5V_NORMAL 3 5V_ST AR RIXCP 5V_HDMI_4 A SPDIF_OUT N CK _HDMI2 E ala RIXON 33 za E a D D0 HDMI2 em gt HDMI INT p320019 V ECL at RIXOP 33 I2C SCL gt D32030 Wi 3200 Y ic RIXIN ge e i ET i T I2C_SDA5 e RIXIP 33 SE HDMI_S W_RESET Es 8 R3220 R1X2N 47K SE R3229 D2 HDMI2 Emm L aK i i TO 201 D2 _HDMI2 DDC_SDA_3 DDC_SDA_4 AVDD12_1 c A gt DDC_SCL_3 DOES SE De emm ap ap emm I VDD12 SII9 9587CNUC ep emm emm emm a 0 MHL_DET E uv R3XCN Se i R3XCP FHD 3 3V NORMAL CK _HDMI3 R3X0N DO _HDMI3 r MX X R3XOP So Sx DO _HDMI3 i D T R3X1N Device Address x S bises gt HDMI_WKUP R3X1P o e D1 _HDMI3 t3 3V NORMAL R3X2N PWRMUX OUT D2 HDMI3 R3216
32. gt TCON SCL LG ELECTRONICS All of OPT decaps must be placed on PCB 3 3AVDD_PLL Decaps VCC_LCM 3 3V 3 3AVDD_PLL 3 3AVDD_PLL A A A L400 MLB 201209 0120P N2 e TON Ld C401 C407 C413 4 7uF 4 7uF 0 1uF 10v 10v 16V 1 OVDD_PLL Decaps VCORE 1 0V 1 OVDD_PLL 1 OVDD_PLL A A A L401 MLB 201209 0120P N2 e VON e C402 C408 C414 a4 7uF 4 7uF o0 1uF 10V 10V 16V 3 3VDD Decaps VCC_LCM 3 3V 3 3VDD A A L402 MLB 201209 0120P N2 e di e C403 C409 LA 0 1uF LA 0 1uF 16V 16V 3 3AVDD TX Decaps VCC_LCM 3 3V 3 3AVDD_TX A A L403 MLB 201209 0120P N2 9 C404 C410 m BC 0 1uF 16V 16V 1 0VDD Decaps VCORE 1 0V 1 0VDD A A L404 MLB 201209 0120P N2 e C405 C411 4 7uF A 7UE 10v 10V 3 3AVDD_VX1 Decaps VCC_LCM 3 3V 3 3AVDD_VX1 A A L405 MLB 201209 0120P N2 e TR e C406 C412 0 1uF 0 1uF 16V 16V 240Hz Back End Board T Con LG5812 Bottom side LGE Internal Use Only LPMIC Block
33. Abnormally status for download NGx Copyright O 2012 LG Electronics Inc All rights reserved Only for training and service purposes 16 3 6 2 Check the method of Cl key value RS232 1 Into the main ass y mode RS232 aa 00 00 A a a 9 2 Check the mothed of Cl key by command RS232 ci 00 20 c 3 9 3 Result value i 01 OK 1d1852d21c1ed5dcx Cl Key Value 3 7 WIFI MAC ADDRESS CHECK 1 Using RS232 Command HfeqkHz ien 0 AJINO Set DCH O KIEX or NG 2 Check the menu on in start IN START UTT 4 APP History Ver 25682 d Q Gain 5000 L DB LGD_ALEF Si2173 XXXXXX LGE Internal Use Only 4 Manual Adjustment ADC adjustment is not needed because of OTP Auto ADC adjustment 4 1 EDID The Extended Display Identification Data DDC Display Data Channel download 4 1 1 Overview It is a VESA regulation A PC or a MNT will display an optimal resolution through information sharing without any necessity of user input Itis a realization of Plug and Play 4 1 2 Equipment Since embedded EDID data is used EDID download JIG HDMI cable and D sub cable are not need Adjustment remote control 4 1 3 Download method 1 Press ADJ key on the Adjustment remote control then select 10 EDID D L By pressing Enter key enter EDID D L menu 2 Select Start button by pressing Enter key HDMI1 HDMI2 HDMI3 HDMI4 RGB are writing and display OK or NG For An
34. DATE 1G ELECTRONICS SET SHET Copyright O 2012 LG Electronics Inc All rights reserved LGE Internal Use Only Only for training and service purposes eMMC I F EMMC_VCCO A EMMC DATA LINE 47K PULL UP 99099 099 k eM Io o bo o bo e pel i E cp a ps Ee PS SST Y Y SN bi else ls le xixixitx wo ojojojo OO roJdo H d Sse SS al ei EMMC DATA LINE BE ax eo eoo ei ei ei ei Ed e TR ed 10K PULL UP ES ga x k k x x x kx x O ra v I I ojojojo SJS oto E d Suan sod lalalala HUSS C8100 IC8100 3 i z dus mss m m e es m e SDIN5D2 4G 974 H26M31001EFR guo nicam End ue co o oco co 0 o o b 2 bou H a SE o o o p H26M210011 KLM2G1HE3F AR8100 EMMC DATA 0 7 22 1 16W A A3 c8 A3 c8 A e A C A A4 c9 A4 c9 EMMC DAT e E T A e AA c9 A4 A C A C EMMC_DAT e A5 C10 A5 0 A B2 CTI B2 cii S 7 B C B EMMC DATATA B3 C12 B3 c12 EM
35. EU CHA IN R603 470K HIB C574 560pF 50V OPT C577 100pF AUAD_L_CH3 IN 50V HH R609 470K C586 560pF 50V OPT i I C589 100pF 50V Place JACK Side SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X RADIATION FILRE AND ELECTRICAL SHOCK HAZARDS WHEN SERVICING IF 15 ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR Copyright 2012 LG Electronics Inc All rights reserved Only for training and service purposes THE CRITICAL COMPONENTS IN THE NN SYMBOL MARK OF THE SCHEMETIC R519 AUAD_R_CH3 IN 100k Place SOC Side SECRET LGElectronics AUD_SCARTO_OUTL AUD_SCARTO_OUTLP AUD_SCARTO_OUTR AUD_SCARTO_OUTRP AAD_ADC_SIFM AAD_ADC_SIF AUDA_BGR_OUT AUDA_OUTL AUDA_OUTR AUAD_L_C AUAD_R_C AUAD_L_C AUAD_R_C AUAD_L_C AUAD_R_C AUAD_L_C AUAD_R_C AUAD_L_C AUAD_R_C e e N N WwW fs a qa a AUAD_REF AUAD_REFP AUAD_VR_OUT AUMI_BIAS AUMI_IN AUMI_COM DDCDO_DA DDCDO_CK HPDO YO_RXCN_0 YO_RXCP_0 YO_RXON_O YO_RXOP_0 YO_RXIN_0 YO_RX1P_0 HYO_RX2N_0 HYO_RX2P_0 _ARC_OUT_O ANTCON RFAGC IFAGC ADC_I_INCOM ADC_I_INP ADC_I_INN AUDA_OUTL AUDA_OUTR N1 7 DTV MNT_VOUT N1 8 EU U1 uF R1 R2 TI V2 100 gt AUDA_OUTL gt AUDA_OUTR
36. R3X2P SBVCC5 10 RGB_5V 3200 D24 HDMI3 i i 7 e e R3242 A AVDD12 2 R5PWR5V VGA 10 BLM18PG121SN1D e e b A em em a I b VDD33_1 DSCL5 VGA if R4XCN DSDA5 VGA RGB_DDC_SCL 3205 3211 3 zl 4 RGB DDC SDA 10ur C3210 0 1uF R R4PWR V 10v 0 1uF 16V C3209 C3215 Gazel 16V 0 1ur 0 1ur Ces BREST Tue Slur SSi0ur G5 10v 10V C3218 a z NP Oli Ol OC Giel nM ad P oo ojo p tj TJ YT Slip l0ur IC3200 E o Nejajajej slalalolslalalolelala T 10v T 10v l E x nlalocjajglalolajgjalolalalaloja AZ1117BH 1 2TRE1 t y dao ome on nO a SS nn wm oS Ss on ny mi a o ajajaj Najalaj lalala lalalal I 9 e hg 2 a njo oja njo n a9 gt DIA DI D SE en m en o eo d O O O O IN OU d m e e e e 0710 00 GND ADJ C3203 c3201 c320b C3216 OPT 10uF 10uF o0 1uF 10uF LI R3215 33 C3200 10v 10V 16V 10v do oA dd L L er HDMI_WKUP KV EKTSPNR DET 10uF iov T 7 8 R3212 33 L MHL DET c320h C3207 o0 1uF o0 1uF 03217 P d eu ce de mu N E LOE 16V 16V 16V l T T m ERU eX i ew Jaa U AW C U LJ U LI LI U y y 3 y y SO I I mn l d EEN e a a a a a a a a a N wn 2 wn un A a L i a a o T I I I I I 7 I m m n n m 7 N T d zb alt GH zen v O v O 1 1 a a H a a H O o H o o H m Hx ES o o vi bel N N a a a a a a a a Vout 0 8 1 R1 R2 i EE 5 a A 8 8 a a B S x x x x HDMI 4 v me dam AO GQ GE A Gu HDMI 1 5V HDMI 2 5V HDMI 3 Gu HDMI 4 A A R3240 R3238 R3231 R3232 10 10 10 10 AM 9 AM e e e e hd 1 16w e 1 1
37. R501 Bi d C558 1000pF OPT ATV OUT TUNER SIF U2 T2 EU 100 R502 T4 10K EU AUAD_L_CH AUAD_R_CH AUAD_L_CH AUAD_R_CH AUAD_L_CH AUAD_R_CH R534 5_IN 5_IN 4_IN 4_IN EU REGL EU 22K R532 01lurF 0 OlurF ii EU C520 EU C521 3 IN 3 IN UA 10K R520 uF V5 R7 R5 R6 t3 3V NORMAL A 4 7K e 4 7K Mjalololojejejaja o o o o 0o N HDMI_CLK HDMI_CLK HDMI_RX0 HDMI_RXO HDMI_RX1 HDMI_RX1 HDMI_RX2 HDMI_RX2 F_AGC gt SPDIF_OUT_ARC CLET 0 1uF R624 100 H NIM amp CHB H NIM amp CHB C115 0 1uF C116 ls R625 100 R626 L R627 22K C603 0 01uF C604 0 01uF D HP LOUT MAIN gt HP ROUT MAIN LG ELECTRONICS U U gt SCART_Lout_soc SCART Rout SOC TPI SOP TPI CL CHB DATA JDVR SCLK CHB VAL CHB ERR TU CVBS SCART Lout SCART_Rout SC_R CHB_CVBS SC_CVBS_IN SC B SCG SC_FB SC_ID ATV_OUT SC LIN SC_R_IN TUNER_SIF TUNER_SIF DTV MNT_V_OUT eo JDVR_SCLK F N IF P IF AGC FE TS CLK FE TS SYNC FE TS VAL TPI DVB ERR FE TS DATA TPO DATA TPI DATA TPI ERR TPI VAL gt OPTIC GPIOl1 eo gt OPTIC BACK CHANNEL 0 7 0 7 IC101 LG115
38. Standard Repair Process Established B Power error IET symptom Y Fix A C cord amp Outlet Check outlet Check A C cord Check for all 3 phase power out and check each 3 phase out Please refer to the all cases which can be displayed on power off mode Copyright 2012 LG Electronics Inc All rights reserved Only for training and service purposes Off when on off while viewing power auto on off Power off List Power off by REMOTE CONTROL POWEROFE OFFTIMERY OFFTIMER Power off by OFF TIMER IT SLEEPTIMER Power off by SLEEP TIMER POWEROFF INSTOP Power off by INSTOP KEY POWEROFF AUTOOFF Normal ERE Revised date 7 15 Ge A22 Check Power Off Replace Main B D gt Mode Replace Power B D Power B D A19 If Power Off mode is not displayed Check Power B D voltage Y gt Replace Main B D Replace Power B D Caution Check and fix exterior of Power B D Part Explanation POWEROFF_ONTIMER Power off by ON TIMER LDOWEROFF AS29320 Power off by RS232C POWEROFF RECEND POWEROFF_ UNKNOWN POWEROFF_ABNORMAL 1 Power off by abnormal status except CPU trouble Abnormal POWEROFF CPUABNORMAL Power off by CPU Abnormal LGE Internal Use Only Standard Repair Process ate symptom No audio Normal video A24 A25 N Check user N Check audio B o audio orma Screen normal Vache ERI oltage
39. VCC1 5V MAIN A G8 G9 myo N Rio 0 9V_VDD A ax 5900mA 5V A ZD300 C301 10uF 29 uF Ey Ey 2 C307 10uF Ox C322 0 0 C325 3 277 ESD_LG1152 O 0 9V_VDD A n Package Decap C314 C319 ORE Max 20mA On Package 1 8V NORMAL U 0 Q g Ke C347 10uF 1i 0 1uF UL 3 53 Max 120mA VDD18_LVTX A L312 BLM18PG121SN1D On Package 1 8V_NORMAL A 0 1uF C374 10uF I C382 Decap 0 luF Max 93mA VDD18 LVRX A L318 BLM18PG121SN TS e D On Package 0 1uF C397 10uF U iif C404 3 3V NORMAL A L310 BLM18PG121SN1D Decap 6ea O luF lea lea 0 lurF lea VDD33 TE e ur uF ur uF Qa C372 10uF II ESTA 0 C383 0 C388 0 0 0 C391 C392 C394 0 C399 On Package Decap O luF lea 0 9V_VDD L303 BLM18PG121SN1D Max 6mA MAIN_XTAL A Wd e C309 10uF I 0 1uF 0 1uF C315 C324 1 0V_VDD A L306 Max 1320mA AVDD10_ BLM18PG121SN1D OSPREY AED On Package 1 8V_NORMAL A C341 10uF I C345 C348 0 1uF 0 1uF e luF 0 l C349 Decap O luF 3ea Max 49mA L316 BLM18PG121SN1D VDD18
40. d Ri jo ee C300 0 1uF 10uF ZZ 10uF R313 R304 TPS54327DDAR 16V 25V 25V EP GND 0 C300 10K EP a len OPT I 22pF E 4 j R300 50V EN S VIN i 30K d 13 1 8V VFB F VBST Cao Vout 0 765 1 R1 R2 e e a 9 Il H 0 1uF 16V L300 x VREG5 SW 3 6uH E 6 STT D e R301 NR8040T3R6N ss GND 22K 5 i C312 C315 C301 C303 22uF 22uF luF 3300pF 10v 10v 25V 50V tss ms C303 nF Vref Iss uA FRC III DDR3 BOT 1 5V TYP 1 149A y MAX 1 184A VLCD POWER 12V A 1 5V 3 3V SE A A MLB 201209 0120P N2 rn 3 IC301 e e R314 R305 TPS54327DDAR C308 C310 C313 C335 EP GND aL 3 6K 10K 0 1uF 10uF ZZ 10ur a 100pF 13 5 16v 25V 25v V R302 EN 8 VIN Em OPT 18K E Eat lt 13 1 5V VFB 5 VBST e506 A Vout 0 765 1 R1 R2 e e fa 7 H 0 1uF 16V L301 R2 o _ _ VREG5 SH 3 6uH 6 e 4 e e Rp3 NR8040T3R6N 22K ss SND 1 C314 C316 C304 L 22uF KE we C302 5 0 01uF 10v 10v luF 50V 25V tss ms C304 nF Vref Iss uA ZN SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES CIAL FEATURES IMPORTANT FOR PROTECTION FROM X RADIATION WHEN SERVICING IF 15 ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR TH 1 u CRITICAL COMPONENTS IN THE NN SYMBOL MARK OF THE SCHEMETIC Copyright 2012 LG Electronics Inc All rights reserved Only for training and service purposes SECRET LGElectronics LG1122 FRC III Powe r up Sequenc
41. s das 0 3V 5V 9v Ton D ES O 20us min P E P K Ton DDR 40us min P A Ton_CORE 40us min ed LG ELECTRONICS MODEL DATE BLOCK SHEET LGE Internal Use Only IC401 LGE5812B TROP A13 R1 S TXO B13 B2 gt LLVO TX1P pe Livi Td B12 Ul e TX2P I gt LLV2P IX2 B11 v2 Ge TX3P ane ed gt LLVCLKP TX3 EXT O LLVCLKN TX4P A9 v3 CO LLV4P md B9 U3 SE TX5P us gt LLVSP TX5 C gt E V P LLV5 IX6P Al T4 gt iver TX6 py T3 gt LLV6 TXTP gt AS nx B6 v5 T U5 A gt LRVO L U SOE R40 3 Sx s gt LRV1P 99 PIT 3 Sse Ce C O LRV1 GOE lt C R404 33 GOE Se gt LRV2P a m zz esc SS LRV2 POL gt R406 3 POR gt LRVCLKP F U ELK lt R40 ll FLK gt CO LRVCLKN F U DEM lt B08 DPM SS LRV4P H_CONV y R409 33 gt H_CONV 1s gt LRV4 ORT E 0 33 uc OPT T9 gt LRV5P OPRA
42. 0 COMMERCIAL_IR_US 3 5V_ST IR KEY l RGB Sensor EEPROM SCL R4123 100 R4117 R4118 gt e 10K TOK D4105 e S L DUC 20S 02 010L Pour ov OPT COMMERCIAL 5V_ST EE SCH KEY1 lt gt RAT24 uq EEPROM SDA 100 COMMERCIAL IR 3 5V_ST 100 GE e es R4101 e e L D4106 A KEY2 lt AMOTECH CO y L C410 C4102 ADUC 208 02 010L 0 COMMERCIAL IR ME E Sa OPT 20V IR lt e e R4103 3 5V_ST D4100 che OPT 3 3K A 5 6V R4102 AMOTECH CO ITD e 04100 10K aa107 gt IRBYPASS 3 5V_ST OPT gt 0 MMBT3904 NXP e e E COMMERCIAL IR COMMERCIAL IR R4104 0 KR e L4100 BLM18PG121SN1D 04101 MMBT3904 NXP COMMERCIAL_IR 9 COMMERCIAL IR 4 o R4125 1 5K Gj CO 00pF LED_B GP4_LED_R T 50V es R4100 0 e e e 09 IR_BYPASS ALO Dal L OPT p COMMERCIAL 3 5V 5T 50V AMOTECH CO LTD Soft Touch Micom D L Zener Diode is close to wafe I GP4 IR 10P P4102 12507WR 10L IHE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X RADIATION FILRE AND ELECTRICAL SHOCK HAZARDS WHEN SERVICING IF 15 ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE NN SYMBOL MARK OF THE SCHEMETIC Copyright 2012 LG Electronics Inc All rights reserved Only for training and service purposes SECRET LGElectronics LG ELECTRONICS ESD for MTK D4105 1 DUC 20S 02 010L OV 10pF ESD_MT
43. 3 3V TU IN 45V NORMAL 5V_TU 16503 Er ED BLM18PG121SN1D 0 Zeen SS a Seeche E PETT f C6532 C6534 C62p6 C6529 6530 C6536 C6539 C 0 1uF L 22uF 0 1UF es 22uF H 0 1uF 22uF 0 1uF 16V 10v lovem l 16V 10v 16v7T D 1 i 10V H J kg eg x 9 e e o em am o o am o em am o P TH SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X RADIATION FILRE AND ELECTRICAL SHOCK HAZARDS WHEN SERVICING IF 15 ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE NN SYMBOL MARK OF THE SCHEMETIC Fi Close to the tuner Close to the tuner MODEL DATE ti SECRET BLOCK SHEET LGE Internal Use Only LG ELELTRONILS Ti LGElectronics Copyright 2012 LG Electronics Inc All rights reserved Only for training and service purposes DVB S2 LNB Part Option ONB LNB_OUT lt I CHED GED tE C6915 C6916 C6913 C6914 oer LNB NE i OPT LNB a em emm emm am a Close to Tuner Surge protectioin IHE AN SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X RADIATION FILRE AND ELECTRICAL SHOCK HAZARDS WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE Copyright O 2012 LG Electronics Inc All rights reserved Only for training and service purposes R6906 2 2K IN LNB
44. 3Y4 rPI DATA 5 vcc 2 4Y0 4Y1 GND_4 4Y2 4Y3 AQE AR916 15 CI LO DATA 3 Leer DATA 2 Leer DATA 1 Leer DATA 0 U rPI DATA 4 75 CI AR917 MODEL DATE BLOCK IDEE 7 LGE Internal Use Only PANEL POWER Power DET L2311 TYP 1450mA gt A EL SS Ze E PANEL VCC C232 A 0 01uF 50V CIS21J121 PD 412V Ree OS 102307 2 7K 1 NCP803SN293 02305 A POWER_DET A03407A e gt U a sa m 1 Ds TUS G T 02301 MMBT3906 NXP OPT P2301 FW20020 24S PD 412V R2363 1 2K 13 L2305 CIS21J121 ARR 16V 50V OPT 12303 C2317 BLM18SG121TN1D 0 1uF 3 3V NORMAL 50V PD 24V R2372 100K R2330 1K 02304 RESET at 8kV ESD PANEL_CTL MMBT3904 NXP GND V syn e INV QN e PD 24V IC2308 NCP803SN293 L DIMO_VS INV_CTL KTI A DIM A_DIM e P DIM1 GND P DIM2 Err e PWM DIM 24V gt 3 48V q2y 53 59W SMAW200 H2482 ST 3 5V 3 5V
45. A0 orp SC 9 s amp 68 08 Ox03 90 40 A9 CO B3 00 LAO 5A 00 Copyright O 2012 LG Electronics Inc All rights reserved Only for training and service purposes 17 Reference HDMI1 HDMI4 RGB In the data of EDID bellows may be different by S W or Input mode a Product ID b Serial No Controlled on production line Month Year Controlled on production line ex Monthly 01 01 Year 2012 16 Model Name Hex LGTV e Checksum LG TV Changeable by total EDID data Vendor Specific HDMI HDMI 1 C S 9D BA EDID Block 0 Bytes 0 127 DOH 7FH DBDPBIEDBIBIIEIBIJSBSISIPISETE oo rr re rr vr rr er oo pe feo forfo forfor or er roa so ao sa ve oa ee s As ss 4c vs 26 AE AS EE 61 40 71 40 81 80 T or ox os or or oz sn so 18 rr 38 20 40 se 20 oo 4o sa vo oo vo te es 21 so so st 0018 30 so o se 0o 40 s 00 o0 Joo 1 vo co oo Fo vo 30 20 20 zo 20 El N a sz 1 oo oa 20 2o 20 20 20 zo 00 00 oo Fo ras ar 25 se ss on 20 25 ao 20 20 20 25 or as EDID Block 1 Bytes 128 255 80H FFH ITI SISIQD II Foz fos sr per ae vo sr oa 19 05 22 ss or 25 15 wr so vo sr or e EJ N o oO LO SlolalS re Te oye e roa oz 2 2o 21 UJ 00 N rae 20 zo co oe or ar ar ro Proj 28 10 es os os or oz 3 26 as oo so sa vo
46. AA20 AB20 3 3V_XTAL_AVDDA AB19 A2 A19 B19 C19 D4 D5 D6 D17 D18 D19 E4 E5 E6 ET E8 E9 E10 E11 E12 E13 E14 E15 E16 VDD_1 VDD_2 VDD_3 VDD_4 VDD_5 VDD_6 VDD_7 VDD_8 VDD_9 VDD_ VDD_ VDD_ VDD_ VDD_ VDD_ VDD_ VDD_ VDD_ VDD_19 VDD_20 VDD_21 VDD_22 VDD_23 VDD_24 Oo JO 0 BF WYN FP o VDD33_1 VDD33_2 VDD33_3 VDD33 4 VDD33 5 VDD33 6 VDD33 7 VDD33 8 VDD33 9 VDD33 10 VDD33 11 VDD33 12 RX VDD25 1 RX VDD25 2 RX VDD25 3 RX VDD25 4 RX VDD25 5 RX VDD25 6 RX VDD25 7 RX VDD25 8 LVTX VDD10 1 LVTX VDD10 2 LVTX VDD10 3 LVTX VDD10 4 LVTX VDD25 1 LVTX VDD25 2 LVTX VDD25 3 LVTX VDD25 4 LVTX VDD25 5 LVTX VDD25 6 LVTX VDD25 7 LVTX VDD25 8 LVTX VDD25 9 DISP VDD DR3P VDD SSP_VDD XTAL_VDD SP_AVDD DR3P_AVDD SSP_AVDD XTAL_AVDD Oo JJ O D 4 ON FP O Ke LVTX_VDD25_10 RJ4fja ja g a q Qq Qjiz ojo a ajaja ol ojpjojvpir lo ojpjojvpir lo co fis w inj a o olpjuoujvj jerljo Ol sja o fis win Ra o ojpjojvpir1lo oo cjiaja ja ja ja join v lt tn Ol O Oe ba kk CH vjojsjalalplulvjel lo C Q SS E ST o O 000 N DH 4 U wo OAD NS WN r M9300 ALBLOCK MDS62110213 M9301 ALBLOCK MDS62110213 M9302 ALBLOCK MDS62110213 M9303 ALBLOCK MDS62110213 ui For Heat Sink LOCK BERET Y LGE Internal Use Only
47. ESD LG1152 HP OUT BLOCK SHEET LGE Internal Use Only Ro GO 1C3800 MAX 3232CDR 0 1uF C3800 RS232 Q lur C3801 RS232 0 1uF 11 C3802 RS232 C3803 0 1uF 11 RS232 EAN41348201 3 5V_ST 12V COMMERCIAL OUT E 12V 1A FOR COMMERCIAL RS 232C POWER 12V COMMERCIAL OUT A IR OUT RS232 100 3 e R3820 9 RS232 100 3 e R3821 2 3 5V_ST a OPT_RS232 D3804 D3805 R3834 20V gt T 20v DET OPT 10K weg FOR COMMERCIAL E SPGO9 DB 009 IK3803 C gt SOC_RX l soc 1x UART 4PIN STRAIGHT UART 4PIN ANGLE 3 5V ST 3 5V_ST P3800 P3801 12507WS 04L 12507WR 04L R3811 R3814 4 7K 4 7K OPT OPT e y e e e COMPONENT 1 PHONE JACK 3 3V_NORMAL R3806 10K COMP_JACK_BLACK JK3801 KJA PH 1 0177 M5_GND M4 E T5 6v OPT D3803 gt COMP1_DET 5 Comp1_Y M3_DETECT M1 M6 eo Or COMP JACK GREEN COMP1 Pb JK3801 1 KJA PH 1 0177 2 M5 GND M4 M3_DETECT M1 gt COMP1_Pr M6 THE ZN SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X RADIATION FILRE AND ELECTRICAL SHOCK HAZARDS WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE
48. LGE Internal Use Only Only for training and service purposes 7 HDMI Input CT EE 886 1 ow Tom 70 3 II X 3 wu am an 2 e Ia 3 wen om om an Je Ia 4 were am an 650 ease s mem exe oo emm 1 emm es an as s weve ane wes 0 s 9 mmm es an HDMI DTV Ps ravers sum Gp TZ 4 mes 595 Lm s ma am Fs emm esas S948 mes 1 emm S9 25476 aaen um s em menes an nn 9 emm ses aen ms gt E 28 TT ei eene soo 5 was s amer 1 em S4 675 aan aus 16 mmer Copyright O 2012 LG Electronics Inc All rights reserved 9 LGE Internal Use Only Only for training and service purposes 8 3D Mode 8 1 RF Input 3D supported mode manually 2D to 3D HD e Side by Side Half Top amp Bottom 8 2 RF Input 3D supported mode automatically Side by Side Half Frame Compatible Top amp Bottom 8 3 HDMI Input 8 3 1 HDMI 1 3 3D supported mode manually H freq kHz V freq kHz Pixel clock MHz 3D input proposed mode 5 2D to 3D 1280 720 45 00 60 00 74 25 IV e retama Top amp Bottom Single Frame Sequential 1280 720 37 500 2D to 3D Side by Side half Top amp Bottom Single Frame Sequential 2D to 3D HDTV 10801 Side by Side half Top amp Bottom 2D to 3D HDTV 10801 Side by Side half Top amp Bottom 2D to 3D HDTV 1080P Side by Side half Top amp Bottom 2
49. RST_DIIVA lt q E a ri 2 ri N ba m MICOM_DEBUG 2 z RST_DIIVA C S S H 2 a 12507WS 12L 3 gt POD NAKEUP N ES o o i a a ci e EE E a i X3000 Eos cil A N PEN e I e 8 Goo N Fa 32 768KHz o E 9 for DiiVA gt ad R3023 3 5V_ST AC E ES 4 7M f A i lt Jo OF OPT e gt MICOM DEBUG SE si x I I e gt GND a pe MICOM RESET SW A o I 3 5V ST e a 2 e E MICOM_RESET e d e e l S C3004 ac Er o gt EXT AMP MUTE la Uu 0 1uF 9 7 8 e E SG T E 211153 3000 E KG H a p o L EXT AMP RESET o 0 luF LI H O E o T o gt COMMERCIAL 12V CTL i S S o a a z ES 12V_EXT_PWR_DET o lp s o FAR eil Co HID H gjajalnpja ojolz 3 3V NORMAL T p Gi Gelli 0S D Oj HI OT scarr mure t J MN XI RYO o UU EA E HIN Q UP DINI Cl ol NINI OD O AILN Q U Djaj ci aj dj e Gj TJ TJ cd eee pont gt gt MG AIMAM aj aida a a A 10K 10K eo POWER_ON OFF2_4 e AMP_RESET_BY_MICOM GP 4 High MID Power SEQUENCE P60 SCLAO 1 P140 PCLBUZO INTP6 t3 3V NORMAL I2C_SCL3 DD RL_O ER_ON OFF P61 SDAAO 2 POO TIOO TXD1 I2C SDA3 SCART MUTE R3037 R3003 22 P62 3 PO1 TOOO RXDI1 For Japan LNB_INIT Se AMP_RESET_N e POWER ON OFF2 4 NA ee Ges TET di AMP_RESET_BY_MICOM D 6 3 4 P 1 3 0 BIO Se PANEL CTL lt e gt POWER ON OFF2 1 P31 TLO3 TO03 INTEA4 5 IC3000 P20 ANIO AVREFP V MODEL1_OPT_5 9 SCK01 0 2 7 KEY2 P75 KR5 INTP SOKOLI SELOL A P21 ANI1 AVREFM z R5F100GEAFB
50. Side by Side half HDTV 1080P Top amp Bottom NN 640 350 720 400 640 480 4 Others 2D to 3D 800 600 1152 864 1280 1024 8 6 Component Input 3D 3D supported mode manually H freq kHz V freq Hz Pixel clock 3D input proposed mode 9 1 wevr ss an Ja din Side by Side Top amp Botom Im 14 25 2D to 3D Side by Side Top amp Bottom HDTV 10801 1920 1080 33 72 59 94 74 176 2D to 3D Side by Side Top amp Bottom HDTV 10801 1920 1080 28 12 5 0 0 1920 1080 27 000 24 000 74 25 2D to 3D Side by Side Top amp Bottom HDTV 1080P 1920 1080 28 12 74 25 2D to 3D Side by Side Top amp Bottom HDTV 1080P 1920 1080 56 25 74 25 2D to 3D Side by Side Top amp Bottom HDTV 1080P 1920 1080 26 97 23 976 74 176 2D to 3D Side by Side Top amp Bottom HDTV 1080P 3 1920 1080 33 75 30 000 74 25 2D to 3D Side by Side Top amp Bottom HDTV 1080P 1920 1080 133 71 29 97 74 176 2D to 3D Side by Side Top amp Bottom HDTV 1080P 1920 1080 67 500 60 148 50 2D to 3D Side by Side Top 8 Bottom HDTV 1080P 8 1920 1080 67 432 59 94 148 352 2D to 3D Side by Side Top 8 Bottom HDTV 1080P Copyright O 2012 LG Electronics Inc All rights reserved 17 LGE Internal Use Only Only for training and service purposes 8 7 USB Input 3D 3D supported mode manually H freq kHz V freq Hz Pixel clock MHz 3D input proposed mode 2D to 3D Side by Side Half 1 1920
51. o oO o D d G D E un co e E N1 L10 un Wi o o VDD18 1 G O O N2 L11 VDD18_2 G e e Em AVDD10_DEMOD L12 L L G gt pi On Pack D 0 1uF 1 VDDC10_1 G n lt AVDD10_VSB L14 On Package Decap O 1uF lea AERA eap H Sa On Package Decap 0 1uF lea A VDDC10_2 G R15 4 xis AVDD10_cvBs G S AMDDIO AS D17 VPP10 vss G Mie AVDD10 LVTX 1 G 7 AVDD10_LVTX_2 G VDDC XTAL s A AVDD10_LLPLL G L16 9 VDDC_XTAL G Max 10mA 2 5V NORMAL 10 Max 250mA as LO VDD25_REF G4 TE z 11 Max 50mA ii MS A For HDCP OTP 12 t 2 5V_NORMAL VDD AUD Will be change to LOW for MP N10 E M13 OM QD A A AVSS25_REF zig 2VSS25_REF G Se T D XTAL G L315 L321 D16 i 15 L322 BLM18PG121SN1D BLMISBDIPISNI GND G SS de Ya BLM18PG121SN1D TER oe E 29 We GND_2 G oF e o 3 5 3 5 G8 4 3 a a i d GND G fy Er Oo G9 5 5 5 o o o o GND G S o G10 6 EC SR Dote m GND G m so r a e G11 8 e o oO co o mn o GND G 3 e e m L320 a G14 9 O O O BLM15BD121SN1 Gis aale E 11 D ee e vy kd e Ha GNP S 12 AVSS25_RHF GND G H5 13 NS GND_10 G H6 14 n P k D luF 1 GND 11 G On Package Decap O 1luF lea e aortage ecap 0 e H7 15 GND 12 G H8 16 GND 13 G H9 P3 GND 14 G H10 P4 GND_15 G H11 P5 GND_16 G H12 P13 urs lERp 17 G E Max 256mA Max 1mA Max 35mA 3 3V_NORMAL VDD33 HDMI GND 18 G 3 3 3 3V_NORMAL 33 H14 P16 t3 3V NORMAL poss VES A A VDD33_XTAL GND_19 G H15 2 R3 A A GND_20 G J
52. 00 99 NG 03 02x Fail OK 03 03x Success End adj aa 00 90 a 00 OK90x Ref ADC Adj RS232C Protocol Ver1 0 Read adj data 3 Adj order aa 00 00 Enter ADC adj mode xb 00 04 Change input source to Component1 480i amp 1080p ad 00 10 Adjust 480i amp 1080p Comp1 xb 00 06 Change input source to RGB 1024 768 ad 00 10 Adjust 1920 1080 RGB ad 00 90 End adj 3 2 MAC address D L Cl key D L Widevine key D L 3 Automatic Adjustment 3 1 ADC Adjustment 3 1 1 Overview ADC adjustment is needed to find the optimum black level and gain in Analog to Digital device and to compensate RGB deviation Connect PCBA Jig RS 232C Port PC RS 232C Port Communication Prot connection 3 1 2 Equipment amp Condition RS 232C Port 1 USB to RS 232C Jig 2 MSPG 925 Series Pattern Generator MSPG 925FA pattern 65 Resolution 480i Comp1 1080P Comp1 1920 1080 RGB Pattern Horizontal 10096 Color Bar Pattern Pattern level 0 7 0 1 Vp p Image Com 1 2 3 4 and 115200 Baudrate Mode check Online Only Check the test process DETECT MAC Cl gt Widevine ESN Play START Result Ready Test OK or NG Printer Out MAC Address Label Copyright O 2012 LG Electronics Inc All rights reserved Only for training and service purposes 14 LGE Internal Use Only 3 4 LAN PORT INSPECTION PING TEST 3 3 LAN Inspection 3 3 1 Equipment Condition Connect SE
53. 1000pF 1 0 1uF 1000pF Lov 10v is D Lut 1000pF EH 0 1uF 1000pF Lov 10V los e lts e 1 5VQ0 Ed y9SUUVREE GDO 1 5VQ0 0 75V VREFO DI 1 5VQ1 0 75V_VREF1_D0 1 5VQ1 0 75V_VREF1_D1 A A A A A A A A R205 R209 R214 R219 e e 9 e e e e e e e e e 1K 1K 1K 1K 1 1 1 1 C211 A C214 e cC215 c217 Re C220 e c221 223 R215 226 C227 229 R220 232 C233 0 1uF 1 0 1uF T 1000pr To ur 13 0 1uF T1000pFr To 1ur T 0 1uF T1000pr To tur 0 1uF T1000pr E l THE N SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X RADIATION FILRE AND ELECTRICAL SHOCK HAZARDS WHEN SERVICING IF IS SECRET ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE NN SYMBOL MARK OF THE SCHEMETIC LGElectronics 240Hz Back End Board LG ELECTRONICS Copyright 2012 LG Electronics Inc All rights reserved LGE Internal Use Only Only for training and service purposes TH SP FILRE AND ELECIRICAL SHOCK HAZARDS Fi tj u PRC LES AIP TOI OM TYP 0 278A S MAX 0 345A VLCD POWER 12V A MM MLB 201209 0120P N2 1 8V A e e C307 C309 c311 gt
54. 100V 100V 0 T C511 e to prevent inrush current MESS R517 j A gat R520 R524 v K K 50V ES 1 10w 1 10w l 512 0 1uF 50V HE i 4 s S N e a a a a em em a a a a a a ea ao a a a a ae em e em ae e em ao a e e e a em em am a e ae am e eo ae e em eo a ae em ao a e a a a e ao a a a ao ao a P Gamma Block gt GMA14 gt GMA18 mei i ia a ooo maa i ia ia a e i e oc 12C_SCL_S e E I2C SCL S E audis HVDD HVDD 8 4V 8 4V IGPM Block A A R539 R550 33 33 VLCD_POWER 558 OPT I 12V PANEL_VCC si C55 R501 33 A luF 25V lt csc 25V VCC LCM VCC LCM 3 3V 3 3V IC500 GPM ON UNS R534 o o oo 549 o o oo VGH VGH_S I R usar GE e L505 CIS21J121 I2C SDA S 33 QA a ua SE 120 SDA S 35 Pus N as o ua e A A x e SEE e gt GMA12 gt GMA16 THERMAL THERMAL VCC_LCM VDD_LCM C560 PANEL CTL MAIN e we AY 21 SH O GMA10 AG 21 SH3 O GMA15 M 3 3V 16 8V C559 0 1uF 10 R VGH MES A 0 01uF PUn B DVDD GM4 DVDD GM4 EE 50V 0503 IC502 gt GMA4 IC503 LT GMA9 A03407A PANEL_CTL_FRC C542 VCOM GND BUFOS8630 GM3 R548 C554 VCOM GND BUFOS 3O GM3 VGH_M GND R504 d x LuF gt GMA3 10K gt lur gt GMAT BANN 0 E p OPT e 9 10V VCOM OUT e GM2 10v VCOM_OUT p GM2 GPM ON BE See GMA2 SSES GMA6 0 R557 C561 C562 Oum o o R500 15K RE VDPM R505 33 1 10W 10K ur D APTE CE o a o a X 1 DPM GPM ON PANE
55. 1080 33 75 30 74 25 o RR HDTV 1080P Row Interleaving Column Interleaving Photo side by Side half Top 8 Bottom 8 8 USB Input 3D 3D supported mode automatically H freq kHz V freq Hz Pixel clock MHz 3D input proposed mode n Side by Side Half Top amp Bottom 1920 1080 29 75 74 25 Checkerboard MPO photo HDTV 1080P 8 9 DLNA Input 3D 3D supported mode manually H freq kHz V freq Hz Pixel clock MHz 3D input proposed mode 2D to 3D Side by Side Half 1 1920 1080 33 75 30 74 25 Te Eom Ie d HDTV 1080P Row Interleaving Column Interleaving Photo side by Side half Top amp Bottom 8 10 DLNA Input 3D 3D supported mode automatically H freq kHz V freq Hz Pixel clock MHz 3D input proposed mode Side by Side Half Top amp Bottom 1920 1080 33 75 74 25 Checkerboard MPO photo HDTV 1080P m Remark 3D Input mode Side by Side Top amp Bottom Checker board ope Frame Frame Packing me Column Sequential Interleaving Interleaving mm Copyright O 2012 LG Electronics Inc All rights reserved D be d LGE Internal Use Only Only for training and service purposes ADJUSTMENT INSTRUCTION 1 Application Range This specification sheet is applied to all of the LED LCD TV with LD23E chassis 2 Designation 1 Because this is not a hot chassis it is not necessary to use an isolation transformer However the use of isolation transformer vvill help protect test instru
56. 10uF 10uF 74 RRV3 25V 25V RRV4P 74 75 RRV3 26 E VCC_LCM RRV4 3 3V e TO RRVSP 76 A 77 RRV4 dne 23 V IE 28 RRV5S e R RRV5 RRVOE 78 s RRV6 79 so eno A 0 e C616 C618 0 1uF 0 0luF 50V 50V e VDD_LCM 16V A C614 C615 C617 C619 10uF 10uF 10uF 0 1uF Islslsl CEA 50v RA Git FFC CONNECTOR LLEFT FFC CONNECTOR TH N SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X RADIATION FILRE AND ELECTRICAL SHOCK HAZARDS WHEN SERVICING IF IS SECRET ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE NN SYMBOL MARK OF THE SCHEMETIC LGElectronics Fi tj DATE 1 Le ELECTRONICS BLOCK SHEET Ze Copyright 2012 LG Electronics Inc All rights reserved Only for training and service purposes LGE Internal Use Only Revision History 0 Proto Design IHE AN SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X RADIATION FILRE AND ELECTRICAL SHOCK HAZARDS WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR 1 73V 1 13V 0 53V 0 09V e e e R100 R102 i RA 5109 10K 4 7K La 22102 e o La 0 ee E Ssw100 SW102 Sw104 SW106 1250 7WR 04L o JTP 1127WEM JTP 1127WEM JTP 1
57. 15 625 Top and Bottom Secondary SDTV 5761 Side by side half Secondary SDTV 5761 720 576 Frame packing REA SDTV 5761 15 625 16 j I Side by side Full een 5761 Eu and E Ge 720P 148 5 19 Frame Rem I HDTV 720P Line alternative HDTV 720P woo 137 500 Side by side Full HDTV 720P Top and Bottom Primary HDTV 720P Sum in do IE EN Side by side half Primary HDTV 720P Frame packing Primary HDTV 720P 89 91 90 59 94 60 148 35 148 5 EN Line altemative HDTV 720P 44 96 45 59 94 60 148 35 148 5 4 Side by side Full HDTV 720P Top and Bottom Secondary HDTV 10801 ELM ea Nu EN Side by side half Primary HDTV 10801 Frame packing Primary HDTV 10801 67 432 67 50 59 94 60 148 35 148 5 EN Field alternative HDTV 10801 33 72133 75 59 94 60 148 35 148 5 Side by side Full HDTV 10801 1920 1080 28 125 50 00 74 25 Top and Bottom Secondary HDTV 10801 Side by side half Primary HDTV 10801 Frame packing Primary HDTV 10801 3959 ue Wees S Field alternative HDTV 10801 28 125 50 00 74 25 20 Side by side Full HDTV 10801 Top and Bottom Primary HDTV 1080P a Can a gee ES Side by side half Primary HDTV 1080P Frame packing HIA HDTV 1080P 26 97 27 23 97 24 148 35 148 5 32 Side by side Full HDTV 1080P 28 12 74 25 Top and Bottom Secondary HDTV 1080P Side by side half Secondary HDTV 1080P Frame packing EE HDTV 1080P o 1920 1080 28 12 25 1485 Side by side Full aa 1080P Top and Bottom Primary HDTV
58. 2 2 3 3 4 5 6 7 8 64 QAM 1 2 2 3 3 4 5 6 7 8 DVB T2 Guard Interval Bitrate Mbit s 1 4 1 8 1 16 1 32 1 128 19 128 19 256 Modulation Code Rate QPSK 1 2 2 5 2 3 3 4 5 6 16 QAM 1 2 2 5 2 8 3 4 5 6 64 QAM 1 2 2 5 2 3 3 4 5 6 256 QAM 1 2 2 5 2 3 3 4 5 6 DVB C Symbolrate 4 0Msymbols s to 7 2Msymbols s Modulation 16QAM 64 QAM 128 QAM and 256 QAM gt DVB S S2 symbolrate DVB S2 8PSK QPSK 2 45Msymbol s DVB S QPSK 2 45Msymbol s viterbi DVB S mode 1 2 2 3 3 4 5 6 7 8 DVB S2 mode 1 2 2 3 3 4 3 5 4 5 5 6 8 9 9 10 Input Voltage AC 100 240V 50 60Hz eee 5 Screen Size 46 96 inches 1046 68 H x 594 02 V x 1 5 D mm Typ FHD 240Hz Aspect Ratio 16 9 T Tuning System 00000 Operating Environment Temp 0 40 deg Humidity 80 96 Storage Environment Temp 20 60 deg Humidity 85 96 Copyright 2012 LG Electronics Inc All rights reserved ae LGE Internal Use Only Only for training and service purposes 5 Component Video Input Y CB PB CR PR amp m sm s25 am CUE amp umm Laus S94 mmm nom eo mm mum use es a mme 6 RGB input PC el E me 6 1152 864 54 348 60 053 80 VESA WXGA 1360 768 47 712 60 015 WUXGA 8 1920 1080 60 00 148 5 WUXGA CEA861D o o sms 48368 6000 eem VESAXGA O o o Copyright O 2012 LG Electronics Inc All rights reserved B
59. 22 NOOEER NRS SO ean OSES ZZ 5 1K R5508 R5512 5 AVDD PLL 2 OUT LB 1 di 12 12 S THERMAL e e 6 e e SPK WOOFER L WOOFER DVDD_PLL 4 d PGND1B KOPE i WOOFER ap 220009 l LF 4 BSTIB 50V IC5500 Gg i DGND PLL 5 VDR1 E uam OPT i Los gm GND 1 N TP m 1 5 O O VE Tuum toe i d eu DGND 7 AGND SPK_WOOFER_R 9 1 DVDD 8 VDR2 WOOFER WOOFER WOOFER SPK WOOFER R e S 05525 AL C5526 IL C5531 SDATA BST2A Por TUE tT uE Ge 25V 25V 25V 3 i WCK PGND2A CSS24 e e AUD_LRCK 22000pF GE i 50V Ten basse BCK OUT2A_2 DEV_WOOFER_STEREO i e o E SDA OUT2A 1 WOOFER STEREO WOOFER STEREO I2C SDAl e e e e Se E m WOOFER STEREO e e e SPK_WOOFER_R R5502 100 6 aman R5500 R5511 E WOPFER_STEREO I2C_SCL1 gt Soe EL vr 10 008 WOPFER_STEREO ln OS Ra 00V 12 12 ST R5513 x C5503 C5505 uei abs A AY 2205537 x al 15 33pF 33pF a oam E 5 1K l ST sov OM Ey o S m MOERORE DNE WODFER STEREO 50V i Q 9 o C5536 E lealtad PIS Ns Sed ln p WorEr_sTEREO cuc TO A TUF e e 24V AMP WOOFER i CO EE AE ASES APT E E 10 0uH WOQFER_STERWOQFER_STEREO l aL 0 05 0o OEFRnOon ifm ni cecqi c c y 90pF SED LI eg S GH A A N Z N N aao A ee NRS6045T100MMGK 50V d i EE AE A ESA A eN aga e 100v EE l OPT i x D DIDI gt gt gt WOORER WOOFER WOOFER e e e e SPK_WOOFER_R Ow Ow O Oj Ojajaja C5517 T5519 05921 WOOFER_STEREO WOOFER_STEREO E tes v 0 1uF 0 1uF 10uF WOOFER WOOFER R5
60. 3V NORMAL meee HS_IND CF A 0 1uF OPT SCL SMBCLK CF ICA200 e USB2512B AE e SDA SMBDATA N C4214 f l S B H l B C4210 C4211 C4212 C4213 ipee 0 1uF 0 1uF 0 1uF 0 1uF 25V OPT OPT OPT A N mM NA KO Mo ce ON ON LO i N C o Ce sr 43 3V NORMAL em amt on ee EE IS He ez Zi Zi e ri Zi Ka E e A 1 Q D x vi Re I a O Re I a O E gt DO oO a e e Q O a gt N e C4201 1 we C4202 e os 4 TUF mm a ei H D 0 1uF E II Ei oe o H o A le A R4209 m gt la N Lo 3 2 OPT 0 It GG a e E Q rjn o WE ays R4210 1i SE OPT ES U E N Aa H d 8 E A 3 S s an jw Re E Set P 2 2 n h 5 B Ss IHE N SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X RADIATION FILRE AND ELECTRICAL SHOCK HAZARDS WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE N SYMBOL MARK OF THE scHEMETIC LG Electronics Copyright O 2012 LG Electronics Inc All rights reserved Only for training and service purposes SECRET LG ELECTRONICS MUDEL DATE 2011 06 13 BLOCK DE E T LGE Internal Use Only 3 3V_NORMAL
61. 672 Mhz x c oi m al m tal tal dal tal m m mj tal m ral SeS 11 CPU clock 984Mhz Main0 1 2 DDR 792 792 Mhz i B I I I I Uu SEI SIS fal cal m gm m mutm gt IRB SPI SS OPT R160 22 e e gt IR_B_RESET R102 22 I2C_SDA1 12C_BE_SDA1 pi CD PLLSETI R103 22 R162 22 Siri o ao re ao re ejo NL eil OM ole oflofr wo ol at mm afr ofw a o njajnjnininjnj A co mE ojo o NINI NI NI NI NI NI NIN NINI NI NINININI NINI NI NINI NINININI NIN NINI NI NINI NINININI NINI NI NI NI NIN gt PLLSETO b I2C_SCL1 gt I2C_BE_SCL1 s z e ejolojo 5 pjalalaljz ajelalx xi e pjelgljalaz pjella jajaja OPT ST nD OP BZ ZH ST MAN J ON e Qv Qu ES AD Hi eh o 045 cd E VI ei dY Gw si CH Cp Op KO Et bi ew di E 0 Iocan_D1mM_eN ope pom S E B o c om d o HHA eem HoH nd on ud ud d od e og od od e e od OO OO mH D ei O 0 Or m Os eom o ce Y iO AA cue E Er a Ki Kj ki d sg gi E E E EM E EM EF K GE E ECH unma d E E daa ee oe OR a oA ee aoe Hd A A Di Aj a A Ay i oO o 00 m Si 2 000 s a a SI a A A a B a a a a B a a B A e a a A a n a a A a a gt EMMC RST ic E S SS Ty US BOOT MODE ba em em em em em em e e e e em em E Eo SS KS Se Tuy eo ED uds NE OE ISBN DEBE Ge e gl u Al tae Gat Ee EC ORE ELE Ea TER EP OE E da rN ee ET QU ee HO NOR A22 Qo oo uo x J k E H H p D BE B B b H dd E28 10 eMMC JTAG JF FOR MAIN XIN_MAIN 525 XIN MAIN Se aaa EMMC_RST ees gt EMMC_CMD o m ommum ana a 00
62. A A E7 Z 112 ca m G5 L13 G5 L13 e Fr G5 L13 E7 de H10 c L14 H10 Fr L14 vs gt E H L G K8 K8 e O K8 M H10 U C8102 c8103 c4 2 c4 2 d S E Lond M am 0 LUE mm ub N2 3 N2 3 16v 10v e N2 M3 N2 N5 7 N5 7 S E S N M N pa 8 pa 8 e z S PA M8 PA P 9 P 9 0 P6 M9 P6 10 A 10 T T M M 11 11 M11 11 12 d C c M12 12 A1 e 13 Al 13 c c DAT3 c ci c A1 X M13 A1 13 A2 El 14 A2 T 2d 14 Qu G EA E DATA c c 2 C A2 z M14 A2 2 sa 14 A8 1 A8 1 T c_2 ER E EJ C i C 5 c A9 3 A9 SS 3 c5 c C 5 C c 6 C A9 Mu 3 A9 K 3 A10 6 A10 si 6 Ce C C6 c c EMMC_CMD_BALL es c 7 c A10 6 A10 6 A es A KN m 7 GT C Ce C c c 8 c A11 Se N7 A11 7 A12 8 A12 E 8 c_8 c c_8 c c c_9 c A12 s N8 A12 8 A13 9 A13 9 Co c c_9 c 0 c c 10 c A13 N9 A13 9 A14 B 10 A14 F 10 c 10 c c_10 c 1 c C 11 c A14 z 10 A14 E 10 B1 11 Bl 5 11 C 11 c ei c 2 c CD c B1 i Bl 11 BT 12 B7 Ge 12 C 12 c c_12 c 3 c C 13 c B7 To B7 12 B8 es 13 B8 s E 13 C 3 C C 3 C 4 c c_14 c B8 z 13 B8 13 B9 14 B9 14 c_14 c c_14 e 5 C 15 c B9 e 14 B9 E 14 B10 P1 B10 P1 C 15 c C 15 c 6 c C 16 c B10 P1 B10 F P1 B11 E P2 B11 o Se P2 C 6 C E 6 C 7 c Ga c B11 P2 B11 P2 B12 P8 B12 B P8 C 17 c cit c E geen EL c 5 e EMMC CLK BALL T C 18 c A B12 gt P8 B12 P8 P E P C 18 C C 18 c Don t Connect Power At VDDI MT sees ve
63. ADDR 7 STADDUR OPT OPT CI TS OUT CLK CI TS CLK C 57 23 JADDRE Sa R CI_ADDR 6 R6202 CI CI RESET CI ADDR PCM_RST 22 AO 58 24 PADDRS CI_ADDR 5 R6203 CI 2 PCM_WAIT lt 22 e 59 25 JADDR4 CI ADDRISI Jet ADDRIA R6200 OPT INPACK PCM_INPACK lt 22 e 60 26 PADDR CT_ADDR 3 CI_ADDR 3 OI REG PCM_REG ROZARAO 61 27 ADDR2 CI_ADDR 2 SDZHDDRIS CI T VAL J TS OUT VAL c5 28 JADDRI CI_ADDR 1 CEDER CI TS SYNC lt 7 TS OUT SYN 63 29 ADDRO CI_ADDR O CI ADDRIO TS_OUTO CI TS DATA 0 64 30 pazo CI DATATO TS_OUT q ae e 65 31 pari CI DATA 1 AN O TS_OUT CI_TS_DATA 2 lt _ Gr Sp 32 Pate CI DATAT2 Au Inpack CI CD24 j R621544 A100 CI_DET2 67 33 Lro BIT R621 A 10K GND GND OPT O c e 2 SCH R6210 g 0 OPT LI CILIN TS VAL Ll CI IN TS CLK CI IN TS SYNC TPO_DATA 0 7 CI AR904 TPO DATAJO CI IN TS DATA O TPO DATAJI gt CI IN TS DATA 1 TPO DATA 2 CI IN TS DATA 2 TPO DATAJS CI IN TS DATA 3 TPO DATA 4 CI IN TS DATA 4 TPO DATAJS P CI IN TS DATA 5 TPO DATA 6 DY CI IN TS DATA 6 TPO DATA 7 CI IN TS DATAI7 AR905 CI 33 CT AR903 TPO CLK gt cr IN TS CLK TPO_SOP gt ci IN TS SYNC TPO VAL 5 CI IN TS VAL TPO ERR IH Fi tj SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X RADIATION FILRE AND ELECTRICAL SHOCK HAZARDS WHEN SERVICING IF 15 ESSENTIAL THAT ONLY MANUFATURES
64. CRITICAL COMPONENTS IN THE AN SYMBOL MARK OF THE SCHEMETIC Copyright 2012 LG Electronics Inc All rights reserved Only for training and service purposes SECRET LGElectronics LG ELECTRONICS CVBS 1 PHONE JACK 3 3V NORMAL R3810 10K LD3800 T5 6V AV JACK BLACK OPT JK3800 KJA PH 1 0177 M5_GND M4 M3_DETECT M1 M6 AV_JACK_YELLOW JK3800 1 KJA PH 1 0177 1 L D3801 5 6V M5 GND OPT M4 M3_DETECT M1 M6 D3802 ix 5 6v OPT AV1_CVBS_DET AV1_CVBS_IN AV1_L_IN AV1_R_IN ESD For MTK NY esp For LG1152 gt p3803 1 L DSR OSs 2 T5 6v 5 6v ESD_LG1152 ESD_MTK 3 BS D3800 2 Pa 5 6V ESD MTK ESD_LG1152 D3801 1 D3801 2 5 6V 5 6v ESD LG1152 a a ESD_MTK ET D3802 2 L 5 6V Se SB SD MIE kr 161152 IN A BLOCK SHEET LGE Internal Use Only COMMERCIAL_IR_EU A 43 5V ST i A COMMERCIAL_IR e R4115 R4105 22 IR_OUT lt COMMERCIAL_IR MMBT COMMERC COMMERCIAL IR EB 3K R4111 04102 10K 3904 NXP e hd IAL IR EU R4119 47K 04104 COMMERCIAL_IR MMBT3904 NXP COMMERCIAL IR oly R4108
65. Coe CO O OMJ Mj A C5419 5421 05423 AMP MUTE sov L e 21 gt pum 10K MMBT3904 NXP 0 1uF 0 1uF 10uF oe E 50V 50V 35V D5403 Y 50 CSALT ate 1N4148W 22000pF T e 1090y RI mu z 50V e e e J El d E cas m Si x x xy o o FILRE AND ELECTRICAL SHOCK HAZARDS THE I CRITICAL COMPONENTS IN THE Copyright O 2012 LG Electronics Inc All rights reserved Only for training and service purposes WOOFER_MUTE lt 9 0 IHE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X RADIATION WHEN SERVICING IF 15 ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR AN SYMBOL MARK OF THE SCHEMETIC SECRET LGElectronics LG ELECTRONICS ET NRS6045T100MMGK WAFER ANGLE e e P SPK_L c5436 R5415 em 0 luk 50V 5 1K 5434 Tur e 5 SPEAKER L 205437 0 1uF R5416 50V 2 5 1K e e SPK L SPK Lil SPK L SPK_R SPK_R e e gt SPK_R C5438 R5417 0 1uF 5 1K 05435 B OUR e SY 7 SPEAKER_R a 5439 R5418 0 1uF 5 1K 50V e e SPK R MODEL se DATE BLOLK TSHEET LGE Internal Use Only 24V 24V_AMP_WOOFER A A L550 CIS21J121 VON kd 0 5 2 9 0 1uF 50V SS iS
66. D AF7 D2 AE8 E2 AD8 E AE7 F T ADT F2 C529 AC8 B2 E TANDE AG8 A3 50V AH9 C2 i AF8 B3 i AG9 C3 AF9 D3 AE9 E3 AD9 F3 i AC9 D4 AE10 E4 AD10 F4 AC10 D5 AE E5 AD F5 AC D6 i AE12 A5 AH B5 AG C5 AF A6 AH12 B6 AG C6 i AF12 E6 AD12 F6 AC12 D7 AE13 B7 AG13 C7 AF13 AB AH14 B8 j AG14 C8 AF14 pH m D8 AE14 F7 AC13 E7 q AD13 E8 AD14 F8 AC14 a e s Close to LG1152 SES B9 aoTT t AG15 c9 AF15 D9 AE15 E9 AD15 F9 AC15 C10 AF16 D10 AE16 E10 i AD16 F10 AC16 Dii AE17 Ell AD17 Fil AC17 D12 AE18 E12 AD18 F12 AC18 D13 AE19 E13 AD19 F13 AC19 D14 AE20 E14 AD20 F14 AC20 D15 AE21 E15 AD21 R9112 F15 33 AC21 B10 AG16 A10 AH16 A11 AH17 B11 AG17 C12 AF18 cil AF17 B12 AG18 A12 AH18 A13 AH19 B13 AG19 c14 AF20 C13 AF19 B14 AG20 A14 AH20 A15 AH21 B15 AG21 C16 AF22 C15 AF21 B16 AG22 A16 AH22 A17 AH23 B17 AG23 C18 AF24 C17 AF23 LGI152A I E GE Sy LG1152D BB SDA I BB_SDA_O BB_SCL HS SCL HS SDA I HS_SDA_O a FU C C E C C E P P w w w w CLK_54 CVBS_GC2 CVBS_GC1 CVBS GCO CVBS UP CVBS DN FSOOCLK AUDCLK TO DIGITAL DAC DATAO DAC DATA1 DAC DATA2 DAC DATA DAC DATA4 DAC START D GCO D GC1 D GC2 D GC3 D GC4 DATAO DATA1 DATA2 DATA3 DATA4 DATAS DATA6 DATAT DATA8 DATA9 D_ D_ Ds Diz Di D_ D_ D
67. DM TDOS NF TDOS ICYOS DDR3 2Gbit IC704 DDR3 2Gbit VREFCA VREFDQ VREFCA VREFDQ MO_1_DDR_VREFCA A E2 H9 A3 _1_DDR_VREFDO VCC1 5V MAIN A A10 D8 i C758 jes G3 G9 C746 H K2 K10 C723 EEE M2 M10 2250 He 4 B10 51 H e C2 E3 C761 EA e e E10 Al All N1 N11 A2 A9 B2 D9 F3 F9 J2 J10 L2 L10 N2 N10 B3 B9 C10 D2 D10 M1_1_DDR_VREFCA A J9 E2 H9 A3 oz je _1_DDR_VREFDO VCC1 5V MAIN A A10 D8 WEN IE G3 G9 C752 H K2 253 1M K10 M2 M10 C754 pjes e B10 C755 H c2 E3 E10 Al A11 N1 N11 A2 A9 B2 D9 F3 F9 J2 J10 L2 L10 N2 N10 B3 B9 C10 D2 D10 MODEL ees so DATE 0000 LOCK HEET LGE Internal Use Only
68. GE PG a GND NQT T C amp AT 12k a RR oe Z E z E GND_ e DVB_S amp CHB RR E S n 7 T SH St L650 ui Lee EN 2 ADJ R6529 RI J BLM18PG121SN1D A 10r 10K Td uA3SWeSG2 D s DVB S amp CHB P 3 6 13 e Less ER C6519 3 3V_D_Demod NOT T CSAT VN VOUT NOT T C amp AT T P 0 1uF 10ur OPT S2_RESET 3 a ova sscus iov R6512 ijr cmm 2A 5 3 DVB_S amp CHB 2 2K 5V_NORMAL eS R6513 16V VCTRL NE NOT T C amp AT EJ 3V_S2_DEMOB9 lt A EAN61387601 C6549 d Cose 0 S2_RESET Vire DVB S amp CHB 10uF 2 F22 OUTPUT33 OPT 3 3V_D_Demod 16v A OPT e S2 SCL 34 C6524 5652 C6535 NI 100pF 0 1uF E S2_SDA gt LNB_TX ale SR SET OPT 35 e ch R6503 22 E 2C_SCL4 A LNI 36 C6517 DVB S amp CHB E Vout 0 6 LERI R2 18pF GND 37 CHB Max 480mA R6504 22 i 2C SDAA else Max 240 C6518 DVB S amp CHB 18pF E 3 3V_D_Demod 3 3V TU LNB_OUT OP 50V 1 8V_TU E 3 3V_ TU a i NOT T C amp AT PRSE i L6506 Mur eU ON AZ1117BH 1 8TRE1 z BLM18PG121SN1D AE noT OT QUT dor PER Y de Ges an i cesso Y C6542 3 2 e E C6531 10uF 0 1uF 0 1uF MOS H E EH H ADJ GND TU6501 1 TUG501 2 DX rd U TDSN BO51F TDSN C251D TU6501 3 TDSQ G351D L TDSN C051D n D C6546 C6548 Nee mmm ere mc m a cmm m n m a our s TOF Close to the tuner lov i r BR TW CN TUNER A 465mA MAX R6532 1 E Jemi spc121sn1p 150mA MAX 3 L 2209122 FSESV NORMAL
69. I USB CTL3 WIFI DM gt USB OCD3 WIFI_DP i A A a TEE THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X RADIATION FILRE AND ELECTRICAL SHOCK HAZARDS WHEN SERVICING IF 15 ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE NN SYMBOL MARK OF THE SCHEMETIC SECRET LGElectronics MODEL nn DATE BLOLK ISHEET LGE Internal Use Only LG ELECTRONICS Copyright 2012 LG Electronics Inc All rights reserved Only for training and service purposes THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X RADIATION FILRE AND ELECTRICAL SHOCK HAZARDS WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE AN SYMBOL MARK OF THE SCHEMETIC Copyright O 2012 LG Electronics Inc All rights reserved Only for training and service purposes SECRET LGElectronics 3 3V_NORMAL A 12V EU 1 R4601 ros Full Scart 18 Pin Gender s eau e e gt sc DET ei EU oi EU EU D4611 D4611 2 D4611 1 AL C4604 MMBT3906 NX d ED C4606 ch 5 6V T 5 6V gt 5 6V zf 0 1uF 04600 e E 0 1uF OPT 200pF 200pF B Du p S jiss AU E al c EU EU ESD_LG11 SCART ESD MTK SCART i Q4601 R4606 MMBT3 904 NXP
70. LRVCLKE W GMA5 SE RVCLKN LO RXACLKN 28 eMac SE GMA 6 28 C gt RXACLKP S GMA9 Nd ay poem LRV4P 30 en 3o LERV3 31 4410 ux LRVA GMA10 31 L 32 GMA12 RV4 inl DO RXA3N GMA12 32 K RV5 33 GMA13 RV5 E GMA13 33 HP RV6P gt RXA3P 34 CMA14 RV5 GMA14 34 L 35 omms LRV6 TO RXAAN GMA15 35 36 GMAL6 OPT_N GMA16 36 OPT gt RXA4P 37 _eMA17 H CONV GMA17 37 PE sa Tous H CONV GMA18 38 39 ENP GSP 39 5 ao GSP OL GSP 40 41 LEO 5 41 OL gt RXBON a2 GND jin SOE TO RXBOP SOE T9 SOE b T 44 H_CONV i CM H CONV gt RXBIN as OPIN GMA2 OPT_ 45 GMA3 O RXBIP 46 GND 46 47 Lvo GMA4 ES RLVOP 47 RXB2N ag RLVO GMA5 RLVO 48 GMA6 DO RXB2P 49 R2V1 RLV1P 49 so RLV1 GMAT RLVI 50 51 RLV2 o GMA9 RLV2P 51 GMA10 CD RXBCLKN 52 RLV2 2 RLV2 52 53 S53 53 3 SE gt RXBCLKP 54 RLVCLK 4 PR RLVCLKP 54 55 RLVCLK 5 GMA14 RLVCLKN 55 56 GND 6 GMA15 56 L_ gt RXB3N 57 RLV3 7 SE RLV4P 57 GMA17 LD RXB3P 5g RLV3 8 RLV4 58 59 RLV4 GMA18 TO RXB4N RLVSP 59 eo RLV4 RLV5 Ree 60 gt RXBAP Sa RLV6P 61 62 RLV5 Z OUT RLV6 62 VGH 63 eno L 27V K SO 63 VCOMOUT 94 RRVOP 64 LVCOM_FH es RRVO gt VCOMFB VLCD POWER RRVO 65 66 RRV1 RRV1P 66 12V 67 arvi RRV1 67 VGL ea RRV2 A RRV2P 68 SV 69 RRV2 GSC A L600 RRV2 99 GOE 79 GND HVDD MLB 201209 0120P N2 E 71 RRVCLK 8V RRVCLKP EE yv 22 RRVCLK RRVCLKN 72 C600 c601 33 JEN 73
71. M1 DDR CLK MI DDR CLKN M1_DDR_CKE M1_DDR_ODT M1_DDR_RASN M1_DDR_CASN M1_DDR_WEN M1_DDR_RESET_N M1_DDR_DQSL_P M1_DDR_DOSL_N M1_DDR_DML MI DDR Don M1_DDR_DO1 M1_DDR_DQ6 M1 DDR DQ7 MI DDR DQ4 M1 DDR DQ3 MI DDR DQ2 MI DDR DQ5 UD M2 DDR an M2 DDR A1 OO M2 DDR A2 OO M2 DDR A3 M2_DDR_A4 M2 DDR A5 OD M2 DDR A6 OD M2 DDR A7 O M2 DDR A8 LO M2 DDR A9 OO M2 DDR A10 M2 DDR A11 C M2 DDR A12 OD M2 DDR A13 gt M2 DDR BAO M2 DDR D i M2 DDR BA2 M2 DDR CKE CO M2 DDR opt M2_DDR_RASN O M2 DDR CASN OO M2 DDR WEN YM2 DDR RESET N M2 DDR DOSU P M2 DDR DOSU H M2 DDR DOSL P M2 DDR DOSL H gt M2 DDR DML gt M2 DDR DMU M2 DDR Don M2 DDR Do M2 DDR DQ2 M2 DDR DO M2 DDR DQ4 M2 DDR DQ5 M2 DDR Do M2 DDR DQ7 M2 DDR Do M2 DDR Do M2 DDR DQ10 M2 DDR DQ11 M2 DDR DQ12 M2 DDR DQ13 M2 DDR DQ14 M2 DDR DQ15 240 R711 gt M2 DDR CLK M2 DDR CLKN IC700 H5TO2G83BFR PBC POP EN VCC1 5V MAIN
72. M2_DDR_DQ13 5 5 o M2 DDR DQ14 M2 DDR DQ15 SECRET LGElectronics o b o m E mee x ie a a m Ex KS ni pa C732 MO_1_DDR_VREFCA A fu fa 3 Q a o o o les O D e 19 VCC1 5V MAIN A N S o Sa e mo x Es A m nd E KI ni a C733 MO 1 DDR VREFDQ 0 1uF 1000pF C748 VCC1 5V MAIN A R734 1K 1 R735 1K VCC1 5V IC702 H5TO1G63DFR PBC R736 18 1K 13 R737 1K M1_1_DDR_VREFCA A tu D 3 Q a o o o o ep o JU n 5 o MAIN M1_1_DDR_VREFDO D D 3 Q a o o o 3 0 o o a o o o A ROPA ER SIGN50000738 4 M8 VREFCA H1 VREFDQ L8 B2 VCC1 JOV DE A le o C722 luF luF luF luF luF luF luF o Tete To Te Te fe Te 0060000090 luF J1 J9 LI L9 TI A9 B3 El G J2 J8 M1 M9 P1 P9 Tl T9 LG ELECTRONICS 10uF 104 Memory Place these caps near Cap DDR3 1 5V bypass MO_DDR_AO MO_DDR_A1 MO_DDR_A2 MO_DDR_A3 MO_DDR_A4 MO_DDR_AS MO_DDR_A6 MO_DDR_A7 M0 DDR A8 MO DDR A9 MO DDR A10 MO DDR A11 MO DDR A12 MO DDR A13 MO DDR A14 MO DDR BAO MO DDR BAL MO_DDR_BA2 MO_DDR_CLK MO_DDR_CLKN MO_DDR_CKE MO_DDR_ODT MO_DDR_RASN MO_DDR_CASN MO_DDR_WEN MO
73. N a ODEL LGE Internal Use Only IC100 LG1152D B1 MO DDR A0 MO DDR A1 MO DDR A2 MO DDR A3 MO DDR A4 MO DDR A5 MO DDR A6 MO DDR A7 MO DDR A8 MO DDR A9 MO DDR A10 MO DDR A11 MO DDR A12 MO DDR A13 MO DDR A14 MO DDR BAO MO DDR BAL MO DDR BA2 MO DDR CLK MO DDR CLKN MO_DDR_CKE MO_DDR_ODT MO_DDR_RASN MO_DDR_CASN MO_DDR_WEN MO_DDR_RESET_N MO_DDR_DOSL_P MO_DDR_DOSL_N MO_DDR_DQSU_P MO_DDR_DQSU_N MO_DDR_DML MO_DDR_DMU MO_DDR_DQO MO_DDR_DO1 MO DDR DQ2 MO_DDR_DQ3 M0 DDR DQ4 MO DDR Dos MO DDR DQ6 MO DDR DQ7 MO DDR Do MO DDR DQ9 MO DDR DQ10 MO DDR DQ11 MO DDR DQ12 MO DDR DQ13 MO DDR DQ14 MO DDR DQ15 MO DDR ZQCAL IC100 LG1152D B1 M1 DDR AO MI DDR A1 MI DDR A2 M1 DDR A3 M1 DDR A4 MI DDR A5 M1 DDR A6 M1 DDR A7 MI DDR A8 MI DDR A9 MI DDR A10 MI DDR A11 MI DDR A12 1 DDR A13 M1 DDR A14 MI DDR BAO M1 DDR BA1 M1 DDR BA2 M1 DDR CLK MI DDR CLKN M1 DDR CKE MI DDR ODT MI DDR RASN MI DDR CASN M1 DDR WEN MI DDR RESET N MI DDR DQSL P MI DDR DOSL N MI DDR DQSU P MI DDR DQSU N MI DDR DML MI DDR DMU M1 DDR DQO M1 DDR DQ1 M1 DDR DQ2 M1 DDR DQ3 M1 DDR DQ4 M1 DDR DQ5 M1 DDR DQ6 M1 D
74. N SYMBOL MARK OF THE SCHEMETIC Allegro A_GND D6900 MBR230LSFT1G D6901 1 LNB SX34 40V D6901 LNB SMAB34 SECRET GElectronics dc Ls cL SE CH i DCDC GND and A GND are connected DCDC GND and A GND are connected in pin 27 i PCB GND and A GND are connected em em ap ap emm emm D D D D D D D D D D A A ell m Aum GP GER AA AA AA AA AA AA AA AA AA AA AA AA AA qa 4 4 A A G amp G A 1 i Input trace widths should be sized to conduct at least 3A i Ouput trace widths should be sized to conduct at least 2A i D6903 1 40V LNB SX34 D6903 10v 3A LNB SMAB34 12V LNB A LNB L6900 e UH 3 c6911 close to Boost pin SP 7850 33 C6910 0 luF 2 4A 10uF S 25V N s uf close to VIN pin 25 LAA LNB LNB DCDC_GND mi ZIZ DCDC_GND kN C6904 D6902 0 luF LNB_SMAB34 Lun sov 40V D6902 1 1 AI x H o A GND 40V Au aa a z H O El a Z x H Fa O Ey A CND al oj aj gt ml z m BOOST 8 It 0 lurF VCP 7 LNB SE e TCAP j 0908 R6905 LNB NC 1 166300 6 A8290SETTR T TDO LNB 2 A GND 1 A GND EXTM 4 prz LNB TX DCDC_GND TDI E A GND A GND 3 3V NORMAL mt ax Q Wa Es Q H N Ol Y Jo T gt Ka wn H A_GND E 12V 12V_LNB A A e e R6903 L6901 4 7K BLM18PG121SN1D m LNB E T e e D Dz SE C6917 LNB C6918 Bl Og n
75. NAND L XO MAIN C Ge Ll agis XO MAIN aa H qa 4 EMMC CLK ees EMMC_DATA 0 7 OPM1 a a EMMC_CMD 3 3V NORMAL AB17 SENO HERTA C26 EMMC_DATA 7 A E27 EMMC_DATA 6 AE3 C_DATA6 E26 EMMC_DATA 5 3 3V_NORMAL SOC_RESET gt PORES_N C DATAS Ka A RRA D27 EMMC_DATA 4 E E V23 D28 EMMC_DATA 3 TRST NO u2s TRSTNO C_DATA3 55 EMMC_DATA 2 TMSOL_ gt vas 7M80 C_DATA2 Po S U BooT_MODE1 q q TCKO TCKO B Da EMMC_DATA 1 A V24 D26 EMMC_DATA O 5 TDIO TDIO C DATAO co a U24 A la E e TOR y22 R23 Di o A i TRST_ AND CS1 O AA22 P24 TMS AND CS0 S AB20 N25 4 TCK AND_ALE TRST NO e o AB21 z P23 TDI AND_CLE BOOT_MODE1 TDIO e e 22 E N24 TDO AND REN AB9 SS P25 TDOO C o PLLSET1 ape PLESETI AND WEN TSSSVONORMAT TMSO e o 3 3V_NORMAL PLLSETO E00T MODEI apis PLESETO Xen A geg Se Se TceK0 CD e e EA BOOT_MODE1 BOOT MODEO apra BOOT MODE1 031 E gt OPTIC_FPGA_RESET BOOT_MODEO BOOT_MODEO 030 Fi SOC_RESET lt e LE 5 e gs 029 a gt OPTIC_SERDES_RESET oo Y W LM ELI A A erus SE o MN ERROR OUT RISO mos EXT INTR3 GPIOA48 028 Fi DY 3D_DEPTH_RESET Pu oo o oq EPHY INT SE EXT INTR2 GPIO63 Gul es gt RST_PHY aa SS BOOT_MODEO ESC USB oCcD2 R101 SC EXT INTR1 GPIO62 026 ES Coen TCON RESET a Re OR S ti USB_OCD3 EXT_INTRO GPIO61 025 HW_OPT_9 3 3V NORMAL OS a Q8 0100 v sa E HW_OPT_7 SW1 A uc od 2N7002K Y5 U5 HW OPT 8 JTP 1127WEM 4 UARTO RX GPIO49 023 ed W6 U4 soc NC a a aac VARTO_IX GPIO50 cP
76. NHKO CO OO OO OO OO OO OO OO OO oO oO h NI MN NM M mM Q1 01 01 daa a a da da da a a a a Aa Aa Om Om Om A A A A a a wm VREF_M2_0 VREF_M1_0 VREF_M1_1 VREF MO 0 VREF MO 1 0 OSPR 0 OSPR 0 OSPR 0 OSPR 0 OSPR 0 OSPR 0 OSPR 0 OSPR 0 OSPR 0 OSPR 0 OSPR VDDCO9 1 VDDCO9 2 VDDCO9 3 VDDCO9_4 VDDCO9_5 VDDC09_6 VDDC09_7 VDDC09_8 VDDCO9_9 VDDCO9_ VDDCO9_ VDDCO9_ VDDCO9_ VDDCO9_ VDDCO9_ VDDCO9_ VDDCO9_ VDDCO9_ VDDCO9_ VDDCO9 20 VDDCO9_21 VDDCO9 22 VDDCO9 23 VDDC09_24 VDDO9_LTX_1 VDDO9_LTX_2 VDDO9_LTX_3 AVDD09 DR3PLL Oo JO D P GA PN n o o VDDC_MAIN_XTAL SP_VOPS D_MAIN_XTAL E EE A E bet sess O AA o egl vo Sana U 50 H a 20 o Jan SOON o o 00000000000000000000000 UL Et Ei Ei Et Ei Er er tr Er O En UU O Y N AIN_XTAL NJININININININIAN E IS JN olojelsjlajajme ju T 2 E Ploejojslajalsljolv vjojsjalalp C N vlojsjajalsivinN ojoj Anne N xu uwiwimiwimimsuusprejeje jvo o voiv viviziz z ziz izizizizzE x z z z z x vjojsjajalsicvinN spafalalajajafala vjojsjanjalpjluojvpjelo G G G G G G G G G G G G G G G G G G G G G G G G G G G G G G G G G G G G G G G G G G G G G G G G G G G G G G G G G G G G G G G G G G G G G G G G G G G G G G G e pes s MIS Z x IG G G G a a G G G o
77. O ver sees DEE EEN E SS erer ES ST pes E c c_20 c c_20 c B14 P11 B14 e P11 ci P12 ci m P12 C 20 c c_20 c E SS c zi C zn C 21 c m Cl P12 ci P12 E P E P c 21 c Gon c Just Interal LDO Capacitor DATS c c c3 P13 c3 213 c7 P14 c7 P14 c Se E c x c c C P C P K e DUL DUS DUL DUS Y A DU2 DU10 DU2 DU10 YD VA DU3 DU11 DU3 DU11 Y 3 X 3 DUA DU12 DUA DU12 Y 4 Y 4 DU5 DU13 DU5 DU13 Y 5 X 5 DU6 DU14 DU6 DU14 Y_6 Y_6 DUT DU15 DUT DU15 Y_7 Y_7 DUS DU16 DUS DU16 Y 8 Y 8 IHE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X RADIATION FILRE AND ELECTRICAL SHOCK HAZARDS WHEN SERVICING IF 15 ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR Copyright 2012 LG Electronics Inc All rights reserved Only for training and service purposes THE CRITICAL COMPONENTS IN THE NN SYMBOL MARK OF THE SCHEMETIC SECRET LGElectronics LG ELECTRONICS DET LUCK SHEET LGE Internal Use Only Place Near Micom LOGO_LIGHT IHE AN SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X RADIATION FILRE AND ELECTRICAL SHOCK HAZARDS WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE AN SYMBOL MARK OF THE SCHEMETIC Copyright O 2012 LG Electronics
78. OCDE s LUR a az a 50V 50V Fa 3 LNB LNB o o l E N ER Se SE Es H CO o OY o E C en On OY On VO LO LO O O O o o ee A GND LG ELECTRONICS 12C_5DA4 I2C_SCL4 ZO Leia LGE Internal Use Only THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X RADIATION FILRE AND ELECTRICAL SHOCK HAZARDS WHEN SERVICING IF 15 ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR Copyright 2012 LG Electronics Inc All rights reserved Only for training and service purposes THE CRITICAL COMPONENTS IN THE NN SYMBOL MARK OF THE SCHEMETIC SECRET LGElectronics 51Pin LVDS Connector For FHD FRC3 HS_LVDS P7200 FI RE51S HF J R1500 NC gt L DIMO SCLK NC gt L DIMO MOSI NC gt L DIMO VS NC I2C BE SDA1 NC I2C BE SCL1 NC FRC3 RESET LVDS SEL R7201 NC 0 pa FRC3_FLASH_WP NC gt BPL_IN 10K L DIM_ENABLE R7200 LOCAL DIM EN SNP 10720 Jee LOCAL DIM EN TXAON TXAOP TXAIN TXA1P TXA2N TXA2P wo co Oo al Bm w N PR o wo Oo al Be w N n TXACLKN TXACLKP TXA3 TXA3P TXA4 TXA4P TXBON TXBOP TXBIN TXB1P TXB2N TXB2P TXBCLKN lt TXBCLKP lt TXB3 TXB3P lt TXB4 TXB4P PA
79. OO PC L IN DSUB_G 3 3V_NORMAL D3611 R3646 5 6V ix D3611 1 4 ESD_MTKL OPT 10K 5 6V e gt DSUB DET HS Pc_R_IN 5 6V DSUB R C OPT D3612 E mn iY p3612 1 J OD ESD MTK T I 5 6V ei I THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X RADIATION FILRE AND ELECTRICAL SHOCK HAZARDS WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE AN SYMBOL MARK OF THE SCHEMETIC MODEL Jone men gt DATE LGElectronics LG ELECTRONICS BLOCK GHEET Copyright O 2012 LG Electronics Inc All rights reserved LGE Internal Use Only Only for training and service purposes THE ZN SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X RADIATION FILRE AND ELECTRICAL SHOCK HAZARDS WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE AN SYMBOL MARK OF THE SCHEMETIC Copyright O 2012 LG Electronics Inc All rights reserved Only for training and service purposes SECRET LGElectronics up Lourl HP_ROUT HP_DET t3 3V NORMAL JK3700 KJA PH 0 0177 R3700 10K HP OUT LG ELECTRONICS EAG61030001 HP_OUT ESD for MTK VA3700 1 5 6V ESD MTK HP OUT 7 ESD for LG1152 VA3700 2 5 6V
80. Only for training and service purposes 19 Adjustment condition and cautionary items 1 Lighting condition in surrounding area Surrounding lighting should be lower 10 lux Try to isolate adj area into dark surrounding 2 Probe location Color Analyzer CA 210 probe should be within 10 cm and perpendicular of the module surface 80 100 3 Aging time After Aging Start Keep the Power ON status during 5 Minutes In case of LCD Back light on should be checked using no signal or Full white pattern 4 2 6 Reference White balance Adj coordinate and color temperature Luminance 216 Gray Standard color coordinate and temperature using CS 1000 over 26 inch CA T DR em w Temp Standard color coordinate and temperature using CA 210 CH 18 Temp a 0 002 sar 0 002 13000 K 0 0000 0 285 0 002 0 293 0 002 9300 K 0 0000 0 313 0 002 0 329 0 002 6500K 0 0000 4 2 7 ALELF amp EDGE LED White balance table EDGE LED module change color coordinate because of aging time Apply under the color coordinate table for compensated aging time 72LM950V ZA 8 69 277 284 293 304 317 334 6 3649 272 277 288 297 312 327 8 80 119 270 274 286 294 310 324 9 Over120 269 273 285 293 309 323 LGE Internal Use Only 4 3 EYE Q function check 4 4 Local Dimming Function Check 1 Turn on TV Step 1 Turn
81. Please input 3D test pattern like below Eye Q Il sensor E SensorData 243 Backlight 100 2 When 3D OSD appear automatically then select OK key O K 3 Don t vear a 3D Glasses check the picture like belovv O K Copyright O 2012 LG Electronics Inc All rights reserved 20 LGE Internal Use Only Only for training and service purposes 4 7 Wi Fi Test Step 1 Turn on TV Step 2 Select Network Connection option in Network Menu Step 3 Select Start Connection button in Network Connection Start Connection Step 4 If the system finds any AP like blow PIC it is working well WE Wireless IPTIME_hmhm oh RE Wireless iptime_BP_Par 4 8 LNB voltage and 22KHz tone check only for DVB S S2 model Test method 1 Set TV in Adj mode using POVVER ON 2 Connect cable betvveen satellite ANT and test JIG 3 Press Yellow key ETC SWAP in Adj Remote control to make LNB on 4 Check LED light ON at 18 V menu 5 Check LED light ON at 22 KHz tone menu 6 Press Blue key ETC PIP INPUT in Adj Remote control to make LNB off 7 Check LED light OFF at 18 V menu 8 Check LED light OFF at 22 KHz tone menu Test result 1 After press LNB On key 18 V LED and 22 KHz tone LED should be ON 2 After press LNB OFF key 18 V LED and 22 KHz tone LED should be OFF Copyright 2012 LG Electronics Inc All rights reserved Only for training a
82. SPECFIED PARTS BE USED FOR 1 THE CRITICAL COMPONENTS IN THE NN SYMBOL MARK OF THE SCHEMETIC Copyright O 2012 LG Electronics Inc All rights reserved Only for training and service purposes SECRET LG Electronics P Am D D D D D D D D D D D D D 5V_NORMAL CI CI_DATA 0 7 HOS F LOT CI DATA DIR gt IC904 74LVC245A BO BESA SN 3 3V NORMAL A a bcd c cL a ewe pee Speen eee ee cL E ee ee as Cee PCM CE1 0 7 EB DATA 3 3V NORMAL BUFFER FOR 5V gt B3 cM gt DIR GATE CI AR909 CI DATA 0 CI DATA 1 CI DATA 2 CI DATA 3 CI AR910 CI DATA 4 CI DATA 5 CI DATA 6 CI DATATI IC905 74LVC1G00GW WE gt 0E PCM OE IOWE gt IORD PCM IORD MAND GATE gt NAND CI AR911 CI ADDR 0 X 1 EB ADDR O CI ADDR 1 X 1 EB ADDR 1 CI ADDR 2 X 11 EB ADDR 2 CI ADDR 3 X 1 EB ADDR 3 CI AR912 CI ADDR 4 XK 1 EB_ADDR 4 CI ADDRISIK 1 EB ADDR 5 CI ADDR 6 X 1 EB ADDR 6 CI ADDR 7 X 1 EB ADDR 7 CI AR913 CI ADDR 8 C EB ADDR 8 CI ADDR 9 X 1 EB ADDR 9 CI ADDR 10 X EB ADDR 10 CI ADDR 11 C 1 EB ADDR 11 3 3V N
83. Speaker off Board Y N Cancel OFF Replace Power Board and repair parts N Check Disconnection Replace MAIN Board Y Replace Speaker Speaker disconnection LGE Internal Use Only Copyright O 2012 LG Electronics Inc All rights reserved Only for training and service purposes Standard Repair Process 9 15 C Audio error s ET t SP VVrecked audio discontinuation noise Revised date abnormal audio discontinuation noise is same after Check input signal compared to No audio gt A25 Check and replace Check audio speaker and B Voltage 24V connector Check input signal RF External Input signal Replace Power B D When RF signal is not received Request repair to external j Replace Main B D cable ANT provider d In case of N External Input signal error Connect and check orma other external audio Check and fix device external device Y Check and fix external device Copyright O 2012 LG Electronics Inc All rights reserved LGE Internal Use Only Only for training and service purposes Standard Repair Process ae D Function error age E LCD TV symptom Remote control amp Local switch checking 10 15 1 Remote control R C operating error Replace Main B D A27 A27 ur MOT Check R C itself addu iu i Check IR orman Operation inc Cable connection nad 3 5V Output signal Signal Connector solder i On Main B D N Check R C Operating Check
84. d lt lt N o lu Oo JO D bany RP a a ja SsSjalalsjulvijielo Jo PO AE JE K kx 3 3 QNIN elo lt lt lt CI al te od uus d A EI EEES EEES RETA ES WLW WD WW PS lye le ye ye ye yyy vje Tee JAI uleleJejJelelrjo jn vjulejo prlololsjalals EI 0 U E Ei E E Er OG 00 Er Er Ei 0 E 0 0 U E D 0 0 S Er E C D Er E E O Err EN E Si UU E EI Er E GO D DO 0 D D D D D DO OO DO D D DD DO OO DO D D D D D OO OO DO Q D D D D DO gaa aaaa MODEL ess DATE 0000000 LOCK HEET LGE Internal Use Only TU_CVBS I SC_CVBS_IN AV1_CVBS_IN CHB_CVBS SC_FB SC_ID DSUB_B DSUB_G DSUB_R SC B SCUG SC_R COMP1_Pb COMP1_Y COMP1_Pr Place these close to tuner Arel a lll L503 lul 9 SVD504 5V_TU A R616 220CHB R521 100 R613 l 10K py NON SCART R525 1 0 L501 EU R525 15 NON SCART R524 1 0 EU R524 2 7K 3 jon je je 3 L502 5 5Vp5090 V D501 D502 Dee OPT DA OP 5V 9 92254 port e C607 g potleFy pert EJ 9 coal e wo On O C528 C546 et ees 5V NORMAL EU C510 0 1uF 16V E EU R527 10K SELECT DTV MNT_V_OUT SC soG INK 1
85. en 5 gc Digital Part gt Audio Codec1 Digital Part CVBS AFE 2 ch 3 Irck Irch sck Ka 2S stero 3 Irck Irch sck 12b 54MHz MIES Capture E d ug S AFE Block 10b 165MHz Ch w LLPLL s 12 3D or UD vd S tyre HDMI Rx 1 4 nny Data bridge gt 1 port PHY 4 1 ink I2S or SPDIF 3D ARC 4kx2 ARC data Er Copyright O 2012 LG Electronics Inc All rights reserved Only for training and service purposes 9 Audio Clocks ES Digital Chip Video Decoder Dual HD H 264 Encoder SD upto 480p Audio DSP oU Multi STD DSP Audio Audio Decoc Digital x Audio a CPU Z DualC A9 1GHz Output Graphic Engine 2D VG 3D Open ES2 0 Diplay P LVDS Engine MC NR Video y Vertical MC IPC Scaler PE OSD VCR LVDS 2 Audio Ethernet USB2 0 MAC oa M conse s eMMC Controller Headphone 125 125 SPDIF Video OSD LGE Internal Use Only L9 Block diagram Clock Divide amp Reset generation 30 48Mhz w test logic SC setting OXFD3001D4 OXFD3001D8 Clock Divide amp Reset generation fam m m m w test logic xi main B i Clock Divide amp Reset generation RS 24Mhz w test logic i mO1 darcik SSC setting OXFD3001CC OXFD3001D0 1 6GhZ i ma aarclk Clock Divide amp Reset
86. fully inserted to the SET If loose re insert 2 Perform GND 4 Internal Pressure auto check Unit fully inserted Power cord Antenna cable and A V arrive to the auto check process Connect D terminal to AV JACK TESTER Auto CONTROLLER GWS103 4 ON Perform GND TEST If NG Buzzer will sound to inform the operator If OK changeover to UP check automatically Remove CORD A V form AV JACK BOX Perform UD test If NG Buzzer will sound to inform the operator f OK Good lamp will lit up and the stopper will allow the pallet to move on to next process 7 2 Checkpoint TEST voltage GND 1 5 KV min at 100 mA SIGNAL 3 KV min at 100 mA TEST time 1 second TEST POINT GND TEST POWER CORD GND 8 SIGNAL CABLE METAL GND Internal Pressure TEST POWER CORD GND amp LIVE NEUTRAL LEAKAGE CURRENT At 0 5 mArms 8 Audio Audio practical 90 100 120 W Measurement condition max Output L R Distortion 10 8 5 Vrms Auto Volume Off max Output Audio EQ Off Speaker 80 Clear Voice Off E mie w Vmaisurounzor Measurement condition 1 RF input Mono 1 KHz sine wave signal 100 Modulation 2 CVBS Component 1 KHz sine wave signal 0 5 Vrms 3 RGB PC 1 KHz sine wave signal 0 7 Vrms Copyright O 2012 LG Electronics Inc All rights reserved Only for training and service purposes ON 9 USB S W Download Service only 1 Put the USB Stick to the USB socket 2 Autom
87. generation w test logic Z core800 cik 4 core320 cik SSC setting 0xFD3001C4 Clock Divide amp Reset generation OXFD3001D8 w test logic dcoin cik SSC setting CT 0xFD300108 R 27Mhz sex 5300106 de dco ou 27Mhz Glitch free logic between de dco out ant sdec_dco_o sdec den out 27M S disp_fout dnt buf dpll fin 27Mhz sclk About 220 internally generated clocks La 200Mh Copyright O 2012 LG Electronics Inc All rights reserved LGE Internal Use Only Only for training and service purposes Appendix Block Diagram for Edge ALEF Backlight Main 3D o Chip FHD 60Hz Dual Link LVDS For Video FHD 60Hz Dual Link LVDS For OSD e XXLM960V ALEF LED Backlight LLVO 6P N 1C401 LG5812B LRVO 6P N ARVO 6P N ARVO 6P N 80Pin mini LVDS Copyright O 2012 LG Electronics Inc All rights reserved Only for training and service purposes Hd ure 7 ILG1122A cg E TXN 0 7 FRC FHD 240Hz Quad Link FRC III V by One TCON HF mini LVDS 240Hz ja gt SPI Vsync LED BLU control IC100 RXAP 0 4 RXAN 0 4 RXBP 0 4 RXBN 0 4 51Pin LVDS hex KOR 5431232358 DDR1 A 0 1 vater s pp f TEE B ID JDR1_DATA 0 15 IC201 DDR1 hex KOR ER DDRO A 0 1 FP 11 644 i TEREN IC200 DDRO D
88. oo ao e or 1D 20 se zc 25 oo no oo vo 00 se or o oo 72 5 Do J re zo se ze ss oo so A oo oo Joo 18 oo oo oo Loo wo oo oo oo vo oo co o co vo oo co oo oo 1 H HDMI 2 C S 9D AA EDID Block 0 im 0 127 oo re rere re eo e fener or ror or Ee Fer os oo no njo on ee oras sa ac oo 20 a as os oo 34 4o 4s 40 or 40 t 4o e 60 20 40 se 20 N O T al WIN gt o o ojojo o BA Ol N o N w sisisjeje sjejsje U 20 20 20 20 20 2 o N N N ojmi JB CD 03 oc 00 18 10 06 80 18 71 01 1D 00 00 1E 00 00 00 00 N 00 EEN FC 08 3A 80 00 00 SA 00 00 00 LGE Internal Use Only HDMI 3 C S 9D 9A EDID Block 0 Bytes 0 127 DOH 7FH RRE roo foo rr re ee re vr rr 00 1 60 or Pro or 16 or cs 20 so sa e oA ee or 4s 20 or so sa ar os o 3t 4o 4s 40 er 40 0 rao or or or or or or cz 3s o v6 r 39 rao as o0 so sa oo oo oo 1e ee 21 so 8o st Fo 4o vo as oo no sa oo vo 00 1 oo oo oo Feo sr 1r sz 10 oo oA zo zo o 20 20 20 00 EJ Ce 5I 7 5 5 5 5 Foo oz es sr jer ae 1o or os 15 os 18 os vx t Pro 22 1s or 26 1s or so oo s or 70 os oc 00 20 fae zo zo co oe or far sr rc os o 15 1006 50 vo ze 10 es os
89. os or ez an eo e t 6 20 rao 2c joo ao sa oo oo o se or in a0 18 71 50 zo se zc zs 00 so s oo vo oo se 01 10 00 reo po ve 2o se zs ss oo A0 s oo oo oo ve Too 70 00 oo oo 60 co oo o0 oo vo 00 co oo co foo HDMI 4 C S 9D 8A EDID Block 0 Bytes 0 127 00H 7FH RSESERESESERESESEAESESRS oo foo FF rr vr rr rr vr oo 1e oo oF Pro or 16 or os 60 no ss ve oa ee or O N OJ NIN 2lul pa ojo mi gt jo N TI psipjpjo O U ojojoil ujoj ro or 16 or 20 or so 54 ao or ot or ao as oo ao 0 4o o a5 co ao reo se 1e ss 10 Ojco o 1 gl olspjajo N im gt sjmjoljmn 20 20 20 20 20 20 Copyright O 2012 LG Electronics Inc All rights reserved Only for training and service purposes 4 2 White Balance Adjustment 4 2 1 Overview W B adj Objective 8 How it works 1 Objective To reduce each Panel s W B deviation 2 How it works When R G B gain in the OSD is at 192 it means the panel is at its Full Dynamic Range In order to prevent saturation of Full Dynamic range and data one of R G B is fixed at 192 and the other two is lowered to find the desired value 3 Adjustment condition normal temperature 1 Surrounding Temperature 25 C 5 C 2 Warm up time About 5 Min 3 Surrounding Humidity 20 96 80 96 4 2 2 Equipment 1 Color Analyzer CA 210 LED Module CH 14 2 Adjustment Co
90. 0 9VDC 0 9AVDD GPIO 28 27 wie ERR 243 L103 L105 12 for PO tunaning R119 R108 R171 R187 R189 m7 755 110 VSS 244 MLB 201209 0120P N2 MLB 201209 0120P N2 N I l s ZU er Tus us i uis vss 111 245 SIN ain 240H W O_TCON IMAGE_NORMAL OLED vss_112 246 2 E T M21 p C131 C139 C144 C153 C159 C163 VSS 113 247 7 o 1 L FRAME OPT L TCON_OPT ID soc oPT LD REVERSE OPT LD DISPLAY_OPT I M22 CUM wi 4 7uE 4 7uE 4 7uF 4 TUE 0 1uF u 1 vss 114 vss_248 10v 10V 10V 10V 16V 16V R170 N n R107 R116 10K R188 R190 ws 733 115 VSS 249 10K 10K L9 LG1152 10K 10K VSS 116 VSS_250 E I 120Hz W_TCON IMAGE_REVERSE LCD N6 z 5 vss_117 vss_251 N vss_118 2 Mio de 252 VSS 119 253 N11 READY FOR H W OPTION wiz 755 129 _254 a am em mm ee oe es a a a ee ae A wis 35 121 VESI I VSS 122 256 N14 aP an P P A P A P P A P A P A D P D P P a N15 VSS 123 V88 257 vss_124 VSS 258 GPIO NO OPTION NAME HIGH LOW N16 vss_125 VSS 259 3 3V 3 3V 3 3V N17 vss 126 vss 260 SN Z St a SS a eg eg d es 11 FRAME_OPT 240Hz 120Hz A A A N19 si VSS 127 VSS 261 N21 R140 R142 R144 wa VSS 128 VSS 262 12 JIG OPT Without TCON With TCON 10K TOK LOK za 755 12 VSS 263 for FRC3 JIG L D_ON_FRC OPT OPT VSS 130 VSS 264 P4 VSS 131 ven 265 13 SOC OPT L9 LG1152 MTK S TD L DIMMING OPT S TT DOPT READ
91. 0146 symptom LUE External device recognition error Revised date 13 15 Check technical information Fix information S W Version Check and fix external device cable rnal Input and Component ecognition err r gt Replace Main B D Fix in accordance with technical information Replace Main B D 13 Copyright O 2012 LG Electronics Inc All rights reserved LGE Internal Use Only Only for training and service purposes Standard Repair Process Established Error gate symptom ymp Circuit noise mechanical noise Revised date a Replace PSU with LED driver Check location of OR noise Replace LED driver Me al Check location of noise x Mechanical noise is a natural phenomenon and apply the 1st level x If there is a Tak Tak noise from the Identify nose type Xx When the nose is severe replace the module For models with fix information upgrade the S W or provide the description AN cabinet refer to the KMS fix information and SE SN EE Em by pae then proceed as shown in the solution manual Ss A mes ei We EEN For models without any fix information uc reus to nose in the Owner s provide tha description 14 Copyright O 2012 LG Electronics Inc All rights reserved LGE Internal Use Only Only for training and service purposes Standard Repair Process symptom Exterior defect Revised date 15 15 Zoom part with Replace
92. 1 240Hz Mode gt 120 or 240Hz Programmable TCON_OPT SE iio vss 88 VSS 222 SOC_OPT vss 89 VSS_223 I 2 GPIO 4 120Hz Mode gt 60 or 120Hz Programmable ee B25 BER e sa us 240Hz Mode gt 120 or 240Hz Programmable B24 112 V55 224 DISPLAY_OPT is vss o1 225 0 9VDC Decaps 3 GPIO 5 120Hz Mode gt 120 or 240Hz Programmable H Ve Doe 240Hz Mode 240 or 480Hz Programmable L14 2 0 9VDC iis vss 93 VSS_227 4 GPIO 6 120Hz Mode gt 120Hz Fixed id os uis VS8 94 Vss_228 240Hz Mode gt 240Hz Fixed 0x1C Direct access vss_95 VSS 229 0xB2 In direct access D 5 GPIO 7 120Hz Mode gt 120Hz Fixed nig 35 96 VSS 230 240Hz Mode 240Hz Fixed VSS_97 231 a L21 C148 C154 125 738 38 _232 10uF our errores ma VSS 99 233 25V 25V External Vsync input for Local Dimming block us VSS 100 SS 234 vss_101 VSS 235 M6 GPIO 10 mg 735 102 VSS 236 T Con L R Sync Monitor AR uio 735 103 VSS 237 vss_104 238 I GPIO 12 11 Mil vss 10s 239 s w 126 master cH x12 VSS 0 9AVDD Decaps D EP P P EP P P P P P P P P P P P P P P EP P EP P P P P P P P P P P EP D P az E VSS 106 240 0 9v Power Separation E PO N13 vss 107 VSS 241 BLU Direct Control CH 3 3V 3 3V 3 3V 3 3V 3 3V M14 TA E 0 9V S 0 9AVDD A A A A A wis VSS 108 VSS 242 0 9VDC
93. 1 10V 10V 16V 3 3V ES G A16 F16 AFS sp1_cs CI E SPI CS TXB4N FIT VSS 176 AVDD18 2 SPI DI v1 321 91 T IS VSS 177 E SPI DoC SPI DO TXCOP VSS 178 3 3V Rite Bie txcon H ri VSS 179 l A m IK R1 JI C14 F21 ER SDA M TAT R SS 180 a ee eed ae SS SS E ES SS S de een s 3 J2 C15 F23 CER ai sei von SS _181 I2C SDA S R130 spa s TXC2P z 182 I2C_SCL_S e e R131 33 H2 A14 SC ixl es e geb ae _SCL_ SCL_S TXC2N Fil SC _183 ML SH SH on TXCCLKP E dus des das ug K2 B13 H5 TE KOT KOT oe am R101 10K SMODE TXOGDEN _185 mm wm mmm mmm SS SS SS emm SS SS i i i i sl oo e 33 c12 H8 xs TMODEO Txc3P o gt d _186 3 3 TMODE1 TXC3N _187 3 3V IO Decaps L3 B12 H10 TMODE2 TXC4P _188 M3 A12 H11 TMODE3 TXCAN _189 3 3V_10 H12 3 3V M2 A11 H13 pda RST N 11 TRST_N TXDOP B11 H14 ds 3 TDO C 2E TxpoN E See _192 5 SW100 515 tor wi rt TXD1P ee TS _193 JIP 1127WEM OPT TERE Ni TCLK TXDIN 15 T _194 C151 Lois TMS 3t cus rxo2e L 195 1QuE Mir T8 P SES IG1122 xs7 eee Bl33 AAA i A10 H18 25V 25V ET TXD2N 196 pik 8 K1 A9 3 3V H19 A pm Reng Taput ro eil e PORES_N TXDCLKP hy SE d _197 s R135 1 LG1122 RST From Main SOC SPI DL MODE E R TXDCLKN es aon _198 2 HW_RESET From HW Switch ka XTAL OUT lt TXD3P gt 199 I AEG c9 H23 3 SPI_DL_MODE Download Mode to Flash Mem L ZALIN DS 400 E B8 J5 T
94. 1 T C4600 See OPT 1000pF EHS 50V BLM18PG121SN1D L4601 yy H EU D4608 EU EU C4603 5 6V T c4601 4700pF ORT I 1000pF ch 50V i DTIV MNT R OUT LG ELECTRONICS BLOCK SHEET LGE Internal Use Only Zigpee Radio Pulse M REMOTE OPTION a e ss SS t3 3V NORMAL P4800 A 12507WR 08L 14800 M_REMOTE 120 ohm M_REMOTE ARA 8 0 0 e Sn 100 9 idend e 1 16W o py M REMOTE RX a M_REMOTE_TX E M RFModule RESET M_RFModule_ISP 3D_SYNC_RF M REMOTE 3D SYNC RF Only For PDP ALL M REMOTE OPTION om om e a a a a a a a a a a a a a a a a a a a a u emm emm emm emm emm emm emm emm emm emm emm emm emm emm emm emm emm emm emm emm emm THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X RADIATION FILRE AND ELECTRICAL SHOCK HAZARDS WHEN SERVICING IF IS SECRET manda wen a mu ee ns O Lecce LG ELECTRONICS BLIK SHEET Copyright O 2012 LG Electronics Inc All rights reserved LGE Internal Use Only Only for training and service purposes MODEL DATE Ethernet Block LAN_JACK_POWER A Lu A Lu A u 16V 50V 16V 50V JK5000 XRIH 01A 4 DA7 180 LG B
95. 1 _HDMI3 D2 gt D2 _HDMI3 D2_GND SS gt D2 _HDMI3 JK3201 RSD 105156 100 N SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X RADIATION FILRE AND ELECTRICAL SHOCK HAZARDS WHEN SERVICING IF 15 ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR Ti THE CRITICAL COMPONENTS IN THE NN SYMBOL MARK OF THE SCHEMETIC Copyright O 2012 LG Electronics Inc All rights reserved Only for training and service purposes BODY_SHIELD
96. 1022 _ DSUB_DET ueri T Geng UART1_RX ve VARTI_RX 021 Fr For ISP 2N7002K UART1 TXXK 1 ABE UART1_TX a neve PV BOOT_MODEO NE RX een varr2 nx B S pm Delete M REMOTE TXX 1 UART2 TX 8 lt COMP1_DET m DEBUG t5V NORMAL R5 A AB23 017 Fra K HW_OPT_5 3 3V_NORMAL IRB SPI MISOC gt m DIOZGPIO39 016 i HW OPT 6 AB P T wx IRB SPI MOSI lt SS DO0 GPIO38 015 E gt M RFModule ISP a AA F P oo IRB SPI CKX NH SCLK0 GPIO37 914 E HW OPT 10 MHL DET P IRB SPI SS C EE CS0 GPIO36 013 S gt M_RFModule_RESET zi Y N 2 n AV1_CVBS_DET EO _DI1 GPIO35 012 Fiz gt FRC_RESET Meu Y24 DO1 GPIO34 011 Fi HW_OPT_2 OPT 2N7002K DTV ATV SELECTO uad _SCLK1 GPI033 O i JH OPT 1 HDMI INT CS1 GPIO32 WE HW OPT 0 lt HW OPT 4 5V_NORMAL AB6 AC23 M 2C ScL1 SES SCLO GPIO60 pre FLASH WP A 2C SDA1 acs SPA0 GPIOS9 aod RST HUB i xi E 2C SCL2 z 36117621058 FA HW_OPT_3 AC AD 2C SDAZ Abi SDA1 GPIO57 EE Kl HP DET 2C SCL3 4 SCL2 GPIO56 e HDMI S W RESET d e e e hd e e o e 9 Soc AE4 AC22 vi E D m gx 2C SDA3 SDA2 GPIO71 Cep SWITCH CTL T Z m x x ZH B ZH Eo NO_FRC internal LG FRC3 URSA5 AES AD22 Q a o o o He 5 o Ss z 55 um DC SCL4AX SCL3 GPIO70 TU RESET 2N7002K Bin Qo ar B a d o E B E 2 FRC S AD5 A AE22 E pis x S 7 Be 7 e ol N Es MODEL_OPT_0 o 5 i 2C_SDR4 ngg SPA3 GPIO69 gt s2 RESET lo Po bil Ow ag vi Si ES IS OS Qa 2C_SCL5 C_ ADE SCL4 GPIO68 2 ee ge e N o ma 3 ein go go S MODEL
97. 1080P EE EEN Wee EX Side by side half Secondary HDTV 1080P Frame packing D HDTV 1080P 33 716 33 75 29 976 30 00 148 35 148 5 A4 Side by side Full pede 1080P Top and Bottom Primary HDTV 1080P SE ES 190 SR Side by side half Secondary HDTV 1080P Top and Bottom Primary HDTV 1080P 67 43 67 5 59 94 60 148 35 148 50 Side by side half Secondary HDTV 1080P Copyright O 2012 LG Electronics Inc All rights reserved ec H LGE Internal Use Only Only for training and service purposes N O C2 av av oO C2 av N No No N N a aj oa a la a 2 a Z sa elle ejes elsa ses ss assasszsszsl pie tl r 8 4 HDMI PC Input 3D 3D supported mode manually H freq kHz V freq Hz Pixel clock MHz 3D input proposed mode 1 1024 768 48 36 65 2D to 3D Side by Side half HDTV 768P Top amp Bottom 2 1360 768 47 71 85 5 2D to 3D Side by Side half HDTV 768P Top amp Bottom 2D to 3D Side by Side half Top amp Bottom Checker Board 3 1920 1080 67 500 148 50 Single Frame Sequential HDTV 1080P Row Interleaving Column Interleaving 640 350 720 400 4 Others 2D to 3D 640 480 800 600 1152 864 8 5 RGB PC Input 3D 3D supported mode manually H freq kHz V freq Hz Pixel clock MHz 3D input proposed mode 1 1024 768 48 36 65 2D to 3D Side by Side half HDTV 768P Top amp Bottom 2 1360 768 47 71 85 5 2D to 3D Side by Side half HDTV 768P Top amp Bottom 1920 1080 67 500 148 50 2D to 3D
98. 127WEM JTP 1127WEM o T 2 1 2 1 2 1 2 A 3 4 3 4 3 4 31 o 0 EY1 H E 4 OPT ZD100 E ENTE ci SES VOL VOL MENU INTER A D e EY2 OPT ZD101 5 6B e 1 54V 1 03V 0 51V 0 09V e e e E R101 R103 R105 R107 10K 4 7K 1 8K 270 0 BEER Go HIER ee t 0 gt Sw101 SITI OS SW105 SW107 JTP 1127WEM JTP 1127WEM JTP 1127WEM JTP 1127WEM SECRET CHF CH LG ELECTRONICS POWER w n Si Hs N THE CRITICAL COMPONENTS IN THE N SYMBOL MARK OF THE SCHEMETIC LGElectronics Copyright 2012 LG Electronics Inc All rights reserved Only for training and service purposes LGE Internal Use Only LG Life s Good LCD TV Repair Guide 12 years New Models lt Applicable Model gt XXLM960V ZB XXLM860V ZB V T2 C S2 T T2 C S T C S2 0 T C Copyright O 2012 LG Electronics Inc All rights reserved LGE Internal Use Only Only for training and service purposes 2 of LED Edge 332 sss sssesese Sesesess SESHSESE soeces ssesese ije Benefit More Clear More Real Feature Edge LEDI Best picture quality thin TV Local dimming depicts more Dimming deep black BLU structure Model XXLW750T W S G 42inch H 2 V 8 16Block 42inch H 2 V 8 16Block 42inch H 2 V 8 16Block Copyright O 2012 LG Electronics Inc All rights reserved Only for training and service purposes LG
99. 18PG121SN1D E A 24V_AMP AUD_MASTER_CLK S R5406 8 TE OPT 424V 24V AMP e NE d e A A NI al ni ni aje C5420 C5422 Zo0 iur 0 1uF 10uF 0 01uB C5413L C5414 O O E KG bos 35V 50V 0 1urF T Tour I n n H Aj eil vil gji eil vil eil ci GE 16V ela m SE Qaam ono anmn e e e e e ch Di Die an A A Girl E ay aya D5400 T E DM Oil eZ al ai wn ob Dio alt 1 a SE SEH OPE OPT PD oO UO Gln m nu oio nm nui nhni dul A 0E OL c5405 c540 Sur FE 6c5429 ST U TO AVE 10uF A up 10V 390pF 50V 50V DAE n 16V 50 C5403 Tier E C5402 05430 T 100pr R5404 AGND_PLL T OUT1B_2 EEN A 3 90 pF SE E INAIAEW R5408 R5412 AVDD PLL OUTIB_1 E d 12 i THERMAL hg DVDD PLL 3 PGND1B 75425 49 9 22000pF LE 4 BST1B Se e DGND PLL 5 dE C 2 4 O 0 VDRI e OPT LA GND_1 VECS I IS e 6 NTP 7 5 O O d Eeer Se me 16V DGND 7 AGND e ll DVDD VDR2 8 IL 65427 ae 05428 Ll C5433 SDATA BST2A lur luF lu AUD_LRCH 25V 25V WCK PGND2A C5426 e e AUD LRCK e 22000pF EN BCK OUT2A 2 si AUD SCK e R5402 100 SDA OUTZA I I2C SDA1 DX e R5403 100 I2C SCLI T 3 3V_NORMAL Peg CCRN A 50V T sov Hi R o njowu AIAJ aI Giel Cl oi e MEUM oOlala alalalal IH d od od yg 24V_AMP E i e 10K UY DO ALO S AH ASAS EE 12 12 R5405 GC AH Pill moi Giel oi Ol ol O opr Y e gjall APH Om OF fl Oa 03 n0 e Iun e 100 25404 Li Ay D D gt gt gt 50 oe o yee B 05400 ide Ow
100. 2 10V 16V d L y S Y e f Place near USB JACK 2S ER SN o a t Vout 0 8 1 R1 R2 eam emm m GRP GP GR GP GP ME M MI MI M ME MI M M M ME M M MI TM MI MI M Mi MI M D D LO CORE or 2 Ww LGll52 for 1 0V UD Model only LG1132 DDR 792Mh a READY PSE SS 1 0VDC a 19501 Max 2000 mA A HE Sr gt 1 0V_VDD ees Jae Rm ES She SS I Zeie N a Max 2000 mA e gt C9502 10uF NON UD SS UD 16V 1 one CIC21J501NE ARE e 19502 IC OO D cl TPS54327DDAR EP GND POWER_ON OFF2_3 E ag a oie Je SJE xi 1 8 NON UD Model S r Sei VFB cS VBST 6 2 7 LGLLS3Z DDR 6 6 6 Min Z em f no o E EE E so gt 1C 06 um m AN LG1132 1 0V gt IC2306 Ad 3A F zie E R9505 V V aJAa Aa UD A 3 Model l UD wi J 2 AK LG LL DDR 792Mh Zz S tching freq 700K Vout O 765 1 R1 R2 Co 1 52 1 O0OV gt IC2501 LG1132 ML lo gt DEAD THE N SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X RADIATION FILRE AND ELECTRICAL SHOCK HAZARDS WHEN SERVICING IF IS SECRET K OM MUDEL DATE 2011 06 28 ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR BLOEK remse ron e IEEE THE CRITICAL COMPONENTS IN THE N SYMBOL MARK OF THE scHEMETIC LG Electronics SL HER Ee OHEE Copyright 2012 LG Electronics Inc All rights reserved LGE Internal Use Only Only for training and service purposes A 3 3V_NORMAL
101. 2AN B2 INTR_GB INTR_HDMI INTR_AFE3C AUD_ AUD_H AUD_H AUD_ AUD_ AUD_ AUD_ AUD_ AUD_ MROOARC ROAMUTE ROALRC MROABC MROASDA MROASD3 MROASD2 MROASD1 MROASDO AUD_DAC1_LRC AUD_DAC1_SC AUD_DAC1_LRC AUD_FS25CL AUD_FS24CL AUD_FS23CL AUD_FS21CL AUD_FS20CL AUDCLK_OUT_SU AUD_DACO_LRC AUD_DACO_LRC AUD_DACO_SC AUD_ADC_ AUD_ADC_ AUD_ADC_ AUD_MIC_ AUD_MIC_ AUD_MIC_ P_DATAO P_DATA1 P_DATA2 TP_DATA3 P_DATA4 IP DATAS TP DATA6 TP DATAT BB BB BB BB BB BB BB BB BB TP VAL BB TP SOP BB TP ERR BB TP CLK BB SDA I BB_SDA_O BB_SCL LIDA SCL L9DA SDA I LIDA SDA O HB DN HB UP START DATAO DATA1 DATA2 DATA3 DATA4 CLK_F54M CVBS GC2 CVBS_GC1 CVBS GCO CVBS UP CVBS DN FSOOCLK AUDCLK OUT DAC DATAO DAC DATA1 DAC DATA2 DAC DATA DAC DATA4 DAC START Oz AAD_GCO AAD_GC1 AAD_GC2 AAD_GC3 Le AAD_GC4 AAD_DATAEN AAD_DATAO AAD_DATA1 AAD_DATA2 AAD_DATA3 AAD_DATA4 AAD DATAS AAD DATA6 AAD DATAT AAD DATAS AAD DATA9 D_ D_ D_ D_ D_ D_ D_ D_ D_ D_ DCO_OUT_CLK SR_A SR_AP SR_B HSR_BP HSR_C HSR_CP HSR CLK HSR CLKP SR D SR DP SR E SR EP SR A SR AP SR B HSR BP HSR C HSR CP HSR CLK HSR CLKP HSR D HSR DP HSR E SR EP CO oO oO oO oO OO OO OO 0
102. 3 5v on Power B D Repair Replace When turn off light Replace Power B D or IR B D in room Replace Main B D Power B D don t have problem If R C operate Explain the customer cause is interference from light in room Replace R C 10 Copyright 2012 LG Electronics Inc All rights reserved LGE Internal Use Only Only for training and service purposes Standard Repair Process Ese D ee error aj E ate M4 operating M4 operating checking Revised date 0 11 15 2 M4 Magic Remocon operating error Checkthe oe N i Turn off on the INSTART menu 00 i y set and press the wheel Check amp Repair RF assy connection Press the back key about 5sec Replace M4 Down load the Firmware If you conduct the loop at 3times change the M4 INSTART MENU gt 15 RF Remocon Test gt 3 Firmware download 11 Copyright O 2012 LG Electronics Inc All rights reserved LGE Internal Use Only Only for training and service purposes Standard Repair Process sm PrFunetion error Tar eene LCD TV ate symptom Wifi operating checking 12 15 3 Wifi operating error ice i gt Check the Wifi wafer Replace i P4301 _1pin Main B D Check amp Repair Wifi cable connection Change the Wifi assy 12 Copyright O 2012 LG Electronics Inc All rights reserved LGE Internal Use Only Only for training and service purposes Standard Repair Process D Function error Bb ixi 2012
103. 4 AG25 FE_TS_DATA 5 AH24 FE_TS_DATA 6 AG24 FE_TS_DATA 7 iod rPI CLK 325 TP1_SOP 3323 E TP inva H25 SK TPI_ERR T3 TER SACRE TPI_DATA 0 7 J26 TPI_DATA 1 H28 TPI_DATA 2 H27 TPI_DATA 3 H26 TPI DATA 4 G28 TPI DATA 5 G27 TPI DATA 6 G26 TPI DATA 7 pea TPO CLK E23 TPO SOP Dos TPO_VAL D23 TPO ERR TE err TPO_DATA 0 7 G25 TPO_DATA 1 G24 TPO_DATA 2 F25 TPO DATA 3 F24 TPO DATA 4 F23 TPO DATA 5 E25 TPO DATA 6 E24 TPO DATA 7 e 194 Wy gt AUD MASTER CLK PE DY AUD LRCH ios aera gt FRC3 FLASH WP Se FREE gt AUD SCK O AUD LRCK gt OPTIC BACK CHANNEL gt OPTIC_GPIO1 BEE R630 ee gt SPDIF OUT C630 AD25 R598 QBT 47 82pF AC25 R619 QBT 47 T AD24 R628 QBT 22 Bee Bord ad gt AMP RESET N t3 3V NORMAL AB18 22 pp B596 AB19 22 AA R591 DTS_EN ENABLE 1 for development BTSC EN ENABLE 1 for development N gt SOC TXAO a C gt SOC_TXAOP ES gt SOC TXA1 P SOC_TXA1P SOC TXA2 SOC TXA2P gt SOC_TXACLKN RA C gt SOC TXACLKP gt SOC TXA3 E SOC_TXA3P gt SOC_TXA4 v3 gt SOC_TXA4P M SOC_TXBO 22 SOC TXBOP x C gt SOC_TXB1 us gt SOC_TXB1P vs SOC_TXB2 yA gt SOC TXB2P cl gt SOC TXBCLKN we gt SOC_TXBCLKP gt SOC TXB3 z gt SOC_TXB3P 3 gt SOC TXB4 BS gt SOC TXBAP E QEL RA 10K e DA DIM EDGE LED NTE gt PWM_DIM2 C_D PWM_DIM H3 BPL IN D ES u
104. 4 25 R16 Edd L323 L309 GND G L BLM18PG121SN1D Sch 3 R17 BLM18PG121SN1D TN es __e o ROMTOPGIATSNID J6 R18 A Z a E OS d G G 5 3 Ea qd fy 3 J7 T13 fy a ES S 3 i G G 3 o o u13 S e s A e G ey m mudama Lee e P a m o o 2 0 so o eo o m a o o oO Ee O o e 9 D n P k D LIBUS EL On Package Decap O 1luF lea S GE SE 0 M Sa For HeatSinK AL Block SMD Top E Su Bottom N A D For Tuner Sensitivity Under DDR SMDSTOR POR ESD M315 M318 M308 GASKET 8 0X6 0X7 5H ESD gt M321 ALBLOCK KR RSh MT ues MDS62110217 Fotos al ae MDS62110213 MALA Mead DS62110206 OPT EE F MDS62110205 MDS62110205 M301 MSO HEATSIHE ESD ESD i ALBLOCK OS E M322 GASKET_8 0X6 0X7 5H M320 MDS62110213 M313 DS62110205 MDS62110205 ESD M302 MDS62110213 M306 MDS62110213 M307 ALBLOCK M314 MDS62110205 ESD Y I M303 ATSC MDS62110213 MDS62110213 M310 MDS62110205 M311 MDS62110205 For Tuner Sensitivity Under TUNER OPT ESD For ATSC IHE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X RADIATION FILRE AND ELECTRICAL SHOCK HAZARDS WHEN SERVICING IF 15 ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE NN SYMBOL MARK OF THE SCHEMETIC 11 L Copyright O 2012 LG E
105. 4 D505 e 3 41 R5Z3 AAA 23 I2C SCL S ROBA 1N4148W 1N4148W eege C509 AGND 4 AO 10K iur gt e e e e e HVDD 25V 7 e AVIN 5 IC501 RST R521 3 TCON_RST 100v 100V 0 8 4V 0 1uF 1501 50V PVINB3 6 MAX17139 NC_3 R541 C552 C553 A cy POE B Q501 C546 wh C548 0 a R545 BST3 7 CTRLN 0 22uF Li0uF 10uF 3 6K R508 3 1A e 2503052 T70 22uF 50V 1 10w e e EE dl SWB3 g NC 2 AVGH_S 50V 25V 25V o OUT3 VGL 27V dos 0 9 VGL_FB E 0 JD vcn FB e REO C504 C505 R515 0 PGND3 1 VGH 2 7K 10uF 10uF deke bas Ee VCC LCM C R 25V 25V 0 01uF e Seat r VE 0 22 P 2K 3 3V S 22u 50V 1 8W e VCC_LCM R532 680 50V 1 ol al alan nj Goal Oli aja a zt Asis 3 3 3V OPT OPT pa nj un oj z zuo z E A e R543 Q OJ Oo o CES OPT C524 R525 m C551 0 1uF 10K a 0 luF sov T7 nm 50V OPT e ee e e m R526 RITE U 10K VDD_LCM C522 OBT 16 8V FI 50v z D pu C525 E EA 2200pF R535 50V e PANEL VCC 0 o 12V C531 C533 C535 ipe 10uF 10uF 10uF 9 1K 25V 25V 25V Sie R503 0 0 L500 D502 22uH SMAB34 e Fr e e 40V c501 C502 Gem C521 C523 10uF 10uF dur 10uF 10uF 25V 25V Sau 25V 25V R513 C513 e A e 2 2 1000pF a C507 O 47uF 50V VDD_LCM VGH_S 16 8V LL 5508 27V A 0 47uF 0500 A D500 D501 MMBT3906 NXP R510 1N4148W 1N4148W 10 e s R519 e e e e 1100
106. 47K R4602 gt SC CVBS IN 390 B EU C4607 e 47uF al D4609 D4609 1 DER SN 5 5V 9 2 5 5V L 5 5V H MES Le TT SCART ESD_MTK_SCART Gain 1 R Rg RU DTV MNT_V_OUT pes R4607 AV_DET E 75 R4600 H 15K COM GND J D4610 R EU EU 5 5V F d B C4605 SYNC IN OPT T 5 5V 100uF E 9 15pF 16v R4608 0 YNC_OUT ESD_MTK_SCART og OPT YNC_GND RGB_IO LO sc FB DA1R018H91E JK4600 EU B OUT AUDIO L IN 666 B_GND AUDIO_GND AUDIO_L_OUT AUDIO_R_IN AUDIO_R_OUT 666 D4601 1 5 6V 200pF ESD_MTK_SCART D4601 2 5 5 6V 200pF ESD_LG1152_SCART e SC R 24602 D4602 1 T 5 5v T5 5V OPT 15pF ESD_MTK_SCART L sc c Jpa6o3 D4603 1 T5 5v T5 5v OPT d ESD_MTK_SCART e SC B D4604 D4604 1 Ts 5v 5 5V OPT ZER ESD_MTK_SCART Co s t OD SC L IN D4600 1 20V Zeg 10pF ESD_MTK_SCART D4600 2 20v E 10pF ESD_LG1152_SCART 605 2 6v D4605 D4605 1 pee IY IY ae IY 5 OPT 200pF 200pF ESD_LG1152_SCART ESD_MTK_SCART DIV MNT_L_OUT e gt SC_R_IN D4606 D4606 1 D4606 2 5 6v Ti 5 6V 5 6V OPT 200pF 200pF ESD_MTK_SCART ESD_LG1152_SCART BLM18PG121SN1D L4600 yy D4607 EU EU EU 5 6
107. 504 16 50V 50V 35v WOOFER MUTE WOOEER 2200058 T e e 100 25510 E 1000pF 50V 50v e e 4 Ss wem E mio PAS 4 0 esh LO ek i l Oo gt O emm emm emm emm emm emm emm emm emm D emm emm D emm emm D emm emm D emm emm emm emm emm emm emm emm A emm emm A emm emm emm emm emm emm emm emm emm emm emm emm emm emm emm c Ti THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X RADIATION FILRE AND ELECTRICAL SHOCK HAZARDS WHEN SERVICING IF 15 ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE NN SYMBOL MARK OF THE SCHEMETIC SECRET LGElectronics MODEL JDRIE BLOCK SHEET 7 LGE Internal Use Only LG ELECTRONICS I Copyright O 2012 LG Electronics Inc All rights reserved Only for training and service purposes 12V n EU AUD OUT gt gt EU CHINA HOTEL OPT C6000 m AZASSOMTR E1 9 EU C6004 DTV MNT L OUTX A Get E EU SCART AUDIO MUTE C6000 x 50v R6011 C6008 luF 33K R6004 SIGN600005 j 25V Il L 7 DTV MNT_R_OUT EU 33 C6003 BU lur DTV MNT L OUTK an R6008 33K 2 e Li C6005 EU EU 33pF 96000 B MMBT3904 NXP CD SCART AMP R FB R6013 510 SCART_MUTE e HD SCART_Lout SCART_Rout 3 5V_ST SCART_AMP_L_FB X 1 OPT R6012 4 7K
108. 6w 1 16W c3214 J ELLEN 53220 S R3241 632194 R3239 a 3213 R3233 ae R3234 r 5 1K 5 1K uF 5 1K Pilur 5 1K Ges luF ES 58 5 qe SECRET LGElectronics LG ELECTRONICS MODEL cra DATE BLOCK _ soms SHEET LGE Internal Use Only RGB PC AUDIO SPDIF JK3603 SLIM 15F D 2 1 RGB 5V RGB 5V 5V NORMAL RGB PC ei e AL d ka I MMBD6100 D3620 36 R3641 R3642 R3645 IC3600 i 10 M24C02 RMN6T 2 7K 2 7K e K l S I U a 4 JK3602 3 3V M e 2F11TC1 EM52 4F EDID_WP R3643 22 lt RGB_DDC_SCL S P D I R3644 22 E S S I RGB_DDC_SDA R3620 I 2 7K h R3615 OPT 33 la SPDIF_OUT D3613 C3615 GE 0 1uF D3613 1 ADUC 5S 02 OR5L 16v 9 5 5V OPT DSUB_VSYNC I aaa hos 5d 02 orb ADUC 5S 02 S 30v Y pe RPL ESD_MTK ORT OPT E Zeg e P DSUB_HSYNC 03622 Sones D3616 Bae E R5L 30v OPT LL OPT I RGB_DEBUG R3602 c3 100 DSUB_B gt soc nx RGB DEBUG I ae PC AUDIO 100 SOC_TX R3600 D3600 JK3601 T 83501 PI KJA PH 0 0177 NON_RGB_DEBUG OPT 0 20V NON_RGB_DEBUG OPT 3 3 l e
109. 8 c8 AVDD33 TX 3 G R9 c9 AVDD33 TX 4 G R10 C10 AVDD33_TX_5 G R11 C13 AVDD33 TX 6 G R12 C14 AVDD33 TX 7 G R13 C15 AVDD33 TX 8 G 1 0VDD C16 G A G7 C17 0 1 G G12 D4 0_2 G H7 D5 0_3 G H12 D6 0_4 G J7 D7 0_5 G J12 D8 0_6 G K7 D9 0_7 G K12 D10 0_8 G L7 D11 0_9 G L12 D12 0_10 G M7 D13 0 11 G M8 D14 0 12 G M9 D15 0 13 G M10 E4 0 14 G M11 ES 0_15 G M12 E6 0 16 G 3 3AVDD_PLL E7 G A B18 E8 AVDD33 PLL G 1 OVDD_PLL E9 G A A17 E10 VDD10_PLL G 3 3AVDD_VX1 Ell G A 1 E12 AVDD33_VX1_1 G 2 E13 AVDD33_VX1_2 G 1 0YDD VX1_ SI G G8 E15 AVDD10 VX1 1 G G9 F4 AVDD10_VX1_2 G G10 F5 AVDD10_VX1_3 G G11 F14 AVDD10_VX1_4 G F15 G L9 G4 GND 1 G L10 G5 GND_2 G L11 G14 GND 3 G L14 G15 GND_4 G L15 H4 GND_5 G L16 H5 GND 6 G M4 H8 GND_7 G M5 H9 GND 8 G 4 H10 GND 9 G 5 H11 GND_10 GND_100 6 H14 GND_11 GND_101 N4 H15 GND_12 GND_102 N5 J4 GND_13 GND_103 4 J5 GND_14 GND_104 5 J8 GND_15 GND_105 P2 J9 END 16 GND 106 P3 J10 END 17 GND_107 P4 SE GND_18 GND_108 P5 J14 END 19 GND_109 P6 J15 END 20 GND_110 P7 K4 GND_21 GND_111 P8 K5 G GND_112 P9 K8 G GND_113 P10 K9 G GND_114 P11 K10 G GND_115 P12 K11 G GND_116 P13 K14 G GND_ 7 P14 K15 G GND 118 P15 L4 G GND_119 P16 L5 G GND 120 P17 L8 G GND 121 P18 G R3 G RA G R5 G R14 G R15 G R16 G Ero re a ee T ANT QM A M T Con EEPROM Debug P400 12507WR 03L TCON_SDA
110. A TO e On Package 1 8V NORMAL A C395 10uF I 0 1uF C410 0 1uF C411 L314 BLM18PG121SN Decap 0 1uF lea Max 31mA VDD18_MAIN_XTAL A D 0 1uF C378 10uF II C384 Max 3 3V NORMAL A 0 1uF 0 1uF U C389 C304 48 8mA VDD33 USB L317 BLM18PG121SN1D A LED e e ti 5 Lal 0 C396 10uF II LI C402 luF 0 C406 VREF M2 VREF MI ojajajaja jajajajaj ji NIN Prlojololslajsjelprlolojolslaleluljn NIN L4 F13 VREF MO e A G12 F14 AVDD10_OSPREY A 0 9V_VDD A G15 L20 M20 21 2 28 20 21 P20 P21 R20 R21 0 9V_VDD A GIS KAES mm ojejojrlololojlrlololjolr D D K aje MAIN_XTAL K AF1 A F28 H22 VDD18 AA19 For secure BOOT OTP Will be change to LOW for MP G23 G7 H7 Hz H15 ajaja ojoj aja ajajajajajajajaja o NIN Nizxfojojfo ofja ajes w n e A 52 LG1152D IC100 D B1 VDD33_1 VDD33_2 VDD33_3 VDD33_4 VDD33_5 VDD33_6 AVDD33_USB_1 AVDD33_USB_2 AVDD33_BT_USB_ AVDD33_BT_USB_ Oo OD 5 WN k PS LTX_2 LTX 3 LTX 4 _LVRX_1 _LVRX_2 _LVRX_3 _DISPPLL DR3PLL o 00000 00 00 00 wooo OO OO OO CO LI I l OI o U amp Q M P DO Oo A om NS Nr le El li 1 d 00 0
111. A uU K North Latin America http aic lgservice com Y Europe Africa http eic lgservice com Asia Oceania http biz lgservice com Life s Good LED LCD TV CHASSIS LD23E MODEL 72LM950V W 72LM950V W ZA CAUTION BEFORE SERVICING THE CHASSIS READ THE SAFETY PRECAUTIONS IN THIS MANUAL P NO MFL67361005 1204 REVOO Printed in Korea CONTENTS ONE IN I Da cocaina 2 BARELY PRECAUTIONS veer 3 SERVICING EELER na KR ea iia 4 SPECIFICATION mu 6 ADJUSTMENT INSTRUC TION ia vr eeben 14 EXPLODED VIEW sonado pp anes 23 SCHEMATIC CIRCUIT DIAGRAM eene Copyright O 2012 LG Electronics Inc All rights reserved ae LGE Internal Use Only Only for training and service purposes SAFETY PRECAUTIONS IMPORTANT SAFETY NOTICE Many electrical and mechanical parts in this chassis have special safety related characteristics These parts are identified by A in the Schematic Diagram and Exploded View It is essential that these special safety parts should be replaced with the same components as recommended in this manual to prevent Shock Fire or other Hazards Do not modify the original design without permission of manufactu General Guidance An isolation Transformer should always be used during the servicing of a receiver whose chassis is not isolated from the AC power line Use a transformer of adequate power rating as this protects the technician from ac
112. ALISJ P23 AC16 DDRO VDDQ 6 DDRI VDDQ 6 Ss R23 AC17 DDRO_VDDQ_7 DDR1_VDDQ_7 T23 AC18 DDRO_VDDQ_8 DDR1_VDDO_8 U23 AC19 DDRO VDDQ 9 DDR1 VDDQ 9 v23 AC20 DDRO VDDQ 10 DDR1 VDDQ 10 ER AC21 4 po d oe DDRO_VDDO_11 DDR1_VDDO_11 w SS SS oe Z V rm em rm rm rm rm rs rs 4 DDR3 1 5V 0 75V Decap Y23 AC22 Place these caps near IC100 DDRO VDDQ 12 DDRI VbDQ IZ DDR3 1 5V 0 75V Decap Place these caps near IC100 1 5VQ0 0 75V_VREFO_DO 0 75V_VREFO_D1 0 75V_VREF1_DO 0 75V_VREF1_D1 1 5v01 E DDR3 1 5V Decaps Place these caps near Memory E A A DDR3 1 5V beCaps Place these caps near Memory e e e e e e e e C209 C210 C235 C236 LL 0 1ur T 0 1ur T D Lutte 0 1uF T C206 C201 C202 C203 C204 C237 C238 C241 C242 C244 0 1uF 0 1uF 0 1uF 0 1uF 0 1uF 0 1urj0 1urFj0 1url0 1urj0 1u e e e e a SS a a 2 wm wm emm emm em e e e e tl 5VQO 40 75V VREFO MO t1 5VQO t0 75V VREFO M1 1 5V t1 5VQO 1 5VQ1 0 75V_VREF1_M0 1 5VQ1 0 75V_VREF1_M1 1 5V 1 5VQ1 A A A A A A A A A A A A R203 R207 R212 R217 1K 1K 1K 1K 15 13 15 1 L200 L201 MLB 201209 0120P N2 MLB 201209 0120P N2 e e e e e VYN kl e e e 9 e AVV 9 geg SE c219 C222 c231 C234 Tk C212 C273 T C216 C218 4 ur 4 Type R213 224 C225 R218 228 C230 2up 4 Tupe 1 0 1uF
113. AO M2_DDR_A1 M2_DDR_A2 M2_DDR_A3 M2_DDR_A4 M2_DDR_AS M2_DDR_A6 M2_DDR_A7 M2_DDR_A8 M2_DDR_A9 M2_DDR_A10 M2_DDR_A11 M2_DDR_A12 M2_DDR_A13 M2 DDR BAO M2 DDR BAL M2 DDR BA2 M2 DDR CLK M2 DDR CLKN M2 DDR CKE M2 DDR ODT M2 DDR RASN M2 DDR CASN M2 DDR WEN M2 DDR RESET H M2 DDR DOSU P M2 DDR DOSU H M2 DDR DOSL P M2 DDR DOSL H M2 DDR DML M2 DDR DMU M2 DDR Don M2 DDR DOl M2 DDR DQ2 M2_DDR_DQ3 M2_DDR_DQ4 M2 DDR DQ5 M2 DDR DQ6 M2 DDR DQ7 M2 DDR Do M2 DDR DQ9 M2 DDR DQ10 _DDR_DQ11 M2 DDR DQ12 M2 DDR DQ13 M2 DDR DQ14 M2 DDR DQ15 M2 DDR ZQCAL Copyright O 2012 LG Electronics Inc All rights reserved Only for training and service purposes MO DDR A0 MO DDR Al MO_DDR_A2 MO_DDR_A3 MO_DDR_A4 M0 DDR A5 MO DDR A6 MO DDR A7 MO DDR A8 MO DDR A9 MO DDR A10 MO DDR All MO_DDR_A12 MO_DDR_A13 MO_DDR_A14 MO_DDR_BAO MO_DDR_BA1L MO_DDR_BA2 MO_DDR_CLK MO_DDR_CLKN MO_DDR_CKE MO_DDR_ODT MO_DDR_RASN MO_DDR_CASN MO_DDR_WEN MO_DDR_RESET_N MO_DDR_DOSL_P MO_DDR_DOSL_N MO_DDR_DML MO DDR Don MO_DDR_DO1 M0 DDR DQ6 MO DDR DQ7 M0 DDR DQ4 M0 DDR DQ3 MO DDR DQ2 MO DDR DQ5 M1 DDR AO M1 DDR A1 M1 DDR A2 MI DDR A3 MI DDR A4 MI DDR A5 M1 DDR A6 M1 DDR A7 MI DDR A8 MI DDR A9 MI DDR A10 MI DDR A11 MI DDR A12 MI DDR A13 MI DDR A14 MI DDR BAO M1 DDR BAl MI DDR BA2
114. ART with the gt e remote controller for adjustment de e Si cin auiem A7 Copyright 2012 LG Electronics Inc All rights reserved LGE Internal Use Only Only for training and service purposes Standard Repair Process Detail Technical Manual id i i Establishec symptom A Video error Video error video lag stop TUNER checking part bom DEN ALL MODELS ECO E dddddlldddlddde ni ys v s we i i i i tm du t ai Cm ot 1 D i rte v ID MEJE TW C Zur EX84503901 3 6 y 11 11 02 Y M Y EE SAMPLE Hr POE A t p co SH Cur ig e a ti Ta i LS WI D 2 un MILE y AET x 5 a Ji ud Ta E DCN t i E ure ET 1 i i ei tj y he e e t L Checking method 1 Check the signal strength or check whether the screen is normal when the external device is connected 2 After measuring each voltage from power supply finally replace the MAIN BOARD A8 LGE Internal Use Only Copyright O 2012 LG Electronics Inc All rights reserved Only for training and service purposes Standard Repair Process Detail Technical Manual Error A Video error Vertical Horizontal bar aru TN LCD TV symptom residual image lio date lt ALL MODELS gt ETA T MN er BAR CODE iy As the part connecting to the externa the screen condition by signal input check A9 Copyright O 2012 LG Electronics Inc All ri
115. D D D BLM18PG121SN1D REA e e e E 3 wt SEN ET S E 38 255 ai E E Bl Seal e e H o o 3 i k o E o Se o E o Na o eu d o SE o o pity os i om OY o e co q d o Oli o m oo o co Sag e des E o Ee o ps D D e Se x U a o e e o s n M Wi O o oO 9 LU me 3 On Package Decap 0 1uF TG LG1152AN B2 t1 8V NORMAL VDD33 VDD18 A A L326 A Sh ae BLM18PG121SN1D VDD33_CVBS VDD33 1 G e TED ar A P2 J9 E e pia VDD33_2 G SS i 3 i o VDD33 A AE e Ta AVDD33_CVBS_1 G Em 2 a e DPE AVDD33_CVBS_2 G SES N A F18 TH me SN m e AVDD33 HDMI 1 G q O D H16 J13 S EN AVDD33 HDMI 2 G M16 J14 VDD33_XTAL G e VDD25_VSB J15 VDD25_CVBS A L15 4 ie A VDD25_VSB G 9 13 5 VDD25_CVBS_2 G R12 6 VDD25_REF VDD25_CVBS_1 G VDD25_CVBS_3 G P10 8 AVDD25 REF G VDD25 COMP R10 9 A VDD25_COMP_3 G P9 10 e Rg VPD25_comP_1 G a Max 28mA VDD25 COMP 2 G Max 100mA Max 250mA VDD25 VSB v1 12 2 5V_NORMAL VDD25 LVTX t2 5V NORMAL A VDD25 AUD VDD25 COMP 4 G 2 5V NORMAL VDD25 CVBS E A A J16 13 pg VPP25 AAD G m e L313 L325 sa PEZ SUD S LA 1324 BLM18PG121SN1D BLM18PG121SN1D VDD25_LVTX VDD25_AUD_2 G BLM18PG121SN1D AY e e ess e e A V6 L5 AO e e e Eu Fu fy VDD25_AUD_3 G Fu Fu fu 5 3 la B18 L6 a 5 3 5 ci bal 3 ES VDD25_LVTX_1 G a G12 i 1 7 E z o 2 VDD18_A VDD25_LVTX_2 G o o A G13 L8 s nim as xim os pum VDD25_LVTX_3 G _ _ m e x B L9 EX r
116. D to 3D Side by Side half Top amp Bottom Checkerboard 2D to 3D Side by Side half Top Bottom Checkerboard 2D to 3D Side by Side half Top amp Bottom HDTV 1080P Checkerboard Single Frame Sequential Row Interleaving Column Interleaving 2D to 3D Side by Side half Top amp Bottom HDTV 1080P Checkerboard Single Frame Sequential Row Interleaving Column Interleaving HDTV 720P 1920 1080 33 75 60 00 1920 1080 28 125 50 00 1920 1080 27 00 24 00 5 HDTV 1080P HDTV 1080P 1920 1080 33 75 30 00 1920 1080 56 25 1920 1080 67 50 60 00 Copyright 2012 LG Electronics Inc All rights reserved T LGE Internal Use Only Only for training and service purposes pa 00 3 2 HDMI 1 4b 3D supported mode aes Resolution H freq kHz V frea Hz Pixel clock MHz VIC 3D input proposed mode Proposed pom eem pe E Sur o exem nn oso e t 31 469 31 5 59 94 60 50 35150 4 1 Side by side Full SDTV 480P Top and Bottom Secondary SDTV 480P es chides peer E Side by side half Secondary SDTV 480P 720 480 Frame packing Secondary SDTV 480P 62 938 63 59 94 60 54 54 06 EISE Ee SDTV 480P 31 469 31 5 59 94 60 54 54 06 Side by side Full SDTV 480P Top and Bottom Secondary SDTV 576P She Uje Side by side half Secondary SDTV 576P 720 576 62 5 17 18 Frame packing Secondary SDTV 576P Line alternative SDTV 576P 31 25 17 18 Side by side Full SDTV 576P
117. DR DQ7 M1 DDR Do M1 DDR DQ9 MI DDR DQ10 vi DDR DQl11 vi DDR DQ12 vi DDR DQ13 vi DDR DQ14 vi DDR DQ15 THE N SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES D18 Er OO M0 DDR A0 OO M0 DDR A1 E18 gt M0 DDR A2 E20 m M0 DDR A3 E M0 DDR A4 D20 t M0 DDR A5 T M0 DDR A6 F M0 DDR an E15 LO M0 DDR A8 D19 EP M0 DDR A9 m M0 DDR A10 E14 Dis Cup DDR A11 Se gt MO_DDR_A12 M0 DDR A13 pie LD MO_DDR_A14 F20 Ser gt M0 DDR BAO 15 gt M0 DDR BA1 F LO MO_DDR_BA2 A17 e AAN MO_DDR_CLK A Se R101 MO_DDR_CLKN gt MO_DDR_CKE F21 25 gt M0 DDR ODT D EZ LO M0 DDR RASN SC O M0 DDR CASN E gt M0 DDR WEN E19 L M0 DDR RESET N B20 MO_DDR_DQSL_P A20 MO_DDR_DOSL_N B16 MO_DDR_DQSU_P c16 MO_DDR_DOSU_N C19 E gt M0 DDR DML gt M0 DDR Dun c20 MO DDR DQO B19 M0 DDR DQl c21 M0 DDR DQ2 B18 MO_DDR_DQ3 A21 M0 DDR DQ4 C18 MO DDR DQ5 B21 M0 DDR DQ6 A19 M0 DDR DQ7 B17 M0 DDR DQ8 C14 MO DDR DQ9 A16 MO DDR DQ10 B14 MO_DDR_DQ11 B15 MO_DDR_DQ12 A14 MO DDR DQ13 C17 MO DDR DQ14 A15 MO DDR DQ15 E22 srGN50005 240 R704 13 E c9 uS CO M1 DDR AO DMI DDR Al F10 gt Ml DDR A2 F12 5 gt M1_DDR_A3 F cm LO M1 DDR A4 Se gt M1_DDR_A5 gt M1_DDR_A6 Ell Cut DDR A7 CO M1 DDR A8 D10 ET Ml DDR A9 MI DDR A10 c 58 CO M1 DDR A11 E Ml DDR A12 SC Ml DDR A13 Ml DDR A14 E12 SS gt
118. DRO DATAJO 15 LGE Internal Use Only Interconnection 1 PCBs Main PCB LED driver WIFI ASSY RF MOTION ASSY IR Key PCB FRC ASSY PSU Copyright O 2012 LG Electronics Inc All rights reserved LGE Internal Use Only Only for training and service purposes Interconnection sub PCB XXLM960V Series A EN JI e ii Speaker cover Assy a IR Key PCB O RF MOTION ASSY SPK unit WIFI ASSY Local Key PCB IRPCB RF MOTION ASSY WIFI ASSY 1 AEN To Main Copyright O 2012 LG Electronics Inc All rights reserved LGE Internal Use Only Only for training and service purposes Contents of LCD TV Standard Repair Process No Error symptom Mid category Remarks No video Normal audio No video No audio A Video oror Picture broken Freezing Color error Vertical Horizontal bar residual image light spot external device color error B Power error Off when on off while viewing power 7 auto on off No audio Normal video e Wrecked audio discontinuation noise Remote control 4 Local switch checking M4 operating checking Wifi operating checking External device recognition error Circuit noise mechanical noise F Exterior error Exterior defect First of all Check whether there is SVC Bulletin in GCSC System for these model Copyright O 2012 LG Electronics Inc All rights reserved LGE Internal Use Only Only for training and service purposes C Audio error D Function error
119. E Internal Use Only 2 types of LED ALEF li Benefit More Clear More Real S sesesg sescnses sescesss esesese Seeesses csse eseesessass conce 9559229 DI Szeen a E ee eret Sa854444 Seseeees s ssss o REES coser ALEF Type Local Dimming DBEF Prism sheets Diffuser plate BLU Light Blocking Pattern structure Guiding Layer Reflecting coating w patterns PCB LED Array is on the bech of Module Geen PA A A ae ng AE oe E m I NEM LED A PR D P CRW NI P EI Copyright O 2012 LG Electronics Inc All rights reserved Only for training and service purposes Feature Best picture quality thin TV Slimmer depth better picture quality ALEF LED Local dimming depicts more Dimming deep black Model XXLM960V 47inch H 6 V 4 24Block 55inch H 6 V 4 24Block LGE Internal Use Only Main PCB for Broadband XXLM960V ZB Local Dim Woofer Spk XXLM860V ZB zx M umm wv Em 725 LU T SP ics E E i fal tms E d P H zs ri nif J TEE m C 14 ue i a M i A 3 e Cu wi 53 E e Ti A EY Ek PE 52 1 ME Es a xa p 8 LE fg SE si a 4 seca EH AA N j SS is m L i24 m um a d d s Gd adsis GR dan edd E S 24 m a NM n ZUR t n gt a 115 E tu Fan pEWWEWEsWa x aH E 1 PETI ei E DH B r de NN GZ KR RS orem imal mm SI E mi tl T EE weg i j t MAA 1 e i
120. E2 GPIO 16 icd G1 P2 4 7uF TMODE3 TMODE3 GPIO 17 I2C_SDA1 GPIO 18 i a I2C SCcL1 gt H1 N3 e eer aT TRST_N TRST_N GPIO Ge R9319 33 H3 N2 x TDO C TDO lt H2 TDO GPIO N TDI TDI GPIO TDI J3 M3 NN TCK TCK GPIO E TMS Me ma TMS TMS GPIO M Ge 4 mr F3 Monitoring Pins for 3D DEPTH RESET PORES N GPIO i9 3D Depth Interanl status O AB21 EEES L3 XTAL OUT lt n GPIO AA XTAL IN gt GPIO K2 GPIO K3 GPIO a GPIO aia a zm zm mm ze 3 3V_IO Decaps O TXAOP O TXCOP 2 5V LVDS_RX Decaps gt TXAO gt TXCO 3 3V_I0 O 2 5V_LVDS_RX 2 5V_LVDS_RX gt TXA1P TXC1P UA gt TXA1 gt TXC1 A L9303 gt TXA2P E TXC2P BLMI8SGI2ITNID gt TXA2 TXC2 e E e e ned MR e200 Q eae CSLI 2212 C9315 C9318 C9321 ime io C9330 gt TXACLKN gt TXCCLKN o0 1uF 0 1uF 0 1uF 10uF 10ur a en 16V 16V 16V 10V Lov 7UF ee 4 7UF ea 0 LUF 0 1uF 0 1uF luE gt TXA3P TXC3P SET SET OUT 10V 10V 16V 16V 16V 16V gt TXA3 gt TXC3 SE OPI gt TXA4P gt TXC4P e gt TXAS gt TXCA gt TXBOP gt TXDOP i gt TXBO gt TXDO 3 3V Power Separation TXB1P rxpiP 2 5V LVDS TX Decaps gt TXB1 gt TXD1 gt TXB2P gt TXD2P 3 SV NORMAL RE 2 5v 161132 2 5V_LVDS_Tx 2 5V_LVDS_TX gt TXB2 gt TXD2 A L9300 T I 1 gt TXBCLK
121. EW It is essential that these special safety parts should be replaced with the same components as recommended in this manual to prevent X RADIATION Shock Fire or other Hazards Do not modify the original design without permission of manufacturer CC AG2 AG hd u Set Stand Stand body Base E Copyright O 2012 LG Electronics Inc All rights reserved 23 LGE Internal Use Only Only for training and service purposes System Configuration
122. F BY REMOTE KEY 15 POWER OFF BY REMOTE KEY 16 POWER OFF BY REMOTE KEY 17 POWE 4 18 POVVER OFF BY EU 20 POWER 21 POWER OFF BY REMOTE KEY 22 POWER OFF BY REMOTE KEY 23 POWER OFF BY UNKNOWN D Les m zi m z e m a z Sa AR Ss cc KE Li eoo Entry method 1 Press the IN START button of the remote controller for adjustment 2 Check the entry into adjustment item 3 A22 LGE Internal Use Only Standard Repair Process Detail Technical Manual Error Establishec 2011 1244 C Audio error No audio Normal video Content Checking method in menu when there is no audio bs EE ALL MODELS Sound Optimizer Normal lear Voice ll Off 42 Sy Off Balance ls nd Setting Auto TV Speaker Digital Sound Out Checking method 1 Press the Setting button on the remote controller 2 Select the Sound function of the Menu 3 Select the Sound Setting 4 Select TV Speaker from Off to On A24 Copyright O 2012 LG Electronics Inc All rights reserved Only for training and service purposes LGE Internal Use Only Standard Repair Process Detail Technical Manual LCD TV symptom C Audio error No audio Normal video when there is no audio date lt XXLM9600 gt eem pot pe en 24 Pin Power Board lt Main Board 3 244 141 24V X 5 GND l6 GND 7 GN ej GND 9 35v Mo 35V _ SAMPLE j BAR CODE i Checking order whe
123. GEN P AD23 ALT K2 A12 BC V DDRO_A 12 ALA A12 BC T3 K8 AE10 K8 A13 V DDRO_A 13 A13 N1 AD25 N1 y DDRO DATA 0 15 DDRO A 14 7 N9 E N9 V R1 AF15 DDR DATA O DDR1 DATA 0 15 R1 2 M R9 AO e AD20 R9 DDRO_BA 0 V DDRO_DQ 1 DDR DAIA I DDR1 BA 0 S T AD DDRO_BA 1 a DDRO_DO 2 m Hoh LA DDR1_BA 1 XT DDRO BA 2 DDRO_DQ 3 BPRI_DATALS DDR1_BA 2 Al AF14 ppR1 DATA 4 Al 37 A8 Gd AD21 37 A8 DDRO_CLK gt DDRO DO 5 DDR1 DATA 5 DDR1_CLK 00 13 Rega iecit 7 ci S AE14 DDR1 DATA 6 Bee VES TR Cl DDRO_CLKN 5 a DDRO DO 6 Se DDR1_CLK E 3 E E AE C DDRO CKE a DDRO_DO 7 DDR1 DATA 7 DDR1_CKE s D SS AE19 D 1 5V00 DDRO_DO 8 PDRI DATALS t1 5VQ1 L2 E9 SS AF16 DDR1 DATATO L2 E9 1 F1 pan eke S AF20 ii F1 DDRO_ODT gt 5 gt DDRO_DO 0 DDR DATA IO DDR1 ODT a 5 I H AD15 J H DDRO_RASN S S UE DDR1 DATA 11 DDR1_RASN gt S H AF H R200 DDRO_CASN DDRO_DO 2 E DDRI DATA 12 R221 DDR1_CASN S L AE L 150 DDRO_WEN L gt DDRO_DO 3 SK PATAL 3 199 DDR1 WEN J1 AD19 DDR1 DATA 14 J1 zi T2 J9 DEEM 1 AD16 T T2 J9 DDRO RESET NI DDRO DQ 5 DDR1_DATA 15 DDR1 RESET N IE L1 L9 J26 AF22 L9 DDRO_CLK DDRO_CK DDR1_CK CD DDR1_CLK F3 T7 J25 AE22 F3 T7 DDRO_DQS 0 m DDRO CLKN C 31 zg DDRO CK_N DR1 CK N j gt DDR1_CLKN DDR1_DQS 0 E P TE NOM AF DDRO_DQS_N 0 DDRO_DQS 0 35 PPRO DOSLOI 1_DOS 0 z DDR1_DQS 0 DDR1_DOS_N O P B AE DDRO DOS N 0 DDRO DOS MIO DOS NIOJ DDR1 DOS N 0 CT A9 N26 AF18 Ga A9 DDRO_DOS 1 DDRO_DQS 1 DDR
124. Hz R9300 R9302 R9304 R9306 R9308 R9310 R9329 100 100 100 100 100 100 IM AB17 A10 SOC TXAOP e S TXAOP e gt TXAOP AA B x9300 SOC_TXAON e TXAO gt TXAO 24 75MH Y16 CH X TAL 1 Zenn 2 SOC TXA1P e xe TXA1P SE gt TXA1P XTAL_IN e SE a SOC_TXA N e TXA1 gt TXA1 GND_1 4 X TAL 2 AA16 B9 A e XTAL_OUT SOC_TXA2P e TXA2P gt TXA2P 2 3 AB16 A9 SOC TXA2N e TXA2 gt TXA2 9339 AB15 A8 CI333 AE SOC_TXACLKP e ATE TXACLKP ae gt TXACLKP 30pF 30pF SOC TXACLKN TXACLK gt TXACLKN 50V 50V Y14 C7 SOC TXA3P e TXA3P gt TXA3P Y15 c8 SOC_TXA3N e TXA3 gt TXA3 AA14 B7 SOC TXA4P e TXA4P gt TXA4P AB14 AT t Sech t i tt a tt iuum a Leet amm S Ze a E t ee SOC TRAN R9301 R9303 R9305 R9307 R9309 RI3M D Ee mm EE t e 100 100 100 100 100 100 Aa AB13 A6 SOC TXBOP 6 TXBOP TXBOP ac AA13 B6 SPI I2C For Aardvak Interface SOC TXBON e TXBO gt TXBO 2 C5 SOC TXB1P e S TXB1P S gt TXB1P C SOC TXBIN e TXB1 gt TXB1 AA12 B5 3 3V_NORMAL SOC_TXB2P e 5 TXB2P gt TXB2P P9300 A AB A5 SOC TXB2N e XE TXB2 SS gt TXB2 12507WR 10L SOC_TXBCLKP e TXBCLKP gt TXBCLKP AA11 B4 SOC_TXBCLKN e TXBCLK gt TXBCLKN 0 c3 SOC TXB3P e S TXB3P 7 gt TXB3P c SOC_TXB3N e TXB3 gt TXB3 AA10 B3 SOC TXBAP e TXB4P gt TXB4P AB10 A3 SOC_TXB4N e TXB4 gt TXB4 SPI CS ABO A18 AA9 TXCOP sig RUE SPI DO se TXCO Se gt TXCO z l TXC1P gt TXC1
125. Inc All rights reserved Only for training and service purposes 43 5 V ST A L8900 LOGO_LIGHT VUE BLM18PG121SN1D o P8900 12507WR 03L 1 LOGO_LIGHT R8900 100 LOGO LIGHT LOGO LIGHT E B R8901 10K LOGO_LIGHT LOGO_LIGHT e n G Hj SECRET GElectronics 1K 08900 R8903 E LOGO LIGHT MMBT3904 NXP l LG ELECTRONICS LGE Internal Use Only IC9300
126. K D4106 1 ADUC 20S 02 010L 20V 10pF D MTK D4100 1 de 5x5 200pF ADMC 5M 02 200L ESD_MTK ESD_MTK ESD_ D4101 1 Fr 5 6V 200pF ADMC 5M 02 200L D4104 1 5 6v 200pF ADMC 5M 02 200L TK A ESD For ie 52 ESD_LG ESD_LG ESD_LG D4100 2 L 5 6V 200pF ADMC 5M 02 200L 152 D4101 2 5 6V 200pF ADMC 5M 02 200L 152 D4104 2 5 6v 200pF ADMC 5M 02 200L 152 MODEL DATE BLOCK 5HEET Y LGE Internal Use Only USB_DM1 USB_DP1 OY E USB_HUB_IC_IN_DP e ha CN Ab USB_HUB_IC_IN_DM LI Ej 00 3 0 AN eur Cot E SE e H EO pmo ON ro LO TH LO ST OFU gt een ES El m R4205 s IM Z oo O ul um ME 34200 ne Mq USB_DM2 TEM CON ST IY ii 24MHz e XY e S B 2 3 3V_NORMAL O ri USB DP A M ES a Q mM A A oO Zi e B H K E be Re H e I I D zZ 4 N I bw zi a O H H p M gt A vi A El H H EI et mM Re a ea ea Es vii 4 H a A D Q Wei Wei E E 4 em a El o 5 25m5 x xnmnmi nmi i C4203 T 4200 100 0 1uF T RST_HUB 6 t3
127. K L9_DVB ATSC NTSC T T 8 RF SWITCH CTL i c6501 C650 R6500 D RF S W CIL NG Svi SPL A i m T lu PACTO ON TUNER FE_TS_VAL 10v 16v 7 O ATV OUT I Ez Kat R6508 E Es 2 j D RI ET 100 L9_T2 C S e e e Be ma MTK L9_DVB ATSC NTSC TC Zeg D 2 R6525 R6509 0 TU 3 CL e e I2C acte BR TW CN TUNER BR TiL CN TUNER 5V T SU E a3 Lc 6508 1 entre B Caa cune MTS Ne Du TU_SDA SDA OP PF R6510 Tp 26516 QD WC cL rrr IM A a Oaa a ee et S OPT de C6506 DN T S DA 50V 50V 470 R6518 205 perallel 18 F Tea dV TU e 82 RODES R6521 because of derating M EREM 3 3V TUNI LS close to TUNER TUNER SIF 220 e e C6511 9 costa Gm N emm S 2 100pF 1uF e TU CVBS SIF SON Mi C6522 e e i MOD E cen e 1 BLM18PG121SN1D A AT H NIM UE T a B 06501 T C_H NIM T C S2 T2 C_F NIM 12 C S2 4 C6551 prm C6505 l1 8V TU R6519 E MMB SION 1 100pF 0 1uF 0 1uF i 7 1K e CVBS e L Iov Jev 6V T C amp AT amp CHB DVB S NOT T C amp AT DVB S T C amp AT amp CHB closes to Tunes 5 07 7 y 1 should be guarded by ground OPT ds T C amp AT amp CHB i e De e SE RESOR AN 199 lt F_AGC2 No via on both of them NOT_DVB_S DVB_S amp CHB T2 C DVB_S amp CHB DVB_S amp CHB NOT_DVB_S NOT_T C amp AT EM L9pATSC m should be guarded by groumd 3 Signal Width gt 12mils e RAC DE e IF P Signal to Signal Width 12mils bc L9 T2 C S NOT T C amp AT T2 C
128. KS E i m Local Key R lt pe VEH n Front Spk E E e Motion assy lt 2 i gd r up o Copyright O 2012 LG Electronics Inc All rights reserved Only for training and service purposes u Widddddldddddddhk pe 21 300 ET E em E ee phar N al fl Belg iT m i e a gr UE N T AE i E n Cina mil y Main TCON all in one Main processor Digital LG1152D DDR Memory Flash Memory Main processor analog LG1152A Micom for Key IR sensing Audio AMP 10W 10W HDMI switch 4 1 3D Depth Control IC DDR Memory LGE Internal Use Only FRC Board for Broadband XXLM960V ZB From Main Board UVOS Ak PRII EE EGNE E EE DER DORE a T H i Ce EE H EKOS ECI 1 RTT TE EN br Burg mG y geg iad Far SAMP P602 gini RIGHT mini EWES Tx HEI MES 3l ami L AA LLI L hini bi iii dk villi Laj Ed eTa i aaie P b pp To Pannel Left To Pannel Right Copyright O 2012 LG Electronics Inc All rights reserved Only for training and service purposes Main TCON all in one O FRC Processor LG1122 T Con IC LG5812 LGE Internal Use Only Block Diagram TSIn CHB DTV TS ace LOA LOD SIF 1 Ch gt DI sPipF our va Built in WiFi a 5Ch gt 4 CI Slot Line Out a SCART lt 12 S CHB DATA Op qu CVBS AE d nse 8Ch gt GE gt
129. LI I L BLM18PG121SN1D 1 e 318 e TO e AY L2314 1 NR8040T4R7N 4 A luF BLM18PG121SN1D Ss END SW2 SS 10V e H ess 4 5 aaa C2303 1 4 i 02371 02372 22uF OR o 1ur RIA PT oe 0 1UF oe 0 1UF KOY 50V Y c2321 deng Tow SW1 GND R2313 4 H C2336 C2342 e 0 5 9 1K 22pF e H lur 2200pF R2309 1 02219 18 50V 10v 50V 100K oom pF i T iL al fe 5 1 H y e 1 0VDC Switching freq 700K Vout 0 765 l R1 R2 A A y i A A ED AA AA A AA AA AA AA AA AA AA A AA AA A AA AA A AA A AA AA AA A A Gai PGNDI 8 7 EN R2310 10K Wee Xm Gu GCHEECP Oeo 4 TA Go SR SUUNTO TES O b A CR GA e Se TO 44e O IO quo Eh AR e IA CO E CMS O O A A A O Cp pr O OO CO ME CER GA CS UD Ue TEO e VIS PEO IIR O E pt RT A MO CO TO ss GL ON O O O ES O A Oeo Up ee O O wem C2305 casts POWER ON OFF2 3 em a an emm emm emm em aD emm an an an an an an an an an an an a a an an an an an an an an an em Po A A EE SEE SE OPT i L2316 1 3 soft start S 2uH e VW e mei em wen em i O e 293 mA C2368 1 C2369 j gt V7 22uF ZZ 22ur i 10v 10V 43 5V ST IC2300 EE IL a A a i ur es A AP7173 SPG 13 HF DIODES EE 1C2303 A AP7173 SPG 13 HF DIODES P Vout 0 765 1 R1 R2 L2301 43 3V NORMAL ER gt i BLM18PG121SN1D A IN i E OUT e P e e i IN EL te nn o o a Se x 1 R1 e e BT s St p ES 1 16W e Am D D D D D D D D P D D D D D
130. L_CTL_FRC 50V G DEN C564 TR Cu ON 16v a z 1 OPT a L UE m A E GPM ON CE VDD abes e e o 50V al E A ZS e BR PANEL_CTL_FRC l PANEL CTL FRC VDD_LCM S A VDD_LCM S a C500 GR S GMA1 16 8V gt GMAS 56pF rod A A R552 KAN VCOMOUT 50V HT R540 R553 a PANEL_CTL PANEL AGE FRC B Done LOK NAN KE e MMBT3904 NXP e RS2 AAAD e e R54 e See R556 PANEL_CTL_FRC E 10K E R5 AA ALO RS4AAA1LO eg C555 E C543 C544 C545 Fi TH N SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X RADIATION FILRE AND ELECTRICAL SHOCK HAZARDS WHEN SERVICING IF IS SECRET ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE NN SYMBOL MARK OF THE SCHEMETIC LGElectronics ti MODEL DATE LG ELECTRONICS BLUE SHEET OOO Copyright 2012 LG Electronics Inc All rights reserved LGE Internal Use Only Only for training and service purposes Ti 8 OP mini LVDS output water VDD_LCM 16V A o LE HS LVDS input water Less lol pele 50V D Ia 25V e
131. M1_DDR_BAO 5 gt M1_DDR_BAL D C gt M1_DDR_BA2 A9 p SS S L M1 DDR CLK E R M1 DDR CLKN D M1 DDR CKE D13 m gt M1 DDR ODT c A LO M1_DDR_RASN 1 D gt Ml DDR CASN gt Ml DDR WEN F11 gt M1_DDR_RESET_N c12 M1_DDR_DOSL_P cil M1_DDR_DOSL_N A7 M1_DDR_DQSU_P B7 M1_DDR_DQSU_N All Ss gt M1_DDR_DML gt M1_DDR_DMU A12 MI DDR DQO B11 M1_DDR_DQ1 A13 MI DDR DQ2 c10 M1 DDR DQ3 B12 M1_DDR_DQ4 A10 M1 DDR DQ5 B13 M1_DDR_DQ6 B10 M1_DDR_DQ7 AB MI DDR DQ8 B4 MI DDR DQ9 c8 MI DDR DQ10 B5 Ml DDR DQ11 B6 MI DDR DQ12 A5 MI DDR DQ13 B8 M1_DDR_DQ14 A6 Ml DDR DQ15 VCC1 5V MAIN A R709 10K LO MO_DDR_RESET_N R705 200 gt M0 DDR CLK O M0 DDR CLEN R706 200 M0 DDR CLK MO DDR CKE VCC1 5V MAI A R710 10K gt M0 DDR CLKN N L M1 DDR RESET N R707 200 M1 DDR CLK gt M1_DDR_CLKN R708 200 gt M1_DDR_CLK M1_DDR_CKE gt M1_DDR_CLKN R741 10K ICIOO LG1152D B1 SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X RADIATION FILRE AND ELECTRICAL SHOCK HAZARDS WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE AN SYMBOL MARK OF THE SCHEMETIC M2_DDR_
132. MC_DATA 5 B4 C13 B4 C13 2i d S B4 C13 B4 3 EMMC DATA 6 z B5 C14 B5 C14 S S AR B C B PONE oe e ER 2 IDATS ER D1 B6 B6 D 1 16W 55 52 D e e D3 D3 J5 e e M6 D4 M6 D4 M6 D4 M6 e e M5 D12 M5 D12 S M5 D12 M5 D13 D14 D14 y D A6 E A6 E A6 E A6 A7 E2 A7 E2 A7 E2 A7 C5 E3 C5 E3 C5 E3 C5 ES E12 ES E12 E5 E12 E5 E8 E13 E8 E13 E8 E13 E8 SC E9 E14 E9 E14 EMMC_CLK e E9 E E9 E10 F E10 F EMMC CMD DAT6 E10 F E10 EMMC_RST e He zit He 10 2 10 x F F F G3 F3 G3 F3 S S E G F G G10 F12 G10 F12 G10 F12 G10 H5 F13 H5 F13 H5 F13 H5 J5 F14 J5 F14 C8107 E J5 F J5 K G K G OPT e lOpF K6 G K6 G 50V K7 G2 K7 G2 SS gt G G K10 G K10 612 3 K10 G12 K10 G P G P G e e AD P7 G13 P7 G P10 d G14 P10 G14 SS A Ss G G H H S SU H2 H2 f t H2 H K5 H3 K5 H3 e e K5 H3 K5 H c8100 U a E H12 H OPT e 0 1uF H SH H N SE An 16v C6 gt H14 C6 H14 L r c6 H14 c6 H EMMC_VCCO 3 3V EMMC gt J M J M4 J M4 J 72 T U T N N J N j Ei 33 S Si 73 P3 J3 P3 J3 P5 J12 P5 Jue U SC 0 P5 J12 P5 J A ee 3 d 3 v n3 n3 2 e E D gt d a Le8105 C8106 ET h E J13 gt Jj a a a a Si m a aw 0 LUF 2 2uF U J14 J s e i 16V 10v E6 E6 2 4 z m EMMC_RESET_BALL E6 K E6 o 5 ca H 2 F5 d 2 E r E F K F E 3 310 K3 T H e J K3 J Z K9 2 K9 H 2 E e e Z K9 K12 K9 A 3 Z 2 K13 U EMMC VDDI Ki 4 4 A c2 c2 a ur e 09 ep C2 L c2 D C8104 H L2 0 1uF rs L3 5 U 16v E7 L12 E7 L12 e
133. N j REL S OPT_N YE LRv5 B4 U9 DEVOR i RBF RBF gt LRV6 1 RB R412 Be Pattern selection of No Video input A4 LR IND OUT U10 i AGP EN OPT 7 LOW Rolling Pattern AGP_EN gt RLVO HIGH Black Pattern 3D_EN B3 3D EN V10 ruvo A3 T10 2 AGP_E 3D_LR 3D_LR_IN am gt RLVIP GE RU OO RLVI L orma P V R413 15K HIGH No input Se RLV2P es 1 gt RLV2 3 3D_EN 6 U12 2D 3D mode selection 8 T vi2 gt RLVCLKP LOW 2D mode T RLVCLKN HIGH 3D mode L17 7 T12 OO RLVAP L18 T13 4 3D_LR T gt RLV4 Left Right frame Indicator 7 7 V13 DO RLV5P LOW Left 8 U13 HIGH Right 317 UI gt RLV5 XxX TE T E gt RLV6P T RLV6 H17 mie T14 SHA0O T RRVOP Pz gt RRVOP VCC_LCM ds ato JTP 1127WEM pm RRVON Fs gt RRVO A TCON DCL y R414 3 y sch sevi O RRVIP TCON SDA R415 33 ees spas RRV1 P RRV1 12C 8CL 5 R416 3 sis 925 RRV2P E gt RRV2P 12C SDA 8 R41 i SDA S RRV2N CD RRV2 R400 ue RRVCLKP gt CD RRVCLKP TOR TGONZRS RST_N RRVCLK Wes gt RRVCLKN 7 RRV3P E gt RRVAP da PLI z EEP ADDR RRV3 SE gt RRV4 EEP_ADDR HIGH gt EEPROM Address OxA WP_EEPROM_TCON R418 33 WB seva Eege NUS RRV4 SC RRV5 de ek Loun spe RRVSP s RRV6P No USE NC at Rx side gt HPD_VX1 RRV5 gt RRV6 1 TX DBOCK A p LOCKN VX1 D2 00 ci ol K3 02 L3 03 M3 04 N3 05 N17 06 N18 07 M17 08 1 2 J1 J2 H1 H2 G1 G2 L2 I2C Slave Address 0x70 emm a
134. NEL_VCC A GND L7200 120 ohm GND e c7200 c7201 c7202 10uF 1000p f 0 l1uF 16V 50V 16V OPT OPT OPT VLCD 2 VLCD VLCD VLCD a Zz Jg QU e m D P P D P P A P D P P D P P D D P D P P D D D P P D P P D D D D D D P D D D P D D P D ED D D D Gn o mm a LG ELECTRONICS o gt L DIMO_SCLK o P L DIMO MOSI gt L DIMO VS I2C BE SDA1 eo O lt 2C_BE_SCL1 FRC3_RESET MODEL ic1352 ao DATE BLULK c SHEET LGE Internal Use Only p 7 LOCAL DIMMING To LED DRIVER 3 3V_NORMAL A P7600 12507WR 08L R7600 10K OPT AR7600 0 es 33 10K 1 16W Y SS 9 gt L DIMO SCLK w DY L DIMO MOSI w 2C SCL1 9 2C SDA1 a 77 z CD L DIMO_VS L R7607 4 7K THE N SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X RADIATION FILRE AND ELECTRICAL SHOCK HAZARDS WHEN SERVICING IF IS SECRET ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE NN SYMBOL MARK OF THE SCHEMETIC GElectronics
135. O TX2P s_5 VSS 139 VDD33 5 1 8V 1 8LVDS_RX 1 8LVDS_RX ABI c3 C113 0 1uF D7 K6 RXBCLKP e RXA2N TX2N E gt TX2N vss_140 VDD33_6 AALl B4 C114 0 1uF D8 K9 L6 RXB2N d RXACLKP TX3P a O TX3P ee vss_141 VDD33_7 L100 AA2 A4 C115 0 1uF D18 K18 Y6 MLB 201209 0120P N2 RXB2P e RXACLKN TX3N O TX3N X VSS 142 VDD33 8 Y3 AS C116 0 1uF D19 L9 AAG ain RXBIN RXA3P TX4P LO TX4P x vos 143 VDD33 9 1 8V RXBIP e En 3 T 25 eut EEE LO TX4N IS 218 n C126 C134 C149 C161 va BERN TKAN ee C118 0 1uF D21 USE SIGA M9 E20 t RXBON gt e em pxa4p TX5P CD Tx5P vss_145 VDD18 1 E TUE A LOE OL OE come Os LE Yi c5 C119 0 1uF D25 M18 F4 10v 10v 16v 16v RXBOP RITO R115 RIIS RIZT GER R1559 RXAAN TASH p C120 0 luF gt TX5N D26 Vici YDD18 2 Pg 100 100 100 100 100 100 SS TX6P O TX6P c vss_147 vpD18_3 e wi A6 c121 0 1uF E4 N18 H4 RXA4N CD 1 TS 13 1 13 13 X RXBOP TX6N E C TX6N E VSS 148 VDD18 4 y i S t W2 A7 c122 0 1uF ES P9 J4 RXA4P e RXBON TX7P O TX7P e VSS 149 VDD18 5 v3 B7 c123 0 1uF E6 P18 AAS RXA3N wa 8281P TX7N CD TX7N u A VSS 150 BS VDD18_6 1 8LVDS_RX RXA3P e RXBIN vss_151 v2 A23 E8 Ce R18 T4 n RXACLKN CD e vi 8x82 TXAOP E mm VSS_152 To LVRX_VDD18_1 f7 1 8VLVDS_TX Decaps RXACLKP e RXB2N TXAON pt VSS 153 LVRX VDD18 2 2 RXBCLKP TXA1P vss_154 LVRX_VDD18_3 S n 7 Se i S pas Eit zi ES 2 2 kee I KR 1 8LVDS_TX 1 8LVDS_TX I Cc gt RXBCLKN 1 BS E mm TXAIN 77 SS vss_155 Urs LVRX VDD18 4 1 8LVD
136. ORMAL A A 20E 9 1A0 HB H PCM WAIT C E 1A1 dox Sex PCM_IRQA gt e OS GND_8 D 1A2 Jet epe E e 1A3 JETIACDI KE e VCC 4 CI CI 5205 C906 2A0 0 Ju O ur 16v DEW AR921 CI 2A1 PCM INPACK GND 7 CI_TS_CLK CI_TS_VAL SE 2A2 CI_TS_SYNC 2A3 3A0 AR920 CI 3A1 CI TS DATA 7 L GND 6 CI TS DATA 6 CI TS DATA S L Xem 3A2 CI TS DATA 4 EDO 3A3 vcc 3 4A0 ARO19 CI 4A1 CI TS DATA 3 L GND 5 CI TS DATA 2 CI_TS_DATA 1 dor 4A2 gt CI_TS_DATA O LG ELECTRONICS 4A3 30E IC903 74LVC16244ADGG YO Lad C900 0 1uF Q H n Oo lt 33 CI AR915 EB DATA 0 7 EB ADDR 12 CI ADDR 12 X4 CI_ADDR 13 lt lt EB_ADDR 13 CI_ADDR 14 lt lt EB_ADDR 14 PCM REG E CAM_REG_N CI AR914 PCM OEXK 1 B EB OE N PCM WEX 1 EB WE N PCM TORD CJ EB BE MI PCM IOWR lt __ EB BE NO Y1 CAM_WAIT_N GND_1 Ke COcAM IREQ N X CAM CD2 N UU vcc 1 2Y0 CAM_CD1_N 2Y1 CAM INPACK N GND 2 2Y2 TPI CLK ZY np I_VAL GI 3Y0 L TPRICSOP AR918 75 SY GND 3 3Y2 O rPr DATA 7 rPI DATA 6
137. OTOR_SENSOR Bo e R10010 0 20K 8 mi Al ac a MO SENS TO MAIN DOWN lt o 2 MOTOR_SENSOR_UP 9 E MOTOR SENSOR o ci MOTOR SENSOR e a x R10030 JP10007 E a R10016 0 20K 0 R10036 A 3 3V NORMAL EE E ote MOTOR SENSOR O e e e 2 MO SENS TO MAIN UP a e o OF MOTOR_SENSOR MOTOR_SENSOR_UP C10006 20 at E o 1 16w B a A c10007 6 R10021 0 we I N o VO 2 cl E 2 DR 4 1 210001 0 1uF PE e 0 1ur e MOTOR SENSOR O SE gt gt D EANA MMBT3906 NXP 50V Sr Soy zo 9 1 MOTOR SENSOR UP DG e wo a z MOTOR_SENSOR S o E 5 c10008 5 ee o S n9 c10014 A OMS A D MOTOR_SENSOR 9 MOTOR SENSOR D Lut e a Z e 0 o e ef gt MOTOR_SENSOR_O Eu SU Me y 0 1uF SS H H SE E e B 010000 a 50V Feb 2 5 a e 50V ja 28C3052 n e JP10005 e A c10010 E al 50V y d 9 d o o MO LORSSENSOR oo ba c10003 S Cie SO e MOTOR SENSOR UP E Q OM o a e e e da NG zz o o o Z any d 0 1uF 50V a zi zi K o x E N B inate cc 5 a Sue o 8 i 50V MOTOR SENSOR UP o n D a de no H Ei _ S a moe du Z uM o MOTOR SENSOR e 2 e e n el Ka HA z o e ki zi 9 o O E E O o e z
138. O_DOS 1 i1 DOS 1 DDR1_DQS 1 DDR1_DOS 1 B7 B3 N25 i AE18 B7 B3 DDRO_DOS_N 1 DDRO_DQS_N 1 DDRO_DOS_N 1 DOS_N 1 DDR1 DOS N 1 DDR1_DOS_N 1 El 324 SE F AD22 El DDRO CKE DDRO_CKE DDR1_CKE gt DDR1_CKE E7 G8 W24 B AD12 E7 G8 DDRO_DATA 0 15 DDRO DM O DDRO WEN C DDRO WE N DDR1 WE N gt DDR1 WEN DDR1 DM O D3 32 V24 PET ETUR AD13 DDR1 DATA 0 15 D3 32 DDRO_DM 1 S DDRO_RASNC lt ES DDRO RAS N DDR RAS N E gt DDR1 RASN DDR1_DM 1 8 J v DA CE DE E AE J E SCH DDRO CASNX 1 vae PPRO_CAS_N DDR1_CAS_N 1 15 DDDRI CASN e DDRO_DATAT O 2 um DDRO_ODT lt _ 125 PPRO ODT DDR1_ODT 1 70 gt DDR1_ODT M9 DEBRA DDRO_DM 0 C DDRO DM 0 DDR1_ C gt DDR1 DM 0 P1 T25 AE15 P1 DDRO_DM 1 X DDRO DM 1 DDR1_ gt DDR1_DM 1 P9 W25 AE12 P9 m 0 75V VREFO DO DDRO BA O X uzs PPRO BALOI DDR1_ AAPOR gt DDR1_BA 0 0 75V_VREF1_D0 Ti SS D DDRO BA 1 C w26 PPR0 8A 11 DDR1_ APIS gt DDR1_BA 1 A SS DDRO_BA 2 C naga PPRO BAL21 DDR1_ Se gt DDR1_BA 2 0 75V_VREFO_D1 DDRO RESET N eg TE DDR SORT RESET ON 0 75V_VREF1_D1 E SH SE A AD26 5 A R2 240 DDRO ZQ CAL DDR1_ SE 40 A B1 1 1 B1 B9 ES AB26 AF9 B9 DDRO_VREFO D1 E26 AE26 D1 DDRO_VREF1 _VREF D8 323 AC11 D8 1 5VQ0 DDRO VDDQ 1 _VDDO_ 1 5VQ1 E2 A E2 E8 K23 AC12 E8 DDRO VDDQ 2 DDR1 VDDQ 2 e F9 L23 AC13 F9 me 25 u23 PPR0 Vbpo 3 DDR1 VDDO 3 Fa SS E DDRO DAT 14 T s Se DDRO_VDDO_4 DD _VDDO_4 Ee DDR1 DAT 14 SS Ss KEE DDRO_VDDO_5 DDR1_VDDO_5 DDR1 DAT
139. P gt TXDCLKP BLM18SG121TNID Weg TEND gt TXBCLKN gt TXDCLKN e e P R e 0 gt TXB3P gt TXD3P PURSE se C9316 C9319 C9322 C9328 gt TXB3 gt TXD3 S T ae d 7 UE 10V 10V luF HE OS LUF wee 0 LUE gt TXB4P gt TXD4P 10V 10V 16V 16V gt TXB4 gt TXD4 QET ES e 3 3V XTAL AVDD Decaps 2 5V DDR PLL SS PLL DIS PLL AVDD Decaps 3 3V_IO 3 3V_XTAL_AVDD 43 3v XTAL AVDD 2 5 A A A 2 5V_LG1132 Tee OM EAV DD 2 5V_AVDD L9302 A A A BLM18SG121TN1D L9305 e TER e BLM18SG121TN1D e TO e e C9307 C9310 C9314 Taur Taur o 1uF C9317 C9320 C9323 C9326 10V 10v 16V TI4 7uF 4 7uUF 0 1uF 0 1uF 10v 10v 16v 16v OPT OPT IHE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X RADIATION WHEN SERVICING IF 15 FILRE AND ELECTRICAL SHOCK HAZARDS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE NN SYMBOL MARK OF THE SCHEMETIC Copyright 2012 LG Electronics Inc All rights reserved Only for training and service purposes SECRET LGElectronics LG ELECTRONICS 1 0VDC A E FU IC9300 LG1132 3 3Vv_10 A 2 5V_LVDS_RXA SIS IS IS 1 0VDC A myo yo lao ero 2 5V_LVDS_TXA A 1 0V_PLL_VDD XAL Y22 AA22 2 5V_AVDD Y20 A AA19
140. P Y9 C18 3 TXC1 gt TXC1 SPI_SCLK AA B17 50 sc TXC2P TXC2 LL TXC2 AB7 A16 n SPI DI TXCCLKP gt TXCCLKP AAT B16 sE TXCCLK Ee gt TXCCLKN I TXC3P gt TXC3P 3D DEPTH RESET Y7 C16 P9301 TXC3 ENEE 12507WS 04L dum oe gt 4 OPT Bi TXC4P TXC4P S Ge AB6 A15 O TMODEO TXC4 gt Txc4 R9331 0 AB5 A14 Pn TXDOP EM TXDOP gt FLASH_WP DEBUG TA TXDO Ee CD TXDO SS GE GC TXD1P R9332 0 1 TXD1 E gt TXD1 t3 3V NORMAL DT I2C SDA2 AA B TXD2P gt TXD2P A R9333 0 ABA A13 TXD2 C TXD2 e UD r2C SCL2 AB3 A12 OPT TXDCLKP gt TXDCLKP 4 d AA3 B12 q g TXDCLK gt TXDCLKN d Y2 cil SS TXD3P 515 gt TXD3P TXD3 gt TXD3 Ed m m m AA2 B11 D O ES ON zB TXD4P 3 gt TXD4P on A o o TXD4 gt TxXD4 E w T UART_RXD GPIO O e D2 3 pana UART_TXD GPIO 1 e w2 d GPIOT2 e wm o i mm a a a emm SPI_SCLK lt Sh _SCLK GPIO 3 kd I gt a R9313 33 V m SPI CS a _cs GPIO 4 S T SPI_DI S NEUE _DI GPIO 5 5 LG1132 HW RESET R gt SPI DOK _DO GPIO 6 aH 4 S x t3 3V NORMAL GPIO 7 m d A R9315 33 E2 U2 12C SDA2 T GPIOI8 z E H I2C_SCL2 R9316 pe i GPIO 9 N RA T2C_SDA2 R23T3 33 D GPIO 10 R bold z 0 R I2C SCL2 1 gt RASLE SS E e E 9 9 oj zm q 10K SH9300 GPIO 12 S s OPT F2 R3 JTP 1127WEM S SMODE Fi SMODE GPIO 13 RD e e e a TMODEO a3 TMODEO GPIOJ14 e 3D_DEPTH_RESET EI TMODE1 TMODE1 GPIO 15 Den G2 C9336 Ox TMODE2 TMOD
141. Protection O sec o SMARTCARD PATA o x CD SMARTCARD_RST L O gt SEL_USB2 E Ay o N a SMARTCARD PWR SEL A a 3 Eo DA e 12C_SCL5 eo gt SEL_USB3 gt SMARTCARD_VCC zt Su SCH vss mmm O gt RST_PHY CD SMARTCARD_DET m v pr 4 0 2C_SDA5 A ee gt et ADO is d 233 SMARTCARD_CLK e aye XO_MAIN pia guo R332 a gt MOTOR CLOSE SW p o 7 BT Seen E o DET gt MOTOR OPEN SW al mal ANN 2 12C_SDA3 nan L woroR Cit E Ex oo DiiVA_POD_CTL e e Ee L woroR ccw dD D D D D D D D D D Ge GD NX O SENS TO MAIN UP MO SENS TO MAIN DOWN Place to LVDS Wafer EB ADDR 0 14 EB DATA O i O OPTIC_FPGA_RESET B e gt OPTIC_SERDES_RESET R151 22 a gt OLED_TCON_RESET FRC_RESET gt FRC3_RESET la un a eo FPGA_LVDS_INFO oS x E a po mn Y o st oj nj gj oj sl ol nj vl nj st nj nj alo 2n E wm AE IRB_SPI_MISO EE A A A A mj OF oj sr ol NJ aj O PLL SET 1 0 gt Internal Pull UP N C is high gt 3D_DEPTH_RESET amp XO a H aa al al ml mj e S S S S A Al Al d AJ 3 3V_NORMAL C gt IRB SPI MOSI 00 CPU clock 1056Mhz Main0 1 2 DDR 792 792 Mhz Md BOE ue A aL Sae Dr DE Dr ee ee A S 8st zu 01 CPU clock 792Mhz Main0 1 2 DDR 672 792 Mhz AS ouo m m m m al x al al ol al a ai al a p ees o 5 aa Ns mal mj aj al al co a ma a e Al a a a a al a a gt IRB SPI CK 10 CPU clock 1152Mhz M Main0 1 2 DDR 792
142. S IMPORTANT FOR PROTECTION FROM X RADIATION FILRE AND ELECTRICAL SHOCK HAZARDS WHEN SERVICING IF IS SECRET ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE NN SYMBOL MARK OF THE SCHEMETIC LGElectronics Fi Fi MODEL vetis2 DATE LG ELECTRONICS Fi BLOCK rower SHEET 2 0 Copyright O 2012 LG Electronics Inc All rights reserved LGE Internal Use Only Only for training and service purposes Renesas MICOM R3035 MN RM dL CC EE 4 7K OPT i For Debug l b 12V EXT PHR DET E d HDMI WAUP HDMI INIT i e Ss E 4 N be 5V_ST A N e FLG_POD_DR gt 8 a 0 POD WAKEUP N nj E es 2 d xi I
143. S_TX RXALN bd RXB3P TXA2P VSS 156 s A L101 U3 A22 E13 v9 D9 MLB 201209 0120P N2 RXALP e RXB3N TXA2N F vss_157 LVTX_VDD18_1 T2 A21 El4 vio D10 We RXAON e z1 RXBAP TXACLKP ees Fit van 158 vi LVTX_VDD18_2 Fori RXAO0P e RXB4N TXACLKN x _159 LVTX_VDD18_3 C127 C135 C162 c20 ELS N12 D12 4 7uF 4 7uF 0 1uF TXA3P E VSS 160 LVTX VDD18 4 8 Tia 43 OPT B26 c21 E17 D13 10v 10v 16v L_VSOUT_LD TXA3N 2 vss_161 LVTX_VDD18_5 2143 E2 B20 E18 v14 D14 L DIMO VS R_VSOUT_LD TXA4P VSS 162 LVTX VDD18 6 R150 33 OPT C26 A20 E19 vis D15 MO_SCLK TXA4N VSS 163 LVTX VDD18 7 Sie 33 OPT E22 E21 v16 D16 MO_MOSI VSS 164 LVTX_VDD18_8 D24 A19 E24 v17 D17 3 E a Ml SCLK TXBOP VSS 165 LVTX VDD18 9 622 B19 FS vis 0 9VDC lui woen TXBON Fog ES VSS 166 at A 5 7 L DIMO SCLK C R152 m2 SCLK TXB1P ven 167 LVTX_VDD_1 L DIMO MOSI C ELA E clo e 7 m MOS m2_mos1 TXBIN vss_168 LVTX_VDD_2 cios cios C107 DI B18 F9 314 I NES R S ARIN M3 SCLK x xu 1 8V PSR 33pF 33pF cst Da 3 TXB2P Hg Sa VSS 169 LVTX vpp 3 77 E M3 MOSI TXB2N VSS 170 LVTX_VDD_4 OPT E A17 F11 0 9AVDD 1104 TXBCLKP vss_171 A MLB 201209 0120P N2 63 B17 F12 AE7 UART_RX us VART RXD TXBCLEN Fc Se VSS 172 avppos i1 Fr A R124 3 6 3 UART TX C UART TXD TXB3P VSS 173 AVDD09 2 c17 F14 1 8V_AVDD C142 C152 C158 TXB3N c VSS 174 A 4 7uF 4 7uF 0 1uF p c3 B125 G1 B16 F15 AES SPI_SCLK SPI_SCLK TXB4P VSS 175 AVDD18
144. T LAN port PC gt LAN Port Each other connection to LAN Port of IP Hub and Jig SET PC IP 192 168 123 254 3 4 1 Equipment setting 1 Play the LAN Port Test PROGRAM 2 Input IP set up for an inspection to Test Program IP Number 12 12 2 2 dE 3 4 2 LAN PORT inspection PING TEST 1 Play the LAN Port Test Program 3 3 2 LAN inspection solution 2 Connect each other LAN Port Jack LAN Port connection with PCB 3 Play Test F9 button and confirm OK Message Network setting at MENU Mode of TV mo LAN cable Setting automatic IP Dm Setting state confirmation TIRE gt f automatic setting is finished you confirm IP and MAC Address nux pM IP 42 E kosi ar 3 eessen EC ee Liesen S me ume a TIKE setting automatic IP pe E 25 2 AME PCBA JIG Ready 3 3 3 WIDEVINE key Inspection Confirm key input data at the IN START MENU Mode IN START 3 5 Model name amp Serial number Download 3 5 1 Model name amp Serial number D L Press Power on key of service remote control Baud rate 115200 bps Connect RS232 Signal Cable to RS 232 Jack Write Serial number by use RS 232 Must check the serial number at Instart menu 3 5 2 Method amp notice 1 Serial number D L is using of scan equipment 2 Setting of scan equipment operated by Manufacturing Technology Group G 3 Serial number D L must be conformed when it is
145. TRST xl R185 E OT GND SI SIOO OPT SPI_DO l Wee e SS SS SS SS er eg s ee E SS SS SS ee zeg l l P I FLASH WP R178 0 I2C_SDA_S Write Protection HIGH Normal Operation R179 0 LOW Write Protection gt 120 scL S A A A A LL uu pa I J THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X RADIATION FILRE AND ELECTRICAL SHOCK HAZARDS WHEN SERVICING IF IS SECRET 240Hz Back End Board ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR Ce ELECTRONICS THE CRITICAL COMPONENTS IN THE AN SYMBOL MARK OF THE SCHEMETIC LGElectronics Copyright O 2012 LG Electronics Inc All rights reserved LGE Internal Use Only Only for training and service purposes 1C200 IC100 IC201
146. XD4P R16 R168 de Ss 201 6 OPT N2 A8 T J8 Ue LE ELE E R136 Sy wen enen TADAN d d E E vss_202 3 3V Power Separation 1 8LVDS_RX R137 MON SYNCI 203 Biss 43 OPT P3 C25 RUE J21 KC x MON INTR GPIO 16 57 CO REF 322 204 3 3V 3 3V IO R113 dot r GPIO 17 ADI ELSA e CD AGP_EN T 205 EA R139 E 10E 0 VIREF_REXT GPIO 18 ELG2AAA 2 3p EN 206 L102 a Bus R163 3 OPT e K5 SC MLB 201209 0120P N2 c2 191 ES z K8 a ain TX_LOCK TX_LOCKN GPIOI20 L DIMMING_OPT gt VSS 208 R3 G R167 R169 K19 E eeu ABS GPIOI21 FE OPT READY i 3 3V SH 47K SS x VSS 209 c129 C137 ER 2 SBT 4 7uF 4 7uF GPIO 22 OPT_READY_2 K po Vxl HS output swing level control ABA der A25 7 K12 Gg 10v 10v via external resistor I ADS 1231 523 K13 den GPIO 24 9 E AE NS um ACS D22 GEN dU K14 _ GPIO 25 gt 5 213 3 E AE4 F22 4 7K ITK K15 GPIO 26 ei i 214 ADA E23 BLAS K16 Sc Grro 27 Fz i Ci 12c scL Fo xiT _215 PWM_BPL C R146 GPIO 28 BLES AAA 12C SDA PQ 216 AF3 F3 OPT K19 GPIO 29 RISB AAA LO FLASH WP E S8 217 xa AE3 A24 K21 GPIO 1 0 ADS GPIO 30 US PANEL CTL Kan 735 94 _218 J kase DS Bap O ag H5 215 mE eet t Jet oca imming Debugging AES 31 Ta M A VSS 86 VSS 220 GPIO 7 3 PWM 4 0 Eon AE2 L5 25 pu 1 GPIO 3 120Hz Mode gt 60 or 120Hz Programmable AD2 zg 98 87 VSS_22
147. Y 1 S T OPT_READY_2 I P5 xi ps 735 132 VSS 266 Riad R143 R145 ps 755 133 VSS 267 14 IMAGE OPT IMAGE NORMAL IMAGE OPT j ace 1 08 10 VSS 134 VSS 268 L D ON MAIN for 721NCH for NON 72INCH CSV i EN 15 p y S DISPLAY_OPT OLED LCD i I emm a a emm emm emm emm emm emm emm emm emm emm A emm emm emm emm emm emm s L DIMMING_OPT L D_ON_FRC L D_ON_MAIN 24 OPT_READY_1 OPT Default O A O TAO DEE I SHI A Ae E A SH a ge is 22 OPT READY 2 OPE Default UART For CPU I2C For PQ tunning SPIZI2C For Aardvak Interface For JTAG Interface P102 P103 3 3 ES dn mr 3 3V 12507WR 04L Is 12507WR 04L P100 P101 12507WR 10L 12507WR 08L C125 R147 XTAL 24 75MHz SPI FLASH 4MByte KEEN 0 1uF 3 3K AA 16v gt UART_RX Will be deleted pull up resistor from B0 3D Depth B d R106 E T SPI FLASH I I SPI_CS OO TDI I2C_SDA_PQ x100 ic101 x rAL 1 PSB MX25L3206EM21 12G c124 I l XTAL_INC j 4 CH R157 R158 EE I SPI DO gt TMs I Siq gt 12C_SCL_PO GND_1 4 F X TAL 2 4 7K 10K c100 2 3 C104 XTAL_OUT OPT cst vec 27pF 27pF SP1_csL SPI_SCLK DO TCK 50V sov I R159 so sIo1 HOLD R174 SPI DIX SPI DI TDO 7 7 3 3 3K R191 0 WP SCLK mm mmm i i mm mm wm FLASH WP CC SPI SCLK SPI DL MODE gt
148. _DDR_RESET_N M0 DDR DOSU P MO DDR DOSU H MO DDR DMU KA L8 LA K3 L9 L3 M9 M3 N9 M4 H8 M8 K8 N4 N8 J3 K9 J4 F8 G8 G10 H3 G2 FA G4 HA N3 C4 D4 MO DDR DQ10 M0 DDR DQ13 MO DDR DQ14 MO_DDR_DQ11 MO_DDR_DQ15 MO_DDR_DO9 MO DDR DQ8 MO DDR DQ12 M1 DDR A0 MI DDR A1 M1 DDR A2 M1 DDR A3 MI DDR A4 M1 DDR A5 M1 DDR A6 MI DDR A7 M1 DDR A8 M1 DDR A9 MI DDR A10 MI DDR A11 MI DDR A12 M1 DDR A13 M1 DDR A14 MI DDR BAO MI DDR BAl MI DDR BA2 MI DDR CLK MI DDR CLEN M1 DDR CKE MI DDR ODT MI DDR RASN MI DDR CASN MI DDR WEN MI DDR RESET H DR_DQSU_P DR_DQSU_N m D MI DDR DMU B8 A8 ER c8 c3 c9 E4 E9 D3 E8 KA L8 LA K3 L9 L3 M9 M3 N9 M4 H8 M8 K8 N4 N8 J3 K9 J4 F8 G8 G10 H3 G2 FA G4 HA N3 c4 D4 Ml DDR DQ10 Ml DDR DQ13 MI DDR DQ14 M1_DDR_DQ11 M1_DDR_DQ15 M1 DDR DQ9 MI DDR Do MI DDR DQ12 B8 A8 ER c8 c3 c9 E4 E9 D3 E8 A4 F2 F10 H2 H10 J8 H5TO2G83BFR PBC A0 Al A2 A3 A4 A5 A6 AT A8 A9 A10 AP A11 A12 BC A13 A14 DOS DOS DM TDOS NF TDOS H5TO2G83BFR PBC A0 Al A2 A3 A4 A5 A6 AT A8 A9 A10 AP A11 A12 BC A13 A14
149. _OPT_1 0 1 0 1 2C SDAS SDA4 GPIO67 Doo NR ON m EN EN EN D e pem Do ar AC6 OO H N ot MM 0 o o H 2C SCL6 1 SCL5 GPIO66 OH Om AD SN DT OOO O Kei E HW_OPT_0 lt ACT Ka z z o Dn D o O Gr oO oO on D o H n T 2C SDA6 E IS I O D DO D O O oo D D amp D d oH M BackEnd 1 SDA5 GPIO65 o Zz E due o sx 0 d A A D D D Q U0 X 0 Ou E HW_OPT_1 e NM Se ce BRETT OO ROAD MOIS M WS SEKR wn un N er RD EN KY BackEnd 2 El HANAN oi oi D Dm D OH D S ada do ei SH 224k st od od o o oi oi pg 14 HM_OPT_2 C BS GER A CECI RE EE cado Ra O E H H H uN A 109 un Pannel Resol si 1 54 Jl J si Jl d 9 al gt gt a 2 5 Si 9 E a a a a a al al ci al al ei e a gw HW_OPT_3 e ODEL OPT 2 FHD UD vd d d d d d d d eg d d d m EI CT O O0 TD AQ A a a au o a Qa o mo NAN HH HB OPTIC I F Oo OU OF OQ 0 0 OU Dr DO 0 nv A nn uy mm om o Dm o Dm o a Er ES o omg sd a aj m ajojo jajaja NINININI NI NINI NINI N Gil cl Cl NINI NI NAJ NJN NINININI NJ NIT ANI AN NINININI NI AN ajajaj Sa 3P Depth L ODEL OBEUR 3D DEPTH 3D Depth IC NON 3D Depth IC a aja a a aj ajaja ESTER gpjelejlele ol of c ma a mm ole a a ac mola ac lt HW OPT 5 e SOR T 3D_ x DDR Size ODEL OPT 5 DDR Reserved DDR Default SEA e HW OPT 6 lt C e CP BOX ODEL OPT 6 CP BOX Enable Disable HW OPT 7 lt e ol o ojojo Bee ODEL OPT 7 T2 Tuner Support Not Support emm emm emm emm om OO emm emm emm N ajaja gjeje HW OPT 8 e 3 3V NORMAL n FrontE
150. a a DDR_DO 11 EE DDR_CASN V DDR DATA 12 H22 ds 200 z DDR_DO 1 DDR_WEN DDR_DATA 13 L21 ET D R_DO d Em KH A A WA E AS UE A KH KH AA CAE ES KS 1 DDR DATA 14 H20 J9 DDR DQ 1 DDR_RESET_N e DDR DATA 15 L20 LI DDR_DOT 1 L9 E22 T7 DDR_CLK C_ DDR_CK RA DDR DOSIO E21 A DDR CLEN DDR_CK_N DDR3 1 5V Decaps Place these caps near Memory DDR DQS N O K22 DDR DOS 0 21 PPR POS 0 A9 DDR DQS N 0 DDR Dos MIO DDR_DOS 1 J22 HSH IO e e e e e e e e B3 DDR DQS 1 DDR DOQS 1 DDR DOS MII 0 J21 El DDR_DOS_N 1 DDR_DQS_N 1 e E20 0 15 gt e BEE 20 p 940 940 940 940 9 9 9 941 9 DDR DATA O0 DDR DM R C94 C9404 C9406 C94 C941f C9412 C9414 C94 C941 J8 DDR_RASN lt D 0 1urj0 1uFl0 1uFrl0 1uFrj0 1urj0 1uF 0 1uFl0 1uFl0 1uF e P21 OPT OPT OPT OPT HATO M1 4 DDR_CASN lt TF D DDR MUR v M DDR_ODT C a E DDR DATAL2 P1 e DDR DMIOJXK m D e e e e e e e e BEES P9 ni DDR DM 1 C Szen KR GES e 0 75V VREF DO See D2 n m 0 JVREF ER o A S DDR_BA 1 lt Se D DATAL DDR_BA 2 lt m D J B1 A RIAD AAA 240 D gt E x DDR DATA 1 DI 6 A21 DDR3 1 5V 0 75V Decap DAT 0 E D8 e Place these caps near IC101 E E2 DDR DATA B e ELO DDR_DATA 12 4 Bo e rio E 0 75V_VREF_DO 0 75V_VREF_D1 DDR_DATA 13 5 F9 e e epu E D A A T i Gi M e uis D ANE G9 i e SLP VD DDR_DATA e D VD 1 5V0Q J20 C9403 C9409 A e D VD p
151. a o o IN Q sosa a USB_DCDC_BD86180 ol al a n K Kei C4325 Jo 4 al gl m ac MAX un e 5 A Li0uF USB DCDC SN1104041 16v 5 cd 5 E ch 5V_USB_2 A POND 20 Z 5 EN SW 8 e Usario 3AU04S 305 ZC LG JK4302 PGND_1 OU EN SW 9 6 e py USB OCD2 e Be E E BST O NFAULT2 p t5V USB EE 8 7 e USB DM2 He a A 14307 EES Q 3 6uH iey x 2 U NFAULTI e E ee i gos e DEV_USB_DCDC_BD86180 Q ite Icasoe i A 5V USB 3 a B pou E LX_1 len ou E EE C4322 La 5 u u to T UT e Mees bes A 10V Ona SW_IN_3 AGND_ e 5 U 10 SW IN 2 D AGND_2 A 5V_USB_2 e 4 La SW_IN_1 SW_OUT1 3 12 USB3 MAX 1 5A SAUOAS 305 ZC LG JK4300 5v UsB 3 AN e 4 Ao d E 0 z Ed pe e E ESD for MTK ESD Lor ETS e Z E z e S Qe a re 2 E C4310 zo gt DEEE 10uF Ay D iov T Ona Ei m N o ON nox GER LE ERR odo 70st ma A E N S 45V USB ord eee A a E SER FT A 3 io L4302 WIFI120 ohm VE o i D BLM18PG121SN1D a 1 E C4319 C4339 mus dc ae MAX O 44A From soc ps ol need 1007 16V 10V 10V lt WIFI OPT m z WIFI WIFI N f N For EMI E P4301 KB 2 Hi 12507WR 04L Ska USB_DM3 emo uomo i se Sos Ip A a USB_DP3 l un
152. alog For HDMI EDID D sub to D sub DVI D to HDMI or HDMI to HDMI 4 1 4 EDID DATA HDMI FHD 3D HDMI 1 4a 3D Ox00 0x01 0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0A 0x0B 0x0C 0x0D 0x0E 0x0 Sal 00 FF FF FF i ot 03 ao oxo2 OF 50 sa at 08 0x03 ps 48 00 AD GA pes 40 70 36 00 140 5A 00 00 00 16 00 00 00 Ox06 sF 1F 52 10 oo oa 20 20 20 20 20 2 o x07 pe ee peo 02 03 7 Fa ae 90 ir joe 19108114 os 2 12 0 voi 22 18 0 26 18 07 50 09 AA sel JES ss ss or Joz sx so 36 7 i6 55 Joe OxO4 2C 45 00 ao sa oo 00 oo 1E o1 1D 80 18 71 1C 16 Ox05 20 58 2C 25 oo AO 5A oo oo oo 9E Ot 10 00 72 51 Ox06 DO 1E 20 6E 28 55 00 Ao 5A oo O0 00 tE 00 00 00 joxor 00 oo oo oo oo oo oo oo oo oo oo oo OO 00 00 92 RGB 0x00 0x01 0x02 0x03 0x04 0x05 0x06 0x08 0x09 joxoa joxoB Joxoc OxOD oxOE OxOF oxo oo FF FF FFL FF FF FF OO E 6D amp _ o rio os 78 oA EE t as s amp 4c 99 26 00 71 40 81 co 81 00 81 80 95 00 00 02 3A 80 18 71 38 20 40 58 2C 00 1E 66 21 50 BO 51 00 1B 30 5A 00 00 00 TE O0 O0 00 FD 00 A m zz 20 20 2020 3 xoa 45 00 Ao 9 ox0s 40 o 36 oo
153. amp CN NOT T C amp AT NOT T C amp AT Wot_L9_T2 cf S RF SWITCH Ground Width gt 24mils T 3 3V D Demod e e IF N CHB OPT OPT NOT_T C amp AT amp CHB J 06523 956525 26528 T C amp AT amp CHB T2 C amp CHB amp CN T C amp AT amp CHB 100pF ST 10uF 6 3V e ef 50V Ve T2 C amp CN T2 C amp CHB amp CN NOT DVB S C6509 z E NOT T C amp AT amp CHB NOT T C amp AT amp CHB Q luF T2 C amp CN e el L ann dE enn A 1 23V TU HB 14 J AS Not L9 T2 C S NOT DVB S T2 C amp CHB amp CN H NIM amp CHB Not L9 T2 C S o a e CHB e e clos to UNER 16507 1 8V TU 659 653 8 CEST ESTE ZEB Not L9 T2 C S Not L9 T2 C S zem EN 4700pF Q THE BLM18PG121SN1D otn NOT_T C amp AT amp CHB Ot 7 e e E Lsov enn ae 50V CN li T2 C amp CHB amp CN 7 T2 C amp CHB amp CN e gt CHB_CVBS L9 T2 C S gt CHB_ERR CD CHB SYNC e e gt CHB_VAL OT_T C amp AT amp CHB gt cu CLK b AR6500 0 gt TU TS ERR MCI e EE TS SYNC e e e TU TS VAL DO e FE_TS_CLK e e DCHB DATA DI OT T C amp AT amp CHB gt FE_TS_DATA 0 7 e e AR6501 0 FE_TS_DATA O e D2 e e FE TS DATATI T2 Max 1 7A FE TS DATA Z2 D3 FE TS DATA 3 else Max 0 7 e e D4 FE_TS_DATA 4 e e FE TS DATA 5 DS FE TS DATA 6 e e FE TS DATA 7 NOT_T C amp AT sd 6 105 8 RR6502 3 3V_TU_IN 106501 m NOT T C amp AT amp CHB A AP2132MP 2 5TRG1 EP e D 7 E NOT T C amp AT E R6527 eperate GND for CHB S J 20K R2 CN i Quis emm 1 8 GND_ e 13 R6528 1 e 4 Y
154. ase ASCII Hex Ti CMD1 CMD2 he qa sen Je 9 Ret 9 ecw y ooo 4 2 5 Adj method 1 Auto adj method 1 Set TV in adj mode using POWER ON key 2 Zero calibrate probe then place it on the center of the Display 3 Connect Cable RS 232C to USB 4 Select mode in adj Program and begin adj 5 When adj is complete OK Sign check adj status pre mode Warm Medium Cool 6 Remove probe and RS 232C cable to complete adj W B Adj must begin as start command wb 00 00 and finish as end command wb 00 ff and Adj offset if need 2 Manual adjustment method 1 Set TV in Adj mode using POWER ON 2 Zero Calibrate the probe of Color Analyzer then place it on the center of LCD module within 10 cm of the surface 3 Press ADJ key EZ adjust using adj R C 7 White Balance then press the cursor to the right key gt When right key is pressed 216 Gray internal pattern will be displayed 4 One of R Gain G Gain B Gain should be fixed at 192 and the rest will be lowered to meet the desired value 5 Adjustment is performed in COOL MEDIUM WARM 3 modes of color temperature e H internal pattern is not available use RF input In EZ Adj menu 7 White Balance you can select one of 2 Test pattern ON OFF Default is inner ON By selecting OFF you can adjust using RF signal in 216 Gray pattern Copyright O 2012 LG Electronics Inc All rights reserved
155. atically detecting update file in USB Stick lf your downloaded program version in USB Stick is Low it didn t work But your downloaded version is High USB data is automatically detecting Download Version High 8 Power only mode Set is automatically Download 3 Show the message Copying files from memory dh TV Software Upgrade Expert Copy the file from the Memory Do not remove the USB from the port Do not unplug 4 Updating is starting 5 Updating Completed The TV will restart automatically E TV Software Upgrade Kl TV Software Upgrade COMPLETED ANA UPGRADING a 33 Do not unplug The TV will restart automatically in seconds 6 If your TV is turned on check your updated version and Tool option explain the Tool option next stage If dovvnloading version is more high than your TV have TV can lost all channel data In this case you have to channel recover if all channel data is cleared you didn t have a DTV ATV test on production line After downloading have to adjust Tool Option again 1 Push IN START key in service remote control 2 Select Tool Option 1 and push OK key 3 Punch in the number Each model has their number LGE Internal Use Only EXPLODED VIEW IMPORTANT SAFETY NOTICE Many electrical and mechanical parts in this chassis have special safety related characteristics These parts are identified by A in the Schematic Diagram and EXPLODED VI
156. cidents resulting in personal injury from electrical shocks It will also protect the receiver and it s components from being damaged by accidental shorts of the circuitry that may be inadvertently introduced during the service operation If any fuse or Fusible Resistor in this TV receiver is blown replace it with the specified When replacing a high wattage resistor Oxide Metal Film Resistor over 1 W keep the resistor 10 mm away from PCB Keep wires away from high voltage or high temperature parts Before returning the receiver to the customer always perform an AC leakage current check on the exposed metallic parts of the cabinet such as antennas terminals etc to be sure the set is safe to operate without damage of electrical shock Leakage Current Cold Check Antenna Cold Check With the instrument AC plug removed from AC source connect an electrical jumper across the two AC plug prongs Place the AC switch in the on position connect one lead of onm meter to the AC plug prongs tied together and touch other ohm meter lead in turn to each exposed metallic parts such as antenna terminals phone jacks etc If the exposed metallic part has a return path to the chassis the measured resistance should be between 1 MO and 5 2 MO When the exposed metal has no return path to the chassis the reading must be infinite An other abnormality exists that must be corrected before the receiver is returned to the customer Copyrigh
157. e FRC III CORE for O 9V Na S VLCD_POWER 12V A E L306 MLB 201209 0120P N2 MAX 3 124A e PT C328 C326 10uF ZZi0urF 25V 25V T 0 9V jos es A T IC302 L304 0 9V AOZ1038PI EP LX 3 605 A e e e NR8040T3R6N PGND NC 2 A n1 1 S x ss y S C329 C332 C336 E 3 3V VIN en NC_1 am 22UF 22UF 3300pF C334 R316 e 2 p 7 A gt iud e E ido 10v 10v 50V FII B R r a C322 OPT 50V mS AGND EN 10K Set R306 0 1UE ce 3 6 4 7K 16v 1 FB COMP R312 SACH ch e 4 5 E R2 3 3K 4700pF R307 30V as 22K 8 13 Vout 0 8 1 R1 R2 FRC III I O for 33V TYP 0 043A S MAX 0 046A VLCD_POWER 12V A L307 MLB 201209 0120P N2 33 3V A e e C325 C327 C330 e R1 FT 1C303 0 1uF 10uF Za 10uF R308 SC TPS54327DDAR 16v 25V 25V EP GND S 68K T 2 2p 10K e TT Sov R315 EN SIUS 5 1K E 13 3 3V VFB rus VBST C323 y Vout 0 765 1 R1 R2 9 e E E j Il H 0 1uF 16V L305 R20 VREG5 SH 3 6uH S 8 V e e R307 NR8040T3R6N 22K ss len 18 C331 C333 DIJ i 2E c319 C321 zn 25 oa V V an luF 0 01uF OPT 25V 50V tss ms C321 nF Vref Iss uA Analog I O Power Digital I O Power DDR3PHY Power Core Power 1 t3
158. e K19 0 lur T 0 lur T ul D VD K20 e D VD SE 0 D VD M19 gt e D VD N19 e D VD P19 D VD R19 D UH RH m AS a ume J D VD IHE AN SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X RADIATION FILRE AND ELECTRICAL SHOCK HAZARDS WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE AN SYMBOL MARK OF THE SCHEMETIC MODEL 22232 por DATE BLOCK re1132 pprs SHEET 7 LGE Internal Use Only SECRET LG ELECTRONICS LGElectronics Copyright 2012 LG Electronics Inc All rights reserved Only for training and service purposes 3D Depth Analog for de SV Aum ED HD HD HD HD GRP A HD HD HD AA HD A HD A A AA AA A A AA A A HD GERD AA AA AA A A Th i l 2 Bs K 2 5V_LG1132 S or c EE E c LC E n ed 1 5V LGI1132 ABS HF DOD S A i 3 3V NORMAL EP nn OUT A a 19500 Se Wi Pal lisa A Gu E BLM18PG121SN1D F b se z E 5V_USB 2 E 7 gt VCC E ss 7 T c9500 d 23528 uo ED e 10uF R9500 x 0E 2E IK 10K EN i e GND
159. ecting RF Cable at other equipment DVD Player Set Top Box Different maker TV etc Ge AT Check RF Cable Connection Check N Check Y 1 Reconnection i S W Version Tuner soldering 2 Install Booster N N S W Upgrade Contact with signal distributor or broadcaster Cable or Air Replace Main B D Copyright 2012 LG Electronics Inc All rights reserved LGE Internal Use Only Only for training and service purposes Standard Repair Process Established A Video error A ozone symptom GG A10 X Check gt AQ Check color by input and replace External Input Link Cable ER Replace module LVDS and RGB contact HDMI DVI iti condition Check error color input Check device and Replace Main B D A12 Check Test pattern cable RGB Check external HDMI DVI error Cable normal device and cable Replace Main B D Copyright O 2012 LG Electronics Inc All rights reserved LGE Internal Use Only Only for training and service purposes Standard Repair Process Error symptom ia AQ Check color condition by input External Input Component RGB HDMI DVI Check Test pattern Replace module date Vertical Horizontal bar residual image light spot external device color error Revised deel 0000000 5 15 Vertical Horizontal bar residual image light spot Replace Check external device connection conditio
160. ectronics Inc All rights reserved Only for training and service purposes 2 After removing an electrical assembly equipped with ES devices place the assembly on a conductive surface such as aluminum foil to prevent electrostatic charge buildup or expo sure of the assembly 3 Use only a grounded tip soldering iron to solder or unsolder ES devices 4 Use only an anti static type solder removal device Some solder removal devices not classified as anti static can generate electrical charges sufficient to damage ES devices 5 Do not use freon propelled chemicals These can generate electrical charges sufficient to damage ES devices 6 Do not remove a replacement ES device from its protective package until immediately before you are ready to install it Most replacement ES devices are packaged with leads electri cally shorted together by conductive foam aluminum foil or comparable conductive material 7 Immediately before removing the protective material from the leads of a replacement ES device touch the protective material to the chassis or circuit assembly into which the device will be installed CAUTION Be sure no power is applied to the chassis or circuit and observe all other safety precautions 8 Minimize bodily motions when handling unpackaged replace ment ES devices Otherwise harmless motion such as the brushing together of your clothes fabric or the lifting of your foot from a carpeted floor can generate sta
161. ees C OAI TK C9420 ses C9422 DDR A 3 T i o DDR A 4 DDR 3 1 0 1uF 1000pF 1 O 1uF 1000pF m DDR Al4 E22 c9401 C9407 DDR_A DD 4 R9402 DDR_A 5 T21 luF mm 7UF 4 e DDR A 6 L8 1 5VO DD 5 240 13 DDR A 6 C21 DDR A 7 Si DD 6 aj A DDR_A 7 22 T DDR_A 8 DD 7 7 DDR_A 8 C20 DDR_A 9 B2 DD 8 VDD_1 e DDR A 9 U22 DDR A 10 D9 DDR 9 DDR A 11 VDD_2 5 DDR A 10 p22 VDD_3 3 DDR_A 11 B21 1 5VQ 0 75V_VREF_DO re ou 0 75V_VREF_D1 DDR_A 12 m K Connect A13 for DD VDD 4 e DDR_A 12 D20 In 7 DDR_A 13 K 8 Using 2Gbit Memory DD Bm VDD 5 e DDR_A 13 U21 DU e B20 gt gt VDD_6 Connect Bro for N9 DDR DATA 0 15 DDR Using 2Gbit Memory VDD 7 o R1 VDD 8 e DDR DATALO M22 R9404 R9408 RO DDR DQ O DDR BA 0 VDD 9 0 DDR_DATA 1 G20 e e 0 e DDR_DO 1 1K 1K DDR_BA 1 DDR_DATA 2 N20 1 1 DDR_BA 2 L gt F22 DDR_DO 2 DDR DATA 3 Al E DDR DQ 3 09400 S R2505 e C 9406 C9410 09415 S P210 2209419 C9421 V xu DDR DATA A4 N22 DEDOS 0 1uF lt 1 0 1uF 1000pF 0 1uF 1 0 1uF 1000pF DDR_CLK gt 0013 V e DDR DATA S5 F20 R940 ci DDR_DO 5 DDR_CLKN V e DDR DATA 6 N21 Co e e C9 DDR DQ 6 DDR_CKE V e DDR DATAI7 F21 D2 x DDR DQ 7 1 5VQ V Se e DDR_DATA 8 421 oe A V e DDR DATA 9 E22 E Ed e F1 DDR_DO 9 DDR_ODT V a e DDR_DATA 10 G22 DDR_DO 1 DDR_RASN V Se DDR_DATA JP M20 E Q a a a m m m a i a m eme in a mm
162. ghts reserved LGE Internal Use Only Only for training and service purposes Standard Repair Process Detail Technical Manual Error i A Video error Color error E e 20 1214 symptom Check Link Cable LVDS reconnection condition Geen DEI ALL MODELS Check the contact condition of the Link Cable especially dust or mis insertion A10 Copyright O 2012 LG Electronics Inc All rights reserved Only for training and service purposes LGE Internal Use Only Standard Repair Process Detail Technical Manual error i Established A Vi rror lor error stablishe LCD TV symptom deo error Color erro date Ar mI 3 Test Pattern 3 Test Pattern EZ ADJUST Pattern Ce ke E peter Contra LT Press 0 to hide OSD Test Pattern Pattern Control Red Press to hide OSD C95 CO Cn CO 9 in 11 Test Pattern Test Pattem Pattern Control Blue 2 Pattern Control I Black Press 8 to hide O Press 8 to hide OSD E You can view 6 types of patterns using the ADJ Key Checking item 1 Defective pixel 2 Residual image 3 MODULE error ADD BAR SCAN BAR 4 Video error Classification of MODULE GE 1 Copyright O 2012 LG Electronics Inc All rights reserved LGE Internal Use Only Only for training and service purposes Appendix Exchange T Con Board 1 Solder defect CNT Broken Solder defect CNT Broken Solder defect CNT B
163. he receiver must be operated for about 20 minutes prior to the adjustment 4 Model General Specification Market EU PAL Market 36Countries DTV amp Analog Total 37 countries DTV MPEG2 4 DVB T T2 S Albania Austria Belarus Belgium Bosnia Bulgaria Croatia Czech Estonia France Germany Greece Hungary lreland Italy Kazakhstan Latvia Lithuania Luxembourg Morocco Netherlands Poland Portugal Romania Russia Serbia Slov enia Spain Slovakia Switzerland Turkey UK Ukraine Den mark Finland Norway Sweden Supported satellite 29 satellites ABS1 75 0E AMOS 4 0W ASIASATS 105 5E ASTRA1L HMKR 19 2E ASTRA2ABD 28 2E ASTRA3AB 23 5E ASTRAAA 4 8E ATLANTICBIRD2 8 0W ATLANTICBIRD3 5 0W BADR 26 0E EUROBIRD3 33 0E EUROBIRD9A 9 0E EUTELSATW2A 10 E EUTELSATW3A 7 0E EUTEL SATW4W7 36 0E EUTELSESAT 16 0E EXPRESSAM1 40 0E EXPRESAM3 140 0E EXPRESSAM33 96 5E HEL LASAT2 39 0E HISPASAT1CDE 30 0W HOTBIRD 13 0E INTELSAT10 amp 7 68 5E INTELSAT15 85 2E INTELSAT904 60 0E NILESAT 7 0W THOR 0 8W TURKSAT 42 0E YAMAL201 90 0E Broadcasting system DVB S Satellite SECAM L L DK BG 1 2 3 4 9 6 7 8 9 Copyright O 2012 LG Electronics Inc All rights reserved LGE Internal Use Only Only for training and service purposes 9 Receiving system Analog Upper Heterodyne DVB T Digital COFDM QAM Guard Interval Bitrate Mbit s 1 4 1 8 1 16 1 32 Modulation Code Rate QPSK 1 2 2 3 3 4 5 6 7 8 16 QAM 1
164. hnical Manual Continued from previous page Check front display LED Check power input Voltage 4 ST BY 3 5V Checking method when power is ON POWER OFF MODE checking method Checking method in menu when there is C Audio error_ No audio Normal no audio Voltage and speaker checking method when there is no audio Remote controller operation checking method D Function error Motion Remote operation checking method Wifi operation checking method Copyright O 2012 LG Electronics Inc All rights reserved LGE Internal Use Only Only for training and service purposes Standard Repair Process Detail Technical Manual symptom A Video error_No video Normal audio Check LCD back light with naked eye lou ENS After turning on the power and disassembling the case check with the naked eye whether you can see light from 2 locations A1 Copyright O 2012 LG Electronics Inc All rights reserved LGE Internal Use Only Only for training and service purposes Standard Repair Process Detail Technical Manual Error 4 Establishec LCD TV A Video error No video Normal audio LED driver B 24V measuring method bom A2 Check the DC 24V and Inverter on 14 Pin Power Board gt Driver PSU Detect Inverter On Off Int PWM Ext PWM PDIM A2 Copyright O 2012 LG Electronics Inc All rights reserved LGE Internal Use Only Only for tra
165. i H ER ON OFF2 2 IR KEY1 P74 KR4 INTP8 SI01 SDAO1 7 P22 ANI2 3 3V NORMAL V HDMI_CEC MICOM MODEL1_OPT_2 PU S KRS SOUL g P23 ANI3 ER_ON OFF2_3 POWER_0N 0FF2_2 lt MODEL1_OPT_1 E P72 KR2 8S021 P24 ANIA YOR POWER_ON OFF2_3 oe POWER ON OFF2 34 MODEL1_OPT_0 SET Nx P71 KR1 SI21 SDA21 P25 ANIS5 ER ON OFF2 4 EEPROM SDA e f Ss i gt SIDE HP MUTE P70 KRO SCK21 SCL21 P26 ANI6 EEPROM SCI lt e MODEL1_OPT_4 P30 INTP3 RTC1HZ SCK11 SCL11 P27 AN17 MODEL1_OPT_6 MODEL1_OPT_3 R3018 R3019 3 BK 3 3K 3 5V_ST H A N LD O O O IQ O O 0O0O O adjaj CH HINI NINI O O si 4 MICOM MODEL OPTION gsjojojslal gjojpigjaja jH e ojajal gl o1 jajHjlj Aajojala Dill HIE JA NX Oli wn Ci MICOM MODEL OPTION AN N oa hes E Hl Di Oil AJOO QA H Alo D A E Hj odjcwidwj v XH Oo SI H ZIHI OIX I HAH BH oO MIN NVIHINIHIIOInNAINIASIAIO A MODEL_OPT_0 NON DIVA DIVA For China TI it Dm SA e M X LED A undi eil eil NIN al H Oil AJO Di oj nd al als AH Oo FH fu HIN xX CQ e z 2 MODEL OPT 1 NON JAEAN i For JAPAN Z HI DIK oj OO Di Y s dx X MM zx M H Su Mi O Q ac EE oo ek zn AS Bn 7 o A sr n xX o 2 E a MODEL OPT 2 TACT_KEY TOUCH_KEY C ma O SO m z a E pem OS l a las _OPT_ S se oe Oo Ho Zo ao LO A Ay Ay N gt ss gel gel 22 28 83 93 ay SS jo mM e e H H E 9 5 9 e Se x MODEL OPT 3 LCD OLED PDP LO Di CH x H Aj N MODELI OPT 0 IRI EDIT x Se MODEL1_OPT_1 GE EE huc Si Y MODEL1_OPT_2 10Pin For Sam
166. ining and service purposes Standard Repair Process Detail Technical Manual Error e LCD TV A Video error_No video Normal audio Revi Content Check White Balance value See A3 _ EZ ADJUST 3 ool Option2 2 Tool Option3 Tool Option4 Tool Option5 Tool Optionb Tool Option Country Group Area Option ADC Calibration 10 White Balance 1 10 Point WB 20 Point WB Test Pattern EDID D L j Sub B C V Com P Gamma Ext Input Adjust BEI G Gain B Gain R Cut U Cut B Cut Test Pattern Backlight Reset Entry method 1 Press the ADJ button on the remote controller for adjustment 2 Enter into White Balance of item 10 3 After recording the R G B GAIN Cut value of Color Temp Cool Medium Warm re enter the value after replacing the MAIN BOARD A3 Copyright O 2012 LG Electronics Inc All rights reserved LGE Internal Use Only Only for training and service purposes Standard Repair Process Detail Technical Manual Error i ishec A Video error No video Audio Established 2014 12 M symptom Power Board voltage measuring method S BEEN Check the DC 24V 12V 3 5V 24 Pin Power Board lt Main Board 45 SMAW200 H24S YEONHO EN en moe ES 20V 24V pa 20V 24V ES ES C TN LPB V sync BENT Inverter Inverter On off 12V N C LPB aa A dim PWM Dim Dim 1 ln Error out only Lamp SCANNING Model PWM Dim 2 A4 Copyrigh
167. ith a sharp knife Remove at least 1 4 inch of copper to ensure that a hazardous condition will not exist if the jumper wire opens 2 Trace along the copper pattern from both sides of the pattern break and locate the nearest component that is directly con nected to the affected copper pattern 3 Connect insulated 20 gauge jumper wire from the lead of the nearest component on one side of the pattern break to the lead of the nearest component on the other side Carefully crimp and solder the connections CAUTION Be sure the insulated jumper wire is dressed so the it does not touch components or sharp edges LGE Internal Use Only SPECIFICATION NOTE Specifications and others are subject to change without notice for improvement 1 Application range 3 Test method This specification is applied to the LCD TV used LD23E 1 Performance LGE TV test method followed chassis 2 Demanded other specification Safety CE IEC specification EMC CE IEC 2 Requi rement for Test Wireless Wireless HD Specification Option Each part is tested as below without special appointment 1 Temperature 25 C x 5 C 77 F 9 F CST 40 C 5 C 2 Relative Humidity 65 10 3 Power Voltage Standard input voltage AC 100 240 V 50 60 Hz Standard Voltage of each products is marked by models 4 Specification and performance of each parts are followed each drawing and specification by part number in accordance with BOM 5 T
168. l E gt 2c scie 62808 am e e g D Spoo o dos Ja UART1_TX SI Oz E s o o o om ao ao a a a a a ao eo o a D om as ore BH aa e AE o O zZ z HoH n a E mou fa du m H H ENS E R o H amp THE AN SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES em em em em em em S H Q SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X RADIATION Place near Jack s FILRE AND ELECTRICAL SHOCK HAZARDS WHEN SERVICING IF 15 SECRET e LG ELELTRONILS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE AN SYMBOL MARK OF THE SCHEMETIC LGElectronics Copyright O 2012 LG Electronics Inc All rights reserved LGE Internal Use Only Only for training and service purposes Max 35mA Max 12mA 1 0V_VDD Max 360mA PET Max 1mA E E AVDD10_VSB A EE 1 0V_VDD AVDD10_DEMOD UN VDDC_XTAL A A A A L305 ido BLM18PG121SN1D L304 E BLM18PG121SN1D vy e e BLM18PG121SN1
169. lectronics Inc All rights reserved Only for training and service purposes LGElectronics MDS62110217 ESD M319 MDS62110217 fe ESD LG ELECTRONICS lea FL 5V Bypass Cap 1 5V_DDR A L300 BLM18PG 21SN1D 18 VCC1 5V_MAIN A Max 680mA MA ZD301 DV gt ESD_LG1152 VCC1 5V MAIN A R300 1K 15 d R301 1K On Package C326 10uF C302 10uF II uF uF uF u uF u E 3 o 0 C311 C317 0 C320 0 C323 0 C329 0 0 0 0 0 C334 C337 C342 C343 C346 Max 40mA VREF MO 0 luF 1000pF C300 C308 Decap 1 5V_DDR A L301 BLM18PG121SN v O 1luF O lea Max 340mA VCC1 5V_DE A On Package VI e e fy 5 uF E 0 C303 10uF II C306 0 C310 0 C316 0 0 C336 C340 Decap 0 lurF 2ea n Package Decap VCC1 5V MAIN A R302 R303 On Package VCC1 5V DE A R304 R305 lt 1K 1 C351 0 1uF T 1000pF On Package O luF 3ea Max 40mA VREF MI 1 oe 1K oo 1K 0 1uF C350 C362 Decap 1000pF O luF lea Max 40mA Decap VREF_M2 A O luF lea VDD33 VDD33 USB E VDD18 VDD18_LVTX A VDD18_LVRX A VDD18_MAIN_XTAL A B28 TU UN E F9
170. ment 2 Adjustment must be done in the correct order 3 The adjustment must be performed in the circumstance of 25 C 5 C of temperature and 65 10 of relative humidity if there is no specific designation 4 The input voltage of the receiver must keep AC 100 240 V 50 60 Hz 5 The receiver must be operated for about 5 minutes prior to the adjustment when module is in the circumstance of over 15 In case of keeping module is in the circumstance of O C it should be placed in the circumstance of above 15 C for 2 hours In case of keeping module is in the circumstance of below 20 C it should be placed in the circumstance of above 15 C for 3 hours Caution When still image is displayed for a period of 20 minutes or longer Especially where W B scale is strong Digital pattern 13ch and or Cross hatch pattern O9ch there can some afterimage in the black level area 3 1 3 Adjustment 1 Adjustment method Using RS 232 adjust items in the other shown in CC ECH 2 Adj protocol aa 00 00 a 00 OKOOX xb 00 04 b 00 OK04x Adjust 480i 1080p Comp1 xb 00 06 b 00 OKO6x Adjust 1920 1080 RGB Protocol Set ACK Enter adj mode Source change Begin adj Aetna adn resul OKx Case of Success J NGx Case of Fail main main ad 00 20 000000000000000000000000007c007b006dx sub Sub ad 00 21 000000070000000000000000007c00830077x NG 03 00x Fail I NG 03 01x Fail Confirm adj ad
171. module exterior damage Replace cabinet Replace remote controller Replace stand 15 Copyright O 2012 LG Electronics Inc All rights reserved LGE Internal Use Only Only for training and service purposes O O eh D one o O re U el lt Y eh D Q Q Q JJ D GB U wm O O D o o U D eh D O e D cC Error symptom Content Remarks Check LCD back light with naked eye A Video error_ No video Normal l LED driver B 24V measuring method audio Check White Balance value A Video error_ No video Audio Power Board voltage measuring method TUNER input signal strength checking AG E method A Video error_ video error Video lag stop LCO TV Version checking method Tuner Checking Part A Video error Vertical Horizontal Dar Len Tu conet daa residual image light spot Check Link Cable LVDS reconnection A Video error Color error condition Adjustment Test pattern ADJ Key Exchange T Con Board 1 A 1 5 Exchange T Con Board 2 A 2 5 Exchange LED driver Board PSU A 3 5 Exchange Module 1 A 4 5 Exchange Module 2 A 5 5 lt Appendix gt Defected Type caused by T Con Inverter Module Z Continue to the next page Copyright 2012 LG Electronics Inc All rights reserved LGE Internal Use Only Only for training and service purposes Contents of LCD TV Standard Repair Process Detail Tec
172. mputer During auto adj RS 232C protocol is needed 3 Adjustment Remote control 4 Video Signal Generator MSPG 925F 720p 216 Gray Model 217 Pattern 78 Only when internal pattern is not available Color Analyzer Matrix should be calibrated using CS 1000 4 2 3 Equipment connection MAP F Color Analyzer Pattern Generator RS 232C Signal Source If TV internal pattern is used not needed 4 2 4 Adj Command Protocol Command Format ISTART 6E A 50 A LEN AJO3 A CMD A 00 A VAL A CS STOP LEN Number of Data Byte to be sent CMD Command VAL FOS Data value CS Checksum of sent data A Acknowledge Ex Send JA 00 DD Ack A 00 okDDX RS 232C Command used during auto adjustment RS 232C COMMAND CMD ID DATA H wb 00 00 Begin White Balance adjustment wb 00 10 Gain adjustment ntemal white pattern _ Gain adjustment completed Offset adjustment iemal white pate wb 0 wb o 2 wb oo 2t Ofsetadsmentcompetei pve mt End White Balance adjustment internal pattern disappears zB LGE Internal Use Only Ex wb0000 gt Begin white balance auto adj wb 00 10 gt Gain adj ja 00 ff gt Adj data jb 00 cO wb 00 1f Gain adj completed wb 00 20 Start wb 00 2f end Off set adj wb 00 ff End white balance auto adj Adj Map Adi tem Command Data Range Default l oue c
173. n Y MOL sul replace Link Cable Request repair for external device For other panel External device screen error Color error Check S W Version N P S W Upgrade orma screen Y Copyright 2012 LG Electronics Inc All rights reserved Only for training and service purposes Check screen condition by input External Input Component RGB HDMI DVI Connect other external device and cable Check normal operation of External Input Component RGB and HDMI DVI by connecting Jig pattern Generator Set top Box etc Connect other external device and cable Check normal operation of External Input Component RGB and HDMI DVI by connecting Jig pattern Generator Set top Box etc LGE Internal Use Only Standard Repair Process Established B UNS XX error e we symptom ymp No NA Re S Revised date date 6 15 c A17 Check A19 ormal N Check Power operation On High zn Y DC Power on Replace by pressing Power Key On Remote control Power B D Power LED Stand By Red or Turn Off Operating Turn Off N Check Power cord was inserted properly N Replace Main B D CG AA N Measure voltage of each output of Power B D Y Replace Main B D Close Check ST BY 3 5V A18 Replace Power B D 6 Copyright O 2012 LG Electronics Inc All rights reserved LGE Internal Use Only Only for training and service purposes
174. n pin is high 24 Pin Power Board lt gt Main Board SMAW200 H24S YEONHO DU om 20V 24V 20V 24V GND N C Only LPB V sync Inverter On off N C LPB Lamp A dim PWM Dim 1 23 Error out only Lamp SCANNING Model PWM Dim 3 2 A19 Copyright O 2012 LG Electronics Inc All rights reserved LGE Internal Use Only Only for training and service purposes Standard Repair Process Detail Technical Manual Error Establishec 20111214 LCD TV B Power error Off when on off whiling viewing Content POWER OFF MODE checking method bog DEN A22 IN START Model Name GLOBAL Serial Number SKJY1 M d S W Version 03 00 01 2 Syst MICOM Version BOOT Version FRC Version IR LED Version EDID RGB HDMI ype t Ver A Ver version Wi fi Channel o oononomeocm ul 1 1 1 Ld 1 1 Copyright O 2012 LG Electronics Inc All rights reserved Only for training and service purposes 2 POWER OFF BY REMOTE KEY 3 POWER OFF BY REMOTE KEY 4 POWER u 5 POWER OFF BY 5VMNT 6 POWER OFF BY REMOTE KEY1 7 POWER OFF BY ACDET 8 POWER_OFF_BY_REMOTE KEY 9 POWER OFF BY REMOTI KEY 10 POVVER a A il 11 POWER_OFF 1 System 2 Model Number D L Test Option yoy Spectrum 0 Sync Level 11 Wireless Ready Stable Count ODC Test Local Dimming SDP Server Selection 6 Network Error History 12 POWER OF n REM 13 POWER OFF BY REMOTE KEY 14 POWER OF
175. n there is no audio 1 Check the contact condition of or 24V connector of Main Board 2 Measure the 24V input voltage supplied from Power Board If there is no input voltage remove and check the connector 3 Connect the tester RX1 to the speaker terminal and if you hear the Chik Chik sound when you touch the GND and output terminal the speaker is normal A25 Copyright 2012 LG Electronics Inc All rights reserved LGE Internal Use Only Only for training and service purposes Standard Repair Process Detail Technical Manual E i d GE Femme amore Revised Content Remote controller operation checking method date I d m be Vi lt XXLM9600 gt SM ZEN B pa JE O BAR CODE i Checking order 1 2 Check IR cable condition between IR amp Main board 3 Check the st by 3 3V on the terminal 6 4 When checking the Pre Amp when the power is in ON condition it is normal when the Analog Tester needle moves slowly and defective when it does not move at all A27 Copyright O 2012 LG Electronics Inc All rights reserved LGE Internal Use Only Only for training and service purposes Standard Repair Process Detail Technical Manual Error i d D Function error E e 20 1214 symptom Revised Content Motion Remote operation checking method lt XXLM9600 gt e 5 IB O BAR CODE A28 Copyright 2012 LG Electronics Inc All rights
176. nd 2 ODEL OPT 8 S Tuner Support Not Support A T TAG PULI UP U U U H d HW_OPT_9 lt _ e M a a S t d B O n ODEL OPT 9 c2 Tuner uppor Wc Supot bo e o 4 eon 2 amp aa e A A A A qu m on a A MODEL_OPT_10 om oe bo ci Cie M Ox NM co o m o DG GG S a mM i HW_OPT_10 C Zoran ERC Support Not Support SAS rn NS OMG OMG ON DN nm am am DMS ONS ON E E a a a 2 E a 9 9 A S e Ps A E pe g 5 Si A a a a p E i a For UD ENS ANS LOS MOS ARS NT KOS moe ANS AOS MAS ma See 2 GE E PS SU S hs z gnum Ep EE E PE zZ z E S E 4 2C SDAl Ss SE SS EK ze E zu E NN RER P100 gt HP AMP MUTE C BT a Ba z E z E MODEL OPTION 8 is just for CP Box A El ia te ina SE a eu ZERO EIN Ou D R117 Se x D X os X x PB mi 2t Bx lo It should not be appiled at MP LA ze scil 4 a nd D D D A O O n edel 3 3V_NORMAL 12507WS 04L zo o o ve o o gej Ho Ho o Za mom m PECES EET E E on E pr E al A x 2C SDA2 a a DG U Y i mm a D I n Oo n z E B 3 gt a gi A S E gt 2c sci2 E T mom m Ea a H 5 2 e E 2C SDA3 Ala 5 V n na L eh T zo Jr q zo o aw as EN B E Se Oo om E st E 2 Lao i Oud H D D 0 ES J N oH Z o I sa I zu I2C SCL3 O Do E E m zu m M 5m Sr S Se SDAA 43 3V NORMAL Jl zZ a A or LO co je koj vo N N e e e e e e e e e 5 2c sci4 Se Jl Se i al alo j UART1 RXX 1 RCLAMP0502BA 2C SDA5 0 0 fu i e 2 Pu Ze z x o LO O D100 5 2c sci Z DOO Sr Siq E 2 oO 1 WK gje 2C_SDA6 a DS w
177. nd service purposes 21 4 9 Inspection of light scattering Test Method Power Only Power Only Key Light Scattering 1 Push Power only key 2 Push HDMI hot key 3 Inspect whether light scattering is occurred in internal black pattern or not 4 Push Power only key 4 10 Option selection per country 4 10 1 Overview Option selection is only done for models in Non EU 4 10 2 Method 1 Press ADJ key on the Adj R C then select Country Group Meun 2 Depending on destination select Country Group Code 04 or Country Group EU then on the lower Country option select US CA MX Selection is done using or gt key 4 11 MHL Test 1 Turn on TV 2 Select HDMIA mode using input Menu 3 Set MHL Zig M1S0D3617 using MHL input output and power cord 4 Connect HDMI cable between MHL Zig and HDMIA port 5 Check LED light of Zig and Module of Set Result If The LED light is green and The Module shows normal stream OK Else NG LGE Internal Use Only 5 Tool Option selection Method Press ADJ key on the Adjustment remote control then select Tool option 6 Ship out mode check In stop After final inspection press IN STOP key of the Adjustment remote control and check that the unit goes to Stand by mode 7 GND and Internal Pressure check 7 1 Method 1 GND 4 Internal Pressure auto check preparation Check that Power cord is
178. nding from the circuit board and crimp the U with long nose pliers to insure metal to metal contact then solder each connection Power Output Transistor Device Removal Replacement 1 Heat and remove all solder from around the transistor leads 2 Remove the heat sink mounting screw if so equipped 3 Carefully remove the transistor from the heat sink of the circuit board 4 Insert new transistor in the circuit board 5 Solder each transistor lead and clip off excess lead 6 Replace heat sink Diode Removal Replacement 1 Remove defective diode by clipping its leads as close as pos sible to diode body 2 Bend the two remaining leads perpendicular y to the circuit board 3 Observing diode polarity wrap each lead of the new diode around the corresponding lead on the circuit board 4 Securely crimp each connection and solder it 5 Inspect on the circuit board copper side the solder joints of the two original leads If they are not shiny reheat them and if necessary apply additional solder Fuse and Conventional Resistor Removal Replacement 1 Clip each fuse or resistor lead at top of the circuit board hollow stake 2 Securely crimp the leads of replacement component around notch at stake top Copyright O 2012 LG Electronics Inc All rights reserved Only for training and service purposes 3 Solder the connections CAUTION Maintain original spacing between the replaced component and adjacent componen
179. o D_ D_ S_RX S_RX S_RX S_RX S_RX S_RX S_RX S_RX S_RX S_RX S_RX S_RX1_EP S_RX2_AM S_RX2_AP S_RX2_BM S_RX2_BP S_RX2_CM S_RX2_CP z U z U bet des D E Ki Ki Ej UU O ado Dr pi Je z S_RX2_DM S_RX2_DP S_RX2_EM S_RX2_EP D_DATAEN _DATA4 _DATA5 _DATA6 _DATA7 _VAL _SOP _ERR LK S_RX2_CLKM S_RX2_CLKP DATAT TPO_CLK TPO_SOP TPO_VAL TPO_ERR TPO_DATAO TPO_DATA1 TPO_DATA2 lPO DATA TPO DATA4 lPO DATAS TPO_DATA6 PO_DATA7 AUDCLK_OUT DACLRCH DACSLRCH GPIO95 DACCLFCH GPIO94 DACSC DACLRC PCMI3LRCK GPIO8 PCMI3LRC PCMI3SCK GPIO80 IEC9580UT AUD SUBMCK AUD SUBLRCH AUD SUBSCK GPIO51 AUD SUBLRCK GPIO52 BTSCSEL DTS EN TXAON TXAOP TXAIN TXA1P TXA2N TXA2P TXACLKN TXACLKP TXA3N TXA3P TXA4N TXA4P TXBON TXBOP TXBIN TXB1P TXB2N TXB2P TXBCLKN TXBCLKP TXB3N TXB3P TXB4N TXB4P PWMO GPIO55 PWM1 GPIO54 PWM2 GP1053 PWM_IN NW AE27 pum CHB_CLK CHB_SYNC E CHB_VAL AD27 AD26 R200 ME AES a CHB_DATA AC26 SE ESA E USB CTL2 AB27 AF27 FE TS CLK XOU FE TS SYNC AG27 AA L FE TS VAL AF28 gt lt TPI_DVB_ERR AG26 FE TS DATA O ERSIS DATA OSHT AF26 FE_TS_DATA 1 AF25 FE_TS_DATA 2 AH26 FE_TS_DATA 3 AH25 FE_TS_DATA
180. o E 2 gt L2300 IC2301 2uH Oo oO ei ud m 3 6uH i oom o R AOZ1038PI at BLM18PG121SN1D Se STT e e e Em 12 LIT e e E TRE eles POWER_ON OFF2_3 sch a NOTE 17 E RO n NR8040T3R6N A boxes R2 C2302 Sh ET 8 sie C2341 i ong e a a E R23160 C231 C231 C231 C2352 Lh 62353 EX dE E2333 C2337 o ur Doan dr 3 a EE Wf S Placed on SMD TOP VIN Zo Ic 10uF 10uF 10uF 10uF 3300pF N IC2302 10 16v 2 d 22uF 22uF gt o e E 10v 10v 10v 10v 50V P 10v 16V CREE gt Si B c2311 OPT TPS54319TRE 10V 10v o pj T m oj o Sc P DU 2200pF dL 9 Jo co JA gt 230 Qaka 2 30 kol 2309 R2317 Ge A gt i u UE a 1 m p e 16V 16V 16 eel 6 po UN T Ji mo wor 0 SEI SE i EOS Elo E ZN o X P e fa RI yer 50V i e Re Ap o I lt Mm do e e 2 R2342 t a 1 16W 330K 5 o a ANA Jo fk E gt ORGIA S S R2340 C2330 j Ho 4700pF I s PEEN on POWER ON OFF2 1 o ES a e 15K IE T A o 0 1uF Gr R2 DEE 5 50V J d 16V i o TEE c S 4 Vout 0 6 1 R1 R2 Switching freq 400 580 Khz Ze T I l i i i E 2 pus i E E So i b 4 I l VON SO b274 EL RIZR2J Tay i 0 Vout 0 8 1 R1 R2 i a D D ex D D D D D D D D D D D D D D D D D D D D D D D D D D D D D D D GD TH N SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURE
181. on TV 2 Press EYE key of Adjustment remote control Step 2 At the Local Dimming mode module Edge Backlight moving right to left Back light of IOP module moving Step 3 Confirm the Local Dimming mode Step 4 Press exit i E 3 Cover the Eye Q Il sensor on the front of the using your E hand and wait for 6 seconds Local Dimming Demo ALEF Model INFO STL HOMIMOT Em PIP PR 4 Confirm that R G B value is lower than 10 of the Raw Data Sensor data Back light If after 6 seconds R G B value is not lower than 10 replace Eye Q Il sensor 4 5 Magic Motion Remote control test 1 Equipment RF Remote control for test IR KEY Code Remote control for test 2 You must confirm the battery power of RF Remote control Backlight before test recommend that change the battery per every lot DK 3 Sequence test 1 if you select the Start Mute key on the Adjustment remote control you can pairing with the TV SET 2 You can check the cursor on the TV Screen when select the OK key on the Adjustment remote control 3 You must remove the pairing with the TV Set by select OK key Mute key on the Adjustment remote control for 5 seconds Sensor Data 5 Remove your hand from the Eye Q II sensor and wait for 6 seconds 4 6 3D function test Pattern Generator MSHG 600 MSPG 6100 Support HDMI1 41 HDMI mode NO 872 pattern No 83 6 Confirm that ok pop up If change is not seen replace 1
182. orizontal line Gate TAB IC Defect Gate TAB IC Defect Gate TAB IC Defect Un repairable Cases In this case please exchange the module Horizontal Block Gate TAB IC Defect A 5 5 Copyright O 2012 LG Electronics Inc All rights reserved LGE Internal Use Only Only for training and service purposes Standard Repair Process Detail Technical Manual Error lt XXLM9600 gt Speakers Remote control and intelligent sensors Power indicator A17 Copyright O 2012 LG Electronics Inc All rights reserved Only for training and service purposes Establishec e B Power error Nopower Foz ann Buttons LGE Internal Use Only Standard Repair Process Detail Technical Manual Established B Powererror Nopower P ftl zonr 214 Content Check power input voltage and ST BY 3 5V lr AEN A18 lt XXLM9600 gt Check the DC 24V 12V 3 5V 24 Pin Power Board lt gt Main Board SMAW200 H24S YEONHO OF om 20V 24V 20V 24V GND N C Only LPB V sync Inverter On off N C 23 only Lamp SCANNING Model PWM Dim 2 A18 Copyright O 2012 LG Electronics Inc All rights reserved LGE Internal Use Only Only for training and service purposes Standard Repair Process Detail Technical Manual Error ishec B Power error No power Established 2011 12 14 symptom Checking method when power is ON Geen A19 lt XXLM9600 gt Check power o
183. p emm emm emm D emm D D D emm D emm D D D emm emm D D D D D D D D D emm l T Con EEPROM 32KBIT l VCC LCM 3 3V i I i e e e l R401 R420 TOFO 10K 10K AT24C32D SSHM T R421 R423 R424 RN TOK 2K 2K C AO VCC OPT O 1uF 16v A1 WP WP EEPROM TCON A2 SCL l e TCON SCL GND SDA TCON SDA R42 10K I2C Slave Address OxA6 Write Protection HIGH Write Protection LOW or NC Normal Operation i ep em emm emm emm emm emm emm P emm P emm P P emm emm emm emm P emm emm D emm D emm emm emm l THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X RADIATION FILRE AND ELECTRICAL SHOCK HAZARDS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE NN SYMBOL MARK OF THE SCHEMETIC WHEN SERVICING IF 15 Copyright 2012 LG Electronics Inc All rights reserved Only for training and service purposes SECRET LGElectronics IC401 LGE5812B 3 3VDD A D3 A5 VDD33 1 G D16 A14 VDD33 2 G E3 A16 VDD33 3 G E16 B VDD33 4 G F3 B2 VDD33 5 G F16 B5 VDD33 6 G G3 B14 VDD33 7 G G16 B15 VDD33 8 G H3 B16 VDD33 9 G H16 B17 VDD33_10 G 33 c2 VDD33_11 G J16 c3 VDD33 12 G K16 C4 VDD33 13 G 3 3AVDD_TX c5 G A R6 c6 AVDD33_TX_1 G R7 c7 AVDD33 TX 2 G R
184. ple Set A MODEL1_OPT_3 GP3_Soft touch GP4_TOOL Qu MODEL1_OPT_4 i m MODEL1_OPT_5 MODEL_OPT_5 NON_MHL MHL GP4 HIGH 2 MODELI OPT 6 MODEL OPT 6 NON GED GED U U U U U U J H x 5 A E ta E gt ea ta o I a E U 5 B o 3 3V_NORMAL gt E Eo s ad 9 5 B DE I UN gt amp B S E oe 405 5 For CEC e E ci E gt I a o a z Fa S D EE ES ax ax p 5 z lt s T o o Lo HO oo um Ze e ci 5 a H a ci E S i S A F a R3034 z B o O O I o et o o E a El SS Z 5 d B 2 gt 4 7K E E Io l a o co E 13 xi z on oN Oo de ER Eo Eo S Og LI co o On On on on OM f ge om om POWER_ON OFF1 C ER E 5 z a O EDID_WP Boe Q3 OVE ST e e 03000 A MMBT3904 NXP EDID_WP K 2 R3028 R3029 O N A MC8101_ABOV 31K Ee TACT_KEY o D3000 BAT54 SUZHO 1 CM3231_CAPELLA CM3231_CAPELLA CEC_REMOTE i a HDMI_CEC GP3 Soft touch GP4 Soft touch Q3001 RUE003N02 o Ti THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X RADIATION A orici HDMI CEC FET ROHM ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR SECRET DATE THE CRITICAL COMPONENTS IN THE AN SYMBOL MARK OF THE SCHEMETIC a LG ELELTRONILS SL LILK CHEE Copyright 2012 LG Electronics Inc All rights reserved LGE Internal Use Only Only for training and service purposes I
185. produced APP History Ver 25682 in production line because serial number D L is mandatory Eye Q Gain 5000 by D book 4 0 POL DB LGD ALEF SI2173 000001 Copyright O 2012 LG Electronics Inc All rights reserved a LGE Internal Use Only Only for training and service purposes Manual Download Model Name and Serial Number If the TV set is downloaded by OTA or service man sometimes model name or serial number is initialized Not always It is impossible to download by bar code scan so lt need Manual download 1 Press the Instart key of Adjustment remote control 2 Go to the menu 7 Model Number DIL like below photo 3 Input the Factory model name ex 42LD450 TA or Serial number like photo Model Number D L SKJY1107 1 Serial Num 4 Check the model name Instart menu Factory name displayed ex 47LM960V ZB 5 Check the Diagnostics DTV country only Buyer model displayed ex 47LM960V ZB 3 6 Cl Key checking method Check the Section 4 2 Check whether the key was downloaded or not at In Start menu Refer to below gt Check the Download to Cl Key value in LGset 3 6 1 Check the method of Cl Key value 1 Check the method on Instart menu 2 Check the method of RS232C Command 1 Into the main ass y mode RS232 aa 00 00 pa Ta fo Te 2 Check the key dovvnload for transmitted command RS232 ci 00 10 e Ja 9 3 Result value Normally status for download OKx
186. reserved LGE Internal Use Only Only for training and service purposes Standard Repair Process Detail Technical Manual Error i d D Function error mr 20 1214 symptom Revised Wifi operation checking method lt XXLM9600 gt A29 Copyright O 2012 LG Electronics Inc All rights reserved LGE Internal Use Only Only for training and service purposes
187. roken Solder defect CNT Broken Solder defect CNT Broken Abnormal Power Section Solder defect Short Crack Abnormal Power Section Solder defect Short Crack A 1 5 Copyright O 2012 LG Electronics Inc All rights reserved LGE Internal Use Only Only for training and service purposes Appendix Exchange T Con Board 2 Abnormal Power Section Abnormal Power Section Solder defect Short Crack M nod a wh e b KAN ii Ara VE E Abnormal Display GRADATION Noise GRADATION A 2 5 Copyright O 2012 LG Electronics Inc All rights reserved LGE Internal Use Only Only for training and service purposes Appendix Exchange LED driver Board PSU EM J No Light Dim Light Dim Light Dim Light No picture Sound Ok A 3 5 Copyright O 2012 LG Electronics Inc All rights reserved LGE Internal Use Only Only for training and service purposes Appendix Exchange the Module 1 Panel Mura Light leakage Panel Mura Light leakage Press damage BR Crosstalk Press damage Crosstalk Un repairable Cases In this case please exchange the module Press damage A 4 5 Copyright O 2012 LG Electronics Inc All rights reserved LGE Internal Use Only Only for training and service purposes Appendix Exchange the Module 2 Vertical Block Vertical Line Vertical Block Source TAB IC Defect Source TAB IC Defect Source TAB IC Defect Horizontal Block Horizontal Block H
188. sely inspect the solder area and remove any excess or splashed solder with a small wire bristle brush LGE Internal Use Only IC Remove Replacement Some chassis circuit boards have slotted holes oblong through which the IC leads are inserted and then bent flat against the cir cuit foil When holes are the slotted type the following technique should be used to remove and replace the IC When working with boards using the familiar round hole use the standard technique as outlined in paragraphs 5 and 6 above Removal 1 Desolder and straighten each IC lead in one operation by gently prying up on the lead with the soldering iron tip as the solder melts 2 Draw away the melted solder with an anti static suction type solder removal device or with solder braid before removing the IC Replacement 1 Carefully insert the replacement IC in the circuit board 2 Carefully bend each IC lead against the circuit foil pad and solder it 3 Clean the soldered areas with a small wire bristle brush It is not necessary to reapply acrylic coating to the areas Small Signal Discrete Transistor Removal Replacement 1 Remove the defective transistor by clipping its leads as close as possible to the component body 2 Bend into a U shape the end of each of three leads remaining on the circuit board 3 Bend into a U shape the replacement transistor leads 4 Connect the replacement transistor leads to the corresponding leads exte
189. t O 2012 LG Electronics Inc All rights reserved Only for training and service purposes rer Leakage Current Hot Check See below Figure Plug the AC cord directly into the AC outlet Do not use a line Isolation Transformer during this check Connect 1 5 K 10 watt resistor in parallel with a 0 15 uF capacitor between a known good earth ground Water Pipe Conduit etc and the exposed metallic parts Measure the AC voltage across the resistor using AC voltmeter with 1000 ohms volt or more sensitivity Reverse plug the AC cord into the AC outlet and repeat AC voltage measurements for each exposed metallic part Any voltage measured must not exceed 0 75 volt RMS which is corresponds to 0 5 MA In case any measurement is out of the limits specified there is possibility of shock hazard and the set must be checked and repaired before it is returned to the customer Leakage Current Hot Check circuit AC Volt meter Good Earth Ground such as WATER PIPE To Instrument s CONDUIT etc exposed METALLIC PARTS 1 5 Kohm 10W When 25A is impressed between Earth and 2nd Ground for 1 second Resistance must be less than 0 1 O Base on Adjustment standard LGE Internal Use Only SERVICING PRECAUTIONS CAUTION Before servicing receivers covered by this service manual and its supplements and addenda read and follow the SAFETY PRECAUTIONS on page 3 of this publication NOTE If unforeseen circumstances create conflict between
190. t O 2012 LG Electronics Inc All rights reserved LGE Internal Use Only Only for training and service purposes Standard Repair Process Detail Technical Manual Error PUER A Video error Video error video lag stop SZ 20 1214 symptom TUNER input signal strength checking method Geen DEN ate ALL MODELS Settings 2 Set up Manual Tuning gt select channel Manual Tuning DTV When the signal is strong use the UHF CH attenuator 10dB 15dB 20dB etc Frequency kHz 546000 Update nmt Copyright O 2012 LG Electronics Inc All rights reserved Only for training and service purposes A6 LGE Internal Use Only Standard Repair Process Detail Technical Manual Error Established symptom A Video error Video error video lag stop LCD TV Version checking method bog DE 1 Checking method for remote controller for adjustment IN START Model Name GLOBAL PLAT4 1 Adjust Check 2 ADC Data i ER 3 Power Off Status 1 00 4 System 1 TM E po 3 Version Aa System 10 yi 80 l Model Number D L Tp 8 8 Test Option 10 9 Spread Spectrum I 10 Sync Level 00 1E B2 C3 26 20 11 Stable Count BD 12 Local Dimming 13 SDP Server Selection 14 Network Error History 15 RF Remocon Test Access Code Debug Status EASE t Status 0 o C A APP History Ve 40930 deas Eye Q Gain 316r AS 0 POL DB LGD AEF SI2176 XXXXXX 8 3 Press the IN ST
191. the following servicing precautions and any of the safety precautions on page 3 of this publication always follow the safety precautions Remember Safety First General Servicing Precautions 1 Always unplug the receiver AC power cord from the AC power source before a Removing or reinstalling any component circuit board mod ule or any other receiver assembly b Disconnecting or reconnecting any receiver electrical plug or other electrical connection c Connecting a test substitute in parallel with an electrolytic capacitor in the receiver CAUTION A wrong part substitution or incorrect polarity installation of electrolytic capacitors may result in an explo sion hazard 2 Test high voltage only by measuring it with an appropriate high voltage meter or other voltage measuring device DVM FETVOM etc equipped with a suitable high voltage probe Do not test high voltage by drawing an arc 3 Do not spray chemicals on or near this receiver or any of its assemblies 4 Unless specified otherwise in this service manual clean electrical contacts only by applying the following mixture to the contacts with a pipe cleaner cotton tipped stick or comparable non abrasive applicator 10 by volume Acetone and 90 by volume isopropyl alcohol 90 99 strength CAUTION This is a flammable mixture Unless specified otherwise in this service manual lubrication of contacts in not required 5 Do not defeat any plug socket B
192. tic electricity suf ficient to damage an ES device General Soldering Guidelines 1 Use a grounded tip low wattage soldering iron and appropriate tip size and shape that will maintain tip temperature within the range or 500 F to 600 F 2 Use an appropriate gauge of RMA resin core solder composed of 60 parts tin 40 parts lead 3 Keep the soldering iron tip clean and well tinned 4 Thoroughly clean the surfaces to be soldered Use a mall wire bristle 0 5 inch or 1 25 cm brush with a metal handle Do not use freon propelled spray on cleaners 5 Use the following unsoldering technique a Allow the soldering iron tip to reach normal temperature 500 F to 600 F b Heat the component lead until the solder melts c Quickly draw the melted solder with an anti static suction type solder removal device or with solder braid CAUTION Work quickly to avoid overheating the circuit board printed foil 6 Use the following soldering technique a Allow the soldering iron tip to reach a normal temperature 500 F to 600 F b First hold the soldering iron tip and solder the strand against the component lead until the solder melts c Quickly move the soldering iron tip to the junction of the component lead and the printed circuit foil and hold it there only until the solder flows onto and around both the compo nent lead and the foil CAUTION Work quickly to avoid overheating the circuit board printed foil d Clo
193. ts and the circuit board to prevent excessive component temperatures Circuit Board Foil Repair Excessive heat applied to the copper foil of any printed circuit board will weaken the adhesive that bonds the foil to the circuit board causing the foil to separate from or lift off the board The following guidelines and procedures should be followed whenever this condition is encountered At IC Connections To repair a defective copper pattern at IC connections use the following procedure to install a jumper wire on the copper pattern side of the circuit board Use this technique only on IC connec tions 1 Carefully remove the damaged copper pattern with a sharp knife Remove only as much copper as absolutely necessary 2 carefully scratch away the solder resist and acrylic coating if used from the end of the remaining copper pattern 3 Bend a small U in one end of a small gauge jumper wire and carefully crimp it around the IC pin Solder the IC connection 4 Route the jumper wire along the path of the out away copper pattern and let it overlap the previously scraped end of the good copper pattern Solder the overlapped area and clip off any excess jumper wire At Other Connections Use the following technique to repair the defective copper pattern at connections other than IC Pins This technique involves the installation of a jumper wire on the component side of the circuit board 1 Remove the defective copper pattern w
194. voltage interlocks with which receivers covered by this service manual might be equipped 6 Do not apply AC power to this instrument and or any of its electrical assemblies unless all solid state device heat sinks are correctly installed 7 Always connect the test receiver ground lead to the receiver chassis ground before connecting the test receiver positive lead Always remove the test receiver ground lead last 8 Use with this receiver only the test fixtures specified in this service manual CAUTION Do not connect the test fixture ground strap to any heat sink in this receiver Electrostatically Sensitive ES Devices Some semiconductor solid state devices can be damaged eas ily by static electricity Such components commonly are called Electrostatically Sensitive ES Devices Examples of typical ES devices are integrated circuits and some field effect transistors and semiconductor chip components The following techniques should be used to help reduce the incidence of component dam age caused by static by static electricity 1 Immediately before handling any semiconductor component or semiconductor equipped assembly drain off any electrostatic charge on your body by touching a known earth ground Alter natively obtain and wear a commercially available discharging wrist strap device which should be removed to prevent poten tial shock reasons prior to applying power to the unit under test Copyright O 2012 LG El

LG Electronics 70HA Flat Panel Television User Manual

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