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Emerson MVME2500 Computer Accessories User Manual

1. 108 6 6 Updating U Boot od acm Eee a R 110 2 4 0 VEM IE 113 MEO Dj 113 7 2 Reset Configuration sun Ret biR ee een aaa 113 7 3 Interrupt 2 7 2 117 7 4 2CBusDevice Addressing 2 2 4 118 7 5 Ethernet PHY Address ent 118 7 6 Other Software 119 76 1 MRAM nee nee DUUM PPP RE TEC XT eqs 119 7 6 2 Real Time Clock uud Leste deo ours cg ene een eo eb Py egt oat 119 7 6 3 Quad 595 ec ana a aa 119 7 6 4 LBC Timing Parameters eee nn aa ne 120 4 4 Clock Distribution Re een 121 7 7 1 SystemClock in en a 122 74 2 Real Time Clocklnput m poro trt RR PEE m 123 7 7 3 Local Bus Controller Clock 123 A ReplacingtheBattany ass ann Mu Siti S esse de 125 A Replacing theB ttery ne en ma 125 B Related Documentation secre ra erp en 129 Emerson Network Power Embedded Computing Documents 129 B 2 Manufacturers 2 2 130
2. 35 3 11 Board EayoUt a RER 35 3 2 Front Panel re ea a ne 36 3 2 1 Reset essen ee ee ke lbs iu 37 3 3 WEDS his na Tre re en 37 3 321 Front Panel LEDS nes a eee RN E Ye auda de 37 3 3 2 Onboard LEDS ees de ete t n e eese cse nee ERIS OR ERU we 39 3 4 5 nes anreisen D bia sed 39 3 4 1 Front Panel 4 2 40 3 4 1 1 RJ45 with Integrated Magnetics 1 40 3 4 1 2 FrontPanelSerialPort JA 24 41 MVME2500 Installation and Use 6806800L01H 3 Contents 3 4 1 3 USB 5 2 2 42 3 4 1 4 VMEBus Pl 42 3 4 1 5 VMEBus P2 44 3 4 2 OnboardConnectors 2 2 4 45 3 4 2 1 Flash Program 7 45 3 4 2 2 SATA Connector J3 4 46 3 4 2 3 5 unse PR RR RAE Rex 47 3 4 2 4 JTAG Connector P6 2 2 22 2 52 3 4 2 5 6
3. 2 4 10 SATA Interface 224 22 wec cece Des 4 11 VME 5 eu A aa seriem teretes 4 11 1 Tsi148 VME 4 12 USB M 4 13 12 Devices nenn ee 4 14 Reset Control 2 24 2 4 15 Power Management 4 15 1 Onboard Voltage Supply 4 15 2 Power Up Sequencing 4 16 ClocksStruct re uscire er rH ee 4 17 Reset Structure u ern Ret Ee en 4 17 1 ResetSequence u tr ern bre eT Eh nie be 4 18 Thermal Management 4 19 Real Time 5 4 20 Debugging Support seo ret RE aa 4 20 1 POST Code Indicator 4 20 2 JTAG Chain and Board 4 20 3 Custom Debugging 2 4 21 Rear Transition Module MVME2500 Installation and Use 6806800L01H Contents Contents 5 Memory Mapsand ne E aa 81 NE RIIMC E eg 81 5 27 Memory Map u a ee RE RT e EPC DE C PO RE RE RE 81 5 3 FlashiMemoty Map y nennen
4. 2 2 46 Table 3 10 PMG 11 ee ee ae 47 Table 3 11 PME 12 Connector me 48 Table 3 12 PMC J13 Connector 49 Table 3 13 erre co ten ree tr cete Xx separe 51 Table 3 14 JTAG 2 2 2 4 nenne a E a 52 Table 3 15 COP Header PTO e Deer Jes ete Gated eee RN RR ea 54 Table 3 16 SD 2 2 2 2 2 2 2 24 2 2 54 Table 3 17 Connector XJ2 Pinout 2 2 55 Table 3 18 P20x0 Debug Header eo piger ete teret pO een 56 Table 3 19 Geographical Address Switch 58 Table 3 20 Geographical Address Switch Settings 59 Table 4 1 Voltage Supply Requirement 74 Table 4 2 Thermal Interrupt 77 Table 4 3 POST Code Indicator onthe LED 2 78 Table 4 4 Transition Module Features 79 Table 5 1 Physical Address Renee 81 Table 5 2 Flash Memory Map 4 2 82 Table 5 3 Linux Devices Memory Map
5. 96 5 5 17 PLD Watchdog Control 97 5 5 18 PLD Watchdog Timer Count 97 5 6 men an 98 5 6 1 Prescaler Register zu ER RAS eos 98 5 6 2 Control Registers XR rr RICE X RE e ER un 99 5 6 3 Compare High and Low Word 100 5 6 4 Counter High and Low Word 101 6 Boot Systems icis Ur URS ea 103 MEO JUI 103 6 2 ACCESSING U BOOF un ee see RI UU CU mI RR e 103 6 3 IBoot Options ccs eset ee ERE UHR VO HE oeste Dee ein 104 6 3 1 Booting from a 2 1 104 6 MVME2500 Installation and Use 6806800L01H Contents ee 6 3 2 Booting from an Optional SATA 105 6 3 3 Booting from a USB Drive 105 6 3 4 Booting from an SD 2 22 106 6 3 5 Booting VxWorks Through the 106 6 4 Using the Persistent Memory Feature 107 6 5 MVME2500 Specific 0
6. 13 E IMEroducHen essen 19 1 1 GT 19 1 2 Standard Compliances 4 21 1 3 Mechanical u ann en me yay dave end edie sha Wale ann 22 1 4 Ordering Information 2 2 2 2 2 2 2 2 2 22 1 5 Broductldentificatioh 22 dere es st 24 2 Hardware Preparation and Installation 25 221 OVeIVIBW ee Pea e cep YE Y XXX YT ERES 25 2 2 Unpacking and Inspecting 26 2 3 Eph aetna 26 2 3 1 Environmental 27 2 3 2 Power Requirements be 28 2 3 3 Equipment 2 2 2 29 2 4 Configuring the Board u rn een nn 29 2 5 Installing Accessories nn nase ee en 30 2 5 1 RearTransition 2 2 4 4 30 2 5 2 PMC XMC Support nee nee ae ar ner en 31 2 6 Installing and Removing the 32 2 7 Completing the Installation 34 3 Controls LEDs and
7. 2 82 Table 5 4 PLD Revision Register uocem nem a 84 Table 5 5 PLD Year Register u ann 84 MVME2500 Installation and Use 6806800L01H 9 List of Tables Table 5 6 PLD Month Register 85 Table 5 7 PLD Day cir eere axe hr ERR REG aA Y 85 Table 5 8 PLD Sequernce Register etn pex rei rr ert LEER RI de edad OLEI RR ce o 85 Table 5 9 PLD Power Good 86 Table 5 10 PED LED Control Register 2 5 unse eR er VU AI ween 87 Table 5 11 PLD PCI PMC XMC 88 Table 5 12 PLD U Boot and TSI Monitor Register 89 Table 5 13 PLD Boot Bank Register 89 Table 5 14 PLD Write Protect and I2C Debug 91 Table 5 15 PLD Test R gister T ores herir ee UR RR kan 93 Table 5 16 PED Test Register 2 Nea 93 Table 5 17 PLD GPIO2 Interrupt Register 94 Table 5 18 PLD Shutdown and Reset Control and Reset Reason 95 Table 5 19 PLD Watchdog Timer Refresh Register
8. 130 Table B 3 Related Specifications 130 10 MVME2500 Installation and Use 6806800L01H List of Figures Figure 1 1 Serial Number Location 24 Figure 3 1 Component Layout cese en 35 Figure 3 2 Front Panel LEDs Connectors and 5 36 Figure 3 3 Front Panel LEDS erre ee 37 Figure 3 4 Onboard eem 39 Figure 3 5 Geographical Address Switch en ee eh 58 Figure 3 6 SMT Configuration Switch Position ann na 59 Figure 4 1 Block Diagratti nat e IURE NOR near 61 Figure 4 2 SPI Device Multiplexing Logic 2 69 Figure 4 3 Clock Distribution 76 Figure A 1 Battery Location ee dene eke tbe tr 125 MVME2500 Installation and Use 6806800L01H 11 List of Figures 12 MVME2500 Installation and Use 6806800L01H About this Manual Overview of Contents This manual is divided into the following chapters and appendices e Introduction gives an overview of the features of the product standard compliances mechanical data and ordering information e Hardware Preparation and Installation outlines the installation requirements hardware accessories switch settings and installation procedures e Controls LEDs and
9. 4 54 3 4 2 6 SD Connector 2 secet eere rr 54 3 4 2 7 2 55 3 4 2 8 Miscellaneous P2020 Debug Connectors 56 3 5 SWILChes ice nee e icon EA Eo Gls Riu Paene e Hed ecd 57 3 5 1 Geographical Address Switch 51 57 3 5 2 SMT Configuration Switch 52 59 4 Functional DescripHOonm ec voor pP POP PIRE REIHE re 61 4 1 BlockDiaqgram a ana ee VER RES D PORE Y eerta 61 42 CTP SOU 61 4 2 1 6500 Processor Core so ceeds ee Rer RR DU EE ERE EX Y E Re PETS 62 4 2 2 Integrated Memory 62 4 2 3 PCI Express Interface 63 4 2 4 Local Bus 2 2 63 4 2 5 Secure Digital Hub Controller 5 63 4 2 6 I2Clnt rface anne an Re in 63 4 2 7 JdJSBInterface au ns een 63 4 2 8 225 22 ne een ae en 64 4 2 9 Controller een se sr ae 64 4 2 10 Enhanced Three Speed Ethernet 5 64 4 2 11 Genera
10. PC MC SEL READY N N IXCAP OPER R RESET 0 0 0 Field Description PMC XMC SEL XMC or PMC Selection Switch 1 XMC 0 PMC PMC1_EREADY Indicates that the PrPMC module is installed in PMC site 1 PrPMC is ready for enumeration or no PrPMC is installed 0 PrPMC is not ready for enumeration PMCIP N PMC Presence Indicator 1 PMCis not present 0 PMC is present XMCP1_N XMC Presence Indicator 1 not present 0 XMCis present PCI1_PCIXCAP PCI Capability Indicator 1 PCI X capable 0 PCI capable MVME2500 Installation and Use 6806800L01H Memory Maps and Registers 5 5 9 PLD U Boot and TSI Monitor Register The MVME2500 PLD provides an 8 bit register which indicates the status of the U Boot s normal environment switch and TSI interface signals Table 5 12 PLD U Boot and TSI Monitor Register EG it R m 7 p p p pp T PLD PCI MNTR OXFFDFOOTF 5 5 10 MVME2500 Field Description BDFAIL_N TSI148 BDFAIL_N Pin out 1 No TSI Fail 0 TSI Fail NORMAL ENV Normal Environment Switch Indicator 1 Use safe 0 Use normal ENV SCON System Controller Indicator 1 System Controller 0 Non system Controller PLD Boot Bank Register The MVME2500 PLD provides an 8 bit register which is used to declare successful U Boot loading indicating the SPI boot bank priority and actual SPI bank it booted from Table 5 13
11. Related 5 2 2 130 MVME2500 Installation and Use 6806800L01H 7 Contents 133 137 ar T IIT 143 8 MVME2500 Installation and Use 6806800L01H List of Tables Table 1 1 Key Features ofthe 2500 2 19 Table 1 2 Board Standard Compliances 21 Table 1 3 Mechanical Data cni las ame re 22 Table 1 4 Available Board Variants 2 22 Table 1 5 Available Board Accessories 23 Table 2 1 Environmental Requirements 27 Table 2 2 PowerRequirements 4 5 err san 28 Table 3 1 ErontiPanel LEEDS ee ge 38 Table 3 2 Onboard LEDs Status 2 22 22 39 Table 3 3 Front Panel Tri Speed Ethernet Connector J1 40 Table 3 4 Front Panel Serial 4 202 02074 41 Table 3 5 USB Connector 5 ie 42 Table 3 6 VMEbus PT Connector ns nee nn ne 42 Table 3 7 VMEbus P2 Connector 44 Table 3 8 Flash Programming Header P7 45 Table 3 9 Custom SATA Connector J3
12. 96 Table 5 20 PLD Watchdog Control Register 97 Table 5 21 PLD Watchdog Timer Count Register 97 Table 5 22 Prescaler Registern ed eae ne dente 98 Table 5 23 Control cere up tha sores een He XP PE EE 99 Table 5 24 Compare High Word Registers 100 Table 5 25 Compare Low Word 100 Table 5 26 Counter High Word Registers 101 Table 5 27 Counter Low Word 101 Table 6 1 MVME2500 Specific U Boot 5 108 Table 7 1 POR Configuration 5 65 113 Table 7 2 MVME2500 Interrupt 6 2 117 Table 7 3 2 Bus Device 2 118 Table 7 4 PHY Types and Management Bus Address 118 Table 7 5 LBC Timing Parameters u nenn 120 Table 7 6 Clock DistriD tion een ame ea 121 Table 7 7 System Clock 15 erre eerte ee erre RR nen 122 Table B 1 Emerson Network Power Embedded Computing Publications 129 Table B 2 Manufacturers Publications
13. Signal Name NORMAL ENV BLOCK Description Notes Safe Start ON Use normal ENV OFF Use safe ENV Boot Block B Select OFF WP Disabled FLASH_WP_N SPI Flash Write Protect OFF PMC OFF 133 MHz PMC_XMC_SEL PMC_133 MVME2500 Installation and Use 6806800L01H XMC or PMC selection Will select if XMC card or switch PMC card is used PCI frequency selection 59 Controls LEDs and Connectors Table 3 20 Geographical Address Switch Settings continued SW2 DEFAULT Signal Name Description Notes OFF WP Enabled MASTER_WP_DISA Write Protect Disable For I2C write protect only BLED switch OFF Front MUX SEL User Defined switch that will select if the GBE PHY will function on the front panel or on the Back PLANE OFF CPU Reset Reserved Should be OFF for normal Deasserted operation 60 MVME2500 Installation and Use 6806800L01H Chapter 4 Functional Description 4 1 4 2 Block Diagram The MVME2500 block diagram is illustrated in Figure 4 1 All variants provide front panel access to one serial port via a micro mini DB 9 connector two 10 100 1000 Ethernet port oneis configurable to be routed on the front panel or to the rear panel through a ganged RJ45 connector and one Type A USB Port It includes Board Fail LED indicator user defined LED indicator and a ABORT RESET switch Figure4 1 Block Diagram m m m
14. 6 2 Overview The MVME2500 uses Das U Boot a boot loader software based on the GNU Public License It boots the blade and is the first software to be executed after the system is powered on Its main functions are Initialize the hardware e Pass boot parameters to the Linux kernel Start the Linux kernel Update Linux kernel and U Boot images This section describes U Boot features and procedures that are specific to the MVME2500 For general information on U Boot see http www denx de wiki UBoot WebHome Accessing U Boot 1 Connect the board to a computer with a serial interface connector and a terminal emulation software running on it The serial connector of the board is found on the face plate 2 Configure the terminal software to use the access parameters that are specified in U Boot By default the access parameters are as follows e Baud rate 9600 PCANSI 8 data bits No parity 1 stop bit These serial access parameters are the default values These can be changed from within the U Boot For details referto the U Boot documentation 3 Bootthe MVME2500 4 When prompted press the h key MVME2500 Installation and Use 6806800L01H 103 Boot System U Boot aborts the boot sequence and enters into a command line interface mode YE Enterthe command setenv bootdelay 1 saveenv to disable the U Boot auto boot M feature and let the U Boot directly enter the command line interface after t
15. Frequency Clock Tree Source QorlQ P20x0 QorlQ P20x0 QorlQ P20x0 ICS8405071 CPU DDR CLK CLK PCI BR3 EC GTX CLK125 CLK_25MHZ_ICS840507 100MHz 1 58405071 3 3 ICS83905AGILF 88SE6121 CLK_88SE6121_25MHZ ICS83905AGILF ICS9FG108 25MHZ 1 59 0108 ICS83905AGILF BCM54616S BCM54616S MVME2500 Installation and Use 6806800L01H BP_PHY_25MHZ_CLK FP_PHY_25MHZ_CLK ICS83905AGILF ICS83905AGILF 121 Programming Model Table 7 6 Clock Distribution continued Device Clock Signal Frequency Clock Tree Source VIO 546165 SW 25MHZ CLK ICS83905AGILF 3 3V XMC CLK_XMC1 ICS9FG108 DIFF QorlQ P20x0 SD REF CLK ICS9FG109 DIFF TSI384 ICS9FG110 DIFF TSI384 CLK ICS9FG111 DIFF 88SE6121 CLK 88SE6121 PCIE 100MH ICS9FG112 DIFF Z FPGA CLK_CPLD 1 8432MHz 43 3V USB USB 1 24MHZ 24MHz 3 3V QorlQ P20x0 CPU_RTC 1MHz FPGA 3 3V PMC 1 33 66 100 133 151384 3 3V hz TSI148 CLK PCI BR3 133Mhz 1 58405071 3 3V RTC CLK 32K 32 768KHz DS32KHz 3 3V FPGA CPU LCKO 25MHz QorlQ P20x0 3 3V QUART QUART 1 8432MHz FPGA 3 3V 1 583905 25MHZ 1 59 0108 25Mhz ICS83905AGILF 3 3V 7 7 1 System Clock The system and DDR clock is driven by ICS8405071 The following table defines the clock frequency Table 7 7 System Clock SYSCLK CORE CCB Clock Platform DDR3 100MHz 800 1200 MHz
16. January 2013 January 2014 Updated Standard Compliances on page 21 Added Flash Memory Map on page 82 and updated SPI Flash Memory on page 67 MVME2500 Installation and Use 6806800L01H Introducti Chapter 1 1 1 MVME2500 Installation and Use 6806800L01H Overview The MVME2500 is a VMEbus board based on the Freescale QorlQ P2010 single core or P2020 dual core processor It has a 6U form factor and has an expansion slot for an optional PCI Mezzanine Card PMC or PCI eXpress Mezzanine Card XMC It comes with either 1 GB or 2 GB of DDR3 SDRAM and is offered with either IEEE 1101 10 compliant or SCANBE ejector handles The front panel I O configuration consists of two RJ45 10 100 1000BASE T Ethernet ports a USB 2 0 port a Micro DB9 5 232 serial console port and a reset abort switch It also has an LED to signal board failure and another LED that can be configured in the LED register rear I O includes support for VMEbus Legacy VME VME 64 VME64x and 2eSST rear I O RTM through VME P2 two 10 100 1000BASE T Ethernet four UART and RTM I2C Presence Power See the table below for a summary of the features of the MVME2500 Table 1 1 Key Features of the MVME2500 Function Processor Features Freescale QorlQ P2010 single core or P2020 dual core 800 MHz or 1000 MHz core frequency 512 KB L2 cache Three 10 100 1000 Mbps enhanced three speed Ethernet control
17. Memory Maps and Registers 5 5 14 PLD GPIO2 Interrupt Register The Abort switch Tick Timer 0 1 and 2 interrupts are ORed together The MVME2500 provides an interrupt register that the system software reads to determine which device the interrupt originated from GPIO2 will be driven low if any of the interrupts asserts Table 5 17 PLD GPIO2 Interrupt Register PLD Write Protect I2C OxFFDF0095 RSVD RSVD RSVD RSVD PME INT TICK1 INT TICK2 INT OPER i o a Field Description NMI Abort switch interrupt if pressed less than three seconds 1 Interrupt enabled 0 No Interrupt TICKO_INT Tick Timer 0 interrupt 1 Interrupt enabled 0 No Interrupt TICK1_INT Tick Timer 1 interrupt 1 Interrupt enabled 0 No Interrupt TICK2_INT Tick Timer 2 interrupt 1 Interrupt enabled 0 No Interrupt 94 MVME2500 Installation and Use 6806800L01H Memory Maps and Registers 5 5 15 PLD Shutdown and Reset Control and Reset Reason Register The MVME2500 provides an 8 bit register to execute the shutdown and reset commands The board s reset reason is also included in this register Table 5 18 PLD Shutdown and Reset Control and Reset Reason Register REG PLD Shutdown and Reset Reason OxFFDFOOFF Field AUTO SH Shutdown Soft RST Clear Cause CPU RESET WD TIME LRSTO Sft RST MASK OUT R OPER R W W RESET 0 0 0 0 X X X X Field Descripti
18. 00000 SFile dtp Bootthe Linux in memory bootm 1000000 2000000 c00000 Booting from a USB Drive 1 Make surethatthe kernel dtb and ramdi sk are saved in the USB drive with FAT partition Configure the U Boot environment variable setenv File ulImage kernel image setenv File dtp kernel dtb setenv File ramdisk lt ramdisk gt saveenv Initialize USB drive usb start Load the files from the USB drive to the memory option usb interface 0 1 device 0 partition 1 fatload usb 0 1 1000000 File_ulmage fatload usb 0 1 2000000 File_ramdisk fatload usb 0 1 c00000 File_dtb Bootthe Linux in memory bootm 1000000 2000000 c00000 MVME2500 Installation and Use 6806800L01H 105 Boot System 6 3 4 6 3 5 106 Booting from an SD Card 1 sure thatthe kernel dtb and ramdisk are saved in the SD card with FAT partition 2 Configure the U Boot environment variable setenv File uImage kernel image setenv File dtp kernel dtb gt setenv File ramdisk lt ramdisk gt 3 Initialize SD card mmcinfo 4 Load the files from the SD card to the memory option mmc interface 0 1 device 0 partition 1 fatload mmc 0 1 1000000 File_ulmage fatload mmc 0 1 2000000 File_ramdisk fatload mmc 0 1 c00000 5 11 dtp 5 Bootthe Linux in memory bootm 1000000 2000000 c00000 Booting VxWorks Through the Network In this mode the U Boot downloads
19. Embedded Computing for Business Critical Continuity MVME2500 Installation and Use P N 6806800L01H January 2014 EMERSON Network Power 2014 Emerson All rights reserved Trademarks Emerson Business Critical Continuity Emerson Network Power and the Emerson Network Power logo are trademarks and service marks of Emerson Electric Co 9 2014 Emerson Electric Co All other product or service names are the property of their respective owners Intel is a trademark or registered trademark of Intel Corporation or its subsidiaries in the United States and other countries Java and all other Java based marks are trademarks or registered trademarks of Sun Microsystems Inc in the U S and other countries Microsoft Windows and Windows Me are registered trademarks of Microsoft Corporation and Windows is a trademark of Microsoft Corporation PICMG CompactPCI AdvancedTCA and the PICMG CompactPCI and AdvancedTCA logos are registered trademarks of the PCI Industrial Computer Manufacturers Group UNIX is a registered trademark of The Open Group in the United States and other countries Notice While reasonable efforts have been made to assure the accuracy of this document Emerson assumes no liability resulting from any omissions in this document or from the use of the information obtained therein Emerson reserves the right to revise this document and to make changes from time to time in the conte
20. Functional Description 4 2 13 4 2 14 4 3 4 4 4 4 1 Common On Chip Processor COP The COP is the debug interface of the QorlQ P20x0 Processor It allows a remote computer system to access and control the internal operation of the processor The COP interface connects primarily through the JTAG and has additional status monitoring signals The COP has additional features like breakpoints watch points register and memory examination modification and other standard debugging features P20x0 Hardware Configuration Pins Aseries of strapping pins are required to initialize the P20x0 These pins are samples during the assertion of HRESET and return to their assigned function after HRESET is deasserted System Memory The processor integrated memory controller supports both DDR2 and DDR3 memory devices It has one channel and can be configured for up to four memory banks with x8 x16 and x32 devices Using 4 GB devices allows support of up to 16 GB of memory ECC is not supported The MVME2500 has a total of eight board variants half of which has soldered 2 GB memory while the remaining half has 16 GB memeory The x8 or 1 Gbit device forms 2 GB and 1 GB memory capacity A total of 16 devices for 2 GB and eight devices are used to form 16 GB MVME2500 supports ENP1 and ENP2 operating environment The ENP1 environment uses Samsung for all variants including the commercial grade devices while the ENP2 variants use Micron Timer
21. Memory Maps and Registers 2 DEBUG EN I2C debug ports I2C 1 DandI2C 1 C enable 1 Drive Enabled 0 Drive Disabled SERIAL FLASH WP SPI devices write protect register 1 Write protect enabled 0 Write protect disabled I2C 1 D I2C debug port Data 12C_DEBUG_EN 0 HiZ Tri Stated 2 DEBUG EN 1 1 Driven High 0 Driven Low I2C_1_C I2C debug port Clock 2 DEBUG 0 HiZ Tri Stated 2 DEBUG 1 1 Driven High 0 Driven Low When SERIAL FLASH WPis set to Low this port will automatically read as low due to AND connection between the two ports 92 MVME2500 Installation and Use 6806800L01H Memory Maps and Registers 5 5 12 5 5 13 MVME2500 Installation and Use 6806800L01H PLD Test Register 1 The MVME2500 PLD provides an 8 bit general purpose read write register which can be used by the software for PLD testing or general status bit storage Table 5 15 PLD Test Register 1 REG PLD Test Register 1 OXFFDF0080 Field TEST REGIT OPER R W RESET 00 Field Description TEST REG1 General purpose 8 bit R W field PLD Test Register 2 The MVME2500 PLD provides an 8 bit general purpose read write register which can be used by the software for PLD testing or general status bit storage Table 5 16 PLD Test Register 2 PLD Test Register 2 OXFFDF0081 ees sp Field TEST REG2 RESET Field Description TEST REG2 General purpose 8 bit R W field 93
22. Memory Maps and Registers 5 5 17 PLD Watchdog Control Register The MVME2500 provides a watchdog control register Table 5 20 PLD Watchdog Control Register REG PLD Watch Dog Timer Load OxFFC80604 ee Des Tu v To 8 T T T pp R OPER R RESET 0000 Field Description EN Enable If cleared the watchdog timer is disabled If set the watchdog timer is enabled 5 5 18 PLD Watchdog Timer Count Register The MVME2500 provides a watchdog timer count register Table 5 21 PLD Watchdog Timer Count Register PLD Watchdog Timer Count Oxffc80606 15 0 Count R W OxEA60 60secs MVME2500 Installation and Use 6806800L01H 97 Memory Maps and Registers Field Description Count Count These bits define the watchdog timer count value When the watchdog counter is enabled it will count up from zero reset value with a 1 msresolutionuntil it reaches the COUNT value set by this register Watchdog will generate a soft reset signal if it bites Setting this register to OXEA60 or 60 000 counts will provide a watchdog timeout of 60 seconds 5 6 External Timer Registers The MVME2500 provides a set of tick timer registers to access the three external timers implemented in the timers registers PLD These registers are 32 bit and are word writable The following sections describe the timer prescaler and control registers 5 6 1 Prescaler Register The prescaler adjust value is deter
23. OXFFDF0000 7 PLD Rev R Field Description PLD REV 8 bit field containing the current timer register PLD revision The revision number starts at 01 5 5 2 Year Register The MVME2500 PLD provides an 8 bit register which contains the build year of the timers registers PLD Table 5 5 PLD Year Register PLD Year Register OXFFDF0004 84 MVME2500 Installation and Use 6806800L01H Memory Maps and Registers 2 9 3 5 5 4 5 5 5 PLD Month Register The MVME2500 PLD provides an 8 bit register which contains the build month of the timers registers PLD Table 5 6 PLD Month Register REG PLD Year Register OXFFDF0005 PLD Day Register MVME2500 PLD provides an 8 bit register which contains the build day of the timers registers PLD Table 5 7 PLD Day Register REG PLD Revision Register OXFFDF0006 PLD Sequence Register The MVME2500 PLD provides an 8 bit register which contains the sequence of the PLD which is in synchrony with the PCB version Table 5 8 PLD Sequence Register PLD Revision Register OxFFDF0007 Hu cM qu qe ue quc pe veg MVME2500 Installation and Use 6806800L01H 85 Memory Maps and Registers 5 5 6 86 Table 5 8 PLD Sequence Register REG PLD Revision Register OXFFDF0007 PLD Power Good Monitor Register The MVME2500 PLD provides an 8 bit register which indicates the i
24. 400 MHz 400MHz 25MHz 122 MVME2500 Installation and Use 6806800L01H Programming Model 7 7 2 Real Time Clock Input TheRTC clock input is driven by a 1 MHz clock generated by the FPGA This provides a fixed clock reference for the QorlQ 20 0 PIC timers which the software can use as a known time reference 7 7 3 Local Bus Controller Clock Divisor Thelocal bus controller LBC clock output is connected to the FPGA for LBC bus transaction It is also the source of 1 MHz CPU RTC and FPGA tick timers MVME2500 Installation and Use 6806800L01H 123 Programming Model 124 MVME2500 Installation and Use 6806800L01H Replacing the Battery A 1 Replacing the Battery The figure below shows the location of the board battery Figure A 1 X Battery Location MVME2500 Installation and Use 6806800L01H 125 Replacing the Battery The battery provides seven years of data retention summing up all periods of actual data use Emerson therefore assumes that there is usually no need to replace the battery except for example in case of long term spare part handling Board System Damage e Incorrect replacement of lithium batteries can result in a hazardous explosion When replacing the on board lithium battery make sure that the new and the old battery are exactly the same battery models e Ifthe respective battery model is not available conta
25. 82 5 4 Linux Devices Memory 82 5 5 Programmable Logic Device PLD Registers 84 5 5 1 PLD Revision Register i aa 84 5 5 2 PLD eec or rhet alias 84 5 5 3 PLD Month Register ER UE DRE ERR Run 85 5 5 4 PLD D y Registen aaa ee DEDERE KE EH DR C nene eh 85 5 3 9 PLID Sequerice Register Ere yer peer ERE 85 5 5 6 PLD Power Good Monitor Register 86 5 5 7 PLD LED Control 87 5 5 8 PLD PCI PMC XMC 88 5 5 9 PLD U Boot and TSI Monitor 89 5 5 10 PLD Boot Bank 89 5 5 11 PLD Write Protect and I2C Debug Register 91 5 29 12 PED Test Register o nee nee ee e me meret 93 5 29 13 PLD Test Register 2 5 texere bri b eee ia GA UE a accen 93 5 5 14 PLD GPIO2 Interrupt 94 5 5 15 PLD Shutdown and Reset Control and Reset Reason 95 5 5 16 PLD Watchdog Timer Refresh
26. Install the top and bottom edge of the transition module into the rear guides of the chassis Ensure that the levers of the two injector ejectors are in the outward position Slidethe transition module into the chassis until resistance is felt Move the injector ejector levers in an inward direction Verify that the transition module is properly seated and secure it to the chassis using the two screws adjacent to the injector ejector levers Connect the cables to the transition module To remove the transition module from the chassis reverse the procedure and press the red locking tabs IEEE handles only to extract the board 2 5 2 Support Installation Procedure Read all notices and follow these steps to install a PMC on the baseboard NOTICE Damage of Circuits Electrostatic discharge and incorrect installation and removal can damage circuits or shorten its life Before touching the board or electronic components make sure that you are working in an ESD safe environment Product Damage Inserting or removing modules with power applied may result in damage to module components Before installing or removing additional devices or modules read the documentation that came with the product MVME2500 Installation and Use 6806800L01H 31 Hardware Preparation and Installation 1 Attach an ESD strap to your wrist Attach the other end ofthe strap to the chassis as a ground Make sure that it i
27. Operating System Printed Circuit Board Peripheral Component Interconnect PCI Express Peripheral Component Interconnect eXtended PCI Mezzanine Card Input Output Module Programmable Logic Device PCI Mezzanine Card IEEE P1386 1 Processor PCI Mezzanine Card Real Time Clock Rear Transition Module Serial AT Attachment Universal Asynchronous Receiver Transmitter 14 MVME2500 Installation and Use 6806800L01H About this Manual Term Definition USB Universal Serial Bus VITA VMEbus International Trade Association VME Versa Module Eurocard XMC PCI Express Mezzanine Card Conventions The following table describes the conventions used throughout this manual Notation Description 0x00000000 Typical notation for hexadecimal numbers digits are 0 through F for example used for addresses and offsets 0b0000 Same for binary numbers digits are 0 and 1 bold Used to emphasize a word Screen Used for on screen output and code related elements or commands in body text Courier Bold Used to characterize user input and to separate it from system output Reference Used for references and for table and figure descriptions File gt Exit Notation for selecting a submenu text Notation for variables and keys text Notation for software buttons to click on the screen and parameter description Repeated item for example node 1 node 2 node 12 Omission of inf
28. UART each of which acts independently of the other Each UART is clocked by the CCB clock and is compatible with PC16522D As a full duplex interface it provides a 16 byte FIFO for both transmitter and receiver mode DMA Controller The DMA controller transfers blocks of data between the various interfaces and functional blocks of P20x0 that are independent of the e500 cores The P20x0 DMA controller has three high speed DMA channels all of which capable of complex data movement and advanced transaction chaining Enhanced Three Speed Ethernet Controller eTSEC The eTSEC controller of the device communicates to the 10 Mbps 100 Mbps and 1 Gbps Ethernet IEE 802 3 networks as well as to devices with generic 8 to 16 bit FIFO ports The MVME2500 uses the eTSEC using the RGMII interface General Purpose I O GPIO P20x0 has a total of sixteen I O ports Four of these ports are used alternately used as external input interrupt All sixteen ports have open drain capabitilies P20x0 processor provides a Serial Rapid I O interface However this interface is not utilized by the MVME2500 Security Engine SEC 3 1 The integrated security engine ofthe P20x0 is designed to off load intensive security functions like key generation and exchange authenticaion and bulk encryption from the processor core It includes eight different execution units where data flows in and out of an EU MVME2500 Installation and Use 6806800L01H
29. environment This equipment generates uses and can radiate radio frequency energy and if not installed and used in accordance with the instruction manual may cause harmful interference to radio communications MVME2500 Installation and Use 6806800L01H 133 Safety Notes Operation of this equipment in a residential area is likely to cause harmful interference in which case the user will be required to correct the interference at his own expense Changes or modifications not expressly approved by Emerson Network Power could void the user s authority to operate the equipment Board products are tested in a representative system to show compliance with the above mentioned requirements A proper installation in a compliant system will maintain the required performance Use only shielded cables when connecting peripherals to assure that appropriate radio frequency emissions compliance is maintained Operation Product Damage High humidity and condensation on the board surface causes short circuits Do not operate the board outside the specified environmental limits Make sure the board is completely dry and there is no moisture on any surface before applying power Damage of Circuits Electrostatic discharge and incorrect installation and removal can damage circuits or shorten its life Before touching the board or electronic components make sure that you are working in an ESD safe environment Board Malfunction Switches marked a
30. 3 inches Width 19 8 mm 0 8 inches Max Component Height 14 8 mm 0 58 inches Weight 400 grams standard variant 700 grams ET variants 1 4 Ordering Information As ofthe printing date of this manual this quide supports the models listed below Table 1 4 Available Board Variants Order Number Processor Ejector MVME2500 0163 QorlQ P2010 single core 800 MHz IEEE MVME2500 0161 QorlQ P2010 single core 800 MHz SCANBE MVME2500 0173 QorlQ P2020 dual core 1200 MHz IEEE MVME2500 0171 QorlQ P2020 dual core 1200 MHz SCANBE MVME2500ET 0173 QorlQ P2020 dual core 1000 MHz IEEE ENP2 MVME2500ET 0171 QorlQ P2020 dual core 1000 MHz 2 GB SCANBE ENP2 22 MVME2500 Installation and Use 6806800L01H Introduction As ofthe printing date of this manual the following board accessories are available Table 1 5 Available Board Accessories VME HDMNTKIT VME HD mounting kit VME 64GBSSDKIT VME 64GB SSD and mounting kit MVME7216E 101 VME RTM IEEE handle MVME7216E 102 VME RTM SCANBE Handle MVME721ET 101 VME RTM Extended Temperature IEEE handle VME RTM Extended Temperature SCANBE Handle SERIAL MINI D 30 Female to male micro mini DB 9 to DB9 adapter cable W2400E01A MVME2500 Installation and Use 6806800L01H 23 Introduction 1 5 Product Identification The following graphics shows the location of the serial number label Figure 1 1 Serial Number Location Seria
31. Datenverlust w hrend des Austauschs Wenn Sie die Batterie schnell austauschen bleiben die Zeiteinstellungen m glicherweise erhalten MVME2500 Installation and Use 6806800L01H Sicherheitshinweise Datenverlust Wenn die Batterie wenig oder unzureichend mit Spannung versorgt wird wird der RTC initialisiert Tauschen Sie die Batterie aus bevor sieben Jahre tats chlicher Nutzung vergangen sind Sch den an der Platine oder dem Batteriehalter Wenn Sie die Batterie mit einem Schraubendreher entfernen k nnen die Platine oder der Batteriehalter besch digt werden Um Sch den zu vermeiden sollten Sie keinen Schraubendreher zum Ausbau der Batterie verwenden Umweltschutz Entsorgen Sie alte Batterien und oder Blades Systemkomponenten RTMs stets gem der in Ihrem Land g ltigen Gesetzgebung wenn m glich immer umweltfreundlich MVME2500 Installation and Use 6806800L01H 141 Sicherheitshinweise 142 MVME2500 Installation and Use 6806800L01H Index A T abbreviations 13 timers 65 accessories 30 FPGA tick timer 66 internal timer 66 B real time clock 65 block diagram 61 watchdog timer 66 board accessories 23 board configuration 29 C chipset 61 conventions 15 D disposal 26 disposal of product 21 E environmental requirements 27 installating and removing the board 32 installation 31 M memory system memory 65 P PMC 31 PMC PrPMC 31 product 21 related standards 21 R related data s
32. Factory Pre Programming Programming the SPI Flash usually takes a while Ideally the SPI Flash should be pre programmed in the factory before shipment e ICT Programming This programming is done on exposed test points using a bed of nails tester The board power should be switched on before programming The switch S2 8 should also be powered on to successfully detect the SPI Flash chip 4 6 3 Firmware Redundancy The MVME2500 uses two physically separate boot devices to provide boot firmware redundancy Although the P20x0 provides four SPI Bus chip selects the P20x0 is only capable of booting from the SPI Device controlled by Chip Select 0 External SPI multiplexing logic is implemented on the MVME2500 to accomodate this chipset limitation 68 MVME2500 Installation and Use 6806800L01H Functional Description The MVME2500 FPGA controls the chip select to SPI devices A and B The FPGA chip select control is based on the Switch Bank S2 2 Figure4 2 Device Multiplexing Logic Switch ON SELB Bank 52 2 OFF SEL A SPI DEVICE A P20x0 SPI SELO SPI DEVICE SPI SEL1 B SPI BUS At power up the selection of the SPI boot device is strictly based upon the Switch Bank S2 2 setting Depending on the 52 2 setting SPI SELO is routed to one of two SPI devices The selected SPI device must contain a boot image Once the boot image is copied into memory and executed the FPGA will wait and once the P20x0 will write
33. Key Features of the MVME2500 continued Function Features Operating System Basedfrom BSP provided by Freescale which is based from standard Linux version 2 6 32 rc3 Development tool is Itib 9 1 1 Linux Target Image Builder from Freescale VxWorks Standard Compliances The product is designed to meet the following standards Results are pending until testing is finished Table 1 2 Board Standard Compliances Standard Description EN 60950 1 A11 2009 Safety Requirements legal IEC 60950 1 2005 2nd Edition CAN CSA C22 2 No 60950 1 FCC Part 15 Subpart B Class A non EMC requirements legal on system level residential predefined Emerson system ICES 003 Class A non residential EMC Directive 89 336 EEC EN55022 Class B EN55024 AS NZS CISPR 22 Class A EN300386 ETSI EN 300 019 series Environmental Requirements Directive 2011 65 EU Directive on the restriction of the use of certain hazardous substances in electrical and electronic equipment RoHS For Declaration of Conformity refer MV ME2500 Series Declaration of Conformity MVME2500 Installation and Use 6806800L01H 21 Introduction e 3 1 3 Mechanical Data The following table provides details about the dimensions and weight of the board Table 1 3 Mechanical Data Feature Value Height 233 44 mm 9 2 inches Depth 160 0 mm 6 3 inches Front Panel Height 261 8 mm 10
34. P2 connector provides power to the MVME2500 and to the upper eight VMEbus address lines and additional 16 VMEbus data lines The Z A C and D pin assignments for the P2 connector are the same for both the MVME2500 and MVME7216E MVME721E and are as follows Table 3 7 VMEbus P2 Connector Pin RowA Row B Row RowD Row 7 1 PMC IO 2 5V 1 GE3_0 Serial 1 RX 2 PMCIO 4 GND PMCIO 3 GE3 0 GND 3 PMCIO 6 RETRY PMCIO 5 GND Serial 1 TX 4 PMCIO 8 ADDRESS 24 PMCIO 7 GE3 1 GND 5 PMCIO 10 ADDRESS 25 PMCIO 9 GE3 1 Serial 1 CTS 6 PMCIO 12 ADDRESS 26 PMCIO 11 GND GND 7 PMCIO 14 ADDRESS 27 PMCIO 13 GE3 2 Serial 1 RTS 8 PMCIO 16 ADDRESS 28 PMCIO 15 GE3 2 GND 9 PMCIO 18 ADDRESS 29 PMCIO 17 GND Serial 2 RX 10 PMCIO 20 ADDRESS 30 PMCIO 19 GE3 3 GND 11 PMCIO 22 ADDRESS 31 PMCIO 21 3 Serial 2 TX 12 PMCIO 24 GND PMCIO 23 GND GND 13 PMCIO 26 5V PMCIO 25 I2C DATA Serial 2 CTS 14 PMCIO 28 DATA 16 PMCIO 27 12C CLK GND 15 PMCIO 30 DATA 17 PMCIO 29 GE3 LINK LED Serial 2 RTS 16 PMCIO 32 DATA 18 PMCIO 31 GE3 ACT LED GND 17 PMCIO 34 DATA 19 PMCIO 33 GEA LINK LED Serial 3 RX 18 PMCIO 36 DATA 20 PMCIO 35 4 A LED GND 19 PMCIO 38 DATA 21 PMCIO 37 GND Serial 3 TX 20 PMCIO 40 DATA 22 PMCIO 39 GEA 3 GND 21 PMCIO 42 DATA 23 PMCIO 41 GE4_3 Serial 3 CTS 22 PMCIO 44 GND PMCIO 43 GND GND 44 MVME2500 Installation and Use 6806800L01H Controls LEDs and Connectors Tabl
35. PCI Express Base Specification Revision 2 0 PCI Local Bus Specification PCI Rev 3 0 PCI X Electrical and Mechanical Addendum to the PCI Local Bus Specification PCI X EM Revision 2 0a PCI X Protocol Addendum to the PCI Local Bus Specification PCI X PT Revision 2 0a Serial ATA SATA Specification Revision 2 6 Serial ATA Extensions to Serial 1 0 Revision 1 0 Trusted Computing Group TCG USB Implementers Forum USB IF TPM Specification 1 2 Level 2 Revision 103 Version 1 2 Universal Serial Bus Specification USB Revision 2 0 MVME2500 Installation and Use 6806800L01H 131 Related Documentation 132 MVME2500 Installation and Use 6806800L01H Safety Notes This section provides warnings that precede potentially dangerous procedures throughout this manual Instructions contained in the warnings must be followed during all phases of operation service and repair of this equipment You should also employ all other safety precautions necessary for the operation of the equipment in your operating environment Failure to comply with these precautions or with specific warnings elsewhere in this manual could result in personal injury or damage to the equipment Emerson intends to provide all necessary information to install and handle the product in this manual Because of the complexity of this product and its various uses we do not guarantee that the given informa
36. RTM The MVME2500 is compatible with the MVME721x RTM MVME721X RTM is for I O routing through the rear of a compact VMEbus chassis It connects directly to the VME backplane in chassis with an 80 mm deep rear transition area MVME721X RTM is designed for use with the MVME7100 MVME2500 iVME7210 and MVME 4100 It has the following features Table 4 4 Transition Module Features One five row P2 backplane connector for serial and Ethernet I O passed from the SBC Four RJ 45 connectors for rear panel I O four asynchronous serial channels Two RJ 45 connectors with integrated LEDs for rear panel I O two 10 100 1000 Ethernet channels One PIM site with rear panel I O For more information refer to the MVME721x RTM Installation and Use See Appendix B Related Documentation on page 129 for details on how to obtain and download the document MVME2500 Installation and Use 6806800L01H 79 Functional Description 80 MVME2500 Installation and Use 6806800L01H Memory Maps and Registers 5 1 Overview System resources including system control and status registers external timers and the QUART are mapped into 16 MB address range accessible from the MVME2500 local bus through the P20x0 QorlQ LBC 5 2 Memory Map The following table shows the physical address map of the MVME2500 Table 5 1 Physical Address Map Device Name Start Address End Address Size DDR 0 000
37. The COP header is used for the CPU debug The pin assignment is dictated by Freescale and is compatible with the processor s debugging tool Table 3 15 COP Header P10 Signal Description JTAG TDI 2 COP QACK 3 JTAG TDO 4 COP TRST 5 COP RUNSTOP Pulled UP 6 COP VDD SENSE JTAG TCK 8 COP CHECK STOP IN 9 JTAG TMS 10 NC 11 P2020 SW RESET COP PRESENT COP HARD RESET 14 KEYING 15 COP CHECK STOP OUT 16 GND 3 4 2 6 SD Connector 2 Table 3 16 SD Connector J2 Pin Signal Description 1 DATA 3 54 MVME2500 Installation and Use 6806800L01H Table 3 16 SD Connector 2 continued Controls LEDs and Connectors CARD DETECT 12 GND 3 4 2 7 Connector 2 MVME2500 has one XMC connector XJ2 that supports XMC cards with 15 connector It can also support XMC cards with 16 connector without encountering any mechanical interference Table 3 17 Connector 2 Pinout Pin Row Row B Row C Row D Row RX1 RowF 3 3V 2 GND GN JTAG TRST HRESET 3 3V 3 3V JTAG TCK MRSTO PULLED UP 3 3V JTAG TMS 8 GND GND JTAG TMS GND 3 3V MVME2500 Installation and Use 6806800L01H 55 Controls LEDs and Connectors Table 3 17 Connector 2 Pinout continued UP GA 1 PRESENT NC 3 3V MVMRO PULLED DOWN I2C DATA I2C CLOCK
38. and boots VxWorks from an external TFTP server 1 2 Make sure that the VxWorks image is accessible by the board from the TFTP server Configure U Boot environment variables setenv ipaddr IP address of MVME2500 setenv serverip IP address of TFTP server setenv gatewayip gateway IP setenv netmask lt netmask gt setenv vxboot tftpboot Svxbootfile amp amp setenv bootargs Svxbootargs amp amp bootvx setenv vxbootfile lt VxWorks_image gt setenv vxbootargs motetsec 0 0 IP address of TFTP server gt VxWorks h IP address of TFTP server e lt IP address of MVME2500 ffffff00 b unused IP u vxworks pw vxworks f 0x80 saveenv MVME2500 Installation and Use 6806800L01H Boot System 6 4 3 TFTP the files from the server to local memory then boot run vxboot Using the Persistent Memory Feature Persistent memory means that the RAM s memory is not deleted during a reset Power cycling or by temporarily removing the power and then powering up the blade again will delete the memory content Persistent memory feature is enabled by default This feature can be useful in many situations including e Analyzing kernel logs after a Linux kernel panic e Defining a particular memory region for the persistent storage of application specific data Analyzing Kernel Log Files after a Kernel Panic When a board that is running the Linux OS indicates a kernel panic issue a reset through the face plate bu
39. both occupy the same physical space on the PCB Combination PMC XM cards are not supported by the MVME2500 The site provides a rear PMC I O The site is fully compliant with the following 1 VITA 39 PCI X for PMC VITA 35 2000 for PMC P4 to VME P2 Connection PCI Rev 2 2 for PCI Local Bus Specification PCI X PT 2 0 for PCI X Protocol Addendum to the PCI Local Bus Specs IEEE Standard P1386 2001 for Standard for Common Mezzanine Card Family IEEE Standard P1386 1 2001 for Standard Physical and Environmental Layer for PCI Mezzanine Card VITA 42 for XMC 8 VITA 42 3 PCle for XMC gr um 29 MVME2500 Installation and Use 6806800L01H 71 Functional Description 4 9 1 4 9 2 4 10 sites are keyed for 3 3V PMC signaling PMC and XMC add on cards must have a hole in the 3 3 V PMC keying position in order to be populated on the MVME2500 The XMC specification accommodates this since it is expected that carrier cards will host both XMC and PMC capable add on cards MVME2500 utilizes the P20x0 x2 link PCI Express interface It is designed such that the same PCI E interface is used for either PMC or XMC through Pericom s PI2PCIE2412 It is PCI E Gen2 compliant with four differential channel input and 2 1 MUX switch with single enable The enable pin is controlled by FPGA through onboard switch Theonboard switch S2 4 determines the direction of the PCI E MUX switch The default setting OFF
40. configuration For 1200 MHz board configuration CFG_CORE1_SPEED 0 C ORE FREQ lt 1000 MHz For 800 MHz board configuration 17 DDR Controller Speed Engineering use SerDes Ref Clock Config LA 22 20 UART SOUT O TRIG OUT MSRCID 1 MSRCID 4 DMA1_DDONE_B 0 TSEC_1588_ALARM _OUT1 111111 11 CFG_DDR_SPEED 1 DDR FREQ gt 500 MHz Default for future use SerDes expects a 100 MHz reference clock frequency default 114 MVME2500 Installation and Use 6806800L01H Programming Model Table 7 1 POR Configuration Settings continued CONFIG ETSEC2 SGMII Mode CONFIG PINS CONFIG SELECTION eTSEC2 Ethernet interface operates in standard parallel interface mode and uses the TSEC 2 pins default REMARKS ETSEC3 SGMMI Mode 1588 ALARM _OUT2 eTSEC3 Ethernet interface operates in standard parallel interface mode and uses the TSEC_3 pins default ETSEC1 and ETSEC2 Width eTSEC1 and eTSEC2 Ethernet interfaces operate in reduced pin mode either RTBI RGMI RMII or 8 bit FIFO mode ETSEC1 Protocol TSEC1_TXDO TSEC1_TXD7 The eTSEC2 controller operates using the GMII protocol or RGMII if configured in reduced mode if its not configured to operate in SGMII mode ETSEC2 Protocol 23 ETSEC3 Protocol TSEC2 TXDO TSEC2 TXD7 UART_RTSO UART_RTS1 10 The eTSEC2 controlle
41. on board temperature sensors one for the board and the other for the CPU temperature sensor The board temperature sensor is located near the dual RJ45 connector near the front panel The CPU temperature sensor is located near the P2020 CPU The MVME2500 thermal management support will interrupt the process only to show the current board and CPU temperature This interrupt is routed directly to one of the processor s 4 The table below shows the low and high threshold temperature in order for the interruptto be asserted Table 4 2 Thermal Interrupt Threshold CPU Temperature Temperature Limit Limit Board Variant Board Temperature Limit 0 C to 55 C 55 C to 71 C High Standard Variant Extended Temperature Variant Real Time Clock Battery A back up battery based on the CR2325 specification is provided It helps support the RTC hold up requirements that maintain the correct date and time for at least two hours after the backplane power is switched off MVME2500 Installation and Use 6806800L01H 77 Functional Description 4 20 Debugging Support The following information shows the details of Emerson debugging support as applied to the MVME2500 4 20 1 POST Code Indicator Thefollowing table shows the LED status ofthe POST Codes Forthe location ofthe POST Code LEDs see Onboard LEDs on page 39 Logic 1 means LED is ON Logic 2 means LED is OFF Table 4 3 POST Code Indicator o
42. on one bit of the FPGA watchdog register the FPGA will then pass through the SPI chip select from the 20 0 to SPI device chip selects The software can now perform read write processes on any SPI device including copying from one SPI device to another With this flexible approach to firmware redundancy one should always be able to recover from a corrupt active firmware image as long as a healthy firmware image is maintained in single bootable SPI Device MVME2500 Installation and Use 6806800L01H 69 Functional Description 4 6 4 4 7 The MVME2500 supports automatic switch over If booting one device is not successful the watchdog will trigger the board reset and it will automatically boot on the other device Crisis Recovery The MVME2500 provides an independent boot firmware recovery mechanism for the operating system The firmware recovery can be performed without leaving the firmware environment During crisis recovery the healthy boot image contained in SPI Device B is copied to SPI Device A replacing the corrupt boot image contained in SPI Device A Crisis recovery is performed as follows 1 Power off the board Set Switch S2 2 to ON to point to SPI Device B crisis image Power on the board Press h on the keyboard to go to the U Boot prompt Type moninit fru to copy the crisis image to SPI Device A Once the U Boot prompt is visible power off the board Set the 52 3 back to OFF to point to the SP
43. panel Table 3 5 USB Connector 5 1 GND Mounting Ground Mounting Ground MTG Mounting Ground MTG Mounting Ground VMEBus P1 Connector The VME P1 connector is a 160 pin DIN The P1 connector provides power and VME signals for 24 bit address and 16 bit data The pin assignments for the P1 connector is as follows Table 3 6 VMEbus P1 Connector Row 7 NC BCLR DATA 9 GND ACFAIL DATA 10 NC NC ms BR WN BGINO DATA 11 NC GND BGOUTO DATA 12 NC NC 8 DATA 7 BGIN2 DATA 15 NC GND 9 GND BGOUT2 GND GAP NC MVME2500 Installation and Use 6806800L01H Controls LEDs and Connectors Table 3 6 VMEbus P1 Connector continued Pin Row Row B Row C Row D Row 7 SYSCLK BGIN3 GND SYSRESET 3 3V not used GND 13 DSO BRI GA2 NC WRITE 3 3V not used GND GND GA3 NC DTACK 43 EET used GND 17 AM 1 ADD 25 NC 18 AM2 ADD 26 3 3V not used GND NC NC 3 3V notused GND IACKIN NC NC IACKOUT 3 3V notused GND NC NC 3 3V notused GND NC NC 3 3V not used GND NC NC 3 3V not used GND ADD2 IRQ2 ADD 37 NC NC ADD 1 IRQ1 ADD 38 3 3V not used GND 12V 12V 12V 32 5V 5V 5V 5V MVME2500 Installation and Use 6806800L01H 43 Controls LEDs and Connectors 3 4 1 5 VMEBus P2 Connector The VME P2 connector is a 160 pin DIN Row B of the
44. the MRAM retains its contents even if the board is power cycled The MRAM is accessed through the LBC Real Time Clock The MVME2500 provides a battery backed up DS1375 Real Time Clock RTC chip The RTC chip provides time keeping and alarm interrupts It is an I2C device and is accessed through the 2 bus address at 0x68 Quad UART The MVME2500 console RS232 port is driven by the UART built into the P20x0 QorlQ chip Additionally the MVME2500 has a Quad UART chip which provides four additional 16550 compatible UART These additional UART are internally accessed through the LBC bus The Quad UART chip clock input which is internally divided to generate the baud rate is 1 8432 MHz The four UART physically connect to RS232 DB9 serial ports through the RTM MVME2500 Installation and Use 6806800L01H 119 Programming Model 7 6 4 LBCTiming Parameters The following table defines the timing parameters for the devices on the local bus Table 7 5 LBC Timing Parameters 0 1 2 3 4 5 6 MRAM UARTO UART1 UART2 UART3 FPGA Timers 10 10 0 0011 0011 0011 0011 0011 0011 0011 LN CER CN 5 8 0 EHTR 0 EAD 0 0 0 0 0 0 0 Field Description BCTLD Buffer control disable 0 LBCTL is asserted upon access to the current memory bank CSNT Chip Select negation time 1 LCSn and LWE are negated one quarter of the bus clock cycle earlier ACS Addres
45. 0 0000 Ox7fff ffff 2GB PCIE3 IO 0 0 0000 OxffcO PCIE 210 Oxffc1 0000 0 1 PCIE 110 0 2 0000 Oxffc2 UARTO Oxffc4_0000 OxffcA_ffff UART1 Oxffc5_0000 Oxffc5 ffff 64 KB UART2 Oxffc6_0000 Oxffc6_ffff 64 KB Oxffc7 0000 Oxffc7 ffff Oxffc8 0000 Oxffc8 Oxffdf 0000 Oxffdf Offf OxffeO 0000 Oxffef ffff MRAM 0 0 0000 Oxfff7 fff 512KB MVME2500 Installation and Use 6806800L01H 81 Memory Maps and Registers 5 3 Flash Memory The table below lists the memory range designated to U boot and ENV variables Table 5 2 Flash Memory Map U boot 0x00000000 0x0008ffff Reserved 0x00090000 0x0009ffff ENV Variables 0x00100000 0x001 1ffff Available Flash 0x00120000 0x007fffff 5 4 Linux Devices Memory Map The table below lists the memory ranges designated to different devices in Linux Table 5 3 Linux Devices Memory Map PCIE3 Mem 0x80000000 OxS9fffffff PCIE2 Mem 0xa0000000 Oxbfffffff Mem 0xc0000000 Oxdfffffff MRAM Oxfff00000 Oxfff7ffff PCIE3 IO Oxffc00000 OxffcOfff 64 KB PCIE2 IO Oxffc10000 Oxffc1ffff 64 KB PCIE1 Oxffc20000 Oxffc2ffff QUARTO Oxffc40000 OxffcAffff QUART1 Oxffc50000 Oxffc5ffff QUART2 Oxffc60000 Oxffceffff QUART3 Oxffc70000 Oxffc7ffff 64 KB 82 MVME2500 Installation and Use 6806800L01H Memory Maps and Registers Table 5 3 Linux Devices Memory Map Device Memory Range Memory A
46. 0 MHz 2 1 CORECLOCK PLL 800 MHz For 1200 MHz board configuration For 800 MHz board configuration Core 1 PLL 5 CPU Boot Config LWEO UART 50071 LA27 LA16 3 1 CORE CLOCK PLL 1200 MHz For 1200 MHz board configuration 2 1 CORECLOCK PLL 800 MHz e500 core O is allowed to boot without waiting for configuration by an external master while e500 core 1 is prevented from booting until configured by an external master or the other core For 800 MHz board configuration MVME2500 Installation and Use 6806800L01H 113 Programming Model Table 7 1 POR Configuration Settings continued CONFIG Boot Sequence Memory Debug Config DDR Debug Config CONFIG PINS LGPL3 LFWP LGPL5 DMA2 DACKO DMA2 DDONEO CONFIG SELECTION CFG_BOOT_SEQ 1 0 BOOT SEQUENCE DISABLED Debug information from the DDR SDRAM controller is driven on the MSPCID and MDVAL signs default Debug information is not driven on ECC pins ECC function in their normal mode default REMARKS ELBCECC Enable Config Platform Speed MSRCIDO Default operation eLBC ECC checking is disabled PLAT SPEED 1 CCB CLOCK gt 333 MHz CORE 0 Speed COREO SPEED 1 C ORE FREQ gt 1000 MHz For 1200 MHz board configuration CORE 1 Speed COREO SPEED 0 C ORE FREQ 1000 MHz CFG_CORE1_SPEED 1 C ORE FREQ gt 1000 MHz For 800 MHz board
47. 0L01H About this Manual Summary of Changes This manual has been revised and replaces all prior editions 6806800101 October 2010 This version includes updates and revisions for the EA release of the MVME2500 Table 1 3 Added mechanical data Table 4 3 Removed the following commands brd reset irginfo mac Added soft reset Table 4 1 Removed L2 SRAM L1 for stack and Boot Page entries Changed all instances of via to through Impelemented editorial changes 6806800101 2011 Updated Controls LEDs and Connectors adding the following Board Layout Front Panel Connectors Onboard Connectors Added Functional Description Applied editorial edits 6806800L01D May 2011 Edited Memory Maps and Registers Edited Programming Model Edited Figure Component Layout Edited Figure Onboard LEDs Added Front Panel Serial Port 4 MVME2500 Installation and Use 6806800L01H 17 About this Manual Part Number 6806800L01E 6806800L01F Publication Date July 2011 August 2011 Description Updated Table Available Board Variants on page 22 Updated Appendix B Related Documentation on page 129 Changed title of Section 3 4 1 to Front Panel Connectors Edited Front Panel Serial Port 4 Updated Figure Component Layout on page 35 to include proper label for XMC connectors Updated Safety Notes and Sicherheitshinweise 6806800L01G 6806800L01H 18
48. 2 5 1 30 Installing Accessories Rear Transition Module The MVME2500 does not support hot swap Remove power to the rear slot or system before installing the module A PCMI O Module PIM needs to be manually configured and installed before placing the transition module NOTICE Damage of Circuits Electrostatic discharge and incorrect installation and removal can damage circuits or shorten its life Before touching the board or electronic components make sure that you are working in an ESD safe environment Product Damage e Only use injector handles for board insertion to avoid damage to the front panel and or PCB Deformation of the front panel can cause an electrical short or other board malfunction Board Malfunction e Switches marked as reserved might carry production related functions and can cause the board to malfunction if their setting is changed Do not change settings of switches marked as reserved The setting of switches which are not marked as reserved has to be checked and changed before board installation Installation and Removal Procedure 1 Turn OFF all equipment and disconnect the power cable from the AC power source 2 Remove the chassis cover 3 Remove the filler panel s from the appropriate card slot s at the rear of the chassis if the chassis has a rear card cage MVME2500 Installation and Use 6806800L01H Hardware Preparation and Installation o N Oo a A 9
49. 25 57 PMC IO 57 26 PMC IO 26 58 PMC IO 58 27 PMC IO 27 59 PMCIO 59 30 PMCIO 30 62 PMCIO 62 31 PMCIO 31 63 PMCIO 63 32 PMCIO 32 64 PMCIO 64 JTAG Connector P6 The Connector can be used in conjunction with the TAG board and ASSET hardware Table 3 14 JTAG Connector P6 Signal Description NC Signal Description 3 3V FROM 5V SPI HOLD 0 SPI CS 0 SPI CLK SPI HOLD 1 SPI MISO SPI VCC 6 8 10 SPI CS 1 SPI MOSI GND SCAN 1 TCK SCAN 1 TDI GND SCAN 1 TRST SCAN 1 TDO SCAN 1 TMS 3 3V MVME2500 Installation and Use 6806800L01H Table 3 14 JTAG Connector P6 continued Controls LEDs and Connectors Pi Signal Description 1 2 2 2 SCAN 2 TCK Signal Description n Pin 3 NC 24 5 26 3 3V FROM 5V 27 GND 28 SCAN 2 TDI 29 NC 30 NC 3 SCAN 3 TMS SCAN 3 TDI 1 32 37 38 SCAN 3 TCK1 SCAN 3 TCK 2 GND 39 SCAN 3 TRST 40 SCAN 3 TCK3 41 SCAN 4 1 42 SCAN 4 TMS SCAN 4 3 5 SCAN 4 TDO GND 44 GND 48 0 43 45 49 SCAN 4 TRST 51 SCAN 5 TMS 52 SCAN 5 53 SCAN 5 TDO 54 GND 5 3 3V 5 5 MVME2500 Installation and Use 6806800L01H 5 56 7 SCAN 5 TDI 58 9 SCAN 5 TRST 60 SCAN5 TCK2 53 Controls LEDs and Connectors 3 4 2 5 COP Connector P6
50. 2500 Installation and Use 6806800L01H Controls LEDs and Connectors 3 3 2 Onboard LEDs The onboard LEDs are listed below To view its location on the board see Figure 3 1 on page 35 Figure3 4 Onboard LEDs D33 D34 D35 D36 D37 D38 D9 Table 3 2 Onboard LEDs Status Power Fail Red This indicator is illuminated when one or more of the on board voltage rails fails D33 User Defined Amber Controlled by the FPGA Used for boot up sequence indicator D34 User Defined Amber Controlled by the FPGA Used for boot up sequence indicator D35 User Defined Amber Controlled by the FPGA Used for boot up sequence indicator D36 Early Power Fail Amber This indicator is lit when the early 3 3V power supply fails User Defined Amber Controlled by the FPGA User Defined Amber Controlled by the FPGA 3 4 Connectors This section describes the pin assignments and signals for the connectors on the MVME2500 MVME2500 Installation and Use 6806800L01H 39 Controls LEDs and Connectors 3 4 1 Front Panel Connectors The following connectors are found on the outside of the MVME2500 These connectors are divided between the front panel connectors and the backplane connectors The front panel connectors include the 1 and 5 connectors The backplane connectors include the P1 and P2 connectors 3 4 1 1 RJ45 with Integrated Magnetics 1 The MVME2500 uses an X2 RJ45 Table 3 3 Front Panel Tri Speed E
51. C to 71 C Storage 40 C to 85 C 50 C to 100 C Vibration Sine 10min axis Vibration Random 1hr axis 2G 5 to 2000 Hz 0 01g2 Hz 15 to 2000 Hz 15 to 2000 Hz 0 04g2 Hz 15 to 2000 Hz 8 GRMS Shock 20g 11 mS 309 11 mS Humidity 1 ft3 min to 9525 RH non condensing to 100 RH non condensing 2 Flat 15 1000Hz 6db octave 1000Hz 2000Hz MIL STD 810F Figure 514 5C 17 MVME2500 Installation and Use 6806800L01H 27 Hardware Preparation and Installation 2 3 2 28 NOTICE Product Damage High humidity and condensation on the board surface causes short circuits Do not operate the board outside the specified environmental limits Make sure the board is completely dry and there is no moisture on any surface before applying power Power Requirements The board uses 5 0 V from the VMEbus backplane On board power supply generates the required voltages for the various ICs The MVME2500 connects the 12 V and 12 V supplies from the backplane to the PMC sites while the 3 3 V power supplied to the PMC sites comes from the 5 0 V backplane power A maximum of 10 A of 3 3 V power is available to the PMC sites however the 90 W 5 0 V limit must be observed as well as any cooling limitations The following table provides an estimate of the typical and maximum power required Table 2 2 Power Requirements Board Variant Maximum Calculated
52. CT SATA RX NC SATA RX 46 MVME2500 Installation and Use 6806800L01H Controls LEDs and Connectors Table 3 9 Custom SATA Connector 3 continued 3 4 2 3 PMC Connectors The MVME2500 supports only one PMC site It utilizes J14 to support PMC I O that goes to the RTM The tables below show the pinout detail of J11 J12 J13 and 14 See Figure 3 1 for the location of the PMC connectors Table 3 10 PMC J11 Connector Signal Description Pin Signal Description JTAG TCK FRAME 12V GND IRDY DEVSEL INTC PRESENT SIGNAL PCIXCAP 5V MVME2500 Installation and Use 6806800L01H 47 Controls LEDs and Connectors Table 3 10 11 Connector continued 48 Pin Description Pin Signal Description Table 3 11 PMC J12 Connector Signal Description 12V JTAG TRST IDSELB 2 3 4 JTAG TMS JTAG TDO TRDY 5 TDI MVME2500 Installation and Use 6806800L01H Controls LEDs and Connectors Table 3 11 12 Connector continued Pi 1 1 1 1 Signal Description PCI RESET Signal Description n Pin 3 45 14 BUSMODE3 PULLED DWN 15 3 3V 16 BUSMODE4 PULLED DWN EREADY GND RSTOUT 31 AD 16 63 GND 32 CBE2 64 NC Table 3 12 PMC J13 Connector Pin Signal Desc
53. Connectors describes external interfaces of the board This includes connectors and LEDs e Functional Description includes a block diagram and functional description of major components of the product e Memory Maps and Registers contains information on system resources including system control and status registers and external timers Boot System describes the boot loader software e Programming Model contains additional programming information for the board e Replacing the Battery contains the procedures for replacing the battery e Related Documentation provides a listing of related product documentation manufacturer s documents and industry standard specifications e Safety Notes summarizes the safety instructions in the manual e _ Sicherheitshinweise is a German translation of the Safety Notes chapter Abbreviations This document uses the following abbreviations Term Definition CPLD Complex Programmable Logic Device DDR Double Data Rate DDR3 Double Data Rate 3 DMI Direct Media Interface MVME2500 Installation and Use 6806800L01H 13 About this Manual Term Definition DUART Dual UART EEPROM Erasable Programmable Read Only Memory p Federal Communications Commission GigaByte Gigabit Gigabits per second Input Output Institute of Electrical and Electronics Engineers Light Emitting Diode Megahertz Multi Chip Package Magnetoresistive Random Access Memory
54. D 2GB DEN Freescale QorlQ P20x0 x2PCle PCI X sit E wem 64133 Bridge Chipset The MVME2500 utilizes the QorlQ P20x0 integrated processor It offers an excellent combination of protocol and interface support including dual high performance CPU cores a large L2 cache a DDR2 DDR3 memory controller three enhanced three speed Ethernet controllers two Serial RapidlO interfaces with a messaging unit a secure digital interface a USB 2 0 interface and three PCI express controllers MVME2500 Installation and Use 6806800L01H 61 Functional Description 4 2 1 4 2 2 This section describes the protocol and interfaces provided in the QorlQ P20x0 integrated and is utilized by the MVME2500 e500 Processor Core The QorlQ integrated processors offer dual high performance e500v2 core P2020 and a single e500v2 core P2010 It operates from 800 MHz up to 1 2GHz core frequency The e500 processor core is a low power implementation of the family of reduced instruction set computing RISC embedded processor that implement the Book E definition of the PowerPC architecture The e500 is a 32 bit implementation of the Book E architecture using the lower words of 64 bit general purpose registers GPRs while 500 2 uses 36 bit physical addressing and some improvement from the previous version Integrated Memory Controller A fully programmable DDR SDRAM co
55. Hz clock rate and can support booting process The firmware boot flash resides in the P20x0 eSPI bus interface SPI Flash Memory The MVME2500 has two 8 MB onboard serial flash Both contain the ENV variables and the U Boot firmware image which is about 513 KB in size Both SPI flash contain the same programming for firmware redundancy and crisis recovery The SPI flash can be programmed through the JTAG interface or through an onboard SPI flash programming header For information on U boot and ENV Variables location see Flash Memory Map Table 5 2 on page 82 SPI Flash Programming The MVME2500 has three headers a 10 pin header for SPI Flash programming an 80 pin header for the JTAG connectivity and a 20 pin JTAG header for ASSET hardware connectivity The following options are used to program the onboard flash e Using onboard SPI header The MVME2500 uses the 10 pin header with a Dual SPI Flash in circuit programming configuration The pin connection is compatible with DediProg SPI Unversal Pin Header e Using 60 pin external TAG header An external TAG board with a JTAG multiplexer is compatible with the MVME2500 and can be attached using an external cable It can be used to update the boot loader in the field Using this method programming can be done through the JTAG interface or by using the dedicated SPI Flash programming header on the JTAG board MVME2500 Installation and Use 6806800L01H 67 Functional Description e
56. I Device A on aM FW N Power on the board to boot from the newly recovered image on the SPI Device A The board will automatically switch over if one of the devices is corrupted Front UART Control The MVME2500 utilizes one of the two UART functions provided in the male micro mini DB 9 front panel A male to male micro mini DB 9 to DB9 adapter cable is available under Emerson Part Number SERIAL MINI D 30 W2400E01A and is approximately 12 inches in length MVME2500 Installation and Use 6806800L01H Functional Description 4 8 4 9 Only 115200 bps and 9600 bps are supported The default baud rate on the front panel serial is 9600 kbps Rear UART Control The MVME2500 utilizes the Exar ST16C554 quad UART QUART to provide four additional ports to the RTM These devices feature 16 bytes of transmit and receive first in first out FIFO with selectable receive FIFO trigger levels and data rates of up to 1 5 Mbps Each UART has a set of registers that provide the user with operating status and control The QUART are 8 bit devices connected to the processor through the local bus controller using LBC chipset CS1 CS2 CS3 and CS4 These four serial interfaces are routed to P2 I O for RTM accessibility There are a total of five serial ports available on the MVME2500 PMC XMC Sites The MVME2500 hosts only one PMC XMC site and accepts either a PMC or an XMC add on card Only an XMC or a PMC may be populated at any given time as
57. Layout 1 Switch 433V Supply 1 8V Supply TSI384 Onboard LEDs S2 Switch U55001 D3 09 NEAR SATA Controller 012 60 Header P1 1 5V 7 a onen Supply SATA Connector CPU Debug P4 Battery Flash A U30 XMC Connector XJ2 15148 er 8 au U58001 SDRAM Chips COP Header P50 GbEPHY 1 05V U17 Supply QUART 12V SW Supply MVME2500 Installation and Use 6806800L01H 35 Controls LEDs and Connectors 3 2 FrontPanel The following components are found on the MVME2500 front panel Figure3 2 Front Panel LEDs Connectors and Switches PMC XMC Front I O Serial Port 36 MVME2500 Installation and Use 6806800L01H Controls LEDs and Connectors 3 2 1 Reset Switch The MVME2500 has a single push button switch that has both the abort and reset functions Pressingthe switch for less than three seconds generates an abort interruptto the P20x0 QorlQ PIC Holding it down for morethan three seconds will generate a hard reset The VMESYSRESET is generated if the MVME2500 is the VMEbus system controller 3 3 LEDs The MVME2500 utilizes light emitting diodes LEDs to provide a visible status indicator on the front panel These LEDs show power failures power up states Ethernet link speed ethernet activity SATA link and activity and PCI E valid lane status There are also a few user configurable LEDs Each LED
58. Memory write fill Boot image through network using NFS protocol Memory modify constant address pci List and access PCI Configuration Space pci info Show information about devices on PCI bus ping Send ICMP ECHO REQUEST to network host printenv Print environment variables Boot image through network using RARP TFTP protocol MVME2500 Installation and Use 6806800L01H 109 Boot System 6 6 110 Table 6 1 MVME2500 Specific U Boot Commands continued Command Description un Run commands in an environment variable saveenv Save environment variables to persistent storage script Run a delimited terminated list of commands scsi SCSI sub system scsiboot Boot from SCSI device setenv Set environment variables setexpr Set environment variable as the result of eval expression SPI flash sub system showvar Print local hushshell variables sleep Delay execution for some time soft_reset Soft reset the board source Run script from memory test Minimal test like bin sh Boot image through network using TFTP protocol Initialize and configure Tundra Tsi148 usb USB sub system usbboot Boot from USB device version Print monitor version Updating U Boot To update the U Boot place the image in the RAM address 0x1000000 in this example before copying it to the SPI flash The following procedure will replace the image in SPI bank 0 1 D
59. N A 3 1 Thisis a dual address serial EEPROM 2 TheRTM Bus address can be manually changed through the S1 Switch on RTM The default switch configuration will set the address to 0x55 Make sure that the address is unique to the RTM Bus address when setting the switch 3 The address of the EEPROM is configured through Geographic Address resistor on board Ethernet PHY Address The assigned Ethernet PHY on the management bus is shown in the following table Table 7 4 PHY Types and Management Bus Address PHY MIIM Ethernet Port Function Location PHY Types Address TSEC1 Gigabit Ethernet port routed to front panel BCM54616 MVME2500 Installation and Use 6806800L01H Programming Model 7 6 7 6 1 7 6 2 7 6 3 Table 7 4 PHY Types and MII Management Bus Address PHY MIIM Ethernet Port Function Location PHY Types Address Gigabit Ethernet port routed to front or back panel BCM54616 7 set by GBE_MUX_SEL in 52 TSEC3 Gigabit Ethernet port routed to back panel BCM54616 3 Other Software Considerations This section provides programming information in relation to various board components MRAM The MVME2500 provides 512 K bytes of fast non volatile storage in the form of Magnetoresistive Random Access Memory MRAM The MRAM is directly accessible by software using processor load and store instructions similarto the DRAM The difference is that
60. NC NC ROOTO PULLED UP 3 4 2 8 Miscellaneous P2020 Debug Connectors Table 3 18 P20x0 Debug Header Pin Signal Description MSRCDIO MSRCDIT MDVAL MSRCDI2 TRIG OUT MSRCDI3 56 MVME2500 Installation and Use 6806800L01H Controls LEDs and Connectors 3 5 3 5 1 Table 3 18 P20x0 Debug Header continued Pin Signal Description TRIG IN MSRCID4 Boc m Switches These switches control the configuration of the MVME2500 NOTICE Board Malfunction e Switches marked as reserved might carry production related functions and can cause the board to malfunction if their settings are changed Do not change settings of switches marked as reserved The setting of switches which are not marked as reserved has to be checked and changed before board installation Geographical Address Switch S1 The Tsi148 VMEbus Status Register provides the VMEbus geographical address of the MVM2500 The switch reflects the inverted states of the geographical address signals Applications not using the five row backplane can use the geographical address switch to assign a geographical address based on the following diagram MVME2500 Installation and Use 6806800L01H 57 Controls LEDs and Connectors 58 Note that this switch is wired in parallel with the geographical address pins on the 5 row connector These switches must be in the OFF position whe
61. PLD Boot Bank Register REG PLD Boot Bank OXFFDF0050 Installation and Use 6806800L01H 89 Memory Maps and Registers Table 5 13 PLD Boot Bank Register REG PLD Boot Bank OXFFDF0050 SPI GOODReg BOOT B BOOT S write OxA4 into this reg to indicate successful loading of the U Boot R W R R pessum ies Field Description BOOT BLOCK Boot Block Manual Selector Switch 1 SPIO 0 SPI BOOT SPI Actual Boot Bank 1 5 1 0 SPIO 90 MVME2500 Installation and Use 6806800L01H 5 5 11 Memory Maps and Registers PLD Write Protect and I2C Debug Register The MVME2500 PLD provides an 8 bit register which is used to indicate the status of I2C and SPI write protect manual switches and is used to control the SPI write enable I2C debug ports are also provided in this register which can be used in controlling the bus status Table 5 14 PLD Write Protect and I2C Debug Register PLD Write Protect I2C OxFFDF0054 6 3 2 1 0 Field RSVD MASTER FLASH_ DEB SERIAL I2C 1 I2C_1_C _WP_DI WP_N UG_EN FLASH_ SABLED WP R R W RESET 0 1 0 0 1 0 1 1 Field Description MASTER_WP_DISABLED 2 devices manual switch write protect status 1 Write protect enabled 0 Write protect disabled FLASH WP SPI devices manual switch write protect status 1 Write protect disabled 0 Write protect enabled MVME2500 Installation and Use 6806800L01H 91
62. RTM through the backplane connector Due to controller limitations one controller is designed to be routed to the front panel or to the RTM This setting is possible by using a third party gigabit Ethernet LAN switch with a single enable switch such as PERICOM s P13L301D The routing direction can be configured through the on board dip switch Each Ethernet controller has a single dedicated Broadcom 546165 with integrated MAC and PHY The registers of the PHY can be accessed through the processor s two wire Ethernet management interface The front panel RJ45 connector has integrated speed and and activity status indicator LEDs Isolation transformers are provided onboard for each port MVME2500 Installation and Use 6806800L01H Functional Description 4 6 4 6 1 4 6 2 SPI Bus Interface The enhanced serial peripheral interface eSPI allows the device to exchange data with peripheral devices such as 5 RTC Flash and the like The eSPI is a full duplex synchronous character oriented channel that supports a simple interface such as receive transmit clock and chip selects The 5 receiver and transmitter each have a FIFO of 32 Bytes P20x0 supports up to four chip selects and RapidS full clock cycle operation It can operate both full duplex and half duplex It works with a range of 4 bit to 16 bit data characters and is a single master environment MVME2500 is configured such that the eSPI can operate up to 200 M
63. Typical Measured Operating 18 5W 14 8 W 18 5W 14 8 W aw ise MVME2500 0171 24W 16 6 W 2500 0173 24W 16 6 W 2500 0171 24W 16 6 W The power is measured when the board is in standby Linux prompt Power will significantly increase when adding hard drives or a XMC PMC card MVME2500 Installation and Use 6806800L01H Hardware Preparation and Installation The following table shows the power available when the MVME2500 is installed in either a three row or five row chassis and when 5 are present Chassis Type Available Power Power With PMCs Three Row 70 W maximum below 70 W Five Row 90 W maximum below 90 W YE Keep below power limit Cooling limitations must be considered N 7 2 3 3 Equipment Requirements The following are recommended to complete a MVME2500 system VMEbus system enclosure e System console terminal e Operating system and or application software e Transition module and connecting cables 2 4 Configuring the Board The board provides software control over most options Settings can be modified to fit the user s specifications To configure set the bits in the control register after installing the board in a system Make sure that all user defined switches are properly set before installing a PMC XMC module For more information see Switches on page 57 MVME2500 Installation and Use 6806800L01H 29 Hardware Preparation and Installation 2 5
64. Word OxFFC80404 E A EUN ELDER COR Field TickTimer Compare Value High Word 16 bits OPER R W RESET 0x0000 Table 5 25 Compare Low Word Registers Tick Timer 0 Compare Value Low Word OxFFC80206 Tick Timer 1 Compare Value Low Word OxFFC80306 REG Tick Timer 2 Compare Value Low Word OxFFC80406 TickTimer Compare Value Low Word 16 bits R W 0x0000 100 MVME2500 Installation and Use 6806800L01H Memory Maps and Registers 5 6 4 Counter High and Low Word Registers When enabled the tick timer counter register increments every microsecond Software may read or write the counter at any time Table 5 26 Counter High Word Registers Tick Timer 0 Counter Value High Word OxFFC80208 Tick Timer 1 Counter Value High Word OxFFC80308 REG Tick Timer 2 Counter Value High Word OxFFC80408 Ce CHR EEE Field TickTimer Counter Value High Word 16 bits OPER R W RESET 0x0000 Table 5 27 Counter Low Word Registers Tick Timer 0 Counter Value Low Word OxFFC8020A Tick Timer 1 Counter Value Low Word OxFFC8030A REG Tick Timer 2 Counter Value Low Word OxFFC8040A TickTimer Counter Value Low Word 16 bits R W 0x0000 MVME2500 Installation and Use 6806800L01H 101 Memory Maps and Registers 102 MVME2500 Installation and Use 6806800L01H Chapter 6 Boot System 6 1
65. bedingt in allen Phasen des Betriebs der Wartung und der Reparatur des Systems die Anweisungen die diesen Hinweisen enthalten sind Sie sollten au erdem alle anderen Vorsichtsma nahmen treffen die f r den Betrieb des Produktes innerhalb Ihrer Betriebsumgebung notwendig sind Wenn Sie diese Vorsichtsma nahmen oder Sicherheitshinweise die an anderer Stelle diese Handbuchs enthalten sind nicht beachten kann das Verletzungen oder Sch den am Produkt zur Folge haben Emerson ist darauf bedacht alle notwendigen Informationen zum Einbau und zum Umgang mit dem Produkt in diesem Handbuch bereit zu stellen Da es sich jedoch um ein komplexes Produkt mit vielf ltigen Einsatzm glichkeiten handelt k nnen wir die Vollst ndigkeit der im Handbuch enthaltenen Informationen nicht garantieren Falls Sie weitere Informationen ben tigen sollten wenden Sie sich bitte an die f r Sie zust ndige Gesch ftsstelle von Emerson Das Produkt wurde entwickelt um die Sicherheitsanforderungen f r SELV Ger te nach der Norm EN 60950 1 f r informationstechnische Einrichtungen zu erf llen Die Verwendung des Produkts in einer anderen Anwendung erfordert eine Sicherheits berpr fung f r diese spezifische Anwendung Einbau Wartung und Betrieb d rfen nur von durch Emerson ausgebildetem oder im Bereich Elektronik oder Elektrotechnik qualifiziertem Personal durchgef hrt werden Die in diesem Handbuch enthaltenen Informationen dienen ausschlie lich dazu das Wisse
66. ces such as VPD SPD EEPROM RTC temperature sensor RTM XMC and IDT clocking MVME2500 Installation and Use 6806800L01H 73 Functional Description 4 14 4 15 4 15 1 74 The RTM I2C address can be configured by the user and should not contain duplicate addresses to avoid conflict For more information see 2 Bus Device Addressing on page 118 Reset Control FPGA The FPGA provides the following functions e Power control and fault detection Reset sequence and reset management e Status and control registers e Miscellaneous control logic e Watchdog timer e 32 bit Tick Timer e Clock generator e Switch decoder and LED controller Power Management The MVME2500 backplane is utilized to derive 3 3V 2 5V 1 8V 1 5V 1 2V 1 05V voltage rail Each voltage rail is controlled by the FPGA through an enable pin of the regulator while the output is monitored through power good signal If a voltage rail fails the FPGA will disable each supply To restart the system the chassis power switch must be powercycled Onboard Voltage Supply Requirement The onboard power supply is considered to be out of regulation if the output voltage level is below the minimum required power or goes beyond the maximum Table 4 1 Voltage Supply Requirement Voltage Rail Requirement Voltage Rail Minimum Maximum 3 3V 3 15V 3 45V MVME2500 Installation and Use 6806800L01H Functional Description Table 4 1 Volta
67. ch digung des Produktes und von Zusatzmodulen Fehlerhafte Installation von Zusatzmodulen kann zur Besch digung des Produktes und der Zusatzmodule f hren Lesen Sie daher vor der Installation von Zusatzmodulen die zugeh rige Dokumentation MVME2500 Installation and Use 6806800L01H 139 Sicherheitshinweise Kabel und Stecker Batterie 140 Besch digung des Produktes Bei den RJ 45 Steckern die sich an dem Produkt befinden handelt es sich entweder um Twisted Pair Ethernet TPE oder um E1 T1 1 Stecker Beachten Sie dass ein versehentliches Anschlie en einer E1 T1 1 Leitung an einen TPE Stecker das Produkt zerst ren kann e Sie deshalb TPE Anschl sse in der N he Ihres Arbeitsplatzes deutlich als Netzwerkanschl sse e Stellen Sie sicher dass die L nge eines mit Ihrem Produkt verbundenen TPE Kabels 100 m nicht berschreitet e Das Produkt darf ber die TPE Stecker nur mit einem Sicherheits Kleinspannungs Stromkreis SELV verbunden werden Bei Fragen wenden Sie sich an Ihren Systemverwalter Besch digung des Blades Ein unsachgem er Einbau der Batterie kann gef hrliche Explosionen und Besch digungen des Blades zur Folge haben Verwenden Sie deshalb nur den Batterietyp der auch bereits eingesetzt wurde und befolgen Sie die Installationsanleitung Datenverlust Wenn Sie die Batterie austauschen k nnen die Zeiteinstellungen verloren gehen Eine Backupversorgung verhindert den
68. ct your local Emerson sales representative for the availability of alternative officially approved battery models Data Loss e Replacingthe battery can result in loss of time settings Backup power prevents the loss of data during replacement Quickly replacing the battery may save time settings Data Loss e ifthe battery has low or insufficient power the RTC is initialized Replace the battery before seven years of actual battery use have elapsed PCB and Battery Holder Damage e Removing the battery with a screw driver may damage the PCB or the battery holder To prevent damage do not use a screw driver to remove the battery from its holder 126 MVME2500 Installation and Use 6806800L01H Replacing the Battery Replacement Procedure To replace the battery proceed as follows 1 Remove the old battery 2 Install the new battery with the plus sign facing up 3 Dispose ofthe old battery according to your country s legislation and in an environmentally safe way MVME2500 Installation and Use 6806800L01H 127 Replacing the Battery 128 MVME2500 Installation and Use 6806800L01H Related Documentation B 1 Emerson Network Power Embedded Computing Documents The publications listed below are referenced in this manual You can obtain electronic copies of Emerson Network Power Embedded Computing publications by contacting your local Emerson sales office For released products you can also vis
69. description is necessary for troubleshooting and debugging 3 3 1 Front Panel LEDs The front panel LEDs are listed below Figure3 3 Front Panel LEDs SPEED SPEED USER1 FAIL GENET 1 GENET 2 MVME2500 Installation and Use 6806800L01H 37 Controls LEDs and Connectors Table 3 1 Front Panel LEDs Label Function Location User Defined Front panel Color Off Yellow Red Description By default User Software Controllable Refer to the User LED Register User Software Controllable Refer to the User LED Register Board Fail Front panel Off Normal operation after successful firmware boot One or more on board power rails has failed and the board has shutdown to protect the hardware Normal during power up during hardware reset such as a front panel reset May be asserted by the BDFAIL bit in the Tsi148 VSTAT register GENET1 TSEC1 Front panel No link SPEED Link Speed Integrated 1 0 1 OOBASE T operation RJ45 LED 1000 BASE T operation GENET1 TSEC1 Front panel Off No activity ACT Activity Integrated Blinking Green Activity proportional to bandwidth RJ45 LED utilization GENET2 TSEC2 Front panel Off No link SPEED Link Speed Integrated Amber 10 100BASE T operation RJ45 LED s Green 1000BASE T operation GENET2 TSEC2 Front panel Off No activity ACT Activity Integrated Blinking Green Activity proportional to bandwidth RJ45 LED utilization MVME
70. digung von Schaltkreisen Elektrostatische Entladung und unsachgem er Ein und Ausbau des Produktes kann Schaltkreise besch digen oder ihre Lebensdauer verk rzen Bevor Sie das Produkt oder elektronische Komponenten ber hren vergewissern Sie sich da Sie in einem ESD gesch tzten Bereich arbeiten Fehlfunktion des Produktes Schalter die mit Reserved gekennzeichnet sind k nnen mit produktionsrelevanten Funktionen belegt sein Das ndern dieser Schalter kann im normalen Betrieb St rungen ausl sen Verstellen Sie nur solche Schalter die nicht mit Reserved gekennzeichnet sind Pr fen und ggf ndern Sie die Einstellungen der nicht mit Reserved gekennzeichneten Schalter bevor Sie das Produkt installieren Installation Datenverlust Das Herunterfahren oder die Deinstallation eines Boards bevor das Betriebssystem oder andere auf dem Board laufende Software ordnungsmem ss beendet wurde kann zu partiellem Datenverlust sowie zu Sch den am Filesystem f hren Stellen Sie sicher dass s mtliche Software auf dem Board ordnungsgem ss beendet wurde bevor Sie das Board herunterfahren oder das Board aus dem Chassis entfernen Besch digung des Produktes Fehlerhafte Installation des Produktes kann zu einer Besch digung des Produktes f hren Verwenden Sie die Handles um das Produkt zu installieren deinstallieren Auf diese Weise vermeiden Sie dass das Face Plate oder die Platine deformiert oder zerst rt wird Bes
71. e 3 7 VMEbus P2 Connector continued Pin RowA Row B Row RowD Row 2 23 PMCIO 46 DATA 24 PMCIO 45 2 Serial 3 RTS 24 PMCIO 48 DATA 25 PMCIO 47 GE4_2 GND 25 PMC IO 50 DATA 26 PMC IO 49 GND Serial 4 RX 26 PMCIO 52 DATA 27 PMCIO 51 1 GND 27 PMCIO 54 DATA 28 PMCIO 53 GE4 1 Serial 4 TX 28 PMCIO 56 DATA 29 PMCIO 55 GND GND 29 PMCIO 58 DATA 30 PMCIO 57 GE4_0 Serial 4 CTS 30 PMC IO 60 DATA 31 PMCIO 59 4_0 GND 31 PMCIO 62 GND PMCIO 61 GND Serial 4 RTS 32 PMCIO 64 5V PMCIO 63 5V GND 3 4 2 Onboard Connectors 3 4 2 1 Flash Program Connector P7 The Flash Program Connector is depopulated in the production version of the MVME2500 However each pin is exposed for the 60 pin header connector for the boundary scan Table 3 8 Flash Programming Header P7 Signal Description HOLD 1 Chip Select 1 Chip Select 0 Programmer s VCC Master In Slave OUT MISO HOLD 0 Keying 8 CLOCK MVME2500 Installation and Use 6806800L01H 45 Controls LEDs and Connectors Table 3 8 Flash Programming Header P7 continued a Description E Master OUT Slave IN MOSI 3 4 2 2 SATA Connector J3 The onboard customized SATA connector is compatible with the Emerson SATA kit namely VME 64GBSSDKIT and IVME7210 MNTKIT Table 3 9 Custom SATA Connector J3 Pin Description Pin Signal Description GND SATA POWER ENABLE SATA DETE
72. ectric cable connected to a TPE bushing does not exceed 100 meters e Make sure the TPE bushing of the system is connected only to safety extra low voltage circuits SELV circuits If in doubt ask your system administrator MVME2500 Installation and Use 6806800L01H 135 Safety Notes Battery Board System Damage Incorrect exchange of lithium batteries can result in a hazardous explosion When exchanging the on board lithium battery make sure that the new and the old battery are exactly the same battery models If the respective battery model is not available contact your local Emerson sales representative for the availability of alternative officially approved battery models Data Loss Exchanging the battery can result in loss of time settings Backup power prevents the loss of data during exchange Quickly replacing the battery may save time settings Data Loss If the battery has low or insufficient power the RTC is initialized Exchange the battery before seven years of actual battery use have elapsed PCB and Battery Holder Damage Removing the battery with a screw driver may damage the PCB or the battery holder To prevent damage do not use a screw driver to remove the battery from its holder 136 MVME2500 Installation and Use 6806800L01H Sicherheitshinweise Dieses Kapitel enth lt Hinweise die potentiell gef hrlichen Prozeduren innerhalb dieses Handbuchs vorrangestellt sind Beachten Sie un
73. ge Supply Requirement Voltage Rail Requirement Voltage Rail Minimum Maximum 1 5V 1 2V 1 2 SW 1 05V 4 15 2 Power Up Sequencing Requirements The power up sequence describes the voltage rail power up timing which is designed to support all the chip supply voltage sequencing requirement MVME2500 Installation and Use 6806800L01H 75 Functional Description 4 16 Clock Structure Atotal of three IDT chips a discrete oscillator and crystal to support all the clock requirements of MVME2500 Figure4 3 Clock Distribution Diagram 25 MHz LVCMOS ICS9FG108 E PGIE SATA BRIDGE FB PHY ICS83905 PGIE SATA BRIDGE GBE SWITCH BP GBE PHY 25 MHz LVCMOS 125 MHz LVCM CPU GBE REF 100 MHz LVCMOS CPU DDRCLK 1 58405071 100 MHz LVCMOS CPU SYSCLK 123 MHz TSI384 Bridge TSI148 Bridg 1 8432 MHz OSC 18 FPGA 8 MHz 24 MHz OSC 24 MHz USB TRANSCEIVER Poa jJi MHz 4 17 Reset Structure MVME2500 reset will initiate after the power up sequence if the 1 5 V power supply is GOOD When the board is at ready state the reset logic will monitor the reset sources and implement the necessary reset function 76 MVME2500 Installation and Use 6806800L01H Functional Description 4 17 1 4 18 4 19 Reset Sequence The timing of the reset sequence supports each chip reset requirements with respect to the power supply Thermal Management MVME2500 utilizes two
74. he next reboot power up 6 3 Boot Options 6 3 1 Booting from a Network In this mode U Boot downloads and boots the Linux kernel from an external TFTP server and mounts a root file system located on a network server 1 Makesurethatthe kernel dtb and ramdisk are accessible to the board from the TFTP server 2 Configure U Boot environment variables setenv ipaddr IP address of MVME2500 setenv serverip IP address of TFTP server setenv gatewayip gateway IP setenv netmask lt netmask gt setenv bootargs root dev ram rw console ttyS0 9600n8 ramdisk_size 700000 cache sram size 0x10000 saveenv 3 Transfer the files through the TFTP from the server to the local memory tftp 1000000 lt kernel_image gt tftp 2000000 lt ramdisk gt tftp C00000 kernel dtb gt 4 Bootthe Linux from the memory bootm 1000000 2000000 c00000 104 MVME2500 Installation and Use 6806800L01H Boot System 6 3 2 6 3 3 Booting from an Optional SATA Drive 1 Makesurethatthe kernel dtb andramdisk are saved in the SATA drive with ext2 partition Configure U Boot environment variable setenv File ulImage kernel image setenv File dtp kernel dtb gt setenv File ramdisk lt ramdisk gt Saveenv Copy the files from the SATA drive to the memory option scsi interface 0 1 device 0 partition 1 ext2load scsi 0 1 1000000 File_ulmage ext2load scsi 0 1 2000000 File_ramdisk ext2load scsi 0 1
75. heets 130 documents 129 specifications 130 replacing the battery 125 S standard compliances 21 MVME2500 Installation and Use 6806800L01H 143 Index 144 MVME2500 Installation and Use 6806800L01H HOW TO REACH LITERATURE AND TECHNICAL SUPPORT For literature training and technical assistance and support programs visit www emersonnetworkpower com embeddedcomputing Emerson Network Power www emersonnetworkpower com embeddedcomput The global leader in enabling Business Critical Continuity ing Power Systems Embedded Computing Outside Plant J Services Connectivity u Embedded Power J Power Switching amp Control Site Monitoring BI DC Power Systems Integrated Cabinet Solutions Precision Cooling BE Surge amp Signal Protection Emerson Business Critical Continuity Emerson Network Power and the Emerson Network Power logo are trademarks and service marks of Emerson Electric Co All other product or service names are the property oftheir respective owners 2014 Emerson Electric Co
76. ing the product e Damage of Circuits Electrostatic discharge and incorrect installation and removal can damage circuits or shorten its life Before touching the board or electronic components make sure that you are working in an ESD safe environment Shipment Inspection 1 Verify that you have received all items of your shipment 2 Check for damage and report any damage or differences to customer service 3 Remove the desiccant bag shipped together with the board and dispose of it according to your country s legislation The product is thoroughly inspected before shipment If any damage occurred during transportation or any items are missing contact customer service immediately Requirements Make sure the board meets the requirements specified in the next sections when the board is operated in your particular system configuration MVME2500 Installation and Use 6806800L01H Hardware Preparation and Installation 2 3 1 Environmental Requirements M Table 2 1 Environmental Requirements Operating temperatures refer to the temperature of the air circulating around the board and notto the component temperature Characteristics Applicable Variants Cooling Method Operating Temperature Commercial Versions MVME2500 0163 MVME2500 0161 MVME2500 0173 MVME2500 0171 Forced Air 7 CFM 0 C to 55 C Extended Temperature Versions MVME2500ET 0173 MVME2500ET 0171 Forced Air 7 CFM 40
77. isable SPI write protect in FPGA register PLD Write Protect and I2C Debug Register 2 Ensure FLASH WP N in SMT Configuration Switch S2 is in the OFF position 3 Select SPI flash 0 MVME2500 Installation and Use 6806800L01H Boot System Sf probe 0 4 Erase 0x90000 bytes starting at SPI address 0 Sf erase 0 0x90000 5 Write 0x90000 bytes from RAM address 0x1000000 starting at SPI address 0 Sf write 0x1000000 0 0x90000 To replace the image in SPI bank 1 replace step 2 with Select SPI flash 1 Sf probe 1 MVME2500 Installation and Use 6806800L01H 111 Boot System 112 MVME2500 Installation and Use 6806800L01H Programming Model Chapter 7 7 1 Overview This chapter includes additional programming information for the MVME2500 7 2 Reset Configuration The MVME2500 supports the power on reset POR pin sampling method for processor reset configuration Each option and the corresponding default setting are described in the following table Table 7 1 POR Configuration Settings CONFIG CCB Config CONFIG PINS LA 29 31 CONFIG SELECTION 41 CCB CLOCK 400 MHz REMARKS DDR PLL Config TSEC 1588 CLK O UT TSEC 1588 PULSE OUTI TSEC 1588 PULSE OUT2 8 1 DDR PLL 800 MHz DDR rate is twice the value of the DDR controller frequency which is then divided by two through the software Core 0 PLL LBCTL LALE LGPL2 LOE LFRE 3 1 CORE CLOCK PLL 120
78. it our Web site for the latest copies of our product documentation 1 Goto www Emerson com EmbeddedComputing The Emerson Embedded Computing website opens 2 Click on Technical Documentation link 3 Click on Search Our Technical Documentation Archive link 4 Inthe Search box type the publication number of the manual you are looking for Table B 1 Emerson Network Power Embedded Computing Publications Document Title Publication Number MVME2500 Release Notes 6806800L02B MVME2500 Quick Start Guide 6806800L03A MVME2500 Safety Notes 6806800L13A MVME7216 RTM Installation and Use 6806800M42C MVME7216 RTM Quick Start Guide 6806800M53A MVME7216 RTM Safety Notes 6806800M54A MVME2500 Installation and Use 6806800L01H 129 Related Documentation B 2 Manufacturers Documents For additional information refer to the following table for manufacturers data sheets or user manuals As an additional help a source forthe listed document is provided Please note that while these sources have been verified the information is subject to change without notice Table B 2 Manufacturers Publications Company Freescale Document Freescale Semiconductor QorlQ P2020 Integrated Processor Reference Manual Rev 0 Tundra Semiconductor Corporation Tsi148 PCI X to VME Bus Bridge User Manual March 2009 B 3 Related Specifications For additional information refer to the following table for rela
79. l Purpose 2 2 2 2 64 4 2 12 Security Engine 5 3 1 64 4 2 13 Common On Chip Processor 2 65 4 2 14 P20x0 Hardware Configuration 65 4 3 System Memoty ee ee ROI CU T cede Re ek 65 4 4 TIMON Rr Tc re ner Dieses 65 MVME2500 Installation and Use 6806800L01H 4 41 RealTime 4 4 2 Internal Timer da metere terme hen 4 4 3 Watchdog 2 4 4 4 FPGATickTimer 4 5 Ethernet Interfaces 2 4 6 Bus lt bees ESTE 4 6 1 SPIFlash 7 4 6 2 SPI Flash Programming 4 6 3 Firmware 4 6 4 Crisis RecoVery issuer k t bh hr an 4 7 Front UART Cohttol osse retirer cate era tae eee A e e ee eg 4 8 RearUART 4 9 PMC XMCSIteS wei een 4971 PMGAdd on Card 4 92 XMCAdd on
80. l number 24 MVME2500 Installation and Use 6806800L01H Chapter 2 Hardware Preparation and Installation 2 1 Overview This chapter provides installation and safety instructions for this product Installation instructions for the optional PMC and transition module are also included A fully implemented MVME2500 consists of the base board plus e PCI Mezzanine Card PMC or PCI E Mezzanine Card for added versatility Reartransition module e SATA kit The following are the things that need to be done before using the board Be sure to read the entire chapter including all caution and warning notes before you begin 1 Unpack the hardware Refer to Unpacking and Inspecting the Board on page 26 2 Configure the hardware by setting jumpers on the board and RTM Refer to Configuring the Board on page 29 Install the transition module in the chassis Refer to Rear Transition Module on page 30 Install PMC module if required Refer to PC XMC Support on page 31 Install span module if required Refer to Support on page 31 Install the board in the chassis Refer to Installing and Removing the Board on page 32 Mom M S p Attach cables and apply power Refer to Completing the Installation on page 34 MVME2500 Installation and Use 6806800L01H 25 Hardware Preparation and Installation 2 2 2 3 26 Unpacking and Inspecting the Board Read all notices and cautions prior to unpack
81. ler PIC to manage locally generated interrupts Currently defined external interrupting devices and interrupt assignments along with corresponding edge levels and polarities are shown in the following table Table 7 2 MVME2500 Interrupt List Interrupt Usage Interrupt Line Schematic Interface to CPU Description Reserved for VME interrupt QUART 1 RTB Quart Interrupt QUART IRQ2 RTB Quart Interrupt QUART RTB Quart Interrupt Temperature Two onboard Thermal Sensors Interrupt one is for CPU temp and the other is for board temp Ethernet 1 Management I2C Ethernet interrupt is handled by PHY Connected for flexibility Ethernet 3 Management I2C Ethernet interrupt is handled by PHY Connected for flexibility IRQ7 GPIOO Ethernet 2 Management I2C Ethernet interrupt is handled by PHY Connected for flexibility IRQ8 GPIO1 RTC Real Time a IRQ9 GPIO2 FPGA Interrupt NMI and 3 Tick Timer Interrupts IRQ10 GPIO3 FPGA Interrupt Power Interruption IRQ11 GPIOA QUART IRQO RTB Quart Interrupt MVME2500 Installation and Use 6806800L01H 117 Programming Model 7 4 9 118 2 Bus Device Addressing The following table contains the I2C devices used for the MVME2500 and its assigned device address Table 7 3 I2C Bus Device Addressing SPD 256x8 ADT 7461 Temperature Sensor N A DS 1375 real time clock N A VPD 8192x8 1 0x55 RTM EEPROM 8192X8 1 2 0x56 XMC EEPROM
82. lers eTSECs Two PCI E 1 0a x1 interface controllers One PCI E 1 0a x2 interface controller USB 2 0 interface Enhanced secure digital host controller DDR3 memory controller at 800 MT s SPI interface four chip selects but only two are used on the board Enhanced local bus controller UART Two I2C interfaces Programmable interrupt controller Memory 1 GB or 2 GB DDR3 soldered chip memory without ECC Introduction Table 1 1 Key Features of the MVME2500 continued Function Front panel I O Backplane I O Features Micro DB9 RS 232 serial console port USB 2 0 Two RJ45 10 100 1000BASE T Ethernet Reset Abort switch Fail LED and User LED PMC XMC front panel I O optional VME Bus RTM I O through VME P2 PMC XMC I O with PA I O Two 10 100 1000BASE T Ethernet Four UART RTM I2C Presence Power Expansion Expansion site 1 PMC supporting PCI X 64 33 interface supporting PCI E 1 0a 2 interface Expansion site 2 drive kit Boot Flash 16 MB SPI Flash Persistent Data Storage User Flash I2C Devices CPLD 512 KB MRAM SDHC Socket Real Time Clock Board Temperature Sensor 8 VPD EEPROM Two 64 KB User EEPROM Watchdog timers and registers Boot Firmware U Boot based firmware image in 16 MB SPI Flash This flash is split into two 8 MB chips 20 MVME2500 Installation and Use 6806800L01H Introduction 1 2 Table 1 1
83. mined by this formula Prescaler Adjust 256 CLKIN CLKOUT CLKIN is the input clock source in MHz and CLKOUT is the desired output clock reference in MHz Table 5 22 Prescaler Register Prescaler T OxFFC80100 15 13 12 10 Field RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD Prescaler Register 8 bits OPER RESET 0x00e7 The prescaler provides the clock required by each ofthethree times The tick timers require a 1 MHz clock input The input clock to the prescaler is 25 MHz The default value is set for 0x00E7 which gives a 1 MHz reference clock for a 25 MHz input clock source 98 MVME2500 Installation and Use 6806800L01H Memory Maps and Registers 5 6 2 Control Registers Table 5 23 Control Registers Tick Timer 0 Control Register OXFFC80202 Tick Timer 1 Control Register OXFFC80302 REG Tick Timer 2 Control Register OXFFC80402 15 R W 0x0000 Field Description ENC Enable counter When the bit is set the counter increments When the bit is cleared the counter does not increment Clear Counter on Compare When the bit is set the counter is reset to 0 when it compares with the compare register When the bit is cleared the counter is not reset COVF Clear Overflow Bits The overflow counter is cleared when a 1 is written to this bit OVF Overflow Bits are the output of the overflow counter It increments each time the tick timer sends an in
84. n Damage of Circuits Electrostatic discharge and incorrect installation and removal can damage circuits or shorten its life e Before touching the board or electronic components make sure that you are working in an ESD safe environment Product Damage e Onlyuseinjector handles for board insertion to avoid damage to the front panel and or PCB Deformation of the front panel can cause an electrical short or other board malfunction 1 Attach an ESD strap to your wrist Attach the other end of the strap to an electrical ground Make sure that it is securely fastened throughout the procedure Remove VME filler panels from the VME enclosures as appropriate Install the top and bottom edge of the board into the quides of the chassis Ensure that the levers of the two injector ejectors are in the outward position Slide the board into the chassis until resistance is felt Simultaneously move the injector ejector levers in an inward direction ui A Verify that the board is properly seated and secure it to the chassis using the two screws located adjacent to the injector ejector levers 8 Connect the appropriate cables to the board To remove the board from the chassis reverse the procedure and press the red locking tabs IEEE handles only to extract the board MVME2500 Installation and Use 6806800L01H 33 Hardware Preparation and Installation 2 7 34 Completing the Installatio
85. n Theboardis designed to operate as an application specific computer blade or an intelligent I O board carrier It can be used in any slot in a VME chassis Once the board is installed you are ready to connect peripherals and apply power to the board NOTICE Product Damage 45 connectors on modules are either twisted pair Ethernet or E1 T1 J1 network interfaces Connecting an E1 T1 1 line to an Ethernet connector may damage your system Make sure that TPE connectors near your working area are clearly marked as network connectors Verify that the length of an electric cable connected to a TPE bushing does not exceed 100 meters Make sure the TPE bushing of the system is connected only to safety extra low voltage circuits SELV circuits If in doubt ask your system administrator The console settings for the MVME2500 are e Eightbits per character One stop bit per character Parity disabled no parity e Baud rate of 9600 baud Verify that hardware is installed and the power peripheral cables connected are appropriate for your system configuration Replace the chassis or system cover reconnect the chassis to power source and turn the equipment power on MVME2500 Installation and Use 6806800L01H Chapter 3 Controls LEDs and Connectors 2 3 1 Board Layout The following figure shows the components and connectors on the MVME2500 Figure 3 1 Component
86. n installed in a 5 row chassis in order to get the correct address from the P1 connector This switch also includes the SCON control switches Figure3 5 Geographical Address Switch i 1 ON Sn Table i table 2 See Table See Table 3 GAP 0 GAP 1 4 GA4 0 GA4 1 3 GA3 0 GA3 1 6 GA2 0 GA2 1 7 GA1 0 1 8 GAO 0 1 Table 3 19 Geographical Address Switch Position Function Default VME SCON Auto Auto SCON VME SCON SEL Non SCON GAP GAP4 1 GAP3 1 GAP2 1 1 The VME SCON MAN switch is OFF to select Auto SCON mode The switch is ON to select manual SCON mode whichworks in conjunction with the VME SCON SEL switch 2 The VME SCON SEL switch is OFF to select non SCON mode The switch is ON to select always SCON mode This switch is only effective when the VME SCON MAN switch is ON MVME2500 Installation and Use 6806800L01H Controls LEDs and Connectors 3 5 2 SMT Configuration Switch 52 This eight position SMT configuration switch controls the flash bank write protect selects the flash boot image and controls the safe start ENV settings The default setting on all switch positions is OFF and is indicated by brackets in Table 3 20 Figure3 6 SMT Configuration Switch Position Normal ENV Boot Block A Flash WP N PMC XMC SEL PMC 133 Master WP Disabled GBE MUX SEL Reserved SW2 DEFAULT OFF Normal Env OFF Flash Block A
87. n the LED Sequence D33 D32 D35 Description 1 0 0 0 U boot has been copied from SPI flash to CPU cache 2 0 1 0 Serial console has been initialized some text is visible on the terminal 3 0 1 1 DDR has been initialized using SPD parameters Execution is still in the cache 4 1 0 0 Execution has been relocated to RAM 5 1 0 1 PCI has been initialized 6 1 1 0 POST routines are finished 7 1 1 1 Additional SW routines are finished 8 0 0 0 U boot promptis visible on the terminal can start loading OS image from USB Ethernet SATA SSD SD 4 20 2 Chain and Board The MVME2500 is designed to work with separate JTAG board rather than with an onboard JTAG multiplexer The chip can support up to a 6 scan port and the board s boundary scan requires the following to function ASSET hardware JTAG board and cable The MVME2500 provides a 60 pin header that can connect to the JTAG board using a custom cable 78 MVME2500 Installation and Use 6806800L01H Functional Description 4 20 3 4 21 The JTAG board provides three different connectors for the ASSET hardware flash programming and the MVME2500 JTAG connector The board is equipped with TTL buffers to help improve the signal quality as it traverses over the wires Custom Debugging Custom debugging makes use of the common on chip processor Refer to Common On Chip Processor COP on page 65 for details Rear Transition Module
88. n von Fachpersonal zu erg nzen k nnen dieses jedoch nicht ersetzen Halten Sie sich von stromf hrenden Leitungen innerhalb des Produktes fern Entfernen Sie auf keinen Fall Abdeckungen am Produkt Nur werksseitig zugelassenes Wartungspersonal oder anderweitig qualifiziertes Wartungspersonal darf Abdeckungen entfernen um Komponenten zu ersetzen oder andere Anpassungen vorzunehmen Installieren Sie keine Ersatzteile oder f hren Sie keine unerlaubten Ver nderungen am Produkt durch sonst verf llt die Garantie Wenden Sie sich f r Wartung oder Reparatur bitte an die f r Sie zust ndige Gesch ftsstelle von Emerson So stellen Sie sicher dass alle sicherheitsrelevanten Aspekte beachtet werden MVME2500 Installation and Use 6806800L01H 137 Sicherheitshinweise EMV Betrieb 138 Das Produkt wurde in einem Emerson Standardsystem getestet Es erf llt die f r digitale Ger te der Klasse A g ltigen Grenzwerte in einem solchen System gem den Richtlinien Abschnitt 15 bzw EN 55022 Klasse A Diese Grenzwerte sollen einen angemessenen Schutz vor St rstrahlung beim Betrieb des Produktes in Gewerbe sowie Industriegebieten gew hrleisten Das Produkt arbeitet im Hochfrequenzbereich und erzeugt St rstrahlung Bei unsachgem em Einbau und anderem als in diesem Handbuch beschriebenen Betrieb k nnen St rungen im Hochfrequenzbereich auftreten Wird das Produkt in einem Wohngebiet betrieben so kann dies mit grosser Wahr
89. nstantaneous status of the supply s power good signals Table 5 9 PLD Power Good Monitor Register Field Description PWR V1P05 PWRGD 1 05V Core supply power good indicator PWR V1P2 PWRGD 1 2V Supply power good indicator PWR V1P8 PWRGD 1 8V Supply power good indicator MVME2500 Installation and Use 6806800L01H Memory Maps and Registers 5 5 7 PWR V3P3 PWRGD 3 3V Supply power good indicator PWR V2P5 PWRGD 2 5V Supply power good indicator PWR 2 SW PWRG 1 2V SW Supply power good indicator D PWR V1P5 PWRGD 1 5V Supply power good indicator 1 Supply Good and Stable 0 Otherwise PLD LED Control Register The MVME2500 PLD provides an 8 bit register which controls the eight LEDs Table 5 10 PLD LED Control Register REG PLD LED CTRL OXFFDFOO1C i 7 6 5 4 3 2 1 0 Bit Field D2 Yellow OPER 1 LED on 0 LED off For more information on LEDs refer to Table Front Panel LEDs on page 38 and Table Onboard LEDs Status on page 39 MVME2500 Installation and Use 6806800L01H 87 Memory Maps and Registers 5 5 8 88 PLD PCI PMC XMC Monitor Register The MVME2500 PLD provides an 8 bit register which indicates the status of the PCI PMC XMC interface signals Table 5 11 PLD PCI PMC XMC Monitor Register REG PLD PCI PMC MNTR OxFFDF001D INN NEN NE Field RSVD RSVD RSVD PMC X PMCI_E PMC1P_ 1
90. nt hereof without obligation of Emerson to notify any person of such revision or changes Electronic versions of this material may be read online downloaded for personal use or referenced in another document as a URL to a Emerson website The text itself may not be published commercially in print or electronic form edited translated or otherwise altered without the permission of Emerson It is possible that this publication may contain reference to or information about Emerson products machines and programs programming or services that are not available in your country Such references or information must not be construed to mean that Emerson intends to announce such Emerson products programming or services in your country Limited and Restricted Rights Legend If the documentation contained herein is supplied directly or indirectly to the U S Government the following notice shall apply unless otherwise agreed to in writing by Emerson Use duplication or disclosure by the Government is subject to restrictions as set forth in subparagraph b 3 of the Rights in Technical Data clause at DFARS 252 227 7013 Nov 1995 and of the Rights in Noncommercial Computer Software and Documentation clause at DFARS 252 227 7014 Jun 1995 Contact Address Emerson Network Power Embedded Computing 2900 South Diablo Way Suite 190 Tempe AZ 85282 USA Contents About this Manual un EP VG FR UUREPEPREREDUPETCHDPEPRPIUUIUPE
91. ntroller supports most JEDEC standard DDR2 and DDR3 memories available Unbuffered registered DIMMs are also supported A built in error checking and correction ECC ensures very low bit error rates for reliable high frequency operation Though ECC is not implemented on MVME2500 the board includes a place holder for additional chips for ECC whenever it is needed in the future The memory controller supports the following 16 GB of memory Asynchronous clocking from platform clock with programmable settings that meets all the SDRAM timing parameters e Upto four physical banks each bank can be independently addressed to 64 Mbit to 4 Gbit memory devices depending on the internal device configuration with x8 x16 x32 data ports e Chip set interleaving and partial array self refresh e Data mask signal and read modify write for sub double word writes when ECC is enabled e Double bit error detection and single bit error correction ECC 8 bit check work across 64 bit data Address parity for registered DIMMs MVME2500 Installation and Use 6806800L01H Functional Description 4 2 3 4 2 4 4 2 5 4 2 6 4 2 7 e Automatic DRAM initialization sequence or software controlled initialization sequence and automatic DRAM data initialization e Write leveling for DDR3 memories and supports up to eight posted refreshes PCI Express Interface The PCI Express interface is compatible with the PCI Express Base Specifica
92. on AUTO SHDN MASK Automatic Shutdown Mask 1 Auto Shutdown Mask Enable 0 Auto Shutdown Mask Disable Note Automatic shutdown is generated after 1 second whenever a power good signal de asserts Shutdown Board Shutdown Register 1 Shutdown Enable 0 Shutdown Disable Note If a board entered the shutdown state by writing this register the chassis power needs to be cycled to power up the board again Soft RST Board Soft Reset self clearing 1 Execute soft reset 0 No reset Clear Cause Clear Reset Reason self clearing 1 Clear Reason 0 None MVME2500 Installation and Use 6806800L01H Memory Maps and Registers CPU RESET CPU HRESET 1 Reset Reason 1 Reset is due to CPU HRESET REQ L signal 0 None WD TIMEOUT Watchdog Timeout Reset Reason 1 Reset is due to watchdog timing out 0 None LRSTO TSI LRSTO Reset Reason 1 Reset is due to LRSTO signal 0 None Sft RST Soft Reset Reset Reason 1 Reset is due to Soft RST register being set or the front panel switch being pressed more than three 0 None 5 5 16 PLD Watchdog Timer Refresh Register The MVME2500 provides a watchdog timer refresh register Table 5 19 PLD Watchdog Timer Refresh Register REG PLD Watch Dog Timer Load OxFFC80600 Field Description Refresh Counter Refresh When the pattern 0x00DB is written the watchdog counter will be reset to zero 96 MVME2500 Installation and Use 6806800L01H
93. ormation from example command that is not necessary at the time being Ranges for example 0 4 means one of the integers 0 1 2 3 and 4 used in registers MVME2500 Installation and Use 6806800L01H 15 About this Manual Notation Description Logical OR I Indicates a hazardous situation which if not avoided could result in death or serious injury JOOCODOOO000000000000000000000000000000000000000 Indicates a hazardous situation which if not avoided may result in minor or moderate injury XOOCOODOCOOODOOOUCCOOUCOCOOOQCOOUCODOCOODOCQOUCDOQCCCOQDOCOOOUE Indicates a property damage message XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX XXXXXXXXXXXXXXXXOOOOOOOOOOOOOOOOOO000000000000OO0 OO QC a Se No danger encountered Pay attention to important 9 30000000000000000000000000000000000000000000000000 i nfo rm ati on H i 16 MVME2500 Installation and Use 680680
94. otvx Boot VxWorks from an ELF image coninfo Print console devices and information cmp Memory compare Multiprocessor CPU boot manipulation and release 32 Checksum calculation date diags Runs POST diags Get set reset date amp time echo Echo args to console exit Exit script ext2load Load binary file from a Ext2 file system ext2ls List files in a directory default fatinfo Print information about file system fatload Load binary file from a DOS file system List files in a directory default Flattened device tree utility commands go Start application at address addr 108 MVME2500 Installation and Use 6806800L01H Boot System Table 6 1 MVME2500 Specific U Boot Commands continued Command Print header information for application image imxtract Extract a part of a multi image interrupts Enable or disable interrupts itest Return true false on integer compare loadb Load binary file over serial line kermit mode Load S Record file over serial line Load binary file over serial line ymodem mode loop Infinite loop on address range md Memory display memmap Displays memory map mii MII utility commands Memory modify auto incrementing address mmc MMC sub system mmcinfo Display MMC info moninit Reset nvram serial and write monitor to SPI flash mtest Simple RAM read write test mw
95. r operates using the GMII protocol or RGMII if configured in reduced mode if its not configured to operate in SGMII mode The eTSEC3 controller operates using the RGMII protocolif not configured to operate in SGMII mode MVME2500 Installation and Use 6806800L01H 115 Programming Model Table 7 1 POR Configuration Settings continued CONFIG BOOT ROM Location Host Agent Config Port Select DDR SDRAM TYPE SerDes PLLTime Out Enable System Speed CONFIG PINS TSECI_TXD 6 4 TSECI_TX_ER LWE1 LBS1 LA 18 19 TSEC1_TXDJ 3 1 TSEC2_TX_ER TSEC2_TXD1 TRIG_OUT LA 28 CONFIG SELECTION On chip boot ROM SPI configuration x 0 SDHC x 1 REMARKS The processor acts as the host root complex for all PCI E Serial Rapid interfaces default PCI E 1 x1 2 5 Gbps SerDes lane 0 PCI E 2 x1 2 5 Gbps SerDes lane 2 PCI E 3 x2 2 5 Gbps SerDes lane 2 3 DDR31 5 V CKE low at reset default Disable PLL lock time out counter The power on reset sequence waits indefinitely for the SerDes PLL to lock default SYSCLOCK is above 66 MHz SDHC Card Detect Polarity TSEC2_TXD_5 Not Inverted RAPID System Size 116 Default RapidlO is not used MVME2500 Installation and Use 6806800L01H Programming Model 7 3 Interrupt Controller The MVME2500 uses the MPC8548E integrated programmable interrupt control
96. r and supports up to 1 5 Gbps SATA Gen 1 For status indicators it has an onboard green LED D12 and D13 for SATA link and SATA activity status respectively VME Support The MVME2500 can operate in either System Controller SCON mode or non SCON mode as determined by the the switch setting of 1 1 and 51 2 The P20x0 x1 linkis used for the VME backplane connectivity through the Tsi384 PCI E PCI X and Tsi148 PCI X VMEBus bridges See VMEBus P1 Connector on page 42 and VMEBus P2 Connector on page 44 for more information Tsi148 VME Controller The VMEbus interface for the MVME2500 is provided by the Tsi148 VMEbus controller The Tsi148 provides the required VME VME extensions and 2eSST functions TI SN74VMEH22501transceivers are used to buffer the VME signals between the Tsi148 and the VME backplane Refer to the Tsi148 user s manual for additional details and or programming information USB The MVME2500 processor implements a dual role DR USB 2 0 compliant serial interface engine DC power to the front panel USB port is supplied using a USB power switch which provides soft start current limiting over current detection and power enable for port 1 12 Devices The MVME2500 utilizes one of two I2C ports provided by the board s processor The IC bus is atwo wire serial data SDA and serial clock SCL synchronous multi master bi directional serial bus that allows data exchance between this device and other devi
97. rea Size FPGA Oxffdf0000 OxffdfOfff 4KB ecm local access window CCSR Oxffe00000 Oxffeooffff 4KB ecm Error Correction Module CCSR Oxffe01000 Oxffe01 fff 4KB Memory Controller CCSR Oxffe02000 OxffeO2fff I2C1 CCSR Oxffe03000 Oxffe030ff 2 2 CCSR 0 03100 Oxffe031ff UARTO CCSR Oxffe04500 Oxffe045ff UART1CCSR Oxffe04600 Oxffe046ff 256B ELBC CCSR Oxffe05000 OxffeO5fff 4KB SPI CCSR Oxffe07000 Oxffe07 fff PCIE3 CCSR Oxffe08000 OxffeO8fff PCIE2 CCSR Oxffe09000 OxffeO9fff PCIE1CCSR 0 0 000 OxffeOafff DMA2 CCSR 0 0 100 Oxffe0c303 516B GPIO CCSR OxffeOfcOO OxffeOfcff 256B L2 Cache CCSR Oxffe20000 Oxffe20fff DMA1 CCSR Oxffe21100 Oxffe21303 USB CCSR Oxffe22000 Oxffe22fff ETSECI CCSR Oxffe24000 Oxffe24fff ETSEC2 CCSR Oxffe25000 Oxffe25fff 4KB ETSEC3 CCSR Oxffe26000 Oxffe26fff 4KB SDHCI CCSR Oxffe2e000 Oxffe2efff 4KB Crypto CCSR Oxffe30000 Oxffe3ffff 64 KB msi CCSR Oxffe41600 Oxffe4167f 128B mpic CCSR Oxffe40000 Oxffe7ffff 256 KB Global Utilities CCSR Oxffee0000 OxffeeOfff 4KB L2 Cache Mem Oxf0f80000 OxfOffffff 512KB MVME2500 Installation and Use 6806800L01H 83 Memory Maps and Registers 5 5 Programmable Logic Device PLD Registers 5 5 1 PLD Revision Register The MVME2500 provides a PLD revision register that can be read by the system software to determine the current version of the timers registers PLD Table 5 4 PLD Revision Register PLD Revision Register
98. ription Pin Signal Description MVME2500 Installation and Use 6806800L01H 49 Controls LEDs and Connectors 50 Table 3 12 13 Connector continued Pin Signal Description Pin Signal Description KR WwW MVME2500 Installation and Use 68068001019 Controls LEDs and Connectors Table 3 12 13 Connector continued Pin Signal Description Pin Signal Description 32 GND 64 NC Table 3 13 14 Connector Pin Signal Description Pin Signal Description PMCIO 1 NJ PMCIO 2 4 PMCIO 5 KR w 33 34 35 36 PMC IO 33 PMC IO 37 PMC IO 6 PMC IO 38 PMC IO 7 PMC IO 39 oo NI oJ PMC IO 8 PMC IO 9 PMC IO 10 41 42 PMCIO 11 43 PMCIO 40 PMCIO 41 PMCIO 42 PMC IO 43 PMC IO 12 44 PMC IO 44 PMC IO 13 45 PMC IO 45 14 PMC IO 14 1 1 1 PMCIO 17 6 8 9 4 5 4 6 PMCIO 16 4 7 4 PMC IO 46 PMC IO 47 PMC IO 48 PMC IO 49 18 PMC IO 18 50 PMC IO 50 19 PMC IO 19 51 PMC IO 51 20 PMC IO 20 MVME2500 Installation and Use 6806800L01H 52 PMC IO 52 51 Controls LEDs and Connectors 3 4 2 4 52 Table 3 13 14 Connector continued Pi Signal Description 2 2 2 2 PMCIO 24 Signal Description in Pin 4 56 PMC IO 56 25 PMC IO
99. routes the differential lines to the PMC Otherwise it is routed to the XMC connector PMC Add on Card The MVME2500 PMC interface utilizes IDT s 51384 as the PCie PCI X bridge It can support up to 8 5 Gbps 64 bits x 133 Mhz The onboard switch S2 7 configures the TSI384 to run on either 100 Mhz or 133 Mhz with 133 Mhz as default The MVME2500 supports multi function PMCs and processor PMCs PrPMCs The PMC site has two IDSELs two REQ GNT pairs and EREADY to support PrPMC as defined by VITA39 XMC Add on Card The x2 links the PCI E Gen 1 and is directly routed to the P15 XM connector through Pericom MUX Switch The onboard switch S2 4 should be set to ON XMC add on cards are required to operate at 5V or 12V from carrier to XMC The MVME2500 provides 5V to the XMC VPWR Variable Power pins The MVME2500 does not provide 12V to the VPWR pins Voltage tolerances for VPWR and all carrier supplied voltage 3 3 V 12 V 12 V are defined by the base XMC standard SATA Interface The MVME2500 supports an optional 2 5 SATA HDD The connector interface is compatible with the Emerson SATAMNKIT which contains the following one SSD HDD one SATA board screws and a mounting guide The SATA connector can support a horizontal mounted SSD HDD MVME2500 Installation and Use 6806800L01H Functional Description 4 11 4 11 1 4 12 4 13 MVME2500 uses Marvell s 885 6121 2 2 000 SATA controlle
100. s There are various timer functions implemented in the MVME2500 platform Real Time Clock This operates on a 3 3 V supply monitoring and battery control function MAX6364PUT29 a 32 768 KHz clock generator DS32KHZS and RTC with alarm DS1375T MVME2500 Installation and Use 6806800L01H 65 Functional Description 4 4 2 4 4 3 4 4 4 4 5 See Real Time Clock Battery on page 77 for more information on the real time clock back up battery Internal Timer The processor s internal timer is composed of eight global timers divided into two groups of four timers each Each time has four individual configuration registers and they cannot be cascaded together Watchdog Timer The onboard FPGA provides programmable 16 bit watchdog timers It has a 1 ms resolution and generates a board reset when the counter expires Interrupt is generated to the processor when this occurs Default value is 60 seconds FPGA Tick Timer The MVME2500 supports three independent 32 bit timers that are implemented on the FPGA to provide fully programmable registers for the timers Ethernet Interfaces The MVME2500 has three eTSEC controllers Each one supports RGII GMII and SGMII interface to the external PHY All controllers can only be untilized when using the RGMII interface Using the GMII allows only up to two usable controllers MVME2500 provides two 10 100 1000 Ethernet interfaces on the front panel and anothertwo are routed to the
101. s reserved might carry production related functions and can cause the board to malfunction if their setting is changed Do not change settings of switches marked as reserved The setting of switches which are not marked as reserved has to be checked and changed before board installation Installation Data Loss Powering down or removing a board before the operating system or other software running on the board has been properly shut down may cause corruption of data or file systems 134 MVME2500 Installation and Use 6806800L01H Safety Notes Make sure all software is completely shut down before removing power from the board or removing the board from the chassis Product Damage Only use injector handles for board insertion to avoid damage to the front panel and or PCB Deformation of the front panel can cause an electrical short or other board malfunction Product Damage Inserting or removing modules with power applied may result in damage to module components Before installing or removing additional devices or modules read the documentation that came with the product Cabling and Connectors Product Damage RJ 45 connectors on modules are either twisted pair Ethernet TPE or E1 T1 1 network interfaces Connecting an E1 T1 1 line to an Ethernet connector may damage your system e Make sure that TPE connectors near your working area are clearly marked as network connectors e Verify that the length of an el
102. s securely fastened throughout the procedure 2 Remove the PMC XMC filler plate from the front panel cut out 3 Slide the front bezel of the PMC XMC into the cut out from behind The front bezel of the PMC XMC module will be flushed with the board when the connectors on the module align with the mating connectors on the board 4 Align the mating connectors properly and apply minimal pressure to the PMC XMC until it is seated to the board 5 Insertthe four PMC XMC mounting screws through the mounting holes on the bottom side ofthe board and then thread the four mount points on the PMC XMC Tighten the screws 6 Install the board into the appropriate card slot Make sure that the board is well seated into the backplane connectors Do not damage or bend connector pins 7 Replacethe chassis or system cover 8 Reconnect the system to the power source and then turn on the system When removing the PMC XMC hold it by its long side and exert minimal force when pulling ML it from the baseboad to prevent pin damage 2 6 Installing and Removing the Board This section describes the recommended procedure for installing the board in a chassis Read all warnings and instructions before installing the board The MVME2500 does not support hot swap Power off the slot or system and make sure that the serial ports and switches are properly configured 32 MVME2500 Installation and Use 6806800L01H Hardware Preparation and Installatio
103. s to chip select setup 10 LCSn is outputted one quarter bus clock cycle after the address lines XACS Extra Address to chip select setup 0 Address to chip select setup is determined by ORx ACS SCY Cycle length in bus clocks 0011 Three bus clock cycle wait state 120 MVME2500 Installation and Use 6806800L01H Programming Model SETA External address termination 7 7 0 Access is terminated internally by the memory controller unless the external device asserts LGTA earlier to terminate the access TRLX Timing Relaxed 0 Normal timing is generated by the GPCM EHTR Extended hold time on read accesses 0 The memory controller generates normal timing No additional cycles are inserted 0 No additional bus clock cycles LALE asserted for one bus clock cycle EAD External address latch delay only Clock Distribution The clock function generates and distributes all of the clocks required for system operation ICS9FG108 is used to generate all the required PCI E clocks The 25 MHz clocks for the Ethernet PHY and SATA bridge are supplied by ICS83905 Most of the QorlQ P2020 clocks are generated by 5840507 chip Additional clocks required by individual devices are generated nearthe devices using individual oscillators The following table lists the clocks required on the MVME2500 along with the frequency and source Table 7 6 Clock Distribution Device QorlQ P20x0 Clock Signal CPU SYSCLK
104. scheinlichkeit zu starken St rungen f hren welche dann auf Kosten des Produktanwenders beseitigt werden m ssen nderungen oder Modifikationen am Produkt welche ohne ausdr ckliche Genehmigung von Emerson Network Power durchgef hrt werden k nnen dazu f hren dass der Anwender die Genehmigung zum Betrieb des Produktes verliert Boardprodukte werden in einem repr sentativen System getestet um zu zeigen dass das Board den oben aufgef hrten EMV Richtlinien entspricht Eine ordnungsgemasse Installation in einem System welches die EMV Richtlinien erf llt stellt sicher dass das Produkt gem ss den EMV Richtlinien betrieben wird Verwenden Sie nur abgeschirmte Kabel zum Anschluss von Zusatzmodulen So ist sichergestellt dass sich die Aussendung von Hochfrequenzstrahlung im Rahmen der erlaubten Grenzwerte bewegt Warnung Dies ist eine Einrichtung der Klasse A Diese Einrichtung kann im Wohnbereich Funkst rungen verursachen In diesem Fall kann vom Betreiber verlangt werden angemessene Ma nahmen durchzuf hren 1 Besch digung des Produktes Hohe Luftfeuchtigkeit und Kondensat auf der Oberfl che des Produktes k nnen zu Kurzschl ssen f hren Betreiben Sie das Produkt nur innerhalb der angegebenen Grenzwerte f r die relative Luftfeuchtigkeit und Temperatur Stellen Sie vor dem Einschalten des Stroms sicher dass sich auf dem Produkt kein Kondensat befindet MVME2500 Installation and Use 6806800L01H Sicherheitshinweise Besch
105. ted specifications As an additional help a source for the listed document is provided Please note that while these sources have been verified the information is subject to change without notice Table B 3 Related Specifications Organization American National Standards Institute ANSI VITA Standards Organization Document ANSI VITA 1 0 1994 R2002 VME64 Standard ANSI VITA 1 1 1997 R2003 VME64x Extensions ANSI VITA 1 5 2003 VME 2eSST ANSI VITA 35 2000 Pin Assignments for PMC P4 Connector ANSI VITA 39 2003 PCI X for PMC and Processor PMC VITA Standards Organization 130 High Speed Switched Interconnect Protocols on PMC VITA 42 0 2005 General Purpose I O Standard VITA 42 10 XMC PCI Express Protocol Layer Standard VITA 42 3 2006 MVME2500 Installation and Use 6806800L01H Related Documentation Table B 3 Related Specifications Organization IEEE Peripheral Component Interconnect Special Interest Group PCI SIG Serial ATA International Organization SATA IO Document IEEE 802 3 LAN MAN CSMA CD Access Method IEEE 802 3 2005 IEEE Standard for a Common Mezzanine Card CMC Family IEEE Std 1386 2001 IEEE Standard Physical and Environmental Layers for PCI Mezzanine Cards PMC IEEE Std 1386 1 2001 IEEE Standard Test Access Port and Boundary Scan Architecture IEEE Std 1149 1 2001 Low Pin Count Interface Specification LPC Revision 1 1
106. terrupt to the local bus interrupter The overflow counter can be cleared by writing a 1 to the COVF bit ENINT Enable Interrupt When the bit is set the interrupt is enabled When the bit is Cleared the interrupt is not enabled CINT Clear Interrupt INTS Interrupt Status RSVD Reserved for future implementation MVME2500 Installation and Use 6806800L01H 99 Memory Maps and Registers 5 6 3 Compare High and Low Word Registers The tick timer counter is compared to the Compare Register When the values are equal the tick timer interrupt is asserted and the overflow counter increments If the clear on compare mode is enable the counter is also cleared For periodic interrupts this equation should be used to calculate the compare value for a specific period T Compare register value T us When programming the tick timer for periodic interrupt the counter should be cleared to zero by software and then enabled If the counter does not initially start at zero the time to the first interrupt may be longer or shorter than expected Note that the rollover time for the counter is 71 6 minutes Since the processor 5 16 bits and the tick timer is 32 bits the compare register was split in half Accessing the whole register will require two transactions Table 5 24 Compare High Word Registers Tick Timer 0 Compare Value High Word OxFFC80204 Tick Timer 1 Compare Value High Word OxFFC80304 REG Tick Timer 2 Compare Value High
107. thernet Connector 1 2A NC 3A Port A TRD3 4A Port A TRD3 Port A TRD2 5A 8A Port A TRD1 9A Port A TRDO 10A Port ATRDO DIA Port A Green LED1 Anode Yellow LED1 Cathode Port A Yellow LED1 Anode Green LED1 Cathode Port A Green LED2 Anode Yellow LED2 Cathode D4A Port A Yellow LED2 Anode Green LED2 Cathode 1B GND 2B NC 3B Port B TRD3 40 MVME2500 Installation and Use 6806800L01H Controls LEDs and Connectors Table 3 3 Front Panel Tri Speed Ethernet Connector 1 continued Pin Name Signal Description Port B TRD2 Port B TRDO Port B TRDO Port B Green LED1Anode Yellow LED1 Cathode Port B Yellow LED1 Anode Green LED1 Cathode Port B Green LED2Anode Yellow LED2 Cathode Port B Yellow LED2 Anode Green LED2 Cathode 3 4 1 2 Front Panel Serial Port There is one front access asynchronous serial port interface that is routed to the micro mini DB 9 front panel connector A male to male micro mini DB9 adapter cable is available under Emerson part number SERIAL MINI D 30 W2400E0 1A The pin assignments for these connectors are as follows Table 3 4 Front Panel Serial Port 4 Description RX TX 2 3 6 7 8 9 MVME2500 Installation and Use 6806800L01H 41 Controls LEDs and Connectors 3 4 1 3 3 4 1 4 42 USB Connector 5 The MVME2500 uses upright USB receptable mounted in the front
108. tion Rev 1 0a The PCI Express controller connects the internal platform to a 2 5 GHz serial interface The P20x0 hasthe options for up to three PCI E interfaces with up to x4 link width The PCI E controller can be configured to operate as either PCI E root complex RC or as an endpoint EP device Local Bus Controller LBC The main component of the enhanced LBC is the memory controller that provides a 16 bit interface to various types of memory devices and peripherals The memory controller is responsible for controlling eight memory banks shared by the following a general purpose chip select machine GPCM a flash controller machine FCM and user programmable machines UPMs Secure Digital Hub Controller SDHC The SDHC eSDHC provides an interface between the host system and the memory cards such asthe MMC and SD Itis compatible with the SD Host Controller Standard Specification Ver 2 0 and supports the following SD miniSD SD Combo MMC and RS MMC card I2C Interface The MVME2500 uses only one of the two independent I C buses on the processor For more information see 2 Devices on page 73 USB Interface The P20x0 implements a USB 2 0 compliant serial interface engine For more information see USB on page 73 MVME2500 Installation and Use 6806800L01H 63 Functional Description 4 2 8 4 2 9 4 2 10 4 2 11 ML 4 2 12 DUART The chipset provides two universal asynchronous receiver transmitter
109. tion is complete If you need additional information ask your Emerson representative This product is a Safety Extra Low Voltage SELV device designed to meet the EN60950 1 requirements for Information Technology Equipment The use of the product in any other application may require safety evaluation specific to that application Only personnel trained by Emerson or persons qualified in electronics or electrical engineering are authorized to install remove or maintain the product The information given in this manual is meant to complete the knowledge of a specialist and must not be used as replacement for qualified personnel Keep away from live circuits inside the equipment Operating personnel must not remove equipment covers Only Factory Authorized Service Personnel or other qualified service personnel may remove equipment covers for internal subassembly or component replacement or any internal adjustment Do not install substitute parts or perform any unauthorized modification of the equipment or the warranty may be voided Contact your local Emerson representative for service and repair to make sure that all safety features are maintained EMC Results pending testing This equipment has been tested and found to comply with the limits for a Class A digital device pursuant to Part 15 of the FCC Rules These limits are designed to provide reasonable protection against harmful interference when the equipment is operated in a commercial
110. tton for example to analyze the cause then subsequently analyze kernel log files The persistent memory feature keeps the log files available in the memory To analyze the kernel log files 1 Issue areset 2 Connect to U Boot For more information see Accessing U Boot on page 103 3 Enter the following command to obtain memory addresses of the kernel log files Tocate kernel log 1 The memory addresses of any found kernel log files will be displayed 4 Enter the following command to display the kernel logfile at any of these memory addresses printf memory address gt The persistent memory is useful in application specific data storage The standard U Boot variable pram can be used to reserve a memory region at the end of the physical memory to prevent it from being overwritten U Boot reports less memory to the Linux kernel through the mem parameter indicating that the operating system should not use it either For more information see the U Boot documentation MVME2500 Installation and Use 6806800L01H 107 Boot System 6 6 5 MVME2500 Specific U Boot Commands Table 6 1 MVME2500 Specific U Boot Commands base Print or set address offset bdinfo Print board info structure boot Boot default i e run bootcmd Boot default run bootcmd Boot from an ELF image in memory bootm Boot application image from memory bootp Boot image through network using BOOTP TFTP protocol bo

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