穨 C101-manual
Contents
1. DOS C Assembly Windows DLL Applications High speed Sync Async modem communication SDN modem T1 DSU CSU communication Long distance high speed communication Satellite communication Moxa C101 Manual Chapter 2 Configuration 2 1 Hardware Configuration Chapter 2 Configuration 3 a Base Address It is by way of switch SW1 to set the memory mapping base address Each C101 Super Sync Board will occupy 16KB memory window ADDRESS 0C0000 0C4000 0 8000 0 000 000000 004000 008000 O0DCO00 4C0000 4C4000 4C8000 4 000 400000 404000 408000 4DC000 8C0000 8C4000 8C8000 8 000 Moxa C101 Manual ON ON ON ON OFF OFF OFF OFF 1 9 999 2 2 12 Z Z 2 12 Z 9999 7 7 2 2 44 d ON ON ON ON 2 000 2 2 ZZ q 9222 3 4 2989 449 5 2989 999 z gz 2989 449 8 2 ADDRESS 800000 804000 808000 8DC000 4000 CC8000 CD0000 CD4000 CD8000 b IRQ By means of the jumper to select the IRQ number for C101 Super Sync OFF OFF OFF OFF OFF OFF OFF OFF ON ON OFF ON OFF OFF OFF OFF OFF OFF OFF OFF O2. C101 SuperSync Board User s Manual TABLE OF CONTENTS SECTION PAGE CHAPTER 1 INTRODUCTION 1 11 ene Od UA EA ORARE IAE 12 SpPeciicatlOns erect e ei ER e res 13 Applications odio e OR REID D CHAPTER 2 CONFIGURATION 3 2 1 Hardware Configuration see 22 Software Configuration CHAPTER 3 LIBRARY FUNCTIONS 9 CHAPTER 4 PIN ASSIGNMENTS 15 APPENDIX eren enne ool 7 Copyright Noti This documentation is copyrighted by Moxa Technologies Co Ltd All rights are reserved Moxa Technologies reserves the right to make improvements to the products described in this manual at any time without notice Information provided in this manual is intended to be accurate and reliable However Moxa Technologies assumes no responsibility for its use nor for any infringements of rights of the fourth parties which may result from its use MOXA is a registered trademark of Moxa Technologies Co Ltd Other product and corporate names may be trademarks of other companies and are used only for explanation and to the owners benefit without intent to infringe Where to Contact for Help Customer support is available by mail fax email or phone Before contacting Customer Support we recommend you re checking this manual for help Moxa Technologies Co Ltd Tel 886 2 86658535 Fax 886 2 86656536 www moxa com tw ra Email ser
3. Super Sync Board C101 Programming information 1 Refer to the Hitachi HD64570 documentation for further information The board utilizes memory map There is 256K on board memory and 16K memory with PC interface an 8 bit data path accessible to the memory and a 32 page 8K memory window in addition Otherwise the host PC can only see 2 pages 16K The first 8K is usually to map the first page Yet the second page must utilize Memory page register address to switch between each page The dual port memory address relative to HD64570 from 0 to Ox3FFFF The base address for PC selected with DIP switch SW 1 on board For further information see Chapter 2 Configuration The windows 16K is described by the following base addresses 0000h 1CFFh first bank always the first page for memory 2000h 3FFFh second bank switch page with the page register 1D00h 1DFFh memory page register write only Same as write to each byte of the range memory otherwise you may write down the value 00h 1Fh 32 pages in total Appendix 17 18 Example Write value 2 on address 0 1000 The second bank memory address is 0x4000 Ox5FFF for HD64570 1E00h 1EFFh HD64570 interrupt acknowledge read only Same as read each byte of the range memory Example Read value 0x30 from address 0 1 The value 0x30 interrupt vector is released by HD64570 1E00h 1EFFh RS232 V35 DTR signal write control register Same
4. as write to each byte of the range memory the bit O used only O for OFF 1 for ON 1F00h 1FFFh HD64570 register set Example 1 Read or write address Ox1F1A It means to read or write HD64570 register IVR Example2 Read or write address OxIFIC It means to read or write HD64570 register IMVR How to reset the HD64570 with software Reset the HD64570 after read the memory page register and latch this read until next write to the memory page register Power on the DRAM is disabled until first write to DTR control register The Tx clock directory is selected on the JP2 The interface RS232 or V 35 is selected on the JP3 The IRQ is selected on the JPI C101 utilizes only the HD64570 channel 0 RTS control must on the other hand utilize channel 1 to control the RTS pin signal The interrupt is functioned on the mode of Single acknowledge however HD64570 uses CPU mode 0 on C101 board Moxa C101 Manual
5. FF OFF ON OFF ON ON ON OFF OFF OFF OFF OFF ON ON ON OFF OFF OFF ON 2989 449 OFF ON Board There are 9 possible IRQ numbers available on 2 3 4 5 7 10 11 12 15 c Communication Interface C101 provides RS 232 V 35 communication interfaces as well In this case jumper JP3 is used to select the desired interface Chapter 2 Configuration 5 d Clock Direction Jumper JP2 is used to select the transmit in or out clock direction 2 2 Software Configuration MOXA C101 Driver diskette consists of the following files dir DOS DOS DRIVER DOS DRIVER c101s lib DOS DRIVER c101m lib DOS DRIVER c101 h DOS EXAMPLE DOS EXAMPLE ex1 c DOS EXAMPLE c101 cnf WIN WIN DRIVER WIN DRIVER msa dll WIN DRIVER msa lib WIN DRIVER c101 h WIN EXAMPLE WIN EXAMPLE ex1 c WIN EXAMPLE c101 cnf UTIL UTIL c101diag a For DOS users DOS driver and example directory DOS driver directory DOS driver library for small model DOS driver library for medium model Driver declare file DOS driver example directory DOS driver example program Driver configuration file Windows driver and example directory Windows driver directory Windows DLL driver Windows library Driver declare file Windows example directory Windows driver example program Driver configuration file Utility directory C101 diagnostic utility DOS users need to link C101 li
6. brary to their application program Moxa C101 Manual c101s lib for small model c101m lib for other models In addition users have to specify the configuration of C101 board in c101 cnf and put it in the working directory File c101 cnf will be read when the driver 18 initialized b For Windows 3 x users Windows users need to move msa dll and 101 to the same working directory Try to use example configuration file c101 cnf to test first Chapter 2 Configuration 7 Moxa C101 Manual 1 Chapter 3 Library Functions sio init Syntax int sio init void Description Initialize SCA Serial Communication Adapter prepare IRQ set up system variables allocate system memory Read c101 cnf file for I O address and IRQ selected Please read the c101 cnf for more information This function must be invoked before any other function Return 0 OK error configuration file please see c101 h sio reset Syntax int sio reset void Description Reset SCA to default setting specified in c101 cnf file Return 0 OK Chapter 3 Library Function 9 10 sio release Syntax void 810 release void Description Release IRQ channel free system memory Return None sio read Syntax int sio read char far buf int len Description Read data from receive buffer C101 has two receive buffers one is on board RAM totally 180K and the other is determined by PktCnt in 01 totally PktCnt P
7. ktSize buf data buffer for reading received data len data buffer maximum length Return n received data frame length 1 reserved buffer space insufficient for received data sio write Syntax int 510 write char far buf int len Description Write data to transmit buffer C101 has 64K transmit buffer on board buf data pointer for writing to transmit buffer len data length for writing to transmit buffer Return n data be write to transmit buffer must be len Moxa C101 Manual 6 0 no room for transmit buffer l len O or len too large sio flush Syntax int sio flush int mode Description Flush transmit and receive buffer mode 0 flush receive buffer 1 flush transmit buffer 2 flush both the receive and transmit buffer Return O OK sio isoverrun Syntax unsigned long 510 isoverrun void Description Get overrun frame count and reset the count to 0 the overrun frame happens only when receive buffer is full Return n total overrun frame count sio isunderrun Syntax unsigned long 510 isunderrun void Description Get underrun frame count and reset the count to O the underrun frame only happens when SCA is too busy Chapter 3 Library Functions 11 10 11 12 Return n total underrun frame count sio isbadframe Syntax unsigned long sio_isbadframe void Description Get bad frame count and reset the count to 0 Bad frame includes bad CRC or oversized large size frames Re
8. turn n total bad frame count sio_iframe Syntax int sio_iframe void Description Get received frame count in receive buffer Return n total received frame count sio_oframe Syntax int sio_oframe void Description Get transmit frame count in transmit buffer Return n total transmit frame count Moxa 101 Manual 12 13 sio iframefree Syntax int sio iframefree void Description Get free frame count in receive buffer Return n total receive buffer free frame count sio oframefree Syntax int sio oframefree void Description Get free frame count in transmit buffer Return n total transmit buffer free frame count Chapter 3 Library Functions 13 14 Moxa C101 Manual Chapter 4 RS 232 DB25 Pin Assignments Signal tA 4 24 15 17 TxD RxD RTS CTS DSR GND DTR DCD TxC Tx clock direction out TxC Tx clock direction in RxC Rx clock direction in Chapter 4 Pin Assignment 15 16 V 35 DB25 34 pin 2 14 3 16 15 13 24 23 17 19 4 000 Moxa C101 Manual P 5 CT Y Signal TxD TxD RxD RxD Tx clock direction in AA TxC Tx clock direction in U W V X C D H E F B Tx clock direction out TxC Tx clock direction out Rx clock direction in RxC Rx clock direction in RTS CTS DTR DSR DCD GND Appendix Moxa
9. vice com tw 1 1 Chapter 1 Introduction MOXA C101 a high speed single port sync async board is equipped with an HD64570 SCA and 256K dual ported RAM HD64570 SCA supports a wide variety of protocols including Async Byte Sync Bit Sync HDLC SDLC X 25 etc The built in 32 byte FIFO and Direct Memory Access DMA controller help otherwise to boost the communication speed Data is received from transmitted to the large RAM by DMA to enhance higher performance with lower CPU load Features Powerful serial communication controller HD64570 10 Multi protocols supported including Async Byte Sync Bit Sync Built in DMA for fast data transmission Built in 32 byte FIFO to receive transmit data Large data buffer with 256K bytes Dual ported RAM 16K memory window for the Dual ported RAM Jumper selectable for transmitting in or out clock direction Communication interface RS 232 or V 35 jumper selectable RS 232 sync communication rate up to 128Kbps 35 sync communication rate up to 7Mbps Chapter 1 Introduction 1 1 2 1 3 Support DOS Windows environment Specifications SCA HD64570 10 9 8304M clock RAM 256K Dual ported RAM with 16K memory window RAM Address Switch selectable 32 possible base addresses RQ 2 3 4 5 7 10 11 12 or 15 jumper selectable nterface RS 232 or V 35 jumper selectable TxC direction in or out jumper selectable Drivers DOS Windows 3 1
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