Home

ADM User`s manual

1. lt 5 a N B e 8 Ux 22 22 a 3 IN x3 a Os g 5 a wt 8 m a cL gt N a 8 s E wo Ls m N Ia a gt 8 drm er 8 a a gt EE al o N 5 mn n 5 88 g co c B LU z N N di lt c gt 201 NS E ym NU A aw Ica o 1 1 gt Note 5 V is on side 0 closest to switch 5 I 2 a d 5 amp i i Sin 2 58 o o xou me Figure 1 1 DSP56301ADM Key Component Layout DSP56301ADMUMWM AD Preliminary MOTOROLA Quick Start Guide Installation Procedure Table 1 1 DSP56301ADM Default Jumper Options Jumper waen Default Configuration as Shipped Comment Block JP1 Jumpered Enable SRAM memory JP2 Jumpered Enable DRAM memory JP3 Jumpered Enable Flash memory JP4 JP5 JP6 JP7 Jumpered Enable ISA host interface JP8 JP10 JP8 No jumpers Set ISA DMA channel 5 JP10 Pins 3 6 and 4 5 jumpered JP9 Pins 1 2 jumpered Set ISA clamp protection JP11 Pins 4 5 jumpered Set ISA Interrupt channel 10 JP12 Removed Enable DSP PLL operation JP13 JP14 JP13 Removed Set clock source to clock genera
2. 1 HOLVH3N39 42019 8X Ace INVHS MOTOROLA DSP56301ADMUM AD A 14 APPENDIX B DSP56301ADM BILL OF MATERIALS MOTOROLA DSP56301ADMUM AD Preliminary B 1 DSP56301ADM Bill of Materials B 2 DSP56301ADMUM AD Preliminary MOTOROLA DSP56301 ADM Bill of Materials 1 DSP56301ADM ELECTRICAL PARTS LIST REV 2 1 3 15 95 Qty Description Ref Designators Vendor Part Integrated Circuits 3 MCM6706AJ 12 U2 U3 U4 Motorola IDT 3 05324550 U5 U6 U7 Quality Semiconductor 1 AT29LV512 20J U8 Atmel 3 MCM54800AJ 70 U9 U10 U11 Motorola Toshiba 1 DSP56301 U12 Motorola 1 MC74LS05N U13 1 532445 014 Quality Semiconductor 1 A53AA 33MHz U15 Connor Winfield 3 MC74HCT244AN U16 U19 U20 Motorola 2 MC74HCT245AN U17 U18 Motorola Crystal 1 27 MHz 1 International Crystal 436161 27 00 FOX HC94U 27 00MHz 30 50 20 10 Fundamental Frequency at Cut Crystal Resistors 2 010 R1 R2 1 4 W through hole 1 13 R3 Bourns CR12061302JVCA 1 20 KQ R4 Bourns CR12062002JVCA 1 330 Q R5 Bourns 120633007 1 150 Q R6 Bourns CR12061500JVCA 5 10 KQ R8 9 R10 R18 Bourns CR12061002JVCA 7 1 R11 R12 R13 14 15 Bourns CR12061001JVCA R20 R21 1 1 MQ R16 Bourns CR12061004JVCA 1 100 Q R17 Bourns CR12061000JVCA 1 510 R19 Bourns CR120651ROJVCA MOTOROLA
3. Sly ino 5 MS 1989 2 9NH8908 S C eo N IAN OUINI VGOIN adon odoOW 9419599 19599 99 St LO MOTOROLA DSP56301ADMUM AD 2 dO 5 dOVd LAGU ANd lt gt AS SNOLLO3NNOO NVHS 31vd Savioe9esdsa 1111 9661 69 20 41 9 UNF 4 041410 LSV1 ONIMVHG sn 9n Zn 05975550 OH Syz8SD OfSyz8SD OO 6L 6h lt 91 gt 88 8V 6 lt gt 44 zy 8 lt el gt dd 98 9v lt el gt ad SH 9 lt gt va lt 01 gt 04 gr 68 lt 6 gt 9 28 epee g ag 119 z 4 8d 19 9g sg eg ea lt ez gt ag 98 8Y lt 22 gt zi 8 Y lt z gt ag er 98 9v lt 02 gt SV lt 61 gt d9 vd Wig lt 8l gt qg gr EV r 1 d8 ov 9708 gr 18 0 0c 02 co r oo o o anro LOOVNI 100YNL LOOVNI 2 29 7 2 MCM6706AJ MCM6706AJ MCM6706AJ 8 lt Gl gt dd lt gt 781 by 81 lt gt G _ sel dd 21 lt 02 gt 08 91 9 _ lt 21 gt 9 91 lt 61 gt st 5225 lt gt 81 lt 81 gt 9 ET 8
4. lt gt 61 lt lt 6 gt 91208 lt gt DSP56301ADMUM AD MOTOROLA cLdOv 39 AYOWAW INVHG Savioeesdsa 9661 20 20 41 91 unf U4 G3ISIGOW 16 1 lt e gt dd lt gt lt le gt dd lt 0 gt dd lt 61 gt lt 81 gt 9 08 lt 91 gt MCM54800AJ lt Gl gt dd lt el gt dd lt cl gt dd lt gt lt 01 gt 9 lt 6 gt 9 lt gt MCM54800AJ SONvaa MCM54800AJ MOTOROLA DSP56301ADMUM AD HOW3W HSV 14 Savioeesdsa JILIL 9661 95 90 61 91 unf uJ aaldIQONW 1Sv1 SNIMVHG AT29LV512J DSP56301ADMUM AD MOTOROLA 21409 ilva Sud44na8 SNE VSI3 VSI 560 10695460 4111 9661 11 21 41 91 unt U4 G3ISIGOW 18 1 SNIMVHG INO96S3H LE QVH lt 6c gt QVH Lc VH lt 9c gt QVH lt 08 gt QVH lt 8c gt QVH lt 9c gt QVH AI 09 St LO CO lt ve gt QVH WOO6S3Y 00001 AV I3G lt 09 St LO CO NY 00001 1 XV lt 8z gt QVH lt CZ gt QVH lt 1Z gt QVH lt 0z gt QVH lt 61 gt QVH lt 8L gt QYH lt 11 gt lt 91 gt QVH lt 91 gt
5. lt vl gt dVH lt 81 gt lt 21 gt lt gt lt 01 gt lt 6 gt CVH lt 8 gt 2101 VSI lt 4 gt 06 lt vleds lt 81 gt 5 lt 21 gt 05 lt 14 gt 05 lt 01 gt 06 6208 8208 VSI 1 VSI lt gt 08 lt 9 gt 06 lt lt gt 06 lt b gt dS lt gt 06 lt 2 gt 06 lt 1 gt 5 lt 0 gt xil NVH3H 3SA3QH 9400 IH MIOH INOO6S3H LNH 942 vVo eve eNa VSI 13SA3QH ove rte 4051 ELN DHIN lt sos ELN evi ZYL WIE 020 TvoLOHYZ IN VSI DHIH NAV INF VSI 00001 1 XVIN pve lt gt lt 6 gt lt Z gt QVH L QVH lt 0 gt QVH lt Z gt 9H lt 1 gt 9H lt 0 gt eve 2 2 evi WIE 15 IN VSI lt 0 gt VS lt 6 gt VS 5 lt 5 Auaisu 9051 evi evi INJ VSI lt 8 gt VS lt gt 5 lt 9 gt 5 5 INJ VSI lt gt 5 lt e gt vS lt 2 gt 5 lt
6. DSP56301ADMUM AD Preliminary Quick Start Guide ak 1 2 2 1 3 1 1 3 2 1 4 1 2 OVERVIEW ata EQUIRPMENT 0 What You Get with the DSP56301ADM What You Need to INSTALLATION PROCEDURE Preparing the DSP56301ADM Connecting the DSP56301ADM to the PC and Power USING THE 05 56301 DSP56301ADMUMWM AD Preliminary MOTOROLA Quick Start Guide Overview 11 OVERVIEW The Motorola Application Development System ADS is a tool used to design and test complex software applications and hardware products using a specific Motorola DSP chip The related Application Development Modules ADMs contain the DSP chip and related hardware used for bench development and test Detailed information about the content and use of the ADS is provided in the ADS User s Manual order DSPADSUM AD This manual provides specific information about the DSP56301 Application Development Module DSP56301ADM This section provides a summary description of the DSP56301ADM additional requirements and quick installation information Detailed information about the DSP56301ADM design and operation is provided in the remaining sections of this manual 12 EQUIPMENT The following section gives a brief summary of the equipment required to use the DSP56301 Application Development Module DSP56301
7. Old 284 OL 5 MOTOROLA DSP56301ADMUM AD A 12 ZLO LL 3ovd L L A38 YOLVINDAY AlddNS H3MOd ava 50 10695450 41111 9 unf uoN 9661 86 96 11 61 UNC uoW aal3IQGOINN LSV1 GND 10980111 QNO z 55 Eod 100 9 GND 1VO SONSI YANAZ 90 a 2 MSA 2 L NIA 23 kd ims 8 A 13 DSP56301ADMUM AD MOTOROLA 21 021 39Vd L L A3H SHOLIOvdvO 50 10698450 JILL 9661 20 70 41 91 unf 4 0 4141 LSV1 ONIMVHG Su3d4n8 ANY HOLO3NNOO VSI YOLOANNOO 194 L M dno 4nroe DE anro 411092 40102 989 620 959 evo 072 ISO Suaddna YSI HOLO3NNOO VSI 401 02 dnroz 3 3nrog 40102 02 Ly M Ly M 099 Lvo 062 800 veo SNId AlddNs 109195 SGOW SNId AS 04 04 4nro 401 02 4nro santo 401092 12 N Nid dWV19 670 Svo 129 660 860 SNId H3MOd 10698450 401709 4nroc santo santo anro santo santo anro 019 65 62 022 29 22
8. 2 1 2 2 2 3 2 3 1 2 3 2 2 3 3 2 4 2 5 2 5 1 2 5 2 2 5 3 2 5 4 2 6 2 7 2 8 2 8 1 2 8 2 2 8 3 2 8 4 2 8 5 2 8 6 2 2 DSP56301ADM DESCRIPTION FEATURES 2 3 DSP56301 DESCRIPTION 1 4 qu eme uk x rx x 2 5 MEMORY Pans mi ia de 2 5 DRAM Selection enn cance 2 6 SRAM SeleetlOl ace aen See ee 2 6 Flash PROM 2 7 DSP56301 OPERATING MODE SELECTION 2 8 CLOCK SOURCE SELECTION 2 9 On Board Clock Generator Selection 2 10 External Clock 2 10 Crystal Oscillator 2 10 DSP56301 PLL Enable Disable On Reset 2 11 HOST PORT SELECTION cc ole 2 11 ISA DMA AND INTERRUPT CHANNELS 2 12 GONNEG TORS wis at e Rete ERE up ie 2 13 Expansion And Logic Analyzer Connectors 2 13 5 V Power 2 18 HI32 2 18 Sol 2 19 SGlPortConnector 2 20 JTAG OnCE 2 21 DSP56301ADMUM AD Preliminary MOTOROLA 2 1 DSP56301ADM Technical Summary DSP56301ADM Des
9. Support is provided to enable the DSP56301 to enter one of six possible operating modes two additional modes are reserved via MODA IRQA MODC IRQC and NMI PINIT lines These lines are sampled by the DSP56301 on the rising edge of RESET line and the sampled combination is moved to the OMR Operating Mode Reg Figure 2 5 illustrates the mode selection on the deassertion of the RESET signal After reset the mode selection lines are driven by pull up resistors JP12 is connected to the NMI PINIT line QS3244S0 2 to 1 MUX TO DSP56301 Figure 2 5 DSP Mode Selection 2 8 DSP56301ADMUM AD Preliminary MOTOROLA DSP56301ADM Technical Summary Clock Source Selection Table 2 2 DSP56301 Operating Mode Selection MODE SW2 1 SW2 2 SW2 3 0 mode On On On 1 Bootstrap from byte wide FLASH Off On On 2 Bootstrap through SCI On Off On 3 Reserved Off Off On 4 Bootstrap PCI mode 32 bit wide On On Off 5 Host Bootstrap ISA Mode 16 bit wide Off On Off 6 Host Bootstrap UB Mode 8 bit wide On Off Off 7 Reserved Off Off Off After the RESET line is released high the MOD IRQ signals are connected to IRQA IRQB and IRQC signals 2 5 CLOCK SOURCE SELECTION There are 3 clock sources to the DSP56301 On board 33MHz clock generator supplied from factory e External BNC connector Crystal Oscillator Note When either of the first two
10. lt 8z gt dVH YZZ lt 15 gt VAG et 08QV MIO oaNnogs9 19H Vie lt 0 gt CVH VOZ V8lL Vol ZLNSHd vor AS xQ LNI 1 yg VS VAS aL oal 52 ve PAL 40 Adit MOL 48uL Vi NOO l0d 6d MOTOROLA DSP56301ADMUM AD A 10 2 306 SNOILOSNNOO IOS ANY 9IV ISS 31va SqV10899dSQd 4111 8661 08 50 31 9 UNP ud Q3lJIQOW 1Sv1 oNIMvua 13S3U 2026 0325 2005 LOGS O N alV ISS LLCS O N wisi vir T HSAJL 11 DSP56301ADMUM AD A MOTOROLA 2L dO 01 kL Add ilva SNOLLO3NNOO NOISNVdX3 Savioeesdsa 31111 9661 92 50 41 91 UNF U4 G3ISIGOW 16 1 lt LL gt QYH lt 6 gt CVH lt 0 gt lt 9 gt CVH y QVH lt C gt QqVH lt 0 gt QVH LOL 194 0155 191 HAOS HqHS 1591 43 oal MOL 1095 Sa lt 01H gt QVH lt 8 gt
11. 1 8 DSP56301ADM Functional Block 2 4 DSP56301ADM DRAM 2 6 SRAM 2 7 Flash PROM 2 8 DSP Mode 2 8 3 3 V Clock Generator Assembly 2 10 PELIMOdG Selection e a 2 11 Expansion Connector P10 2 14 Expansion Connector P12 2 15 Expansion Connector P5 2 16 Expansion Connector P 2 17 Dedicated SSI Connector 2 19 Sol Alb COnMeCIOn P2 so mal eS ee s 2 20 SCI Dedicated Connector 6 2 21 JTAG OnCE Connector 2 21 DSP56301ADMUM AD Preliminary V Table 1 1 Table 2 1 Table 2 2 Table 2 3 Table 2 4 vi LIST OF TABLES DSP56301ADM Default Jumper 1 7 DSP56301ADM 2 5 DSP56301 Operating Mode 2 9 ISA Bus DMA Channel 2 12 ISA Bus Interrupt Selection 2 12 DSP56301ADMUM AD Preliminary MOTOROLA MOTOROLA SECTION 1 QUICK START GUIDE
12. 18 19 V3 3 V3 3 A16 17 GND GND Figure 2 9 Expansion Connector P12 MOTOROLA DSP56301ADMUM AD Preliminary 2 15 DSP56301ADM Technical Summary Connectors GND GND BL BS STDO 5 10 TDI TCK TMS TDO SC20 DEZ SC00 TRST GND V3 3 SCKO SRD1 SRDO SCK1 21 STD1 5011 5001 TXD GND V3 3 SPARE1 GND V3 3 SCLK RXD 0 TIO1 2 HADO HAD1 HAD2 HAD3 V3 3 GND HAD4 HAD5 HAD6 HAD7 HCO HAD8 HAD9 HAD10 HAD11 Figure 2 10 Expansion Connector P5 2 16 DSP56301ADMUM AD Preliminary MOTOROLA DSP56301ADM Technical Summary Connectors GND HAD13 HAD15 GND HWR HDRQ HDEVSEL V3 3 HFRAME V3 3 HRD HAD16 HAD17 GND HAD20 HAD22 HC3 HAD25 HAD27 HAD29 HAD31 Figure 2 11 Expansion Connector 7 MOTOROLA DSP56301ADMUM AD Preliminary 2 17 DSP56301ADM Technical Summary Connectors 2 8 2 5 V Power Connector The 5 V power connector to the DSP56301ADM is a 2 lead terminal block next to the power switch SW1 The power connector and power switch are only used for stand alone operation the power switch SW1 is used to turn the ADM on or off 2 8 3 HI32 Connector There are two HI32 connectors the DSP56301ADM 1 PCI edge connector configured as 32 bit universal 5 V amp 3 3 V connector 2 ISA edge connector These connectors are located on opposite sides of the DSP56301ADM enabling it to operate using an ISA EISA or PCI bus interface The PCI edg
13. The DSP56301ADM supports application development for either bus by providing both a PCI edge connector and an ISA edge connector with the appropriate buffers When the DSP56301ADM is used with ISA host place a jumper across JP4 JP5 JP6 and JP7 with the components U16 U17 U18 U19 U20 RN1 and RN2 mounted in their sockets When the ADM is used in PCI host or as a stand alone device there should be no jumpers on JP4 JP5 JP6 and JP7 and the components in U16 U17 U18 U19 U20 RN1 and RN2 should be removed Note The ADM is factory configured for ISA Host Mode MOTOROLA DSP56301ADMUM AD Preliminary 2 11 DSP56301ADM Technical Summary ISA DMA and Interrupt Channels 2 7 ISA DMA AND INTERRUPT CHANNELS The ADM enables the user to configure one of four channels for DMA and one of four interrupt channels for an ISA bus interface Table 2 3 and Table 2 4 describe these configurations options Table 2 3 ISA Bus DMA Channel Configuration DMA Channel JP8 JP10 0 None 1 8 2 7 5 None 3 6 4 5 6 3 6 4 5 None 1 8 2 7 None Table2 4 ISA Bus Interrupt Selection Interrupt JP11 5 3 6 6 2 7 7 1 8 10 4 5 2 12 DSP56301ADMUM AD Preliminary MOTOROLA DSP56301ADM Technical Summary Connectors 2 8 CONNECTORS The DSP56301ADM includes the following connectors e Expansion and Logic Analyzer connector four 2 x 25 pin SMD pin rows e Power 2 pin terminal block
14. Application Development System ADS kit The ADS kit includes two additional boards a host interface card and an external universal command converter The host interface card plugs in the host bus on a PC compatible HP7xx workstation or Sun Sun compatible system inside the computer chassis The external universal command converter card connects to the host card via a 37 pin ribbon cable The command converter card connects to the JTAG connector on the DSP56301ADM via another short 14 pin ribbon cable The ADS is only compatible with Motorola software tools MOTOROLA DSP56301ADMUM AD Preliminary 2 3 DSP56301ADM Technical Summary DSP56301ADM Description and Features Expansion amp Logic Analyzer Connectors 64K X8 Flash PROM 3 V AT29LV512 ATMEL Reset Clock Gen amp Mode sel 32 K x 24 Static RAM MCM6706AJ12 DSP56301 PORT A Signals buffers 512 K x 24 DRAM MCM54800AJ70 ISA Edge Connector PCI Edge Connector HI32 PORT SCI PORT SSI PORTS JTAG OnCE JTAG OnCE Connector SCI Port 5510 and 5511 Port amp I F 5 V to 3 V voltage regulator Figure 2 1 DSP56301ADM Functional Block Diagram 2 4 DSP56301ADMUM AD Preliminary MOTOROLA DSP56301ADM Technical Summary DSP56301 Description 22 DSP56301 DESCRIPTION A full description of the DSP56301 including functionality and user information is provided in the following documents included as a part of this kit either as printed copies o
15. DSP56301ADMUM AD Preliminary B 3 DSP56301ADM Bill of Materials Qty Description Ref Designators Vendor Part Resistor Networks 3 10 KQ RN1 RN2 RN5 Bourns 4609X 101 103 1 4 7 KQ RN3 Bourns 4814P 002 472 1 1 RN4 Bourns 4610X 101 102 Transistors 1 LT1085CT 3 3 3A Q1 Linear 1 S 8053HNB Q2 Seiko Fuse Fuse Holder 1 2A F1 Wickman 19197 2A Fast Blow Holder 19646 LEDs 2 Green LED LD1 LD2 Hewlett Packard HSMG C650 Diodes 2 Rectifier D7 Motorola MBRD620CT 7 Rectifier D8 9 10 Motorola 1N4001 1 Rectifier D11 Micro Semi 1N914 1 Rectifier D6 Motorola 1SMC5 0AT3 Capacitors 43 0 1 C1 C2 9 24 Murata Erie C26 C31 C35 C52 GRM42 6X7R104M25BB 3 470 uF C3 C6 C7 Sprague 501D477M016MM 1 390 pF C25 Murata Erie GRMA2 6X7R391M50BB 2 33 pF C32 C33 Murata Erie GRM42 6COG330M50BB B 4 DSP56301ADMUM AD Preliminary MOTOROLA DSP56301 ADM Bill of Materials B 2 DSP56301 ADM HARDWARE PARTS LIST REV 2 1 3 15 95 Oty Description Ref Designator Vendor Part Jumpers 9 1 x 2 Bergstik JP1 JP7 JP12 JP13 NSH 02SB S2 TG30 3 8 pin Connector JP8 JP10 JP11 Samtec TSM10401SDV 1 1 x3 Bergstik JP9 R N NSH 03SB S2 TG30 1 6 pin Connector JP14 Samtec TSM10301SDV Sockets 1 32 pin PLCC U8 Auga
16. Lais 2125 1195 0126 OMOS 044 0015 2025 oz MOL 1025 0025 SNL oal 341881 30 88 ld 99 ua SYO OVV WL SVO aaow aout odOW gadon vGOW 5 EVV 5 IVV 05 OVV lt gt lt 02 gt 4 lt 61 gt lt 81 gt lt lt 91 gt lt gt lt vl d lt 81 gt q lt 01 gt 10698450 5 V LNIH ISHH LSHH X10H 3NVHdH T3SQIH AH dOLSH DHIH HH3SH N3VH LN9H HH3dH o VvaHuvdH AYSH ISAIAH AQHLH 039H lt 0 gt Le QVH lt 05 gt lt 6Z gt QVH ge QvH L2 QVH 92 QVH Ge QVH pe QvH z QvH zz QVH L2 QVH lt 0z gt avH lt 61 gt avH lt 81 gt lt 1 gt lt 91 gt 0 lt 1 gt dVH lt 21 gt 0 LL QVH 0L QVH lt 6 gt lt 8 gt lt gt lt 9 gt lt gt QVH lt 5 gt lt 2 gt lt gt lt 0 gt 8 181 27 891 061 6
17. Po N T Hong Kong 3 14 2 Tatsumi Koto Ku 1 800 441 2447 852 26629298 Tokyo 135 Japan 81 3 3521 8315 Mfax Technical Resource Center RMFAX0 email sps mot com 1 800 521 6274 TOUCHTONE 602 244 6609 Internet DSP Helpline http www motorola dsp com dsphelp dsp sps mot com A MOTOROLA TABLE OF CONTENTS SECTION 1 QUICK START 1 1 1 1 OVERVIEW E E 1 3 1 2 EQUIPMENT dioe DT ER 1 3 1 2 1 What You Get with the DSP56301ADM 1 3 1 2 2 What You Need to 1 4 1 3 INSTALLATION PROCEDURE 1 4 1 3 1 Preparing the 05 56301 1 5 1 3 2 Connecting the DSP56301ADM to the PC and Power 1 8 1 4 USING THE 5 56301 1 8 SECTION 2 DSP56301ADM TECHNICAL SUMMARY 2 1 2 1 DSP56301ADM DESCRIPTION AND FEATURES 2 3 2 2 DSP55301 DESCRIPTION 2 5 2 3 MEMORY ne i oa aa 2 5 2 3 1 DRAM Selection 2 6 2 3 2 SRAM 2 6 2 3 3 Flash PROM Selection 2 7 2 4 DSP56301 OPERATING MODE SELECTION 2 8 2 5 CLOCK SOURCE SELECTION ud a macie etes 2 9 2 5 1 On Board Clock Generator Selection 2
18. QVH lt L gt QVH lt 9 gt QVH lt gt CVH lt gt ZOIL 001 10S INS LLOS 2196 044 0325 0098 20265 SNL 0018 18 om 7 OND 902 OL 691 SNId lt 6 gt lt 6c gt QVH lt LC gt QVH Gc QVH lt gt lt e gt QVH lt 0c gt QVH lt ZL gt QVH lt 91 gt 3ANVHdH IASAAGH N3VH lt gt 9H 4 lt 81 gt 05 6v QOul 47 lt 0 gt CVH Sy lt 80 gt 0 vv lt 92 gt ar pov 66 lt e gt CVH 46 lt gt 0 66 lt 6 gt 16 lt 81 gt 60 922 14 AQUIH OR Sc OND 1 8 1 lSUH 9 S v 6 lt 2 gt C EA 4 98 OL 901 SNId 06 lt LIPV 9p lt 61 gt Lev Ot o v 96 lt 96 VHLNI 2 oes 20 OL SS SNId lt 9 gt 8 lt 0 lt gt eov lt gt GND ea lt vrd lt 9 gt GND lt 6 gt lt 01 gt gig lt 9l gt d lt 81 gt q GND 4080 HLNI lt 91 gt lt gt lt gt E SA sev lt gt lt 0 gt Y lt 6 gt sev eduvds E SA 0 WV
19. is removed the SRAM is disabled and the user may use AAO for other purposes 2 3 3 Flash PROM Selection The DSP56301ADM includes a Flash PROM to facilitate stand alone operation The FPROM is on board and programmable making it ideal for programming updates The DSP56031ADM uses a programmable byte wide AT29LV512 3 V only eliminating the need for additional supply or a DC DC converter FPROM with 200 ns access time The load capacitance of this chip is 6 pF on the address lines and 12 pF max on the data lines The Flash memory may tolerate up to 1000 program cycles per sector each sector is 128 bytes total of 512 sectors The AT29LV512 has a low power write protect feature to guard against inadvertent writes during power transitions The FPROM also permits data polling during programming to shorten programming cycles Figure 2 4 on page 2 8 illustrates the DSP56301 hookup to a byte wide non volatile memory All actions to the device are controlled via a sequence of commands written to the device MOTOROLA DSP56301ADMUM AD Preliminary 2 7 DSP56301ADM Technical Summary DSP56301 Operating Mode Selection 29F010 12 0 16 WR RD 1 000 007 00 07 Figure 2 4 Flash PROM Connection Note The Flash memory is enabled disabled using jumper JP3 When JP3 is placed the Flash is enabled When JP3 is removed the Flash memory is disabled and the user may use AA1 for other purposes 2 4 DSP56301 OPERATING MODE SELECTION
20. options are used set bits XTLD and COD in the PLL Control Register PCTL to disable unnecessary clock signals and avoid unnecessary on board radio frequency emissions MOTOROLA DSP56301ADMUM AD Preliminary 2 9 DSP56301ADM Technical Summary Clock Source Selection 2 5 1 On Board Clock Generator Selection The clock generator is socketed to allow easy replacement with different frequency clock generators The board is supplied with a 33 MHz clock generator The PCB layout is designed so that either a 14 pin DIP packages or an 8 pin DIP packages may be accepted The clock generator should be placed in the socket as shown in Figure 2 6 To select the on board clock generator JP13 should not be jumpered and JP14 should be jumpered from pin 2 to pin 5 The DSP56301ADM comes with aDIP14 package 33 MHz clock generator 14 13 12 11 10 9 8 Note Pin 8 of 14 pin socket or Pin 5 of the 8 pin socket is DIP8 PACKAGE 1 2 3 4 U15 socket 1 2 3 4 5 6 7 Figure 2 6 3 3 V Clock Generator Assembly 2 5 2 External Clock Selection To support non standard clock rates and frequency fine tuning the DSP56301ADM provides 50 impedance DC coupled BNC connector for 3 3 clock input To select the external clock generator JP13 should not be jumpered and JP14 should be jumpered from pin 3 to pin 4 Note For proper operation the external clock must have rise fall times lt 3 ns 2 5 3 Crystal Oscillator Selectio
21. two part 2 port ISA and PCI edge connectors e SSII F Two connectors 2 x 7 and 2 x 15 SMD pin rows JTAGE OnCE port connector 2 x 7 SMD pin rows 2 8 1 Expansion And Logic Analyzer Connectors The DSP56301ADM has a set of four dual in line 50 pin SMD pin rows connectors to support both hardware expansion and logic analyzer connection These connectors are connected to all the pins of the DSP56301 chip except for the PCAP XTAL EXTAL MODA MODB MODC and PINIT All the other DSP56301 pins are routed to these connectors along with 3 3 V and GND pins The power and ground pins facilitate hardware expansions powered by the DSP56301ADM Figure 2 8 on page 2 14 Figure 2 9 on page 2 15 Figure 2 10 on page 2 16 and Figure 2 11 on page 2 17 show the pinouts for these connectors MOTOROLA DSP56301ADMUM AD Preliminary 2 13 DSP56301ADM Technical Summary Connectors BCLK 1 V3 3 GND CLKOUT AAO CAS TA NMI RESET V3 3 V3 3 GND GND BB BG BR V3 3 GND AA2 WR RD GND V3 3 V3 3 GND SPARE2 AO A8 GND V3 3 A1 A9 A2 A10 GND V3 3 A3 A11 4 12 GND V3 3 5 13 14 A7 A15 Figure 2 8 Expansion Connector P10 2 14 DSP56301ADMUM AD Preliminary MOTOROLA DSP56301ADM Technical Summary Connectors IRQB D22 D23 D21 V3 3 GND D20 D18 019 016 017 015 V3 3 GND 014 012 013 010 011 09 V3 3 GND V3 3 GND D8 D6 D7 D4 D5 D3 V3 3 GND D2 DO D1 A22 A23 V3 3 V3 3 A20 21
22. 10 2 5 2 External Clock Selection 2 10 2 5 3 Crystal Oscillator Selection 2 10 2 5 4 DSP56301 PLL Enable Disable On Reset 2 11 2 6 HOST PORT SELECTION 2 11 2 7 ISA DMA AND INTERRUPT CHANNELS 2 12 2 8 CONNECTORS om 2 13 2 8 1 Expansion And Logic Analyzer Connectors 2 13 2 8 2 5 V Power 2 18 2 8 3 FAIS2 iu om e eee ene ease a 2 18 2 8 4 SSI Port Connectors 2 19 2 8 5 SCI Port Connector mck ddera 2 20 2 8 6 JTAG OnCE 2 21 MOTOROLA DSP56301ADMUWM AD Preliminary iii APPENDIX DSP56301ADM SCHEMATICS A 1 APPENDIX DSP56301ADM BILL OF MATERIALS B 1 DSP56301ADM ELECTRICAL PARTS LIST REV 213 15 95 Ren d edd ded wie fs B 3 B 2 DSP56301 ADM HARDWARE PARTS LIST REV 23 19 998 raices ee Ee die B 5 iv DSP56301ADMUM AD Preliminary MOTOROLA Figure 1 1 Figure 1 2 Figure 2 1 Figure 2 2 Figure 2 3 Figure 2 4 Figure 2 5 Figure 2 6 Figure 2 7 Figure 2 8 Figure 2 9 Figure 2 10 Figure 2 11 Figure 2 12 Figure 2 13 Figure 2 14 Figure 2 15 MOTOROLA LIST OF FIGURES DSP56301ADM Key Component 1 6 Application
23. 61 651 evt cduvds V LNIH JSHH AHH xH MH N3VH MOO IH IHSA3QH xACH LH lt gt lt 2 gt 0 lt lt 0 gt 1 WH 06 GVH lt 62 gt QVH lt 82 gt 10 GVH 92 Gc lt gz gt avH lt zz gt QYH lt 1Z gt QqVH lt 0z gt avH lt 61 gt avH lt 81 gt avH lt 1 gt 9L QVH SL QVH vL QVH L QVH eL QVH LI QVH 0L QVH lt 6 gt avH lt 8 gt lt gt lt 9 gt lt S gt QVH lt gt QVH lt 5 gt lt L gt QVH lt 0 gt 0VH DSP56301ADMUM AD MOTOROLA 21402 d9Vvd divad 19313S AGOW LINI 320 19 SQVIOE9SdSG TLL 9661 90 11 41 9 UNC 4 04141 1Sv1 13S3U ve EAZ ZAZ LAZ YAL EAL ZAL LAL SNIMVHG LINIdf INH3 DTTO MTOLXA MTON39 S ZHWEE SiN SADVMOVd did Nid vL ANY did 8 S1d399V NIIV LX3 MIO1LX SSA bsrreesib 948 vVo eve evo 94 evi WI OON adaon vaOW or 4051 i vin INN 492 48 79 adon 7Z VGOW 8 MS dI3S3H zn 9051 ein 2
24. ADM some of which will be supplied with the module and some of which must be supplied by the user 1 2 1 What You Get with the DSP56301ADM The following materials are provided with the DSP56301ADM e DSP56301 Application Development Module board DSP56301ADM Product Information DSP56301ADM User s Manual this document Motorola Digital Signal Processor Registration Form MOTOROLA DSP56301ADMUM AD Preliminary 1 3 Quick Start Guide Installation Procedure 1 2 2 What You Need to Supply Motorola Application Development System with appropriate host interface card e Host Computer system PC compatible computer 486 class or higher with e MS DOS version 6 0 or later or Windows 3 1 or later or Windows 95 e 8 Mbytes RAM oneopen 16 bit ISA or a PCI expansion slot e free I O addresses 100 102 200 202 or 5300 9303 e CD ROM drive hard drive with 4 Mbyte of free disk space mouse Sun Microsystems Sun 4 Workstation running Sun Operating System Release 4 1 1 or later or Solaris Release 2 5 or later one open SBus expansion slot CD ROM drive and a mouse Hewlett Packard HP7xx Workstation running HPUX Version 9 x Version 10 x is not supported one open EISA expansion slot CD ROM drive and a mouse 1 3 INSTALLATION PROCEDURE Installation requires the following steps 1 Using information provided in the Motorola ADS User s Manual install the Motorola Application Development System in the host comput
25. DSP56301ADM User s Manual Motorola Incorporated Semiconductor Products Sector Wireless Division 6501 William Cannon Drive West Austin TX 78735 8598 Order this document by DSP56301ADMUM AD Introduction This document supports the DSP56301 Application Development Module DSP56301ADM including a description of its basic structure and operation the equipment required to use it the specifications of the key components schematic diagrams and a parts list Section 1 is a Quick Start Guide Section 2 provides detailed information about key components in the evaluation module Appendix A has detailed schematics Appendix B lists the Bill Of Materials BOM for the board Detailed information is provided in the additional documents supplied with this kit OnCE and Mfax are trademarks of Motorola Inc gsm Motorola reserves the right to make changes without further notice to any products herein Motorola makes no warranty representation or guarantee regarding the suitability of its products for any particular purpose nor does Motorola assume any liability arising out of the application or use of any product or circuit and specifically disclaims any and all liability including without limitation consequential or incidental damages typical parameters which may be provided in Motorola data sheets and or specifications can and do vary in different applications and actual performance may vary over time All operating parameters inc
26. LO3NNOO 194 sav 10698450 wi8 OAS DAS 9661 1 60 91 91 unr 4 03140 15 1 X903 VOIOW HO IA lt 0 gt QVH ves ody Lav lt gt avH lt Z gt QYH VIS AGNNOYD vog gav lt 8 gt QVH lt gt rav av lt 9 gt QVH lt 9 gt ve 9QV TAG 8 565 3A88 Zav gt Vad 039 9 sav lt 8 gt QVH orav lt 01 gt lt 6 gt QVH Ver 6QV lt NOP ver LL QVH Vip 14181 lt gt lt gt vor ELOY 33870 lt L gt OH 3A88 MAE E lt GL gt CVH 9935 ver 4 2 ddd 5 2088 9490 1H yoy 3NOGS AQNNOYD yee GAE et 13SA3q 13SA3dH HMH vse dOLs IAG E QHIH voe 9 PONNOYD lt Z gt 9H ANVHdH VPE 1 Q0VH yeg DA8 8 lt 91 gt QVH Vee 91QV 61 Q0VH lt 8L gt QYH vie ide lt 0z gt dVH V6z ozay c Q0VH co QVH 8 1 VIZ A8 8 lt 9c gt QVH TASOIH lt pZ gt QYH 502 lt LC gt QVH auNnouo 92 avH VEZ 920 lt 6c gt QVH
27. cription and Features DSP56301ADM DESCRIPTION AND FEATURES The DSP56301ADM is designed as a versatile card that can be used not only as a stand alone board but can also be plugged into other cards Four 50 pin connectors allow access to all the DSP signals including Vpp and This plug in feature permits special configurations including among others connection to a customized wire wrapped or other application board to permit enhanced functionality An overview description of the DSP56301ADM is also provided in the DSP56301ADM Product Information document order number DSP56301 ADMP D included with this kit The main features of the DSP56301ADM include the following Note DSP56301 24 bit Digital Signal Processor 32 K Word FSRAM with 12 ns access 5 V 64 K Byte Flash PROM Memory 200 ns access on board 3 V programmable 512 K Word DRAM 70 ns access ISA bus compatible edge connector slave only operation PCI bus compatible edge connector master amp slave operation Table mounted stand alone operation or computer plug in card operation Integrated Expansion and Logic Analyzer Connectors Dedicated SSI and SCI port connectors JTAG OnCE port connector for easy hookup to Motorola command converter 5 V operation with on board 3 3 V voltage regulation Power terminals and 8 pin clock socket for stand alone operation Call your local Motorola sales office or distributor for additional information about the Motorola
28. e connector is keyed with both 5 V and 3 3 V Keys to permit operation with either 5 V or 3 3 V PCI backplanes 2 18 DSP56301ADMUM AD Preliminary MOTOROLA DSP56301ADM Technical Summary Connectors 2 8 4 SSI Port Connectors The SSI port pins appear on three different connectors The Expansion amp Logic Analyzer connectors Two dedicated SSI port connectors DSP56004 Audio Interface Bus AIB compatible connector The SSI pins are multiplexed to these connectors to permit connection of the SSI pins to various applications The dedicated general purpose connectors are for general purpose use to be connected via a ribbon cable to another board To avoid crosstalk and supply concurrent impedance path for the ongoing signals GND lines are inserted between the signal lines To avoid incorrect insertion of the receptacle connector keying is provided as pin 13 is cut while its corresponding hole in the receptacle connector is filled The pinout of the independent SSI connector is shown in Figure 2 12 SRD1 1 BJ 2 GND STD1 GND SC01 GND SC11 GND SC21 GND SCK1 GND KEY GND Figure 2 12 Dedicated SSI Connector P3 The AIB interface connector is meant to support the DSP56004 Audio Interface Board AIB a high quality audio board with two stereo 18 bit ADCs and three stereo 18 bit DACs originally designed to for the DSP56004 The pinout of the SSI AIB connector is shown in Figure 2 13 on page 2 20 In the figure the leftmo
29. ector is used both for JTAG testing during production and for OnCE functions for code debugging and software development The pinout of the JTAG OnCE dedicated connector is shown in Figure 2 15 Figure 2 15 JTAG OnCE Connector P4 MOTOROLA DSP56301ADMUM AD Preliminary 2 21 DSP56301ADM Technical Summary Connectors 2 22 DSP56301ADMUM AD Preliminary MOTOROLA APPENDIX A DSP56301ADM SCHEMATICS MOTOROLA DSP56301ADMUM AD A 1 DSP56301ADM Schematics A 2 DSP56301ADMUM AD MOTOROLA 2 40 ALVG SNOLLO3NNOO fidO SQVIOE9SdSQ 9661 amp 80 6 94 unf ud4 q3lJIQON 18 1 OOF lt 2 gt d 66 620 36 96 lt 02 gt 0 58 0120 lt 6 gt 722 ga 792 20 920 lt g gt d lt gt ea lt o gt d v6 6120 56 8120 c6 lt I6 lt 91 gt 06 40 Z8 98 lt l gt d 98 lt cl gt d 78 SZ vL e 22 69 89 Zo lt lt 0 gt 13S3U VIX 1 19 33 INN LINId 1 1 LNOW10 ec 40 ZOIL LOIL 004 10S HOHER axl POS tays 1115 2105 HOS 0125 0425 044 0015 2025 1095 0025 217 aw SNL oal MOL 1591 3d 88 18 99 X108 LOLL OOIL XIOS IADS 1995
30. er 2 Prepare the DSP56301ADM board 3 Connect the board to the external Command Converter card 1 4 DSP56301ADMUM AD Preliminary MOTOROLA 1 3 1 Quick Start Guide Installation Procedure Preparing the DSP56301ADM CAUTION Because all electronic components are sensitive to the effects of electrostatic discharge ESD damage correct procedures should be used when handling all components in this kit and inside the supporting personal computer Use the following procedures to minimize the likelihood of damage due to ESD Always handle all static sensitive components only in a protected area preferably a lab with conductive anti static flooring and bench surfaces Always use grounded wrist straps when handling sensitive components Never remove components from anti static packaging until required for installation Always transport sensitive components in anti static packaging Locate the fourteen jumper blocks JP1 JP14 and switch block SW2 on the DSP56301ADM board as shown in Figure 1 1 on page 1 6 Table 1 1 describes the default jumper and switch settings when shipped from the factory Read the technical summary in Section 2 of this manual for additional information about the DSP56301ADM board and its components MOTOROLA DSP56301ADMUM AD Preliminary 1 5 Quick Start Guide Installation Procedure RESET SW3 EXT CLOCK E
31. gt 5 MOTOROLA DSP56301ADMUM AD 21301 3oyg kL ASY SYOLOANNOO SNg VSI 50 106944850 4111 9661 64 40 41 91 unn U4 G3ISIGOW 1Sv1 SNIMVHG ZMOVd soua SMOVG xOMOVd GNDVSI 991 AS x9MOVd SMOVG 0MOVG vLOUl SLOUI LLOUI 0rOul 9101 x9 LN lt 91 gt lt l gt d lt gt a lt 0l gt d lt 6 gt d lt 8 gt q 21 81 1 61 ezv d HES 51 8d Feq DSO AS diva VG Oul SOul 9Oul ZOul M198SAS HSduddd 3N3AN zoya NS 6DHl VAS 19599 LAN YSI VS SYS 9VS LVS 8VS 6VS 01 5 LLYS 0175 IVS vIVS SLYS 9LVS ZLVS 8175 6175 NAV QV3HOl ods Las 245 605 vas 405 905 108 LNOO VSI lt 4 gt 05 lt vl gt ds lt l gt ds 4 08 lt gt lt 01 gt lt 6 gt ds lt 8 gt 5 DSP56301ADMUM AD MOTOROLA 2 408 39 HO
32. luding Typicals must be validated for each customer application by customer s technical experts Motorola does not convey any license under its patent rights nor the rights of others Motorola products are not designed intended or authorized for use as components in systems intended for surgical implant into the body or other applications intended to support life or for any other application in which the failure of the Motorola product could create a situation where personal injury or death may occur Should Buyer purchase or use Motorola products for any such unintended or unauthorized application Buyer shall indemnify and hold Motorola and its officers employees subsidiaries affiliates and distributors harmless against all claims costs damages and expenses and reasonable attorney fees arising out of directly or indirectly any claim of personal injury or death associated with such unintended or unauthorized use even if such claim alleges that Motorola was negligent regarding the design or manufacture of the part Motorola and are registered trademarks of Motorola Inc Motorola Inc is an Equal Opportunity Affirmative Action Employer How to reach us USA Europe Locations Not Listed Asia Pacific Japan Motorola Literature Distribution Motorola Semiconductors Ltd Nippon Motorola Ltd P O Box 5405 8B Tai Ping Industrial Park Tatsumi SPD JLDC Denver Colorado 80217 51 Ting Kok Road 6F Seibu Butsuryu Center 303 675 2140 Tai
33. n By using a low frequency crystal oscillator the user can reduce external high frequency emissions while still allowing the the DSP56301 to run at higher operating frequencies generated by the on chip PLL The crystal must have bypass capacitors at both ends When the crystal oscillator is used the user should install appropriately rated components C32 C33 R16 R17 and Y1 See the DSP56301 Technical Data sheet for more information To enable the on board crystal oscillator place a jumper on JP13 and another jumper across pins 1 6 on JP14 Note Power should be turned off prior to inserting removing the crystal oscillator 2 10 DSP56301ADMUM AD Preliminary MOTOROLA DSP56301ADM Technical Summary Host Port Selection 2 5 4 DSP56301 PLL Enable Disable On Reset The DSP56301 samples the PINIT NMI line on exit from the reset state to determine whether the PLL should be enabled or disabled To enable the PLL JP12 should be jumpered To disable the PLL JP12 pins 1 2 should be jumpered RESET QS3244S0 2 to 1 MUX NMI Requests To DSP56301 PLL INIT jumper Figure 2 7 PLL Mode Selection After the RESET line is deasserted the PINIT NMI signal is connected to the NMI signal Note The ADM is factory configured for PLL enabled JP12 removed 2 6 HOST PORT SELECTION The DSP56301 s 2 port directly supports a PCI bus interface Connection to an ISA bus interface requires the addition of external buffers
34. r on the documentation CD ROM DSP56301 Technical Data Provides features list and specifications including signal descriptions DC power requirements AC timing requirements and available packaging DSP56301 User s Manual Provides an overview description of the DSP and detailed information about the on chip components including the memory and I O maps peripheral functionality and control and status register descriptions for each subsystem DSP56300 Family Manual Provides a detailed description of the core processor including internal status and control registers and a detailed description of the family instruction set Refer to these documents for detailed information about chip functionality and operation 2 3 MEMORY Table 2 1 lists the memory used in the DSP56301ADM Table 2 1 DSP56301ADM Memories TYPE SIZE SPEED AA line used as chip select DRAM 512 K Word 70 ns AA3 SRAM 32 K Word 12 ns AAO Flash PROM 64 K Byte 200 ns AAI MOTOROLA DSP56301ADMUM AD Preliminary 2 5 DSP56301ADM Technical Summary Memory 2 3 1 DRAM Selection The DSP56301ADM uses a single bank of three 512 K x 8 70 ns 5 V only DRAMs Motorola MCM54800AJ70 The DRAM is accessed by the DSP56301 using 3 wait cycles during Page mode not including the RAS precharge time at a beginning of a new page and 11 wait cycles in a non page access when the DSP operates at 66MHz Address bus load capacitance from this config
35. st column contains the AIB connector signal names while the next column contains the DSP56301 signal names The DSP56301ADM supports one stereo output channel and one stereo input channel when connected to the AIB MOTOROLA DSP56301ADMUM AD Preliminary 2 19 DSP56301ADM Technical Summary Connectors AIB Function GPIOO SRD1 GND GPIO1 STD1 GND GPIO2 01 GND GPIO3 SC11 GND SDIO SRDO GND SDI1 N C GND RBICK SC00 GND RLRCK SC10 GND SDOO STDO GND 001 GND 002 GND TBICK SCKO GND TLRCK 5 20 GND RESET RESET GND GND GND GND This connector is noton ADM Figure 2 13 SSI AIB Connector P2 2 8 5 SCI Port Connector The SCI port pins are routed to two connectors The Expansion amp Logic Analyzer connectors Dedicated SCI port connector Routing to the expansion Logic Analyzer connectors is done to support expansion boards and application debugging The dedicated connector attaches to an application board via a ribbon cable To avoid incorrect insertion of the plug into the receptacle keying is provided via pin 6 which is cut while its corresponding hole in the receptacle connector is filled 2 20 DSP56301ADMUM AD Preliminary MOTOROLA DSP56301ADM Technical Summary Connectors The pinout of the SCI dedicated connector is shown in Figure 2 14 TXD 1 Bg DX 2 GND SCLK 4 GND RXD 5 6 KEY Figure 2 14 SCI Dedicated Connector P6 2 8 6 JTAG OnCE Connector JTAG OnCE conn
36. t PCS 032SMU 1XT 1 14 pin DIP U15 Augat 214 AG19SM 5 20 pin DIP 916 020 Augat 220 AG19SM 1 3 position Power 1 Wieland 25 332 3353 3 1 9 Mach Strip RN1 RN2 RN5 R N SBE 09 S TG30 1 1 x 10 Mach Strip RN4 R N SBE 10 S TG30 Connectors 1 2 position Terminal 1 Augat RD1 MC6 P102 02 Block 5 30 pin Connector P2 P5 F7 P10 P12 Samtec TSM11501SDV 2 14 pin Connector P3 P4 Samtec TSM10701SDV 4 20 pin Connector P5 P7 P10 P12 Samtec TSM11001SDV 1 6 pin Connector P6 Samtec TSM10301SDV 1 BNC P13 Molex 73138 5003 Switches 1 Toggle SW1 C amp K E101MD1ABE 1 DIP SW2 Grayhill 90 045 1 Momentary SW3 C amp K E121SD1AGE 1 Pushbutton Cup C amp K 708902000 Miscellaneous 4 RUBBER FEET Amatom 5186 1 4 40 SCREW Located on Q1 1 4 40 NUT Located on Q1 MOTOROLA DSP56301ADMUM AD Preliminary B 5 DSP56301ADM Bill of Materials B 6 DSP56301ADMUM AD Preliminary MOTOROLA
37. tor JP14 Pins 2 5 jumpered SW2 SW2 1 Off Bootstrap from HOST ISA SW2 2 On SW2 3 Off Note The factory default configuration selects ISA bus operation for the plug in card feature Refer to Section 2 6 Host Port Selection for other available port configurations MOTOROLA DSP56301ADMUM AD Preliminary 1 7 Quick Start Guide Using the DSP56301ADM 1 3 2 Connecting the DSP56301ADM to the PC and Power Figure 1 2 shows the interconnection diagram for connecting the PC and the external power supply to the DSP56301ADM board Using the instructions in the ADS User s Manual connect the Command Converter to the ADM board Power for the ADM is supplied from the Command Converter module User Application 37 pin 14 pin Apr Interface Ribbon Circuits Cable Cable Host Computer 1 L fo Motorola DSP d Host Bus Interface Converter Application Development Module ADM Figure 1 2 Application Development 1 4 USING THE DSP56301ADM Once the ADM is installed it becomes a part of the Application Development System Use information in the Application Development System User s Manual to develop your application design debug it and test it ESE 1 8 DSP56301ADMUM AD Preliminary MOTOROLA SECTION 2 DSP56301ADM TECHNICAL SUMMARY MOTOROLA DSP56301ADMUM AD Preliminary 2 1 DSP56301ADM Technical Summary
38. uration is 5 pF x 3 or 15 pF per address line Data bus load capacitance is 7 pF The AA3 Address Attribute signal is used as a Row Address Strobe RAS and Chip Enable CE line The design uses the SOJ package to achieve greatest space reduction DRAM refresh is provided by the DSP56301 DRAM controller The DRAM connection is illustrated in Figure 2 2 MCM54800AJ70 00 023 Figure 2 2 DSP56301ADM DRAM Interface Note The DRAM memory is enabled disabled using jumper JP2 When JP2 is placed the DRAM is enabled When JP2 is removed the DRAM is disabled and the user may use AA3 for other purposes 2 3 2 SRAM Selection Three Motorola MCM6706A 12 SRAMs are used to optimize performance These SRAMs are 32 K x 8 Bi CMOS 5 V only devices with an access time of 12 ns Address bus load capacitance in this configuration is 5 pF x3 or 15 pF per address line Data bus load capacitance is 6 pF The SRAM is accessed by the DSP56301 with 1 wait state when the DSP operates at 66MHz clock The chip select signal for the SRAM is generated using the DSP56301 AAO line The MCM6706AJ12 SRAM uses 5 V input power Connection to the SRAM is shown in Figure 2 3 on page 2 7 2 6 DSP56301ADMUM AD Preliminary MOTOROLA DSP56301ADM Technical Summary Memory MCM6706AJ12 0 14 00 023 Figure 2 3 SRAM Connection Note The SRAM memory is enabled disabled using jumper JP1 When JP1 is placed the SRAM is enabled When JP1

ADM User`s manual

Contents

Download Pdf Manuals

Related Search

Related Contents