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1. ACIN2 El 22 PS2705 1 1 027 ACIN1 C1 ACIN2 El 5 PS2705 1 1 028 ACIN1 C1 ACIN2 El 23 PS2705 1 1 029 ACIN1 Ci ofofo afero ACIN2 El 23 PS2705 1 1 030 ACIN1 C1 mac e Jl e e Ic F lt B lt lol ACIN2 El 23 PS2705 1 ees em ees da Ta 1 031 ACIN1 C1 RP73 ACIN2 El JUMP 1 10 2 JUMP 2 T0 3 USE ULN2803A DN2981A El8 E19 MUST NUMBER IN SAME DIRECTION FOR SINKING OUTPUT FOR SOURCING OUTPUT FOR SINKING OUTPUTS FOR SOURCING OUTPUTS C43 Z 220 D28 1SMC33AT3 26 PS2705 INEC 1 032 ACINI C1 54 ACIN2 El 26 PS2705 1NEC 1 033 ACINI C1 Hi ACIN2 E1 26 PS2705 1 ULN2803A OR UDN2981A 1 034 ACIN1 C1 ACIN2 El 26 PS2705 1 Iac oc Ile Info 1 035 EC acini o F4 i ACIN2 El 1 036 UA27 PS2705 1 1 ACIN1 C1 ACIN2 E1 7 27 PS2705 1NEC 1 037 acini ci H ACIN
2. ko co 1e cn co e OGND1 0 1 OGND1 OGND2 OGND2 002 V2 02 0602 0602 OGND2 59 ACC 11E User Manual APPENDIX A USING THE UMAC CONFIG PRO2 TOOL The UMAC Config Pro2 tool can be used to auto detect and display information on the CPU and accessories present in the UMAC It can be launched from the Executive 4 PEV IN32PRUZ C PROGRAM FILESXDELTA TAUXPMAC EXECUTIVE PROZ SUITEXPEWIN32 File Position Configure View PMAC Resources Backup Setup Tools Window Help PMAC DPRAM Test PMAC Basic Speed Test PMAC Plot Pro2 PMAC Tuning Pro2 P15etup Pro2 P2Setup Pro2 Turbo UMAC Setup Pro2 UmacConfig Pro2 Geo Brick Setup Geo Brick LY Setup Raw Terminal Customize Tools Menu Click on Select and then select the correct UMAC communication connection BER File Tools View Help E m m m Select Define Delete File File With Down About not configured 3 General Information Selected Device is not detected now Click on select Icon and select Umac to use this program Appendix A Using the UMAC Config Pro2 Tool 60 ACC 11E User Manual The ACC 11E like the other older Type A accessories appears in the list as Unknown Left click on the Unknown accessory Buna ES File Tools View Help E m m Select Define elete zi n About Umac Parts E cpu General Informat
3. A00004 16 8 A00008 16 8 A0000C 16 8 A00010 16 8 A00014 16 8 A00018 16 8 A0001C 16 8 O Card 2 1 000 O Card 2 1 001 O Card 2 1 002 O Card 2 1 003 O Card 2 1 004 O Card 2 1 005 O Card 2 1 006 O Card 2 1 007 O Card 2 1 008 O Card 2 1 009 O Card 2 1 010 O Card 2 1 011 O Card 2 1 012 O Card 2 1 013 O Card 2 1 014 O Card 2 1 015 O Card 2 1 016 O Card 2 1 017 O Card 2 1 018 O Card 2 1 019 O Card 2 1 020 O Card 2 1 021 O Card 2 1 022 O Card 2 1 023 O Card 2 1 024 O Card 2 1 025 O Card 2 1 026 O Card 2 1 027 O Card 2 1 028 O Card 2 1 029 O Card 2 1 030 O Card 2 1 031 O Card 2 1 032 O Card 2 1 033 O Card 2 1 034 O Card 2 1 035 O Card 2 1 036 O Card 2 1 037 O Card 2 1 038 O Card 2 1 039 O Card 2 1 040 O Card 2 1 041 O Card 2 1 042 O Card 2 1 043 O Card 2 1 044 O Card 2 1 045 O Card 2 1 046 O Card 2 1 047 configuration O Card 2 1 000 07 as byte O Card 2 1 008 15 as byte O Card 2 1 016 23 as byte O Card 2 1 024 31 as byte O Card 2 1 032 39 as byte O Card 2 1 040 47 as byte O Card 2 latch inputs O Card 2 control register Appendix C Full Power UMAC M Variable Mappings 79 ACC 11E User Manual Base offset A00000 High Byte Single bit variables used for accessing I O points ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr p
4. APPENDIX D THE CONTROL WORD The Control Word must be set equal to 7 every startup usually in PLC 1 The function of each bit in the control word is as follows m Control Word Bit Number Modified Function The ACC 11E will only operate with a control word value of 7 because it cannot be altered from its 24 input 24 output configuration The value would only be different for an accessory with a different configuration for instance a 48 bit input card Register Select Control Bits The register select control bits are generally not applicable to the E ACC 11E and should therefore generally be left at the default value of Note Bits 6 and 7 of the control register together select which of four possible registers can be accessed at each of the addresses Base 0 through Base 5 They also select which of two possible registers can be selected at Base 6 The following table shows how these bits select registers Bit 7 Bit 6 Combined Base 0 to Base 5 Base 6 Register Value Register Selected Selected oo of Data Register Data Register ES Setup Register Setup Register ajo a Setup Register 2 Setup Register 3 The setup registers can be used to configure the ACC 11E for gray code logic inversion or latching inputs see the ACC 14E manual for latching inputs Typically bits 6 and 7 are left at zero If not left at zero typically non zero combined values of bits 6 and 7 are o
5. 78C00 0 8 U 78C01 0 8 U 78C02 0 8 U 78C03 0 8 U 78C04 0 8 U 78C05 0 8 U 78C06 0 8 U 78C07 0 8 U Card Card Card Card Card Card Card Card Card Card Card Card Card Card Card Card Card Card Card Card Card Card Card Card Card Card Card Card Card Card Card Card Card Card Card Card Card Card Card Card Card Card Card Card Card Card Card Card nput 1 nput nput nput nput nput nput nput nput nput nput nput nput nput nput nput nput nput nput nput nput nput nput nput KO 0 1 O OT SW 9 O OO O 1 5 9 N LA O MM N LA N N n Output Output 2 Output 3 Output 4 Output 5 Output 6 Output 7 Output 8 Output 9 Output Output Output Output Output Output Output Output Output Output 19 Output 20 Output 21 Output 22 Output 23 Output 24 QO JO Un S LU 6 1 0 Card 1 0 Card 1 0 Card 1 0 Card 1 0 Card 1 0 Card 1 0 Card 1 0 Card 1 1 1 1 1 1 1 1 for accessing 1 0 points les used for power on configuration Inputs 00 07 as byte Inputs 08 15 as byte Inputs 16 23 as byte Outputs 00 07 as byte Outputs 08 15 as byte Outputs 16 23 as byte latch inputs control register Appendix B Full Turbo UMAC M Variable Mappings 66 ACC 11E User Manual Base Address 78C00 Middle Byte
6. QO JO 1 Mm LU N Using ACC 11E with UMAC MACRO Station 41 ACC 11E User Manual MS anynode MI69 and MI70 16 Bit Transfer This method is generally only used in special cases in which the 24 bit transfer method cannot be used because either the 24 bit registers are already being used or because more than six ACC 11E cards are needed MSfanynode M169 70 processes 16 bit register transfers It is a 48 bit variable represented as 12 hexadecimal digits which are set up as follows digit 1 is leftmost when constructing the word No of consecutive nodes 1 for 110 node 2 for 2 IO nodes No of 16 bit banks per board 3 for 3 IO nodes max Always 3 for ACC 11E pe Ja r e Reserved 0 For ACC 11E 0 Starting I O node register Starting ACC 11E base address COXX 88XX Example Transferring UO data of one ACC 11E card total of 48 bits at base address 8800 over MACRO using three consecutive 16 bit registers of UO node 2 C0A1 C0A2 and C0A3 respectively yields ACC 11E 8800 Inputs Outputs I O Node 2 COA1 16 bit reg Addresses SCOA2 SCOA3 Using ACC 11E with UMAC MACRO Station 42 ACC 11E User Manual e Transferring multiple ACC 11E cards using MS anynode 169 and 70 requires them to be at the same base address starting 87 with the first card set for low byte addressing the second card set Note for middle byte addressing and then a thir
7. 8 Reference Reference Voltage for Inputs 17 24_ 9 mp mid Sinking Sourcing 12 24V for sinking OV for sourcing DE 13 Input Input 22 14 Input Input 24 15 Reference Reference Voltage for Inputs 9 16 12 24V for sinking OV for sourcing Layouts and Pinouts 53 ACC 11E User Manual Wiring Input DB15 Connectors Sourcing Inputs 12 24 VDC Power Supply 12VDC 24VDC INPUT11 INPUT12 INPUTS 1 8 REF INPUTS 9 16 REF INPUTS 17 24 REF 12VDC 24VDC Layouts and Pinouts 12 24 VDC Power Supply 12VDC 24VDC 12VDC 24VDC Sinking Inputs o o INPUT1 INPUTS 1 8 REF INPUTS 9 16 REF INPUTS 17 24 REF o o am INPUTS 1 8 REF INPUTS 9 16 REF INPUTS 17 24 REF 54 ACC 11E User Manual J1 Bottom Outputs 1 thru 12 8 5 O4 O2 1 CO Ot O13 O12 On Ot Front View 2 Outpu Output 3 53 Oupt Output 54 Oupt Output aT 55 Oupt Output to EE 8 Reference Reference voltage See E16 thru E21 jumper settings in section 9 gt Ovupt OutputH2 titled Addressing and Jumper Settings Output 10 12 24V J2 Bottom Outputs 13 thru 24 28 O Os Os Of Os Oz D Os O1 O13 O12 On Oto Os Front View E 5 Output Omputi 6 Opt Outputi23 C
8. C00008 C0000C C00010 C00014 C00018 sc0001C 16 17 18 19 20 21 22 23 16 17 18 19 20 21 22 23 16 Te 18 19 20 21 22 23 16 17 18 19 20 zl 22 23 16 0 17 0 18 019 0 20 0 21 0 22 0 23 4 16 4 17 4 18 4 19 4 20 4 21 4 22 4 23 8 as as as as as as points 1 0 Card 8 1 000 1 0 Card 8 1 001 1 0 Card 8 1 002 1 0 Card 8 1 003 1 0 Card 8 1 004 1 0 Card 8 1 005 1 0 Card 8 1 006 1 0 Card 8 1 007 1 0 Card 8 1 008 1 0 Card 8 1 009 1 0 Card 8 1 010 1 0 Card 8 1 011 1 0 Card 8 1 012 1 0 Card 8 1 013 1 0 Card 8 1 014 1 0 Card 8 1 015 1 0 Card 8 1 016 1 0 Card 8 1 017 1 0 Card 8 1 018 1 0 Card 8 1 019 1 0 Card 8 1 020 1 0 Card 8 1 021 1 0 Card 8 1 022 1 0 Card 8 1 023 1 0 Card 8 1 024 1 0 Card 8 1 025 1 0 Card 8 1 026 1 0 Card 8 1 027 1 0 Card 8 1 028 1 0 Card 8 1 029 1 0 Card 8 1 030 1 0 Card 8 1 031 1 0 Card 8 1 032 1 0 Card 8 1 033 1 0 Card 8 1 034 1 0 Card 8 1 035 1 0 Card 8 1 036 1 0 Card 8 1 037 1 0 Card 8 1 038 1 0 Card 8 1 039 1 0 Card 8 1 040 1 0 Card 8 1 041 1 0 Card 8 1 042 1 0 Card 8 1 043 1 0 Card 8 1 044 1 0 Card 8 1 045 1 0 Card 8 1 046 1 0 Card 8 1 047 for pover on configuration 1 0 Card 8 1
9. Single bit variabl M7048 Y M7049 Y M7050 Y M7051 Y M7052 Y M7053 Y M7054 Y 7055 M7056 gt Y M7057 gt Y M7058 Y M7059 Y M7060 gt Y M7061 gt Y M7062 gt Y M7063 gt Y M7064 gt Y M7065 gt Y M7066 5Y M7067 Y M7068 Y M7069 Y M7070 Y M7071 gt Y M7072 gt Y M7073 gt Y M7074 gt Y M7075 Y M7076 Y M7077 Y M7078 Y M7079 Y M7080 Y M7081 5Y M7082 5Y M7083 gt Y M7084 gt Y M7085 Y M7086 Y M7087 Y M7088 5Y M7089 Y M7090 Y M7091 gt Y M7092 5Y M7093 5Y M7094 5Y M7095 Y 078C00 8 1 078C00 9 1 078C00 10 078C00 11 078C00 12 078C00 13 078C00 14 078C00 15 078C01 078C01 078C01 078C01 078C01 078C01 078C01 078C01 078C02 078C02 078C02 078C02 078C02 078C02 078C02 078C02 078C03 078C03 078C03 078C03 078C03 078C03 078C03 078C03 078C04 078C04 078C04 078C04 078C04 078C04 078C04 078C04 078C05 078C05 078C05 078C05 078C05 078C05 078C05 078C05 GA H OL s Q gt De LM gt bes besos o DG o bes gt gt OT QO Card 2 Input 1 Card 2 Input 2 Card 2 Input 3 Card 2 Input 4 Card 2 Input 5 Card 2 Input 6 Card 2 Input 7 Card 2 Input 8 Card 2 Input 9 C
10. Note another process Using ACC 11E with UMAC MACRO Station 44 ACC 11E User Manual The I O data is now available in the pre defined open memory registers Bitwise mapping can be implemented for direct and convenient user access Inputs Inputs define Inputl M3600 nput1 5X 0010F8 8 lst 16 bit register define Input2 M3601 nput2 gt X 0010F8 9 define Input3 M3602 nput3 gt X 0010F8 10 define Input4 M3603 nput4 5X 0010F8 1 define Input5 M3604 nput5 5X 0010F8 12 define Input6 M3605 nput6 5X 0010F8 13 define Input7 M3606 nput7 5X 0010F8 14 define Input8 M3607 nput8 5X 0010F8 15 define Input9 M3608 nput9 5X 0010F8 16 define Input10 M3609 nput10 5X 0010F8 17 define Input11 M3610 nput11 5X 0010F8 18 define Input12 M3611 nput12 5X 0010F8 19 define Input13 M3612 nput13 5X 0010F8 20 define Input14 M3613 nput14 5X 0010F8 21 define Input15 M3614 nput15 5X 0010F8 22 define Input16 M3615 nput16 5X 0010F8 23 define Input17 M3616 nput17 5Y 0010F8 8 2nd 16 bit register define Input18 M3617 nput18 5Y 0010F8 9 define Input19 M3618 nput19 5Y 0010F8 10 define Input20 M3619 nput20 gt Y 0010F8 11 define Input21 M3620 nput21 5Y 50010F8 12 define Input22 M3621 nput22 5Y 0010F8 13 define Input23 M3622 nput23 5Y 50010F8 14 define Input24 M3623 nput24 gt Y 0010F8 15 Outputs define Outputl M3625 Output1 5Y 0010F8 16 define Output2 M3626 Output2 Y 001
11. O Card O Card O Card O Card O Card nputl nput2 nput3 nput4 nput5 nput6 nput7 nput8 nput9 nput nput nput nput nput nput nput nput nput nput19 nput20 nput21 nput22 nput23 nput24 Outputl Output2 Output 3 Output4 Output Output6 Output7 Output8 Output9 Output Output Output Output Output Output Output Output Output Output Output20 Output2 Output22 Output23 Output24 JO Ot Mm N KO JO OT HS NRO tion Inputs Inputs 9 Inputs Outputs Outputs Outputs latch in 0 Card control 8 as byte 16 as byte 7 24 as byte 1 8 as byte 9 16 as byte 17 24 as byte puts register See Appendix for suggested M Variables for additional cards Using ACC 11E with Power UMAC 17 ACC 11E User Manual USING ACC 11E WITH POWER UMAC C PROGRAMING Setting Up Digital UO Access Delta Tau has developed the following functions which can be used to setup the ACC 11E using the C Programming Language The last entry in the list describes as an alternative how to create user written functions Function for Setting the Control Word ACCIIE SetControIWord Function for Reading the State of Inputs ACC11E_GetInputState Function for Reading the State of Outputs ACC11E_GetOutputState Function for Writing to Outputs ACC11E_SetOutputState User Written Functions Function for Setting the Control Word ACC11E SetControlWord Two parameters mus
12. Single bit variabl M7096 Y M7097 Y M7098 Y M7099 Y M7 M7 M7 M7 M7 M7 M7 M7 M7 M7 M7 M7 M7 M7 M7 M7 M7 M7 M7 M7 M7 M7 M7 M7 M7 M7 M7 M7 M7 M7 M7 M7 M7 M7 M7 M7 M7 M7 M7 M7 M7 M7 M7 M7 les used 078C00 16 Card 078C00 17 Card 078C00 18 Card 078C00 19 Card 078C00 20 Card 078C00 21 Card 078C00 22 Card 078C00 23 Card 078C01 16 Card 078C01 17 Card 078C01 18 Card 078C01 19 Card 078C01 20 Card 078C01 21 Card 078C01 22 Card 078C01 23 Card 078C02 16 Card 078C02 17 Card 078C02 18 Card 078C02 19 Card 078C02 20 Card 078C02 21 Card 078C02 22 Card 078C02 23 Card 078C03 16 Card 078C03 17 Card 078C03 18 Card 078C03 19 Card 078C03 20 Card 078C03 21 Card 078C03 22 Card 078C03 23 Card 078C04 16 Card 078C04 17 Card 078C04 18 Card 078C04 19 Card 078C04 20 Card 078C04 21 Card 078C04 22 Card 078C04 23 Card 078C05 16 Card 078C05 17 Card 078C05 18 Card 078C05 19 Card 078C05 20 Card 078C05 21 Card 078C05 22 Card 078C05 23 Card 78C00 16 8 U 78C01 16 8 U 78C02 16 8 U 78C03 16 8 U 78C04 16 8 U 78C05 16 8 U 78C06 16 8 U 78C07 16 8 U Byte wide variables used for M3320 gt Y M3321 gt Y M3322 gt Y M3323 gt Y M3324 gt Y M3325 gt Y M3326 gt Y M3327 gt Y for w CO y CO
13. 0 05A 410 Output Current individual 100 mA For UDN2981 and ULN2803 V1 12 24V User supplied voltage V1 LIV ULN2803 See chip data sheet Output Voltage for details vi L8V UDN2981 See chip data sheet for details Fuse 125V 2 0A Manufacturer Little Fuse Physical Specifications Description Specification Dimensions Length 16 256 cm 6 4 in Height 10 cm 3 94 in Width 2 03 cm 0 8 in Notes Weight 180 g Front Plate included Terminal Block Connectors FRONT MC 1 5 12 ST3 81 FRONT MC 1 5 5 ST3 81 FRONT MC1 5 3 ST3 81 Terminal Blocks from Phoenix Contact UL 94V0 DB Option Connectors DB15 Female UL 94V0 The vvidth is the vvidth of the front plate The length and height are the dimensions of the PCB Specifications ACC 11E User Manual Agency Approval and Safety Item Description CE Mark Full Compliance EMC EN55011 Class A Group 1 EN61000 3 2 Class A EN61000 3 3 EN61000 4 2 EN61000 4 3 EN61000 4 4 EN61000 4 5 EN61000 4 6 EN61000 4 11 Safety EN 61010 1 UL UL 61010 1 File E314517 cUL CAN CSA C22 2 No 1010 1 92 File E314517 Flammability Class UL 94V 0 Specifications ACC 11E User Manual ADDRESSING ACC 11E Several jumpers must be configured on the Accessory 11E in order for it to work properly with other I O cards in the UMAC rack Jumpers 1 4 select the starting base I O addre
14. 078002 7 define Output M7024 Outputl gt Y 078C03 0 define Output2 M7025 Output2 gt Y 078C03 1 define Output3 M7026 Output3 gt Y 078C03 2 define Output4 M7027 Cutput4 gt Y 078C03 3 define Output5 M7028 Output5 gt Y 078C03 4 define Output6 M7029 Output6 gt Y 078C03 5 define Output M7030 Output7 gt Y 078C03 6 define Output8 M7031 Output8 5Y 5078C03 7 define Output9 M7032 Output9 5Y 5078C04 0 define Output10 M7033 Output10 5Y 078C04 1 define Output11 M7034 Output11 5Y 078C04 2 define Output12 M7035 Output12 5Y 5078C04 3 define Output13 M7036 Outputl3 2Y 078C04 4 define Outputl4 M7037 Output14 5Y 078C04 5 define Output15 M7038 Output15 5Y 078C04 6 define Output16 M7039 Output16 5Y 5 078C04 7 define Output17 M7040 Output17 5Y 5 078C05 0 define Output18 M7041 Output18 5Y 078C05 1 define Output19 M7042 Output19 5Y 078C05 2 define Output20 M7043 Cutput20 gt Y 078C05 3 define Output21 M7044 Output21 gt Y 078C05 4 define Output22 M7045 Output22 gt Y 078C05 5 define Output23 M7046 Output23 5Y 5078C05 6 define Output24 M7047 Output24 5Y 078C05 7 Using ACC 11E with UMAC Turbo 14 ACC 11E User Manual See Appendix for suggested M Variables for additional cards Note Suggested M Variable definitions are also available with the UM AC EY Config Pro2 tool see Appendix Note Most systems only use low byte addressing Note Using ACC 11E with
15. Card 10 Input 1 M7433 5Y 078F00 1 Card 10 Input 2 M7434 5Y 078F00 2 Card 10 Input 3 M7435 5Y 078F00 3 Card 10 Input 4 M7436 5Y 078F00 4 Card 10 Input 5 M7437 5Y 078F00 5 Card 10 Input 6 M7438 5Y 078F00 6 Card 10 Input 7 M7439 5Y 078F00 7 Card 10 Input 8 M7440 5Y 078F01 0 Card 10 Input 9 M7441 gt Y 078F01 1 Card 10 nput 10 M7442 gt Y 078F01 2 Card 10 Input 11 M7443 5Y 078F01 3 Card 10 Input 12 M7444 5Y 078F01 4 Card 10 nput 13 M7445 5Y 078F01 5 Card 10 Input 14 M7446 gt Y 078F01 6 Card 10 Input 15 M7447 5Y 5078F01 7 Card 10 Input 16 M7448 gt Y 078F02 0 Card 10 Input 17 M7449 gt Y 078F02 1 Card 10 Input 18 M7450 gt Y 078F02 2 Card 10 Input 19 M7451 gt Y 078F02 3 Card 10 Input 20 M7452 gt Y 078F02 4 Card 10 Input 21 M7453 gt Y 5 078F02 5 Card 10 Input 22 M7454 gt Y 078F02 6 Card 10 Input 23 M7455 gt Y 078F02 7 Card 10 Input 24 M7456 gt Y 078F03 0 Card 10 Output 1 M7457 5Y 5078F03 1 Card 10 Output 2 M7458 gt Y 078F03 2 Card 10 Output 3 M7459 gt Y S078F03 3 Card 10 Output 4 M7460 gt Y S078F03 4 Card 10 Output 5 M7461 gt Y S078F03 5 Card 10 Output 6 M7462 gt Y S078F03 6 Card 10 Output 7 M7463 gt Y S078F03 7 Card 10 Output 8 M7464 gt Y 078F04 0 Card 10 Output 9 M7465 5Y 5078F04 1 Card 10 Output 10 M7466 5Y 078F04 2 Card 10 Output 11 M7467 gt Y 078F04 3 Card 10
16. Example Reading from and Writing to I O Points on One ACC 11E with CPLCO This example is for an ACC 11E at base address offset A00000 with low byte addressing Every scan the following Background CPLC BGCPLCO reads all inputs on the ACC 11E and places them into P Variables P7000 P7023 for general purpose use The BGCPLC will also read from P Variables P8000 P8023 and write their values to the output pins of ACC 11E as follows P Variable Number run P Variable Number Em Number Number P7000 Input 0 P8000 Output 0 P7001 Input 1 P8001 Output 1 P7002 Input 2 P8002 Output 2 P7003 Input 3 P8003 Output 3 P7004 Input 4 P8004 Output 4 P7005 Input 5 P8005 Output 5 P7006 Input 6 P8006 Output 6 P7007 Input 7 P8007 Output 7 P7008 Input 8 P8008 Output 8 P7009 Input 9 P8009 Output 9 P7010 Input 10 P8010 Output 10 P7011 Input 11 P8011 Output 11 P7012 Input 12 P8012 Output 12 P7013 Input 13 P8013 Output 13 P7014 Input 14 P8014 Output 14 P7015 Input 15 P8015 Output 15 P7016 Input 16 P8016 Output 16 P7017 Input 17 P8017 Output 17 P7018 Input 18 P8018 Output 18 P7019 Input 19 P8019 Output 19 P7020 Input 20 P8020 Output 20 P7021 Input 21 P8021 Output 21 P7022 Input 22 P8022 Output 22 P7023 Input 23 P8023 Output 23 Using ACC 11E with Power UMAC 25 ACC 11E User Manual Example Code
17. Los io io ioi B00000 24 5800004 24 B00008 24 B0000C 24 B00010 24 B00014 24 B00018 24 B0001C 24 for 0 0 0 0 0 0 30 0 4 4 4 4 4 4 4 4 power on 8 OO CO CO CO CO CO CO O Card 6 1 000 O Card 6 1 001 O Card 6 1 002 O Card 6 1 003 O Card 6 1 004 O Card 6 1 005 O Card 6 1 006 O Card 6 1 007 O Card 6 1 008 O Card 6 1 009 O Card 6 1 010 O Card 6 1 011 O Card 6 1 012 O Card 6 1 013 O Card 6 1 014 O Card 6 1 015 O Card 6 1 016 O Card 6 1 017 O Card 6 1 018 O Card 6 1 019 O Card 6 1 020 O Card 6 1 021 O Card 6 1 022 O Card 6 1 023 O Card 6 1 024 O Card 6 1 025 O Card 6 1 026 O Card 6 1 027 O Card 6 1 028 O Card 6 1 029 O Card 6 1 030 O Card 6 1 031 O Card 6 1 032 O Card 6 1 033 O Card 6 1 034 O Card 6 1 035 O Card 6 1 036 O Card 6 1 037 O Card 6 1 038 O Card 6 1 039 O Card 6 1 040 O Card 6 1 041 O Card 6 1 042 O Card 6 1 043 O Card 6 1 044 O Card 6 1 045 O Card 6 1 046 O Card 6 1 047 configuration O Card 6 1 000 07 as byte O Card 6 1 008 15 as byte O Card 6 1 016 23 as byte O Card 6 1 024 31 as byte O Card 6 1 032 39 as byte O Card 6 1 040 47 as byte O Card 6 latch inputs O Card 6 control register Appendix C Full Power UMAC M Vari
18. Output 12 M7468 gt Y 078F04 4 Card 10 Output 13 M7469 5Y 078F04 5 Card 10 Output 14 M7470 5Y 5 078F04 6 Card 10 Output 15 M7471 gt Y 078F04 7 Card 10 Output 16 M7472 gt Y 078F05 0 Card 10 Output 17 7473 7 5078205 1 Card 10 Output 18 M7474 5Y 078F05 2 Card 10 Output 19 M7475 5Y 078F05 3 Card 10 Output 20 M7476 5Y 078F05 4 Card 10 Output 21 M7477 5Y 078F05 5 Card 10 Output 22 M7478 5Y 078F05 6 Card 10 Output 23 M7479 5Y 078F05 7 Card 10 Output 24 Byte vide variables used for power on configuration M3390 gt Y 78F00 0 8 U 1 0 Card 10 1 000 07 as byte M3391 gt Y 78F01 0 8 U 1 0 Card 10 1 008 15 as byte M3392 gt Y 78F02 0 8 U 1 0 Card 10 I 016 23 as byte M3393 gt Y 78F03 0 8 U 1 0 Card 10 1 024 31 as byte M3394 gt Y 78F04 0 8 U 1 0 Card 10 1 032 39 as byte M3395 5Y 78F05 0 8 U 1 0 Card 10 1 040 47 as byte M3396 5Y 78F06 0 8 U 1 0 Card 10 latch inputs M3397 gt Y 78F07 0 8 U 1 0 Card 10 control register Appendix B Full Turbo UMAC M Variable Mappings ACC 11E User Manual Base Address 78F00 Middle Byte Single bit variables used for accessing I O points M7480 5Y 078F00 8 1 Card 11 Input 1 M7481 gt Y 078F00 9 1 Card 11 Input 2 M7482 gt Y 078F00 10 Card Input 3 M7483 gt Y 078F00 11 Card Input 4 M7484 gt Y 078F00 12 Card Input 5 M7485 gt Y 078F00 13 Card Input 6 M7486 gt Y
19. Pt09 u Pt Pt Pt Bt PE Bt PE Pt Pt Pt 0 u i 1 2 5u i 3 gt u i 4 gt u 1 B u 3 6 u i 7 u i 8 u i 9 u i Pt20 u i Pt21 u 1 Pt22 u 1 Pt23 gt u i Pt24 u 1 Pt25 u i Pt26 u i Pt27 u i Pt28 5u i Pt29 u i Pt30 u i Pt31 gt u i Pt32 gt u i Pt33 u i Pt34 u i Pt35 u i Pt36 u i Pt37 u i Pt38 gt u i Pt39 gt u i Pt40 5u i Pt4l u i Pt42 5u i Pt43 u i Pt44 5u i Pt45 5u i Pt46 5u i Pt47 5u i io io qos 10 Lo io quos io Byte wide variables used for Reg0 u Regl gt u Reg2 gt u Reg3 gt u Reg4 gt u Reg5 gt u Reg6 u Reg7 u ptr ptr ptr ptr ptr ptr ptr ptr oCard4 oCard4 oCard4 oCard4 oCard4 oCard4 oCard4 oCard4 io io qos 10 Lo io io io B00000 8 1 B00000 9 1 B00000 10 7 B00000 11 B00000 12 B00000 13 B00000 14 td B00000 15 5 00004 8 1 B00004 9 1 B00004 10 B00004 11 Ll B00004 12 5 00004 13 5 00004 14 5 00004 15 B00008 8 1 B00008 9 1 B00008 10 B00008 11 B00008 12 5 00008 13 B00008 14 5 00008 15 B0000C 8 1 B0000C 9 1 B0000C 10 B0000C 11 B0000C 12 B0000C 13 B0000C 14 B0000C 15 B00010 8 1 B00010 9 1 B00010 10 B00010 11 5 00010 12 B00010 13 B00010 14 B0
20. The VO node addresses 7XXXX for each of the Ring Controller MACRO ICs are Ring Controller MACRO IC 0 Node Registers Station I O Node 2 3 6 7 10 11 Ring Controller 1 0 Node 2 3 6 7 10 11 24 bit X 78420 X 78424 X 78428 X 7842C X 78430 X 78434 16 bit X 78421 X 78425 X 78429 X 7842D X 78431 X 78435 16 bit X 78422 X 78426 X 7842A X 7842E X 78432 X 78436 16 bit X 78423 X 78427 X 7842B X 7842F X 78433 X 78437 Ring Controller MACRO IC 1 Node Registers Station I O Node 2 3 6 7 10 11 Ring Controller 1 0 Node 18 19 22 23 26 27 24 bit X 79420 X 79424 X 79428 X 7942C X 79430 X 79434 16 bit X 79421 X 79425 X 79429 X 7942D X 79431 X 79435 16 bit X 79422 X 79426 57942 X 7942E X 79432 X 79436 16 bit X 79423 X 79427 X 7942B X 7942F X 79433 X 79437 Ring Controller MACRO IC 2 Node Registers Station I O Node 2 3 6 7 10 11 Ring Controller 1 0 Node 34 35 38 39 42 43 24 bit X 7A420 X 7A424 X 7A428 X 7A42C X 7A430 X 7A434 16 bit X 7A421 X 7A425 57 429 X 7A42D X 7A431 X 7A435 16 bit X 7A422 X 7A426 X 7A42A X 7A42E X 7A432 X 7A436 16 bit X 7A423 57 427 X 7A42B X 7A42F X 7A433 X 7A437 Ring Controller M
21. The following parameters should be configured properly for the I O node transfer to work properly MS anynode MS anynode MS anynode MS anynode MS anynode MS anynode MS anynode MS anynode MS anynode MS anynode MI992 MI997 MI995 MI996 M1975 MIS MT9 MI10 MSfanynode MI19 MI1996 MI1975 Max Phase frequency control Typically set to equal to ring controller s 16800 Phase clock frequency control Typically set to equal to ring controller s 16801 MACRO Ring configuration status Typically set to 4080 MACRO IC 0 node activate control MACRO IC 0 I O Node enable MI975 should match enabled I O nodes in MI996 MACRO Ring check Period Typically set to 8 with default clock settings MACRO Ring error shutdown count Typically set to 4 with default clock settings MACRO Sync packet shutdown count Typically set to 4 with default clock settings I O node data transfer rate 0 transfer disabled gt 0 transfer period in Phase clock cycles typically set 4 MACRO IC 1 node activate control if IC 1 is used MACRO IC 1 I O Node enable if IC 1 is used MI1975 should match enabled I O nodes in MI1996 Note The following I O data transfer method examples assume that MACRO communication I O nodes enabling and other MACRO ring parameters have been configured properly on both the ring Controller and MACRO Station Using ACC 11E with U
22. Ultralite Or UMAC with ACC 5E Automatic Firmware Copy lt lt 7 XXXX COXX 88XX I O Data Transfer VO Processing User Access The above diagram represents three basic processes 1 Starting on the right with I O Processing information is transferred to or from the ACC 11E UO Gate and the MACRO Station CPU Gate 2B 2 I O is transferred between MACRO Station COXX and Ring Controller 7XXXX nodes ACC 11E input data is written to MACRO IC addresses 7XXXX on the Ring Controller and Ring Controller output data is written to MACRO Station IC addresses COXX on the MACRO Station 3 User Access Ring Controller 7X XXX addresses are accessed thru M Variables and used in PLC and motion programs The Ring Controller is sometimes referred to as the Master but it is the synchronizing Master There can be more than one Master on a MACRO ring but there must be one and only one Ring Controller Note Refer to the 16 Axis MACRO CPU manuals SRM USER and KS HRM for more information on MACRO Note Using ACC 11E with UMAC MACRO Station 30 ACC 11E User Manual Each MACRO IC consists of 16 nodes 2 auxiliary 8 servo and 6 I O nodes Auxiliary nodes are for Ring Controller Control registers and internal firmware use e Servo nodes are used for motor control carrying feedback commands and flag information HO nodes are by default unoccupied and are user configur
23. base address 7 n 8 where n 0 if using low byte addressing n 8 if using middle byte addressing n 16 if using high byte addressing The control word must be configured every time the UMAC is powered or reset This can be done in an initialization one that disables itself PLC Example 1 Setting up Control Word at Startup for Card at Base Address 78C00 Low Byte Addressing M3307 5Y 578C07 0 8 1 0 Card 1 control register from suggested M Variables Open PLC 1 Clear M3307 S07 Disable PLC 1 Close Example 2 Setting up Control Word at Startup for 3 Cards at Base Address 78C00 Low Middle and High Byte Addressing M3307 5Y 78C07 0 8 1 0 Card 1 control register using low byte M3317 gt Y 78C07 8 8 I O Card 2 control register using middle byte M3327 gt Y 78C07 16 8 I O Card 3 control register using high byte Open PLC 1 Clear M3307 07 M3317 07 M3327 07 Disable PLC 1 Close See Appendix for control vvord details and explanations Note Using ACC 11E with UMAC Turbo 13 ACC 11E User Manual Accessing l O data points M Variables Every ACC 11E has 48 bits of I O data which are comprised of one byte 8 bits at the base address plus five more bytes 8 x 6 48 at the next five consecutive addresses Examples VO data bits for card at base address VO data bits for card at base address 78C00 using low bytes 78C00 using high bytes Y 078C00 0 8 Inputs 1 8 Y 078C00
24. oCard9Pt46 u i oCard9Pt47 u i io io Lo io C00000 28 C00000 29 C00000 30 C00000 31 C00004 24 C00004 25 C00004 26 C00004 27 C00004 28 C00004 29 C00004 30 C00004 31 C00008 24 C00008 25 C00008 26 C00008 27 C00008 28 C00008 29 C00008 30 C00008 31 C0000C 24 C0000C 25 C0000C 26 C0000C 27 C0000C 28 C0000C 29 C00000 24 C00000 25 C00000 26 C00000 27 Byte wide variables used ptr ptr ptr ptr ptr ptr ptr ptr oCard9Reg0 gt u oCard9Regl u oCard9Reg2 gt u oCard9Reg3 gt u oCard9Reg4 gt u oCard9Reg5 gt u oCard9Reg6 gt u oCard9Reg7 gt u io io LOS 10 zo io io ioi C00000 24 C00004 24 C00008 24 C0000C 24 C00010 24 C00014 24 C00018 24 C0001C 24 C0000C 30 C0000C 31 C000 C000 C000 C000 C000 C000 C000 C000 C000 C000 C000 C000 C000 C000 C000 C000 0 24 for 0 0 0 0 0 0 30 0 4 4 4 4 4 4 4 4 points 1 0 Card 9 1 000 1 0 Card 9 1 001 1 0 Card 9 1 002 1 0 Card 9 1 003 1 0 Card 9 1 004 1 0 Card 9 1 005 1 0 Card 9 1 006 1 0 Card 9 1 007 1 0 Card 9 1 008 1 0 Card 9 1 009 1 0 Card 9 1 010 1 0 Card 9 1 011 1 0 Card 9 1 012 1 0 Card 9 1 013 1 0 Card 9 1 014 1 0 Card 9 1 015 1 0 Card 9 1 016 1 0 Card 9 1 017
25. 078E05 22 Card 078E05 23 Card 78E00 16 8 U 78E01 16 8 U 78E02 16 8 U 78E03 16 8 U 78E04 16 8 U 78E05 16 8 U 78E06 16 8 U 78E07 16 8 U for O O VD O LO VD O VD VD O O UD LO LO LO LO LO LO nput nput nput nput nput nput nput nput nput nput nput nput nput nput nput nput nput nput nput nput nput nput nput nput Output Output Output Output Output Output Output Output Output Output Output Output Output Output Output Output Output Output Output Output Output Output Output Output 1 Ko OO 1 O OT Gs CO 9 QO JO OT Mm LU N N d NNN LA KO OO JO OU 4 Q N OO 1 OY OT S ho O 20 21 22 23 24 accessing I O points power on configuration I O I O I O I O I O I O 1 0 1 0 Card Card Card Card Card Card Card Card 9 9 9 9 9 9 9 9 1 000 07 as 1 008 15 as 1 016 23 as 1 024 31 as 1 032 39 as 1 040 47 as latch inputs control regi byte byte byte byte byte byte ster Appendix B Full Turbo UMAC M Variable Mappings ACC 11E User Manual Base Address 78F00 Low Byte Single bit variables used for accessing I O points M7432 5Y 078F00 0
26. 078F00 14 Card Input 7 M7487 gt Y 078F00 15 Card Input 8 M7488 gt Y 078F01 8 1 Card 11 Input 9 M7489 5Y 078F01 9 1 Card 11 Input 10 M7490 5Y 078F01 10 Card Input 11 M7491 gt Y 078F01 11 Card Input 12 M7492 gt Y 078F01 12 Card Input 13 M7493 gt Y 078F01 13 Card Input 14 M7494 5Y 078F01 14 Card Input 15 M7495 gt Y 078F01 15 Card z Input 16 M7496 gt Y 078F02 8 1 Card 11 Input 17 M7497 gt Y 078F02 9 1 Card 11 Input 18 M7498 gt Y 078F02 10 Card Input 19 M7499 gt Y 078F02 11 Card Input 20 M7500 gt Y 078F02 12 Card r Input 21 M7501 5Y 078F02 13 Card Input 22 M7502 gt Y 078F02 14 Card Input 23 M7503 5Y 5078F02 15 Card Input 24 M7504 5Y 5078F03 8 M7505 5Y 5078F03 9 M7506 gt Y 078F03 M7507 gt Y 078F03 M7508 5Y 5078F03 1 Card 11 Output 1 yi 0 1 2 M7509 gt Y 078F03 13 4 5 Card 11 Output 2 Card Output Card Output Card Output Card Output Card Output Card Output 1 Card 11 Output 9 1 Card 11 Output 10 Card Output Card Output Card Output Card Output Card Output Card Output 1 Card 11 Output 17 1 Card 11 Output 18 Card Output 19 c Card Output 20 Card Output 21 Card Output 22 Card Output 23 Card Output 24 M7510 gt Y 078F03 M7511 5Y 5078F03 M7512 5Y 5078F04 8 M7513 5Y 5078F04 9 M7514 gt Y
27. 1 0 Card 9 1 018 1 0 Card 9 1 019 1 0 Card 9 1 020 1 0 Card 9 1 021 1 0 Card 9 1 022 1 0 Card 9 1 023 1 0 Card 9 1 024 1 0 Card 9 1 025 1 0 Card 9 1 026 1 0 Card 9 1 027 1 0 Card 9 1 028 1 0 Card 9 1 029 1 0 Card 9 1 030 1 0 Card 9 1 031 1 0 Card 9 1 032 1 0 Card 9 1 033 1 0 Card 9 1 034 1 0 Card 9 1 035 1 0 Card 9 1 036 1 0 Card 9 1 037 1 0 Card 9 1 038 1 0 Card 9 1 039 1 0 Card 9 1 040 1 0 Card 9 1 041 1 0 Card 9 1 042 1 0 Card 9 1 043 1 0 Card 9 1 044 1 0 Card 9 1 045 1 0 Card 9 1 046 1 0 Card 9 1 047 pover on configuration 8 1 0 Card 9 1 000 07 8 1 0 Card 9 1 008 15 8 1 0 Card 9 1 016 23 8 1 0 Card 9 1 024 31 8 1 0 Card 9 1 032 39 8 1 0 Card 9 1 040 47 8 1 0 Card 9 latch inputs 8 1 0 Card 9 as as as as as as byte byte byte byte byte byte control register Appendix C Full Power UMAC M Variable Mappings 86 ACC 11E User Manual Base offset D00000 Low Single bit variables used for accessing I O points ptr IoCard10Pt00 u io D00000 8 1 I O Card 10 1 000 ptr IoCard10Pt01 u io D00000 9 1 I O Card 10 1 001 ptr IoCard10Pt02 u io D00000 10 1 0 Card 10 1 002 ptr IoCard10Pt03 u io D00000 11 1 0 Card 10 1 003 ptr IoCard10Pt04 u io D00000 12 1 I O Card 10 1 004 ptr IoCard10Pt05 u io D00000 13 1 I O Card
28. 1 0 Card Output ptr IoCard1Pt28 u io A0000C 12 1 0 Card Output ptr IoCard1Pt29 u io A0000C 13 1 0 Card Output ptr IoCard1Pt30 u io A0000C 14 1 0 Card Output ptr IoCard1Pt31 gt u io A0000C 15 1 0 Card Output ptr loCard1Pt32 5u io A00010 8 1 1 0 Card Output ptr IoCard1Pt33 gt u io A00010 9 1 1 0 Card Output ptr IoCard1Pt34 u io A00010 10 1 0 Card Output ptr IoCard1Pt35 gt u io A00010 11 1 0 Card Output ptr IoCard1Pt36 gt u io A00010 12 1 0 Card Output ptr IoCard1Pt37 u io A00010 13 1 0 Card Output ptr IoCard1Pt38 gt u io A00010 14 1 0 Card Output ptr IoCard1Pt39 u io A00010 15 I O Card Output ptr IoCard1Pt40 u i0o A00014 8 1 1 0 Card Output ptr IoCard1Pt41 gt u io A00014 9 1 1 0 Card Output ptr IoCard1Pt42 u io A00014 10 1 O Card Output ptr IoCard1Pt43 u io A00014 11 1 0 Card Output ptr IoCard1Pt44 gt u io A00014 12 1 0 Card Output ptr IoCard1Pt45 gt u io A00014 13 1 0 Card Output ptr lIoCard1Pt46 5u io A00014 14 1 0 Card Output ptr IoCard1Pt47 u io A00014 15 1 0 Card Output Byte wide variables used for power on configuration ptr IoCardlReg0 gt u io A00000 8 8 1 O Card Inputs ptr IoCardlRegl gt u io A00004 8 8 1 0 Card Inputs ptr IoCardlReg2 gt u io A00008 8 8 1 0 Card Inputs ptr IoCardlReg3 gt u io A0000C 8 8 1 O Card Output ptr IoCardlReg4 gt u io A00010 8 8 1 O Card Output ptr IoCardlReg5 gt u io
29. 1 009 ptr IoCard12Pt10 u io D00004 26 1 I O Card 12 1 010 ptr IoCard12Pt11 gt u io D00004 27 1 I O Card 12 I O11 ptr IoCard12Pt12 u io D00004 28 1 I O Card 12 1 012 ptr IoCard12Pt13 gt u io D00004 29 1 I O Card 12 1 013 ptr IoCard12Ptl14 u io D00004 30 1 I O Card 12 1 014 ptr IoCard12Pt15 gt u io D00004 31 1 I O Card 12 1 015 ptr IoCard12Pt16 gt u io D00008 24 1 I O Card 12 1 016 ptr IoCard12Pt17 gt u io D00008 25 1 I O Card 12 1 017 ptr IoCard12Pt18 u io D00008 26 1 I O Card 12 1 018 ptr IoCard12Pt19 u io D00008 27 1 I O Card 12 1 019 ptr IoCard12Pt20 u io D00008 28 1 I O Card 12 1 020 ptr IoCard12Pt21 u io D00008 29 1 I O Card 12 1 021 ptr IoCard12Pt22 u io D00008 30 1 I O Card 12 1 022 ptr IoCard12Pt23 u io D00008 31 1 I O Card 12 1 023 ptr IoCard12Pt24 u io D0000C 24 1 I O Card 12 1 024 ptr IoCard12Pt25 u io D0000C 25 1 I O Card 12 1 025 ptr IoCard12Pt26 u io D0000C 26 1 I O Card 12 1 026 ptr IoCard12Pt27 u io D0000C 27 1 I O Card 12 1 027 ptr IoCard12Pt28 u io D0000C 28 1 I O Card 12 1 028 ptr IoCard12Pt29 u io D0000C 29 1 I O Card 12 1 029 ptr IoCard12Pt30 u io D0000C 30 1 I O Card 12 1 030 ptr IoCard12Pt31 u io D0000C 31 1 I O Card 12 1 031 ptr IoCard12Pt32 u io D00010 24 1 I O Card 12 1 032 ptr IoCard12Pt33 u io D00010 25 1 I O Card 12 1 033 ptr IoCard12Pt34 u io D00010 26 1
30. 5Y M7565 5Y M7566 5Y M7567 5Y M7568 5Y M7569 5Y M7570 5Y M7571 5Y M7572 5Y M7573 Y M7574 5Y M7575 5Y 078 078 078 078 078 078 078 078 078 078 078 078 078 078 078 078 078 078 078 078 078 078 078 078 078 078 078 078 078 078 078 078 078 078 078 078 078 078 078 078 078 078 078 078 078 078 078 078 F00 16 F00 17 F00 18 F00 19 F00 20 F00 21 F00 22 F00 23 F01 16 F01 17 F01 18 F01 19 F01 20 F01 21 F01 22 F01 23 F02 16 F02 17 F02 18 F02 19 F02 20 F02 21 F02 22 F02 23 F00 16 F00 17 F00 18 F00 19 F00 20 F00 21 F00 22 F00 23 F01 16 F01 17 F01 18 F01 19 F01 20 F01 21 F01 22 F01 23 F02 16 F02 17 F02 18 F02 19 F02 20 F02 21 F02 22 les used for accessing I O points Card Card Card Card Card Card Card Card Card Card Card Card Card Card Card Card Card Card Card Card Card Card Card Card Card Card Card Card Card Card Card Card Card Card Card Card Card Card Card Card Card Card Card Card Card Card Card F02 23 Card 2 N N N S JS LS NS LS LS B S LS IS LS NS PS LS P S NS NS LNS 10 ES S S LS BN ES PS JS NS PS LS BS LS LS S 10 0 JS S S LS 1 S DN n nput nput nput nput nput nput nput
31. A00014 8 8 1 O Card Output ptr IoCardlReg6 gt u io A00018 8 8 1 O Card latch ptr IoCardlReg7 u i0 A0001C 8 8 1 0 Card contro EA EN EN ER o EN EN 1 O 0 JO OT S OO sN QO JO OT M S QO N ES N N N N OO Oo OO GEO kA EN SE Xo OO 1 OY OT S QO JO UD vs Q N P N N N to BO kA CH 00 07 as byte 08 15 as byte 16 23 as byte s 00 07 as byte s 08 15 as byte S 16 23 as byte inputs l register Appendix C Full Power UMAC M Variable Mappings 78 ACC 11E User Manual Base Offset A00000 Middle Byte Single bit variables used for accessing I O points ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr oCard2Pt00 gt u oCard2Pt01 gt u oCard2Pt02 gt u oCard2Pt03 gt u oCard2Pt04 gt u oCard2Pt05 gt u oCard2Pt06 gt u oCard2Pt07 gt u oCard2Pt08 5u i ro oCard2Pt09 gt u oCard2Pt10 5u i oCard2Pt11 5u 1 oCard2Pt12 5u i oCard2Pt13 gt u i oCard2Pt14 5u i oCard2Pt15 5u i oCard2Pt16 5u i oCard2Ptl17 u i oCard2Pt18 u i oCard2Pt19 5u i oCard2Pt20 5u i oCard2Pt21 5u i oCard2Pt22 5u i oCard2Pt23 5u i oCard2Pt24 5u i oCard2Pt25 5u i oCard2Pt26 5u i oCard2Pt27 5u i oCard2Pt28 5u i oCard2Pt29 gt u i oCard2Pt30 gt u i o
32. ACC 11E User Manual Base Offset B00000 Middle Byte Single bit variables used for accessing I O points ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr oCard5Pt00 u oCard5Pt01 gt u oCard5Pt02 gt u oCard5Pt03 gt u oCard5Pt04 gt u oCard5Pt05 gt u oCard5Pt06 gt u oCard5Pt07 gt u oCard5Pt08 gt u 1 ro oCard5Pt09 gt u oCard5Pt10 gt u li oCcard5Ptll u i oCard5Ptl12 u i oCard5Pt13 gt u i oCard5Pt14 5u i oCard5Pt15 5u i oCard5Pt16 5u i oCard5Pt17 5Su i oCard5Pt18 gt u 1 oCard5Pt19 5u i oCard5Pt20 5u i oCard5Pt21 u i oCard5Pt22 u i oCard5Pt23 u i oCard5Pt24 u i oCard5Pt25 u i oCard5Pt26 5u i oCard5Pt27 u i oCard5Pt28 u i oCard5Pt29 u i oCard5Pt30 u i oCard5Pt31 gt u i oCard5Pt32 gt u i oCard5Pt33 u i oCard5Pt34 u i oCard5Pt35 u i oCard5Pt36 5u i oCard5Pt37 u i oCard5Pt38 u i oCard5Pt39 u i oCard5Pt40 u i oCard5Pt41 5u i oCard5Pt42 5u i oCard5Pt43 u i oCard5Pt44 u i oCard5Pt45 u i oCard5Pt46 u i oCard5Pt47 u i io io aos 10 Lo io quos io Byte wide variables used B00000 16 8 ptr ptr ptr ptr ptr ptr ptr ptr oCard5Reg0 gt u oCard5Regl gt u oCard5Reg2 gt u oCard5Reg3 gt u oCard5Reg4 u oCard5Re
33. ACC 11E with UMAC MACRO Station 43 ACC 11E User Manual Example For the above example using MI69 16 bit transfer to process one ACC 11E over MACRO using I O node 2 the following assignments and PLC program demonstrate the mirroring implementation In 16 bit transfers the middle 16 bit register is split into half inputs and half outputs Because of this outputs must be masked when reading inputs and inputs must be masked when writing outputs define 16In define 8In80ut define 160ut 6In gt X 78421 8 16 8In80ut gt X 78422 8 16 60ut gt X 78423 8 16 define InMirror16 define InMirror8 define OutMirror8 define OutMirror16 define OutState8 define OutStatel6 M4015 M4016 M4017 M4115 M4116 M4117 M4118 M4119 M4120 nMirror16 5X 10F8 8 16 nMirror8 5Y 10F8 8 8 OutMirror8 gt X 10F9 8 16 OutMirror16 5Y 10F9 8 16 OutState8 gt OutStatel6 gt OutState8 0 OutStatel6 0 Open plc 1 cl If InMirror Or InMirror8 8In80ut amp 00FF InMirrorl6 InMirror8 8 EndIf If OutState8 OutMirror8 amp FF00 lear 6 16In 6In n80ut amp 00FF Or OutState 61 OutMirror16 OutState8 OutMirror8s FF00 OutStatel6 OutMirrorl6 81n80ut OutMirror8 amp S FF00 160ut OutMirrorl6 EndIf Close 7 7 M Variable M Variable M Variable I O Node 2 I O Node 2 I O Node 2 M Variable M Variable M Variable M Variable M Variable M Variable Reserve unused Reserve unu
34. Address 78E00 High Byte Single bit variabl M7384 Y M7385 Y M7386 Y M7387 Y M7388 Y M7389 5Y M7390 5Y M7391 gt Y M7392 Y M7393 gt Y M7394 gt Y M7395 Y M7396 gt Y M7397 Y M7398 gt Y M7399 Y M74 M74 M74 M74 M74 M74 M74 M74 M74 M74 M74 M74 M74 M74 M74 M74 M74 M74 M74 M74 M74 M74 M74 M74 M74 M74 M74 M74 M74 M74 M74 M74 Byte wide variables used for M3380 Y M3381 gt Y M3382 gt Y M3383 gt Y M3384 gt Y M3385 gt Y M3386 gt Y M3387 gt Y les used 5078 00 16 Card 078E00 17 Card 078E00 18 Card 078E00 19 Card 078E00 20 Card 078E00 21 Card 078E00 22 Card 078E00 23 Card 5078 01 16 Card 078E01 17 Card 078E01 18 Card 078E01 19 Card 078E01 20 Card 078501 21 Card 078E01 22 Card 078E01 23 Card 078E02 16 Card 078502 17 Card 078E02 18 Card 078E02 19 Card 078E02 20 Card 0785g02 21 Card 078502 22 Card 078E02 23 Card 078E03 16 Card 078E03 17 Card 078E03 18 Card 078E03 19 Card 078E03 20 Card 078E03 21 Card 078E03 22 Card 078E03 23 Card 078E04 16 Card 078E04 17 Card 078E04 18 Card 078E04 19 Card 078E04 20 Card S078F04 21 Card 078E04 22 Card 078E04 23 Card 078E05 16 Card 078E05 17 Card 078E05 18 Card 078E05 19 Card 078E05 20 Card 078E05 21 Card
35. Bit18 Board Bit18 M3329 Y 078C02 3 1 Board Bit13 Board Bit13 M3330 Y 078C02 4 1 Board1_Bit20 Board Bit20 M3331 Y 078C02 5 1 Board DO Board Bit21 M3332 Y 078C02 5 1 Board Bit22 Board Bit22 M3333 Y 078C02 7 1 Board Bit23 Board1 Bit23 M3334 Y 078C03 0 1 Board Bit24 Board Bit24 M3335 Y 078C03 1 1 Board Bit25 Board Bit25 M3336 Y 078C03 2 1 Board1_Bit26 Board Bit26 M3337 Y 078003 3 1 Board Bit27 Board Bit27 M3338 Y 078C03 4 1 Board Bit28 Board1 Bit28 M3339 Y 078C03 5 1 Board Bit28 Board Bit29 M3340 Y 078C03 5 1 Board Bit30 Board Bit30 M3341 Y 078C03 7 1 Board Bit31 Board Bit31 M3342 Y 078C04 0 1 Board Bit32 Board Bit32 M3343 Y 078C04 1 1 Board Bit33 Board Bit33 M3344 Y 078C04 2 1 Board Bit34 Board Bit34 M3345 Y 078004 3 1 Board Bit35 Board Bit35 M3346 Y 078004 4 1 Board1_Bit36 Board Bit36 M3347 Y 078C04 5 1 Board Bit37 Board1 Bit37 M3348 Y 078C04 5 1 Board Bit38 Board Bit38 M3349 Y 078C04 7 1 Board1_Bit39 Board Bit39 M3350 Y 078C05 0 1 Board1_Bit40 Board Bit40 M3351 Y 078C05 1 1 Board1_Bit41 Board Bit41 M3352 Y 078C05 2 1 Board Bit42 Board Bit42 M3353 Y 078C05 3 1 Board Bit43 Board Bit43 M3354 Y 078C05 4 1 Board Bit44 Board Bit44 M3355 Y 078005 5 1 Board1_Bit45 Board Bit45 M3356 Y 078C05 5 1 Board Bit45 Board1 Bit46 M3357 Y 078C05 7 1 Board 8147 Board Bit47 gt Ready 1 NUM Z 65 ACC 11E User Manual APPENDIX B FULL TURBO UMAC M VARIABLE MAPPINGS This a
36. CO CO CO uy CO Q CO yw CO CO ly CO Y CO y ly CO Y CO CO CO CO CO CO CO ly CO CO CO CO ly CO CO CO CO Y CO CO CO CO LJ CO CO nput nput nput nput nput nput nput nput nput nput nput nput nput nput nput nput nput nput nput nput nput nput nput nput Output Output Output Output Output Output Output Output Output Output Output Output Output Output Output Output Output Output Output Output Output Output Output Output 1 Ko OO 1 O OT Gs CO 9 QO JO OT Mm LU N N d NNN LA KO OO JO OU 4 Q N OO 1 OY OT S ho O 20 21 22 23 24 accessing I O points power on configuration I O I O I O I O I O I O 1 0 1 0 Card Card Card Card Card Card Card Card 3 3 3 3 3 3 3 3 I 000 07 as I 008 15 as I 016 23 as I 024 31 as I 032 39 as I 040 47 as latch inputs control regi byte byte byte byte byte byte ster Appendix B Full Turbo UMAC M Variable Mappings ACC 11E User Manual Base Address 78D00 Low Byte Single bit variables used M7144 Y M7145 Y M7146 Y M7147 Y M7148 Y M7149 Y M7150 5Y M7151 gt Y M7152 Y M7153 5Y M7154 Y M7155 Y M7156 5Y M7157 5Y MT7158 5Y M7159 5Y M7160 5Y M7161 5Y M7162 Y M7163 5Y M7164 5Y M7165 Y M7166 5Y M7167 Y M7168 5Y M7169 5Y M7170 5Y M7171 5Y M7172
37. I O Card 046 ptr IoCard11Pt47 gt u io D00014 23 1 I O Card 047 Byte wide variables used for power on configuration ptr IoCard11Reg0 gt u io D00000 16 8 I O Card 000 07 as byte ptr IoCardllRegl u io D00004 16 8 I O Card 008 15 as byte ptr IoCardllReg2 u io D00008 16 8 I O Card 016 23 as byte ptr IoCard11Reg3 gt u io D0000C 16 8 I O Card 024 31 as byte ptr IoCardllReg4 u io D00010 16 8 I O Card 032 39 as byte ptr IoCardllReg5 gt u io D00014 16 8 I O Card 040 47 as byte ptr IoCardl1Reg6 gt u io D00018 16 8 I O Card latch inputs ptr IoCardllReg7 gt u io D0001C 16 8 I O Card control register Appendix C Full Power UMAC M Variable Mappings ACC 11E User Manual Base offset D00000 High Byte Single bit variables used for accessing I O points ptr IoCard12Pt00 u io D00000 24 1 I O Card 12 1 000 ptr IoCard12Pt01 u io D00000 25 1 I O Card 12 1 001 ptr IoCard12Pt02 u io D00000 26 1 I O Card 12 1 002 ptr IoCard12Pt03 u io D00000 27 1 I O Card 12 1 003 ptr IoCard12Pt04 u io D00000 28 1 I O Card 12 1 004 ptr IoCard12Pt05 u io D00000 29 1 I O Card 12 1 005 ptr IoCard12Pt06 u io D00000 30 1 1 0 Card 12 1 006 ptr IoCard12Pt07 u io D00000 31 1 I O Card 12 1 007 ptr IoCard12Pt08 u io D00004 24 1 I O Card 12 1 008 ptr IoCard12Pt09 u io D00004 25 1 I O Card 12
38. M3325 M3326 M3327 M3328 M3329 M3330 M3331 M3332 M3333 M3334 M3335 M3336 M3337 M3338 M3339 M334 M334 M334 M334 M334 M334 M334 M334 M334 cx QO JO 015 QO N ES Input1 5X 0010F0 0 5X 0010F0 1 X 0010F0 2 5X 0010F0 3 X 0010F0 4 X 0010F0 5 X 0010F0 6 X 0010F0 7 5X 0010F0 8 nput2 nput3 nput4 nput5 nput6 nput7 nput8 nput9 nput nput nput nput nput nput nput nput nput nput nput2 nput2 nput2 nput2 nput2 Output Output Output Output Output Output Output Output Output Output Output Output Output Output Output Output Output Output Output Output Output Output Output Output 0 X oX 2 gt X4 3 gt X 4 5X 5 X 6 gt X ox 8 X 9 X 0 X gt X 2 X 3 5X 4 5X 2 5 3 5Y 4 5Y 5 gt Y 6 gt Y T Y 8 Y 9 Y 0 2 Y 9 gt Y 20 5Y 21 lt gt 15 22 gt 215 23 gt Y 24 gt Y 00 00 00 00 00 gt e 3 Y 4 Y 5 5Y 6 gt Y 8 Y 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 500 00 00 00 00 00 0 Ooo CN 1 7 2 OOo EA EHNEN oO EN OM O EA 63 Oooo oo OOD Oo Yx am fri r FO 9 d QO 1 ON Un Mm LU d
39. UMAC Turbo 15 ACC 11E User Manual USING ACC 11E WITH POWER UMAC SCRIPT PROGRAMING The following section describes two software configuration procedures that are needed when using the Power PMAC script programming language 1 Configuring the Control Word 2 Accessing VO data points pointers Configuring the Control Word Write a 7 to the control word which is located at base address 7 n 8 where n 8 if using low byte addressing n 16 if using middle byte addressing n 24 if using high byte addressing The control word must be configured every time the POWER UMAC is powered or reset This can be done in an initialization one that disables itself PLC usually PLC 1 Example Setting up Control Word at Startup for Card at A00000 Low Byte Addressing ptr IoCard0Reg7 gt u io A0001C 8 8 I O Card control register from suggested M Variables open plc 1 IoCard0Reg7 7 disable plc 1 close Example Setting up Control Word at Startup for 3 Cards at Base Address A00000 Low Middle and High Byte Addressing ptr IoCard0Reg7 gt u io A0001C 8 8 I O Card control register from suggested M Variables ptr IoCardlReg7 u io A0001C 16 8 I O Card 1 control register from suggested M Variables ptr IoCard2Reg7 gt u io A0001C 24 8 I O Card 2 control register from suggested M Variables open plc 1 IoCard0Reg7 7 IoCardl1Reg7 7 IoCard2Reg7 7 disable plc 1 close See Appendi
40. base address it is possible to populate a single rack with a maximum Not of 12 Type A accessory cards Populating Rack with Type B Cards Only no conflicts In this mode the card s can potentially use any available Address Populating Rack with Type A amp Type B Cards possible conflicts Typically Type A and Type B cards should not share the same Chip Select however if they do the following rules apply Type A and Type B Feedback Cards Type A cards cannot share the same Chip Select as Type B Feedback cards Addressing and Jumper Settings 11 ACC 11E User Manual e Type A and Type B General I O Cards Type A cards can share the same Chip Select as Type B general VO cards however in this mode Type B cards naturally use the lower byte default and Type A cards must be set to the middle high byte of the selected base address Type A Cards and Type B Analog Cards Type A cards can share the same Chip Select as Type B analog I O cards however in this mode Type B cards naturally use the middle high bytes default and Type A cards must be set to the low byte of the selected base address Addressing and Jumper Settings 12 ACC 11E User Manual USING ACC 11E WITH TURBO UMAC The procedure for using the ACC 11E with Turbo UMAC has two steps 1 Configure the Control Word 2 Accessing I O data points M Variables Configuring the Control Word Write a 7 to the control word which is located at
41. define ON fdefine OFF define ByteSelectLow define ByteSelectMiddle define ByteSelectHigh Assumes that logic high true Assumes that logic low false Lo BO oS void ACC11E SetControlWord unsigned int BaseAddressOffset unsigned int ByteSelect unsigned int ACCIIE GetInputState unsigned int BaseAddressOffset unsigned int ByteSelect unsigned int InputNumber unsigned int ACC11E GetOutputState unsigned int BaseAddressOffset unsigned int ByteSelect unsigned int OutputNumber void 11 SetOutputState unsigned int BaseAddressOffset unsigned int ByteSelect unsigned int OutputNumber unsigned int State Using ACC 11E with Power UMAC 22 ACC 11E User Manual acclle c include lt gplib h gt include lt RtGpShm h gt Global Rt Gp Shared memory pointers include acclle h void ACC11E SetControlWord unsigned int BaseAddressOffset unsigned int ByteSelect x nput BaseAddressOffset 10 Card Base Address offset ByteSelect 1 for lowest 8 bits 2 for middle 8 bits 3 for high 8 bits ControlWord Control word value to which to set the card s Control Word 57 volatile unsigned int ioptr Create 1 0 pointer ioptr piom BaseAddressOffset 4 7 Initialize 1 0 pointer to Control Word register ioptr 7 lt lt 8 ByteSelect Write Control Word value to register return unsigned int ACC11E GetInputState unsigned int BaseAddressOffset unsigned int Byt
42. gt u oCard6Pt21 gt u oCard6Pt22 u oCard6Pt23 u oCard6Pt24 u oCard6Pt25 u oCard6Pt26 u oCard6Pt27 u oCard6Pt28 u oCard6Pt29 u oCard6Pt30 u oCard6Pt3l u oCard6Pt32 u oCard6Pt33 u oCard6Pt34 u oCard6Pt35 u oCard6Pt36 u oCard6Pt37 u oCard6Pt38 u oCard6Pt39 u oCard6Pt40 u oCard6Pt41 gt u oCard6Pt42 u oCard6Pt43 u oCard6Pt44 u oCard6Pt45 u oCard6Pt46 u oCard6Pt47 u io io aos 10 Lo io quos io io ro io io 10 io io io io io io io Toz io io ro io io io Toz 10 Lo io qos ro io ro io 103 10 dos io io io io ios io Lo io io B00000 24 B00000 25 B00000 26 B00000 27 B00000 28 B00000 29 B00000 30 B00000 31 B00004 24 B00004 25 B00004 26 B00004 27 B00004 28 B00004 29 B00004 30 B00004 31 B00008 24 B00008 25 B00008 26 B00008 27 B00008 28 B00008 29 B00008 30 B00008 31 580000 24 B0000C 25 B0000C 26 B0000C 27 B0000C 28 B0000C 29 B0000C 30 B0000C 31 0 24 B000 B000 B000 B000 B000 B000 B000 B000 B000 B000 B000 B000 B000 B000 B000 B000 Byte wide variables used ptr ptr ptr ptr ptr ptr ptr ptr oCard6Reg0 gt u oCard6Regl gt u oCard6Reg2 gt u oCard6Reg3 u oCard6Reg4 u oCard6Reg5 u oCard6Reg6 u oCard6Reg7 gt u io io LOS lo
43. loCard1Pt00 5u io A00000 8 1 1 0 Card nput ptr IoCard1Pt01 gt u io A00000 9 1 1 0 Card nput ptr IoCard1Pt02 gt u io A00000 10 1 0 Card nput ptr IoCard1Pt03 gt u io A00000 11 1 0 Card nput ptr IoCard1Pt04 gt u io A00000 12 1 0 Card nput ptr IoCard1Pt05 u io A00000 13 I O Card nput ptr IoCard1Pt06 u io A00000 14 1 0 Card nput ptr IoCard1Pt07 u io A00000 15 1 0 Card nput ptr loCard1Pt08 5u io A00004 8 1 1 0 Card nput ptr IoCardlPt09 u io A00004 9 1 1 0 Card nput ptr IoCard1Pt10 gt u io A00004 10 1 0 Card nput ptr lIoCard1Pt11 5u io A00004 11 1 0 Card nput ptr IoCard1Pt12 gt u io A00004 12 1 0 Card nput ptr IoCard1Pt13 gt u io A00004 13 1 0 Card nput ptr IoCard1Pt14 gt u io A00004 14 1 0 Card nput ptr IoCard1Pt15 gt u io A00004 15 1 0 Card nput ptr loCard1Pt16 5u io A00008 8 1 1 0 Card nput ptr IoCard1Pt17 gt u io A00008 9 1 1 0 Card nput ptr IoCard1Pt18 gt u io A00008 10 1 0 Card nput ptr IoCard1Pt19 gt u io A00008 11 1 0 Card nput ptr IoCard1Pt20 gt u io A00008 12 1 0 Card nput ptr IoCard1Pt21 gt u io A00008 13 1 0 Card nput ptr IoCard1Pt22 gt u io A00008 14 1 0 Card nput ptr IoCard1Pt23 gt u io A00008 15 1 0 Card nput ptr IoCard1Pt24 u io A0000C 8 1 1 0 Card Output ptr IoCard1Pt25 u io A0000C 9 1 1 0 Card Output ptr IoCard1Pt26 u io A0000C 10 1 0 Card Output ptr IoCard1Pt27 u io A0000C 11
44. nput nput nput nput nput nput nput nput nput nput nput nput nput nput nput nput nput Outpu Outpu Outpu Outpu Outpu Outpu Outpu Outpu Outpu Outpu Outpu Outpu Outpu Outpu Outpu Outpu Outpu Outpu Outpu Outpu Outpu Outpu Outpu Outpu 1 Ko OO 73004 LU 9 QO JO O vs LU M k O N 21 N NO Ri Q t t t t t t t t t t t t E E E t t 20 tl t 22 t 23 t 24 O OO 30704 WN AANA OT 4 ho O Byte wide variables used for configuration 78F00 16 8 U 78F01 16 8 U 78F02 16 8 U 78F03 16 8 U 78F04 16 8 U 78F05 16 8 U 78F06 16 8 U 78F07 16 8 U M3410 Y M3411 gt Y M3412 gt Y M3413 Y M3414 gt Y M3415 Y M3416 Y M3417 5Y 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 Card Card Card Card Card Card Card Card 12 12 12 12 12 12 12 12 1 000 07 1 008 15 1 016 23 1 024 31 1 032 39 1 040 47 latch inputs as as as as as as byte byte byte byte byte byte control registe Appendix B Full Turbo UMAC M Variable Mappings 77 ACC 11E User Manual APPENDIX C FULL POWER UMAC M VARIABLE MAPPINGS This appendix provides suggested M Variables for all twelve possible ACC 11E addressing settings Base Offset A00000 Low Byte Single bit variables used for accessing I O points ptr
45. oCard7Reg5 u oCard7Reg6 u oCard7Reg7 u io io LOS 10 zo io io Lo for pover on C00000 8 8 1 0 C00004 8 8 1 0 C00008 8 8 1 0 C0000C 8 8 1 0 C00010 8 8 1 0 C00014 8 8 1 0 C00018 8 8 1 0 C0001C 8 8 1 0 Card 7 1 002 Card 7 1 003 Card 7 1 004 Card 7 1 005 Card 7 1 006 Card 7 1 007 Card 7 1 008 Card 7 1 009 Card 7 1 010 Card 7 1 011 Card 7 1 012 Card 7 1 013 Card 7 1 014 Card 7 1 015 Card 7 1 016 Card 7 1 017 Card 7 1 018 Card 7 1 019 Card 7 1 020 Card 7 1 021 Card 7 1 022 Card 7 1 023 Card 7 1 024 Card 7 1 025 Card 7 1 026 Card 7 1 027 Card 7 1 028 Card 7 1 029 Card 7 1 030 Card 7 1 031 Card 7 1 032 Card 7 1 033 Card 7 1 034 Card 7 1 035 Card 7 1 036 Card 7 1 037 Card 7 1 038 Card 7 1 039 Card 7 1 040 Card 7 1 041 C00000 9 1 1 0 Card 7 1 001 C00000 10 1 1 0 C00000 11 1 1 0 C00000 12 1 1 0 C00000 13 1 1 0 C00000 14 1 1 0 C00000 15 1 1 0 C00004 8 1 1 0 C00004 9 1 1 0 C00004 10 1 1 0 C00004 11 1 1 0 C00004 12 1 1 0 C00004 13 1 1 0 C00004 14 1 1 0 C00004 15 1 1 0 C00008 8 1 1 0 C00008 9 1 1 0 C00008 10 1 1 0 C00008 11 1 1 0 C00008 12 1 1 0 C00008 13 1 1 0 C00008 14 1 1 0 C00008 15 1 1 0 C0000C 8 1 1 0 C0000C 9 1 1 0 C0000C 10 1 1 0 C0000C 11 1 1 0 C0000C 12 1 1 0 C0000C 13 1
46. to C Language Background Programs acclle controlword and then right click on the 11 controlword folder name and select Properties Then in the Properties tab under CPLC Startup Option put a 1 without the quotation marks into the field next to the parameter Run at startup see the screenshot below Using ACC 11E with Power UMAC 28 ACC 11E User Manual Solution Explorer Solution Multithread gt 1 X tE acc11e controlword Folder Properties Ezel Solution MultithreadedIO 1 project ES C Multithreaded10 192 168 0 200 o Ey C Language gt rt opt Ey Background Programs 1 zy accl1e controlword B Mis Le acclle c Folder Name acc11e controlword W acclle h acclle controlword c Remember to put acc11e c and acc11e h from the previous section into the same folder as this BGCPLC in order to run it properly See Appendix for control word details and explanations fN Note Using ACC 11E with Power UMAC 29 ACC 11E User Manual USING ACC 11E WITH UMAC MACRO STATION Setting up an ACC 11E on a MACRO station requires the following steps e Establishing communication with the MACRO Station and enabling nodes Covered in alternate documentation i e MACRO16 CPU User Manual e Setting up the control word e Transferring data over I O Nodes Quick Review Nodes and Addressing MACRO Station Ring Controller
47. 0 47 as byte ptr IoCardl10Reg 6 gt u io D00018 8 8 I O Card 10 latch inputs ptr IoCardl0Reg7 u io D0001C 8 8 I O Card 10 control register Appendix C Full Power UMAC M Variable Mappings ACC 11E User Manual Base Offset D00000 Middle Byte Single bit variables used for accessing 1 0 points ptr IoCard11Pt00 gt u io D00000 16 1 I O Card 000 ptr IoCard11Pt01 gt u io D00000 17 1 I O Card 001 ptr IoCard11Pt02 gt u io D00000 18 1 I O Card 002 ptr ToCard11Pt03 gt u io D00000 19 1 I O Card 003 ptr IoCard11Pt04 gt u io D00000 20 1 I O Card 004 ptr IoCard11Pt05 gt u io D00000 21 1 I O Card 005 ptr IoCard11Pt06 gt u io D00000 22 1 I O Card 006 ptr IoCard11Pt07 gt u io D00000 23 1 I O Card 007 ptr IoCard11Pt08 gt u io D00004 16 1 I O Card 008 ptr IoCard11Pt09 gt u io D00004 17 1 I O Card 009 ptr IoCard11Pt10 gt u io D00004 18 1 I O Card 010 ptr IoCard11Pt11 gt u io D00004 19 1 I O Card 011 ptr IoCard11Pt12 gt u io D00004 20 1 I O Card 012 ptr IoCard11Pt13 gt u io D00004 21 1 I O Card 013 ptr IoCard11Pt14 gt u io D00004 22 1 I O Card 014 ptr IoCard11Pt15 gt u io D00004 23 1 I O Card 015 ptr IoCard11Pt16 gt u io D00008 16 1 I O Card 016 ptr IoCard11Pt17 gt u io D00008 17 1 I O Card 017 ptr IoCard11Pt18 gt u io D00008 18 1 I O Card 018 ptr IoCard11Pt19 gt u io D00008 19 1 I O Card 019 ptr IoCard11P
48. 000 07 8 1 0 Card 8 1 008 15 8 1 0 Card 8 1 016 23 8 1 0 Card 8 1 024 31 8 1 0 Card 8 1 032 39 8 1 0 Card 8 1 040 47 8 1 0 Card 8 latch inputs 8 1 0 Card 8 byte byte byte byte byte byte control register Appendix C Full Power UMAC M Variable Mappings 85 ACC 11E User Manual Base Offset C00000 High Byte Single bit variables used for accessing 1 0 ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr oCard9Pt00 gt u oCard9Pt01 gt u oCard9Pt02 gt u oCard9Pt03 gt u oCard9Pt04 u i oCard9Pt05 u i oCard9Pt06 u i oCard9Pt07 u i oCard9Pt08 u i oCard9Pt09 u i oCard9Ptl0 u i oCard9Ptll u i oCard9Pt12 u i oCard9Pt13 gt u i oCard9Ptl4 u i oCard9Pt15 5u i oCard9Pt16 5u i oCard9Pt17 gt u li oCard9Pt18 u i oCard9Pt19 gt u 1 oCard9Pt20 u i oCard9Pt21 u i oCard9Pt22 u i oCard9Pt23 u i oCard9Pt24 u i oCard9Pt25 u i oCard9Pt26 u i oCard9Pt27 u i oCard9Pt28 5u i oCard9Pt29 u i oCard9Pt30 u i oCard9Pt31 5u i oCard9Pt32 u i oCard9Pt33 u i oCard9Pt34 u i oCard9Pt35 u i oCard9Pt36 u i oCard9Pt37 u i oCard9Pt38 u i oCard9Pt39 u i oCard9Pt40 u i oCard9Pt41 5u i oCard9Pt42 5u i oCard9Pt43 u i oCard9Pt44 u i oCard9Pt45 u i
49. 0010 15 B00014 8 1 Eb 5 00014 9 1 B00014 10 B00014 11 77 B00014 12 B00014 13 B00014 14 B00014 15 power on B00000 8 8 B00004 8 8 B00008 8 8 B0000C 8 8 B00010 8 8 B00014 8 8 B00018 8 8 B0001C 8 8 O Card 4 000 O Card 4 001 4 002 4 003 4 004 4 005 O Card 4 006 0 Card 4 007 O Card 4 1 008 O Card 4 009 O Card 4 010 O Card 4 011 4 1 012 4 013 4 014 4 1 015 4 1 016 4 017 4 018 4 1 019 4 020 4 021 O Card 4 1 022 0 Card 4 023 O Card 4 024 0 Card 4 025 O Card 4 026 O Card 4 027 O Card 4 028 O Card 4 029 0 Card 4 030 0 Card 4 031 0 Card 4 032 O Card 4 1 033 O Card 4 034 O Card 4 035 O Card 4 036 O Card 4 037 0 Card 4 038 0 Card 4 039 O Card 4 1 040 O Card 4 041 O Card 4 042 O Card 4 043 O Card 4 044 O Card 4 045 O Card 4 046 O Card 4 1 047 configuration O Card 4 I 000 07 as byte O Card 4 1 008 15 as byte O Card 4 1 016 23 as byte O Card 4 1 024 31 as byte O Card 4 1 032 39 as byte O Card 4 1 040 47 as byte O Card 4 latch inputs O Card 4 control register Appendix C Full Power UMAC M Variable Mappings 81
50. 078F04 10 M7515 gt Y 078F04 11 M7516 gt Y 078F04 12 M7517 gt Y 078F04 13 4 5 QO OT vs CO M7518 gt Y 078F04 M7519 gt Y 078F04 M7520 gt Y 078F05 8 M7521 gt Y 078F05 9 M7522 gt Y 078F05 10 M7523 gt Y 078F05 11 M7524 gt Y 078F05 12 M7525 gt Y 078F05 13 4 5 OY OT is QO N P M7526 gt Y 078F05 M7527 gt Y 078F05 Byte wide variables used for power on configuration M3400 gt Y 78F00 8 8 U 1 0 Card 11 1 000 07 as byte M3401 gt Y 78F01 8 8 U 1 0 Card 11 1 008 15 as byte M3402 5Y 78F02 8 8 U 1 0 Card 11 1 016 23 as byte M3403 gt Y 78F03 8 8 U 1 0 Card 11 1 024 31 as byte M3404 gt Y 78F04 8 8 U 1 0 Card 11 1 032 39 as byte M3405 gt Y 78F05 8 8 U 1 0 Card 11 1 040 47 as byte M3406 gt Y 78F06 8 8 U 1 0 Card 11 latch inputs M3407 5Y 78F07 8 8 U 1 0 Card 11 control register Appendix B Full Turbo UMAC M Variable Mappings ACC 11E User Manual Base Address 78F00 High Byte Single bit variabl M7528 Y M7529 Y M7530 Y M7531 Y M7532 Y M7533 Y M7534 Y M7535 Y M7536 5Y M7537 Y M7538 Y M7539 Y M7540 Y M7541 5Y M7542 5Y M7543 5Y M7544 gt Y M7545 Y M7546 Y M7547 Y M7548 Y M7549 Y MT550 5Y M75SI Y M7552 Y M7553 gt Y M7554 Y M7555 Y M7556 Y M7557 Y 7558 M7559 5Y M7560 Y M7561 5Y M7562 5Y M7563 5Y M7564
51. 0F8 17 define Output3 M3627 Output3 gt Y 0010F8 18 define Output4 M3628 Output4 5Y 0010F8 19 define Output5 M3629 Output5 gt Y 0010F8 20 define Output6 M3630 Output6 gt Y 0010F8 21 define Output7 M3631 Output7 5Y 0010F8 22 define Output8 M3632 Output8 5Y 0010F8 23 define Output9 M3633 Output9 5X 0010F9 8 3rd 16 bit register define Output10 M3634 Outputl0 X 0010F9 9 define Output11 M3635 Output11 5X 0010F9 10 define Output12 M3636 Output12 5X 0010F9 11 define Output13 M3637 Output13 5X 0010F9 12 define Output14 M3638 Output14 5X 0010F9 13 define Output15 M3639 Output15 5X 0010F9 14 define Output16 M3640 Output16 5X 0010F9 15 define Output17 M3641 Output17 5X 0010F9 16 define Output18 M3642 Output18 5X 0010F9 17 define Output19 M3643 Output19 5X 0010F9 18 define Output20 M3644 Output20 5X 0010F9 19 define Output21 M3645 Output21 5X 0010F9 20 define Output22 M3646 Output22 5X 0010F9 21 define Output23 M3647 Output23 5X 0010F9 22 define Output24 M3648 Output24 5X 0010F9 23 Using ACC 11E with UMAC MACRO Station ACC 11E User Manual MSfanynode MI171 MI172 and MI173 24 Bit 16 Bit Transfer This method of transfer is not commonly used with an ACC 11E and is therefore covered more briefly With this method three ACC 11E cards make full use of only two I O nodes Note that if less than three cards are used nodes will be otherwise unusable MSifanynode M1171 172 173 processes 24 bit and 16 bit re
52. 0Pt31 u io D0000C 15 1 0 Card 10 1 031 ptr IoCard10Pt32 gt u io D00010 8 1 I O Card 10 1 032 ptr IoCard10Pt33 gt u io D00010 9 1 1 0 Card 10 1 033 ptr IoCard10Pt34 gt u io D00010 10 1 I O Card 10 1 034 ptr ToCard10Pt35 gt u io D00010 11 1 I O Card 10 1 035 ptr IoCard10Pt36 gt u io D00010 12 1 I O Card 10 1 036 ptr IoCard10Pt37 gt u io D00010 13 1 I O Card 10 1 037 ptr IoCard10Pt38 u io D00010 14 1 I O Card 10 1 038 ptr IoCard10Pt39 u io D00010 15 1 I O Card 10 1 039 ptr ToCard10Pt40 gt u io D00014 8 1 I O Card 10 1 040 ptr ToCard10Pt41 gt u io D00014 9 1 I O Card 10 1 041 ptr IoCard10Pt42 u io D00014 10 1 I O Card 10 1 042 ptr IoCard10Pt43 u io D00014 11 1 I O Card 10 1 043 ptr IoCard10Pt44 u io D00014 12 1 I O Card 10 1 044 ptr IoCard10Pt45 u io D00014 13 1 I O Card 10 1 045 ptr IoCard10Pt46 u io D00014 14 1 I O Card 10 1 046 ptr IoCard10Pt47 u io D00014 15 1 I O Card 10 1 047 Byte wide variables used for power on configuration ptr ToCard10Reg0 gt u io D00000 8 8 I O Card 10 1 000 07 as byte ptr ToCard10Regl gt u io D00004 8 8 I O Card 10 1 008 15 as byte ptr IoCard10Reg2 u io D00008 8 8 I O Card 10 1 016 23 as byte ptr loCard10Reg3 5u io D0000C 8 8 I O Card 10 1 024 31 as byte ptr loCard10Reg4 5u io D00010 8 8 I O Card 10 1 032 39 as byte ptr IoCardl10Reg5 gt u i0 D00014 8 8 I O Card 10 1 04
53. 1 0 C0000C 14 1 1 0 C0000C 15 1 1 0 C00010 8 1 1 0 C00010 9 1 1 0 C00010 10 1 1 0 C00010 11 1 1 0 C00010 12 1 1 0 C00010 13 1 1 0 C00010 14 1 1 0 C00010 15 1 1 0 C00014 8 1 1 0 C00014 9 1 1 0 C00014 10 1 1 0 C00014 11 1 1 0 C00014 12 1 1 0 C00014 13 1 1 0 C00014 14 1 1 0 C00014 15 1 1 0 byte byte byte byte byte byte Card 7 1 042 Card 7 1 043 Card 7 1 044 Card 7 1 045 Card 7 1 046 Card 7 1 047 configuration Card 7 1 000 07 as Card 7 1 008 15 as Card 7 1 016 23 as Card 7 1 024 31 as Card 7 1 032 39 as Card 7 1 040 47 as Card 7 latch inputs Card 7 control register Appendix C Full Power UMAC M Variable Mappings 84 ACC 11E User Manual Base Offset C00000 Middle Byte Single bit variables used for accessing 1 0 ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr oCard8Pt00 gt u oCard8Pt01 gt u oCard8Pt02 gt u oCard8Pt03 gt u oCard8Pt04 gt u oCard8Pt05 gt u oCard8Pt06 gt u oCard8Pt07 gt u oCard8Pt08 gt u oCard8Pt09 u oCard8Pt10 gt u oCard8Pt11 gt u oCard8Pt12 gt u oCard8Pt13 gt u oCard8Pt14 gt u oCard8Pt15 gt u oCard8Pt16 gt u oCard8Pt17 gt u oCard8Pt18 gt u oCard
54. 1 029 O Card 3 1 030 O Card 3 1 031 O Card 3 1 032 O Card 3 1 033 O Card 3 1 034 ZQ Card 3 I 035 O Card 3 1 036 O Card 3 1 037 O Card 3 1 038 O Card 3 1 039 O Card 3 1 040 O Card 3 1 041 O Card 3 1 042 O Card 3 1 043 O Card 3 1 044 O Card 3 1 045 O Card 3 1 046 O Card 3 1 047 configuration O Card 3 1 000 07 as byte O Card 3 1 008 15 as byte O Card 3 1 016 23 as byte O Card 3 1 024 31 as byte O Card 3 1 032 39 as byte O Card 3 1 040 47 as byte O Card 3 latch inputs O Card 3 control register Appendix C Full Power UMAC M Variable Mappings 80 ACC 11E User Manual Base Offset B00000 Low Byte Single bit variables used for accessing I O points Pt00 u Pt01 gt u Pt02 gt u Pt03 gt u Pt04 gt u Pt05 gt u Pt06 gt u Pt07 u ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr oCard4 oCard4 oCard4 oCard4 oCard4 oCard4 oCard4 oCard4 oCard4 oCard4 oCard4 oCard4 oCard4 oCard4 oCard4 oCard4 oCard4 oCard4 oCard4 oCard4 oCard4 oCard4 oCard4 oCard4 oCard4 oCard4 oCard4 oCard4 oCard4 oCard4 oCard4 oCard4 oCard4 oCard4 oCard4 oCard4 oCard4 oCard4 oCard4 oCard4 oCard4 oCard4 oCard4 oCard4 oCard4 oCard4 oCard4 oCard4 Pt08 u i ro
55. 10 1 005 ptr IoCard10Pt06 u io D00000 14 1 0 Card 10 1 006 ptr IoCard10Pt07 u io D00000 15 1 0 Card 10 1 007 ptr IoCard10Pt08 u io D00004 8 1 I O Card 10 1 008 ptr IoCard10Pt09 u io D00004 9 1 I O Card 10 1 009 ptr IoCard10Pt10 u io D00004 10 1 0 Card 10 1 010 ptr IoCard10Pt11 gt u io D00004 11 1 0 Card 10 1 011 ptr IoCard10Pt12 gt u i0 D00004 12 1 0 Card 10 1 012 ptr IoCard10Pt13 u io D00004 13 1 I O Card 10 1 013 ptr IoCard10Pt14 gt u io D00004 14 1 0 Card 10 1 014 ptr IoCard10Pt15 u io D00004 15 1 0 Card 10 1 015 ptr IoCard10Pt16 gt u io D00008 8 1 I O Card 10 1 016 ptr IoCard10Pt17 gt u 10 D00008 9 1 I O Card 10 1 017 ptr IoCard10Pt18 u io D00008 10 1 0 Card 10 1 018 ptr IoCard10Pti19 u io D00008 11 1 0 Card 10 1 019 ptr IoCard10Pt20 gt u io D00008 12 1 I O Card 10 1 020 ptr IoCard10Pt21 u io D00008 13 1 I O Card 10 1 021 ptr IoCard10Pt22 u io D00008 14 1 I O Card 10 1 022 ptr IoCard10Pt23 u io D00008 15 1 I O Card 10 1 023 ptr IoCard10Pt24 u io D0000C 8 1 I O Card 10 1 024 ptr IoCard10Pt25 u io D0000C 9 1 I O Card 10 1 025 ptr IoCard10Pt26 u io D0000C 10 1 0 Card 10 1 026 ptr IoCard10Pt27 u io D0000C 11 1 0 Card 10 1 027 ptr IoCard10Pt28 gt u io D0000C 12 1 I O Card 10 1 028 ptr IoCard10Pt29 u io D0000C 13 1 I O Card 10 1 029 ptr IoCard10Pt30 u io D0000C 14 1 0 Card 10 1 030 ptr IoCard1
56. 16 8 Inputs 1 8 Y 078C01 0 8 Inputs 9 16 Y 078C01 16 8 Inputs 9 16 Y 078C02 0 8 Inputs 17 24 Y 078C02 16 8 Inputs 17 24 Y 078C03 0 8 Outputs 1 8 Y 078C03 16 8 Outputs 1 8 Y 078C04 0 8 Y 078C05 0 8 Outputs 9 16 Outputs 17 24 Y 078C04 16 8 Y 078C05 16 8 Outputs 9 16 Outputs 17 24 Example Bitwise M Variable mapping for ACC 11E at base address 78C00 using low bytes define Inputl M7000 nputl Y 078000 0 define Input2 M7001 nput2 Y 078C00 1 define Input3 M7002 nput3 gt Y 078C00 2 define Input4 M7003 nput4 gt Y 078C00 3 define Input5 M7004 nput5 gt Y 078C00 4 define Input6 M7005 nput Y 078000 5 define Input7 M7006 nput7 gt 078C00 6 define Input8 M7007 nput8 gt Y 078C00 7 define Input9 M7008 nput9 gt Y 078C01 0 define Input10 M7009 nput10 5Y 6078C01 1 define Input11 M7010 nputll gt Y 078C01 2 define Input12 M7011 nput12 5Y 5078C01 3 define Input13 M7012 nputl3 gt Y 078C001 4 define Input14 M7013 nput14 5Y 5 5078C01 5 define Input15 M7014 nput15 Y 5078C01 6 define Input16 M7015 nput16 5Y 078C01 7 define Input17 M7016 nput17 5Y 5078C02 0 define Input18 M7017 nputli8 2Y 078C02 1 define Input19 M7018 nput19 5Y 5078C02 2 define Input20 M7019 nput20 Y 078C02 3 define Input2 M7020 nput21 gt Y 078C02 4 define Input22 M7021 nput22 gt Y 078C02 5 define Input23 M7022 nput23 5Y 5078C02 6 define Input24 M7023 nput24 gt Y
57. 2 Et LA 27 PS2705 1NE 1 038 ACIN1 C1 hy ACIN2 El 27 PS2705 1NEC ac lad lal l 1 039 ac 01 A Et RP76 470 9 8 7 6 5 4 3 2 llel e col ro gt GND V JUMP 1 0 2 FOR SINKING OUTPUT JUMP 2 T0 3 SE ULN2803A FOR SINKING OUTPUTS USE UDN2981A FOR SOURCING OUTPUTS NOTE E20 E21 MUST NUMBER IN THE SAME DIRECTION FOR SOURCING QUTPUT C45 220 y D29 1SMC33AT3 F3 o o 10A 30 527051 1 040 ACIN1 C1 ACIN2 El i30 PS2705 NEC 1 041 ACINI C1 Hi ACIN2 E1 30 PS2705 1NEC ULN2803A OR UDN2981A IN SOCKET RP78 d An Se 1 042 ACIN1 01 4 ACIN2 Et n 1 30 PS2705 1 1 043 ACIN1 C1 ACIN2 El 1 044 ACIN1 C1 EC 42 3 31 PS2705 1NEC 14 ACIN2 Ei B31 PS27051NEC 1 045 ACIN1 C1 y ACIN2 Ei LA 31 PS2705 1NE 1 046 acini 01 2 4 ACIN2 El 31 PS2705 1NEC mac I e lal mc Fc Ise rojo 1 047 4 ACIN C1 ACIN2 El Schematics
58. 22 O Card 5 1 023 O Card 5 1 024 O Card 5 1 025 O Card 5 1 026 O Card 5 1 027 O Card 5 1 028 O Card 5 1 029 O Card 5 1 030 O Card 5 1 031 O Card 5 1 032 O Card 5 1 033 O Card 5 1 034 ZQ Card 5 1 035 O Card 5 1 036 O Card 5 1 037 O Card 5 1 038 O Card 5 1 039 O Card 5 1 040 O Card 5 1 041 O Card 5 1 042 O Card 5 1 043 O Card 5 1 044 O Card 5 1 045 O Card 5 1 046 O Card 5 1 047 configuration O Card 5 1 000 07 as byte O Card 5 1 008 15 as byte O Card 5 1 016 23 as byte O Card 5 1 024 31 as byte O Card 5 1 032 39 as byte O Card 5 1 040 47 as byte O Card 5 latch inputs O Card 5 control register Appendix C Full Power UMAC M Variable Mappings 82 ACC 11E User Manual Base Offset B00000 High Byte Single bit variables used for accessing 1 0 points ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr oCard6Pt00 u oCard6Pt01 gt u oCard6Pt02 gt u oCard6Pt03 gt u oCard6Pt04 gt u oCard6Pt05 gt u oCard6Pt06 u oCard6Pt07 u oCard6Pt08 u oCard6Pt09 u oCard6Ptl0 u oCard6Pt11 gt u oCard6Pt12 gt u oCard6Pt13 gt u oCard6Pt14 gt u oCard6Pt15 gt u oCard6Pt16 gt u oCard6Pt17 gt u oCard6Pt18 gt u oCard6Pt19 gt u oCard6Pt20
59. 3 Card 78D00 16 8 U 78D01 16 8 U 78D02 16 8 U 78D03 16 8 U 78D04 16 8 U 78D05 16 8 U 78D06 16 8 U 78D07 16 8 U for 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 nput nput nput nput nput nput nput nput nput nput nput nput nput nput nput nput nput nput nput nput nput nput nput nput Output Output Output Output Output Output Output Output Output Output Output Output Output Output Output Output Output Output Output Output Output Output Output Output power on configuration 1 O 1 O 1 O 1 O 1 O 1 O 1 O 1 O 1 Ko OO 1 O OT Gs CO 9 QO JO OT Mm LU N N d NNN LA KO OO JO OU 4 Q N OO 1 OY OT S ho O 20 21 22 23 24 Card Card Card Card Card Card Card Card 6 6 6 6 6 6 6 6 accessing I O points 1 000 07 1 008 15 1 016 23 1 024 31 1 032 39 1 040 47 latch inputs as as as as as as byte byte byte byte byte byte control register Appendix B Full Turbo UMAC M Variable Mappings 71 ACC 11E User Manual Base Address 78E00 Low Byte Single bit variables used for accessing I O points M7288 5Y M7289 5Y M7290 5Y M
60. 7291 gt Y M7292 Y M7293 5Y M7294 5Y MT295 5Y M7296 5Y M7297 5Y M7298 5Y M7299 gt Y M7300 gt Y M7301 gt Y M7302 Y M7303 5Y M7304 5Y M7305 5Y M7306 5Y M7307 5Y M7308 5Y M7309 Y M7310 5Y M7311 gt Y M7312 Y M7313 gt Y M7314 gt Y M7315 Y M7316 Y M7317 Y M7318 gt Y M7319 5Y M7320 5Y M7321 gt Y M7322 Y M7323 gt Y M7324 gt Y M7325 gt Y M7326 5Y M7327 5Y M7328 5Y M7329 5Y M7330 5Y M7331 gt Y M7332 5Y M7333 5Y M7334 gt Y M7335 Y Byte wide variabl M3360 gt Y M3361 gt Y M3362 gt Y M3363 gt Y M3364 gt Y M3365 gt Y M3366 gt Y M3367 gt Y 078E00 0 078E00 1 078E00 2 078500 3 078E00 4 078E00 5 078E00 6 078E00 7 078E01 0 078E01 1 5078 01 2 078501 3 078E01 4 5078801 5 078E01 6 078E01 7 0785E02 0 078E02 1 078E02 2 078E02 3 078E02 4 078E02 5 078E02 6 078E02 7 078E03 0 078E03 1 078E03 2 078503 3 078E03 4 078503 5 078E03 6 078E03 7 078E04 0 078E04 1 078E04 2 078E04 3 078E04 4 S078E04 5 078E04 6 078E04 7 5078805 0 0785E05 1 078505 2 078E05 3 0785E05 4 078E05 5 078E05 6 0785E05 7 78E00 0 8 U 78E01 0 8 U 78E02 0 8 U 78E03 0 8 U 78E04 0 8 U 78E05 0 8 U 78E06 0 8 U 78E07 0 8 U Card 7 Card 7 Card Card Card Card Card Card Card Card Card Card
61. 88C7 8 8 98 54888 7 High Y 88C7 16 8 MI198 5088C7 CS16 Cannot be used with legacy MACRO16 CPU s rev 100 104 Note MI198 and 99 can be written to directly from the Pewin32Pro2 STE terminal window However their values are not saved and should be executed in a startup PLC Note Using ACC 11E with UMAC MACRO Station 33 ACC 11E User Manual Example Writing control words for two ACC 11E cards set to base addresses 8800 0 8 and 8800 8 8 Open PLC Clear 15 1000 8388608 110 while CMD MS0 MI198 408807 CMD MS0 MI199 07 15 50 8388608 110 while I5 CMD MS0 MI198 488807 CMD MS0 MI199 07 5 1150 endw l sec delay Set control word for first ACC 11E at 8800 low byte addresses Write 07 into Y 8807 0 8 control word gt 0 endw 50 msec delay Set control word for second ACC 11E at 8800 mid byte addresses Write 07 into Y 8807 8 8 control word I5 50 8388608 110 while 15111 gt 0 endw 50 msec delay Disable PLC 1 Close ELS See appendix for further control word details Note Using ACC 11E with UMAC MACRO Station 34 ACC 11E User Manual Transferring Data Points over I O Nodes This section illustrates how I O data is transferred from ACC 11E 88XX registers thru I O nodes COXX and finally to the ring controller 7X XXX for user access using M Variable pointers been established and that the user is familiar wi
62. 8Pt19 gt u oCard8Pt20 gt u oCard8Pt21 gt u oCard8Pt22 gt u oCard8Pt23 gt u oCard8Pt24 gt u oCard8Pt25 gt u oCard8Pt26 gt u oCard8Pt27 u oCard8Pt28 u oCard8Pt29 u oCard8Pt30 u oCard8Pt31 gt u oCard8Pt32 u oCard8Pt33 gt u oCard8Pt34 u oCard8Pt35 gt u oCard8Pt36 gt u oCard8Pt37 u oCard8Pt38 u oCard8Pt39 u oCard8Pt40 u oCard8Pt41 gt u oCard8Pt42 u oCard8Pt43 u oCard8Pt44 u oCard8Pt45 u oCard8Pt46 gt u oCard8Pt47 u io io Lo io 101 io io ro io ro io 163 Los io io io io io io io TOS io io io io io io ro io Lo io qos io io ro io 163 io OS ro io io io io io LOS io C000 io C00000 C00000 C00000 C00000 C00000 C00000 C00000 C00000 C00004 C00004 C00004 C00004 C00004 C00004 C00004 C00004 C00008 C00008 C00008 C00008 C00008 C00008 C00008 C00008 C0000C C0000C C0000C C0000C C0000C C0000C C0000C C0000C 0 C000 C000 C000 C000 C000 C000 C000 C000 C000 C000 C000 C000 C000 C000 C000 Byte wide variables used ptr ptr ptr ptr ptr ptr ptr ptr oCard8Reg0 gt u oCard8Regl gt u oCard8Reg2 gt u oCard8Reg3 gt u oCard8Reg4 gt u oCard8Reg5 gt u oCard8Reg6 gt u oCard8Reg7 gt u io io LOS 10 zo io io ioi C00000 C00004
63. 9 A00004 30 A00004 31 A00008 24 A00008 25 A00008 26 A00008 27 A00008 28 A00008 29 A00008 30 A00008 31 A0000C 24 A0000C 25 A0000C 26 A0000C 27 A0000C 28 A0000C 29 A0000C 30 A0000C 31 0 24 A000 A000 A000 A000 A000 A000 A000 A000 A000 A000 A000 A000 A000 A000 A000 A000 Byte wide variables used ptr ptr ptr ptr ptr ptr ptr ptr oCard3Reg0 gt u oCard3Regl gt u oCard3Reg2 gt u oCard3Reg3 gt u oCard3Reg4 gt u oCard3Reg5 gt u oCard3Reg6 gt u oCard3Reg7 gt u io io LO 10 LOS io qos io A00000 24 A00004 24 A00008 24 A0000C 24 A00010 24 A00014 24 A00018 24 A0001C 24 for 0 0 0 0 0 0 30 0 4 4 4 4 4 4 4 4 power on 8 OO CO CO CO CO CO CO O Card 3 1 000 O Card 3 1 001 O Card 3 1 002 O Card 3 1 003 O Card 3 1 004 O Card 3 1 005 O Card 3 1 006 O Card 3 1 007 O Card 3 1 008 O Card 3 1 009 O Card 3 1 010 O Card 3 1 011 O Card 3 1 012 O Card 3 1 013 O Card 3 1 014 O Card 3 1 015 O Card 3 1 016 O Card 3 1 017 O Card 3 1 018 O Card 3 1 019 O Card 3 1 020 O Card 3 1 021 O Card 3 1 022 O Card 3 1 023 O Card 3 1 024 O Card 3 1 025 O Card 3 1 026 O Card 3 1 027 O Card 3 1 028 O Card 3
64. ACC 11E I O Registers in C To access the I O pins in ACC 11E point a volatile unsigned int pointer to the following registers Base Address Base Address Base Address Base Address Register A00000 B00000 C00000 D00000 Description piom 0xA00000 4 0 piom 0xB00000 4 0 piom 0xC00000 4 0 piom 0xD00000 4 0 Inputs 1 8 piom 0xA00000 4 1 piom 0xB00000 4 1 piom 0xC00000 4 1 piom 0xD00000 4 1 Inputs 9 16 piom 0xA00000 4 2 piom 0xB00000 4 2 piom 0xC00000 4 2 piom 0xD00000 4 2 Inputs 17 24 piom 0xA00000 4 3 piom 0xB00000 4 3 piom 0xC00000 4 3 piom 0xD00000 4 3 Outputs 1 8 piom 0xA00000 4 4 piom 0xB00000 4 4 piom 0xC00000 4 4 piom 0xD00000 4 4 Outputs 9 16 piom 0xA00000 4 5 piom 0xB00000 4 5 piom 0xC00000 4 5 piom 0xD00000 4 5 Outputs 17 24 piom 0xA00000 4 7 piom 0xB00000 4 7 piom 0xC00000 4 7 piom 0xD00000 4 7 Control Word Using ACC 11E with Power UMAC 26 ACC 11E User Manual The useful data in each of these registers will be found in bits 8 32 the ACC 11E in Power PMAC does not use bits 0 7 of any of its registers The base addresses left to right four columns and bytes right end column are selected with jumpers see Addressing Setup and Jumper Settings section Only whole words at a time can be read in C therefore it is necessary to mask using the bitwise s operator and shift using the lt lt and gt gt operators to ob
65. ACRO IC 3 Node Registers Station I O Node 2 3 6 7 10 11 Ring Controller I O 50 51 54 55 58 59 Node 24 bit X 7B420 X 7B424 X 7B428 X 7B42C X 7B430 X 7B434 16 bit X 7B421 X 7B425 X 7B429 X 7B42D X 7B431 X 7B435 16 bit X 7B422 X 57B426 X 7B42A X 7B42E X 7B432 X 7B436 16 bit X 7B423 X 7B427 X 7B42B X 7B42F X 7B433 X 7B437 Using ACC 11E with UMAC MACRO Station 32 ACC 11E User Manual Setting Up The Control Word The Control Word must be set equal to 7 once on power up usually in an initialization PLC The advised method to set up the control word with MACRO is using the direct read write parameters MS anynode 98 Direct Read Write Format and Address Msfanynode M1199 Direct Read Write variable Note The direct read write parameters require MACRO16 CPU firmware 1 16 or later The MSfanynode MI198 setting is base address and byte location dependent Chip Select Base Address Byte Location Control Word Location M1198 Setting Low Y 8807 0 8 M1198 408807 CS10 Y 8800 Middle Y 8807 8 8 MI198 488807 High Y 8807 16 8 MI198 508807 Low Y 8847 0 8 MI198 408847 CS12 Y 8840 Middle Y 8847 8 8 MI198 488847 High Y 8847 16 8 MI198 508847 Low Y 8887 0 8 MI198 408887 CS14 Y 8880 Middle Y 8887 8 8 98 5488887 High Y 8887 16 8 MI198 508887 Low Y 88C7 0 8 MI198 4088C7 CS16 Y 88C0 Middle Y
66. Card Card Card Card Card Card Card Card Card Card Card Card Card Card Card Card Card Card Card Card Card Card Card Card Card Card Card Card Card Card Card Card Card Card Card Card l ll 1 9I A el lt lt sd lt wel lt ll lt 3 zl oJ do vd S O 61 vd O O sl lt d od nput 1 nput nput nput nput nput nput nput nput nput nput nput nput nput nput nput nput nput nput nput nput nput nput 23 nput 24 Output 1 Output 2 Output 3 Output 4 Output 5 Output 6 Output 7 Output 8 Output 9 Output Output Output Output Output Output Output Output Output Output Output 20 Output 21 Output 22 Output 23 Output 24 Ko OO 1 O OT gt GA K QO 1 O O MS LU N 20 21 22 OO JO OT 4 sN O I O Card I O Card I O Card I O Card I O Card I O Card I O Card I O Card 7 7 K 7 a 7 7 7 les used for power on configuration 1 000 07 1 008 15 1 016 23 1 024 31 1 032 39 as 1 040 47 as latch inputs control regi as as as as byte byte byte byte byte byte ster Appendix B Full Turbo UMAC M Variable Mappings ACC 11E User Manual Base Address 78E00 Middle Byte Single bit variabl M7336 5Y M7337 5Y M7338 5Y M7339 Y M7340 Y M7341 gt Y M7342 gt
67. Card Card Card Card 8 Card 8 Card 8 Card Card Card Card Card Card 8 Card 8 Card 8 Card Card Card Card Card Card 8 Card 8 Card Card Card Card Card Card Card 8 Card 8 Card Card Card Card Card Card Card 8 Card 8 Card Card Card Card Card Card OO CO CO CO CO CO o CO CO CO co Oo CO CO co CO CO CO OO CO CO CO CO CO 8 8 8 8 8 8 Input 1 Input 2 7 nput nput nput nput nput nput nput 9 Input 10 nput 7 nput nput nput m nput nput Input 17 Input 18 Input 19 Input 20 nput 21 nput 22 Input 23 Input 24 Output 1 Output 2 Output Output Output Output Output Output Output 9 Output 10 Output Output Output Output Output Output Output 17 Output 18 Output 19 Output 20 Output 21 Output 22 H QO o OT is CO OY Ot vs LU N QO OT vs CO OY OT gt LU N Output 23 Output 24 1 0 Card 1 0 Card 1 0 Card 1 0 Card 1 0 Card 1 0 Card 1 0 Card 1 0 Card 8 8 8 8 8 8 8 8 les used for accessing 1 0 points pover on configuration 1 000 07 as 1 008 15 as 1 016 23 as 1 024 31 as 1 032 39 as 1 040 47 as latch inputs control regi byte byte byte byte byte byte ster Appendix B Full Turbo UMAC M Variable Mappings 73 ACC 11E User Manual Base
68. Card2Pt31 gt u i oCard2Pt32 gt u i oCard2Pt33 gt u i oCard2Pt34 gt u i oCard2Pt35 5u i oCard2Pt36 5u i oCard2Pt37 u i oCard2Pt38 gt u i oCard2Pt39 gt u i oCard2Pt40 gt u i oCard2Pt41 5u i oCard2Pt42 5u i oCard2Pt43 gt u i oCard2Pt44 gt u i oCard2Pt45 5u i oCard2Pt46 5u i oCard2Pt47 5u i io 10 ro 10 Los io io io Byte wide variables used A00000 16 8 ptr ptr ptr ptr ptr ptr ptr ptr oCard2Reg0 gt u oCard2Regl gt u oCard2Reg2 gt u oCard2Reg3 gt u oCard2Reg4 gt u oCard2Reg5 gt u oCard2Reg6 gt u oCard2Reg7 u io io LO 10 LOS io qos io A00000 16 A00000 17 A00000 18 A00000 19 A00000 20 A00000 21 A00000 22 A00000 23 A00004 16 Es A00004 17 A00004 18 A00004 19 del A00004 20 A00004 21 A00004 22 A00004 23 A00008 16 A00008 17 A00008 18 A00008 19 A00008 20 A00008 21 A00008 22 A00008 23 A0000C 16 A0000C 17 A0000C 18 A0000C 19 A0000C 20 A0000C 21 2 A0000C 22 A0000C 23 A00010 16 A00010 17 A00010 18 A00010 19 A00010 20 2 A00010 21 A00010 22 A00010 23 A00014 16 2 A00014 17 A00014 18 A00014 19 A00014 20 A00014 21 A00014 22 A00014 23 for pover on
69. Control Word Boarc E1 1 2 nput Y 078C00 0 8 Board1_Inputl El 12 Input Y 078C01 0 8 Board1_Input2 El 1 2 nput 078C02 0 8 Board Input El 12 Dutput Y 078C03 0 8 Board1_Outputl El 1 2 Dutput Y 078C04 0 8 Board1_Dutput2 El 1 2 Dutput Y 078C05 0 8 Board Output El 1 2 Input 4078 00 0 1 Board1 Bit El 1 2 nput Y 078C00 1 1 Board1_Bit1 El 1 2 Input 078C00 2 1 Board1_Bit2 gt b EN Click Finish You have selected your board and base address by Jumper Setting If it s correct press finish or If it s not correct you can press back and correct again or you can cancle anytime Card Name ACC 11E Isolated 24 Input 24 Output Board 24 Optically isolated inputs at 12 24V DC levels Sourcing or Sinking by user wiring 24 Optically isolated outputs at up to 24VDC and 100m4 Sourcing or Sinking by factory configuration Must select Option A or B This product is available with D sub connector interface To order with this option please note Part Number change below This option is offered at no additional charge For D sub connector Part Number is 340 603307 DBx Appendix A Using the UMAC Config Pro2 Tool 64 ACC 11E User Manual Click on M Variables The list of M Variable definitions that appears can be downloaded by clicking the Down icon yellow arrow pointing down Click on the File icon to locate the text file Appendix A Using the UMAC C
70. DAT2 BD08 8 BD11 SEL2 BD10 9 BD13 DAT3 BD12 10 BD15 SEL3 BD14 11 BD17 DAT4 BD16 12 BD19 SELA BD18 13 BD21 DAT5 BD20 14 BD23 SEL5 BD22 15 BS1 DAT6 BSO 16 BAOI SEL6 BAOO 17 BAO3 DAT7 BA02 18 BX Y SEL7 BA04 19 CS3 BA06 CS2 20 BA05 BA07 CS4 21 CS12 BA08 CS10 22 CS16 BA09 CS14 23 BA13 BA10 BA12 24 BRD BA11 BWR 25 BS3 MEMCSO BS2 26 WAIT MEMCSI RESET 27 PHASE IREQ1 SERVO 28 PHASE IREQ2 SERVO 29 ANALOG GND IREQ3 ANALOG GND 30 15Vdc PWRGND 15Vdc 31 GND GND GND 32 5Vdc 5Vdc 5Vdc For more details about the JEXP see the UBUS Specification Document Layouts and Pinouts 57 ACC 11E User Manual SCHEMATICS 10K 10K RP206 10K 2 q BRPG1204W 2 D12 4 1 10K 10K SNC 3 BRPG1204W 2 016 2 8 2h E Schematics ACC 11E User Manual RP70 470 E17 3 NOTE El6 B17 Q MUST NUMBER IN THE SAME DIRECTION 3 JUMP 1 TO 2 FOR SINKING OUTPUT JUMP 2 TO 3 FOR SOURCING OUTPUT USE ULN2803A FOR SINKING OUTPUTS USE UDN2981A FOR SOURCING OUTPUTS FT 0 1 041 22U D27 SMC33AT3 SE 10A OGND1 UA22 2705 1 1 024 ACIN1 6 ACIN2 El 22 PS2705 1 1 025 ACIN1 C1 ACIN2 El 22 PS2705 1 a em kde 1 026 ACIN1 C1 ULN2803A OR UDN2981A RP72 AK Sr ol__
71. EN IS 53 Wiring Input DB15 Connectors PN RC d 54 JI Bottom Outputs ELE m 55 J2 Bottom Outputs 13 A t 55 Wiring Output 1515 Connectors 56 SCHEMATICS X Y 58 APPENDIX A USING THE UMAC CONFIG PRO2 TOOL L 60 APPENDIX B FULL TURBO UMAC M VARIABLE MAPPINGS 66 APPENDIX C FULL POWER UMAC M VARIABLE MAPPINGS 78 APPENDIX I THE CONTROL WORD a anana nana dad a R DA IR ii 90 Table of Contents 5 ACC 11E User Manual INTRODUCTION The ACC 11E is a 24 In 24 Out general purpose I O card Built in the 3U euro card format it can be used in the following products Turbo UMAC Power UMAC UMAC MACRO Station All inputs and outputs are 12 24 VDC optically isolated and can be configured as sinking or sourcing Ls E ls l efe ate 42 RE Introduction 6 ACC 11E User Manual SPECIFICATIONS Environmental Specifications Description Specification Operating Temperature 0 C to 45 C Storage Temperature 25 C to 70 C Humidity 10 to 95 non condensing Electrical Specifications Description Specification Notes Power Requirements SV
72. I O Card 12 1 034 ptr IoCard12Pt35 u io D00010 27 1 I O Card 12 1 035 ptr IoCard12Pt36 u io D00010 28 1 I O Card 12 1 036 ptr IoCard12Pt37 u io D00010 29 1 I O Card 12 1 037 ptr IoCard12Pt38 u io D00010 30 1 1 0 Card 12 1 038 ptr IoCard12Pt39 u io D00010 31 1 I O Card 12 1 039 ptr IoCard12Pt40 u io D00014 24 1 I O Card 12 1 040 ptr IoCard12Pt41 u io D00014 25 1 I O Card 12 1 041 ptr IoCard12Pt42 u io D00014 26 1 I O Card 12 1 042 ptr IoCard12Pt43 u io D00014 27 1 I O Card 12 1 043 ptr IoCard12Pt44 u io D00014 28 1 I O Card 12 1 044 ptr IoCard12Pt45 u io D00014 29 1 I O Card 12 1 045 ptr IoCard12Pt46 u io D00014 30 1 I O Card 12 1 046 ptr IoCard12Pt47 u io D00014 31 1 I O Card 12 1 047 Byte wide variables used for power on configuration ptr IoCard12Reg0 u io D00000 24 8 I O Card 12 1 000 07 as byte ptr IoCardl2Regl u io D00004 24 8 I O Card 12 1 008 15 as byte ptr IoCardl2Reg2 u io D00008 24 8 I O Card 12 1 016 23 as byte ptr IoCard12Reg3 gt u io D0000C 24 8 I O Card 12 1 024 31 as byte ptr IoCard12Reg4 gt u io D00010 24 8 I O Card 12 1 032 39 as byte ptr IoCardl2Reg5 u io D00014 24 8 I O Card 12 1 040 47 as byte ptr IoCardl2Reg6 2u io D00018 24 8 I O Card 12 latch inputs ptr IoCard12Reg7 u io D0001C 24 8 I O Card 12 control register Appendix C Full Power UMAC M Variable Mappings ACC 11E User Manual
73. MAC MACRO Station 36 ACC 11E User Manual MSfanynode MI71 24 Bit Transfer This method is typically used when six or less ACC 11E cards are present in the rack MS anynode MI71 processes 24 bit register transfers It is a 48 bit variable represented as 12 hexadecimal digits which are set up as follows digit 1 is leftmost when constructing the word No of consecutive node pairs 1 for 2 10 nodes 2 for 410 nodes No of 24 bit banks per board 3 for 6 IO nodes max Always 2 for ACC 11E pe Ja pe s For ACC 11E 0 Reserved 0 Starting ACC 11E base address 88XX Starting I O node register SCOXX Example 1 Transferring I O data of one ACC 11E card total of 48 bits at base address 8800 using low bytes over MACRO using two consecutive 24 bit registers of I O nodes 2 and 3 C0A0 and COA4 respectively yields ACC ATE 8800 Inputs 24 bits Outputs 24 bits MS0 MI71 10C0A0208800 24 2 El El 4 El s ElEl i b Fel bel kl GE Eb 1 0 Nodell 2 3 6 7 10 11 x 24 bit reg Address coA0 COA4 COAC COBO COBA MACRO IC Using ACC 11E with UMAC MACRO Station 37 ACC 11E User Manual Example 2 Transferring UO data of two ACC 11E cards total of 96 bits at consecutive 8800 addresses using low and middle bytes over MACRO using four consecutive 24 bit registers of I O nodes 2 3 6 and 7 C0A0 C0A4 COAS and COAC respectiv
74. PS GPS GPS ss GPS GPS GPS GPS il GPS GPS GPS GPS GPS GPS GPS GPS il ls ls GPS lb ss GPS ss ils BR BRAS nput 1 nput nput nput nput nput nput nput nput nput nput nput nput nput nput nput nput nput nput nput 20 nput 21 nput 22 nput 23 nput 24 Output 1 Output 2 Output 3 Output 4 Output 5 Output 6 Output 7 Output 8 Output 9 Output Output Output Output Output Output Output Output Output Output Output 20 Output 21 Output 22 Output 23 Output 24 Ko OO O OT gt GA K QO 1 O O vs LU N OO JO OT 4 sN O for accessing 1 0 points for power on configuration 1 0 Card 1 0 Card 1 0 Card 1 0 Card 1 0 Card 1 0 Card 1 0 Card 1 0 Card 4 4 4 4 4 4 4 4 1 000 07 as 1 008 15 as 1 016 23 as 1 024 31 as 1 032 39 as 1 040 47 as latch inputs control regi byte byte byte byte byte byte ster Appendix B Full Turbo UMAC M Variable Mappings 69 ACC 11E User Manual Base Address 78D00 Middle Byte Single bit variabl M7192 Y M7193 Y M7194 Y M7195 Y M7196 Y M7197 Y M7198 5Y M7199 5Y M7200 5Y M 7201 5Y M7202 5Y M7203 5Y M7204 5Y M7205 5Y M7206 5Y M7207 5Y M7208 5Y M7209 5Y M7210 Y M7211 gt Y M7212 gt Y M7213 Y M7214 Y M7215 Y M7216 Y M7217 Y M7218 Y M7219 Y M7220 Y M7221 gt
75. USER MANUAL Accessory 11E DELTA TAU Ny Data Systems Inc NEW IDEAS IN MOTION Ce eil iw Single Source Machine Control Power Flexibility Ease of Use 21314 Lassen Street Chatsworth CA 91311 Tel 818 998 2095 Fax 818 998 7807 www deltatau com ACC 11E User Manual Copyright Information O 2011 Delta Tau Data Systems Inc All rights reserved This document is furnished for the customers of Delta Tau Data Systems Inc Other uses are unauthorized without written permission of Delta Tau Data Systems Inc Information contained in this manual may be updated from time to time due to product improvements etc and may not conform in every respect to former issues To report errors or inconsistencies call or email Delta Tau Data Systems Inc Technical Support Phone 818 717 5656 Fax 818 998 7807 Email support deltatau com Website http www deltatau com Operating Conditions All Delta Tau Data Systems Inc motion controller products accessories and amplifiers contain static sensitive components that can be damaged by incorrect handling When installing or handling Delta Tau Data Systems Inc products avoid contact with highly insulated materials Only qualified personnel should be allowed to handle this equipment In the case of industrial applications we expect our products to be protected from hazardous or conductive materials and or environments that could cause harm to the co
76. Using BGCPLCI as an example This example assumes that acc11e h and 11 have already been placed into the same folder as the BGCPLC under C Language CPLCs bgeplc00 in the Power PMAC IDE Solution Explorer include lt gplib h gt include lt stdio h gt include lt dlfcn h gt include Include pp proj h finclude acclle h void user plcc unsigned int ChannelNumber ArrayIndex Allocate indices for ChannelNumber 1 ChannelNumber 25 ChannelNumber Array ndex ChannelNumber 1 Copy the state of each input into P7000 P7023 pshm gt P 7000 ArrayIndex double ACC11E GetInputState ACC11E BaseAddressOffset El ByteSelectLow ChannelNumber Copy the state of P8000 P8023 into outputs 1 24 11 SetOutputState ACC11E BaseAddressOffset El ByteSelectLow ChannelNumber unsigned int pshm gt P 8000 ArrayIndex return User VVritten Functions User written functions can be created as an alternative to the above described functions To do so e Pont a volatile unsigned int pointer variable to the desired ACC 11E memory location Perform a whole 32 bit read of the memory location To read VO states mask and shift to read the appropriate bit in the word i e the state of the I O point To write I O states perform a read modify write to change the appropriate bit in the word e g to enable or disable an output Table of
77. Y 17173 lt gt 13 M7174 Y M7175 Y M7176 Y M7177 5Y M7178 5Y M7179 Y M7180 5Y M7181 5Y M7182 Y M7183 5Y M7184 Y M7185 gt Y M7186 5Y M7187 gt Y M7188 5Y 7189 7190 M7191 5Y Byte vide variabl M3330 gt Y M3331 gt Y M3332 gt Y M3333 gt Y M3334 gt Y M3335 gt Y M3336 gt Y M3337 gt Y 078D00 0 078D00 1 078D00 2 078D00 3 078D00 4 078D00 5 078D00 6 5078000 7 5078001 0 5078001 1 078D01 2 078D01 3 078D01 4 078D01 5 5078001 6 5078001 7 078D02 0 078D02 1 078D02 2 078D02 3 078D02 4 078D02 5 078D02 6 078D02 7 5078003 0 5078003 1 078D03 2 078D03 3 078D03 4 078D03 5 078D03 6 5078003 7 5078004 0 5078004 1 078D04 2 078D04 3 078D04 4 078D04 5 078D04 6 078D04 7 078D05 0 078D05 1 078D05 2 078D05 3 078D05 4 078D05 5 078D05 6 078D05 7 78D00 0 8 U 78D01 0 8 U 78D02 0 8 U 78D03 0 8 U 78D04 0 8 U 78D05 0 8 U 78D06 0 8 U 78D07 0 8 U Card Card Card Card Card Card Card Card Card Card Card Card Card Card Card Card Card Card Card Card Card Card Card Card Card Card Card Card Card Card Card Card Card Card Card Card Card Card Card Card Card Card Card Card Card Card Card Card les used KAR GPS G
78. Y M7222 5Y M7223 Y M7224 Y M7225 Y M7226 5Y M7227 5Y M7228 gt Y M7229 gt Y M7230 gt Y M7231 5Y M7232 5Y M7233 5Y M7234 gt Y M7235 Y M7236 5Y MI2S Y M7238 5Y M7239 5Y Byte vide variables used for M3340 5Y M3341 gt Y M3342 gt Y M3343 gt Y M3344 gt Y M3345 gt Y M3346 gt Y M3347 Y 078D00 8 1 078D00 9 1 078D00 10 078D00 11 078D00 12 078D00 13 078D00 14 078D00 15 078D01 078D01 078D01 078D01 078D01 078D01 078D01 078D01 078D02 078D02 078D02 078D02 078D02 078D02 078D02 078D02 078D03 078D03 078D03 078D03 078D03 078D03 078D03 078D03 078D04 078D04 078D04 078D04 078D04 078D04 078D04 078D04 078D05 078D05 078D05 078D05 078D05 078D05 078D05 078D05 Us QON gt OBWNHE OD gt bes besos o Hs o bes N w lt H 78D00 8 8 U 78D01 8 8 U 78D02 8 8 U 78D03 8 8 U 78D04 8 8 U 78D05 8 8 U 78D06 8 8 U 78D07 8 8 U Card 5 Card 5 Card Card Card Card Card Card Card 5 Card 5 Card 5 Card Card Card Card Card Card 5 Card 5 Card 5 Card Card Card Card Card Card 5 Card 5 Card Card Card Card Card Card Card 5 Card 5 Ca
79. Y M7254 5Y M7255 5Y MT7256 5Y M7257 5Y 7258 M7259 5 Y M7260 5Y M7261 Y M7262 5Y M7263 5Y M7264 5Y M7265 5Y M7266 5Y M7267 Y M7268 Y 7269 M7270 Y M7271 5Y M7272 5Y M7273 Y M7274 Y M7275 Y M7276 Y M7277 5Y M7278 5Y M7279 5Y M7280 5Y M7281 5Y M7282 5Y 7283 M7284 Y 7285 M7286 gt Y M7287 gt Y Byte wide variables used for M3350 gt Y M3351 gt Y M3352 gt Y M3353 gt Y M3354 Y M3355 Y M3356 5Y M3357 Y les used 5078 00 16 Card 5078 00 17 Card 078D00 18 Card 078D00 19 Card 078D00 20 Card 5078 00 21 Card 078D00 22 Card 078D00 23 Card 078D01 16 Card 078D01 17 Card 078D01 18 Card 078D01 19 Card 078D01 20 Card 078D01 21 Card 078D01 22 Card 078D01 23 Card 078D02 16 Card 078D02 17 Card 078D02 18 Card 078D02 19 Card 078D02 20 Card 078D02 21 Card 078D02 22 Card 078D02 23 Card 078D03 16 Card 078D03 17 Card 078D03 18 Card 078D03 19 Card 078D03 20 Card 078D03 21 Card 078D03 22 Card 078D03 23 Card 078D04 16 Card 078D04 17 Card 078D04 18 Card 078D04 19 Card 078D04 20 Card 078D04 21 Card 078D04 22 Card 078D04 23 Card 078D05 16 Card 078D05 17 Card 078D05 18 Card 078D05 19 Card 078D05 20 Card 078D05 21 Card 078D05 22 Card 078D05 2
80. Y M7343 gt Y M7344 gt Y M7345 gt Y M7346 gt Y M7347 gt Y M7348 gt Y M7349 gt Y M7350 5Y M7351 5Y MT352 5Y M7353 5Y M7354 5Y M7355 5Y M7356 5Y 7357 2 M7358 Y M7359 Y M7360 Y M7361 5Y M7362 5Y M7363 5Y M7364 5Y M7365 5Y M7366 5Y M7367 5Y M7368 5Y M7369 5Y M7370 5Y M7371 gt Y M7372 Y M7373 Y M7374 Y M7375 Y M7376 5Y M7377 5Y M7378 5Y M7379 gt Y M7380 gt Y M7381 gt Y M7382 5Y M7383 5Y Byte vide variables used for M3370 5Y MS3371 5Y M3372 5Y M3373 Y M3374 Y M3375 Y M3376 Y M3377 5Y 078E00 8 1 078E00 9 1 078E00 10 078500 11 078500 12 078E00 13 078E00 14 078E00 15 078E01 078E01 078E01 078E01 078E01 078E01 5078 01 078E01 5078 02 5078 02 5078 02 5078 02 5078 02 5078 02 5078 02 5078 02 078E03 078E03 078E03 078E03 078503 078503 078E03 078E03 078E04 078E04 078E04 078E04 078E04 078E04 078E04 078E04 078E05 078E05 078E05 5078 05 5078 05 078E05 078E05 0785E05 OT S UN O Ot s QON gt OBWNHE OD gt bes besos o H o KA KA N lt DG 78E00 8 8 U 78E01 8 8 U 78E02 8 8 U 78E03 8 8 U 78E04 8 8 U 78E05 8 8 U 78E06 8 8 U 78E07 8 8 U Card 8 Card 8 Card 8 Card Card
81. able Mappings 83 ACC 11E User Manual Base Offset C00000 Low Byte Single bit variables used for accessing I O points C00000 8 1 1 0 Card 7 1 000 ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr oCard7Pt00 u oCard7Pt01 gt u oCard7Pt02 gt u oCard7Pt03 gt u oCard7Pt04 u oCard7Pt05 u oCard7Pt06 u oCard7Pt07 u oCard7Pt08 u i ro oCard7Pt09 u oCard7Pt10 5Su i oCard7Ptll u i oCard7Pt12 5Su i oCard7Pt13 gt u i oCard7Pt14 5u i oCard7Pt15 5u i oCard7Pt16 5u i oCard7Pt17 5Su i oCard7Pt18 u i oCard7Pt19 5u i oCard7Pt20 u i oCard7Pt21 u i oCard7Pt22 u i oCard7Pt23 u i oCard7Pt24 u i oCard7Pt25 u i oCard7Pt26 u i oCard7Pt27 u i oCard7Pt28 u i oCard7Pt29 u i oCard7Pt30 u i oCard7Pt31 gt u i oCard7Pt32 u i oCard7Pt33 u i oCard7Pt34 u i oCard7Pt35 u i oCard7Pt36 u i oCard7Pt37 u i oCard7Pt38 u i oCard7Pt39 u i oCard7Pt40 u i oCard7Pt41 5u i oCard7Pt42 u i oCard7Pt43 u i oCard7Pt44 u i oCard7Pt45 5u i oCard7Pt46 5u i oCard7Pt47 u i io io Lo io 101 io io ro Byte vide variables used ptr ptr ptr ptr ptr ptr ptr ptr oCard7Reg0 gt u oCard7Regl u oCard7Reg2 u oCard7Reg3 u oCard7Reg4 u
82. able for transferring various data Each VO node consists of 4 registers one 24 bit and three 16 bit registers for a total of 72 bits of data Node EJER Auxiliary Nodes V O Nodes Servo Nodes A given MACRO Station can be populated with either a MACRO8 or MACRO16 CPU e MACROS supports 1 MACRO IC 1C 0 MACRO16 supports 2 MACRO ICs IC 0 and IC 1 The I O node addresses COXX on the MACRO Station ICs are MACRO Station IC 0 Node Registers Node 2 3 6 7 10 11 24 bit X C0A0 X C0A4 X COA8 X COAC X COBO X COB4 16 bit X C0A1 X C0A5 X C0A9 X COAD 5 0 1 X C0B5 16 bit X C0A2 X C0A6 X COAA X COAE X C0B2 X C0B6 16 bit X C0A3 X C0A7 X COAB X COAF X C0B3 X C0B7 MACRO Station IC 1 Node Registers Node 2 3 6 7 10 11 24 bit X COEO X COEA X C0E8 X COEC X COFO X COF4 16 bit X COE1 X COE5 X COE9 X COED X COFI X COFS 16 bit X COE2 X COE6 X COEA X COEE X COF2 X COF6 16 bit X C0E3 X C0E7 X C0EB X COEF X COF3 X C0F7 Using ACC 11E with UMAC MACRO Station 31 ACC 11E User Manual A given Ring Controller Turbo PMAC2 Ultralite or UMAC with two ACC 5Es can be populated with up to 4 MACRO ICs IC 0 IC 1 IC 2 and IC 3 which can be queried with global variable 14902 If 14902 Populated MACRO IC s 0 None 1 0 3 0 1 7 0 1 2 F 0 1 2 3
83. an be Sinking or Sourcing 8 Reference Reference voltage See E16 thru E21 jumper settings in section 9 Output Oupusld titled Addressing and Jumper Settings Layouts and Pinouts 55 ACC 11E User Manual Wiring Output DB15 Connectors 12 24 VDC Power Supply Sourcing Outputs 12VDC 24VDC REFERENCE 12VDC 24VDC J2 BOTTOM Layouts and Pinouts OUTPUT1 OUTPUT2 OUTPUTS a OUTPUT10 OUTPUT11 OUTPUT12 OUTPUT13 OUTPUT14 12 24 VDC Power Supply 12VDC 24VDC 12VDC 24VDC Sinking Outputs REFERENCE OUTPUT1 OUTPUT2 OUTPUT3 OUTPUT4 OUTPUTS C OUTPUTS OUTPUT7 r OUTPUT8 OUTPUT9 OUTPUT10 OUTPUT11 OUTPUT12 je Sel 2 T o Gunun 2 OUTPUT19 OUTPUT20 OUTPUT23 OUTPUT24 12 BOTTOM ACC 11E User Manual UBUS Pinouts P1 UBUS 32 121 96 Pin Header B32 900000000000000000000000000000000 B1 2 1 Front View Pin Row A Row B Row C Notes 1 5Vdc 5Vdc 5Vdc 2 GND GND GND 3 1 DATO BD00 4 BD03 SELO BD02 2 5 DATI BD04 6 BD07 SEL1 BD06 7 BD09
84. ard 2 Input 10 Card 2 Input 11 Card 2 Input 12 Card 2 Input 13 Card 2 Input 14 Card 2 Input 15 Card 2 Input 16 Card 2 Input 17 Card 2 Input 18 Card 2 Input 19 Card 2 Input 20 Card 2 nput 21 Card 2 nput 22 Card 2 Input 23 Card 2 nput 24 Card 2 Output 1 Card 2 Output 2 Card 2 Output 3 Card 2 Output 4 Card 2 Output 5 Card 2 Output 6 Card 2 Output 7 Card 2 Output 8 Card 2 Output 9 Card 2 Output 10 Card 2 Output 11 Card 2 Output 12 Card 2 Output 13 Card 2 Output 14 Card 2 Output 15 Card 2 Output 16 Card 2 Output 17 Card 2 Output 18 Card 2 Output 19 Card 2 Output 20 Card 2 Output 21 Card 2 Output 22 Card 2 Output 23 Card 2 Output 24 Byte wide variables used for M3310 gt Y RRR M3312 Y M3313 gt Y M3314 gt Y M3315 gt Y M3316 gt Y M3317 5Y 78C00 8 8 U 78C01 8 8 U 78C02 8 8 U 78C03 8 8 U 78C04 8 8 U 78C05 8 8 U 78C06 8 8 U 78C07 8 8 U Lik 77 les used for accessing I O points power on configuration I O Card I O Card I O Card I O Card I O Card I O Card I O Card I O Card 2 2 2 2 2 2 2 2 1 000 07 as 1 008 15 as 1 016 23 as 1 024 31 as 1 032 39 as 1 040 47 as latch inputs control regi byte byte byte byte byte byte ster Appendix B Full Turbo UMAC M Variable Mappings 67 ACC 11E User Manual Base Address 78C00 High Byte
85. d card if present set for high byte addressing e The 16 bit node registers used with MS anynode MI69 and MI70 must be at consecutive addresses the MACRO station is necessary for MI69 and MTI70 transfers to take A save MSSA V anynode followed by a reset MS anynode at uzr effect Note The VO data is now copied automatically by the firmware into the ring controllers node registers 7XXXX vvhere it is accessible by the user Hovvever the MACRO protocol limits handling of these registers to full vvords 16 or 24 bit The inputs can be read directly in full word assignments The outputs can be written to directly in full word assignments but cannot report their current state Reading the state of inputs can be done directly from I O node EY registers 7XXXX using full word assignments Note Writing to outputs can be done directly to I O node registers E 7XXXX using full word assignments however reading the state of outputs is not possible Note Creating input and output image mirrored words in a PLC program allows bitwise assignments full user access and state reporting The following diagram illustrates the basic concept of mirroring 7XXXX PLCprogram PLCprogram If inputs state has changed i Inputs Inputs mE Copy full word to unused memory location If user outputs have changed Outputs Copy full word to unused memory location Outputs Using
86. eSelect unsigned int InputNumber BaseAddressOffset I O Card Base Address Offset InputNumber Input Pin Number 1 24 ByteSelect 1 for lowest 8 bits 2 for middle 8 bits 3 for high 8 bits State of the I O pin specified volatile unsigned int ioptr Create I O pointer Compute location for high bit unsigned int HighBitInCorrectLocation 0 ShiftValue InputNumber ShiftValue InputNumber 8 8 ByteSelect 1 HighBitInCorrectLocation 1 lt lt ShiftValue Shift bit to that location ioptr piom BaseAddressOffset 4 Initialize pointer ioptr InputNumber 8 Increment to register containing the I O bit Return state of I O point return ioptr gt gt 8 amp HighBitInCorrectLocation gt gt ShiftValue unsigned int ACC11E GetOutputState unsigned int BaseAddressOffset unsigned int ByteSelect unsigned int OutputNumber BaseAddressOffset 1 0 Card Base Address Offset InputNumber Input Pin Number 1 24 ByteSelect 1 for lowest 8 bits 2 for middle 8 bits 3 for high 8 bits Output State of the 1 0 pin specified volatile unsigned int ioptr Create I O pointer Compute location for high bit unsigned int HighBitInCorrectLocation 0 ShiftValue OutputNumber ShiftValue OutputNumber 8 8 ByteSelect 1 HighBitInCorrectLocation 1 lt lt ShiftValue Shift bit to that location ioptr piom BaseAddressOffset 4 Initialize pointer ioptr OutputNumber 8 3 Increment to regi
87. ely yields _ACC 11E 8800 low bytes ACC 11E 8800 middle bytes MS0 MI71 20C0A0208800 dd D I BA Ek AA 1 0 Nodett 2 3 6 7 10 11 24 bit reg Address coA0 COA4 COA8 COAC COBO COBA MACRO IC Example 3 Transferring I O data of three ACC 11E cards total of 144 bits at consecutive 8800 addresses using low middle and high bytes over MACRO using six consecutive 24 bit registers of I O nodes 2 3 6 7 10 and 11 C0A0 C0A4 C0A8 COAC COBO and COBA respectively yields ACC 11E 8800 low bytes ACC 11E 8800 middle bytes ACC 11E 8800 high bytes MACRO IC Using ACC 11E with UMAC MACRO Station 38 ACC 11E User Manual Example 4 Transferring I O data of the maximum of six ACC 11E cards total of 288 bits at consecutive 8800 addresses using low middle and high bytes and consecutive 8840 addresses using low middle and high bytes over MACRO using six consecutive 24 bit registers of IC 0 VO nodes 2 3 6 7 10 and 11 C0A0 C0A4 C0A8 COAC COBO and COB4 respectively and six consecutive IC 1 VO nodes 2 3 6 7 10 and 11 C0E0 COE4 COES COEC COFO and COFA respectively yields MS0 MI71 30C0A 0208800 50 071 530 C01 0208840 e Transferring multiple ACC 11E cards using MS anynode MI71 requires them to be at the same base address starting with the first KS card set for low byte addressing the second card set f
88. g5 5u oCard5Reg6 gt u oCard5Reg7 u io io qos 10 Lo io io ioi B00000 16 B00000 17 B00000 18 B00000 19 B00000 20 B00000 21 B00000 22 B00000 23 B00004 16 Es B00004 17 B00004 18 B00004 19 del B00004 20 B00004 21 B00004 22 B00004 23 B00008 16 B00008 17 B00008 18 B00008 19 B00008 20 B00008 21 B00008 22 B00008 23 B0000C 16 B0000C 17 B0000C 18 B0000C 19 B0000C 20 B0000C 21 2 B0000C 22 B0000C 23 B00010 16 B00010 17 B00010 18 B00010 19 B00010 20 2 B00010 21 B00010 22 B00010 23 B00014 16 2 5 00014 17 B00014 18 B00014 19 B00014 20 B00014 21 B00014 22 B00014 23 for power on B00004 16 8 B00008 16 8 B0000C 16 8 B00010 16 8 B00014 16 8 B00018 16 8 B0001C 16 8 O Card 5 1 000 O Card 5 1 001 O Card 5 1 002 O Card 5 1 003 O Card 5 1 004 O Card 5 1 005 O Card 5 1 006 O Card 5 1 007 O Card 5 1 008 O Card 5 1 009 ZQ Card 5 1 010 O Card 5 1 011 O Card 5 1 012 O Card 5 1 013 O Card 5 1 014 O Card 5 1 015 O Card 5 1 016 O Card 5 1 017 O Card 5 1 018 O Card 5 1 019 O Card 5 1 020 O Card 5 1 021 O Card 5 1 0
89. gister transfers It is a 48 bit variable represented as 12 hexadecimal digits which are set up as follows digit 1 is leftmost when constructing the word Reserved 0 Reserved 0 Reserved 0 Reserved 0 Starting I O node register Starting ACC 11E base address SCOXX 88XX Example Transferring VO data of three ACC 11E cards total of 144 bits at consecutive 88C0 addresses using low middle and high bytes over MACRO using six consecutive 16 bit registers followed by two consecutive 24 bit registers of I O nodes C0B1 COB2 COB3 C0B5 COB6 COB7 COBO and COBA respectively yields ACC 11E 88CO0 low bytes ACC 11E 88C0 middle bytes ACC 11E 88C0 high bytes M ucc A ML ICM E LU Node 24 bit Registers SCOBO COBA I O Node 2 3 16 bit 30081 COB5 Registers COB2 COB6 200 EE MACRO IC Using ACC 11E with UMAC MACRO Station 46 ACC 11E User Manual LAYOUTS 8 PINOUTS Board Layout Diagrams Terminal Block Option Dimensions in Inches D Sub Option 80 Layouts and Pinouts 47 ACC 11E User Manual Wiring Considerations The inputs have an activation range from 12 V to 24 V and can be sinking or sourcing for each of three 8 bit groups depending on the reference to the opto circuitry The opto isola
90. high byte OutputNumber The number of the Onput pin whose state one desires to read or modify Outputs are numbered 1 24 on ACC 11E The function will return the state of the specified pin as an unsigned int 0 pin is low 1 pin is high unsigned int ACC11E GetOutputState unsigned int BaseAddressOffset unsigned int ByteSelect unsigned int OutputNumber BaseAddressOffset 1 0 Card Base Address Offset InputNumber Input Pin Number 1 24 ByteSelect 1 for lowest 8 bits 2 for middle 8 bits 3 for high 8 bits State of the I O pin specified volatile unsigned int ioptr Create 1 0 pointer Compute location for high bit unsigned int HighBitInCorrectLocation 0 ShiftValue OutputNumber ShiftValue OutputNumber 8 8 ByteSelect 1 HighBitInCorrectLocation 1 lt lt ShiftValue Shift bit to that location ioptr piom BaseAddressOffset 4 Initialize pointer ioptr OutputNumber 8 3 Increment to register containing the I O bit Return state of I O point return ioptr gt gt 8 amp HighBitInCorrectLocation gt gt ShiftValue Function for Writing to Outputs ACC11E_SetOutputState Four parameters must be passed in the calling function BaseAddressOffset One of the four base addresses jumper selected ACC 11E can take 0xA00000 0xB00000 0xC00000 0xD00000 ByteSelect The byte used jumper selected for the I O bits on this card 1 for low byte 2 for middle byte 3 for high by
91. io A00010 8 1 ptr Output10 5u io A00010 9 ptr Output11 5u io A000 ptr Output12 5u io A000 ptr Output13 5u io A000 ptr Output14 5u io A000 ptr Output15 5u io A000 ptr Output16 5u io A000 ptr Output17 5u io A000 ptr Output18 5u io A000 ptr Output19 5u io A000 ptr Output20 5u io A000 ptr Output21 gt u io A000 ptr Output22 5u io A000 ptr Output23 gt u io SA000 ptr Output24 5u io A000 DG No K X LO 00 La OT ON LA OO au GG GG OOG O O O O Byte vide variables used for ptr IoCardlReg0 gt u io A00000 ptr IoCardlRegl gt u io A00004 ptr IoCardlReg2 gt u io A00008 ptr IoCardlReg3 u io A0000C ptr IoCardlReg4 gt u io A00010 ptr IoCardlReg5 gt u io A00014 ptr IoCardlReg6 gt u io A00018 ptr IoCardlReg7 u io A0001C OO CO CO CO Oo oo oo CO dl pover on Lib El OO CO CO CO Oo oo oo CO O Card O Card O Card O Card O Card O Card O Card O Card O Card O Card O Card O Card O Card O Card O Card O Card O Card O Card O Card O Card O Card O Card O Card O Card O Card O Card O Card O Card O Card O Card O Card O Card O Card O Card O Card O Card O Card O Card O Card O Card O Card O Card O Card O Card O Card O Card O Card O Card configura O Card O Card
92. ion HEA ACC 24E2A Auto det This program has detected the following information about your UMAC system E m based upon the reading of 14900 to 14999 Communication through USB Total 4 boards 1 CPU Cards 2 Servo Cards 0 DPR Cards Macro Cards 0 1 0 Cards with ID 1 0 Cards without ID Instructions for defining UO card without ID Step 1 Select Unknown Card at left tree Step 2 Click Define Icon from Toolbar or Menu If your physical UMAC system is not as described above please check your card address settings for possible conflicts Ready Wl 2 Although the precise accessory number is not detected the base address and address jumper settings are detected and displayed ini xl File Tools View Help m Select Define Delete Umac Parts CPU e RA ACC 24E2A Auto det Unknown2 Unknown Description Unknown UO card that may be 9E 10E 11E 12E PartNumber 000 000000 00x Base Address Y 78C00 Options None Jumper E1 E4 El Jumper E6A E6H 1 2 Low HVariables None Appendix A Using the UMAC Config Pro2 Tool 61 ACC 11E User Manual Next the correct accessory number can be entered and a list of suggested M Variable definitions can be accessed or downloaded Right click on Unknown and select Define Accessory UB umacConfigPro2 Yer 4 0 lel x File Tools View Help B Define Delete Down About m L File File With E Select Umac Parts CPU U
93. nknown Auto det N E scription Unknown UO card that may be 9E 10E 11E 12E riNumber 000 000000 00x Define T se Address Y 78C00 Delete Manualiecessori tions None Jumper E1 E4 El Jumper E6A E6H 1 2 Low Variables None m R ma 6 a a a 2 eBEGA EGR ESC EBD E6F EGG E6H Click on the Next button Define Accessory Board Wizard Step 1 Select Accessory Board from the list Step 2 Verify Accessory Board Base Addresss by the Jumper Setting Jumper E1 E4 El Jumper EBA EBH 1 2 Low lt Back Cancel Appendix A Using the UMAC Config Pro2 Tool 62 ACC 11E User Manual Select the accessory type and click Next Select Accessory board you want to add in your system If your board not display in the list of boards Add other boards for setting your board Verify the jumper settings and click Next Jumper Setting You can see auto detected Jumper E1 E4 and EBA EBH setting If that jumper set is not corrected you can change Jumper Setting Address Select E1 2 ES Es ESA EEH Pya Saec EA C 230134 Mid bits 8 15 C 45 High bits 16 23 lt Back Cancel Appendix A Using the UMAC Config Pro2 Tool 63 ACC 11E User Manual Click Next vic OTgurduor y d H H 3 1 4 EBAH Type Address Macro El 12 Controlord 078C07 0 8
94. nly used for initial configuration of the IC These values are used to access the setup registers at the other addresses After the configuration is finished a zero is written to Bit 6 and 7 so that the data registers can be accessed Appendix D The Control Word 90
95. ntroller by damaging components or causing electrical shorts When our products are used in an industrial environment install them into an industrial electrical cabinet or industrial PC to protect them from excessive or corrosive moisture abnormal ambient temperatures and conductive materials If Delta Tau Data Systems Inc products are directly exposed to hazardous or conductive materials and or environments we cannot guarantee their operation A Warning identifies hazards that could result in personal injury or death It precedes the discussion of interest WARNING A Caution identifies hazards that could result in equipment damage It precedes the discussion of interest Caution A Note identifies information critical to the user s understanding or EY use of the equipment It follows the discussion of interest Note ACC 11E User Manual MANUAL REVISION HISTORY REV DESCRIPTION DATE CHG APPVD 1 ADDED CE DECLARATION 06 07 06 CP SF 2 REVS TO J1 amp J2 PINS 8 amp 15 P 31 05 11 07 CP AO 3 REVS TO ELEC SPECS P 3 07 27 07 CP BP ADDED UL SEAL TO MANUAL COVER UPDATED AGENCY APPROVAL SAFETY SECTION 5 REFURBISHED ENTIRE MANUAL 12 17 12 GS R N ACC 11E User Manual Declaration of Conformity Application of Council Directive 89 336 EEC 72 23 EEC Manufacturers Name Delta Tau Data Systems Inc Manufacturers Address 21314 Lassen Stree
96. onfig Pro2 Tool UE umacConfigPro2 Yer 4 0 File Tools View Help 22 m m m q Select Define Delete Fil File With Down About Umac Parts M Variable Address Macro Description cru M3307 Y 078007 0 8 Control Word Board Control Word Board ih 24 2 Auto det M3300 Y 078C00 0 8 Board Inputl Board Inputl El ACC 11E Manual M3301 Y 078C01 0 8 Board1_Input2 Board Input2 i Part Number 3R0 603307 10 M3302 Y 078C02 0 8 Board1_Input3 Board Input3 Description M3303 Y 078C03 0 8 Board1_Outputl Board Dutputl M3304 Y 078C04 0 8 Board1_Dutput2 Board1 Dutput2 M3305 4078 05 0 8 Board Output Board Dutput3 M3310 Y 078C00 0 1 Board Bu Board Bit M3311 Y 078000 1 1 Board1_Bitl Board 811 M3312 Y 078C00 2 1 Board1_Bit2 Board Bit2 M3313 Y 078C00 3 1 Board1_Bit3 Board Bit3 M3314 Y 078C00 4 1 Board 814 Board Bit4 M3315 Y 078000 5 1 Board1_Bit5 Board1 Bit5 M3316 Y 078C00 5 1 Board1_Bit6 Board Bit6 M3317 Y 078C00 7 1 Boardl Bit Board Bit M3318 Y 078C01 0 1 Board Du Board Bit8 M3319 Y 078001 1 1 Board Du Board Bit9 M3320 Y 078C01 2 1 Board Bitl Board Bit10 M3321 Y 078C01 3 1 8111 Board 8111 3322 Y 078C01 4 1 Board Bit12 Board Bit12 M3323 Y 078001 5 1 Board Bit13 Board1 Bit13 M3324 Y 078CU1 5 1 Board Bit14 Board Bit14 M3325 Y 078C01 7 1 Board Bit15 Board Bit15 M3326 Y 078C02 0 1 Board Bit15 Board Bit16 M3327 Y 078002 1 1 Board Bit17 Board M3328 Y 078C02 2 1 Board
97. or middle Note byte addressing and then a third card 1f present set for high byte addressing e The 24 bit node registers used with MS anynode MI71 must be at consecutive addresses A save MSSA V anynode followed by a reset MS anynode at Ey the MACRO station is necessary for MI71 transfers to take effect Note Once a transfer is enabled the I O data is copied automatically by the firmware into the ring controllers node registers 7XXXX where it is accessible to the user However the MACRO protocol limits handling of these registers to full words 16 or 24 bit The inputs can be read directly in full word assignments The outputs can be written to directly in full word assignments but cannot report their current state Reading the state of inputs can be done directly from I O node EY registers 7XXXX using full word assignments Note E 7XXXX using full word assignments however reading the state of Writing to outputs can be done directly to I O node registers outputs is not possible Note Using ACC 11E with UMAC MACRO Station 39 ACC 11E User Manual Creating input and output image mirrored words in a PLC program allows bitwise assignments full user access and state reporting The following diagram illustrates the basic concept of mirroring 7XXXX PLC program If inputs state has changed Copy full word to unused memory location If user outputs have changed Cop
98. ppendix provides suggested M Variables for all twelve possible ACC 11E address settings Base Address 78C00 Low Byte Single bit variables used M7000 Y M7001 Y M7002 Y M7003 gt Y M7004 gt Y M7005 gt Y M7006 gt Y M7007 gt Y M7008 gt Y M7009 Y 0 Y 078C01 3 2 gt 21 3 Y 4 5Y bay 6 gt Y Tesi 8 Y 9 Y M7020 gt Y M7021 gt Y M7022 5Y M7023 5Y M70 M70 M70 M70 M70 M70 M70 M70 M70 M70 1 gt Y M7024 gt Y M7025 Y M7026 gt Y 078C03 3 M7028 5Y M7029 5Y M7030 5Y M7031 gt Y M7032 Y M7033 5Y M7034 5Y M7035 5Y M7036 5Y M7037 5Y M7038 5Y M7039 gt Y M7040 Y M7041 gt Y 5078 05 2 M7043 gt Y 078C05 4 M7045 Y M7046 Y M7047 Y M7027 Y M7042 gt Y M7044 gt Y Byte wide variabl M3300 5Y M3301 5Y M3302 Y M3303 gt Y M3304 gt Y M3305 Y M3306 Y M3307 Y 078C00 0 078C00 1 078C00 2 078C00 3 078C00 4 078C00 5 078C00 6 078C00 7 078C01 0 078C01 1 078C01 2 078C01 4 078C01 5 078C01 6 078C01 7 078C02 0 078C02 1 078C02 2 078C02 3 078C02 4 078C02 5 078C02 6 078C02 7 078C03 0 078C03 1 078C03 2 078C03 4 078C03 5 078C03 6 078C03 7 078C04 0 078C04 1 078C04 2 078C04 3 078C04 4 078C04 5 078C04 6 078C04 7 078C05 0 078C05 1 078C05 3 078C05 5 078C05 6 078C05 7
99. pply 12VDC 24VDC TB2 BOTTOM REFERENCE 12 24 VDC amp 2 OUTPUT1 OUTPUT2 OUTPUT3 OUTPUT4 OUTPUT5 OUTPUT6 OUTPUT7 OUTPUTS OUTPUT9 OUTPUT10 OUTPUT11 Hii OUTPUT12 OUTPUT13 OUTPUT14 OUTPUT15 T OUTPUT16 OUTPUT17 OUTPUT18 OUTPUT19 OUTPUT20 OUTPUT21 OUTPUT22 OUTPUT23 mi OUTPUT24 21 23 Layouts and Pinouts TB3 BOTTOM 12VDC 24VDC 12 24 VDC Power Supply Sinking Outputs OUTPUT6 OUTPUT9 OUTPUT21 OUTPUT22 E OUTPUT23 EE OUTPUT24 TB2 BOTTOM REFERENCE z 12 24 VDC emaan z REFERENCE 23 TB3 BOTTOM 52 ACC 11E User Manual D Sub Option J1 Top Inputs 1 thru 12 Os Os Of O15 O2 1 O14 O13 O12 On Oto Si Front View Pin Description 1 Input 1 nput 3 nput 5 nput 7 nput 9 Input 11 7 Reference Voltage for Inputs 1 8 8 Reference Reference Voltage for Inputs 17 24 9 wm Sinking Sourcing 12 24V for sinking OV for sourcing 13 Input Input 10 14 Input Input 12 15 Reference Reference Voltage for Inputs 9 16 12 24V for sinking OV for sourcing J2 Top Inputs 13 thru 24 Os OT Os Os O4 O3 Os Ou O12 On Oto Oa 1 Qe Front View 3 ipt lmus 0 6 ma mp3
100. ptr amp 0 HighBitInCorrectLocation gt gt 8 lt lt 8 return Using ACC 11E with Power UMAC 21 ACC 11E User Manual Header and Source File The code for accl1e h and accl1e c given below contains the definitions for using the above functions prototypes and the above listed functions acc11 h should be included whenever using the above ACC 11E C code The files acclle h and 11 must be put into the same folder as the C program BGCPLC RTICPLC or Background C Program tinclude acclle h Below is the full code for both acc11e h and accl11e c acclle h include lt gplib h gt include RtGpShm h Global Rt Gp Shared memory pointers 7 5 5 a aaa m mm m m m z Fm m m z m F H F F F FE m m H m m Fm H m m Fi The following is a projpp created file from the User defines Ss aaa asa aaa SH SS SS SS SS O SS SS O SS SS ss include Include pp proj h Corresponds to El installed on ACC 11E Turbo base address of 78C00 define ACCIIE BaseAddressOffset EI 0xA00000 Corresponds to E2 installed on ACC 11E Turbo base address of 78D00 define ACCIIE BaseAddressOffset E2 0xB00000 Corresponds to E3 installed on ACC 11E Turbo base address of 78E00 define ACCIIE BaseAddressOffset E3 0xC00000 Corresponds to E4 installed on ACC 11E Turbo base address of 78F00 define ACCIIE BaseAddressOffset E4 OxD00000
101. r 22 User Written ts 26 Setting Up th Control Uorlik 28 USING ACC 11E WITH UMAC MACRO STATION 30 Quick Review Nodes and Addressiig ss sese iii 30 Setting Up The Control Word 33 Transferring Data Points over UO Nod iia ds 35 Preparing for I O Data Transfer on the MACRO16 Station 36 MS anynode MI71 24 Bit TEASER 37 Table of Contents 4 ACC 11E User Manual MSfanynode M169 and MI70 16 Bit Transfer 42 MS anynode MI171 M1172 and MII73 24 Bit 16 Bit Transfer 46 LAY OUTS S PINOUT 47 Pomli otlu A ma a 47 Witing Considerations al bb b ba id ual 48 amd m r MU M Pte uM 49 TBI Top Inputs 1 thru iii 49 TB2 T p Inputs T3 thru 49 TBS Top Reference Voltages is 49 Wiring Input Terminal 50 TBI Bottom Outputs L thr p G 51 TB2 Bottom Outputs 13 thru m A RA 51 TES Bottom Reference EE 51 Wiring Output Terminal Blocks 52 o IIA 53 JI Top Ipputs I A Was A BRO Reno 53 J2 Top Inp ts N
102. r Manual Wiring Input Terminal Blocks 12VDC 24VDC 12 24 VDC Power Supply Sourcing Inputs INPUT2 INPUT3 INPUTA INPUTS INPUT6 INPUT7 INPUT8 INPUTS TB2 TOP REFERENCE 1 8 21 REFERENCE 9 16 Y 2 REFERENCE 17 24 23 TB3 TOP Layouts and Pinouts Sinking Inputs 12 24 VDC Power Supply 2 o W INPUT2 INPUT3 12VDC 24VDC INPUT4 INPUT5 INPUT6 INPUT7 INPUT8 INPUT9 INPUT10 INPUT12 INPUT24 TB2 TOP REFERENCE 1 8 z REFERENCE 9 16 2 REFERENCE 17 24 23 TB3 TOP 50 ACC 11E User Manual u 228 8 8101112 8 8101112 12313 123211 TB1 Bottom TB2 Bottom TB3 Bottom Outputs 1 thru 12 Outputs 13 thru 24 E Pin Pin Function Description Pin Function Description 1 Output Output 1 1 Output Output 13 1 Reference 0V p p p p Output Output 1224 VBC Output 83 Output FS 11 2 3 6 e Output Oupusi 7 Op Output 20 9 9 Output Output 21 10 11 11 Output Output 23 12 Output Output 12 12 Output Output 24 Can be ordered Sinking or Sourcing See E16 thru E21 jumper settings in section titled Addressing and Jumper Settings Note Layouts and Pinouts 51 ACC 11E User Manual Wiring Output Terminal Blocks Sourcing Outputs 12 24 VDC Power Su
103. rd Card Card Card Card Card Card 5 Card 5 Card Card Card Card Card Card LH Ln Ln Ln OT OT O a OT O 5 5 5 5 5 5 Input 1 Input 2 nput nput nput nput nput nput nput 9 Input 10 nput nput nput nput nput nput Input 17 Input 18 Input 19 Input 20 nput 21 nput 22 nput 23 nput 24 Output 1 Output 2 Output Output Output Output Output Output Output 9 Output 10 Output Output Output Output Output Output Output 17 Output 18 Output 19 Output 20 Output 21 Output 22 H QO o OT is CO OY Ot vs LU N QO OT vs CO OY OT gt LU N Output 23 Output 24 1 0 Card 1 0 Card 1 0 Card 1 0 Card 1 0 Card 1 0 Card 1 0 Card 1 0 Card 5 5 5 5 5 5 5 5 les used for accessing 1 0 points pover on configuration 1 000 07 as 1 008 15 as 1 016 23 as 1 024 31 as 1 032 39 as 1 040 47 as latch inputs control regi byte byte byte byte byte byte ster Appendix B Full Turbo UMAC M Variable Mappings 70 ACC 11E User Manual Base Address 78D00 High Byte Single bit variabl M7240 Y M7241 gt Y M7242 gt Y M7243 gt Y M7244 gt Y M7245 Y M7246 Y M7247 Y M7248 Y M7249 Y M7250 Y M7251 gt Y M7252 Y M7253 5
104. ronmental Specifications EE 7 Electrical Specifications 7 Physical E e 7 Agency Approval and kal da 8 Ap PUn PEPPER E 9 Turbo Povver UMAC and MACRO Station Jumper 36 1 5 9 Legacy MACRO Station Address Jumper Settings eee eee eee eee 9 Sinking or Sourcing Output Select rM 10 VO Gate Data Clock Select Mr 10 Hardware Address Limitations 11 USING ACC TIE WITH TURBO UMA Connie 13 Configuring The Control E 13 Accessing VO data points M Variables eiecit tres inita etate nbn aen en ande unn 14 USING ACC 11E WITH POWER UMAC SCRIPT PROGRAMING 16 Configuring the Control D 16 Accessing I O Data Points Pontes 17 Suggested TE 17 USING ACC 11E WITH POWER UMAC C PROGRAMINEG 18 ona NB CINE ACCESS T 18 Function for Setting the Control Word ACCIIE SetControlWord 18 Function for Reading the State of Inputs ACCIIE_GetlnputStatel 19 Function for Reading the State of Outputs ACCIIE GetOutputState 19 Function for Writing to Outputs ACCIIE SetOutputState 20 Header r
105. sed Reserve unused Reserve unused pointer pointer pointer to to to lst 16 bit 2nd 16 bit 3rd 16 bit pointer pointer pointer pointer pointer pointer Self referenced Self referenced Initialize 0 on download Initialize 0 on download to to to to to to memory memory memory memory Inputs state changed hold 16 bit inputs hold 8 bit inputs and 8 bit outputs hold 16 bit outputs register 16 inputs register 8 inputs and 8 outputs register 16 outputs hold 16 bit input mirror word hold 8 input mirror word hold 8 output mirror word hold 16 bit output mirror word latch current state of 8 output bits latch current state of 16 output bits register to hold 16 inputs register to hold 8 inputs register to hold 8 outputs register to hold 16 outputs Update inputs mirror word to match current state Update inputs mirror byte to match current state Outputs state changed Update state of output mirrors Update outputs With the ACC 11E or any other 24In 24Out card the inputs are copied through the entire first 16 bit register and the first byte of the EY second 16 bit register The outputs are copied through the second Note byte of the second 16 bit register and the entire third 16 bit register Turbo PMAC unusued open memory registers can be either X or Y located at X Y 10F0 10FF total of 32 EY Make sure that the registers chosen for mirroring are not used in
106. sires to read or modify Inputs are numbered 1 24 on ACC 11E The function will return the state of the specified pin as an unsigned int 0 pin is low 1 pin is high unsigned int ACC11E GetInputState unsigned int BaseAddressOffset unsigned int ByteSelect unsigned int InputNumber BaseAddressOffset 1 0 Card Base Address Offset InputNumber Input Pin Number 1 24 ByteSelect 1 for lowest 8 bits 2 for middle 8 bits 3 for high 8 bits Output State of the 1 0 pin specified volatile unsigned int ioptr Create 1 0 pointer Compute location for high bit unsigned int HighBitInCorrectLocation 0 ShiftValue InputNumber ShiftValue InputNumber 8 8 ByteSelect 1 HighBitInCorrectLocation 1 lt lt ShiftValue Shift bit to that location ioptr piom BaseAddressOffset 4 Initialize pointer ioptr InputNumber 8 Increment to register containing the 1 0 bit Return state of 1 0 point return ioptr gt gt 8 amp HighBitInCorrectLocation gt gt ShiftValue Function for Reading the State of Outputs ACC11E GetOutputState Three parameters must be passed in the calling function BaseAddressOffset One of the four base addresses jumper selected ACC 11E can take 0xA00000 0xB00000 0xC00000 0xD00000 Using ACC 11E with Power UMAC 19 ACC 11E User Manual ByteSelect The byte used jumper selected for the I O bits on this card 1 for low byte 2 for middle byte 3 for
107. ss and for within the base address jumpers E6A E6H select whether the low middle or high byte will be used Turbo Power UMAC and MACRO Station Settings TOWER p TURBO MACRO CS10 578 00 0 8 Y 8800 0 8 A00000 8 8 lorlo or CS10 Y 78C00 8 8 Y 8800 8 8 A00000 16 8 ON OFF OFF OFF 2103 oa v srscoo es viseson168 aana s 0 on orr orr or as E6A E6H Layout Diagram 1 2 3 4 5 Pop O O 6 BOB O O O E6F O O O E6GO O O 6 O Legacy MACRO Station Address Jumper Settings Jumpers Chip Select MACRO El E2 E3 E4 CS10 FFEO ON OFF OFF OFF CS12 FFE8 OFF ON OFF OFF CS14 FFFO OFF OFF ON OFF Addressing and Jumper Settings 9 ACC 11E User Manual Sinking or Sourcing Output Select Jumpers El6 thru E21 generally should be left at factory defaults They must not be changed without also changing their respective WARNING buffer IC ULN2803A for sinking or UDN2981A for sourcing Jumpers Descriptions 1 2 Outputs 1 thru 8 Sinking 2 3 Outputs 1 thru 8 Sourcing 1 2 Outputs 9 thru 16 Sinking 2 3 Outputs 9 thru 16 Sourcing 1 2 Outputs 17 thru 24 Sinking 2 3 Outputs 17 thru 24 Sourcing E18 amp E19 E20 amp E21 UO Gate Data Clock Select Jumper Function E5 Servo Clock 2 3 Phase Clock default Addre
108. ssing and Jumper Settings ACC 11E User Manual Hardware Address Limitations The ACC 11E has a hardware address limitation relative to the newer type B series of UMAC high speed VO cards These new VO cards have four base addresses per chip select CS10 CS12 CS14 and CS16 This enables these cards to have up to 16 different addresses The type A cards have one base address per chip select but also have the low byte middle byte and high byte type of an addressing scheme and thus allow for a maximum of twelve of these I O cards Nani Tvpe Categor Possible Number Maximum Number yp gory of Addresses of Cards in 1 Rack ACC 9E A General I O 4 ACC 10E A General I O 4 12 ACC 11E A General I O 4 ACC 12E A General I O 4 ACC 14E B General I O 16 ACC 28E B Analog I O 16 ACC 36E B Analog I O 16 16 ACC 53E B Feedback 16 ACC 57E B Feedback 16 ACC 58E B Feedback 16 ACC 59E B Analog I O 12 12 ACC 65E B General I O 16 ACC 66E B General I O 16 16 ACC 67E B General I O 16 ACC 68E B General I O 16 ACC 84E B Feedback 12 12 Addressing Type A and Type B accessory cards requires attention to the following set of rules Populating Rack with Type A Cards Only no conflicts In this mode the card s can use any available Address Type A cards can have up to 4 different base addresses Because each card can be setup to use the lower middle or high byte of a specific Es
109. ster containing the 1 0 bit Return state of I O point return ioptr gt gt 8 amp HighBitInCorrectLocation gt gt ShiftValue Using ACC 11E with Power UMAC 23 ACC 11E User Manual void 11 SetOutputState unsigned int BaseAddressOffset unsigned int ByteSelect OutputNumber unsigned int State Input BaseAddressOffset I O Card Base Address offset ByteSelect 1 for lowest 8 bits 2 for middle 8 bits 3 for high 8 bits PinNumber Output Pin Number 1 24 State Desired digital state of pin 0 OFF 1 ON 7 volatile unsigned int ioptr Create I O pointer Compute location for high bit unsigned int HighBitInCorrectLocation OutputNumber HighBitInCorrectLocation 1 lt lt OutputNumber 8 8 ByteSelect ioptr piom BaseAddressOffset 4 Initialize pointer unsigned int ioptr OutputNumber 8 3 Increment to register containing the I O bit if State 1 If the user wants the pin to be ON high true Logical OR with the bit the user desires to activate ioptr HighBitInCorrectLocation else Logical AND the register with a 0 in the desired location to bring the pin s state low right shift to push out garbage in lowest 8 bits then shift back up 8 bits to have data in the proper location ioptr amp 0 HighBitInCorrectLocation gt gt 8 lt lt 8 return Using ACC 11E with Power UMAC 24 ACC 11E User Manual
110. t Chatsworth CA 91311 USA We Delta Tau Data Systems Inc hereby declare that the product Product Name Accessory 11E Model Number 603307 And all of its options conforms to the follovving standards EN61326 1997 Electrical equipment for measurement control and laboratory use EMC requirements EN55011 1998 Limits and methods of measurements of radio disturbance characteristics of information technology equipment EN61010 1 Electrical equipment for measurement control and laboratory use Safety requirements EN61000 3 2 1995 Limits for harmonic current emissions Criteria A A14 1998 EN61000 3 3 1995 Limitation of voltage fluctuations an d flicker in low voltage supply systems for equipment vvith rated current 16A Criteria B EN61000 4 2 1995 Electro Static Discharge immunity test Criteria B A1 1998 EN61000 4 3 1995 Radiated radio frequency electromagnetic field immunity test A1 1998 Criteria A EN61000 4 4 1995 EN61000 4 5 1995 Electrical fast transients burst immunity test Criteria B EN61000 4 6 1996 Surge Test Criteria B EN61000 4 11 1994 Conducted immunity test Criteria A Voltage dips test Criteria B and C Date Issued 11 May 2006 Place Issued Chatsworth California USA Holande land Yolande Cano Quality Assurance Manager Mark of Compliance e ACC 11E User Manual Table of Contents INTRODUCTION eiit 6 SPECIFA ATIONS O Z Um D m 7 Envi
111. t be passed in the calling function BaseAddressOffset One of the four base addresses jumper selected ACC 11E can take 0xA00000 0xB00000 0xC00000 0xD00000 ByteSelect The byte used jumper selected for the I O bits on this card 1 for low byte 2 for middle byte 3 for high byte The function is of type void so it will not return any values void ACC11E SetControlWord unsigned int BaseAddressOffset unsigned int ByteSelect x Input BaseAddressOffset IO Card Base Address offset ByteSelect 1 for lowest 8 bits 2 for middle 8 bits 3 for high 8 bits ControlWord Control word value to which to set the card s Control Word m volatile unsigned int ioptr Create I O pointer ioptr piom BaseAddressOffset 4 7 Initialize 1 0 pointer to Control Word register ioptr 7 lt lt 8 ByteSelect Write Control Word value to register return See Appendix for control word details and explanations Note Using ACC 11E with Power UMAC 18 ACC 11E User Manual Function for Reading the State of Inputs ACC11E_GetInputState Three parameters must be passed in the calling function BaseAddressOffset One of the four base addresses jumper selected ACC 11E can take 0xA00000 0xB00000 0xC00000 0xD00000 ByteSelect The byte used jumper selected for the I O bits on this card 1 for low byte 2 for middle byte 3 for high byte InputNumber The number of the Input pin whose state one de
112. t20 gt u io D00008 20 1 I O Card 020 ptr IoCard11Pt21 gt u io D00008 21 1 I O Card 021 ptr IoCard11Pt22 u io D00008 22 1 I O Card 022 ptr IoCard11Pt23 gt u io D00008 23 1 I O Card 023 ptr IoCard11Pt24 gt u io D0000C 16 1 I O Card 024 ptr IoCard11Pt25 gt u io D0000C 17 1 I O Card 025 ptr IoCard11Pt26 gt u io D0000C 18 1 I O Card 026 ptr ToCard11Pt27 gt u io D0000C 19 1 1 0 Card 027 ptr IoCard11Pt28 gt u io D0000C 20 1 I O Card 028 ptr IoCard11Pt29 gt u io D0000C 21 1 I O Card 029 ptr IoCard11Pt30 gt u io D0000C 22 1 I O Card 030 ptr IoCard11Pt31 gt u io D0000C 23 1 I O Card 031 ptr IoCard11Pt32 gt u io D00010 16 1 I O Card 032 ptr IoCard11Pt33 gt u io D00010 17 1 I O Card 033 ptr IoCard11Pt34 gt u io D00010 18 1 I O Card 034 ptr ToCard11Pt35 gt u io D00010 19 1 I O Card 035 ptr IoCard11Pt36 gt u io D00010 20 1 I O Card 036 ptr IoCard11Pt37 u io D00010 21 1 I O Card 037 ptr IoCard11Pt38 gt u io D00010 22 1 I O Card 038 ptr IoCard11Pt39 gt u io D00010 23 1 I O Card 039 ptr IoCard11Pt40 gt u io D00014 16 1 I O Card 040 ptr IoCard11Pt41 gt u io D00014 17 1 I O Card 041 ptr IoCardllPt42 u io D00014 18 1 I O Card 042 ptr ToCard11Pt43 gt u io D00014 19 1 I O Card 043 ptr IoCardllPt44 u io D00014 20 1 I O Card 044 ptr ToCard11Pt45 gt u io D00014 21 1 I O Card 045 ptr IoCardllPt46 u io D00014 22 1
113. tain bit values A set of pointer variables can be predefined to each I O register Alternatively a set of functions can be created for reading and writing that will automatically point to read from and or modify the appropriate memory location given the card s base address byte select and pin number Using ACC 11E with Power UMAC 27 ACC 11E User Manual Setting Up the Control Word The Control Word must be set equal to 7 every startup The function of each bit in the control word is as follows VO Bits Function Inputs 1 8 Inputs 9 16 Inputs 17 24 Outputs 1 8 Outputs 9 16 Outputs 17 24 Register Select Register Select Example Setting the Control Word in C in a Background C Program This example Background C Program sets the Control Word equal to 7 for an ACC 11E at base address offset A00000 with low byte addressing using a Background C Program and then returns include lt gplib h gt Global Gp Shared memory pointer finclude Include pp proj h finclude acclle h int main void InitLibrary 11 SetControlWord ACC11E BaseAddressOffset El ByteSelectLow CloseLibrary return 0 In order for this program to run at startup make sure to enable that option For example here a project called MultithreadedIO has been created with the 11 controlword program created under C Language Background Programs Then from within the IDE Solution Explorer tree go
114. te OutputNumber The number of the Output pin whose state one desires to read or modify Outputs are numbered 1 24 on ACC 11E State The state to which the desires to set the UO pin 0 pin is OFF low false 1 pin is ON high true Using ACC 11E with Power UMAC 20 ACC 11E User Manual The function is of type void so it will not return any values void 11 SetOutputState unsigned int BaseAddressOffset unsigned int ByteSelect unsigned int OutputNumber unsigned int State Input BaseAddressOffset I O Card Base Address offset ByteSelect 1 for lowest 8 bits 2 for middle 8 bits 3 for high 8 bits PinNumber Output Pin Number 1 24 State Desired digital state of pin 0 OFF 1 ON volatile unsigned int ioptr Create I O pointer Compute location for high bit unsigned int HighBitInCorrectLocation OutputNumber HighBitInCorrectLocation 1 lt lt OutputNumber 8 8 ByteSelect ioptr piom BaseAddressOffset 4 Initialize pointer ioptr OutputNumber 8 3 Increment to register containing the I O bit if State 1 If the user wants the pin to be ON high true Logical OR with the bit the user desires to activate ioptr HighBitInCorrectLocation else Logical AND the register with a 0 in the desired location to bring the pin s state low right shift to push out garbage in lowest 8 bits then shift back up 8 bits to have data in the proper location io
115. te Turbo PMAC unusued open memory registers can be either X or Y located at X Y 10F0 10FF total of 32 EY Make sure that the registers chosen for mirroring are not used in Note another process Using ACC 11E with UMAC MACRO Station 40 ACC 11E User Manual The I O data is now available in the pre defined open memory registers Bitwise maping can be implemented for direct and convenient user access Inputs define define define define define define define define define define define define define define define define define define define define define define define define define define define define define define define define define define define define define define define define define define define define define define define define Outputs nputl nput2 nput3 nput4 nput5 nput6 nput7 nput8 nput9 nput10 nput11 nput12 nput13 nput14 nput15 nput16 nput17 nput18 nput19 nput20 nput2 nput22 nput23 nput24 Output Output2 Output3 Output4 Output5 Output6 Output7 Output8 Output9 Output Output Output Output Output Output Output Output Output Output Output2 Output2 Output2 Output2 Output2 M3300 M3301 M3302 M3303 M3304 M3305 M3306 M3307 M3308 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 M3309 M33 M33 M33 M33 M33 M33 M33 M33 M33 M33 M3320 M3321 M3322 M3323 QO JO O vs LU sN O
116. th node activation on both the Ring Controller and MACRO Station Thus any node s used Note in subsequent example s have to have been enabled previously It is assumed that communication over the MACRO ring has already Generally there are three basic transfer methods The decision of which to use might depend on what types of UO cards and how many are being used The MI71 method is the typical choice for handling up to six ACC 11E cards in one rack MACRO Station IC 0 Transfer MI Variable Used For Transfer Type MI71 Most Applications 24 bit Special cases if MI69 MI70 e 24 bit registers are already in use 16 Bit e More than six cards are needed Special cases if M1171 MI172 t is desired to fit 3 cards into 2 I O nodes 24 Bit 16 Bit MIS e More than six cards needed MACRO Station ICH Transfer MI Variable Used For Transfer Type M11071 Most Applications 24 bit Special cases if M11069 MI1070 e 24 bit registers are already in use 16 Bit e More than six cards are needed Special cases if e 1615 desired to fit 3 cards into 2 I O nodes 24 Bit 16 Bit e More than six cards needed 171 M11172 MI 173 The MACRO16 CPU is populated with 2 MACRO ICs IC 0 and 1 each of which has its own I O transfer variables Note Using ACC 11E with UMAC MACRO Station 35 ACC 11E User Manual Preparing for UO Data Transfer on the MACRO16 Station
117. tor IC used is a PS2705 4NEC ND quad photo transistor output type This IC allows the current to flow from return to flag sourcing or from flag to return sinking The output drivers are organized in a set of three 8 bit groups Each group or byte may be ordered either with current sourcing drivers default or with current sinking drivers The default configuration of this accessory board uses UDN2981 current sourcing drivers for the three 8 bit output groups With this configuration the current drawn from each output line should be limited to 100 mA at voltage levels between 12 V and 24 V Custom configurations are available for current sinking applications In current sinking configurations one ULN2803 driver is used per each 8 bit output group Each open collector output line can sink up to 100 mA when pulled up to a voltage level between 12 V and 24 V external pull up resistors are not supplied Layouts and Pinouis A8 ACC 11E User Manual Terminal Block Option 2434 2934 m TB3 Top Reference Voltages Pin 4 Function Description TB2 Top Inputs 13 thru 24 Pin Function Description Input Input 13 6 Tone 8 nur maan 9 Int Inpur 21 1 12 Input Input 12 12 Input Input 24 Inputs 9 16 Inputs 17 24 Can be wired for sinking or sourcing 12 24V reference for sinking OV reference for sourcing Note Layouts and Pinouts 49 ACC 11E Use
118. tr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr ptr oCard3Pt00 gt u oCard3Pt01 gt u oCard3Pt02 gt u oCard3Pt03 gt u oCard3Pt04 gt u oCard3Pt05 gt u oCard3Pt06 gt u oCard3Pt07 gt u oCard3Pt08 gt u oCard3Pt09 gt u oCard3Pt10 gt u oCard3Pt11 gt u oCard3Pt12 gt u oCard3Pt13 gt u oCard3Pt14 gt u oCard3Pt15 gt u oCard3Pt16 gt u oCard3Pt17 gt u oCard3Pt18 gt u oCard3Pt19 gt u oCard3Pt20 gt u oCard3Pt21 gt u oCard3Pt22 gt u oCard3Pt23 gt u oCard3Pt24 gt u oCard3Pt25 gt u oCard3Pt26 gt u oCard3Pt27 gt u oCard3Pt28 gt u oCard3Pt29 gt u oCard3Pt30 gt u oCard3Pt31 gt u oCard3Pt32 gt u oCard3Pt33 gt u oCard3Pt34 gt u oCard3Pt35 gt u oCard3Pt36 gt u oCard3Pt37 gt u oCard3Pt38 gt u oCard3Pt39 gt u oCard3Pt40 gt u oCard3Pt41 gt u oCard3Pt42 gt u oCard3Pt43 gt u oCard3Pt44 gt u oCard3Pt45 gt u oCard3Pt46 gt u oCard3Pt47 gt u io 10 ro 10 LO io io io io Lo ro io io TOs io io io io iO io LOS io io io io io io qos 164 LO io io io io ro io io io dO ro io io io ios io qos io io A00000 24 A00000 25 A00000 26 A00000 27 A00000 28 A00000 29 A00000 30 A00000 31 A00004 24 A00004 25 A00004 26 A00004 27 A00004 28 A00004 2
119. x for control word details and explanations Note Using ACC 11E with Power UMAC 16 ACC 11E User Manual Accessing l O Data Points Pointers The simplest way to access I O points on the ACC 11E is to define pointer variables M Variables that point to each bit on the I O device Suggested M Variables Base offset A00000 low byte addressing Single bit variables used for accessing I O points ptr Inputl gt u io A00000 8 1 ptr Input2 5u io A00000 9 1 ptr Input3 gt u io A00000 10 ptr Input4 5u io A00000 1 ptr Input5 ou io AQ0000 12 ptr Input6 5u io A00000 13 ptr Input7 gt u io A00000 14 ptr Input8 5u io A00000 15 ptr Input9 5u io A00004 8 1 ptr Inputl0 gt u io A00004 9 1 ptr Inputil u io A00004 10 ptr Input12 5u io A00004 11 ptr Input13 5u io A00004 12 ptr Input14 5u io A00004 13 4 5 LA LA a ta Lo ptr Input15 5u io A00004 ptr Input16 5u io A00004 ptr Input17 5u io A00008 8 ptr Input18 5u io A00008 9 1 ptr Input19 5u io A00008 10 ptr Input20 gt u io A00008 11 ptr Input21 5u io A00008 12 ptr Input22 5u io A00008 13 4 ptr Input23 u io A00008 ptr Input24 u io A00008 ptr Outputl gt u io A0000C 8 ptr Output2 u io A0000C 9 1 ptr Output3 gt u io A0000C 10 ptr Output4 5u io A0000C ptr Output5 5u io A0000C 12 ptr Output6 5u io A0000C 13 4 5 ptr Output7 u io A0000C ptr Output8 gt u io A0000C 15 ptr Output9 u
120. y full word to unused memory location Example For example 1 above using MI71 24 bit transfer to process one ACC 11E over MACRO using I O nodes 2 and 3 the following assignments and PLC program demonstrate the mirroring implementation define Inputs M4000 M Variable pointer to hold 24 bit inputs define Outputs M4001 M Variable pointer to hold 24 bit outputs Inputs gt X 78420 0 24 U 1 0 Node 2 24 bit register inputs Outputs X 78424 0 24 U I O Node 3 24 bit register outputs define InMirror M4002 M Variable pointer to hold inputs mirror word define OutMirror M4003 M Variable pointer to hold outputs mirror word define OutState M4004 M Variable pointer to latch current outputs state InMirror gt X 10F0 0 24 U Reserve unused memory register to hold inputs OutMirror gt Y 10F0 0 24 U Reserve unused memory register to hold outputs OutState gt Self referenced OutState 0 Initialize 0 on download Open plc 1 clear If InMirror Inputs Inputs state changed InMirror Inputs Update inputs mirror word to match current state EndIf If OutState OutMirror Outputs state changed OutState OutMirror Update state of outputs mirror word Outputs OutMirror Update outputs EndIf Close With the ACC 11E or any other 24In 24Out card the inputs are E copied through the first of the two 24 bit registers and the outputs are copied through the second of the two 24 bit registers No

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