Home

ModelSim Tutorial

Contents

1. 1 1 1 110 111 4 rid E ven EE Now before you leave this section go ahead and clear the memory instances already being viewed 4 Right click somewhere in the mem 2 pane and select Close All Interactive Debugging Commands The memory panes can also be used interactively for a variety of debugging purposes The features described in this section are useful for this purpose 1 Open a memory instance and change its display characteristics a Double click instance ram_tb dpram1 mem in the Memories tab b Right click in the memory contents pane and select Properties c Change the Address and Data Radix to Hexadecimal d Select Words per line and enter 2 e Click OK The result should be as in Figure 7 13 72 ModelSim Tutorial v6 4b Viewing And Initializing Memories Interactive Debugging Commands Figure 7 13 Original Memory Content z memory tb dpram1 mem 00000002 00000004 00000006 00000009 000000 0000000 oo0o0000e La 2 Initialize a range of memory addresses from a fill pattern 4 a Right click in the data column of ram_tb dpramI mem contents pane and select Change to open t
2. Addresses in decimal Start o End 4055 File Format Verilog Hex No addresses Verilog Binary Compress Address Radix Data Radix 4 Hexadecimal C Symbolic Decimal Binary Octal C Decimal C Unsigned Hexadecimal Wrap Fit in Window Words per Line 1 Filename nen men Browse OK For the Address Radix select Decimal For the Data Radix select Binary For the Line Wrap set to 1 word per line Type data_mem mem into the Filename field Click OK You can view the exported file in any editor Memory pattern files can be exported as relocatable files simply by leaving out the address information Relocatable memory files can be loaded anywhere in a memory because no addresses are specified ModelSim Tutorial v6 4b Viewing And Initializing Memories Initialize a Memory 2 Export a relocatable memory pattern file from the ram_tb spram2 mem instance a Select the mem 1 tab in the MDI pane to see the data for the ram_tb spram2 mem instance b Right click on the memory contents to open a popup menu and select Properties In the Properties dialog set the Address Radix to Decimal the Data Radix to Binary and the Line Wrap to 1 Words per Line Click OK to accept the changes and close the dialog d Select File gt Export gt Memory Data to bring up the Export Memory dialog box e For the Address Range
3. Debugging Tools ModelSim offers numerous tools for debugging and analyzing your design Several of these tools are covered in subsequent lessons including e Using projects Working with multiple libraries e Setting breakpoints and stepping through the source code e Viewing waveforms and measuring time e Viewing and initializing memories e Creating stimulus with the Waveform Editor e Automating simulation 14 ModelSim Tutorial v6 4b Chapter 3 Basic Simulation Introduction In this lesson you will go step by step through the basic simulation flow Figure 3 1 Basic Simulation Flow Simulation Lab Design Files for this Lesson The sample design for this lesson is a simple 8 bit binary up counter with an associated testbench The pathnames are as follows Verilog lt install_dir gt examples tutorials verilog basicSimulation counter v and tcounter v VHDL lt install_dir gt examples tutorials vhdl basicSimulation counter vhd and tcounter vhd This lesson uses the Verilog files counter v and tcounter v If you have a VHDL license use counter vhd and tcounter vhd instead Or if you have a mixed license feel free to use the Verilog testbench with the VHDL counter or vice versa Related Reading User s Manual Chapters Design Libraries Verilog and SystemVerilog Simulation and VHDL Simulation Reference Manual commands vlib vmap vlog vcom view and run ModelSim Tutorial v6 4b 15 Basic Si
4. Searched libraries C Tutorial examples tutorials verilog libraries testbenchiwork Error loading design gt Y Transcript KE b Type verror 3033 at the ModelSim gt prompt The expanded error message tells you that a design unit could not be found for instantiation It also tells you that the original error message should list which libraries ModelSim searched In this case the original message says ModelSim searched only work VHDL 1 Simulate a VHDL design with a missing resource library a In the Library tab click the icon next to the work library and double click test_counter The Main window Transcript reports a warning Figure 5 4 When you see a message that contains text like Warning vsim 3473 you can view more detail by using the verror command Figure 5 4 VHDL Simulation Warning Reported in Main Window Transcript vsim voptargs tacc test counter Note vsim 3812 Design is being optimized Warning 1 vopt 3473 Component instance dut counter is not bound Loading C QuestaSim_6 2e Beta win32 std standard Loading work test counter only H warming vsim 3473 Component instance dut counter is not bound Time Ons Iteration 0 Region test counter File C Tutorial examples tutorials vhdl libraries testbench tcounter v hd VSIM 16 gt E Transcript b Type verror 3473
5. Watch the Wave window zoom on and scroll to the time when count is 00100111 Try the bk2 bookmark as well Lesson Wrap Up This concludes this lesson 1 Select File gt Quit to close ModelSim 82 ModelSim Tutorial v6 4b ABCDEFGHIJKLMNOPQRSTUVWXYZ add wave command 55 break icon 22 breakpoints setting 22 stepping 25 _ command line mode 78 compile order changing 34 compiling your design 12 17 cursors Wave window 56 design library working type 13 error messages more information 47 external libraries linking to 46 EON EN folders in projects 37 L libraries design library types 13 linking to external libraries 46 mapping to permanently 51 resource libraries 13 working libraries 13 working creating 16 linking to external libraries 46 M mapping libraries permanently 51 memories changing values 73 initializing 69 memory contents saving to a file 67 ModelSim Tutorial v6 4b Index o options simulation 39 p projects adding items to 32 creating 31 flow overview 12 organizing with folders 37 simulation configurations 39 quit command 48 R radix command 62 run all 22 run command 21 saving simulation options 39 simulation basic flow overview 11 restarting 23 running 20 simulation configurations 39 stepping after a breakpoint 25 T Tcl using in t
6. We use the term command line mode to refer to simulations that are run from a DOS UNIX prompt without invoking the GUI Several ModelSim commands e g vsim vlib vlog etc are actually stand alone executables that can be invoked at the system command prompt Additionally you can create a DO file that contains other ModelSim commands and specify that file when you invoke the simulator 1 Create a new directory and copy the tutorial files into it Start by creating a new directory for this exercise Create the directory and copy the following files into it lt install_dir gt examples tutorials verilog automation counter v lt install_dir gt examples tutorials verilog automation stim do 78 ModelSim Tutorial v6 4b Automating Simulation Running in Command Line Mode This lesson uses the Verilog file counter v If you have a VHDL license use the counter vhd and stim do files in the lt install_dir gt examples tutorials vhdl automation directory instead 2 Create a new design library and compile the source file Again enter these commands at a DOS UNIX prompt in the new directory you created in step 1 a Type vlib work at the DOS UNIX prompt b For Verilog type vlog counter v at the DOS UNIX prompt For VHDL type counter vhd 3 Create a DO file a Open a text editor b Type the following lines into a new file list all signals in decimal format add list decimal
7. ModelSim Tutorial Software Version 6 4b 1991 2008 Mentor Graphics Corporation All rights reserved This document contains information that is proprietary to Mentor Graphics Corporation The original recipient of this document may duplicate this document in whole or in part for internal business purposes only provided that this entire notice appears in all copies In duplicating any part of this document the recipient agrees to make every reasonable effort to prevent the unauthorized use and distribution of the proprietary information This document is for information and instruction purposes Mentor Graphics reserves the right to make changes in specifications and other information contained in this publication without prior notice and the reader should in all cases consult Mentor Graphics to determine whether any changes have been made The terms and conditions governing the sale and licensing of Mentor Graphics products are set forth in written agreements between Mentor Graphics and its customers No representation or other affirmation of fact contained in this publication shall be deemed to be a warranty or give rise to any liability of Mentor Graphics whatsoever MENTOR GRAPHICS MAKES NO WARRANTY OF ANY KIND WITH REGARD TO THIS MATERIAL INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE MENTOR GRAPHICS SHALL NOT BE LIABLE FOR ANY INCIDENTAL INDIRECT SPECIAL OR
8. You may open other windows and panes with the View menu or with the view command See Navigating the Interface Run the Simulation Now you will open the Wave window add signals to it then run the simulation 1 Open the Wave debugging window a Enter view wave at the command line 20 ModelSim Tutorial v6 4b Basic Simulation Run the Simulation You can also use the View gt Wave menu selection to open a Wave window The Wave window is one of several windows available for debugging To see a list of the other debugging windows select the View menu You may need to move or resize the windows to your liking Window panes within the Main window can be zoomed to occupy the entire Main window or undocked to stand alone For details see Navigating the Interface 2 Add signals to the Wave window a Inthe Workspace pane select the sim tab b Right click test_counter to open a popup context menu c Select Add gt To Wave gt All items in region Figure 3 9 All signals in the design are added to the Wave window Figure 3 9 Using the Popup Menu to Add Signals to Wave Window Workspace instance Design unit Design unit type Visbity states GF te lt counter Fast Module acc lt full gt g Declaration er Fast Module acc lt full gt 4 View Instantiation ounter Fast Process 4 To List All itemsl t region and below Copy bur To Log All items in design
9. b Type work in the Library Name field if it isn t already entered automatically 16 ModelSim Tutorial v6 4b Basic Simulation Create the Working Design Library c Click OK ModelSim creates a directory called work and writes a specially formatted file named info into that directory The _info file must remain in the directory to distinguish it as a ModelSim library Do not edit the folder contents from your operating system all changes should be made from within ModelSim ModelSim also adds the library to the list in the Workspace Figure 3 3 and records the library mapping for future reference in the ModelSim initialization file modelsim ini Figure 3 3 work Library in the Workspace Library vital2000 Library ieee Library modelsim lib Library std Library std developerskit Library synopsys Library Ju menu Library When you pressed OK in step 3c above the following was printed to the Transcript vlib work vmap work work These two lines are the command line equivalents of the menu selections you made Many command line equivalents will echo their menu driven functions in this fashion Compile the Design With the working library created you are ready to compile your source files You can compile by using the menus and dialogs of the graphic interface as in the Verilog example below or by entering a command at the ModelSim gt prompt 1 Compile counter v and tcounter v a Sel
10. ed gil geja pane The pane fills the entire Main window Figure 3 18 ModelSim Tutorial v6 4b 27 Basic Simulation Navigating the Interface Figure 3 18 zooming in on Workspace Pane File Edit View Format Compile Simulate Add Tools Window Help test_counter Module acc lt full gt dut counter Module IMPLICIT WI test counter Process SIMPLICIT wI test counter Process HINITIALHI7 test counter Process HINITIALH23 test counter Process HINITIALH30 test counter Process acc full b Click the Zoom Unzoom pane icon in the Workspace c Click the Dock Undock pane icon in the upper right corner of the Transcript pane The Transcript becomes a stand alone window d Click the Dock Undock pane icon on the Transcript e Click the Hide pane icon in the Workspace f Select View Workspace from the menus to re open the Workspace 2 Move and resize panes a Hover your mouse pointer in the center of the Transcript title bar where the two parallel lines are interrupted by 3 lines of small dots This is the handle for the pane When the cursor is over the pane handle it becomes a four headed arrow e b Click and drag the Transcript up and to the right until you see a gray outline on the right hand side of the MDI frame When you let go of the mouse button the Transcript is moved and the MDI frame and Workspace panes shift to the left Figure 3 1
11. Click Add Existing File This opens the Add file to Project dialog Figure 4 3 This dialog lets you browse to find files specify the file type specify a folder to which the file will be added and identify whether to leave the file in its current location or to copy it to the project directory Figure 4 3 Add file to Project Dialog Add file to Project B xj File Name counter v tcounter v Browse Add file as type Folder defaut x Verilog files vi Reference from current location Copy to project directory OK b Click the Browse button for the File Name field This opens the Select files to add to project dialog and displays the contents of the current directory c Verilog Select counter v and tcounter v and click Open VHDL Select counter vhd and tcounter vhd and click Open This closes the Select files to add to project dialog and displays the selected files in the Add file to Project dialog Figure 4 3 d Click OK to add the files to the project ModelSim Tutorial v6 4b 33 Projects Create a New Project e Click Close to dismiss the Add items to the Project dialog You should now see two files listed in the Project tab of the Workspace pane Figure 4 4 Question mark icons in the Status column indicate that the file has not been compiled or that the source file has changed since the last successful compile The other columns
12. in case other users will be working with these lessons Create the directory and copy all files from lt install_dir gt examples tutorials verilog memory to the new directory If you have a VHDL license copy the files in lt install_dir gt examples tutorials vhdl memory instead 2 Start ModelSim and change to the exercise directory If you just finished the previous lesson ModelSim should already be running If not start ModelSim a Type vsim at a UNIX shell prompt or use the ModelSim icon in Windows If the Welcome to ModelSim dialog appears click Close ModelSim Tutorial v6 4b 61 Viewing And Initializing Memories View a Memory and its Contents b Select File gt Change Directory and change to the directory you created in step 1 3 Create the working library and compile the design a Type vlib work at the ModelSim gt prompt b Verilog Type vlog sp_syn_ram v dp_syn_ram v ram_tb v at the ModelSim gt prompt VHDL Type vcom 93 sp_syn_ram vhd dp_syn_ram vhd ram_tb vhd at the ModelSim gt prompt 4 Load the design a On the Library tab of the Main window Workspace click the icon next to the work library b Double click the ram_tb design unit to load the design View a Memory and its Contents The Memories tab of the Main window lists all memories in the design Figure 7 1 when the design is loaded with the range depth and width of each memory displayed Figure 7 1 oe the Memories Tab in th
13. or c require the return of Software and refund to you any license fee paid less a reasonable allowance for use 9 3 Mentor Graphics has no liability to you if infringement is based upon a the combination of Software with any product not furnished by Mentor Graphics b the modification of Software other than by Mentor Graphics c the use of other than a current unaltered release of Software d the use of Software as part of an infringing process e a product that you make use or sell f any Beta Code contained in Software g any Software provided by Mentor Graphics licensors who do not provide such indemnification to Mentor Graphics customers or h infringement by you that is deemed willful In the case of h you shall reimburse Mentor Graphics for its attorney fees and other costs related to the action upon a final judgment 9 4 THIS SECTION IS SUBJECT TO SECTION 6 ABOVE AND STATES THE ENTIRE LIABILITY OF MENTOR GRAPHICS AND ITS LICENSORS AND YOUR SOLE AND EXCLUSIVE REMEDY WITH RESPECT TO ANY ALLEGED PATENT OR COPYRIGHT INFRINGEMENT OR TRADE SECRET MISAPPROPRIATION BY ANY SOFTWARE LICENSED UNDER THIS AGREEMENT TERM This Agreement remains effective until expiration or termination This Agreement will immediately terminate upon notice if you exceed the scope of license granted or otherwise fail to comply with the provisions of Sections 1 2 or 4 For any other material breach under this Agreement Mentor Graphics may terminate
14. B in the cursor pane and select Lock B The cursor color changes to red and you can no longer drag the cursor Figure 6 7 Figure 6 7 A Locked Cursor in the Wave Window default Messages 4 ftest_counter clk 4 jtest counterjreset 3 Delete cursor a Right click cursor B and select Delete B Lesson Wrap Up This concludes this lesson Before continuing we need to end the current simulation 1 Select Simulate gt End Simulation Click Yes ModelSim Tutorial v6 4b 59 Analyzing Waveforms Using Cursors in the Wave Window 60 ModelSim Tutorial v6 46 Chapter 7 Viewing And Initializing Memories Introduction In this lesson you will learn how to view and initialize memories in defines and lists as memories any of the following e reg wire and std logic arrays e Integer arrays e Single dimensional arrays of VHDL enumerated types other than std_logic Design Files for this Lesson The installation comes with Verilog and VHDL versions of the example design The files are located in the following directories This lesson uses the Verilog version for the exercises If you have a VHDL license use the VHDL version instead Related Reading User s Manual Section Memory Panes Reference Manul commands mem display mem load mem save and radix Compile and Load the Design 1 Create a new directory and copy the tutorial files into it Start by creating a new directory for this exercise
15. Parameter Name and Value in Source Examine Window 25 Figure 3 16 The Main Window teen ees 26 Figure 3 17 Window Pane Control 1 27 Figure 3 18 zooming in on Workspace 28 Figure 3 19 Panes Rearranged in Main 29 Figure 4 1 Create Project Dialog Project Lab 32 Figure 4 2 Adding New Items to a 33 Figure 4 3 Add file to Project 1 33 Figure 4 4 Newly Added Project Files Display a for Status 34 Figure 4 5 Compile Order Dialog 2 20 4 2122 kde 35 Figure 4 6 Library Tab with Expanded 36 Figure 4 7 Structure Tab for a Loaded 36 Figure 4 8 Adding New Folder to Project 37 Figure 4 9 A Folder Within a 38 Figure 4 10 Creating Subfolder 245446 eR o ERE RIPE RIXA esses 38 Figure 4 11 A folder with a Sub folder llle 38 Figure 4 12 Changing File Location via the Project Compiler Settings Dialog 39 Figure 4 13 Simulation Configuratio
16. a To Dataflow gt Expand Selected Collapse Selected Expand Collapse All Save List Gode Goyerage Reload sim End Simulation m Bee 3 Run the simulation a Click the Run icon in the Main or Wave window toolbar The simulation runs for 100 ns the default simulation length and waves are x drawn in the Wave window b Enter run 500 at the VSIM gt prompt in the Main window The simulation advances another 500 ns for a total of 600 ns Figure 3 10 ModelSim Tutorial v6 4b 21 Basic Simulation Set Breakpoints and Step through the Source Figure 3 10 Waves Drawn in Wave Window m wave default Messages 4 jtest 0 4 jtest counterlreset 0 474 E test counter count 00011110 mE c Click the Run All icon on the Main Wave window toolbar The simulation continues running until you execute a break command or it hits a statement in your code e g a Verilog stop statement that halts the simulation d Click the Break icon The simulation stops running Set Breakpoints and Step through the Source Next you will take a brief look at one interactive debugging feature of the ModelSim environment You will set a breakpoint in the Source window run the simulation and then step through the design under test Breakpoints can be set only on lines with red line numbers 1 Open counter v in the Source wi
17. can create folders either before or after adding your files If you create a folder before adding files you can specify in which folder you want a file placed at the time you add the file see Folder field in Figure 4 3 If you create a folder after adding files you edit the file properties to move it to that folder Add Folders As shown previously in Figure 4 2 the Add items to the Project dialog has an option for adding folders If you have already closed that dialog you can use a menu command to add a folder 1 Add anew folder a Right click inside the Projects tab of the Workspace and select Add to Project gt Folder b Type Design Files in the Folder Name field Figure 4 8 Figure 4 8 Adding New Folder to Project x Folder Name Design Files m Folder Location Top Level c Click OK The new Design Files folder is displayed in the Project tab Figure 4 9 ModelSim Tutorial v6 4b 37 Projects Organizing Projects with Folders Figure 4 9 A Folder Within a Project Workspace Name Status Type Order Modfied counterv vy Verilog 1 06 03 04 07 36 00 PM Icounter v X Verilog 0 06 03 04 07 36 26 PM Design Files Folder leefue 2 Add a sub folder a Right click anywhere in the Project tab and select Add to Project Folder b Type HDL in the Folder Name field Figure 4 10 Figure 4 10 Creating Subfolder Add Folder E xl Folder Name H
18. have to create a working library in the project flow it is done for you automatically e Projects are persistent In other words they will open every time you invoke ModelSim unless you specifically close them Multiple Library Flow ModelSim uses libraries in two ways 1 as a local working library that contains the compiled version of your design 2 as a resource library The contents of your working library will change as you update your design and recompile A resource library is typically static and serves as a parts source for your design You can create your own resource libraries or they may be supplied by another design team or a third party e g a silicon vendor You specify which resource libraries will be used when the design is compiled and there are rules to specify in which order they are searched A common example of using both a working library and a resource library is one where your gate level design and testbench are compiled into the working library and the design references gate level models in a separate resource library The diagram below shows the basic steps for simulating with multiple libraries ModelSim Tutorial v6 4b 13 Conceptual Overview Debugging Tools Figure 2 3 Multiple Library Flow You can also link to resource libraries from within a project If you are using a project you would replace the first step above with these two steps create the project and add the testbench to the project
19. identify file type e g Verilog or VHDL compilation order and modified date Figure 4 4 Newly Added Project Files Display a for Status counte v gt 1 10 26 06 08 47 58 PM tcounter v Verlog 10 26 06 08 47 58 PM Changing Compile Order VHDL By default ModelSim performs default binding of VHDL designs when you load the design with vsim However you can elect to perform default binding at compile time For details refer to the section Default Binding in the User s Manual If you elect to do default binding at compile then the compile order is important Follow these steps to change compilation order within a project 1 Change the compile order 34 a Select Compile Compile Order This opens the Compile Order dialog box Click the Auto Generate button ModelSim determines the compile order by making multiple passes over the files It starts compiling from the top if a file fails to compile due to dependencies it moves that file to the bottom and then recompiles it after compiling the rest of the files It continues in this manner until all files compile successfully or until a file s can t be compiled for reasons other than dependency Alternatively you can select a file and use the Move Up and Move Down buttons to put the files in the correct order Figure 4 5 ModelSim Tutorial v6 4b Projects Create a New Project Figure 4 5 Compile Order Dialog Compile
20. longer knows if the previous compilation is still valid Simulation Configurations A Simulation Configuration associates a design unit s and its simulation options For example let s say that every time you load tcounter v you want to set the simulator resolution to picoseconds ps and enable event order hazard checking Ordinarily you would have to specify those options each time you load the design With a Simulation Configuration you specify options for a design and then save a configuration that associates the design and its options ModelSim Tutorial v6 4b 39 Projects Simulation Configurations The configuration is then listed in the Project tab and you can double click it to load tcounter v along with its options 1 Create a new Simulation Configuration a Right click in the Projects tab and select Add to Project gt Simulation Configuration from the popup menu This opens the Add Simulation Configuration dialog Figure 4 13 The tabs in this dialog present a myriad of simulation options You may want to explore the tabs to see what is available You can consult the ModelSim User s Manual to get a description of each option Figure 4 13 Simulation Configuration Dialog Add Simulation Configuration Simulation Configuration Name Place in Folder counter HDL i Add Folder Design VHDL Verilog Libraries SDF Others Library work Optimized HAJ counter Modu
21. of information about your design simulation or debugging session You can also access other tools from the Main window that display in stand alone windows e g the Dataflow window ModelSim Tutorial v6 4b 25 Basic Simulation Navigating the Interface Figure 3 16 The Main Window File Edit view Format Compile Simulate Add Tools Window Help ERE sy s 1 test_counter clk test_counter reset test_counter count Packed Array dut counter reset 0 Packed Array OHIMPLICIT WI test counter count 0001 Net OSIMPLICIT AwI test counter esl Counter OSINITIALH3O test counter Transcript Now 600 ns Delta 2 sim test counter The following table describes some of the key elements of the Main window Table 3 1 The Main Window Window pane Description Workspace This pane comprises multiple tabs that contain various sorts of information about the current project or design Once a design is loaded additional tabs will appear Refer to the section Workspace in the User s Manual for more information Transcript The Transcript pane provides a command line interface and serves as an activity log including status and error messages Refer to the section Transcript Window in the User s Manual for more information 26 ModelSim Tutorial v6 4b Basic Simulation Navigating the Interface Table 3 1 The Main Window Window pane Description MD
22. parts_lib Add Modify Delete m Search Libraries First Lf Add Modify Delete FEE EE OK Cancel Linking in VHDL To link to a resource library in VHDL you have to create a logical mapping to the physical library and then add LIBRARY and USE statements to the source file 1 Create a logical mapping to parts_lib a Select File gt New gt Library b In the Create a New Library dialog select a map to an existing library c Type parts_lib in the Library Name field d Click Browse to open the Browse for Folder dialog and browse to parts_lib in the resource_library directory you created earlier in the lesson e Click OK to select the library and close the Select Library dialog f The Create a New Library dialog should look similar to the one shown in Figure 5 6 Click OK to close the dialog ModelSim Tutorial v6 4b 49 Working With Multiple Libraries Linking to the Resource Library 50 Figure 5 6 Mapping to the parts_lib Library x Create C anew library and a logical mapping to it amapto an existing library Library Name parts Library Maps to C Tutorial resource library parts_lib vi Browse DK Cancel 2 Add LIBRARY and USE statements to tcounter vhd a In the Library tab of the Main window click the icon next to the work library b Right click test counter in the work library and select
23. resize the pane f Select Layout gt Reset 3 Observe context sensitivity of menu commands a Click anywhere in the Workspace b Select the Edit menu and notice that the Clear command is disabled ModelSim Tutorial v6 4b 29 Basic Simulation Navigating the Interface c Click in the Transcript and select Edit gt Clear This command applies to the Transcript pane but not the Workspace pane d Click on a design object in the sim tab of the Workspace and select File gt Open e Notice that the Open dialog filters to show Log files w f f Now click on a filename in the Files tab of the Workspace and select File Open Notice that the Open dialog filters to show HDL file types instead Lesson Wrap Up This concludes this lesson Before continuing we need to end the current simulation 1 Select Simulate gt End Simulation 2 Click Yes when prompted to confirm that you wish to quit simulating 30 ModelSim Tutorial v6 46 Chapter 4 Projects Introduction In this lesson you will practice creating a project At a minimum projects contain a work library and a session state that is stored in a mpf file A project may also consist of e HDL source files or references to source files e other files such as READMES or other project documentation local libraries e references to global libraries Design Files for this Lesson The sample design for this lesson is a simple 8 bit binary up counter with an ass
24. specify a Start address of 0 and End address of 250 f For the File Format select MTI and click No addresses to create a memory pattern that you can use to relocate somewhere else in the memory or in another memory g For Address Radix select Decimal and for Data Radix select Binary h For the Line Wrap set 1 Words per Line i Enter the file name as reloc mem then click OK to save the memory contents and close the dialog You will use this file for initialization in the next section Initialize a Memory In ModelSim it is possible to initialize a memory using one of three methods from an exported memory file from a fill pattern or from both First let s initialize a memory from a file only You will use one you exported previously data mem mem 1 View instance ram tb spram3 mem a Double click the ram tb spram3 mem instance in the Memories tab This will open a new tab mem 2 in the MDI frame to display the contents of ram_tb spram3 mem Scan these contents so you can identify changes once the initialization is complete b Right click and select Properties to bring up the Properties dialog c Change the Address Radix to Decimal Data Radix to Binary Line Wrap to 1 Words per Line and click OK 2 Initialize spram3 from a file a Right click anywhere in the data column and select Import to bring up the Import Memory dialog box Figure 7 10 ModelSim Tutorial v6 4b 69 Viewing And Initializing Memo
25. this Agreement upon 30 days written notice if you are in material breach and fail to cure such breach within the 30 day notice period If Software was provided for limited term use this Agreement will automatically expire at the end of the authorized term Upon any termination or expiration you agree to cease all use of Software and return it to Mentor Graphics or certify deletion and destruction of Software including all copies to Mentor Graphics reasonable satisfaction EXPORT Software is subject to regulation by local laws and United States government agencies which prohibit export or diversion of certain products information about the products and direct products of the products to certain countries and certain persons You agree that you will not export any Software or direct product of Software in any manner without first obtaining all necessary approval from appropriate local and United States government agencies RESTRICTED RIGHTS NOTICE Software was developed entirely at private expense and is commercial computer software provided with RESTRICTED RIGHTS Use duplication or disclosure by the U S Government or a U S Government subcontractor is subject to the restrictions set forth in the license agreement under which Software was obtained pursuant to DFARS 227 7202 3 a or as set forth in subparagraphs c 1 and 2 of the Commercial Computer Software Restricted Rights clause at FAR 52 227 19 as applicable Contractor manufacturer is
26. transition if you drag in the cursor pane 2 Rename the cursor a Right click Cursor 1 in the cursor name pane and select and delete the text b Type A and press Enter The cursor name changes to A Figure 6 5 ModelSim Tutorial v6 4b 57 Analyzing Waveforms Using Cursors in the Wave Window Figure 6 5 Renaming a Cursor default Messages test_counter clk 0 4 jtest counterjreset O Fe fest counterfcount yy yy yy yyy 1 AL AAA wave 3 Jump the cursor to the next or previous transition a Click signal count in the pathname pane b Click the Find Next Transition icon on the Wave window toolbar The cursor jumps to the next transition on the currently selected signal c Click the Find Previous Transition icon on the Wave window toolbar The cursor jumps to the previous transition the currently selected signal Working with Multiple Cursors 1 Add a second cursor a Click the Add Cursor icon on the Wave window toolbar E b Right click the name of the new cursor and delete the text c Type B and press Enter d Drag cursor B and watch the interval measurement change dynamically Figure 6 6 58 ModelSim Tutorial v6 4b Analyzing Waveforms Using Cursors in the Wave Window Figure 6 6 Interval Measurement Between Two Cursors m wave default Messages 4 ftest_counter clk test_counter reset 4 wave 2 Lock cursor B a Right click cursor
27. 000008 0000000a 0000000 0000000 4 Trini k b Right click the highlighted data and select Change This brings up the Change memory dialog box Figure 7 17 Note that the Addresses field is already populated with the range you highlighted 74 ModelSim Tutorial v6 4b Viewing And Initializing Memories Interactive Debugging Commands Figure 7 17 Entering Data to Change x Instance Name Iram tb dpramij mem Address Range C All Addresses in hexadecimal Decrement Start End C Random Fill Data Skip 35 3d o word s OK Apply Fill Type value Increment c Select Value as the Fill Type d Enter the data values into the Fill Data field as follows 34 35 36 e Click OK The data in the address locations change to the values you entered Figure 7 18 Figure 7 18 Changed Memory Contents for the Specified Addresses f memory ram tb dpram1 mem 00000002 00000004 00000006 00000009 000000 0000000 0000000 218 4 4 Edit data in place To edit only one value at a time do the following a Double click any value in the Data column b Enter the desired value and press lt Enter gt on your keyboard If you needed to cancel the edit function press the lt Esc gt key on your keyboard ModelSim Tutorial v6 4b 75 Viewing And Initializing Memories Int
28. 1 Viewing the Memories Tab in the Main Window Workspace 62 Figure 7 2 The mem Tab in the MDI Frame Shows Addresses and Data 63 Figure 7 3 The Memory Display Updates with the Simulation 63 Figure 7 4 Changing the Address Radix 0 0 cece eee eee teens 64 Figure 7 5 New Address Radix and Line 65 Figure 7 6 Goto 65 Figure 7 7 Editing the Address 66 Figure 7 8 Searching for a Specific Data 66 Figure 7 9 Export Memory Dialog 24 oes eketee4e RR EE ERIRRY RA 68 Figure 7 10 Import Memory Dialog ss cease were deals Sade 70 Figure 7 11 Initialized Memory from File and Fill Pattern 71 Figure 7 12 Data Increments Starting at Address 251 72 Figure 7 13 Original Memory 73 Figure 7 14 Changing Memory Content for a Range of 73 Figure 7 15 Random Content Generated for a Range of 74 Figure 7 16 Changing Memory Contents by 74 Figure 7 17 Entering Data to 75 Figure 7 18 Changed Memory Co
29. 1011011 01100001 00101100 00110010 00111000 00111110 01000100 01001010 01010000 01010110 01011100 01100010 00101101 00110011 00111001 00111111 01000101 01001011 01010001 01010111 01011101 01100011 SSCS In the Transcript pane you will see NUMERIC_STD warnings that can be ignored ModelSim Tutorial v6 4b 63 Viewing And Initializing Memories View a Memory and its Contents an assertion failure that is functioning to stop the simulation The simulation itself has not failed 3 Change the address radix and the number of words per line for instance ram tb spraml mem a Right click anywhere in the Memory Contents pane and select Properties b The Properties dialog box opens Figure 7 4 Figure 7 4 Changing the Address Radix Address Radix Data Radix C Hexadecimal Symbolic Decimal C Binary C Octal C Decimal C Unsigned Hexadecimal Line Wrap C Fit in Window Words per Line OK For the Address Radix select Decimal This changes the radix for the addresses only d Select Words per line and type 1 in the field e Click OK You can see the results of the settings in Figure 7 5 If the figure doesn t match what you have in your ModelSim session check to make sure you set the Address Radix rather than the Data Radix Data Radix should still be set to Symbolic the def
30. 6 d Click in the line number column next to line number 36 again to re create the breakpoint 4 Restart the simulation a Click the Restart icon to reload the design elements and reset the simulation time to zero The Restart dialog that appears gives you options on what to retain during the restart Figure 3 12 ModelSim Tutorial v6 4b 23 Basic Simulation Set Breakpoints and Step through the Source Figure 3 12 Setting Restart Functions Keep List Format Wave Format v Breakpoints Logged Signals Virtual Definitions IV Assertions IV Cover Directives Format oom b Click the Restart button in the Restart dialog c Click the Run All icon The simulation runs until the breakpoint is hit When the simulation hits the i breakpoint it stops running highlights the line with a blue arrow in the Source view Figure 3 13 and issues a Break message in the Transcript pane Figure 3 13 Blue Arrow Indicates Where Simulation Stopped hi C Tutorialfexamples tutorials verilog basicSimulation counter v begin increment i val i carry val i amp carry end carry end endfunction always B posedge clk or posedge reset if reset count tpd_reset to count 8 hoo else count lt tpd clk to count increment count 4 ge wave h counter v When a breakpoint is reached typically you want to know one or more signal values You have several opt
31. 9 28 ModelSim Tutorial v6 4b Basic Simulation Navigating the Interface Figure 3 19 Panes Rearranged in Main Window File Edit View Format Compile Simulate Add Tools Window dee counter reset IMPLICIT WI test co count 0001 HIMPLICIT WI test co HINITIALHT test HINITI amp LH23 test oR HIMITIAI HAN test cei gt Es 2l re 4 Now 600 ns Delta 2 sim test counter F c Select Layout gt Reset The layout returns to its original setting D Tip Moving panes can get confusing and you may not always obtain the results you expect Practice moving a pane around watching the gray outline to see what happens when you drop it in various places Your layout will be saved when you exit ModelSim and will reappear in the last configuration when you next open ModelSim It s a good idea to close all panes in the MDI frame at the end of each lesson in this tutorial so only files relevant to each lesson will be displayed As you practice notice that the MDI frame cannot be moved in the same manner as the panes It does not have a handle in its header bar Selecting Layout gt Reset is the easiest way to rectify an undesired layout d Hover your mouse pointer on the border between two panes so it becomes a double headed arrow e Click and drag left and right or up and down to
32. AR hee Seeded dS 31 Add Objects to the Projete oes RUP e 32 Changing Compile Order VHDL 0 0 0 cece eee tenes 34 Compile the Desigi seca e RS US ER Mesh UE ENS 35 Load the A 36 Organizing Projects with 1 37 Add Folders usus quede RO CIC RUP ROC CR EES 37 Moving Files do Folders eese edF ERR re dre Fade hee eee 39 Simulation Configurations 06 444 Rr ERRARE 39 Chapter 5 Working With Multipl LIDEAPIQS 3999 peer e P OCCRERTWRDOEREPCPPUERKOY peer RS 43 Creating the Resource LIDESEY TRO EDS ad ea 43 Creating the a E Y orbe 45 Linking to Resource 46 Linking in 48 Linking in VHDL o 49 Permanently Mapping VHDL Resource Libraries 51 ModelSim Tutorial v6 4b 3 Table of Contents Chapter 6 Analyzing WOVEIOPHIS ws a Here eee Kes Ri oe 53 L
33. CLUSIVE NEITHER MENTOR GRAPHICS NOR ITS LICENSORS MAKE ANY OTHER WARRANTIES EXPRESS IMPLIED OR STATUTORY WITH RESPECT TO SOFTWARE OR OTHER MATERIAL PROVIDED UNDER THIS AGREEMENT MENTOR GRAPHICS AND ITS LICENSORS SPECIFICALLY DISCLAIM ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE AND NON INFRINGEMENT OF INTELLECTUAL PROPERTY LIMITATION OF LIABILITY EXCEPT WHERE THIS EXCLUSION OR RESTRICTION OF LIABILITY WOULD BE VOID OR INEFFECTIVE UNDER APPLICABLE LAW IN NO EVENT SHALL MENTOR GRAPHICS OR ITS LICENSORS BE LIABLE FOR INDIRECT SPECIAL INCIDENTAL OR CONSEQUENTIAL DAMAGES INCLUDING LOST PROFITS OR SAVINGS WHETHER BASED ON CONTRACT TORT OR ANY OTHER LEGAL THEORY EVEN IF MENTOR GRAPHICS OR ITS LICENSORS HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES IN NO EVENT SHALL MENTOR GRAPHICS OR ITS LICENSORS LIABILITY UNDER THIS AGREEMENT EXCEED THE AMOUNT PAID BY YOU FOR THE SOFTWARE OR SERVICE GIVING RISE TO THE CLAIM IN THE CASE WHERE NO AMOUNT WAS PAID MENTOR GRAPHICS AND ITS LICENSORS SHALL HAVE NO LIABILITY FOR ANY DAMAGES WHATSOEVER THE PROVISIONS OF THIS SECTION 6 SHALL SURVIVE THE EXPIRATION OR TERMINATION OF THIS AGREEMENT LIFE ENDANGERING ACTIVITIES NEITHER MENTOR GRAPHICS NOR ITS LICENSORS SHALL BE LIABLE FOR ANY DAMAGES RESULTING FROM OR IN CONNECTION WITH THE USE OF SOFTWARE IN ANY APPLICATION WHERE THE FAILURE OR INACCURACY OF THE SOFTWARE MIGHT RESULT IN DEATH OR PERSONAL INJURY THE PROVISI
34. CONSEQUENTIAL DAMAGES WHATSOEVER INCLUDING BUT NOT LIMITED TO LOST PROFITS ARISING OUT OF OR RELATED TO THIS PUBLICATION OR THE INFORMATION CONTAINED IN IT EVEN IF MENTOR GRAPHICS CORPORATION HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES RESTRICTED RIGHTS LEGEND 03 97 U S Government Restricted Rights The SOFTWARE and documentation have been developed entirely at private expense and are commercial computer software provided with restricted rights Use duplication or disclosure by the U S Government or a U S Government subcontractor is subject to the restrictions set forth in the license agreement provided with the software pursuant to DFARS 227 7202 3 a or as set forth in subparagraph c 1 and 2 of the Commercial Computer Software Restricted Rights clause at FAR 52 227 19 as applicable Contractor manufacturer is Mentor Graphics Corporation 8005 S W Boeckman Road Wilsonville Oregon 97070 7777 Telephone 503 685 7000 Toll Free Telephone 800 592 2210 Website www mentor com TRADEMARKS The trademarks logos and service marks Marks used herein are the property of Mentor Graphics Corporation or other third parties No one is permitted to use these Marks without the prior written consent of Mentor Graphics or the respective third party owner The use herein of a third party Mark is not an attempt to indicate Mentor Graphics as a source of a product but is intended to indicate a product from or associated with a part
35. DL Folder Location Design Files a c Click the Folder Location drop down arrow and select Design Files d Click OK icon appears next to the Design Files folder in the Project tab Figure 4 11 counter v Verilog tcounter v wW Verilog e Click the icon to see the HDL sub folder 38 ModelSim Tutorial v6 4b Projects Simulation Configurations Moving Files to Folders If you don t place files into a folder when you first add the files to the project you can move them into a folder using the properties dialog 1 Move tcounter v and counter v to the HDL folder a Select both counter v and tcounter v in the Project tab of the Workspace b Right click either file and select Properties This opens the Project Compiler Settings dialog Figure 4 12 which allows you to set a variety of options on your design files Figure 4 12 Changing File Location via the Project Compiler Settings Dialog x General Verilog Coverage General Settings DoNot Compile Compile to library work vi Place in Folder HDL vi m File Properties Multiple files selected c Click the Place In Folder drop down arrow and select HDL d Click OK The selected files are moved into the HDL folder Click the icon next to the HDL folder to see the files The files are now marked with a in the Status column because you moved the files The project no
36. ED OUTSIDE OF NORTH OR SOUTH AMERICA disputes arising out of or in relation to this Agreement shall be submitted to the exclusive jurisdiction of Portland Oregon when the laws of Oregon apply or Dublin Ireland when the laws of Ireland apply Notwithstanding the foregoing all disputes in Asia except for Japan arising out of or in relation to this Agreement shall be resolved by arbitration in Singapore before a single arbitrator to be appointed by the Chairman of the Singapore International Arbitration Centre SIAC to be conducted in the English language in accordance with the Arbitration Rules of the SIAC in effect at the time of the dispute which rules are deemed to be incorporated by reference in this section 15 This section shall not restrict Mentor Graphics right to bring an action against you in the jurisdiction where your place of business is located The United Nations Convention on Contracts for the International Sale of Goods does not apply to this Agreement SEVERABILITY If any provision of this Agreement is held by a court of competent jurisdiction to be void invalid unenforceable or illegal such provision shall be severed from this Agreement and the remaining provisions will remain in full force and effect PAYMENT TERMS AND MISCELLANEOUS You will pay amounts invoiced in the currency specified on the applicable invoice within 30 days from the date of such invoice Any past due invoices will be subject to the imposit
37. Edit c This opens the file in the Source window d Right click in the Source window and uncheck Read Only e Add these two lines to the top of the file LIBRARY parts lib USE parts lib ALL The testbench source code should now look similar to that shown in Figure 5 7 f Select File Save ModelSim Tutorial v6 4b Working With Multiple Libraries Permanently Mapping VHDL Resource Libraries Figure 5 7 Adding LIBRARY and USE Statements to the Testbench H C modeltech examples testbench tcounter 4 5 6 THIS WORK CONTAINS TRADE SECRET AND PROPRIE 7 MENTOR GRAPHICS CORPORATION OR ITS LICENSOR 8 9 10 LIBRARY parts lib 11 USE parts lib ALL 12 13 entity test counter is 14 PORT count BUFFER bit vector 8 downto mi up pu M ucc gt I tcounter vhd KE 3 Recompile and simulate a In the Project tab of the Workspace right click tcounter vhd and select Compile gt Compile Selected b Inthe Library tab double click test_counter to load the design c The design loads without errors Permanently Mapping VHDL Resource Libraries If you reference particular VHDL resource libraries in every VHDL project or simulation you may want to permanently map the libraries Doing this requires that you edit the master modelsim ini file in the installation directory Though you won t actually practice it in this tutorial here are the steps for editing the file 1
38. I frame The Multiple Document Interface MDI frame holds windows for which there can be multiple instances These include Source editor windows Wave windows and Memory content windows Refer to the section Multiple Document Interface MDI Frame in the User s Manual for more information Here are a few important points to keep in mind about the ModelSim interface e Windows panes can be resized moved zoomed undocked etc and the changes are persistent You have a number of options for re sizing re positioning undocking redocking and generally modifying the physical characteristics of windows and panes When you exit ModelSim the current layout is saved so that it appears the same the next time you invoke the tool Refer to the Main Window section in the User s Manual for more information e Menus are context sensitive The menu items that are available and how certain menu items behave depend on which pane or window is active For example if the sim tab in the Workspace is active and you choose Edit from the menu bar the Clear command is disabled However if you click in the Transcript pane and choose Edit the Clear command is enabled The active pane is denoted by a blue title bar Let us try a few things 1 Zoom and undock panes a Click the Zoom Unzoom icon in the upper right corner of the Workspace pane Figure 3 17 Figure 3 17 Window Pane Control Icons Dock Undock pane Zoom Unzoom pane
39. Locate the modelsim ini file in the ModelSim installation directory install dir modeltech modelsim ini IMPORTANT Make a backup copy of the file Change the file attributes of modelsim ini so it is no longer read only Open the file and enter your library mappings in the Library section For example parts lib C libraries parts lib Save the file ModelSim Tutorial v6 4b 51 Working With Multiple Libraries Permanently Mapping VHDL Resource Libraries 6 Change the file attributes so the file is read only again Lesson Wrap Up This concludes this lesson Before continuing we need to end the current simulation and close the project 1 Select Simulate gt End Simulation Click Yes 2 Select the Project tab of the Main window Workspace 3 Select File gt Close Click OK 52 ModelSim Tutorial v6 4b Chapter 6 Analyzing Waveforms Introduction The Wave window allows you to view the results of your simulation as HDL waveforms and their values The Wave window is divided into a number of panes Figure 6 1 You can resize the pathnames pane the values pane and the waveform pane by clicking and dragging the bar between any two panes Figure 6 1 Panes of the Wave Window Messages bar pathnames pane PM wave default jtest ringbuf clock m delta 5 ringbuf clock m cur val File Edit View Add Format Tools Window values pane False waveform pane j
40. Mentor Graphics Corporation 8005 SW Boeckman Road Wilsonville Oregon 97070 7777 USA THIRD PARTY BENEFICIARY For any Software under this Agreement licensed by Mentor Graphics from Microsoft or other licensors Microsoft or the applicable licensor is a third party beneficiary of this Agreement with the right to enforce the obligations set forth herein AUDIT RIGHTS You will monitor access to location and use of Software With reasonable prior notice and during your normal business hours Mentor Graphics shall have the right to review your software monitoring system and reasonably relevant records to confirm your compliance with the terms of this Agreement an addendum to this Agreement or U S or other local export laws Such review may include FLEXIm or FLEXnet report log files that you shall capture and provide at Mentor Graphics request Mentor Graphics shall treat as confidential information all of your information gained as a result of any request or review and shall only use or disclose such information as required by law or to enforce its rights under this Agreement or addendum to this Agreement The provisions of this section 14 shall survive the expiration or termination of this Agreement 15 16 17 CONTROLLING LAW JURISDICTION AND DISPUTE RESOLUTION THIS AGREEMENT SHALL BE GOVERNED BY AND CONSTRUED UNDER THE LAWS OF THE STATE OF OREGON USA IF YOU ARE LOCATED IN NORTH OR SOUTH AMERICA AND THE LAWS OF IRELAND IF YOU ARE LOCAT
41. ONS OF THIS SECTION 7 SHALL SURVIVE THE EXPIRATION OR TERMINATION OF THIS AGREEMENT INDEMNIFICATION YOU AGREE TO INDEMNIFY AND HOLD HARMLESS MENTOR GRAPHICS AND ITS LICENSORS FROM ANY CLAIMS LOSS COST DAMAGE EXPENSE OR LIABILITY INCLUDING ATTORNEYS FEES ARISING OUT OF OR IN CONNECTION WITH YOUR USE OF SOFTWARE AS 10 11 12 13 14 DESCRIBED IN SECTION 7 THE PROVISIONS OF THIS SECTION 8 SHALL SURVIVE THE EXPIRATION OR TERMINATION OF THIS AGREEMENT INFRINGEMENT 9 1 Mentor Graphics will defend or settle at its option and expense any action brought against you alleging that Software infringes a patent or copyright or misappropriates a trade secret in the United States Canada Japan or member state of the European Patent Office Mentor Graphics will pay any costs and damages finally awarded against you that are attributable to the infringement action You understand and agree that as conditions to Mentor Graphics obligations under this section you must a notify Mentor Graphics promptly in writing of the action b provide Mentor Graphics all reasonable information and assistance to defend or settle the action and c grant Mentor Graphics sole authority and control of the defense or settlement of the action 9 2 If an infringement claim is made Mentor Graphics may at its option and expense a replace or modify Software so that it becomes noninfringing b procure for you the right to continue using Software
42. Order Current Order tcounter v counter v Move up down buttons zi Auto Generate OK c Click OK to close the Compile Order dialog Cancel Compile the Design 1 Compile the files a Right click either counter v or tcounter v in the Project tab and select Compile gt Compile All from the pop up menu ModelSim compiles both files and changes the symbol in the Status column to a green check mark A check mark means the compile succeeded If compile fails the symbol will be red X and you will see an error message in the Transcript pane 2 View the design units a Click the Library tab in the workspace Figure 4 6 b Click the icon next to the work library You should see two compiled design units their types modules in this case and the path to the underlying source files ModelSim Tutorial v6 4b 35 Projects Create a New Project Figure 4 6 Library Tab with Expanded Library Workspace Name Type work Th counter test_counter sv std vital2000 modelsim_lib std hi fill ES i synopsys verilog Load the Design 1 Load the fest counter design unit Library Module Module Library Library Library Library Library std developerskit Library Library Library C Tutorial examples t C Tutorial examples ty C Tutorial examples ty MODEL_TECH s
43. XX XXXXXXXX wuxYvYYYYY XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX wwvwvwvevYY XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX wexYvYYYYY XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX wvvwvYvYY b Double click instance ram_tb spram2 mem in the Memories tab of the Workspace This creates a new tab in the MDI frame called mem 1 that contains the addresses and data for the spram2 instance Each time you double click a new memory instance in the Workspace a new tab is created for that instance in the MDI frame 2 Simulate the design a Click the run all icon in the Main window b Click the mem tab of the MDI frame to bring the ram_tb spram1I mem to the foreground The data fields now show values Figure 7 3 Figure 7 3 The Memory Display Updates with the Simulation 00000000 00000006 0000000 00000012 00000018 0000001 00000024 0000002 000000320 00000036 VHDL 00101000 00101110 00110100 00111010 01000000 01000110 01001100 01010010 01011000 01011110 4 00101001 00101111 00110101 00111011 01000001 01000111 01001101 01010011 01011001 01011111 00101010 00110000 00110110 00111100 01000010 01001000 01001110 01010100 01011010 01100000 00101011 00110001 00110111 00111101 01000011 01001001 01001111 01010101 0
44. ag signal from the Objects pane to the Wave window d Inthe Wave window select Edit gt Select All and then Edit gt Delete 4 Add objects using a command a Type add wave at the VSIM gt prompt ModelSim adds all objects from the current region b Run the simulation for awhile so you can see waveforms Zooming the Waveform Display Zooming lets you change the display range in the waveform pane There are numerous methods for zooming the display 1 Zoom the display using various techniques a Click the Zoom Mode icon on the Wave window toolbar b Inthe waveform pane click and drag down and to the right ModelSim Tutorial v6 4b 55 Analyzing Waveforms Using Cursors in the Wave Window You should see blue vertical lines and numbers defining an area to zoom in Figure 6 3 Figure 6 3 Zooming in with the Mouse Pointer c Select View gt Zoom gt Zoom Last The waveform pane returns to the previous display range d Click the Zoom In 2x icon a few times E e Inthe waveform pane click and drag up and to the right You should see a blue line and numbers defining an area to zoom out f Select View gt Zoom gt Zoom Full Using Cursors in the Wave Window Cursors mark simulation time in the Wave window When ModelSim first draws the Wave window it places one cursor at time zero Clicking anywhere in the waveform pane brings that cursor to the mouse location You can a
45. an also reference library settings from a selected ini file or copy them directly into the project The default library is where compiled design units will reside b Type test in the Project Name field c Click the Browse button for the Project Location field to select a directory where the project file will be stored d Leave the Default Library Name set to work e Click OK Figure 4 1 Create Project Dialog Project Lab Create Project m Project Name test m Project Location utorial examples projects Browse r Default Library Name work M Copy Settings From modelsim ini Browse Copy Library Mappings Reference Library Mappings OK Cancel Add Objects to the Project Once you click OK to accept the new project settings you will see a blank Project tab in the Workspace area of the Main window and the Add items to the Project dialog will appear Figure 4 2 From this dialog you can create a new design file add an existing file add a folder for organization purposes or create a simulation configuration discussed below 32 ModelSim Tutorial v6 4b Projects Create a New Project Figure 4 2 Adding New Items to a Project Add items to the Project Click on the icon to add items of that type Create New File Add Existing File Create Simulation Create New Folder Close 1 Add two existing files a
46. at the VSIM gt prompt ModelSim Tutorial v6 4b 47 Working With Multiple Libraries Linking to the Resource Library The expanded error message tells you that a component dut in this case has not been explicitly bound and no default binding can be found Type quit sim to quit the simulation The process for linking to a resource library differs between Verilog and VHDL If you are using Verilog follow the steps in Linking in Verilog If you are using VHDL follow the steps in Linking in VHDL one page later Linking in Verilog Linking in Verilog requires that you specify a search library when you invoke the simulator 1 Specify a search library during simulation a b C 48 Click the Simulate icon on the Main window toolbar Click the icon next to the work library and select fest counter Click the Libraries tab Click the Add button next to the Search Libraries field and browse to parts lib in the resource library directory you created earlier in the lesson Click OK The dialog should have parts lib listed in the Search Libraries field Figure 5 5 Click OK The design loads without errors ModelSim Tutorial v6 4b Working With Multiple Libraries Linking to the Resource Library Figure 5 5 Specifying a Search Library in the Simulate Dialog Design VHDL Verilog Libraries SDF Others m Search Libraries 4 C modeltech examples resource_library
47. ault 64 ModelSim Tutorial v6 4b Viewing And Initializing Memories View a Memory and its Contents Figure 7 5 New Address Radix and Line Length z memory ram tb spram1 mem E e Navigate Within the Memory You can navigate to specific memory address locations or to locations containing particular data patterns First you will go to a specific address 1 Use Goto to find a specific address a Right click anywhere in address column and select Goto Figure 7 6 The Goto dialog box opens in the data pane Figure 7 6 Goto Dialog E memory ram_tb spram1 mem 7 xj 00101000 C Goto Memory x Goto Address 30 DK Cancel oO one zi 11 b Type 30 in the Goto Address field c Click OK The requested address appears in the top line of the window 2 Edit the address location directly ModelSim Tutorial v6 4b 65 Viewing And Initializing Memories View a Memory and its Contents a To quickly move to a particular address do the following i Double click address 38 in the address column ii Enter address 100 Figure 7 7 Figure 7 7 Editing the Address Directly memory ram 1 mem CE LE nen E ren Press Enter on your keyboard The pane scrolls to that address 3 Now let s find a particular data entry a Right click anywhere in the data col
48. ck the Browse button and select tcounter v in the Select files to add to project dialog Click Open Click OK Click Close to dismiss the items to the Project dialog The tcounter v file is listed in the Project tab of the Main window 3 Compile the testbench a Right click tcounter v and select Compile gt Compile Selected Linking to the Resource Library To wrap up this part of the lesson you will link to the parts_lib library you created earlier But first try simulating the testbench without the link and see what happens ModelSim responds differently for Verilog and VHDL in this situation Verilog 1 Simulate a Verilog design with a missing resource library a 46 In the Library tab click the icon next to the work library and double click test_counter The Main window Transcript reports an error Figure 5 3 When you see a message that contains text like Error vsim 3033 you can view more detail by using the verror command ModelSim Tutorial v6 4b Working With Multiple Libraries Linking to the Resource Library Figure 5 3 Verilog Simulation Error Reported in Main Window Transcript ModelSim gt vsim work test counter vsim work tesk counter Loading work test counter Error vsim 3033 C Tutorial examples tutorials verilog libraries testbench tcoun ter v 15 Instantiation of counter Failed The design unit was not Found Region test_counter
49. e Main Window Workspace gt ram tb sprami mem 4095 409 gt fam_tb spram2 mem 0 2047 2048 Aram tb spram3 mem 0 55535 65536 n ram tb spram4 mem 0 3 4 x tb dprami mem 0 15 16 VHDL The radix for enumerated types is Symbolic To change the radix to binary for the purposes of this lesson type the following command at the VSIM gt prompt radix bin 1 Open a Memory instance to show its contents a Double click the ram tb spramI mem instance in the memories list to view its contents in the MDI frame A mem tab is created in the MDI frame to display the memory contents The data are all X 0 in VHDL since you have not yet simulated the design The first column 62 ModelSim Tutorial v6 4b blue hex characters lists the addresses Figure 7 2 and the remaining columns show the data values Figure 7 2 The mem Tab in the MDI Frame Shows Addresses and Data Viewing And Initializing Memories View a Memory and its Contents 00000006 0000000 00000012 00000018 0000001 00000024 0000002 00000030 00000036 nnnnnnae z memory ram tb XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX wvvvvYYY ram1 mem XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXX
50. ect Compile gt Compile This opens the Compile Source Files dialog Figure 3 4 If the Compile menu option is not available you probably have a project open If so close the project by making the Workspace pane active and selecting File gt Close from the menus ModelSim Tutorial v6 4b 17 Basic Simulation Create the Working Design Library b Select both counter v and tcounter v modules from the Compile Source Files dialog and click Compile The files are compiled into the work library c When compile is finished click Done Figure 3 4 Compile Source Files Dialog Library work Look in basicSimulation E3 counter tcounter File name tcounter v counter v Files of type HDL Files v vL Y Done Compile selected files together Default Options Edit Source 2 View the compiled design units a On the Library tab click the icon next to the work library and you will see two design units Figure 3 5 You can also see their types Modules Entities etc and the path to the underlying source files scroll to the right if necessary Figure 3 5 Verilog Modules Compiled into work Library og Transcript Compiling module test counter work Library Top level modules counter Module test_counter 1 test_counter Module vlog work work C 6 0 vital2000 Library Tuto
51. ensing and assignment provisions shall be binding upon your successors in interest and assigns The provisions of this section 4 shall survive the termination or expiration of this Agreement LIMITED WARRANTY 5 1 Mentor Graphics warrants that during the warranty period Software when properly installed will substantially conform to the functional specifications set forth in the applicable user manual Mentor Graphics does not warrant that Software will meet your requirements or that operation of Software will be uninterrupted or error free The warranty period is 90 days starting on the 15th day after delivery or upon installation whichever first occurs You must notify Mentor Graphics in writing of any nonconformity within the warranty period This warranty shall not be valid if Software has been subject to misuse unauthorized modification or improper installation MENTOR GRAPHICS ENTIRE LIABILITY AND YOUR EXCLUSIVE REMEDY SHALL BE AT MENTOR GRAPHICS OPTION EITHER A REFUND OF THE PRICE PAID UPON RETURN OF SOFTWARE TO MENTOR GRAPHICS OR B MODIFICATION OR REPLACEMENT OF SOFTWARE THAT DOES NOT MEET THIS LIMITED WARRANTY PROVIDED YOU HAVE OTHERWISE COMPLIED WITH THIS AGREEMENT MENTOR GRAPHICS MAKES NO WARRANTIES WITH RESPECT TO A SERVICES B SOFTWARE WHICH IS LICENSED TO YOU FOR A LIMITED TERM OR LICENSED AT NO COST OR C EXPERIMENTAL BETA CODE ALL OF WHICH ARE PROVIDED AS IS 5 2 THE WARRANTIES SET FORTH IN THIS SECTION 5 ARE EX
52. er design unit Next you will create a project and compile the testbench into it Finally you will link to the library containing the counter and then run the simulation Design Files for this Lesson The sample design for this lesson is a simple 8 bit binary up counter with an associated testbench The pathnames are as follows Verilog lt install_dir gt examples tutorials verilog libraries counter v and tcounter v VHDL lt install_dir gt examples tutorials vhdlNibraries counter vhd and tcounter vhd This lesson uses the Verilog files tcounter v and counter v in the examples If you have a VHDL license use tcounter vhd and counter vhd instead Related Reading User s Manual Chapter Design Libraries Creating the Resource Library Before creating the resource library make sure the modelsim ini in your install directory is Read Only This will prevent permanent mapping of resource libraries to the master modelsim ini file See Permanently Mapping VHDL Resource Libraries 1 Create a directory for the resource library Create a new directory called resource_library Copy counter v from lt install_dir gt examples tutorials verilog libraries to the new directory 2 Create a directory for the testbench ModelSim Tutorial v6 4b 43 Working With Multiple Libraries Creating the Resource Library Create a new directory called testbench that will hold the testbench and project files Copy tcounter v from lt install_di
53. eractive Debugging Commands Lesson Wrap Up This concludes this lesson Before continuing we need to end the current simulation 1 Select Simulate gt End Simulation Click Yes 76 ModelSim Tutorial v6 4b Chapter 8 Automating Simulation Introduction Aside from executing a couple of pre existing DO files the previous lessons focused on using ModelSim in interactive mode executing single commands one after another via the GUI menus or Main window command line In situations where you have repetitive tasks to complete you can increase your productivity with DO files DO files are scripts that allow you to execute many commands at once The scripts can be as simple as a series of ModelSim commands with associated arguments or they can be full blown Tcl programs with variables conditional execution and so forth You can execute DO files from within the GUI or you can run them from the system command prompt without ever invoking the GUI Note mmm This lesson assumes that you have added the install dir modeltech platform directory to your PATH If you did not you will need to specify full paths to the tools i e vlib vmap vlog vcom and vsim that are used in the lesson Related Reading User s Manual Chapter Tcl and Macros DO Files Practical Programming in Tcl and Tk Brent B Welch Copyright 1997 Creating a Simple DO File Creating DO files is as simple as typing the commands in a text file Alter
54. ge from the current simulation time minus 50 time units to the current simulation time plus 100 time units b Now add these lines to the bottom of the script add wave r when clk event and clk 1 echo Count is exa count if examine count 00100111 add_wave_zoom Snow 1 elseif examine count 01000111 add wave zoom now 2 These commands do the following e Add all signals to the Wave window e Use a when statement to identify when clk transitions to 1 e Examine the value of count at those transitions and add a bookmark if it is a certain value c Save the script with the name add_bkmrk do Save it into the directory you created in Basic Simulation 2 Load the test_counter design unit ModelSim Tutorial v6 4b 81 Automating Simulation Using Tcl with the Simulator a Start ModelSim b Select File gt Change Directory and change to the directory you saved the DO file to in step 1 above c Enter the following command at the QuestaSim gt prompt vsim voptargs acc test counter 3 Execute the DO file and run the design a Type do add_bkmrk do at the VSIM gt prompt b Type run 1500 ns at the VSIM gt prompt The simulation runs and the DO file creates two bookmarks c Ifthe Wave window is docked in the Main window click somewhere in the Wave window and select Wave gt Bookmarks gt bk1 If the window is undocked select View gt Bookmarks gt bk1 in the Wave window
55. he Change Memory dialog Figure 7 14 Figure 7 14 Changing Memory Content for a Range of Addresses Change Memory Instance Name Iram tb dpramij mem Address Range Fill Type Value Addresses in hexadecimal Increment C Decrement Start oxoo000006 End 0000009 Random Fill Data Skip d 0 word s EE LL OK Cancel Apply b Select Addresses and enter the start address as 0x00000006 and the end address as 0x00000009 The hex notation is optional c Select Random as the Fill Type d Enter 0 as the Fill Data setting the seed for the Random pattern e Click OK The data in the specified range are replaced with a generated random fill pattern Figure 7 15 ModelSim Tutorial v6 4b 73 Viewing And Initializing Memories Interactive Debugging Commands Figure 7 15 Random Content Generated for a Range of Addresses z memory ram tb dpram1 mem jos 00000002 15 00000004 1 00000006 92 40 0000000 22 23 0000000c oo0o0000e 4 8 nen 3 Change contents by highlighting You can also change data by highlighting them in the Address Data pane a Highlight the data for the addresses 0x0000000c 0x0000000e as shown in Figure 7 16 Figure 7 16 Changing Memory Contents by Highlighting z memory ram tb dpram1 mem 00000000 oooo0002 00000004 00000006 00
56. he simulator 81 time measuring in Wave window 56 V vcom command 62 verror command 47 vlib command 62 vlog command 62 vsim command 16 W Wave window adding items to 54 83 ABCDEFGHIJKLMNOPQRSTUVWXYZ cursors 56 measuring time with cursors 56 zooming 55 working library creating 11 16 z zooming Wave window 55 84 ModelSim Tutorial v6 4b End User License Agreement The latest version of the End User License Agreement is available on line at www mentor com terms_conditions enduser cfm IMPORTANT INFORMATION USE OF THIS SOFTWARE IS SUBJECT TO LICENSE RESTRICTIONS CAREFULLY READ THIS LICENSE AGREEMENT BEFORE USING THE SOFTWARE USE OF SOFTWARE INDICATES YOUR COMPLETE AND UNCONDITIONAL ACCEPTANCE OF THE TERMS AND CONDITIONS SET FORTH IN THIS AGREEMENT ANY ADDITIONAL OR DIFFERENT PURCHASE ORDER TERMS AND CONDITIONS SHALL NOT APPLY END USER LICENSE AGREEMENT Agreement This is a legal agreement concerning the use of Software between you the end user as an authorized representative of the company acquiring the license and Mentor Graphics Corporation and Mentor Graphics Ireland Limited acting directly or through their subsidiaries collectively Mentor Graphics Except for license agreements related to the subject matter of this license agreement which are physically signed by you and an authorized representative of Mentor Graphics this Agreement and the applicable qu
57. icular third party A current list of Mentor Graphics trademarks may be viewed at www mentor com terms_conditions trademarks cfm Table of Contents Chapter 1 IntroducloB i5 65564520s806056505554545 05500589 RE REA PEE ERA EA PERG S E AS PS 9 a ee bee RE cand aoe pa RP chee oho ok VS 9 Before vou Sih ee oe 9 Example Dess sesse foe eee ae bh ee Pewee soe eee eee eee see eed 9 Chapter 2 Conceptual OVeEVIEW cR ra Rr Ra Roa e 11 Basic Simulation P ER PEERS EA d Rd dcs 11 gui Ado secans ante aed eden eosed gece 12 Multiple Library FloW 2 pur A ORO RE D beds ea ERE RR qub ane 13 TO018 5 3 2 5c rep ER E deb ex PERPE RECEN QU EINE Ed ERE RES 14 Chapter 3 Basic Simulation Gad ERE hacen die 15 Create the Working Design Library is sss Rer RR ER RR RARE OR ERR RR CER URS 16 R n the Simula tion eto leote uses bd aeo a 20 Set Breakpoints and Step through the 22 Navigating the ueri AUS Lupa U xU RE Sia eau Edu saa edis 25 Chapter 4 ly lo ova ican eke carne Kees ee ie eee Re Re eRe donee Meas 31 Creale a New Projects ood Re ESCOL
58. ion of interest charges in the amount of one and one half percent per month or the applicable legal rate currently in effect whichever is lower Some Software may contain code distributed under a third party license agreement that may provide additional rights to you Please see the applicable Software documentation for details This Agreement may only be modified in writing by authorized representatives of the parties Waiver of terms or excuse of breach must be in writing and shall not constitute subsequent consent waiver or excuse Rev 060210 Part No 227900
59. ions for checking values look at the values shown in the Objects window Figure 3 14 24 ModelSim Tutorial v6 4b Basic Simulation Navigating the Interface Figure 3 14 Values Shown in Objects Window Objects tpd_reset_to_count Parameter Internal tpd clk to count Parameter Internal count Out clk 50 In reset SH Net In e set your mouse pointer over a variable in the Source window and a yellow box will appear with the variable name and the value of that variable at the time of the selected cursor in the Wave window e highlight a signal parameter or variable in the Source window right click it and select Examine from the pop up menu to display the variable and its current value in a Source Examine window Figure 3 15 Figure 3 15 Parameter Name and Value in Source Examine Window P Source Enamine xi test counter dut tpd reset to count 3 ox use the examine command at the VSIM gt prompt to output a variable value to the Main window Transcript i e examine count 5 Try out the step commands a Click the Step icon on the Main window toolbar This single steps the debugger Experiment on your own Set and clear breakpoints and use the Step Step Over and Continue Run commands until you feel comfortable with their operation Navigating the Interface The Main window is composed of a number of panes and sub windows that display various types
60. lation Flow Overview 11 Figure 2 2 Project FloW 13 Figure 2 3 Multiple Library Flow 2 14 Figure 3 1 Basic Simulation Flow Simulation 15 Figure 3 2 The Create a New Library 1 16 Figure 3 3 work Library in the 17 Figure 3 4 Compile Source Files Dialog 18 Figure 3 5 Verilog Modules Compiled into work Library 18 Figure 3 6 Loading Design with Start Simulation Dialog 19 Figure 3 7 Workspace sim Tab Displays Design Hierarchy 20 Figure 3 8 Object Pane Displays Design 20 Figure 3 9 Using the Popup Menu to Add Signals to Wave Window 21 Figure 3 10 Waves Drawn in Wave 22 Figure 3 11 Setting Breakpoint in Source 23 Figure 3 12 Setting Restart Functions 24 Figure 3 13 Blue Arrow Indicates Where Simulation 24 Figure 3 14 Values Shown in Objects 25 Figure 3 15
61. le C Tutorial examples tutorials verilog projects test_counter Module C Tutorial examples tutorials verilog projects Library MODEL TECH sv std i vital2000 Library MODEL_TECH vital2000 i ieee Library MODEL TECH ieee i modelsim lib Library MODEL TECH modelsim lib std library TFCH std MA Design Unit s Resolution work test_counter ps wi Optimization lr Enable optimization Optimization Options Save Cancel b Type counter in the Simulation Configuration Name field c Select HDL from the Place in Folder drop down d Click the icon next to the work library and select test_counter e Click the Resolution drop down and select ps 40 ModelSim Tutorial v6 4b Projects Simulation Configurations f For Verilog click the Verilog tab and check Enable hazard checking hazards g Click Save The Project tab now shows a Simulation Configuration named counter in the HDL folder Figure 4 14 908 4 14 A Simulation pon in the Project Tab Works space iiis Mae 3C Design Files Folder HDL Folder counter v Verilog 1 04 14 05 07 54 31 PM E tcounter v 9 Verilog O 04 14 05 07 54 32 PM M counter Simulation 2 Load the Simulation Configuration a Double click the counter Simulation Configuration in the Project tab In the Transcript pane of the Main window the vsim the ModelSim simulator i
62. lso add additional cursors name lock and delete cursors use cursors to measure time intervals and use cursors to find transitions First dock the Wave window in the Main window by clicking the dock icon Fa Working with a Single Cursor 1 Position the cursor by clicking and dragging a Click the Select Mode icon on the Wave window toolbar b Click anywhere in the waveform pane 56 ModelSim Tutorial v6 46 Analyzing Waveforms Using Cursors in the Wave Window A cursor is inserted at the time where you clicked Figure 6 4 Figure 6 4 Working with a Single Cursor in the Wave Window wave default Messages 4 ftest_counter clk 1 4 j test counter reset 0 YOO Now o cursori As gg wave c Drag the cursor and observe the value pane The signal values change as you move the cursor This is perhaps the easiest way to examine the value of a signal at a particular time d In the waveform pane drag the cursor to the right of a transition with the mouse positioned over a waveform The cursor snaps to the nearest transition to the left Cursors snap to a waveform edge if you click or drag a cursor to within ten pixels of a waveform edge You can set the snap distance in the Window Preferences dialog select Tools gt Window Preferences e In the cursor pane drag the cursor to the right of a transition Figure 6 4 The cursor doesn t snap to a
63. mulation Create the Working Design Library Create the Working Design Library Before you can simulate a design you must first create a library and compile the source code into that library 1 Create a new directory and copy the design files for this lesson into it Start by creating a new directory for this exercise in case other users will be working with these lessons Verilog Copy counter v and tcounter v files from lt install_dir gt examples tutorials verilog basicSimulation to the new directory VHDL Copy counter vhd and tcounter vhd files from lt install_dir gt examples tutorials vhdl basicSimulation to the new directory 2 Start ModelSim if necessary a Type vsim at a UNIX shell prompt or use the ModelSim icon in Windows Upon opening ModelSim for the first time you will see the Welcome to ModelSim dialog Click Close b Select File gt Change Directory and change to the directory you created in step 1 3 Create the working library a Select File gt New gt Library This opens a dialog where you specify physical and logical names for the library Figure 3 2 You can create a new library or map to an existing library We ll be doing the former Figure 3 2 The Create a New Library Dialog x Create n Y C an existing library Library Name work m Library Physical Name work
64. n Dialog 0 0 0 cee eee eee eee 40 Figure 4 14 A Simulation Configuration in the Project Tab 41 Figure 4 15 Transcript Shows Options for Simulation Configurations 41 Figure 5 1 Creating New Resource 44 Figure 5 2 Compiling into the Resource 45 Figure 5 3 Verilog Simulation Error Reported in Main Window 47 ModelSim Tutorial v6 4b List of Figures Figure 5 4 VHDL Simulation Warning Reported in Main Window 47 Figure 5 5 Specifying a Search Library in the Simulate Dialog 49 Figure 5 6 Mapping to the parts lib Library 50 Figure 5 7 Adding LIBRARY and USE Statements to the Testbench 51 Figure 6 1 Panes of the Wave Window 53 Figure 6 2 Undocking the Wave Window 55 Figure 6 3 Zooming in with the Mouse 56 Figure 6 4 Working with a Single Cursor in the Wave 57 Figure 6 5 Renaming a 58 Figure 6 6 Interval Measurement Between Two 59 Figure 6 7 A Locked Cursor in the Wave Window 59 Figure 7
65. natively you can save the Main window transcript as a DO file In this exercise you will use the commands you enter in the Main window transcript to create a DO file that adds signals to the Wave window provides stimulus to those signals and then advances the simulation 1 Load the fest counter design unit a If necessary start ModelSim b Change to the directory you created in the Basic Simulation lesson c Enter vsim test counter to load the design unit ModelSim Tutorial v6 4b 7T Automating Simulation Running in Command Line Mode 2 Enter commands to add signals to the Wave window force signals and run the simulation a Select File gt New gt Source gt Do to create a new DO file b Enter the following commands into the source window add wave count add wave clk add wave reset force freeze clk 00 1 50 ns r 100 force reset 1 run 100 Force reset 0 run 300 force reset 1 run 400 force reset 0 run 200 3 Save the file a Select File Save As b Type sim do in the File name field and save it to the current directory 4 Load the simulation again and use the DO file a Enter quit sim at the VSIM gt prompt b Enter vsim test counter at the ModelSim gt prompt c Enter do sim do at the VSIM prompt ModelSim executes the saved commands and draws the waves in the Wave window 5 When you are done with this exercise select File gt Quit to quit ModelSim Running in Command Line Mode
66. ndow a Select the Files tab in the Main window Workspace b Click the sign next to the sim filename to see the contents of vsim wlf dataset c Double click counter v or counter vhd if you are simulating the VHDL files to open it in the Source window 2 Seta breakpoint on line 36 of counter v or line 39 of counter vhd for VHDL a Scroll to line 36 and click in the BP breakpoint column next to the line number A red ball appears in the line number column at line number 36 Figure 3 11 indicating that a breakpoint has been set 22 ModelSim Tutorial v6 4b Basic Simulation Set Breakpoints and Step through the Source Figure 3 11 Setting Breakpoint in Source Window Ih C Tutorialfexamples tutorials verilog basicSimulation counter v 27 for i 4 b0 carry 4 1 amp amp i lt 7 i i 4 bl 28 begin 29 increment i val i carry 30 carry val i amp carry 31 end 32 end 3d endfunction 34 35 always B posedge clk or posedge reset 36 if reset 37 count tpd reset to count 8 h00 38 else 39 count lt 8tpd to count increment count 40 a i h counter v 3 Disable enable and delete the breakpoint a Click the red ball to disable the breakpoint It will become a black ball b Click the black ball again to re enable the breakpoint It will become a red ball c Click the red ball with your right mouse button and select Remove Breakpoint 3
67. ntents for the Specified Addresses 75 Figure 8 1 A Dataset in the Main Window Workspace 80 ModelSim Tutorial v6 4b 7 Table 3 1 The Main Window ModelSim Tutorial v6 4b List of Tables Chapter 1 Introduction Assumptions We assume that you are familiar with the use of your operating system You should also be familiar with the window management functions of your graphic interface OpenWindows OSF Motif CDE KDE GNOME or Microsoft Windows 2000 XP We also assume that you have a working knowledge of the language in which your design and or testbench is written i e VHDL Verilog etc Although ModelSim is an excellent tool to use while learning HDL concepts and practices this document is not written to support that goal Before you Begin Preparation for some of the lessons leaves certain details up to you You will decide the best way to create directories copy files and execute programs within your operating system When you are operating the simulator within ModelSim s GUI the interface is consistent for all platforms Examples show Windows path separators use separators appropriate for your operating system when trying the examples Example Designs ModelSim comes with Verilog and VHDL versions of the designs used in these lessons This allows you to do the tutorial regardless of which license type you have Though we have tried to minimize the differences be
68. nvocation shows the hazards and t ps switches Figure 4 15 These are the command line equivalents of the options you specified in the Simulate dialog Figure 4 15 Transcript Shows Options for Simulation Configurations Transcript tt Compile of tcounter y was successful H Compile of counter was successful 2 compiles 0 failed with no errors hazards t ps work test counter vsim hazards t ps work test_ counter d 8 Loading wotk counter Line VSIM 5 Switches Project test Now Ops Delta 0 Lesson Wrap Up This concludes this lesson Before continuing you need to end the current simulation and close the current project 1 Select Simulate gt End Simulation Click Yes ModelSim Tutorial v6 4b 41 Projects Simulation Configurations 2 Select the Project tab in the Main window Workspace 3 Right click in this tab to open a popup menu and select Close Project 4 Click OK If you do not close the project it will open automatically the next time you start ModelSim 42 ModelSim Tutorial v6 4b Chapter 5 Working With Multiple Libraries Introduction In this lesson you will practice working with multiple libraries You might have multiple libraries to organize your design to access IP from a third party source or to share common parts between simulations You will start the lesson by creating a resource library that contains the count
69. oading 54 Add Objects to Wave Window 8 5 54 Zooming the Waveform 1 1 55 Using Cursors in Wave 56 Working with a Single Cursor 0 0 0 eee ranee 56 Working with Multiple Cursors 58 Chapter 7 Viewing And Initializing Memories 61 View a Memory and its Contents 0 0 cece eee en eee 62 Navigate Within 5 65 Export Memory Data to a 67 Initialize a Memory Ro HP depo da os 69 Interactive Debugging Commands 0 0 cece eee eh 12 Chapter 8 Automahno Simulation 6a qe ew eR RED CERE o Epo EAE HORS EAR Rs TI Creating Simpl DO PIG ou oue iy P pes Ed REP SUNL Ia udo 77 Running in Command Line 78 Using Tcl with 81 Index End User License Agreement 4 ModelSim Tutorial v6 4b List of Examples ModelSim Tutorial v6 4b List of Figures Figure 2 1 Basic Simu
70. ociated testbench The pathnames are as follows Verilog lt install_dir gt examples tutorials verilog projects counter v and tcounter v VHDL lt install_dir gt examples tutorials vhdl projects counter vhd and tcounter vhd This lesson uses the Verilog files tcounter v and counter v If you have a VHDL license use tcounter vhd and counter vhd instead Related Reading User s Manual Chapter Projects Create a New Project 1 Create a new directory and copy the design files for this lesson into it Start by creating a new directory for this exercise in case other users will be working with these lessons Verilog Copy counter v and tcounter v files from lt install_dir gt examples tutorials verilog projects to the new directory VHDL Copy counter vhd and tcounter vhd files from lt install_dir gt examples tutorials vhdl projects to the new directory ModelSim Tutorial v6 4b 31 Projects Create a New Project 2 If you just finished the previous lesson ModelSim should already be running If not start ModelSim a Type vsim at a UNIX shell prompt or use the ModelSim icon in Windows b Select File gt Change Directory and change to the directory you created in step 1 3 Create a new project a Select File gt New gt Project Main window from the menu bar This opens the Create Project dialog where you can enter a Project Name Project Location i e directory and Default Library Name Figure 4 1 You c
71. of the mem 2 tab and select Import to bring up the Import Memory dialog box b For Load Type select Both File and Data c For Address Range select Addresses and enter 0 as the Start address and 300 as the End address This means that you will be loading the file from 0 to 300 However the reloc mem file contains only 251 addresses of data Addresses 251 to 300 will be loaded with the fill data you specify next d For File Load select the MTI File Format and enter reloc mem in the Filename field e For Data Load select a Fill Type of Increment Th In the Fill Data field set the seed value of 0 for the incrementing data Click OK B 09 View the data near address 250 by double clicking on any address in the Address column and entering 250 You can see the specified range of addresses overwritten with the new data Also you can see the incrementing data beginning at address 251 Figure 7 12 ModelSim Tutorial v6 4b 71 Viewing And Initializing Memories Interactive Debugging Commands Figure 7 12 Data Increments Starting at Address 251 z memory ram tb spram3 mem 00000000000000000010010000100001 00000000000000000010010000100010 1 1 11
72. ons may be technically implemented through the use of authorization codes or similar devices and c support services provided including eligibility to receive telephone support updates modifications and revisions EMBEDDED SOFTWARE If you purchased a license to use embedded software development ESD Software if applicable Mentor Graphics grants to you a nontransferable nonexclusive license to reproduce and distribute executable files created using ESD compilers including the ESD run time libraries distributed with ESD C and C compiler Software that are linked into a composite program as an integral part of your compiled computer program provided that you distribute these files only in conjunction with your compiled computer program Mentor Graphics does NOT grant you any right to duplicate incorporate or embed copies of Mentor Graphics real time operating systems or other embedded software products into your products or applications without first signing or otherwise agreeing to a separate agreement with Mentor Graphics for such purpose BETA CODE Software may contain code for experimental testing and evaluation Beta Code which may not be used without Mentor Graphics explicit authorization Upon Mentor Graphics authorization Mentor Graphics grants to you a temporary nontransferable nonexclusive license for experimental use to test and evaluate the Beta Code without charge for a limited period of time specified by Men
73. otation contain the parties entire understanding relating to the subject matter and supersede all prior or contemporaneous agreements If you do not agree to these terms and conditions promptly return or if received electronically certify destruction of Software and all accompanying items within five days after receipt of Software and receive a full refund of any license fee paid GRANT OF LICENSE The software programs including any updates modifications revisions copies documentation and design data Software are copyrighted trade secret and confidential information of Mentor Graphics or its licensors who maintain exclusive title to all Software and retain all rights not expressly granted by this Agreement Mentor Graphics grants to you subject to payment of appropriate license fees a nontransferable nonexclusive license to use Software solely a in machine readable object code form b for your internal business purposes c for the license term and d on the computer hardware and at the site authorized by Mentor Graphics A site is restricted to a one half mile 800 meter radius Mentor Graphics standard policies and programs which vary depending on Software license fees paid or services purchased apply to the following a relocation of Software b use of Software which may be limited for example to execution of a single session by a single user on the authorized hardware or for a restricted period of time such limitati
74. ple Libraries Creating the Project a Click the Compile icon on the Main window toolbar b Select the parts_lib library from the Library list Figure 5 2 Figure 5 2 Compiling into the Resource Library Compile Source Files 2 Library pssib sts Look in resource library parts_lib File name counter v Files of type HDL Files v vl hdl v Y Done Compile selected files together Default Options Edit Source c Double click counter v to compile it d Click Done You now have a resource library containing a compiled version of the counter design unit 6 Change to the testbench directory a Select File gt Change Directory and change to the testbench directory you created in step 2 Creating the Project Now you will create a project that contains tcounter v the counter s testbench Create the project a Select File New Project b Type counter in the Project Name field c Do not change the Project Location field or the Default Library Name field The default library name is work ModelSim Tutorial v6 4b 45 Working With Multiple Libraries Linking to the Resource Library d Make sure Library Mappings is selected The default modelsim ini file will be used Click OK 2 Add the testbench to the project a b Click Add Existing File in the Add items to the Project dialog Cli
75. ptimization Optimization Options OK When the design is loaded you will see a new tab in the Workspace named sim that displays the hierarchical structure of the design Figure 3 7 You can navigate within the hierarchy by clicking on any line with a expand or contract icon You will also see a tab named Files that displays all files included in the design ModelSim Tutorial v6 4b 19 Basic Simulation Run the Simulation Figure 3 7 Workspace sim Tab Displays Design Hierarchy Workspace x instance jDesinunt Design unit type test_counter test counter fast Module acc lt full gt gf dut counter Fast Module acc lt full gt INITIAL 30 test counter Fast Process INITIAL 23 test counter Fast Process INITIAL 17 test counter Fast Process le ysim_capacity Foreign acc lt none gt ES Memories 2 View design objects in the Objects pane a Open the View menu and select Objects The command line equivalent is view objects The Objects pane Figure 3 8 shows the names and current values of data objects in the current region selected in the Workspace Data objects include signals nets registers constants and variables not declared in a process generics parameters Figure 3 8 Object Pane Displays Design Objects Objects reset Register Internal count xxxxxxxx Met Internal clk x Register Internal
76. r gt examples tutorials verilog libraries to the new directory You are creating two directories in this lesson to mimic the situation where you receive a resource library from a third party As noted earlier we will link to the resource library in the first directory later in the lesson 3 Start ModelSim and change to the resource library directory If you just finished the previous lesson ModelSim should already be running If not start ModelSim a Type vsim at a UNIX shell prompt or use the ModelSim icon in Windows If the Welcome to ModelSim dialog appears click Close b Select File Change Directory and change to the resource library directory you created in step 1 4 Create the resource library a Select File New Library b Type parts lib in the Library Name field Figure 5 1 Figure 5 1 Creating New Resource Library Create a New Library E xj Create anew library and a logical mapping to it C to an existing library m Library Name parts id Library Physical Name parts ib DK Cancel The Library Physical Name field is filled out automatically Once you click OK ModelSim creates a directory for the library lists it in the Library tab of the Workspace and modifies the modelsim ini file to record this new library for the future 5 Compile the counter into the resource library 44 ModelSim Tutorial v6 4b Working With Multi
77. read in stimulus do stim do output results write list counter lst quit the simulation quit f c Save the file with the name sim do and place it in the current directory 4 Run the batch mode simulation a Type vsim c do sim do counter wlf counter wlf at the DOS UNIX prompt The c argument instructs ModelSim not to invoke the GUI The wlf argument saves the simulation results in a WLF file This allows you to view the simulation results in the GUI for debugging purposes 5 View the list output a Open counter lst and view the simulation results Output produced by the Verilog version of the design should look like the following ModelSim Tutorial v6 4b 79 Automating Simulation Running in Command Line Mode ns counter count delta counter clk counter reset O0 0 xz 1 0 50 0 100 0 00 100 1 000 150 0 0 0 151 0 1 0 200 0 100 250 0 1 0 The output may appear slightly different if you used the VHDL version 6 View the results in the GUI Since you saved the simulation results in counter wlf you can view them in the GUI by invoking VSIM with the view argument LLLLL Make sure your PATH environment variable is set with the current version of ModelSim at the front of the string a Type vsim view counter wlf at the DOS UNIX prompt The GUI opens and a dataset tab named counter is displayed in the Workspace Fig
78. rial examples counter v Compiling module counter ieee Library modelsim lib Library tt Top level modules std Library counter Library Load the Design Workspace 1 Load the test_counter module into the simulator a Inthe Workspace click the sign next to the work library to show the files contained there 18 ModelSim Tutorial v6 4b Basic Simulation Create the Working Design Library b Double click test counter to load the design You can also load the design by selecting Simulate gt Start Simulation in the menu bar This opens the Start Simulation dialog With the Design tab selected click the 4 sign next to the work library to see the counter and test counter modules Select the test counter module and click OK Figure 3 6 Figure 3 6 Loading Design with Start Simulation Dialog Start Simulation VHDL Verilog Libraries SDF Others Library C 6 0 Tutorial examples work Module C 46 0 Tutorial examples counter test_counter Module C 6 0 Tutorial examples tcounter v vital2000 Library MODEL_TECH vital2000 ieee Library MODEL_TECH M modelsim lib Library MODEL TECH modelsim lib std Library MODEL TECH std std developerskit Library MODEL_TECH std_developerskit m see librae thONE TECHS Jomancne JET ES gt Design Unit s Resolution work test_counter default vi Optimization Enable o
79. ries Initialize a Memory Figure 7 10 Import Memory Dialog Import Memory The default Load Type is File Only b Type data_mem mem in the Filename field c Click OK The addresses in instance ram_tb spram3 mem are updated with the data from data_mem mem Figure 7 11 70 ModelSim Tutorial v6 4b Viewing And Initializing Memories Initialize a Memory Figure 7 11 Initialized Memory from File and Fill Pattern memory ram ams 00000000000000000000000000011100 oo000000000000000000000000011101 00000000000000000000000000011110 11111 10 100001 100010 10 11 100100 100101 4 El ven E vent mem 2 In this next step you will experiment with importing from both a file and a fill pattern You will initialize spram3 with the 250 addresses of data you exported previously into the relocatable file reloc mem You will also initialize 50 additional address entries with a fill pattern 3 Import the ram_tb spram3 mem instance with a relocatable memory pattern reloc mem and a fill pattern a Right click in the data column
80. s You shall maintain a record of the number and primary location of all copies of Software including copies merged with other software and shall make those records available to Mentor Graphics upon request You shall not make Software available in any form to any person other than employees and on site contractors excluding Mentor Graphics competitors whose job performance requires access and who are under obligations of confidentiality You shall take appropriate action to protect the confidentiality of Software and ensure that any person permitted access to Software does not disclose it or use it except as permitted by this Agreement Except as otherwise permitted for purposes of interoperability as specified by applicable and mandatory local law you shall not reverse assemble reverse compile reverse engineer or in any way derive from Software any source code You may not sublicense assign or otherwise transfer Software this Agreement or the rights under it whether by operation of law or otherwise attempted transfer without Mentor Graphics prior written consent and payment of Mentor Graphics then current applicable transfer charges Any attempted transfer without Mentor Graphics prior written consent shall be a material breach of this Agreement and may at Mentor Graphics option result in the immediate termination of the Agreement and licenses granted under this Agreement The terms of this Agreement including without limitation the lic
81. test ringbuf clock m negedge time test ringbuf clock m posedge time Jtest ringbuf clock m posedge First jtest ringbuf clock m start time jtest ringbuf clock m duty cycle jtest ringbuf clock m period 5 ringbuf clock sig ftest_ringbuF ring_INST clock Jtest ringbuf ring IMST txda itest rinahufirina INSTireset Now Cursor 1 5 5 False 0 0 5 10 False sto sto sto 500 ns 125 ns 9 141 142 344 145 347 50 51 153 354 56 dar 579 Now 500 Delta 2 cursor names pane cursor values pane cursor pane cursor toolbox ModelSim Tutorial v6 4b 53 Analyzing Waveforms Loading a Design Related Reading User s Manual sections Wave Window and Recording Simulation Results With Datasets Loading a Design For the examples in this lesson we have used the design simulated in Basic Simulation 1 If you just finished the previous lesson ModelSim should already be running If not start ModelSim a Type vsim at a UNIX shell prompt or use the ModelSim icon in Windows If the Welcome to ModelSim dialog appears click Close 2 Load the design a Select File gt Change Directory and open the directory you created in the Basic Simulation lesson The work library should already exist b Click the icon next to the work library and double click fest counter ModelSim loads the design and adds sim and Files tabs to the Workspace Add Objects to the Wave Windo
82. the working library you compile your design units into it The ModelSim library format is compatible across all supported platforms You can simulate your design on any platform without having to recompile your design Loading the Simulator with Your Design and Running the Simulation With the design compiled you load the simulator with your design by invoking the simulator on a top level module Verilog or a configuration or entity architecture pair VHDL Assuming the design loads successfully the simulation time is set to zero and you enter run command to begin simulation Debugging Your Results If you don t get the results you expect you can use ModelSim s robust debugging environment to track down the cause of the problem Project Flow A project is a collection mechanism for an HDL design under specification or test Even though you don t have to use projects in ModelSim they may ease interaction with the tool and are useful for organizing files and specifying simulation settings The following diagram shows the basic steps for simulating a design within a ModelSim project 12 ModelSim Tutorial v6 4b Conceptual Overview Multiple Library Flow Figure 2 2 Project Flow Create a project Add files to the project Compile design files Run simulation Debug results As you can see the flow is similar to the basic simulation flow However there are two important differences e You do not
83. tor Graphics This grant and your use of the Beta Code shall not be construed as marketing or offering to sell a license to the Beta Code which Mentor Graphics may choose not to release commercially in any form If Mentor Graphics authorizes you to use the Beta Code you agree to evaluate and test the Beta Code under normal conditions as directed by Mentor Graphics You will contact Mentor Graphics periodically during your use of the Beta Code to discuss any malfunctions or suggested improvements Upon completion of your evaluation and testing you will send to Mentor Graphics a written evaluation of the Beta Code including its strengths weaknesses and recommended improvements You agree that any written evaluations and all inventions product improvements modifications or developments that Mentor Graphics conceived or made during or subsequent to this Agreement including those based partly or wholly on your feedback will be the exclusive property of Mentor Graphics Mentor Graphics will have exclusive rights title and interest in all such property The provisions of this section 3 shall survive the termination or expiration of this Agreement RESTRICTIONS ON USE You may copy Software only as reasonably necessary to support the authorized use Each copy must include all notices and legends embedded in Software and affixed to its medium and container as received from Mentor Graphics All copies shall remain the property of Mentor Graphics or its licensor
84. tween the Verilog and VHDL versions we could not do so in all cases In cases where the designs differ e g line numbers or syntax you will find language specific instructions Follow the instructions that are appropriate for the language you use ModelSim Tutorial v6 4b 9 Introduction Before you Begin 10 ModelSim Tutorial 4 Chapter 2 Conceptual Overview Introduction ModelSim is a verification and simulation tool for VHDL Verilog SystemVerilog and mixed language designs This lesson provides a brief conceptual overview of the ModelSim simulation environment It is divided into fourtopics which you will learn more about in subsequent lessons Basic simulation flow Refer to Chapter 3 Basic Simulation Project flow Refer to Chapter 4 Projects Multiple library flow Refer to Chapter 5 Working With Multiple Libraries Debugging tools Refer to remaining lessons Basic Simulation Flow The following diagram shows the basic steps for simulating a design in ModelSim Figure 2 1 Basic Simulation Flow Overview Lab Creating the Working Library ModelSim Tutorial v6 4b 11 Conceptual Overview Project Flow In ModelSim all designs are compiled into a library You typically start a new simulation in ModelSim by creating a working library called work Work is the library name used by the compiler as the default destination for compiled design units Compiling Your Design After creating
85. umn and select Find The Find in dialog box opens Figure 7 8 Figure 7 8 Searching for a Specific Data Value EB memory ram tb sprami mem 10000110 _ 2 10000111 Find in ram tb sprami mem x 10001000 10001001 Find Data Find Next apenas Pattern 11111014 18501160 glob E g 1234 101 011 05 hfa38 Replace 10001101 C regexp 10001110 10001111 T 10810000 Replace with 10010001 Find backwards Clse 10010010 66 ModelSim Tutorial v6 4b Viewing And Initializing Memories Export Memory Data to a File b Type 11111010 in the Find data field and click Find Next The data scrolls to the first occurrence of that address Click Find Next a few more times to search through the list c Click Close to close the dialog box Export Memory Data to a File You can save memory data to a file that can be loaded at some later point in simulation 1 Export memory pattern from the ram_tb spramI1 mem instance to a file Make sure ram tb spram1 mem is open and selected in the MDI frame b Select File Export Memory Data to bring up the Export Memory dialog box Figure 7 9 ModelSim Tutorial v6 4b 67 Viewing And Initializing Memories Export Memory Data to a File 68 g Figure 7 9 Export Memory Dialog Export Memory x Instance Name Iram tb sprami mem Address Range
86. ure 8 1 Figure 8 1 A Dataset in the Main Window Workspace Workspace w nstance Design unit type visibility E counter counter Module acc lt none gt 4 b Right click the counter instance and select Add gt To Wave gt All items in region The waveforms display in the Wave window 7 When you finish viewing the results select File gt Quit to close ModelSim 80 ModelSim Tutorial v6 46 Automating Simulation Using Tcl with the Simulator Using Tcl with the Simulator The DO files used in previous exercises contained only ModelSim commands However DO files are really just Tcl scripts This means you can include a whole variety of Tcl constructs such as procedures conditional operators math and trig functions regular expressions and so forth In this exercise you create a simple Tcl script that tests for certain values on a signal and then adds bookmarks that zoom the Wave window when that value exists Bookmarks allow you to save a particular zoom range and scroll position in the Wave window 1 Create the script Ina text editor open a new file and enter the following lines proc add_wave_zoom stime num echo Bookmarking wave num bookmark add wave bk num expr stime 50 expr Sstime 100 0 These commands do the following e Create a new procedure called add wave zoom that has two arguments stime and num e Create a bookmark with zoom ran
87. v_ MODEL_TECH vite MODEL_TECH iee MODEL_TECH mo M DEL TECH std MODEL_TECH std MODEL_TECH syr M DEL TECH ver a Double click the fest counter design unit You should see 3 new tabs in the Main window Workspace The sim tab displays the structure of the fest counter design unit Figure 4 7 The Files tab contains information about the underlying source files The Memories tab lists all memories in the design Figure 4 7 Structure Tab for a Loaded Design Workspace FlInstance Design unit Design unit type _ visibility acc lt full gt acc lt full gt g F test counter 34 dut 31 23 INITIAL 17 vsim_capacity test_counter Fast counter Fast test counter Fast test counter fast test counter fast Module Module Process Process Process Foreign Tacc lt none gt At this point you would typically run the simulation and analyze or debug your design like you did in the previous lesson For now you ll continue working with 36 ModelSim Tutorial v6 4b Projects Organizing Projects with Folders the project However first you need to end the simulation that started when you loaded test_counter 2 End the simulation a Select Simulate gt End Simulation b Click Yes Organizing Projects with Folders If you have a lot of files to add to a project you may want to organize them in folders You
88. w ModelSim offers several methods for adding objects to the Wave window In this exercise you will try different methods 1 Add objects from the Objects pane a Select an item in the Objects pane of the Main window right click and then select Add To Wave All items in region ModelSim adds several signals to the Wave window 2 Undock the Wave window By default ModelSim opens Wave windows as a tab in the MDI frame of the Main window You can change the default via the Preferences dialog Tools Edit Preferences Refer to the section Simulator GUI Preferences in the User s Manual for more information a Click the undock button on the Wave pane Figure 6 2 The Wave pane becomes a standalone un docked window You may need to resize the window 54 ModelSim Tutorial v6 4b Analyzing Waveforms Zooming the Waveform Display Figure 6 2 Undocking the Wave Window undock icon wave default Messages 4 jtest counterjclk x 4 jtest counterlreset test counter count boooooox Cursor 1 gg wave 45 3 Add objects using drag and drop You can drag an object to the Wave window from many other windows and panes e g Workspace Objects and Locals a Inthe Wave window select Edit gt Select All and then Edit gt Delete b Drag an instance from the sim tab of the Main window to the Wave window ModelSim adds the objects for that instance to the Wave window c Dr

Download Pdf Manuals

Related Search

Related Contents

Kiddimoto Superbike  MURUS - MURUS1 - MURUS2 JOLLY MOTOR - enjoy  図 面 1    Philips EnergyCare GC3630  KRAFTWERK 2023  mANuAl De INstruccIoNes  MCW - MCR - galletti  Swinging London!  Numark iM1  

Copyright © All rights reserved. Failed to retrieve file