KNJN FX2 ARM development boards
Contents
1. P AT EAAS 15 1111 LPCG and EPGA Connections isos cene ca dh ie re ret ee des eco o dee ena dein cona dH retenu cure te Ae pee haaa Ri 15 11 2 Alternate f nction EPC pins eta dre ta npe e P eod eterne tia ee reta diete deme etae gae Aa aden bored iaa 15 12 Board layouts 4 ete te deren aeu ear eee dee dee anata ees detest teeta ott den ek RE ete ii 16 KNJN FX2 ARM development boards Page 2 KNJN FX2 ARM development boards Page 3 1 1 This guide Welcome to the KNJN FX2 ARM development boards guide This guide is partitioned in short and easy to read chapters and shows how to work with your ARM board In particular it explains step by step how to e Start JTAG communication with the ARM e Compile ARM projects e Run and debug from RAM and Flash 1 2 ARM the easy way The KNJN ARM boards are easy to use KNJN boards are jumper less and work right out of the box with a simple USB connection so that you get up to speed quickly and concentrate on your task 1 3 KNJN FPGA ARM boards This document applies to the following KNJN ARM processor boards e Saxo L e Xylo L e Xylo LM Since the KNJN development boards also host an FPGA refer to the KNJN FX2 FPGA boards guide for additional information The KNJN guides are available from http www knjn com docs 1 4 ARM processor The ARM processor used on your KNJN board is an NXP previously Philips LPC2132 or LPC2138 which2. KNJN FX2 ARM development boards 2007 2008 2009 2010 2011 2012 2013 KNJN LLC http www knjn com This document applies to the following boards e Saxo L e Xylo L Xylo LM Document last revision on August 28 2013 KNJN FX2 ARM development boards Page 1 Table of Contents LM leo M x A A A da Nat eet death 4 LATAS QUIN NL T one eee A eS ae En 4 1 2 BUE YACHT 4 1 3 KNIJN FPGA FARM boards un int sce eee tao e ER RUOTE intet eru bee exirent 4 AARM O trop TT 4 VOI O O DEC cA 5 Ze PPAR JV Ge er inn C mU M 5 PROT S AD Decrease AEA E semen ae M Ex EET 5 2 9 JTAG OVeISUSB aito temer ab evt hoses tenete oue Md M true aisi essi rA arena 5 9 Run OpenOG D csetera tueatur Ee esee i cR EM Api IL it 6 Sil IA GISCIVOR ante Hilo eaten ER EE E EH 6 SZ Telnetpitfalls e2 imc tete eee cate eae o detecte tetas e mel eMe esL uc Rui e eee AM Maii 6 3 9 Our first OPENOCD SESSION sess uere tgp e Peas apte REESE XE TREES dd 6 4 OpenOCD flash memory SUPPOFT c cccccecceeee cece nn eee eaaaaeaaeaaaaeeeeeeeseeeeeeeeesaaaaeeseedeeeeseeeeeeeeeeeeeeeeees 7 4 Check the flash status ri a ines 7 4 2 Erase the tas beet dete ta anne eet pt cem Nc lle cerati 7 4 3 Programithe lassa rtt eai eto toa pides 7 5 Yagarto ARM toolchaill 3 rg EE e HE e HE RR IM Tene HIE nte eei NO chiens 8 921 VAGAMO m 8 5 2 Yagarto s first file
3. lt Bx10B0B 4kB gt erased protected H8 8x8aB88B888080 C0x8008 32kB gt erased protected lpc2666 flash driver variant 2 clk 24000 gt Notes 1 The ARM needs to be stopped for these commands to work so issue the halt command to stop the ARM if required 2 The protected status shown by flash info 0 command is meaningless for the ARM LPCs 4 2 Erase the flash Use flash erase 0 0 8 to erase the whole flash of an LPC2132 The 8 is the last sector number Change it to 26 to erase the whole LPC2138 4 3 Program the flash Use flash write 0 filename 0 Of course replace filename with the file name that you want to program including its path The startup kit includes compiled files that can be programmed in the flash For example try LPC flash LEDglow bin Once programmed it is executed at power up and makes the LED glow For big files flash programming can be sped up by using the command arm7 9 dcc downloads enable KNJN FX2 ARM development boards Page 7 5 Yagarto ARM toolchain 5 1 Yagarto Yagarto provides a complete and free development environment for the ARM It includes an ARM GNU toolchain compiler amp debugger that runs natively on Windows and works nicely with OpenOCD YAGARTO Yet another GNU ARM toolchain ig P ums Loves a HOME MA Why another GNU ARM toolchain Download How to Support License information not based on C
4. OpenOCD tools casetas idee deve eoe ie de eee dea e emn e Eo enero xv nba TENEKE EEEE e eae 8 5 3 Yagarto s second file GNU ARM tO0lChAIN ooooooncocccc nnnococccnncnnnonccnnnonnnnn cnn c naar nn cnn tanaan rca rra nn nn nr anna nn n nnns nene n nennen nnn nns 8 5 4 Yagarto s tutorials Cmm 8 6 Our first ARM projet cE EEE 9 SING 9 SA AUT a E A A A A A AAA AA EA da At 9 T insight debugger csc A A t 10 1 1 Configure MOS A di 10 VEPAB in RAM o cad 11 ESSERE vicio a A e ab 11 hysu o H s zu 12 S VaAGarto s third Tilers Pm 12 8 2 Eclipse conflgurationh iori Lr ts Sod iem ce tesa Pe ox bre mena n Soo bala ved on Um Tees reve Lcd E 12 9 Miscellaneous OpenOG D i ee ret ebrei i e rooted A ta tas 13 9 1 Run Open OCD mariually 2 2 5 tees be od ei teet Hippo E Deu te dai yen ve Sd Ie vila ab De ba ias 13 9 2 Stop OpenOCD iet eoe bete laete lg ib REPRE bdsm teuer Op iie tetti bebe Tea aet 13 9 9 Run telhieb iiio Forest ote adopt ibid LA Eee RE 13 9 4 OpenOCD documentation on the We D O aa araa a a AE rE aa AEA eaa aaO 13 10 Miscellaneous A m OE EA E ide AE 14 LON AIKE oe E EE EATE E E 2s by E E E EE A 14 LUE AT POS id E E A E EA 14 103 LPC memory MAPPING yen ea a AE A E E ETT 14 10 4 OpenOCD connection problem ea ede e Re oo EP a a a EM e a s a Ariete n ion iaeaea 14 10 5 LPC213x documentation on the web neee eeaeee aeaa a a aa aaa Oa aaa ata aa kedda e aid aadi 14 IIOS
5. W erinme IOCLRi ch baat bee chops d D matkinge dl La Ta i rrelatile ivnlakilm i irolatile imnplakilm i renlatile unsigned The domed ung gne unEkigunrH unei gne OPIO BARE ADDR PEGPIO BASE ADDR OPIO BABE ADDR P CGPIC BASE ADDR OPIO BABE ADDR OnOch Dxlnii 014 j Ox Laid Omicis B pri Lele or rdeprerjart j project E dran bat Faiais ad imb D mnEkigned inb k int elf e DT RO ZuczEEX EE teat al teat Fere A tust run Amt 105 UES whiles 1 j inc iE jek j IGEETO QxSDOODODOD cles IOCLPD DEBDDDDDDD k j 1r j O inc inc AR X VE MUHE Eypescdef c h PIO BASE ADORA EFD EMN ECI gt CLA Tanks 2 console E wn r4 Keri dheri gt Mes_corfr ster Embedded debug Hats Crop Pleni cauti nl nd arme pb am 1117 07 10 50 PA RETI igb target srsare halred EARL target halted in ARA state due to single step curcenk mode Supervisor F RI par OCT po Oe Le ro requgzting target helt and geecuking mg zoZt cesat msofruaspe breakpoints enabled OrsOl O amp OOOO sexrlone rexkr segrlon sipeT 464 cpral siEpe 5bED cana os p E return Cp z KNJN FX2 ARM development boards Page 12 9 Miscellaneous OpenOCD 9 1 Run OpenOCD manually Usually FPGAconf runs OpenOCD for you when starting the JTAG server but you can also run it yourself For example opening OpenOCD manually allows using the JTAG server remotely Ope
6. image command you must include the full path to test hex ail Telnet localhost gt halt requesting target halt gt Target halted target halted in ARM state due to debug request current mode Supervisor cpsr Bx3B8BBB013 pc 8x40808081a8 gt muw BxEB1FCB4B 2 gt load_image C LEDglow test hex 466 byte written at address 6x46600006 downloaded 466 byte in Bs 35BBBus gt soft_reset_halt requesting target halt and executing a soft reset Target halted target halted in ARM state due to debug request current mode Supervisor Bx38888Bd3 pc 451515 1515151515 Target resumed Voila The code is running in the ARM and the LED is glowing happily Notes e You can issue the command wait halt after the halt above to make sure the halt command has been completed that would be important in a script because halt works asynchronously so may return before it actually happened The mww OxE01FC040 2 command is necessary because we run in RAM see LPC memory mapping for more information KNJN FX2 ARM development boards Page 9 7 Insight debugger Now that we know how to load and run code into the ARM by hand let s try with a debugger which loads the code for us and also allows to source level debug it 7 1 Configure Insight First we configure Insight so that it knows how to communicate with OpenOCD e On the command line run the command debug_inr
7. includes an ARM7TDMI core SRAM Flash and peripherals The difference between the LPC2132 and LPC2138 mainly lies in the memory available LPC2132 LPC2138 RAM 16KB 32KB Flash 64KB 512KB KNJN FX2 ARM development boards Page 4 2 OpenOCD 2 1 ARM JTAG The ARM7TDMI core has an on chip debug circuitry embedded ICE that is controlled through JTAG and allows to take control of the ARM core 2 2 OpenOCD OpenOCD or On Chip Debugger is an open source JTAG controller software for ARM processors It is easy to use yet quite capable e Support for software and hardware ARM breakpoints e Interface with source level debuggers through its GDB server e Flash memory programming OpenOCD home page can be found at http openocd berlios de web Open On Chip Debugger Free and Open On Chip Debugging In System Programming and Boundary Scan Testing OpenOCD is the software used by KNJN boards to control the ARM processors OpenOCD and its JTAG server are provided in the KNJN boards startup kit 2 3 JTAG over USB Thanks to JTAG over USB the KNJN ARM board is completely controlled through USB without needing a separate JTAG cable A separate JTAG cable can nonetheless be used if required for example if the board USB interface is used for other purposes The ARM JTAG signals are available on header pins for that purpose KNJN FX2 ARM development boards Page 5 3 Run OpenOCD 3 1 JTA
8. into C Program Fileslopenoco 5 3 Yagarto s second file GNU ARM toolchain This second file contains the GNU ARM compiler and more tools including the insight debugger By default this gets installed into C Program Files yagarto Now we are ready to compile our first ARM project we ll install Yagarto s third file later 5 4 Yagarto s tutorials Yagarto s website has tutorials on how to install and check each step of the installation process You may want to follow the instructions to learn more about Yagarto remember that when the tutorial asks to run OpenOCD run it from the JTAG server window KNJN FX2 ARM development boards Page 8 6 Our first ARM project 6 1 Compile Now that Yagarto s GNU ARM toolchain is installed let s compile our first ARM project e Locate the ARM projectiLEDglow LPC2138 ram directory in the startup kit Move it to a location where the folder name doesn t include any space like c LEDglow Insight doesn t like spaces e Open a command line prompt in the directory you just moved everything into and run the command make all This compiles the srcimain c file and creates test elf and test hex files 6 2 Run Now let s load and run the code into the ARM Get OpenOCD and Telnet running paragraph 3 1 and issue these command in the telnet window halt mww 0xE01FC040 2 load_image test hex soft reset halt resume Note for the load_
9. 31 61 unsigned int j 8 unsigned int k int inc 8x18888 while 1 H if j k j IOSETO 8x88888888 else IOCLRO 8x88888888 lit or clear k j Program stopped at line 68 40000154 68 The program is debugged in RAM which is ok for small programs 7 3 Debug in Flash The ARM has two hardware breakpoints so can also debug a program in flash ROM The flash is bigger than the RAM so that allows debugging bigger programs Use the LEDglow LPC2138 ram amp flash zip project as an example 1 Compile using the make inflash bat script This creates a test bin binary file 2 Run OpenOCD open a telnet session and Program the flash with test bin 3 Run the debug inflash bat script to debug the program KNJN FX2 ARM development boards Page 11 8 Eclipse IDE 8 1 Yagarto s third file Run it this installs the Eclipse IDE into C Program Files yagarto ide 8 2 Eclipse configuration Follow Yagarto s website tutorial to configure Eclipse to use the GNU toolchain The tutorial is long but well documented and easy to follow so it is not duplicated here Remember that when the tutorial asks you to run the GDB debugger start the JTAG server Once Eclipse is configured you can edit compile and debug with it Hermt main c EcBgea lation Fle Edt pasio Mirage Saphh Prost mu E m a E j j Ej WDebug h Paua SS Memigalor 5 eer Lire define IOPINI a cfine IOBETi define TIDIRI
10. C implements a feature to allow mapping this space to RAM The space is also mapped to a boot loader after reset a special feature of the LPC that allows programming the flash from a serial port The MEMMAP Memory Mapping control register resides at address OXEO1FCO040 in the LPC memory space and can take 3 values MEMMAP values Usage When to use 0 Boot Loader Mode Interrupt vectors are mapped to the Boot Block The device boots 1 User Flash Mode Interrupt vectors are not re mapped reside in Flash We want to run code from Flash or check if the flash is erased 2 User RAM Mode Interrupt vectors are mapped to static RAM We want to run code from RAM For more details check the MEMMAP register in the LPC213x user manual 10 4 OpenOCD connection problem OpenOCD connects to the LPC using JTAG You are allowed to program the LPC with a file that uses the JTAG pins as lOs knowing that this prevents OpenOCD to work Power cycling the board returns the JTAG functionality But if the LPC flash is programmed with such file OpenOCD cannot connect anymore even if you power cycle the board The workaround is to connect the pin P0 14 to ground at power up That prevents the LPC to load from flash at power up so allows OpenOCD to connect regardless of the flash content 10 5 LPC213x documentation on the web Home page http www nxp com pip LPC2132FBD64 html Data sheet http www nxp com acrobat
11. G server OpenOCD uses a JTAG server to be portable The server is part of KNJN s FPGA configuration tool so running OpenOCD is just a few clicks away e Run FPGAconf Select your board board menu and ARM Options ARM LPC menu Go to the ARM tab Check the Run OpenOCD and Open Telnet session boxes Click on Start JTAG server g FPGAconf Boards Tools Options Exit iw Run OpenOCD when server is started Y Open a telnet session when OpenOCD is started Saxo FPGA 12c 8051 ARM This opens OpenOCD and telnet windows E openocd exe Open On Chip Debugger accepted telnet connection from m Telnet localhost Open On Chip Debugger gt Notes If you are running a network firewall on your machine respond allow to the network connection pop ups 3 2 Telnet pitfalls e OnVista amp Windows 7 Telnet is not installed by default Go to Control panel Programs and Features click on Turn on off features and enable the Telnet client checkbox e On Windows x64 telnet may not run directly when the JTAG server starts You can either 1 move telnet exe from C windows system32 to C windows directory or 2 open telnet manually using a command prompt telnet localhost 4444 once openocd is running 3 3 Our first OpenOCD session Now we can play with the ARM processor The KNJN boards ship with a design in the LPC flash that makes the board s LED glow Try to
12. am bat This opens the insight debugger e In insight open the target selection window using the menu File Target Settings and select TCP on port 3333 Make sure all the other options are set as shown below 7 Target Selection Connection Iv Set breakpoint at main Target Remote TCP H rse breakpoint at exit Set breakpoint at T Display Download Dialog Hostname localhost Port 3333 v Fewer Options Run Options m Run Method C Run Program Iv Attach to Target Iv Download Program Continue from Last Stop Command to issue after attaching Cancel Help KNJN FX2 ARM development boards Page 10 7 2 Debug in RAM Let s start debugging e Usethe Run Run command and say Yes to restart the program This loads the program in the LPC RAM e Use the Control Continue command to start the program Check your board the ARM LED should glow That means that the ARM processor is executing the program e You can also stop the program watch variables put breakpoints step line by line etc T main c Source Window File Run View Control Preferences Help UPPOO PESAS aA e de nain c nain SOURCE y 55 ttdefine IODIR1 volatile unsigned long GPIO_BASE_ADDR 8x18 56 itdefine IOCLR1 volatile unsigned long GPIO_BASE_ADDR 8x1C 57 58 int main void 59 68 IODIRG 8x88088888 turn on the LED driver P8
13. cts berlios de index en phtml title Open On Chip Debugger KNJN FX2 ARM development boards Page 13 10 Miscellaneous LPC 10 1 ARM clock The LPC is clocked externally by a fixed 24MHz signal The ARM core clock can be raised up to 60MHz by using the LPC internal PLL see the LPC213x user manual for more details Note that the ARM clock is independent of the FPGA clock the FPGA clock can be set to 12 24 or 48MHz through FPGAconf But both clocks share a fixed relashionship because they are created from the same crystal 10 2 ARM pins Most ARM IOs are exported on headers around the ARM but a few special ARM pins are available on individual header pads ARM special pins Saxo L Xylo L LM RTXC real time clock Available at the bottom of the board Available on header pins VBAT Not available Available on a small pad VREF Wired to 3 3V Available on a small pad 1Kohms pullup resistor to 3 3V Notes e Check the KNJN FPGA ARM boards documentation for the pin locations e Some ARM IOs are also connected to FPGA lOs see chapter 11 10 3 LPC memory mapping The first 64 bytes of the ARM memory space at location 0 are special they hold the reset and interrupt vectors The LPC normally maps flash memory at location 0 but during RAM debug sessions we don t want to worry about the flash it would be a pain to have to re program the flash every time we want to debug in RAM So the LP
14. datasheets LPC2131 32 34 36 38 4 pdf User Manual http www standardics nxp com support documents microcontrollers pdf user manual Ipc2131 lpc2132 Ipc2134 1pc2136 1pc2138 pdf KNJN FX2 ARM development boards Page 14 11 1 LPC and FPGA connections KNJN development boards host an FPGA and many LPC pins are connected to the FPGA so that they can communicate together LPC pin SAXO L XYLO L LM P0 0 TXDO P0 1 RXDO P0 2 SCLO FPGA pin 22 P0 3 SDAO FPGA pin 20 P0 4 SCK0 FPGA pin 19 P0 5 MISOO FPGA pin 18 P0 6 MOSIO FPGA pin 16 P0 7 SSELO FPGA pin 15 P0 8 TXD1 FPGA pin 14 P0 9 RXD1 FPGA pin 12 P0 10 RTS1 FPGA pin 11 P0 11 CTS1 FPGA pin 9 P0 12 DSR1 FPGA pin 8 P0 13 DTR1 FPGA pin 6 P0 14 DCD1 FPGA pin 5 P0 15 RI1 FPGA pin 4 P0 16 EINTO FPGA pin 3 P0 17 SCK1 FPGA pin 51 FPGA pin 2 P0 18 MISO1 FPGA pin 52 FPGA pin 199 P0 19 MOSI1 FPGA pin 56 FPGA pin 200 P0 20 SSEL1 FPGA pin 57 P0 21 PWM5 P0 22 CAPO 0 FPGA pin 53 P0 23 FPGA pin 204 P0 25 ADO 4 FPGA pin 55 P0 26 ADO 5 P0 27 ADO 0 P0 28 ADO 1 P0 29 ADO 2 P0 30 ADO 3 LED2 P0 31 LED1 LED1 More connections can be added if required by soldering wires to the board 11 2 Alternate function LPC pins Most LPC pins can have different personalities For example e The pins RXD a
15. halt the ARM by issuing the command halt in the telnet session The LED stops blinking Now try the maw 0 100 command to display the memory content from address 0 Finally resume the processor by using the command resume The LED starts glowing again To see the list of things you can do use the help command KNJN FX2 ARM development boards Page 6 4 OpenOCbD flash memory support Let s check erase and program the ARM LPC s flash 4 1 Check the flash status The ARM LPC has an on board flash memory For example to check the flash status to see if it is erased or not type e mww 0xE01FC040 1 that switches the LPC memory mapping off for details see 10 3 e flash erase check 0 that takes a few seconds notice the spaces and underscore in the command e flash info 0 That shows a list of flash sectors with their status ail Telnet localhost Open On Chip Debugger gt muw BxEB1FCO4B 1 gt flash erase_check successfully checked erase state gt flash info 0 lpc20808 at BxBBBBBBBA size BxXBBBLBABA buswidth 8 chipwidth 8 H8 Ox86600666 COx1008 4kB gt not erased protected 1 8x8BB000188080 6x1666 4kB gt erased protected 2 6x 6662666 6x1966 4kB gt erased protected H3 8x8B00038880 lt Bx1BBB 4kB gt erased protected H4 6x86664666 COx1008 4kB gt erased protected 5 x66665666 lt Bx1BBB 4kB gt erased protected H6 6x 6666666 COx1008 4kB gt erased protected 7 x66667666
16. nOCD uses a configuration file that is specified using the f switch So the command to run OpenOCD locally looks like this openocd ex f openocd LPC2132 cfg 9 2 Stop OpenOCD You may want to stop OpenOCD once you are done playing with the ARM To stop OpenOCD try one of these in order of preference 1 If you have a telnet session opened type shutdown or sh in short 2 Close OpenOCD s window 3 Close the JTAG server manually click on the button close as shown below preferably when no OpenOCD session is active OpenOCD JTAG server The JTAG server is running 9 3 Run telnet When OpenOCD is running a telnet session allows to communicate with it on a command line like window FPGAconf allows opening a telnet session automatically for you But telnet sessions can also be opened manually by running the command telnet localhost 4444 either as a line of command or using the Start Run button of Windows Type the name of a program folder document or Internet resource and Windows will open it for you Open elnet lacalhost 4444 Cancel Browse Note With Vista amp Windows 7 Telnet is not installed by default Go to Control panel Programs and Features click on Turn on off features and enable the Telnet client checkbox 9 4 OpenOCD documentation on the web Home page http openocd berlios de web OpenFacts http openfa
17. nd TXD PO 0 1 or P0 8 9 allow the implementation of a serial asynchronous interface like RS 232 e The pins SCK MOSI and MISO P0 4 5 6 or P0 17 18 19 allow the implementation of a serial synchronous interface like SPI Check the startup kit s ARM project SPI and fpga4fun s SPI project KNJN FX2 ARM development boards Page 15 12 Board layouts The board layouts are available in the KNJN FX2 FPGA boards pdf document from http www knjn com docs Happy ARM and LPC ing KNJN FX2 ARM development boards Page 16
18. ygwin Note works with Eclipse cheap forthe beginners Initially was searching for a toolchain with the following features found some native Windows toolchains based on MinGW but the GDB of these toolchains doesn t work properly under Eclipse That s why decide to create a new toolchain suited for my requirements YAGARTO was born YAGARTO is divided in three packages with the following components Open On Chip Debugger Support for J Link SAM ICE GDB Server Binutils Newlib GCC compiler and the Insight debugger Eclipse Platform Runtime Binary Eclipse CDT and CDT plugin for the GDB embedded debugging Zylin made some modifications in Eclipse CDT for Windows a plugin to improve support for GDB embedded debugging in CDT This version of YAGARTO does not support the Cortex M3 cpu If you need a toolchain for this cpu take a look at CrossWorks for ARM To get Yagarto download these files from http www yagarto de 1 OpenOCD tools about 2 MB 2 Yagarto GNU ARM toolchain about 31 MB 3 Eclipse IDE patches about 72 MB Please note that Eclipse requires Java on your machine If unsure download also the Java runtime you can get it from http java sun com javase downloads 5 2 Yagarto s first file OpenOCD tools The first file contains a version of OpenOCD and some tools Your board doesn t use this version of OpenOCD but it needs the tools so install this file By default this gets installed
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